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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.

org (E-ISSN 2348-1269, P- ISSN 2349-5138)

Performance Analysis of Low Power CMOS based


8 bit Barrel Shifter
Deepti Shakya
M-Tech VLSI Design
SRCEM
Gwalior (M.P) INDIA

Shweta Agrawal
Assistant Professor, Dept. Electronics
& Communication Engineering
SRCEM
Gwalior (M.P), INDIA
Abstract

Barrel Shifter isimportant function to optimize the RISC processor, so it is used for rotating and transferring
the data either in left or right direction. This shifter is useful in lots of signal processing ICs. The Arithmetic
and the Logical Shifters additionally can be changed by the Barrel Shifter Because with the rotation of the
data it also supply the utility the data right, left changeall mathemetically or logically.A purpose of this paper
is to design the CMOS 8 bit barrel shifter using universal gates with the help of CMOS logic and the most
important 2:1 multiplexers (MUX). CMOS based 8 bit barrel shifter has implemented in this paper and
compared in terms of delay and power using 90 nm and 45nm technologies.

Key Words: CMOS, Low Power, Delay,Barrel Shifter, PMOS, NMOS, Cadence.

1. Introduction

In RISC processor ALU plays math and intellectual operations. Number crunching operations operate
enlargement, subtraction, addition and division such as sensible operations incorporates AND, OR, NOT,
NAND, NOR, XNOR and XOR. RISC processor consist ofnotice in credentials used to keep the operand in
store path. The point of control unit is to give a control flag that controls the operation of the processor which
tells the small scale building design which operation is done after then the time Barrel shifter is a significant
element among rise operation. In augmentation operation, fractional items stimulated and protected with the
aid of barrel shifters [1].Basically,have four type of shifter i.e. dependable, math, barrel and channel shifters.
A barrel shifter is a combinational reason avert on the way to pass the substance of a transport determined wide
variety of positions left or right by using a word. This is an essential capability in PCs and numerous sign
getting ready ICs. Regularly, while transferring to one aspect, the positions cleared can be loaded with traits
from the left, or if no characteristics are available, then loaded with 0in additionthe no traits are usable, the
emptied positionmay be filled the evaluation of MSB [2]. A few shifters without a doubt turn the substance of
a delivery filling the LSBs with the beyond substance of the MSBs for a shift left and the opposite manner
around for a shift right. The logical shifter, shift the bit in left or right path; the empty spots are filled via 0.
Mathematical shifter the method for left shift is identical as reasonable on the otherside right shift the clearmark
is filled of sign bit. Barrel shifter includes out the rotation of bits in left or right direction; on this the empty

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

place is stuffed by means of the bit shifted. Funnel Shifter is combination of all shifters and rotator [3]. In this
paper barrel shifter is designed using multiplexer and implemented using CMOS logic. The MUX is used to
universal gates which is reduce the time consumption and poer dissipation.

Barrier shifter is additional circuit that have n data inputs and n data outputs by control inputs which is allotted
the shifting input data through output and bit barrel shifter known for n, n bit multiplexers. Excluding n-bit
barrel shifter wants n numbers of n-bit multiplexers.If n is increased the circuit complexity also increases i.e.,
circuit over head, it leads to occupy more area and high power consumption and also shows the effect on speed
of the operation [4].The equipment is using in various digital and analog logic circuits mutually with CMOS
sensor, data converters and especiallyintegrated transceivers for lots of styles of features [5]. The result
comprises the evaluation among different methodologies to reduce the Power intake in ALU design [6]. Barrel
Shifter is likewise called Rotator because it rotates the statistics in a cycle so that the empty spots are filled
the bits shifted off the other side. A funnel shifter can do all six sorts of shifts which can be carried out by
means of previously noted shifters. The Level shifters is used toalter logical signal from one voltage to further
voltage. Separately from this stage shifters are used on the pad ring and center of chip interface where low
voltage signal from chip center are shifted to high voltage [7].

2. Function of Barrel Shifter

Barrel Shifter is logic circuit with ‘n’ numbers of data inputs and ‘n’ numbers of data outputs that are used to
carry out transferring and rotation operation. It is operated with the help of clock. Barrel shifter is intended
using multiplexers. In this research paper 2:1 MUX is use for designing the barrel shifter. This research paper
contain 8-bit barrel shifter that may rotate the data in both direction. Threeselection lines s1, s2, s3 are used
for rotating the data.The data comes from D flip flops are fed to the barrelshifter and using the selection line,
the data is shifted.By selecting 001 it sends the data to the right shiftingoperation block. When we select 111
then data goes toleft shifting block. While sending the data to rightshifting block the left shifting block gets
disabled anddata does not go to left shifting block. The same thing is done for left shifting block, while sending
the data to theleft shifting block, right shifting block gets disabled anddata does not go to the rightshiftchunk.
The obstructfigure of barrel shifter is given below fig.1toelucidateevery the function.If, barrel shifter can
bemeasured by 2:1 MUX theninclude 8 bit barrel shifter.

Fig.1 Block Diagram of Barrel Shifter

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

The fig.2 shows the multiplexer execution of 2x2 barrel shifter that is acting a left rotation of bit if we offer
i0 i0 i1 i1 as enter then the output produced is in the series i1 i1 i0 i0.Input collection is shifted by bit to the
left and LSB is filled by means of the shifted bits. Thus the rotation of two bits from left side is completed.
The barrel shifter is toomoderatetiny. [8]. Barrel Shifter consists of an array of transistors, in which the wide
variety of rows equals the word duration of the information, and the variety of columns equalsthe maximum
shift width. The control wires are routed crosswise during the array. The layout of the barrel shifter is sort of
symmetric and may be executed using recurring combinational logicblocks. 2:1 multiplexer can well used to
layout n bit barrel shifter. Fig. Suggests the block representation of a 2X2 barrel shifter using 4, 2:1
multiplexers. If each multiplexer block is optimized for strength dissipation then the simulation time of the
complete barrel shifter is reduced by means of a issue of nlog2n periodsincemodel of one multiplexer is
adequate to calculating the whole energy dissipation and delay.[9]

Fig.2 MUX based of 2x2 barrel shifter

Today’s integrated circuits have a growing need for speed, area, and power. Although have many benefits,
CMOS suffers from improved data, extra energy dissipation and equally improved capacitance and delay, as
the logic gates grow to elevateddensity. The share circuits exploit the punycriticize devices and
furtherdragdownward devices. They diminish the input capacitance and as a result develop logical attempt
with the aid of doing away with huge PMOS transistors loading the inputs, however rely upon the correct ratio
of pull-up to pull-down strength [10]. The 2:1 multiplexer preservefruitfully used to draw n bit Barrel shifter,
stipulationequally multiplexer block is condense for forcedissipation [11].

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Fig.3 Basic block diagram of 2: 1 multiplexer

There are presented the various operations which implement using barrel shifter.In rotate operation the data
can be rotated either in right or left direction.For example 1111100001 after rotating right by means of manner
of one bit data is shifted in right direction via one bit and the output is 1111110000.Also if rotate the identical
data in right direction by the usage of 6 bit then the output acquire is 1000011111. In 2nd example 1111100000
it's miles shifted to right by means of one bit 0111110000 while the identical data shifted right via six bit which
offers the output 0000001111.Likewise for the following input 0011111110the shift of data is proven in left
course, first off the input is shifted in left direction through one bit the output is 0111111100, in left shift the
shifted data is removed and empty spaces are changed through zeros. In rotating data left the input is
1011111110, first off the data is circled with the aid of one bit output is 0111111101, secondly the data is
rotate of two bit production is 1111111010,thenconcluding the data is revolvenearly six bit output is
1110101111

Fig.4 Shift and rotate operation in Barrel Shifter

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3. Design Implementation of Barrel Shifter

The barrel shifter is commonlyimplement as :‐

Rotate and Shift Direction:‐ The direction of rotating and shift operation is carried out with the aid of
reversing the input and output vector, the usage of this technique lets in for the shift or rotate common sense
to be kept simple.
[A] Logical Shift Operation: ‐The logical shift operation insert zero values for both shift operation. The input
vector is shifted within the select direction by number of bits in the select indication.
[B] Rotate Operation: The rotating operation is change the bit out of vector MSB is inserted to LSB.
[C] Shift and Rotate Operation:- We definite A to be the input operand, B to be the rotate amount, and Y to
be the rotating end result.
We outline A to be n bit fee, where n is an integer energy of two. Thus, B is a log2 (n) bit integer instead of
values from zero to n ‐ 1 .We demonstrate A to be the input operand, B to be the shift total, and Y to be the
shifted end result.We characterize A, is nbitvalue, wherever n is an integer of 2 influence.Subsequently, B is
a log2(n)‐bit integer on favour of0 to ‐1 values.

Fig.5 Block Diagram of Bit Shift Rotate Operation

The rotating shift equally to the left or right. It method whilst the bits are shifted data vector on one aspect,
they may be shifted to the data vector on the alternative aspect. The positions of the bits can vary their positions
because the bits are routing from input to the output [12]. A rotateoperation ismoveas the bit is shifted to vector
MSB and LSB.

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

Fig.6 Right/Left rotates and shift operation

4. Shifting operation of Barrel Shifter


Shifting operation of barrel shifter enclosecategories are right shift and left shift. The right and left identify
the course of the shifting. The shift operation inserts zero values for each shift operation. The input vector is
shifted in the select direction consistent with the wide variety of bits in the choose indication.

Fig.7 Right shift operation

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

Fig.8 Right/Left shift operation

5. Proposed 8-bit Barrel Shifter


Barrel Shifter includes an array of transistors, in which the wide variety of rows equals the phrase length
of the data, and the wide variety of columns equals the maximum shift width. Proposed eight bit barrel
shifter using 2:1 MUX and regularly occurring NAND gate is designed. 90 transistors (NMOS and
PMOS) is make use for design8 bit Barrel Shifter, Schematic of 8 bit Barrel Shifter is shown in Fig.9 and
Transient response is shown in Fig 10.

6. Analysis and Simulated Results

Fig.9 Schematic of 8-bit Barrel Shifter

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(a)

(b)

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

(c)
Fig.10Transient Response of 8-bit Barrel Shifter

7. PERFORMANCE PARAMETER

A. Power Dissipation in CMOS technology

Power loss on bus can be caused by three sources:


1. Leakage current occurs through the n-p junction diode, which is shown in figure1.
2. Short-circuit takes place when there is a another path going to ground.
3. Charge and discharge of freeloading capacitance acquirestate. Leakage Component of power dissipation
can be shown by Figure1, which is drain to resources leakage current is independent of the drain to source
voltage VDS . The reduction in the losses gives better result to system.

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

Fig.11 Power dissipation in CMOS Technology

8-Bit Barrel Shifter


4
3.5
3.5
3
2.5 8-Bit Barrel Shifter at
2 1.8 90nm
1.5 8-Bit Barrel Shifter at
1 45nm
0.5
0
Power Dissipation

Fig.12 Comparison Graph of Power Dissipation

Power Analysis in the 8-bit Barrel Shifter either the transistors are in off mode or in on mode due to the early
switching of opposite level for the 90 nm and 45nm technologies are shown in above fig.12.

B. Propagation Delay
Proposed 8-bit Barrel Shifter is used in place of Arithmetic and the Logical Shifters and reduce delay as well
as power consumption. Therefore a Proposed 8-bit Barrel Shifter can be designed to switch faster than
Arithmetic and the Logical Shifters leading to a reduction in delay. The time in use for a 8-bit Barrel Shifter
logic gate output to change after one or more inputs have changed is known as propagation delay. The
disseminationhindrance of 8-bit barrel Shifter at 90nm and 45nm are given in Fig 13.
The Delay of the through during a signal transition is given as:

𝐷𝑒𝑙𝑎𝑦 = 0.69𝑅𝑒𝑞 × 𝐶𝐿

Where in equationis the 𝑅𝑒𝑞 resistance that is implemented using the feed through cell and 𝐶𝐿 is the load
capacitance.

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8-Bit Barrel Shifter


103
102
102
101
8-Bit Barrel Shifter at
100
90nm
99
98 8-Bit Barrel Shifter at
98 45nm
97
96
Delay

Fig.13 Comparison Graph of Delay

Result Analysis of 8-bit Barrel Shifteris shown below table 1.

Table 1 Simulated Result Summary


Performance Parameter 8-Bit Barrel Shifter
Technology Used 90nm 45nm
Supply Voltage 0.7V 0.7V
Delay 102ns 98ns
Power Dissipation 3.5µW 1.8µW
Transistor count 90 90

Conclusion
The proposed 8 bit barrel shifter does not have much delay time as well as takes very less power. There is no
need of shifting data left or right individually. This combines all features together and runs the system without
any error. Also, there can be a plan to investigate special purpose applications for which one may get even
more savings using proposed 8 bit barrel shifter in terms of Delay and Power. The purpose of this paper is to
design the CMOS 8 bit barrel shifter using universal gates with the help of CMOS logic and the most important
2:1 multiplexers (MUX). The barrel shifters are habituallyexploit the surrounded digital signal processors and
familiargatheringmainframe to direct data. CMOS based 8 bit barrel shifter has implemented in this paper and
compared in terms of delay and power using 90 nm and 45nm technologies.

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© 2018 IJRAR December 2018, Volume 5, Issue 04 www.ijrar.org (E-ISSN 2348-1269, P- ISSN 2349-5138)

References

[1]. RenukaVerma, Rajesh Mehra, “Area Efficient Layout Design AnalysisOf CMOS Barrel Shifter,”
International Journal of Scientific Research Engineering & Technology (IJSRET), pp. 84-89, March 2015.
[2]. A Sharma, Rajesh Mehra, “Area and Power Efficient CMOS Adder Design By Hybridizing PTL and GDI
Technique,” International Journal of Computer Applications, Vol.66, No.4, pp.15-22, March 2013.
[3]. Shilpa Thakur, Rajesh Mehra, “CMOS Design and Single Supply Level Shifter Using 90nm Technology,”
Conference on Advances in Communication and Control Systems, pp.150-153, 2013.
[4] D A Tatajee, K Rajesh.”Semi customImplementation of Area Efficient Barrel shifter”,International Journal
of Advanced Computing,Engineering and Application, Vol. 1, pp.112-114,
December 2012.
[5] Pooja Singh, Rajesh Mehra, “Design Analysis ofXOR Gates Using CMOS & Pass Transistor”International
Journal of Engineering Science InventionResearch & Development, Vol. 1 Issue 1, pp.21-25, July 2014.
[6] Dhananjay Jadhav, Mithilesh Muley, Manglesh Ashtankar, “Vlsi Design of Barrel Shifter Using
Complementary and Pseudo Nmos Logic”, 4th IRF International Conference, pp.170-172, March 2014.
[7] Shilpa Thakur, Rajesh Mehra “CMOS Design and Single Supply Level Shifter Using 90nm Technology”
Conference on Advances in Communication and Control Systems, pp.150-153, 2013.
[8] Sabyasachi Das, Sunil P. Khatri.”Timing-Driven Decomposition of a Fast Barrel Shifter” IEEE, pp.574-
577, 2007.
[9] Prasad D Khandekar, Dr. Mrs. Shaila Subbaraman, Venkat Raman Vinjamoori, “Quasi-Adiabatic 2X2
Barrel Shifter” Fourth International Conference on Industrial and Information Systems, ICIIS, IEEE, pp.321-
324, December 2009.
[10] Akhilesh Verma, Rajesh Mehra, “Design and Analysis of Conventional and Ratioed Cmos Logic Circuit”
IOSR Journal of VLSI and Signal Processing Vol.2, pp. 25-29, April 2013.
[11] Prasad D Khandekar, Dr. Mrs. Shaila Subbaraman, “Low Power 2:1 MUX for Barrel Shifter” First
International Conference on Emerging Trends in Engineering and Technology, IEEE, pp.404-407, July 2008.
[12] Wayne Wolf, “Modern VLSI Design (System on chip Design)”, Pearson Education, pp. 319-321.

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