Digital lab Result Report

Instructor: KIM HANJUN

by: ALI AZAM and KHANG
Student ID:2017142113,2017142225
Date: 8/9/2019
Theory:

In order to perform an any operation in Vivado we need to follow the following steps.

Add and create a design source:

This creates a source where we can perform any logic operation.

Add and create simulation source.

It will help us to run the simulation and show the waveform in the graph.

Description of Test Benchmark for Simulation.

We are supposed to plot inputs and output behaviors in a simulation with respect to time. So, we
start simulation with an ‘initial beginning’ point. We can use time scale for delay if we want to
change the assigned values of input to a different value.

Define Module

In a module we are supposed to write the input and the output ports as well as their behaviors. If
we want to perform any logic operation, we can simply write it there. For instance, if addition
operation takes place we simply need to put the sum of two inputs and assign them to an
unknown.

Instantiation and connection of module.

Module instantiation is required for connection of modules. For instance, simulation module and design
module can be connected by module instantiation. It is important to note that the name of instantiated
module must be same with that of logic gate module.

Assignment and Connection of pin to the Top Module.

Module is connected to the pins of the actual chip using pin assignment. We can use the same
names we assigned to the pin assignment when we want to connect the assigned pins to the top
module.
Purpose:

The purpose of this experiment is to do gate operation and show the required result on FPGA.
we were asked to perform a gate operation and show the results on FPGA. We are supposed to
perform addition operation(OR-gate) and gate operation evaluate them through simulation and
then finally show logic gate operation and Add operation using LED.

CODE for logic gate operation:

module logicgate_test (input_a, input_b, result);

input [3:0] input_a;
input [3:0] input_b;
output [3:0] result;
assign result = input_a + input_b;
endmodule
module testbench(
);
reg [3:0] a, b;
wire [7:0] r;
initial begin
a <= 0;
b <= 0;
end
logicgate_test gate_0 (
.input_a(a),
.input_b(b),
.result(r)
);
Endmodule
module topModule_test(
input [7:0] sw_n,
output [3:0] led
 );
wire [3:0] a, b;
wire [3:0] r;
assign a = sw_n[3:0];
assign b = sw_n[7:4];
assign r = led[3:0];4
logicgate_test gate_0 (
.input_a(a),
.input_b(b),
.result(r)
);
Endmodule
4-bit adder

Above figures are the logic gate circuit design of full-adder. Each full adder has three inputs (2 bits of 2
numbers and previous calculation carry) each and two output (addition result and carry). The design is
made of AND, OR and XOR gate. When a is 0000 and b is 0000 then the output of the logic circuit will be
r which is 0000 too.
 initial begin

a <= 0;
b <= 0

assign result = input_a + input_b;

This waveform clearly shows that when a and b are zero then the output is zero that testifies our
explanation of circuit diagram.
Pictures:
Result Analysis:
In order to understand the above pictures, we need to bear in mind that ON means 1 and OFF is zero
and the numbers start from left to right, the rightmost is smallest and the leftmost is the biggest. From
the first pictures we can see that all LEDs are turned off i.e; the output is zero when both inputs are 0.
And the LEDs show 0001(OFF OFF OFF ON) And the LEDs show 0010==2 (OFF OFF ON OFF) when a is set
to 0001 and b is set to 0001. when a is set to 1111 and b is set to 1111 the LEDs show 1110 which is not
correct (it should be 11110) because we only use 4 LEDs.

module logicgate_test (input_a, input_b, result);

input [3:0] input_a;
input [3:0] input_b;
output [3:0] result;
assign result = input_a + input_b;
endmodule
module topModule_test(
input [7:0] sw_n,
output [3:0] led
);
wire [3:0] a, b;
wire [3:0] r;
assign a = sw_n[3:0];
assign b = sw_n[7:4];
assign r = led[3:0];4
logicgate_test gate_0 (
.input_a(a),
.input_b(b),
.result(r)
);
Endmodule

We can understand the result of the FPGA using the above code. The “result” is represented by 4 LEDs
based on binary code. This explains when we set a and b to some certain numbers we will get the
corresponding result across the LEDs.
Discussion:
There are two inputs of 4bits each that are fed to the adder to get an output. The inputs were assigned
to as ‘a’ and ‘b’ and the output was seen across the LEDs. The adder worked and implemented well and
we got a result up to our expectation.

For 4-bit output the maximum output is 1111 which corresponds to number 15. Hence we can’t
represent a number bigger than 15 using a 4-bit adder. Therefore, if we want to show a bigger output in
the LEDS we have to increase the number of bits.