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.. SYNCHRONISATION CIRCUIT
. ESD PROTECTED
PRECISION OSCILLATOR AND RAMP
. GENERATOR
POWER OUTPUT AMPLIFIER WITH HIGH
.. CURRENT CAPABILITY
FLYBACK GENERATOR
.. VOLTAGE REGULATOR
PRECISION BLANKING PULSE GENERATOR
15 FLYBACK
14 SUPPLY
13 BLANKING OUTPUT
12 AMPLIFIER INPUT (-)
11 AMPLIFIER INPUT (+)
10 RAMP OUTPUT
9 RAMP GENERATOR
8 GROUND
7 HEIGHT ADJUSTMENT
6 OSCILLATOR
5 SYNC. INPUT
4 OSCILLATOR
3 OSCILLATOR
2 AMPLIFIER SUPPLY
1 AMPLIFIER OUTPUT
1675A-01.EPS
BLOCK DIAGRAM
+V S
+
BLANKING
OUT
13 14 2
+
C f
BLANK
GENERATOR VOLTAGE 15
FLYBACK
AND CRT REGULATOR GENERATOR
PROTECTION
6
11
Ro R3
+
RAMP CLOCK
4 OSCILLATOR POWER Ly
GENERATOR 1
Co PULSE AMP. Ry
-
3 Iy
R1 R2
YOKE
12 Re
BUFFER THERMAL
7 SYNC. Ra
STAGE PROTECTION
SYNC.
7 9 10 8 Rc +
Rb +
Cc
Ca LIN
Rf
1675A-02.EPS
HEIGHT Rd Cb
THERMAL DATA
Symbol Parameter Value Unit
1675A-02.TBL
2/11
TDA1675A
1675A-03.TBL
V13 Blanking output saturation voltage I13 = 10 mA 0.35 0.5 V 1a
V15 Pin 15 saturation voltage to ground I15 = 20 mA 1 1.5 V 1a
22kΩ
7 1
8V 75kΩ
Ra 12
5
4 V1 10 7 9 8 47kΩ
12
1V
-I 9
9 5 11 8 10
Rb V7 -I 7
1675A-03.EPS
1675A-04.EPS
V9
-I 9
0.1µF
Figure 1c Figure 1d
VS VS
2 14 2 14
+I 1 V1H
4 1 4 1
1V 1V
V1L -I 1
12 11 5 10 8 12 11 5 10 8
1675A-05.EPS
1675A-06.EPS
8V 0.1µF 8V 0.1µF
3/11
TDA1675A
AC ELECTRICAL CHARACTERISTICS
(Refer to A.C. test circuit of fig. 2, Tamb = 25oC, VS = 24V, f = 50Hz, unless otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
IS Supply Current IY = 2APP 295 mA
I5 Sync Input Current Required to Sync 100 µA
V1 Flyback Voltage Iy = 2App 50 V
V3 Peak-to-peak Oscillator Sawtooth I5 = 0 3.6 V
Voltage I5 = 100µA 3.4 V
V10TH(L) Start Scan Level of the Input Ramp 1.85 V
tFLY Flyback Time Iy = 2App 0.6 ms
o
tBLANK Blanking Pulse Duration fo = 50Hz, Tj = 75 C 1.33 1.4 1.47 ms
fo = 60Hz, Tj = 75oC 1.17 ms
fo Free Running Frequency Ro = 7.5kΩ, Co = 330nF, Tj = 75oC 42 43.5 46 Hz
Ro = 6.2kΩ, Co = 330nF, Tj = 75oC 52.5 Hz
∆f Synchronization Range I5 = 100µA, Tj = 75oC 14 16 Hz
o
1675A-04.TBL
Tj Junction Temperature for Thermal 145 C
Shut-down
VON Peak-to-peak Output Noise 35 mVPP
1N4001 220µF
+V S
t f Iy
1000µF
0.1µF
t blank
2.4kΩ
V1
BLANKING
OUT GND
13 14 2 15 1/fo
100µA
SYNC. IN 5 1
t sync.
2.2Ω
6 YOKE
10mH
7.5kΩ
270Ω
TDA 1675A IY
4.7kΩ
0.22µF 5.9Ω
A S1 (R o ) 2.4kΩ
4.7kΩ B 4 12
0.33µF
(FREQ.)
120Ω
Co 3 7 9 11 10 8
t blank 2200µF
1kΩ
0.1µF
0.1µF 47µF
15kΩ
180kΩ
1/fo V3 R f Iy
56kΩ 100kΩ
560kΩ
1/fo
1/fo
0.82Ω
GND V10thL
HEIGHT
4/11
TDA1675A
Figure 3 : Application Circuit for Small Scree 90o CTV Set (Ry = 15Ω ; Ly = 30 mH ; Iy = 0.82 APP)
1675A-08.EPS
100kΩ 0.1µF
HEIGHT
* The value depends on the characteristics of the CRT. The value shown is indicative only.
TYPICAL PERFORMANCE
Symbol Parameter Value Unit
VS Minimum supply voltage 25 V
IS Supply current 140 mA
tFLY Flyback time 0.7 ms
tBLKG Banking time 1.4 ms
fO Free running frequency 43.5 Hz
* PTOT Power dissipation 2.4 W 1675A-05.TBL
5/11
TDA1675A
Figure 4 : Application Circuit for 110o CTV Set (Ry = 9.6Ω ; Ly = 24.6 mH ; Iy = 1.2 APP)
1N4001 220µF - 25V
+V S
D1 C4
C2 C3
R3 35V
10kΩ 0.1µF
470µF
BLANKING
OUT
13 14 2 15
SYNC. 0.1µF YOKE
PULSE 5 1
IN C1
R1 R9
4.7kΩ 2.2Ω
6
Ro
TDA 1675A R11
330Ω
C7 0.22µF
7.5kΩ
1% 2.4kΩ
4 12
330nF
* R10
3 7 9 11 10 8 R8 2%
C 5% R7 120Ω
o C9 1500µF
0.1µF 1.2kΩ 16V
2% 47µF
R2
* C5 0.1µF C8
10V
15kΩ
R4
180kΩ
* 56kΩ RT2
R5 LINEARITY
470kΩ
SERVICE * R6 100kΩ 5% R12
SWITCH S1 C6 1.2Ω
1675A-09.EPS
RT1 0.1µF
220kΩ
HEIGHT
* The value depends on the characteristics of the CRT. The value shown is indicative only.
TYPICAL PERFORMANCE
Symbol Parameter Value Unit
VS Minimum supply voltage 22.5 V
IS Supply current 185 mA
tFLY Flyback time 1 ms
tBLKG Banking time 1.4 ms
fO Free running frequency 43.5 Hz
* PTOT Power dissipation 2.7 W
* RTH(heatsink) Thermal resistance of the heatsink 1675A-06.TBL
for Tamb = 60oC and Tj max = 110oC 11.5 o
C/W
for Tamb = 60oC and Tj max = 120oC 14.5 o
C/W
* Worst case condition.
6/11
TDA1675A
Figure 5 : Application Circuit for 110o CTV Set (Ry = 5.9Ω ; Ly = 10 mH ; Iy = 1.95 APP)
1N4001 220µF - 25V
+V S
D1 C4
C2 C3
R3 35V
10kΩ 0.1µF
1000µF
BLANKING
OUT
13 14 2 15
SYNC. 0.1µF YOKE
PULSE 5 1
IN C1
R1 R9
4.7kΩ 2.2Ω
6
Ro
TDA 1675A R11
330Ω
C7 0.22µF
7.5kΩ
1% 2.4kΩ
4 12
330nF
* R10
3 7 9 11 10 8 R8 2%
C 5% R7 120Ω
o C9 2200µF
0.1µF 1kΩ 16V
2% 47µF
R2
* C5 0.1µF C8
10V
15kΩ
R4
180kΩ
* 56kΩ RT2
R5 LINEARITY
560kΩ
SERVICE * R6 100kΩ 5% R12
SWITCH S1 C6 0.82Ω
1675A-10.EPS
RT1 0.1µF
220kΩ
HEIGHT
* The value depends on the characteristics of the CRT. The value shown is indicative only.
TYPICAL PERFORMANCE
Symbol Parameter Value Unit
VS Minimum supply voltage 24 V
IS Supply current 285 mA
tFLY Flyback time 0.6 ms
tBLKG Banking time 1.4 ms
fO Free running frequency 43.5 Hz
* PTOT Power dissipation 4.3 W
* RTH(heatsink) Thermal resistance of the heatsink 1675A-07.TBL
7/11
TDA1675A
Figure 6 : PC Board and Components Layout for the Application Circuits of Figures 3, 4 and 5 (1 : 1 scale)
Ro
TDA 1675A
S1
C3
Co
R2
R4 R3
RT1 C11
C4
R5 RT2
R9 R1 D1
C6
R6
C5
C7 R7
C2
C1 R8 C8
R10
C9
R12
R11
YOKE 1675A-11.EPS
APPLICATION INFORMATION (Refer to the Pin 6 is the output of the switch driven by the
block diagram) internal clock pulse generated by the
threshold circuits.
Oscillator and sync gate (Clock generation) Pin 3 is the output of the amplifier.
The oscillator is obtained by means of an integrator Pin 5 is the input for sync pulses (positive)
driven by a two threshold circuit that switches Ro
high or low so allowing the charge or the discharge Ramp generator and buffer stage
of Co under constant current conditions. A current mirror, the current intensity of which can
The Sync input pulse at the Sync gate lowers the be externally adjusted, charges one capacitor
level of the upper threshold and than it controls the producing a linear voltage ramp.
period duration. A clock pulse is generated. The internal clock pulse stops the increasing ramp
Pin 4 is the inverting input of the amplifier used by a very fast discharge of the capacitor a new
as integrator. voltage ramp is immediately allowed.
8/11
TDA1675A
The required value of the capacitance is obtained rent ramply. Re and the Boucherot cell
by means of the series of two capacitors Ca and are used to stabilize the power amplifier.
Cb, which allow the linearity control by applying a Pin 2 The supply of the power output stage is
feedback between the output of the buffer and the forced at this pin. During the trace time
tapping from Ca and Cb. the supply voltage is obtained from the
Pin 7 The resistance between pin 7 and ground main supply voltage VS by a diode,
defines the current mirror current and while during the retrace time this pin is
than the height of the scanning. supplied from the flyback generator.
Pin 9 is the output of the current mirror that
charges the series of Ca and Cb. This Flyback generator
pin is also the input of the buffer stage. This circuit supplies both the power amplifier output
Pin 10 is the output of the buffer stage and it is stage and the yoke during the most of the duration
internally coupled to the inverting input of the flyback time (retrace).
of the power amplifier through R1. The internal clock opens the loop of the amplifier
and lets pin 1 floating so allowing the rising of the
Power amplifier flyback. Crossing the main supply voltage at pin 14,
This amplifier is a voltage-to-current power the flyback pulse front end drives the flyback
converter, the transconductance of which is generator in such a way allowing its output to reach
externally defined by means of a negative current and overcome the main supply voltage, starting
feedback. from a low condition forced during the trace period.
The output stage of the power amplifier is supplied An integrated diode stops the rising of this output
by the main supply during the trace period, and by increase and the voltage jump is transferred by
the flyback generator circuit during the most of the means of capacitor Cf at the supply voltage pin of
duration of the flyback time. The internal clock turns the power stage (pin 2).
off the lower power output stage to start the flyback. When the current across the yoke changes its
The power output stage is thermally protected by direction, the output of the flyback generator falls
sensing the junction temperature and then by down to the main supply voltage and it is stopped
putting off the current sources of the power stage. by means of the saturated output darlington at a
Pin 12 is the inverting input of the amplifier. high level. At this time the flyback generator starts
An external network, Ra and Rb, defines to supply the power output amplifier output stage
the DClevel across Cy so allowing a cor- by a diode inside the device. The flyback generator
rect centering of the output voltage. The supplies the yoke too.
series network Rc and Cc, in conjunction Later, the increasing flyback current reaches the
with Ra and Rb, applies at the feedback peak value and then the flyback time is completed:
input I2 a small part of the parabola, the trace period restarts. The output of the power
available across Cy, and AC feedback amplifier (pin 1) falls under the main supply voltage
voltage, taken across Rf. The external and the output of the flyback generator is driven for
components Rc, Ra and Rd, produce the a low state so allowing the flyback capacitor Cf to
linearity correction on the output scan- restore the energy lost during the retrace.
ning currentIy and their values must be Pin 15 is the output of the flyback generator that,
optimized for each type of CRT. when driven, jumps from low to high
Pin 11 is the non-inverting input. At this pin the condition. An external capacitor Cf trans-
non-inverting input reference voltage fers the jump to pin 2 (see pin 2).
supplied by the voltage regulator can be
measured. A capacitor must be con- Blanking generator and CRT protection
nected to increase the performances This circuit is a pulse shaper and its output goes
from the noise point of view. high during the blanking period or for CRT
Pin 1 is the output of the power amplifier and it protection. The input is internally driven by the clock
drives the yoke by a negative slope cur- pulse that defines the width of the blanking time
9/11
TDA1675A
when a flyback pulse has been generated. If the Figure 8 : Output Saturation Voltage to Supply
flyback pulse is absent (short cirucit or open cirucit versus Output Peak Current
of the yoke), the blanking output remains high so V1H (V)
allowing the CRT protection. 2
Pin 13 is an open collector output where the
blanking pulse is available. VS = 35V
1.5
Voltage regulator
The main supply voltage VS, is lowered and
regulated internally to allow the required reference
1
voltages for all the above described blocks.
Pin 14 is the main supply voltage input VS
1675A-13.EPS
I Y (App)
(positive).
0.5
Pin 8 is the GND pin or the negative input of VS 0 0.5 1 1.5 2
Figure 7 : Output Saturation Voltage to Ground Figure 9 : Maximum allowable Power Dissipation
vs. Peak Output Current vs. Ambient Temperature
V 1L (V) Ptot (W)
1.5 32
VS = 35V R R
IN
th th
=
FIN
24 =4 2˚
˚C C/
IT
1 /W W
R
E
th = 8˚
HE
16 C /W
AT
SIN
0.5
K
8
1675A-14.EPS
1675A-12.EPS
10/11
TDA1675A
PMMUL15V.EPS
Millimeters Inches
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 5 0.197
B 2.65 0.104
C 1.6 0.063
D 1 0.039
E 0.49 0.55 0.019 0.022
F 0.66 0.75 0.026 0.030
G 1.14 1.27 1.4 0.045 0.050 0.055
G1 17.57 17.78 17.91 0.692 0.700 0.705
H1 19.6 0.772
H2 20.2 0.795
L 22.1 22.6 0.870 0.890
L1 22 22.5 0.866 0.886
L2 17.65 18.1 0.695 0.713
L3 17.25 17.5 17.75 0.679 0.689 0.699
L4 10.3 10.7 10.9 0.406 0.421 0.429
L7 2.65 2.9 0.104 0.114
M 4.2 4.3 4.6 0.165 0.169 0.181
M1 4.5 5.08 5.3 0.177 0.200 0.209
S 1.9 2.6 0.075 0.102
MUL15V.TBL
Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips
I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
11/11