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vi Ri
=
vsig Ri + Rsig
vo RL
= Av = Avo ⋅
vi RL + Ro
vo Ri RL
= ⋅ Avo ⋅
vsig Ri + Rsig RL + Ro
F. Najmabadi, ECE102, Fall 2012 (2/23)
Fundamental
MOS Amplifier Configurations
Common-Source Common-Gate
Common-Drain
Since PMOS has the same signal model, configurations and results are exactly the same
Textbook:
Textbook is inconsistent. It
includes RD for common source
and common gate but does not
include RS in common drain.
Note RD is parallel to RL.
Lecture:
To avoid confusion, I am using
only one resistor, R’L, which is
the equivalent of all resistors in
the drain circuit (e.g., for the
above circuit, R’L = R L || RD )
ii = 0
vi
Ri = =∞
ii
Signal Circuit:
vi
Input Resistance ii = 0 ⇒ Ri = =∞
ii
F. Najmabadi, ECE102, Fall 2012 (10/23)
Common Source with Source Resistor (Gain*)
Signal Circuit:
vi ro + RL′
Ri = =
ii 1 + g m ro
1 R′
Ri ≈ + L
g m g m ro
Ro = ro
Gain
Node voltage method:
v gs = vi − vo
vo vo
Node vo + − g m (vi − vo ) = 0
RL′ ro
vo
g m vi = + g m vo
ro || RL′
g m (ro || RL′ )
Av =
1 + g m (ro || RL′ )
g m ro
Avo = ≈1
1 + g m ro
1 1
Ro = || ro ≈
gm gm
ro
Notation:
Set vi = 0, current source becomes open circuit
ro is the small-signal resistance
Ro = ro between the point and ground
A)
B) No Signal circuit
MOS is NOT in saturation
ro +R 1 R
≈ +
1 + g m ro g m g m ro
ro Diode-connected
1 1
|| ro ≈ Transistor
gm gm Always in saturation!
Above configurations are for Small Signal. Typically one or both grounds
are connected to bias voltage sources to ensure that MOS is in saturation!
F. Najmabadi, ECE102, Fall 2012 (22/23)
Gain, input, and output resistances of
MOS amplifiers can be found
using
fundamental amplifiers configurations
and elementary R forms