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Reference Manual
SMPSRM/D
Rev. 4, Apr−2014
© SCILLC, 2014
Previous Edition © 2002
“All Rights Reserved’’
SMPSRM
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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Forward
Every new electronic product, except those that are battery powered, requires converting off−line
115 Vac or 230 Vac power to some dc voltage for powering the electronics. The availability of design
and application information and highly integrated semiconductor control ICs for switching power
supplies allows the designer to complete this portion of the system design quickly and easily.
Whether you are an experienced power supply designer, designing your first switching power
supply or responsible for a make or buy decision for power supplies, the variety of information
in the Switch−Mode Power Supply Reference Manual should prove useful.
This reference manual contains useful background information on switching power supplies for
those who want to have more meaningful discussions and are not necessarily experts on power
supplies. It also provides real SMPS examples, and identifies several application notes and
additional design resources available from ON Semiconductor, as well as helpful books available
from various publishers and useful web sites for those who are experts and want to increase their
expertise. An extensive list and brief description of analog ICs, power transistors, rectifiers and other
discrete components available from ON Semiconductor for designing a SMPS are also provided.
For the latest updates and additional information on energy efficient power management and discrete
devices, please visit our website at www.onsemi.com.
Soft−Skip is a trademark of Semiconductor Components Industries, LLC. ENERGY STAR is a registered mark U.S. mark. All brand
names and product names appearing in this document are registered trademarks or trademarks of their respective holders.
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SMPSRM
Table of Contents
Page
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Linear versus Switching Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Switching Power Supply Fundamentals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
The Forward−Mode Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
The Flyback−Mode Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Common Switching Power Supply Topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Interleaved Multiphase Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Selecting the Method of Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
The Choice of Semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Power Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
The Bipolar Power Transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
The Power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Driving MOSFETs in Switching Power Supply Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
The Insulated Gate Bipolar Transistor (IGBT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Rectifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
The Magnetic Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Laying Out the Printed Circuit Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Losses and Stresses in Switching Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Techniques to Improve Efficiency in Switching Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
The Synchronous Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Snubbers and Clamps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
The Lossless Snubber . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
The Active Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Quasi−Resonant Topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Power Factor Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Topology Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
SMPS Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
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LO
SW
Vsat
DIODE VOLTAGE
(VOLTS)
Power Power
Switch Switch
Power OFF Power OFF
Switch Switch
ON ON
TIME
Vfwd
INDUCTOR CURRENT
Ipk
(AMPS)
Iload
Imin
Its operation can be better understood when it is broken clamped when the catch diode D becomes forward
into two time periods: when the power switch is turned biased. The stored energy then continues flowing to the
on and turned off. When the power switch is turned on, output through the catch diode and the inductor. The
the input voltage is directly connected to the input of the inductor current decreases from an initial value ipk and is
L−C filter. Assuming that the converter is in a given by:
steady−state, there is the output voltage on the filter’s V t
output. The inductor current begins a linear ramp from an iL(off) + ipk * out 0 v t v toff (eq. 3)
L
initial current dictated by the remaining flux in the
The off period continues until the controller turns the
inductor. The inductor current is given by:
power switch back on and the cycle repeats itself.
(Vin * Vout) The buck converter is capable of over one kilowatt of
iL(on) + t ) iinit 0 v t v ton (eq. 2)
L output power, but is typically used for on−board regulator
During this period, energy is stored as magnetic flux applications whose output powers are less than 100 watts.
within the core of the inductor. When the power switch Compared to the flyback−mode converter, the forward
is turned off, the core contains enough energy to supply converter exhibits lower output peak−to−peak ripple
the load during the following off period plus some voltage. The disadvantage is that it is a step−down
reserve energy. topology only. Since it is not an isolated topology, for
When the power switch turns off, the voltage on the safety reasons the forward converter cannot be used for
input side of the inductor tries to fly below ground, but is input voltages greater than 42.5 VDC.
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SMPSRM
The Flyback−Mode Converter different fashion from the forward−mode converter. The
The basic flyback−mode converter uses the same most elementary flyback−mode converter, the boost or
components as the basic forward−mode converter, but in step−up converter, is shown in Figure 2.
a different configuration. Consequently, it operates in a
L
D
Cout
Vin SW Rload
Ion Ioff Iload
Vin
Vflbk
Power Power
SWITCH VOLTAGE
(Vout)
Switch Switch
ON ON
(VOLTS)
Power
Vsat Diode Switch Diode
ON ON ON
TIME
INDUCTOR CURRENT
Ipk
(AMPS)
Iload
TIME
Again, its operation is best understood by considering the the output rectifier when its voltage exceeds the output
“on” and “off” periods separately. When the power voltage. The energy within the core of the inductor is then
switch is turned on, the inductor is connected directly passed to the output capacitor. The inductor current
across the input voltage source. The inductor current then during the off period has a negative ramp whose slope is
rises from zero and is given by: given by:
V t
iL(on) + in v t v 0on (eq. 4) (Vin * Vout)
L iL(off) + (eq. 6)
L
Energy is stored within the flux in the core of the inductor.
The peak current, ipk , occurs at the instant the power The energy is then completely emptied into the output
switch is turned off and is given by: capacitor and the switched terminal of the inductor falls
Vin ton back to the level of the input voltage. Some ringing is
ipk + (eq. 5)
L evident during this time due to residual energy flowing
When the power switch turns off, the switched side of through parasitic elements such as the stray inductances
the inductor wants to fly−up in voltage, but is clamped by and capacitances in the circuit.
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SMPSRM
When there is some residual energy permitted to to a 50 percent duty cycle. There must be a time period
remain within the inductor core, the operation is called when the inductor is permitted to empty itself of its
continuous− mode. This can be seen in Figure 3. energy.
Energy for the entire on and off time periods must be The boost converter is used for board−level (i.e.,
stored within the inductor. The stored energy is defined non−isolated) step−up applications and is limited to less
by: than 100−150 watts due to high peak currents. Being a
non−isolated converter, it is limited to input voltages of
EL + 0.5L @ ipk2 (eq. 7)
less than 42.5 VDC. Replacing the inductor with a
The boost−mode inductor must store enough energy to transformer results in a flyback converter, which may be
supply the output load for the entire switching period (ton step−up or step−down. The transformer also provides
+ toff). Also, boost−mode converters are typically limited dielectric isolation from input to output.
SWITCH VOLTAGE
Vflbk
(Vout)
(VOLTS)
Vin
Power Power
Switch Diode Switch Diode
ON ON ON ON
TIME
Vsat
INDUCTOR CURRENT
Ipk
(AMPS)
TIME
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Factors 3, 4 and 5 have a direct affect upon the Cost is a major factor that enters into the topology
reliability of the system. Switching power supplies decision. There are large overlaps in the performance
deliver constant power to the output load. This power is boundaries between the topologies. Sometimes the most
then reflected back to the input, so at low input voltages, cost−effective choice is to purposely design one topology
the input current must be high to maintain the output to operate in a region that usually is performed by
power. Conversely, the higher the input voltage, the another. This, though, may affect the reliability of the
lower the input current. The design goal is to place as desired topology.
much as possible of the input voltage across the Figure 4 shows where the common topologies are used
transformer or inductor so as to minimize the input for a given level of DC input voltage and required output
current. power. Figures 5 through 12 show the common
Boost−mode topologies have peak currents that are topologies. There are more topologies than shown, such
about twice those found in forward−mode topologies. as the Sepic and the Cuk, but they are not commonly
This makes them unusable at output powers greater than used.
100−150 watts.
1000
Half−Bridge
DC INPUT VOLTAGE (V)
Flyback Full−Bridge
100
42.5
Non−Isolated Full−Bridge
10
Buck Very High
Peak Currents
10 100 1000
OUTPUT POWER (W)
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L VFWD
Power Switch VD
+ +
0 TIME
Vin
D IPK
+ Vout
Vin
Cin Cout
Control IL
Feedback
0 TIME
− − ILOAD
IMIN
VFLBK
D D
VSW VSAT ON ON
L
D SW ON
Vin Cin TIME
+ 0
Vin
Control SW +
Cout Vout IPK
IL
− ISW ID
0 TIME
+
Vin
VL 0 TIME
Control SW
D
Vin Cin − − Vout
+
L Cout Vout
− + IL
Feedback ISW ID
0 TIME
IPK
VFLBK
VSAT
SW
VSW ON
0 TIME
+ D Vin
+
+
N1 N2 Cout Vout
Cin IPRI
Vin 0 TIME
− IPK
SW
Control
ISEC
− Feedback 0 TIME
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+ LO
D
T
+
N1 N2 +
Cout Vout
Cin
Vin
−
SW
Control
− Feedback
SW
VSW ON
0 TIME
2Vin
VSAT
IPRI
0 TIME
IMIN IPK
SW1 LO
T D1
+
+
+ Cout Vout
D2
SW2
Vin −
Control
Cin
− Feedback
2Vin
Vin SW2
VSW SW1
0 TIME
VSAT
IPK
IPRI
0 TIME
IMIN
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LO
Ds +
+
Cout Vout
−
+
XFMR N2
SW1 C
T
Cin
Vin Control N1
SW2 C
−
Feedback
Vin
SW1
V in
2
SW2
VSW2 0 TIME
VSAT
IPK
IPRI
0 TIME
IMIN
−
+
XFMR N2 XFMR
SW1 SW3
T
Cin
Vin Control N1 C
SW2 SW4
Vin
SW
V in 1-4
2 SW
2-3
VSW2 0 TIME
VSAT
IPK
ISW2
0 TIME
IMIN
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Interleaved Multiphase Converters The input and output capacitors are shared among the
One method of increasing the output power of any phases. The input capacitor sees less RMS ripple current
topology and reducing the stresses upon the because the peak currents are less and the combined duty
semiconductors, is a technique called interleaving. Any cycle of the phases is greater than it would experience
topology can be interleaved. An interleaved multiphase with a single phase converter. The output capacitor can
converter has two or more identical converters placed in be made smaller because the frequency of current
parallel which share key components. For an n−phase waveform is n−times higher and its combined duty cycle
converter, each converter is driven at a phase difference is greater. The semiconductors also see less current
of 360/n degrees from the next. The output current from stress.
all the phases sum together at the output, requiring only A block diagram of an interleaved multiphase buck
Iout/n amperes from each phase. converter is shown in Figure 13. This is a 2−phase
topology that is useful in providing power to a high
performance microprocessor.
+5 V +5 V
15 VCC PVCC 21
VIN
25 GND PGND 22
HG1 2
+3.3 V
BST1 1 VOUT
PH1 24
EN 3 EN LG1 23
PSI 4 PSI
VIN
PG 16 PGOOD
NCP81172
TALT 14 TALERT#
HG2 17
VID 5 VID
BST2 18
13 TSNS PH2 19
LG2 20
8 VREF
7 REFIN FBRTN 10
6 VIDBUF FB 11
9 FS COMP 12
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Voltage−mode control (see Figure 14) is typically used instantly cutoff if its limits are exceeded. This offers
for forward−mode topologies. In voltage−mode control, better protection to the power switch.
only the output voltage is monitored. A voltage error Current−mode control (see Figure 15) is typically used
signal is calculated by forming the difference between with boost−mode converters. Current−mode control
Vout (actual) and Vout(desired). This error signal is then monitors not only the output voltage, but also the output
fed into a comparator that compares it to the ramp voltage current. Here the voltage error signal is used to control
generated by the internal oscillator section of the control the peak current within the magnetic elements during
IC. The comparator thus converts the voltage error signal each power switch on−time. Current−mode control has a
very rapid input and output response time, and has an
into the PWM drive signal to the power switch. Since the
inherent overcurrent protection. It is not commonly used
only control parameter is the output voltage, and there is
for forward−mode converters; their current waveforms
inherent delay through the power circuit, voltage−mode
have much lower slopes in their current waveforms
control tends to respond slowly to input variations. which can create jitter within comparators.
Overcurrent protection for a voltage−mode controlled Hysteretic control is a method of control which tries to
converter can either be based on the average output keep a monitored parameter between two limits. There
current or use a pulse−by−pulse method. In average are hysteretic current and voltage control methods, but
overcurrent protection, the DC output current is they are not commonly used.
monitored, and if a threshold is exceeded, the pulse width The designer should be very careful when reviewing a
of the power switch is reduced. In pulse−by−pulse prospective control IC data sheet. The method of control
overcurrent protection, the peak current of each power and any variations are usually not clearly described on
switch “on” cycle is monitored and the power switch is the first page of the data sheet.
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VCC
OSC Charge
Clock Ramp
Verror
Discharge
Ct
Volt
Verror Amp. Output
Comp. Gating
VFB Logic
− +
+ −
+ Pulsewidth
Vref Comparator
− Steering
Average
Overcurrent
Protection
Cur.
Comp. Current Amp.
−
Iout (lavOC) +
RCS Pulse−by−Pulse
or + Overcurrent
ISW (P−POC) VOC Protection
−
VSS
VCC
OSC
−
+
Ct Discharge
Output
Gating
Logic
Volt S
Comp. Verror Amp. Q Output
VFB −
Verror R
+
+
Vref
− Current
Comparator S R S
−
+
Ipk
VSS
ISW
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The Choice of Semiconductors One should generate a gate drive voltage that is as close
Power Switches to 0.7 volts as possible. This is to minimize any loss
The choice of which semiconductor technology to use created by dropping the base drive voltage at the required
for the power switch function is influenced by many base current to the level exhibited by the base.
factors such as cost, peak voltage and current, frequency A second consideration is the storage time exhibited by
of operation, and heatsinking. Each technology has its the collector during its turn−off transition. When the base
own peculiarities that must be addressed during the is overdriven, or where the base current is more than
design phase. needed to sustain the collector current, the collector
There are three major power switch choices: the exhibits a 0.3−2 ms delay in its turn−off which is
bipolar junction transistor (BJT), the power MOSFET, proportional to the base overdrive. Although the storage
and the integrated gate bipolar transistor (IGBT). The time is not a major source of loss, it does significantly
BJT was the first power switch to be used in this field and limit the maximum switching frequency of a
still offers many cost advantages over the others. It is also bipolar−based switching power supply. There are two
still used for very low cost or in high power switching methods of reducing the storage time and increasing its
converters. The maximum frequency of operation of switching time. The first is to use a base speed−up
bipolar transistors is less than 80−100 kHz because of capacitor whose value, typically around 100 pF, is placed
some of their switching characteristics. The IGBT is used in parallel with the base current limiting resistor
for high power switching converters, displacing many of (Figure 16a). The second is to use proportional base drive
the BJT applications. They too, though, have a slower (Figure 16b). Here, only the amount of needed base
switching characteristic which limits their frequency of current is provided by the drive circuit by bleeding the
operation to below 30 kHz typically although some can excess around the base into the collector.
reach 100 kHz. IGBTs have smaller die areas than power The last consideration with BJTs is the risk of
MOSFETs of the same ratings, which typically means a excessive second breakdown. This phenomenon is
lower cost. Power MOSFETs are used in the majority of caused by the resistance of the base across the die,
applications due to their ease of use and their higher permitting the furthest portions of the collector to turn off
frequency capabilities. Each of the technologies will be later. This forces the current being forced through the
reviewed. collector by an inductive load, to concentrate at the
The Bipolar Power Transistor opposite ends of the die, thus causing an excessive
The BJT is a current driven device. That means that the localized heating on the die. This can result in a
base current is in proportion to the current drawn through short−circuit failure of the BJT which can happen
the collector. So one must provide: instantaneously if the amount of current crowding is
great, or it can happen later if the amount of heating is
IB u ICń hFE (eq. 8)
less. Current crowding is always present when an
In power transistors, the average gain (hFE) exhibited at inductive load is attached to the collector. By switching
the higher collector currents is between 5 and 20. This the BJT faster, with the circuits in Figure 15, one can
could create a large base drive loss if the base drive circuit greatly reduce the effects of second breakdown on the
is not properly designed. reliability of the device.
VBB VBB
100 pF +
Control IC VCE
+
−
VBE
100 pF −
Power Ground
(a) Fixed Base Drive Circuit (b) Proportional Base Drive Circuit (Baker Clamp)
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The Power MOSFET From the gate terminal, there are two capacitances the
Power MOSFETs are the popular choices used as designer encounters, the gate input capacitance (Ciss) and
power switches and synchronous rectifiers. They are, on the drain−gate reverse capacitance (Crss). The gate input
the surface, simpler to use than BJTs, but they have some capacitance is a fixed value caused by the capacitance
hidden complexities. formed between the gate metalization and the substrate.
A simplified model for a MOSFET can be seen in Its value usually falls in the range of 800−3200 pF,
Figure 17. The capacitances seen in the model are depending upon the physical construction of the
specified within the MOSFET data sheets, but can be MOSFET. The Crss is the capacitance between the drain
nonlinear and vary with their applied voltages. and the gate, and has values in the range of 60−150 pF.
Although the Crss is smaller, it has a much more
pronounced effect upon the gate drive. It couples the
drain voltage to the gate, thus dumping its stored charge
into the gate input capacitance. The typical gate drive
waveforms can be seen in Figure 18. Time period t1 is
only the Ciss being charged or discharged by the
CDG
impedance of the external gate drive circuit. Period t2
Coss shows the effect of the changing drain voltage being
CGS coupled into the gate through Crss. One can readily
observe the “flattening” of the gate drive voltage during
this period, both during the turn−on and turn−off of the
MOSFET. Time period t3 is the amount of overdrive
Figure 17. The MOSFET Model voltage provided by the drive circuit but not really
needed by the MOSFET.
VDR
TURN− TURN−OFF
ON
t3 t3
t1 t2 t2 t1
VGS Vpl
Vth
0
VDS
IG
+
0
−
Figure 18. Typical MOSFET Drive Waveforms (Top: VGS, Middle: VDG, Bottom: IG)
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The time needed to switch the MOSFET between on Driving MOSFETs in Switching
and off states is dependent upon the impedance of the Power Supply Applications
gate drive circuit. It is very important that the drive circuit There are three things that are very important in the
be bypassed with a capacitor that will keep the drive high frequency driving of MOSFETs: there must be a
voltage constant over the drive period. A 0.1 mF capacitor totem−pole driver; the drive voltage source must be well
is more than sufficient. bypassed; and the drive devices must be able to source
high levels of current in very short periods of time (low
compliance). The optimal drive circuit is shown in
Figure 19.
VG VG
LOAD LOAD
Ron
Roff
VG VG
LOAD LOAD
Figure 19. Bipolar and FET−Based Drive Circuits (a. Bipolar Drivers, b. MOSFET Drivers)
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Sometimes it is necessary to provide a circuit. Both of the series capacitors must be more than
dielectrically−isolated drive to a MOSFET. This is 10 times the value of the Ciss of the MOSFET so that the
provided by a drive transformer. Transformers driven capacitive voltage divider that is formed by the series
from a DC source must be capacitively coupled from the capacitors does not cause an excessive attenuation. The
totem−pole driver circuit. The secondary winding must circuit can be seen in Figure 20.
be capacitively coupled to the gate with a DC restoration
C RG
T
VG
1k
C
1:1
C > 10
Ciss
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a high reverse leakage current. For a typical switching The characteristics of power rectifiers and their
power supply application, the best choice is usually a applications in switching power supplies are covered in
Schottky rectifier for output voltages less than 12 V, and great detail in Reference (5).
an ultra−fast recovery diode for all other output voltages. The major losses within output rectifiers are
The major losses within output rectifiers are conduction losses and switching losses. The conduction
conduction losses and switching losses. The conduction loss is the forward voltage drop times the current flowing
loss is the forward voltage drop times the current flowing through it during its conduction period. This can be
through it during its conduction period. This can be significant if its voltage drop and current are high. The
significant if its voltage drop and current are high. The switching losses are determined by how fast a diode turns
switching losses are determined by how fast a diode turns off (trr) times the reverse voltage across the rectifier. This
off (trr) times the reverse voltage across the rectifier. This can be significant for high output voltages and currents.
can be significant for high output voltages and currents.
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Within all switching power supplies, there are four rectifier to the output filter capacitor and back to the
major current loops. Two of the loops conduct the inductor or winding. The filter capacitors are the only
high−level AC currents needed by the supply. These are components that can source and sink the large levels of
the power switch AC current loop and the output rectifier AC current in the time needed by the switching power
AC current loop. The currents are the typical trapezoidal supply. The PCB traces should be made as wide and as
current pulses with very high peak currents and very short as possible, to minimize resistive and inductive
rapid di/dts. The other two current loops are the input effects. These traces should be the first to be laid out.
source and the output load current loops, which carry low Turning to the input source and output load current
frequency current being supplied from the voltage source loops, both of these loops must be connected directly to
and to the load respectively. their respective filter capacitor’s terminals, otherwise
For the power switch AC current loop, current flows switching noise could bypass the filtering action of the
from the input filter capacitor through the inductor or capacitor and escape into the environment. This noise is
transformer winding, through the power switch and back called conducted interference. These loops can be seen
to the negative pin of the input capacitor. Similarly, the in Figure 21 for the two major forms of switching
output rectifier current loop’s current flows from the power supplies, non−isolated (Figure 21a) and
inductor or secondary transformer winding, through the transformer−isolated (Figure 21b).
Power Switch Output Rectifier
Current Loop L Current Loop
SW Vout
Input Current
Loop
Output Load
Current Loop
+ VFB
Vin Control
Cin Cout
−
Analog GND C
A B
Input Source Power Output Rectifier Output Load
Ground Switch Ground Ground Ground
Join Join Join
VFB
Cout
SW
+
Vin Cin Control
− B
Output Rectifier Output Load
Ground Ground
RCS
Analog Join
GND
FB
C Join
A
Input Source Power Switch Ground
Ground
Join (b) The Transformer−Isolated Converter
Figure 21. The Current Loops and Grounds for the Major Converter Topologies
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The grounds are extremely important to the proper The last important factor in the PCB design is the
operation of the switching power supply, since they form layout surrounding the AC voltage nodes. These are the
the reference connections for the entire supply; each drain of the power MOSFET (or collector of a BJT) and
ground has its own unique set of signals which can the anode of the output rectifier(s). These nodes can
adversely affect the operation of the supply if connected capacitively couple into any trace on different layers of
improperly. the PCB that run underneath the AC pad. In surface
There are five distinct grounds within the typical mount designs, these nodes also need to be large enough
switching power supply. Four of them form the return to provide heatsinking for the power switch or rectifier.
paths for the current loops described above. The This is at odds with the desire to keep the pad as small as
remaining ground is the low−level analog control ground possible to discourage capacitive coupling to other
which is critical for the proper operation of the supply. traces. One good compromise is to make all layers below
The grounds which are part of the major current loops the AC node identical to the AC node and connect them
must be connected together exactly as shown in with many vias (plated−through holes). This greatly
Figure 21. Here again, the connecting point between the
increases the thermal mass of the pad for improved
high−level AC grounds and the input or output grounds
heatsinking and locates any surrounding traces off
is at the negative terminal of the appropriate filter
laterally where the coupling capacitance is much smaller.
capacitor (points A and B in Figures 21a and 21b). Noise
An example of this can be seen in Figure 22.
on the AC grounds can very easily escape into the
Many times it is necessary to parallel filter capacitors
environment if the grounds are not directly connected to
the negative terminal of the filter capacitor(s). The to reduce the amount of RMS ripple current each
analog control ground must be connected to the point capacitor experiences. Close attention should be paid to
where the control IC and associated circuitry must this layout. If the paralleled capacitors are in a line, the
measure key power parameters, such as AC or DC capacitor closest to the source of the ripple current will
current and the output voltage (point C in Figures 21a and operate hotter than the others, shortening its operating
21b). Here any noise introduced by large AC signals life; the others will not see this level of AC current. To
within the AC grounds will sum directly onto the ensure that they will evenly share the ripple current,
low−level control parameters and greatly affect the ideally, any paralleled capacitors should be laid out in a
operation of the supply. The purpose of connecting the radially−symmetric manner around the current source,
control ground to the lower side of the current sensing typically a rectifier or power switch.
resistor or the output voltage resistor divider is to form a The PCB layout, if not done properly, can ruin a good
“Kelvin contact” where any common mode noise is not paper design. It is important to follow these basic
sensed by the control circuit. In short, follow the example guidelines and monitor the layout every step of the
given by Figure 21 exactly as shown for best results. process.
Power Device
ÉÉÂÂÂÂÂÂÂÂÂÂÂÉÉ ÉÉ ÉÉ
ÉÉÂÂÂÂÂÂÂÂÂÂÂÉÉ ÉÉ ÉÉ
Plated−Thru Hole PCB Bottom
Figure 22. Method for Minimizing AC Capacitive Coupling and Enhancing Heatsinking
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Losses and Stresses in Switching the circuitry, and some are controlled by simply selecting
Power Supplies a different part. Identifying the major sources for loss can
Much of the designer’s time during a switching power be as easy as placing a finger on each of the components
supply design is spent in identifying and minimizing the in search of heat, or measuring the currents and voltages
losses within the supply. Most of the losses occur in the associated with each power component using an
power components within the switching power supply. oscilloscope, AC current probe and voltage probe.
Some of these losses can also present stresses to the Semiconductor losses fall into two categories:
power semiconductors which may affect the long term conduction losses and switching losses. The conduction
reliability of the power supply, so knowing where they loss is the product of the terminal voltage and current
arise and how to control them is important. during the power device’s on period. Examples of
Whenever there is a simultaneous voltage drop across conduction losses are the saturation voltage of a bipolar
a component with a current flowing through, there is a power transistor and the “on” loss of a power MOSFET
loss. Some of these losses are controllable by modifying shown in Figure 23 and Figure 24 respectively.
VPEAK
DRAIN-TO-SOURCE VOLTAGE
VPEAK
COLLECTOR-TO-EMITTER
(VOLTS)
(VOLTS)
SATURATION FALL
VOLTAGE TIME ON VOLTAGE
RISE DYNAMIC STORAGE RISE FALL
TIME SATURATION TIME TIME TIME
CLEARING IPEAK
CLEARING RECTIFIERS
IPEAK
COLLECTOR CURRENT
RECTIFIERS
DRAIN CURRENT
CHARACTERISTICS OF THE
CHARACTERISTICS OF THE TRANSFORMER
TRANSFORMER
SATURATION ON CURRENT
CURRENT TURN-ON TURN-OFF
TURN-ON TURN-OFF CURRENT
CURRENT CURRENT TAIL CURRENT CURRENT
CURRENT
CROWDING
SECOND
INSTANTANEOUS ENERGY
PERIOD
INSTANTANEOUS ENERGY
BREAKDOWN
PERIOD
LOSS (JOULES)
LOSS (JOULES)
ON LOSS
SATURATION
LOSS
TURN-ON TURN-OFF LOSS TURN-ON TURN-OFF LOSS
LOSS SWITCHING LOSS LOSS SWITCHING LOSS
Figure 23. Stresses and Losses Figure 24. Stresses and Losses
within a Bipolar Power Transistor within a Power MOSFET
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The forward conduction loss of a rectifier is shown in creates a very large V−I product which is as significant as
Figure 25. During turn−off, the rectifier exhibits a reverse the conduction losses. Switching losses are also the major
recovery loss where minority carriers trapped within the frequency dependent loss within every PWM switching
P−N junction must reverse their direction and exit the power supply.
junction after a reverse voltage is applied. This results in The loss−induced heat generation causes stress within
what appears to be a current flowing in reverse through the power component. This can be minimized by an
the diode with a high reverse terminal voltage. effective thermal design. For bipolar power transistors,
The switching loss is the instantaneous product of the however, excessive switching losses can also provide a
terminal voltage and current of a power device when it is lethal stress to the transistor in the form of second
transitioning between operating states (on−to−off and breakdown and current crowding failures. Care should be
off−to−on). Here, voltages are transitional between taken in the careful analysis of each transistor’s Forward
full−on and cutoff states while simultaneously the current Biased−Safe Operating Area (FBSOA) and Reverse
is transitional between full−on and cut−off states. This Biased−Safe Operating Area (RBSOA) operation.
DIODE VOLTAGE
FORWARD VOLTAGE
(VOLTS)
REVERSE VOLTAGE
IPK
DIODE CURRENT
(AMPS)
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the MOSFET should be placed in parallel with the typical switching power supply.
synchronous MOSFET. The MOSFET does contain a The synchronous rectifier can be driven either actively,
parasitic body diode that could conduct current, but it is that is directly controlled from the control IC, or
lossy, slow to turn off, and can lower efficiency by 1% to passively, driven from other signals within the power
2%. The lower turn−on voltage of the Schottky prevents circuit. It is very important to provide a non−overlapping
the parasitic diode from ever conducting and exhibiting drive between the power switch(es) and the synchronous
its poor reverse recovery characteristic. rectifier(s) to prevent any shoot−through currents. This
Using synchronous rectification, the conduction dead time is usually between 50 to 100 ns. Some typical
voltage can be reduced from 400 mV to 100 mV or less. circuits can be seen in Figure 26.
An improvement of 1−5 percent can be expected for the
Vin + Vout
SW
Drive
GND
Direct
SR
C RG
VG
C D 1k
1:1
C > 10 Ciss
Transformer−Isolated
LO
+ Vout
Primary
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Snubbers and Clamps Therefore it is not very useful for reducing RFI. It is
Snubbers and clamps are used for two very different useful for preventing components such as
purposes. When misapplied, the reliability of the semiconductors and capacitors from entering avalanche
semiconductors within the power supply is greatly breakdown.
jeopardized. Bipolar power transistors suffer from current crowding
A snubber is used to reduce the level of a voltage spike which is an instantaneous failure mode. If a voltage spike
and decrease the rate of change of a voltage waveform. occurs during the turn−off voltage transition of greater
This then reduces the amount of overlap of the voltage than 75 percent of its VCEO rating, it may have too much
and current waveforms during a transition, thus reducing current crowding stress. Here both the rate of change of
the switching loss. This has its benefits in the Safe the voltage and the peak voltage of the spike must be
Operating Area (SOA) of the semiconductors, and it controlled. A snubber is needed to bring the transistor
reduces emissions by lowering the spectral content of any within its RBSOA (Reverse Bias Safe Operating Area)
RFI. rating. Typical snubber and clamp circuits are shown in
A clamp is used only for reducing the level of a voltage Figure 27. The effects that these have on a representative
spike. It has no affect on the dV/dt of the transition. switching waveform are shown in Figure 28.
Figure 27. Common Methods for Controlling Voltage Spikes and/or RFI
CLAMP
SNUBBER
VOLTAGE (VOLTS)
ORIGINAL
WAVEFORM
t, TIME (μsec)
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Unsnubbed VSW
+ Snubbed VSW
VSW ID
Figure 29. Lossless Snubber for a One Transistor Forward or Flyback Converter
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The Active Clamp stored energy) just prior to the turn−off transition. It is
An active clamp is a gated MOSFET circuit that allows then disabled during the negative transition.
the controller IC to activate a clamp or a snubber circuit Obviously, the implementation of an active clamp is
at a particular moment in a switching power supply’s more expensive than other approaches, and is usually
cycle of operation. An active clamp for a flyback reserved for very compact power supplies where heat is
converter is shown in Figure 30. a critical issue.
In Figure 30, the active clamp is reset (or emptied of its
Unclamped
Switch Voltage
(VSW)
Clamped Switch
Voltage (VSW)
Vin
Switch
Current (ISW)
+
VDR ICL
− +
ISW VSW
Drive
− Voltage (VDR)
GND
Discharge Charge
Clamp
Current (ICL)
Figure 30. An Active Clamp Used in a One Transistor Forward or a Flyback Converter
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ILR
LR LO
CR D
Vin VSW Vout
Cin Cout
CONTROL
FEEDBACK
SWITCH
TURN-OFF
Vin
V SW
POWER SWITCH
ON
IPK
I LR
VD
Figure 31. Schematic and Waveforms for a ZCS Quasi-Resonant Buck Converter
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In this design, both the power switch and the catch power delivered to the load, the amount of “resonant off
diode operate in a zero current switching mode. Power is times” are varied. For light loads, the frequency is high.
passed to the output during the resonant periods. So to When the load is heavy, the frequency drops. In a typical
increase the power delivered to the load, the frequency ZVS power supply, the frequency typically varies 4:1
would increase, and vice versa for decreasing loads. In over the entire operating range of the supply.
typical designs the frequency can change 10:1 over the There are other variations on the resonant theme that
ZCS supply’s operating range. promote zero switching losses, such as full resonant
The ZVS is a fixed off−time, variable on−time method PWM, full and half−bridge topologies for higher power
control. Here the initial condition occurs when the power and resonant transition topologies. For a more detailed
switch is on, and the familiar current ramp is flowing treatment, see Chapter 4 in the “Power Supply
through the filter inductor. The ZVS quasi−resonant buck Cookbook” (Bibliography reference 3).
converter is shown in Figure 32. Here, to control the
LR LO
CR D
Vin VI/P Vout
Cin FEEDBACK Cout
CONTROL
Vin
V I/P
POWER SWITCH
TURNS ON
0
V *V
in out
IPK L )L
R O
I SW
V
in
L
R ILOAD
0
ID
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Power
not used
VOLTAGE
Power used
I
110/220
+
AC VOLTS IN
DC To Power
Clarge
Supply
−
CURRENT
IAV
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A Power Factor Correction (PFC) circuit is a switching pulses generate more heat than a purely resistive load of
power converter, essentially a boost converter with a very the same power. The active power factor correction
wide input range, that precisely controls its input current circuit is placed just following the AC rectifier bridge. An
on an instantaneous basis to match the waveshape and example can be seen in Figure 34.
phase of the input voltage. This represents a zero degrees Depending upon how much power is drawn by the unit,
or 100 percent power factor and mimics a purely resistive there is a choice of three different common control
load. The amplitude of the input current waveform is modes. All of the schematics for the power sections are
varied over longer time frames to maintain a constant the same, but the value of the PFC inductor and the
voltage at the converter’s output filter capacitor. This control method are different. For input currents of less
mimics a resistor which slowly changes value to absorb than 150 watts, a discontinuous−mode control scheme is
the correct amount of power to meet the demand of the typically used, in which the PFC core is completely
load. Short term energy excesses and deficits caused by emptied prior to the next power switch conduction cycle.
sudden changes in the load are supplemented by a ”bulk For powers between 150 and 250 watts, the critical
energy storage capacitor”, the boost converter’s output conduction mode is recommended. This is a method of
filter device. The PFC input filter capacitor is reduced to control where the control IC senses just when the PFC
a few microfarads, thus placing a half−wave haversine core is emptied of its energy and the next power switch
waveshape into the PFC converter. conduction cycle is immediately begun; this eliminates
The PFC boost converter can operate down to about any dead time exhibited in the discontinuous−mode of
30 V before there is insufficient voltage to draw any more control. For an input power greater than 250 watts, the
significant power from its input. The converter then can continuous−mode of control is recommended. Here the
begin again when the input haversine reaches 30 V on the peak currents can be lowered by the use of a larger
next half−wave haversine. This greatly increases the inductor, but a troublesome reverse recovery
conduction angle of the input rectifiers. The drop−out characteristic of the output rectifier is encountered,
region of the PFC converter is then filtered (smoothed) which can add an additional 20−40 percent in losses to the
by the input EMI filter. PFC circuit.
A PFC circuit not only ensures that no power is Many countries cooperate in the coordination of their
reflected back to the source, it also eliminates the power factor requirements. The most appropriate
high current pulses associated with conventional document is IEC61000−3−2, which encompasses the
rectifier−filter input circuits. Because heat lost in the performance of generalized electronic products. There
transmission line and adjacent circuits is proportional to are more detailed specifications for particular products
the square of the current in the line, short strong current made for special markets.
Switch Current
Input Voltage I
Vout
Vsense
Csmall +
Control Clarge To Power
Supply
−
Conduction Angle
IAVG
Current
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Bibliography
1. ON Semiconductor, Power Factor Correction (PFC) Handbook, HBD853/D, 2012.
2. Ben−Yaakov Sam, Gregory Ivensky, “Passive Lossless Snubbers for High Frequency PWM Converters,”
Seminar 12, APEC 99.
3. Brown, Marty, Power Supply Cookbook, Butterworth−Heinemann, 1994, 2001.
4. Brown, Marty, “Laying Out PC Boards for Embedded Switching Supplies,” Electronic Design, Dec. 1999.
5. Martin, Robert F., “Harmonic Currents,” Compliance Engineering − 1999 Annual Resources Guide, Cannon
Communications, LLC, pp. 103−107.
6. Christophe Basso, Switch−Mode Power Supplies, SPICE Simulations and Practical Designs, McGraw−Hill,
2008, ISBN 978−0−07−150859−9.
7. Christophe Basso, Designing Control Loops for Linear and Switching Power Supplies: A Tutorial Guide,
Artech House, 2012, ISBN 978−1−60807−557−7.
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Topology Overview
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Page
Some of these circuits may have a more complete application note, spice model information or even an evaluation board
available. Consult ON Semiconductor’s website (www.onsemi.com) or local sales office for more information.
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Start−up Ultrafast
Rectifier +
Switch
Rectifier
Load
+ Bulk
Storage
Capacitor
PWM MOSFET
Control
AC IC n−outputs
Line Prog.
Prec.
PWM Switcher Ref
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Start−up Ultrafast
Rectifier +
Switch
Rectifier
Load
+ Bulk
Storage
Capacitor
PWM MOSFET
Control
AC IC n−outputs
Line Prog.
Prec.
PWM Switcher Ref
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R18
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The NCP1607 is a voltage mode power factor correction controller designed to drive cost−effective converters to meet
input line harmonic regulations. The device operates in Critical Conduction Mode (CRM) for optimal performance in
applications up to about 300 W. Its voltage mode scheme enables it to obtain unity power factor without the need for a
line sensing network. The output voltage is accurately controlled with a built in high precision error amplifier. The
controller also implements a comprehensive array of safety features for robust designs.
RSTART1 RSTART2
J3
LBOOST DBOOST NTC
t
BRIDGE
R1 C3 D1
+
F1 L1 RCTUP1
DVCC RO1A
DAUX +
~
CIN CVCC
J2 L2
RZCD RO1B
−
C1 C2 RCTUP2
CBULK
J1 +
U1
CCOMP NCP1607 CVCC2
DDRV
1 FB Vcc 8
RCOMP1 Q1
2 CTRL DRV 7
CCOMP1 3 Ct GND 6 RDRV
ROUT2B
ROUT2A
4 CS ZCD 5
RCT
RCS RS1
RS2
CT2 CT1 CCS CZCD RS3
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120 W High Efficiency, High Voltage, Active X2, <30 mW No Load PFC
The NCP1615 is a high voltage PFC controller designed to drive PFC boost stages based on an innovative Current
Controlled Frequency Foldback (CCFF) method. In this mode, the circuit classically operates in critical conduction
mode (CrM) when the inductor current exceeds a programmable value. CCFF maximizes the efficiency at both nominal
and light load. In particular, the standby losses are reduced to a minimum. An innovative circuitry allows near unity
power factor even when the switching frequency is reduced.
The integrated high voltage startup circuit eliminates the need for external startup components and consumes
negligible power during normal operation. Housed in a SOIC−16 package, the NCP1615C also incorporates the features
necessary for robust and compact PFC stages, with few external components.
D4
VIN 21
1N5406
L3
D5 RT1
200 uH 21 1
A
J2
+
470 nF
15
C5
MUR550
100 uF/450 V
C2 2
B * Q1
C6
681k
IPA50R250 22
R21
VAUX
21
220 nF/X2 R10 D6 R11
1 1 2
DRV PPCOK
R26
1k
14 R9
3 3
1
1.8Meg
Q2 1
1
100 pF 10k
2
R4
R22
MMSD4148
23 3
R24
D3
1k
1k
80 m / 3 W
R3 R6
2
STDBY
1
R8
1.8Meg
150 uH
3
L1
R23
1k N/A
4.7k
R25
R5
R7 Q3 STBY
1
C1 1
MRA4007
MRA4007
D1
D2
1k
4.7k 2 R27
100 nF/X2
12
12
PFCOK
R1 R2 HV 1k
VCC HV
N/AN /A
0.1 uF
N/A
C15
R20
16 1
HV HVFB
2
470 V FB
26 V
ZD1
10 3
PFCOK RESTART
21
RV1
11 4
C4 CS/ZCD FOVP/BUV
7 8
R17
1nF/Y2 FAULT STDBY STDBY D8
0
5 14
VCC 1 2
VCONTROL VCC EXT_VCC
C3
F1
3A
6 FFCONTROL 13 MMSD4148
1
MMSD4148
DRV DRV
27k
R12
C14
R13 220 nF
220 nF
1nF
1nF/Y2 9 12
D7
PSTIMER GND
C9
220 uF/50 V
220k
C8
C13 R16
RT2
21 C12
2
220 nF
33 V
ZD2
10 uF
270k
C10
PSM VAUX
2.2 uF
C11
27k
21
R18
1
3
2
C7
10 nF 27
4.99 Meg
120k
R14
22 V
J1
ZD3
R15
21
J3 J4
TP1 TP3 TP2 TP4
EXT_VCC PFCOK VIN PSM STBY HV
1 1 HV
PFCOK Vin STBY
2 2
Ext. VCC Ext. VCC
Figure 41. 120 W High Efficiency, High Voltage, Active X2, <30 mW No Load PFC
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TB2
1 2
390 V
C4 TB3
180 μF, 450 V
+
D1 MSR860G 1 2
SPP20N60S5
Q1 +15 V C8
+
R1 1.8 M R4 1N4148
C9 22 μF
10 k D2
C10
0.1 F
R2 1.8 M R5 10
100 pF
R3
23.2 k
2.2 μF
Vcontrol
VCC R12 C12
DRV
12 k C5
FB
5
8 7 6 5 220 nF
NCP1654
L1 650 μH R6 0.1
IC1
1 2 3 4
GND
CS
BO
VM
2 R8
R7 47 k
3.6 k 1 nF C6
0.47 μF
*
DB1
C2
0.47 μF
L2 2 x 6.8 mH
L3 150 μH
C1
0.47 μF
5 A Fuse
F1
1 2 3
L N Figure 42. 120 W High Efficiency, High Voltage, Active X2,
AC Inlet TB1
<30 mW No Load PFC
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The NCP1072 / NCP1075 products integrate a fixed frequency current mode controller with a 700 V MOSFET.
Available in a PDIP−7 or SOT−223 package, the NCP1072/5 offer a high level of integration, including soft−start,
frequency−jittering, short−circuit protection, skip−cycle, a maximum peak current set point, ramp compensation, and
a Dynamic Self−Supply (eliminating the need for an auxiliary winding).
F1
1.5 A L1A
T1
J1 1 mH D1− D4 R3 C4
R2A 68 K 1 nF
C1 C2 3.3 M MRA4007
AC 0.1 uF x4 C3 1/2 W 1 kV
0.1 uF 22 uF
Input “X” “X” 1N4937 D5
R2B 400 V
MBRS260T3
L1B 3.3 M U1
D7 C10 C9A C9B C11 J2
R1 1 mH R16 0.1 uF Vout
4.7 0.1 3K 50 V
NCP1075 50 V
3W (100 kHz)
Primary R4 R5 1000 uF, 16 V
Ground 1K D6 10
Plane
C5 C6 MMSD4148A
22 uF 4.7 uF R6 R8
25 V 50 V 1K R10 82.5 K
C8 21.5 K
NOTES: C7
1 nF R7
1 nF 20 K C12
1. Crossed schematic lines are not connected. “Y1” 0.1
2. R4 value dependent on aux winding turns. U2
U3
3. R1 is optional inrush limiting resistor. NCP431
4. U1 tab (pin 4) and D7 should have heatsinking clad pours.
R9
5. Heavy lines indicate recommended ground plane areas. 21.5 K
6. L1A/L1B are Wurth 7447728102
7. U2 is Vishay SFH6156A-4 optocoupler or similar.
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The NCP1129 switcher offers everything needed to build reliable and compact AC−DC switching power supplies
with minimal surrounding elements. Incorporating an avalanche rated 650 V MOSFET, converters built with the
NCP112X can be safely designed for international conditions without jeopardizing the overall reliability. The NCP112X
implements peak current mode control with adjustable ramp compensation that ensures stability in Continuous
Conduction Mode (CCM) operation. With an external resistor, the maximum peak current is adjustable, allowing the
designer the ability to inject ramp compensation to stabilize CCM power supplies.
R2
F1 5.6 K
2A
250 Vac
T1
L1A D1− D4 R8 C4 C10 R13
J1 R4 C2 1 nF 33
820 uH 0.1 uF MRA4007 R7 47 K 10 nF
C1 1M C3 3M
AC 0.1 uF “X2” x4 1W 1 kV
Input 0.5 W 47 uF 0.5 W D8
“X2” L1B 400 V U1 1N4937 D5
R5 (TO−220)
820 uH 1 M NU
FB D
C9A C9B C9C C11 J2
R1 VCC NCP1129 C14 0.1 uF Vout
4.7 W 0.1 50 V
R3 Is GND
3W
5.6 K
S 1000 uF, 16 V
R10
Z1 2.4 K
R6 C5 C13
5.6 K 25 V C6 4.7 uF
1 nF C7
100 pF R9A/B 1 nF
0.5 W “Y1”
C6 1 Ohm x 2
R11 4.7 uF R12 R14 R17
0 Ohms 50 V D7 2.0 1K R16 39 K
20 K
D6 1N4937 R15
15 K C12
MMSD4148A 0.1
U2 U3
NCP431
R18
10 K
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The NCP1236 is a new fixed−frequency current−mode controller featuring Dynamic Self−Supply (DSS). This device
is pin−to−pin compatible with the previous NCP12xx families. The DSS function greatly simplifies the design of the
auxiliary supply and the VCC capacitor by activating the internal startup current source to supply the controller during
transients. Due to frequency foldback, the controller exhibits excellent efficiency in light load condition while still
achieving very low standby power consumption. Internal frequency jittering, ramp compensation, and a versatile latch
input make this controller an excellent candidate for converters where components cost is the key constraints.
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The NCP1255 is a highly integrated PWM controller capable of delivering a rugged and high performance offline
power supply in a SOIC−8 package. With a supply range up to 35 V, the controller hosts a jittered 65−kHz switching
circuitry operated in peak current mode control.
The controller architecture is arranged to authorize a transient peak power excursion when the peak current hits the
limit. At this point, the switching frequency is increased from 65 kHz to 130 kHz until the peak requirement disappears.
The timer duration is then modulated as the converter crosses a peak power excursion mode (long) or undergoes a short
circuit (short).
R18 C11
80 680p
12 30 24
D6
P6KE220
32 V
D2
aux. C1
M URD530
2 5 19
33nF
200 V 6 7,8
.
+
.
R13 16
C2
R3
10 . 680uF
1k
R12 1 11,12
44
IC4 0
KBU406 D3
R19 R20 R14 C13
0V
IN
1N4937
820k 390k 2.2M eg 47uF 21
34 27 33
1 26 D1
31
2 x 27 mH D4 M UR160
L1
C7 1 8
C12 X2
100uF
470n 7
2 13
Q1
R9ab c R35a bc 3 6 5 ST P7Nk80ZFP 15
1M eg 1M eg C8
4 5 U2A R1 R17
17 14 100p
3 x3 30 k 3 x3 30 k R6 1 kV S FH−6 1 5 A 2.2k 118k
22
F1 C15 Q2 3
Y1
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AC1 AC2
−
FB VCC
COMP DRV
MULT GND
CS ZCD
4 1
3 2
BO VBOOT
CTIMER HB
DISCH MUPP
FMAX
RT VCC
4 3 DT GND
FB MLOW
SKIP/DIS OLP
1 2
4 3
4 1
3 2
1 2
P$4
P$5
P$1
P$3
P$8
P$2
P$4
P$5
P$1
P$3
4 1
3 2
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10k MMSZ5236
R49 MIN_TOFF U5
20
1 VCC DRV 8
2
D18
MMSD103T1
D3
1 2 MIN_TOFF GND 7 MMSD103T1
1
R28
2 1 D12
20
3 MIN_TONCOMP 6
1N5406 VBULK 2
D4 4 TRIG/DIS CS 5
L3 RT2
15k
15k
F1 11 1 2 1 4 TX1 7 1u 0.22u NCP4304
10
12
3
300u 15
CY1 D16 R44 R45 C25 C22 R50
R29
R30
3A 1000p L4 MUR550 C3
J1 100k 100k 10k
MOV1 21 M1 C5 1 M3
CX1
2
2 ~A 1 82u
1 0.1u + 8 2 J2
S10K300 L1 L2 C1 C2 9 5 6800p 6 8
CX2 1 R43 3 9
4 R42
3 0.1u 0.22u 0.22u 100k 3 2
2
100k
MMSD4148
8.06k
1
D15 47n
1000p 10k 1000u 1000u
1
GBU406 D7 10
R17
47.5
500u 11 267
TBD VOUTA
2
D6 118k MBR5H100MFS
4.75
2 C6
MMSD4148 1
1
R35
2
M2 R33 D19
8.06k 0.5 0.5 0.5 0.5 100p R31 200k
MMSD4148
453k MMSD4148
2
1
R12 C23 0
2 D8 3
MRA4007
0.47u
2
1
D1 R40
R10
90.9k
8.25
C30 10u 0
R11
22n
1
1
FBC
R52 5
1.62 MEG ON/OFF LED 4 14.3k
U2 TBD R38
U1 U4 NCP4355
R2 1k C29 2.32k
1 HVX2 PFBHV 20 TBD
2
C32 33p
C9
R1 1k R18 34k
3 BOX2 PFBLV 18 4.7p
C12 100n PSTIMER U4_VCC
VAUX GND 17
TBD C7
2.2u R19 20k
4
1 MEG 2k
1 2 CY3
C16 R24 R25
C17 C18 D11
R23 0.47u MMSD4148 1000p
750k 100p 2k 47p
80.6k HS1
1 1 Custom
2 2
3 3
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The NCL30083 is a PWM current mode controller targeting isolated flyback and non−isolated constant current
topologies. The controller operates in a quasi−resonant mode to provide high efficiency. Thanks to a novel control
method, the device is able to precisely regulate a constant LED current from the primary side. This removes the need
for secondary side feedback circuitry, biasing and an optocoupler. The device is highly integrated with a minimum
number of external components.
A robust suite of safety protection is built in to simplify the design. This device is specifically intended for very
compact space efficient designs. It supports step dimming by monitoring the AC line and detecting when the line has
been toggled on−off−on by the user to reduce the light intensity in 5 steps down to 5% dimming.
NOTE: Components labeled FB are only populated for the flyback version and components labeled BB are only required
for the Buck-boost configuration
Figure 49. 10 W Passive PFC Flyback and Buck−Boost Dimmable LED Driver
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Additional Documentation
Table 15. Design Notes
Document Title Document ID
Compact 200−265 Vac HiPF Boost LED Driver DN05062/D
NCP1011: Efficient, Low Cost, Low Standby Power (<100 mW), 2.5 W CCCV Charger DN06017/D
NCP1012: 1 W, Dual Output, Off−line Converter DN06002/D
NCP1012: 3.6 W Auxiliary Power Supply for Appliances / White Goods DN06013/D
NCP1013: Universal Input, 5 W, LED Ballast DN06027/D
NCP1014, NSI45025: Universal Off−Line LED String Driver with PFC DN06065/D
NCP1014: 10 W, 3−Output Off−line Power Supply DN06005/D
NCP1014: 10 W, Dual Output Power Supply DN06020/D
NCP1014: 12 Watt Mini Boost Power Factor Corrector for LED applications DN06064/D
NCP1014: 5 V, 400 mA Current Boosted Buck Converter DN06052/D
NCP1014: 5 W, CCCV Cell Phone Battery Charger DN06009/D
NCP1014: 8 W Off−Line Non−Isolated Buck Regulator DN06011/D
NCP1014: 8 W, 3−Output Off−Line Switcher DN06003/D
NCP1014: Improving the Power Factor of Isolated Flyback Converters for Residential ENERGY STAR® DN06051/D
LED Luminaire Power Supplies
NCP1014: Low Power, Off−Line Buck, CVCC Power Supply DN06037/D
NCP1014: Low Power, Off−Line, Constant Voltage Non−Isolated Power Supply DN06066/D
NCP1014: Universal Input, +/− 12 V Output, 8 Watt Power Supply DN06034/D
NCP1027: 1 A, 12 W Constant Current Off−Line LED Driver DN06006/D
NCP1027: 10 W, 24 V / 5 V Off−Line Power Supply DN06012/D
NCP1027: 16 W, 12 Vdc Modem Power Supply DN06021/D
NCP1028: Single Stage, Off−line, Isolated 12 V, 800 mA Converter with High Power Factor DN06069/D
NCP1050: Extremely Low AC−DC Power Supply Used with GFCI DN05037/D
NCP1055, MC33340: Universal AC 15 W charger for 4 NiMH/NiCd cells DN06023/D
NCP1055: 7 W, non−isolated buck ac−dc converter DN06028/D
NCP1055: Simple, 3 W, Non−isolated Bias Supply DN06053/D
NCP1071, NCP1075, MCP1077: 12 Vout, Off−line Buck Regulator DN05058/D
NCP1072: 10 W Primary Side Regulation (PSR) DN05036/D
NCP1075, NCP4328: Compact 90−135 Vac HiPF Boost LED Driver DN05055/D
NCP1075: Non−isolated, 8 W Dual Output, Off−line Power Supply DN05038/D
NCP1075: Universal AC Input, 12 Vout,10 W E−Meter Power Supply DN05018/D
NCP1076/7: Universal Input, 5 V or 12 V Output, up to 24 W Power Supply DN05049/D
NCP1077: 12 Vout, 6 W, Off−line Buck Regulator Using a Tapped Inductor DN05059/D
NCP1124 : 10 W Universal Input, 5 V output power supply DN05061/D
NCP1129: 12 W, Off−line Buck Regulator DN05053/D
NCP1129: Universal AC Input, 5 V or 12 V output, 20 W − White Goods/Industrial DN05043/D
NCP1136 : 5 V / 20 W Universal Input Power Supply (800 V MOSFET) DN05054/D
NCP1216: 24 V, Off−line Flyback Converter for Motor and Solenoid Applications DN06049/D
NCP1216: 7 W, 90−135 Vac, 500 mA LED Driver DN06050/D
NCP1217: 18 to 24 V, 85 W, Off−line PSU with Short Term, High Surge Current Capability DN06038/D
NCP1217: 200 W, single output power supply DN06010/D
NCP1217: Universal AC 40 W Programmable Output DN06024/D
NCP1219: Universal AC Input, Non−isolated, 6 W Electric Meter Buck Power Supply DN05014/D
NCP1236: 65 W Off−Line Adapter DN06074/D
NCP1251: 12 V, 30 W, Off−line Mini−Forward Converter DN05029/D
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for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters
which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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