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1 1
Compal Confidential
2
Schematics Document 2
3
Dior UMA 3
2009-11-23
REV:1.0
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Cu stom LA-48 92P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 1 of 45
A B C D E
A B C D E
Compal Confidential
File Name : Dior UMA
Fan Control
Dior UMA XDP Conn.
Page 4
Accelerometer
LIS302DLTR
Page 4
LCD conn
Page 21
Mobile Page 26
1 C RT 1
Page 20
CPU Dual Core DDR3 1066MHz 1.5V DDR3-SO-DIMM X 2
BANK 0, 1, 2, 3 Page 9,10,11
CRT to Docking Socket-rPGA989
Page 28 Dual Channel
37.5mm*37.5mm
Page 4,5,6,7,8
DP conn
Page 19
CK505
USB x1(Camara)
SATA1 Page 21
10/100/1000 LAN 1394/Card Reader
Page 13,14,15,16,17,18
Marvell WLAN Card
Sub-board MDC V1.5 RJ11
88E8059/88E8072 Page 24 ONFI Interface Page 25 Page 25
Page 22 Page 29
Page 24
MS/XD Slot SATA ODD Connector
Page 19 Page. 28
NAND card Docking CONN.
TrackPoint CONN.
Page 25
Security Classification Compal Secret Data Compal Electronics, Inc.
2008/10/31 2009/11/06 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Page 32 SPI ROM AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Size Document Number
Cu stom LA-48 92P
R ev
1.0
4MB Page 27 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 2 of 45
A B C D E
A
State
THERMAL
SOURCE BATT XDP SODIMM CLK CHIP MINI CARD DOCK NIC SENSOR G-SENSOR
SMB_EC_CK1
SMB_EC_DA1
SMSC1098
V X X X X X X X X
SMBCLK
SMBDATA
Calpella X V V V V V V X V
SML0CLK
SML0DATA
Calpella X X X X X X X X X
SML1CLK
SML1DATA
Calpella X X X X X X X V X
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Cu s tom LA-48 92P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 3 of 45
A
5 4 3 2 1
MISC
20_0402_1% 1 R9 2 COMP2 AT24 COMP2 BCLK# B16 CLK_CPU_BCLK# 16
R44 100_0402_1%
H_CATERR# 1 2 SM_RCOMP1 1 2
CLOCKS
49.9_0402_1% 1 R3 2 COMP1 G16 AR30 T183PAD R34 49.9_0402_1% R45 24.9_0402_1%
COMP1 BCLK_ITP 09/02/05 HP H_PROCHOT#_D 1 SM_RCOMP2
AT30 T184PAD 2 1 2
BCLK_ITP#
49.9_0402_1% 1 R5 2 COMP0 AT26 R36 68_0402_5% R46 130_0402_1%
COMP0 H_CPURST#_R
E16 CLK_EXP 14 1 2
PEG_CLK R37 @ 68_0402_5% Layout Note:Please these
PEG_CLK# D16 CLK_EXP# 14
TP_SKTOCC# AH24 resistors near Processor
PAD T1 SKTOCC#
DPLL_REF_SSCLK A18
D A17 D
H_CATERR# DPLL_REF_SSCLK#
AK14
CATERR#
THERMAL
11/10 HP
F6 CPUDRAMRST#
SM_DRAMRST#
16 H_PECI 1 R14 2 H_PECI_ISO AT15
0_0402_5% PECI SM_RCOMP0
SM_RCOMP[0] AL1
AM1 SM_RCOMP1
SM_RCOMP[1] SM_RCOMP2
SM_RCOMP[2] AN1
42 H_PROCHOT# 1 R15 2 H_PROCHOT#_D AN26
0_0402_5% PROCHOT# PM_EXTTS#0
PM_EXT_TS#[0] AN15 T91 PAD
DDR3
MISC
AP15 PM_EXTTS#1 1 2 from DDR
PM_EXT_TS#[1] PM_EXTTS#1_R 9,10
R17 0_0402_5%
16 H_THERMTRIP# 1 R19 2 H_THERMTRIP#_R AK15
0_0402_5% THERMTRIP#
+3VS
AT28 XDP_PRDY# T185PAD
PRDY# XDP_PREQ#
PREQ# AP27 T186PAD
2
TCK AN28 XDP_TCK T187PAD
H_CPURST# 1 R18 2H_CPURST#_R AP26 AP28 XDP_TMS T188PAD R22
RESET_OBS# TMS
PWR MANAGEMENT
0_0402_5%
TRST# AT27 XDP_TRST# 1 2 1K_0402_5%
+VCCP
1
0_0402_5% PM_SYNC TDI XDP_TDO @
AR27 1 2
TDO XDP_TDI_M R6 51_0402_5%
AR29 T190PAD
H_CPUPW RGD VCCPW RGOOD_1 AN14 TDI_M XDP_TDO_M
1 R21 2
VCCPWRGOOD_1 TDO_M
AP29 09/09/16 Remove XDP CONN
0_0402_5%
AN25 XDP_DBRESET#
DBR# XDP_DBRESET# 13,15
16 H_CPUPW RGD 1 R23 2 VCCPW RGOOD_0 AN27
0_0402_5% VCCPWRGOOD_0
AJ22 XDP_BPM#0 T191PAD
C BPM#[0] C
15 PM_DRAM_PW RGD 1 R25 2 VDDPW RGOOD_R AK13 SM_DRAMPWROK BPM#[1] AK22 XDP_BPM#1 T192PAD H_CPURST# 2 @ 1 T218 PAD
0_0402_5% AK24 XDP_BPM#2 T193PAD R27 1K_0402_5%
BPM#[2] XDP_BPM#3
BPM#[3] AJ24 T194PAD
32 VTTPWRGOOD AM15 AJ25 XDP_BPM#4 T195PAD
VTTPWRGOOD BPM#[4] XDP_BPM#5 H_CPUPW RGD @
AH22 T196PAD 1 2 T219 PAD
BPM#[5] XDP_BPM#6 R24 1K_0402_5%
AK23 T197PAD
H_PW RGD_XDP 1 @ H_PW RGD_XDP_R AM26 BPM#[6] XDP_BPM#7
PAD T198 2 AH23 T199PAD
R29 0_0402_5% TAPPWRGOOD BPM#[7]
R32 IC,AUB_CFD_rPGA,R1P0
09/01/22 HP 750_0402_1%
2
+3VALW
09/05/14 HP
PWM Fan Control circuit 1
C991
2
0.1U_0402_10V6K
U49 Note for remove Intel S3 power reduciotn solution:
5
MC74AHC1G08DFT2G SC70 5P
R975 1 2 8.2K_0402_1%1
P
+5VS +5VS IN1
4DRAMPW RGD_CPU
U47 conn@ O
30 FAN_PW M 32,38 VCCP_POK 2 IN2 1. Install R977 when S3 powerreduction fail.
G
1 5 JP2
B B Vcc 2. Remove R12, install R976 and change R13 to 3K B
+3VS 1 2 2 1
3
+VCCP R965 10K_0402_5% A R42 1 09/07/11 HP
3 4 2 1 22_0402_5% 2 4 3. Open PJP02 and short PJP01
GND Y 2 G1
3 5
3 G2 4. Remove U49, Q99,R975, C991, R983, R981,C992
S IC TC7SET00FU SSOP 5P NAND GATE 1
C2 ACES_85204-03001 5. Remove R230 for DRAMRST_CNTRL_PCH PH
2
+1.5VS_CPU
B
0.1U_0402_10V6K
@
2
E
H_PROCHOT# 3 1 1 @ 2
C
R976 1.1K_0402_1%
Q98 VDDPW RGOOD_R 1 2 DRAMPW RGD_CPU Reference page: 4,7,16,32
MMBT3904W_SOT323-3 R12 1.5K_0402_1%
1 2
R13 750_0402_1%
+1.5V
09/05/14 HP
1
+3VS R983 R977 1 @ 2 0_0402_5%
1K_0402_5%
Q99
BSS138LT1G 1N SOT23 W/D
2
1 3 CPUDRAMRST#
S
9,10 DRAMRST#
2
C945
09/07/20 HP
G
2
0.1U_0402_10V6K
1
1
16 DRAMRST_CNTRL_PCH
1
U48 100K_0402_5%
1
A 1 8 C C992 R981 A
VDD SCLK SMB_CLK_S3 9,10,12,14,26
THERMAL_D+ 2 Q86 0.1U_0402_10V6K
2
THERMAL_D+ 2 7 B MMBT3904W_SOT323-3 2
D+ SDATA SMB_DATA_S3 9,10,12,14,26 E 09/08/26 HP
3
Put the sensor colse to CPU THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(1/5)-Thermal/XDP
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1
Layout rule:trace
length < 0.5"
JCPU1A JCPU1E
B26 EXP_ICOMPI 1 R49 2 49.9_0402_1%
PEG_ICOMPI
A26 AJ13
PEG_ICOMPO RSVD32
15 DMI_CRX_PTX_N0 A24 B27 AJ12
DMI_RX#[0] PEG_RCOMPO EXP_RBIAS RSVD33
15 DMI_CRX_PTX_N1 C23 A25 1 R50 2 750_0402_1%
DMI_RX#[1] PEG_RBIAS
15 DMI_CRX_PTX_N2 B22 AP25
DMI_RX#[2] RSVD1
15 DMI_CRX_PTX_N3 A21 K35 AL25 AH25
DMI_RX#[3] PEG_RX#[0] RSVD2 RSVD34
PEG_RX#[1] J34 AL24 RSVD3 RSVD35 AK26
15 DMI_CRX_PTX_P0 B24 J33 AL22
DMI_RX[0] PEG_RX#[2] RSVD4
15 DMI_CRX_PTX_P1 D23 DMI_RX[1] PEG_RX#[3] G35 AJ33 RSVD5 RSVD36 AL26
DMI
D B23 G32 AG9 AR2 D
15 DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4] RSVD6 RSVD_NCTF_37
15 DMI_CRX_PTX_P3 A22 F34 M27
DMI_RX[3] PEG_RX#[5] RSVD7
PEG_RX#[6] F31 L28 RSVD8 RSVD38 AJ26
15 DMI_CTX_PRX_N0 D24 DMI_TX#[0] PEG_RX#[7] D35 J17 SA_DIMM_VREF RSVD39 AJ27
15 DMI_CTX_PRX_N1 G24 DMI_TX#[1] PEG_RX#[8] E33 H17 SB_DIMM_VREF
15 DMI_CTX_PRX_N2 F23 C33 G25
DMI_TX#[2] PEG_RX#[9] RSVD11
15 DMI_CTX_PRX_N3 H23 DMI_TX#[3] PEG_RX#[10] D32 G17 RSVD12
PEG_RX#[11] B32 E31 RSVD13 RSVD_NCTF_40 AP1
15 DMI_CTX_PRX_P0 D25 DMI_TX[0] PEG_RX#[12] C31 E30 RSVD14 RSVD_NCTF_41 AT2
15 DMI_CTX_PRX_P1 F24 B28
DMI_TX[1] PEG_RX#[13]
15 DMI_CTX_PRX_P2 E23 DMI_TX[2] PEG_RX#[14] B30 RSVD_NCTF_42 AT3
15 DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31 RSVD_NCTF_43 AR1
J35
PEG_RX[0]
H34
PEG_RX[1]
H33 AL28
FDI_CTX_PRX_N0 PEG_RX[2] CF G0 RSVD45
15 FDI_CTX_PRX_N0 E22 F35 PAD T200 AM30 AL29
FDI_CTX_PRX_N1 FDI_TX#[0] PEG_RX[3] CF G1 CFG[0] RSVD46
15 FDI_CTX_PRX_N1 D21 FDI_TX#[1] PEG_RX[4] G33 PAD T201 AM28 CFG[1] RSVD47 AP30
FDI_CTX_PRX_N2 D19 E34 PAD T202 CF G2 AP31 AP32
15 FDI_CTX_PRX_N2 FDI_TX#[2] PEG_RX[5] CFG[2] RSVD48
FDI_CTX_PRX_N3 D18 F32 PAD T203 CF G3 AL32 AL27
15 FDI_CTX_PRX_N3 FDI_TX#[3] PEG_RX[6] CFG[3] RSVD49
FDI_CTX_PRX_N4 G21 D34 PAD T204 CF G4 AL30 AT31
15 FDI_CTX_PRX_N4 FDI_TX#[4] PEG_RX[7] CFG[4] RSVD50
RESERVED
PEG_RX[12] PAD T209 CFG[9] RSVD_NCTF_55
FDI_CTX_PRX_P0 D22 A28 PAD T210 CFG10 AK28 AP35
15 FDI_CTX_PRX_P0 FDI_TX[0] PEG_RX[13] CFG[10] RSVD_NCTF_56
FDI_CTX_PRX_P1 C21 B29 PAD T211 CFG11 AJ28 AR35
15 FDI_CTX_PRX_P1 FDI_TX[1] PEG_RX[14] CFG[11] RSVD_NCTF_57
FDI_CTX_PRX_P2 D20 A30 PAD T212 CFG12 AN30 AR32
15 FDI_CTX_PRX_P2 FDI_TX[2] PEG_RX[15] CFG[12] RSVD58
FDI_CTX_PRX_P3 C18 PAD T213 CFG13 AN32
15 FDI_CTX_PRX_P3 FDI_TX[3] CFG[13]
FDI_CTX_PRX_P4 G22 L33 PAD T214 CFG14 AJ32
15 FDI_CTX_PRX_P4 FDI_TX[4] PEG_TX#[0] CFG[14]
FDI_CTX_PRX_P5 E20 M35 PAD T215 CFG15 AJ29 E15
C 15 FDI_CTX_PRX_P5 FDI_TX[5] PEG_TX#[1] CFG[15] RSVD_TP_59 C
FDI_CTX_PRX_P6 F20 M33 PAD T216 CFG16 AJ30 F15 09/02/13 HP
15 FDI_CTX_PRX_P6 FDI_TX[6] PEG_TX#[2] CFG[16] RSVD_TP_60
FDI_CTX_PRX_P7 G19 M30 PAD T217 CFG17 AK30 A2
15 FDI_CTX_PRX_P7 FDI_TX[7] PEG_TX#[3] CFG[17] KEY
L31 PAD T20 CFG18 H16 D15
F DI_FSYNC0 PEG_TX#[4] RSVD_TP_86 RSVD62
15 FDI_FSYNC0 F17 K32 C15
F DI_FSYNC1 FDI_FSYNC[0] PEG_TX#[5] RSVD63 R53 @
15 FDI_FSYNC1 E17 M29 AJ15 1 2 0_0402_5%
FDI_FSYNC[1] PEG_TX#[6] RSVD64 R54 @
J31 AH15 1 2 0_0402_5%
FDI_INT PEG_TX#[7] RSVD65
15 FDI_INT C17 K29
FDI_INT PEG_TX#[8]
H30 B19
FDI_LSYNC0 PEG_TX#[9] R58 RSVD15
15 FDI_LSYNC0 F18 H29 A19
FDI_LSYNC1 FDI_LSYNC[0] PEG_TX#[10] @ 0_0402_5% RSVD16
15 FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11]
PEG_TX#[12] E28 1 2 A20 RSVD17
PEG_TX#[13] D29 1 2 B20 RSVD18
D27 @ 0_0402_5% AA5
PEG_TX#[14] R59 RSVD_TP_66
PEG_TX#[15] C26 U9 RSVD19 RSVD_TP_67 AA4
T9 RSVD20 RSVD_TP_68 R8
L34 AD3
PEG_TX[0] RSVD_TP_69
M34 AC9 AD2
PEG_TX[1] RSVD21 RSVD_TP_70
M32 AB9 AA2
PEG_TX[2] RSVD22 RSVD_TP_71
PEG_TX[3] L30 RSVD_TP_72 AA1
M31 R9
PEG_TX[4] RSVD_TP_73
K31 AG7
PEG_TX[5] RSVD_TP_74
M28 C1 AE3
PEG_TX[6] RSVD_NCTF_23 RSVD_TP_75
H31 A3
PEG_TX[7] RSVD_NCTF_24
K28
PEG_TX[8]
G30 V4
PEG_TX[9] RSVD_TP_76
G29 V5
PEG_TX[10] RSVD_TP_77
F28 N2
PEG_TX[11] RSVD_TP_78
E27 J29 AD5
PEG_TX[12] RSVD26 RSVD_TP_79
D28 J28 AD7
PEG_TX[13] RSVD27 RSVD_TP_80
C27 W3
PEG_TX[14] RSVD_TP_81
PEG_TX[15] C25 11/06 HP A34 RSVD_NCTF_28 RSVD_TP_82 W2
A33 RSVD_NCTF_29 RSVD_TP_83 N3
B AE5 B
RSVD_TP_84
C35 AD9
IC,AUB_CFD_rPGA,R1P0 RSVD_NCTF_30 RSVD_TP_85
B35
RSVD_NCTF_31
AP34
VSS
CF G0 1 2 CF G7 1 2
R60 @ 3.01K_0402_1% R61 @ 3.01K_0402_1%
PCI-Express Configuration Select Only temporary for early CFD samples (rPGA/BGA)
1: Single PEG No needed by MoW41.
CFG0 0: Bifurcation enabled
Not applicable for Clarksfield Processor
CF G3 1 2
R62 @ 3.01K_0402_1%
R63
CF G4 1 2
A @ 3.01K_0402_1% A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(2/5)-DMI/PEG/FDI
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 5 of 45
5 4 3 2 1
5 4 3 2 1
JCPU1D
JCPU1C
IC,AUB_CFD_rPGA,R1P0
IC,AUB_CFD_rPGA,R1P0
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(3/5)-DDR3
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 6 of 45
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
JCPU1F
+GFX_CORE
AT21
VAXG1
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AT19 AR22 VCC_AXG_SENSE 44
VAXG2 VAXG_SENSE
SENSE
LINES
1 1 AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE 44
+VCCP
C924
C925
C880
C881
48A 18A 1 1 1 1 AT16
VAXG4 15A
C968
C969
+ + AR21
D VAXG5 D
AG35 AH14 AR19
VCC1 VTT0_1 VAXG6
AG34 AH12 AR18
VCC2 VTT0_2 2 2 2 2 2 2 VAXG7 GFXVR_EN 1
AG33 VCC3 VTT0_3 AH11 AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 44 2
AG32 AH10 AP21 AP22 R844 4.7K_0402_5%
GRAPHICS VIDs
VCC4 VTT0_4 VAXG9 GFX_VID[1] GFXVR_VID_1 44
AG31 VCC5 VTT0_5 J14 AP19 VAXG10 GFX_VID[2] AN22 GFXVR_VID_2 44
AG30
VCC6 VTT0_6
J13 AP18
VAXG11 GFX_VID[3]
AP23 GFXVR_VID_3 44 09/04/13 Intel
AG29 VCC7 VTT0_7 H14 09/03/31 HP AP16 VAXG12 GFX_VID[4] AM23 GFXVR_VID_4 44
AG28 VCC8 VTT0_8 H12 AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 44
GRAPHICS
AG27 VCC9 VTT0_9 G14 09/04/16 Compal AN19 VAXG14 GFX_VID[6] AN24 GFXVR_VID_6 44
AG26 G13 AN18
VCC10 VTT0_10 VAXG15
AF35 VCC11 VTT0_11 G12 AN16 VAXG16
AF34 VCC12 VTT0_12 G11 AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN 44
AF33 F14 AM19 AT25 GFXVR_DPRSLPVR 44
VCC13 VTT0_13 VAXG18 GFX_DPRSLPVR
AF32
VCC14 VTT0_14
F13 AM18
VAXG19 GFX_IMON
AM24 09/09/18 HP
AF31 F12 AM16 1 2 GFXVR_IMON 44
VCC15 VTT0_15 VAXG20 R998 0_0402_5%
AF30 F11 AL21
AF29
AF28
VCC16
VCC17
VTT0_16
VTT0_17
E14
E12
+VCCP AL19
AL18
VAXG21
VAXG22 +1.5VS_CPU
VCC18 VTT0_18 VAXG23
AF27 VCC19 VTT0_19 D14 AL16 VAXG24
AF26 VCC20 VTT0_20 D13 AK21 VAXG25 VDDQ1 AJ1
+VCCP
1.1V RAIL POWER
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
22U_0805_6.3V6M
22U_0805_6.3V6M
AD35 VCC21 VTT0_21 D12 09/05/11 HP AK19 VAXG26 VDDQ2 AF1
- 1.5V RAILS
C47
C48
C49
C50
C51
C955
C956
AD34 VCC22 VTT0_22 D11 AK18 VAXG27 VDDQ3 AE7 1 1 1 1 1 1 1
AD33 C14 AK16 AE4
VCC23 VTT0_23 VAXG28 VDDQ4
AD32 C13 AJ21 AC1
VCC24 VTT0_24 VAXG29 VDDQ5
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AD31 C12 AJ19 AB7
VCC25 VTT0_25 VAXG30 VDDQ6 2 2 2 2 2 2 2
AD30 C11 AJ18 AB4
VCC26 VTT0_26 VAXG31 VDDQ7
C958
C957
C42
C40
C39
C68
C959
AD29 B14 1 1 1 1 1 1 1 AJ16 Y1
VCC27 VTT0_27 VAXG32 VDDQ8
AD28 B12 AH21 W7
VCC28 VTT0_28 Inside cavity VAXG33 VDDQ9
POWER
AD27
VCC29 VTT0_29
A14 AH19
VAXG34 3A VDDQ10
W4
AD26 A13 AH18 U1
VCC30 VTT0_30 2 2 2 2 2 2 2 VAXG35 VDDQ11
AC35 VCC31 VTT0_31 A12 AH16 VAXG36 VDDQ12 T7
AC34 A11 T4
C VCC32 VTT0_32 VDDQ13 C
AC33 VCC33 VDDQ14 P1
AC32 +VCCP N7 +1.5VS_CPU 09/07/20 Intel
VCC34 +VCCP VDDQ15
AC31 VCC35 VDDQ16 N4
DDR3
AC30 AF10 L1
VCC36 VTT0_33 VDDQ17
AC29 AE10 J24 H1
VCC37 VTT0_34 VTT1_45 VDDQ18
FDI
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
AC28 AC10 J23
VCC38 VTT0_35 +VCCP VTT1_46
CPU CORE SUPPLY
C993
C994
C995
C996
C1005
C1006
C1007
C1008
AC27 AB10 H25 1 1 1 1 1 1 1 1
VCC39 VTT0_36 VTT1_47 +VCCP
AC26 Y10
VCC40 VTT0_37
AA35 W10
VCC41 VTT0_38
AA34 U10 P10
VCC42 VTT0_39 VTT0_59 2 2 2 2 2 2 2 2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
AA33 VCC43 VTT0_40 T10 VTT0_60 N10
AA32 VCC44 VTT0_41 J12 VTT0_61 L10
C65
C66
C45
C46
C41
C38
C67
C60
AA31 VCC45 VTT0_42 J11 1 1 1 1 1 1 1 1 VTT0_62 K10
AA30 J16
AA29
VCC46
VCC47
VTT0_43
VTT0_44 J15 Under cavity +VCCP PJP01
AA28
VCC48 2 2 2 2 2 2 2 2 +VCCP +1.5V
AA27 +1.5V 1 2 +1.5VS_CPU
VCC49
1.1V
AA26 J22
VCC50 VTT1_63
Y35 VCC51 K26 VTT1_48 VTT1_64 J20 PAD-OPEN 4x4m
Y34 J27 J18
VCC52 VTT1_49 VTT1_65 PJP02
1.8V
V35 AN33 PSI# 42 E25 L27
VCC61 PSI# VTT1_58 VCCPLL2 +1.8VS
V34 0.6A M26
POWER
VCC62 VCCPLL3
V33 VCC63 H_VID[0..6] 42
V32 AK35 H_VID0
VCC64 VID[0]
1U_0603_10V4Z
1U_0603_10V4Z
2.2U_0603_6.3V4Z
22U_0805_6.3V6M
4.7U_0603_6.3V6K
B V31 AK33 H_VID1 B
VCC65 VID[1]
C71
C72
C73
C74
C75
V30 AK34 H_VID2 1 1 1 1 1
VCC66 VID[2] H_VID3
V29 AL35
VCC67 VID[3]
CPU VIDS
1
P35 C935 C936 C937 C938 C743 C744 C741 C742 C745 C746 C747 C748 C931 C932 C933 C934
VCC91
P34 B15 VTT_SENSE 38
VCC92 VTT_SENSE
P33 A15 VSS_SENSE_VTT 38
2
2
VCC93 VSS_SENSE_VTT
P32
VCC94 @ 47P_0402_50V8J @ 47P_0402_50V8J @ 47P_0402_50V8J @ 47P_0402_50V8J @ 47P_0402_50V8J @ 47P_0402_50V8J 47P_0402_50V8J 47P_0402_50V8J
P31
VCC95
P30
A VCC96 A
P29
VCC97
P28
VCC98
11/25 HP
P27
VCC99
P26
VCC100
Close to CPU
+CPU_CORE
VCCSENSE 1
R70
2
100_0402_1%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
VSSSENSE 1 2
R71 100_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(4/5)-PWR
IC,AUB_CFD_rPGA,R1P0 Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 7 of 45
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
CPU CORE 09/09/16 Compal
JCPU1H JCPU1I
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AT20 AE34
VSS1 VSS81
C76
C77
C78
C79
C80
C81
C82
C83
C84
AT17 AE33 1 1 1 1 1 1 1 1 1
VSS2 VSS82 @ @ @ @ @
AR31 AE32 K27
AR28
VSS3
VSS4
VSS83
VSS84
AE31 K9
VSS161
VSS162
between Inductor and socket
AR26 AE30 K6
VSS5 VSS85 VSS163 2 2 2 2 2 2 2 2 2
AR24 VSS6 VSS86 AE29 K3 VSS164
AR23 AE28 J32
VSS7 VSS87 VSS165 +CPU_CORE
AR20 VSS8 VSS88 AE27 J30 VSS166
D AR17 AE26 J21 D
VSS9 VSS89 VSS167
C108
C109
C107
C105
C104
C106
AR6 VSS13 VSS93 AC4 H28 VSS171 1 1 1 1 1 1
C90
C91
C92
C93
C94
C95
C96
AR3 AC2 H26 1 1 1 1 1 1 1
VSS14 VSS94 VSS172 @ + @ + + + + +
AP20 AB35 H24
AP17
VSS15
VSS16
VSS95
VSS96 AB34 H22
VSS173
VSS174
Under cavity Bulk caps
AP13 VSS17 VSS97 AB33 H18 VSS175
AP10 AB32 H15 2 2 2 2 2 2 2 2 2 2 2 2 2
VSS18 VSS98 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177
AP4 VSS20 VSS100 AB30 H11 VSS178
AP2 AB29 H8
VSS21 VSS101 VSS179
AN34 AB28 H5
VSS22 VSS102 VSS180
AN31 AB27 H2
VSS23 VSS103 VSS181
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AN23 AB26 G34
VSS24 VSS104 VSS182
AN20 AB6 G31
VSS25 VSS105 VSS183
C98
C99
C100
C101
C983
C103
C110
C111
C112
C984
C985
C89
AN17 VSS26 VSS106 AA10 G20 VSS184 1 1 1 1 1 1 1 1 1 1 1 1
AM29 Y8 G9
AM27
VSS27
VSS28
VSS107
VSS108 Y4 G6
VSS185
VSS186
Inside cavity
AM25 VSS29 VSS109 Y2 G3 VSS187
AM20 W35 F30 2 2 2 2 2 2 2 2 2 2 2 2
VSS30 VSS110 VSS188
AM17 W34 F27
VSS31 VSS111 VSS189
AM14 W33 F25
VSS32 VSS112 VSS190
AM11 W32 F22
VSS33 VSS113 VSS191
AM8 W31 F19
VSS34 VSS114 VSS192
AM5 W30 F16
VSS35 VSS115 VSS193
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_10V4K
AM2 W29 E35
VSS36 VSS116 VSS194
AL34 W28 E32
VSS37
VSS VSS117 VSS195
VSS
C975
C976
C977
C978
C979
C980
C981
C982
C88
C102
C113
C988
AL31 W27 E29 1 1 1 1 1 1 1 1 1 1 1 1
VSS38 VSS118 VSS196 @ @ @ @ @
AL23 VSS39 VSS119 W26 E24 VSS197
AL20 W6 E21
C VSS40 VSS120 VSS198 C
AL17 VSS41 VSS121 V10 E18 VSS199
AL12 U8 E13 2 2 2 2 2 2 2 2 2 2 2 2
VSS42 VSS122 VSS200
AL9 VSS43 VSS123 U4 E11 VSS201
AL6 U2 E8
VSS44 VSS124 VSS202
AL3 T35 E5
VSS45 VSS125 VSS203 VSS_NCTF1_R
AK29 T34 E2 AT35
VSS46 VSS126 VSS204 VSS_NCTF1 VSS_NCTF2_R T54
AK27 T33 D33 AT1
VSS47 VSS127 VSS205 VSS_NCTF2 VSS_NCTF3_R T55
AK25 T32 D30 AR34
VSS48 VSS128 VSS206 VSS_NCTF3 VSS_NCTF4_R T78
AK20 T31 D26 B34
VSS49 VSS129 VSS207 VSS_NCTF4 VSS_NCTF5_R T79
AK17 T30 D9 B2
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 VSS_NCTF6_R T80
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1
VSS_NCTF7_R T56
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35
T57
AJ20 VSS53 VSS133 T27 C34 VSS211
AJ17 VSS54 VSS134 T26 C32 VSS212
AJ14 VSS55 VSS135 T6 C29 VSS213
09/01/15 HP
AJ11 R10 C28
VSS56 VSS136 VSS214
AJ8 P8 C24
VSS57 VSS137 VSS215
AJ5 P4 C22
VSS58 VSS138 VSS216
AJ2 VSS59 VSS139 P2 C20 VSS217
AH35 N35 C19
VSS60 VSS140 VSS218
AH34 N34 C16
VSS61 VSS141 VSS219
AH33 N33 B31
VSS62 VSS142 VSS220
AH32 N32 B25
VSS63 VSS143 VSS221
AH31 N31 B21
VSS64 VSS144 VSS222
AH30 N30 B18
VSS65 VSS145 VSS223
AH29 N29 B17
VSS66 VSS146 VSS224
AH28 N28 B13
VSS67 VSS147 VSS225
AH27 N27 B11
VSS68 VSS148 VSS226
AH26 N26 B8
VSS69 VSS149 VSS227
AH20 N6 B6
VSS70 VSS150 VSS228
AH17 VSS71 VSS151 M10 B4 VSS229
AH13 VSS72 VSS152 L35 A29 VSS230
B AH9 L32 A27 B
VSS73 VSS153 VSS231
AH6 L29 A23
VSS74 VSS154 VSS232
AH3 L8 A9
VSS75 VSS155 VSS233
AG10
VSS76 VSS156
L5 09/01/15 HP
AF8 L2
VSS77 VSS157
AF4 K34
VSS78 VSS158
AF2 K33
VSS79 VSS159
AE35 K30
VSS80 VSS160
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Auburndale(5/5)-GND/Bypass
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 8 of 45
5 4 3 2 1
5 4 3 2 1
09/04/23 HP
+1.5V +1.5V
3A @1.5V
+V_DDR_REF_DIMMA_DQ 6 DDR_A_D[0..63]
DDR3 SO-DIMM A 6 DDR_A_DM[0..7]
JDIMA1 CONN@
6 DDR_A_DQS[0..7]
1 2
VREF_DQ VSS1 DDR_A_D4
3 4 6 DDR_A_DQS#[0..7]
VSS2 DQ4
0.1U_0402_10V6K
2.2U_0603_6.3V4Z
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
C114
C115
1 1 DDR_A_D1 7 8
DQ1 VSS3 6 DDR_A_MA[0..15]
9 10 DD R_A_DQS#0
DDR_A_DM0 VSS4 DQS#0 DDR_A_DQS0
11 DM0 DQS0 12
13 14
2 2 DDR_A_D2 VSS5 VSS6 DDR_A_D6
15 DQ2 DQ6 16
D DDR_A_D3 17 18 DDR_A_D7 D
DQ3 DQ7
19 20
DDR_A_D8 VSS7 VSS8 DDR_A_D12
21 DQ8 DQ12 22
DDR_A_D9 23 24 DDR _A_D13
DQ9 DQ13
25 VSS9 VSS10 26
DD R_A_DQS#1 27 28 DDR_A_DM1
DDR _A_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# 4,10
31 VSS11 VSS12 32
DDR _A_D10 33 34 DDR _A_D14
DDR _A_D11 DQ10 DQ14 DDR _A_D15
35 36
DQ11 DQ15
37 VSS13 VSS14 38
DDR _A_D16 39 40 DDR _A_D20
DDR _A_D17 DQ16 DQ20 DDR _A_D21
41 42
DQ17 DQ21
43 44
DD R_A_DQS#2 VSS15 VSS16 DDR_A_DM2
45 46
DDR_A_DQS2 DQS#2 DM2
47 48
DQS2 VSS17 DDR _A_D22
DDR _A_D18
49
VSS18 DQ22
50
DDR _A_D23
Layout Note:
51 DQ18 DQ23 52
DDR_A_D19 53 54 Place near DIMM
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR _A_D24 57 58 DDR _A_D29
DDR _A_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DD R_A_DQS#3
DDR _A_DM3 VSS22 DQS#3 DDR_A_DQS3
63 64
DM3 DQS3
65 66
DDR _A_D26 VSS23 VSS24 DDR_A_D30 +1.5V
67 68
DDR _A_D27 DQ26 DQ30 DDR_A_D31
69 70
DQ27 DQ31
71 72
VSS25 VSS26
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C118
C119
C120
C121
C122
C123
1 1 1 1 1 1
DDR_CKE0_DIMMA 73 74 DDR_C KE1_DIMMA +
C
6 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6 C
75 VDD1 VDD2 76
77 78 D DR_A_MA15
DD R_A_BS2 NC1 A15 D DR_A_MA14 2 2 2 2 2 2 2
6 DDR_A_BS2 79 BA2 A14 80
81 82
D DR_A_MA12 VDD3 VDD4 D DR_A_MA11
83 84
DD R_A_MA9 A12/BC# A11 DDR_A_MA7
85 86
A9 A7
87 88
DD R_A_MA8 VDD5 VDD6 DD R_A_MA6
89 90
DD R_A_MA5 A8 A6 DD R_A_MA4
91 92
A5 A4
93 94
DDR_A_MA3 VDD7 VDD8 DD R_A_MA2
95 A3 A2 96
DD R_A_MA1 97 98 DDR_A_MA0
A1 A0
99 VDD9 VDD10 100
6 M_CLK_DDR0 M_CLK_DDR0 101 102 M_CLK_DDR1
CK0 CK1 M_CLK_DDR1 6
6 M_CLK_DDR#0 M_CLK_DDR#0 103 104 M_CLK_DDR#1
CK0# CK1# M_CLK_DDR#1 6
105 106
D DR_A_MA10 VDD11 VDD12 DDR_A_BS1
107
A10/AP BA1
108 DDR_A_BS1 6 09/03/31 HP
6 DDR_A_BS0 DD R_A_BS0 109 110 DDR_A_RAS# Layout Note:
BA0 RAS# DDR_A_RAS# 6
111 VDD13 VDD14 112
6 DDR_A_W E# DDR_A_W E# 113 114 DDR_CS0_DIMMA#
DDR_CS0_DIMMA# 6
Place near DIMM
DDR _A_CAS# WE# S0# M_ODT0
6 DDR_A_CAS# 115
CAS# ODT0
116 M_ODT0 6 09/04/23 HP
117 118
D DR_A_MA13 VDD15 VDD16 M_ODT1
119 120 M_ODT1 6
DDR_CS1_DIMMA# A13 ODT1 +V_DDR_REF_DIMMA_CA
6 DDR_CS1_DIMMA# 121 122
S1# NC2 +0.75VS
123 124
VDD17 VDD18
125 126
NCTEST VREF_CA
127 128
VSS27 VSS28
0.1U_0402_10V6K
2.2U_0603_6.3V4Z
DDR _A_D32 129 130 DDR _A_D36
DQ32 DQ36
C129
C130
DDR_A_D33 131 132 DDR _A_D37 1 1
DQ33 DQ37
C131
1U_0603_10V4Z
C132
1U_0603_10V4Z
C133
C134
1U_0603_10V4Z
1U_0603_10V4Z
133 134
DD R_A_DQS#4 VSS29 VSS30 DDR_A_DM4
135 DQS#4 DM4 136 1 1 1 1
DDR _A_DQS4 137 138
B DQS4 VSS31 DDR _A_D38 2 2 B
139 VSS32 DQ38 140
DDR _A_D34 141 142 DDR_A_D39
DDR _A_D35 DQ34 DQ39 2 2 2 2
143 144
DQ35 VSS33 DDR_A_D44
145 146
DDR _A_D40 VSS34 DQ44 DDR _A_D45
147 148
DDR _A_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_A_DQS#5
151 152
DDR_A_DM5 VSS36 DQS#5 DDR _A_DQS5
153 154
DM5 DQS5
155 156
DDR _A_D42 VSS37 VSS38 DDR_A_D46
157 158
DDR _A_D43 DQ42 DQ46 DDR _A_D47
159 160
DQ43 DQ47
161 VSS39 VSS40 162
DDR _A_D48 163 164 DDR _A_D52
DDR _A_D49 DQ48 DQ52 DDR _A_D53
165 166
DQ49 DQ53
167 168
DD R_A_DQS#6 VSS41 VSS42 DDR _A_DM6
169 170
DDR _A_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR _A_D54
173 174
DDR _A_D50 VSS44 DQ54 DDR _A_D55
175 176
DDR_A_D51 DQ50 DQ55 +0.75VS
177
DQ51 VSS45
178
DDR _A_D60
Layout Note:
179 180
DDR _A_D56 VSS46 DQ60 DDR _A_D61 Shared between the two
181 182
DDR_A_D57 DQ56 DQ61
183
DQ57 VSS47
184
DD R_A_DQS#7
SO-DIMMs.
185 VSS48 DQS#7 186
Place two capacitors close
C159
10U_0603_6.3V6M
C962
10U_0603_6.3V6M
C963
10U_0603_6.3V6M
DDR _A_DM7 187 188 DDR_A_DQS7
DM7 DQS7
189 VSS49 VSS50 190 1 1 1 to the VR and one
DDR_A_D58 191 192 DDR _A_D62
DDR_A_D59 DQ58 DQ62 DDR _A_D63 between the two SODIMMs
193 194
DQ59 DQ63
195 196
VSS51 VSS52 PM_EXTTS#1_R 2 2 2
1 R79 2 197 198 PM_EXTTS#1_R 4,10
10K_0402_5% SA0 EVENT# SMB_DATA_S3
+3VS 199 200 SMB_DATA_S3 4,10,12,14,26
VDDSPD SDA
2.2U_0603_6.3V4Z
0.1U_0402_10V6K
C136
A 203 204 A
1 1 VTT1 VTT2 +0.75VS
1 10K_0402_5%
R80
DDRIII-SODIMM SLOT1
TOP SLOT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size Document Number
Custom L A-4 892P
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
6 DDR_B_DQS#[0..7]
09/04/23 HP
3A @1.5V
+V_DDR_REF_DIMMB_DQ 6 DDR_B_D[0..63]
CONN@
6 DDR_B_DM[0..7]
JDIMB1
1 2 6 DDR_B_DQS[0..7]
VREF_DQ VSS1 DDR_B_D4
3 4
VSS2 DQ4
2.2U_0603_6.3V4Z
0.1U_0402_10V6K
DDR_B_D0 5 6 DDR_B_D5
DQ0 DQ5 6 DDR_B_MA[0..15]
1 1 DDR_B_D1 7 8
DQ1 VSS3 DD R_B_DQS#0
9 10
VSS4 DQS#0
C137
C138
DDR _B_DM0 11 12 DDR _B_DQS0
DM0 DQS0
13 14
2 2 DDR_B_D2 VSS5 VSS6 DDR_B_D6
15 DQ2 DQ6 16
D DDR_B_D3 17 18 DDR_B_D7 D
DQ3 DQ7
19 20
DDR_B_D8 VSS7 VSS8 DDR _B_D12
21 DQ8 DQ12 22
DDR_B_D9 23 24 DDR _B_D13
DQ9 DQ13
25 VSS9 VSS10 26
DD R_B_DQS#1 27 28 DDR _B_DM1
DDR _B_DQS1 DQS#1 DM1 DRAMRST#
29 DQS1 RESET# 30 DRAMRST# 4,9
31 VSS11 VSS12 32
DDR _B_D10 33 34 DDR _B_D14
DDR _B_D11 DQ10 DQ14 DDR _B_D15
35 36
DQ11 DQ15
37 VSS13 VSS14 38
DDR _B_D16 39 40 DDR _B_D20
DDR _B_D17 DQ16 DQ20 DDR _B_D21
41 42
DQ17 DQ21
43 44
DD R_B_DQS#2 VSS15 VSS16 DDR _B_DM2
45 46
DDR _B_DQS2 DQS#2 DM2
47 48
DQS2 VSS17 DDR _B_D22
49 50
DDR _B_D18 VSS18 DQ22 DDR _B_D23
51 DQ18 DQ23 52
DDR _B_D19 53 54
DQ19 VSS19 DDR _B_D28
55 VSS20 DQ28 56
DDR _B_D24 57 58 DDR _B_D29
DDR _B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DD R_B_DQS#3
DDR _B_DM3 VSS22 DQS#3 DDR _B_DQS3
63 64
DM3 DQS3
65 66
DDR _B_D26 VSS23 VSS24 DDR _B_D30
67 68
DDR _B_D27 DQ26 DQ30 DDR _B_D31
69 70
DQ27 DQ31
71 72
VSS25 VSS26
09/03/31 HP
6 DDR_CKE2_DIMMB DDR_C KE2_DIMMB 73 74 DDR_C KE3_DIMMB Layout Note:
C CKE0 CKE1 DDR_CKE3_DIMMB 6 C
75 VDD1 VDD2 76
77 78 D DR_B_MA15 Place near DIMM
DD R_B_BS2 NC1 A15 D DR_B_MA14
6 DDR_B_BS2 79 BA2 A14 80
81 82
D DR_B_MA12 VDD3 VDD4 D DR_B_MA11
83 84
DD R_B_MA9 A12/BC# A11 DD R_B_MA7
85 86
A9 A7
87 88
DD R_B_MA8 VDD5 VDD6 DD R_B_MA6
89 90
DD R_B_MA5 A8 A6 DD R_B_MA4 +1.5V
91 92
A5 A4
93
VDD7 VDD8
94 09/04/29 HP
DD R_B_MA3 95 96 DD R_B_MA2
A3 A2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_D2_2VM_R6M
DD R_B_MA1 97 98 DD R_B_MA0
A1 A0
99 VDD9 VDD10 100 1
C141
C142
C143
C144
C145
C146
C964
6 M_CLK_DDR2 M_CLK_DDR2 101 102 M_CLK_DDR3 1 1 1 1 1 1
CK0 CK1 M_CLK_DDR3 6 +
6 M_CLK_DDR#2 M_CLK_DDR#2 103 104 M_CLK_DDR#3
CK0# CK1# M_CLK_DDR#3 6
105 106
D DR_B_MA10 VDD11 VDD12 DD R_B_BS1
107 108 DDR_B_BS1 6
DD R_B_BS0 A10/AP BA1 DDR _B_RAS# 2 2 2 2 2 2 2
6 DDR_B_BS0 109 110 DDR_B_RAS# 6
BA0 RAS#
111 VDD13 VDD14 112
6 DDR_B_W E# D DR_B_W E# 113 114 DDR_CS2_DIMMB#
WE# S0# DDR_CS2_DIMMB# 6
6 DDR_B_CAS# DDR _B_CAS# 115 116 M_ODT2 09/04/23 HP
CAS# ODT0 M_ODT2 6
117 118
D DR_B_MA13 VDD15 VDD16 M_ODT3
119 120 M_ODT3 6
DDR_CS3_DIMMB# A13 ODT1 +V_DDR_REF_DIMMB_CA
6 DDR_CS3_DIMMB# 121 122
S1# NC2
123 124
VDD17 VDD18 + VREF_CA
125 126
NCTEST VREF_CA
0.1U_0402_10V6K
2.2U_0603_6.3V4Z
127 128
DDR _B_D32 VSS27 VSS28 DDR _B_D36
129
DQ32 DQ36
130 Layout Note:
C151
C152
DDR _B_D33 131 132 DDR _B_D37 1 1
DQ33 DQ37 Place near DIMM
133 134
DD R_B_DQS#4 VSS29 VSS30 DDR _B_DM4
135 DQS#4 DM4 136
DDR _B_DQS4 137 138
B DQS4 VSS31 DDR _B_D38 2 2 B
139 VSS32 DQ38 140
DDR _B_D34 141 142 DDR _B_D39
DDR _B_D35 DQ34 DQ39 +0.75VS
143 144
DQ35 VSS33 DDR _B_D44
145 146
DDR _B_D40 VSS34 DQ44 DDR _B_D45
147 148
DDR _B_D41 DQ40 DQ45
149 150
DQ41 VSS35 DD R_B_DQS#5
151 152
VSS36 DQS#5
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
DDR _B_DM5 153 154 DDR _B_DQS5
DM5 DQS5
C153
C154
C155
C156
155 156 1 1 1 1
DDR _B_D42 VSS37 VSS38 DDR _B_D46
157 158
DDR _B_D43 DQ42 DQ46 DDR _B_D47
159 160
DQ43 DQ47
161 VSS39 VSS40 162
DDR _B_D48 163 164 DDR _B_D52 2 2 2 2
DDR _B_D49 DQ48 DQ52 DDR _B_D53
165 166
DQ49 DQ53
167 168
DD R_B_DQS#6 VSS41 VSS42 DDR _B_DM6
169 170
DDR _B_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR _B_D54
173 174
DDR _B_D50 VSS44 DQ54 DDR _B_D55
175 176
DDR _B_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR _B_D60
179 180
DDR _B_D56 VSS46 DQ60 DDR _B_D61
181 182
DDR _B_D57 DQ56 DQ61
183 184
DQ57 VSS47 DD R_B_DQS#7
185 VSS48 DQS#7 186
DDR _B_DM7 187 188 DDR _B_DQS7
DM7 DQS7
189 VSS49 VSS50 190
DDR _B_D58 191 192 DDR _B_D62
DDR _B_D59 DQ58 DQ62 DDR _B_D63
193 194
DQ59 DQ63
1 R82 2 195 196
10K_0402_5% VSS51 VSS52 PM_EXTTS#1_R
197 198 PM_EXTTS#1_R 4,9
SA0 EVENT# SMB_DATA_S3
+3VS 199 200 SMB_DATA_S3 4,9,12,14,26
VDDSPD SDA
2.2U_0603_6.3V4Z
0.1U_0402_10V6K
C158
A 1 2 203 204 A
1 1 VTT1 VTT2 +0.75VS
R83 10K_0402_5%
205 206 0 .65A@0.75V
G1 G2
2 2
DDRIII-SODIMM SLOT2
BOT SLOT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Date:
Document Number
L A-4 892P
Monday, November 23, 2009 Sheet 10 of 45
R ev
1.0
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
1
1
R76 R952
2
1
1
R77 R953
1K_0402_1% 1K_0402_1%
2
2
09/04/23 HP
+1.5V +1.5V
1
R948 R954
2
1
R949 R955
1K_0402_1% 1K_0402_1%
2
C C
11/20 HP
B B
11/20 HP
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C997
C998
C999
C1000
C1001
C1002
1 1 1 1 1 1
A A
2 2 2 2 2 2
09/07/15 EMI Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/11/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII SO-DIMM VREFDQ (M1/M2/M3)
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 11 of 45
5 4 3 2 1
5 4 3 2 1
D D
09/07/10 HP
+3VS_+1.5VS_VDD +3VS_CK505 +1.05VS_CK505 +3VS_CK505 +1.05VS_CK505
U 2 X76@
1 32 SMB_CLK_S3
VDD_DOT SCL SMB_CLK_S3 4,9,10,14,26
R85 0_0402_5% 2 31 SMB_DATA_S3
VSS_DOT SDA SMB_DATA_S3 4,9,10,14,26
CLK_BUF_DOT96 1 2 L_CLK_BUF_DOT96 3 30 REF _0/CPU_SEL 2 1 C LK_14M_PCH
14 CLK_BUF_DOT96 DOT_96 REF_0/CPU_SEL CLK_14M_PCH 14
CLK_BUF_DOT96# 1 2 L_CLK_BUF_DOT96# 4 29 R90 39_0402_1%
14 CLK_BUF_DOT96# DOT_96# VDD_REF
R87 0_0402_5% 5 28 CLK_XTAL_IN 09/06/26 HP
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27
27MHZ XTAL_OUT
7 26
27MHZ_SS VSS_REF C K_PW RGD
8 25
VSS_27 CKPWRGD/PD#
R91 0_0402_5% 9 24 R94 0_0402_5%
CLK_BUF_CKSSCD 1 L_CLK_BUF_CKSSCD VSS_SATA VDD_CPU R_C LK_BUF_BCLK 1
14 CLK_BUF_CKSSCD 2 10 23 2 CLK_BUF_BCLK CLK_BUF_BCLK 14
CLK_BUF_CKSSCD# 1 L_C LK_BUF_CKSSCD# SRC_1/SATA CPU_0 R_CLK_BUF_BCLK# 1
14 CLK_BUF_CKSSCD# 2 11 SRC_1#/SATA# CPU_0# 22 2 CLK_BUF_BCLK# CLK_BUF_BCLK# 14
R92 0_0402_5% 12 21 R96 0_0402_5%
C CLK_DMI R93 L_CLK_DMI VSS_SRC VSS_CPU C
14 CLK_DMI 1 2 0_0402_5% 13 SRC_2 CPU_1 20
CLK_DMI# R95 1 2 L_CLK_DMI# 14 19 +3VS_+1.5VS_VDD C K_PW RGD R152 1 2
14 CLK_DMI# SRC_2# CPU_1# +3VS_CK505
0_0402_5% 15 18
CPU_STOP# VDD_SRC_IO VDD_CPU_IO
16
CPU_STOP# VDD_SRC
17 09/07/10 HP 10K_0402_5%
TGND
6
SLG8SP585VTR_QFN32_5X5 2N7002DW T/R7_SOT-363-6
33
Q96A 2 CLK_EN# 42
+1.05VS +1.05VS_CK505
1
L48 Close to U2
1 2
MURATA_BLM18AG601SN1D_0603
10U_0805_10V4K
0.1U_0402_10V6K
0.1U_0402_10V6K
47P_0402_50V8J
0.1U_0402_10V6K
C176
C178
C179
C180
C181
11/06 HP
+3VS +3VS_CK505
Close to U2
1 2 09/07/15 RF
14.31818MHZ_20P_1BX14318BE1A
R84 0_0603_5%
10U_0805_10V4K
47P_0402_50V8J
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
B B
C164
C168
C169
C170
C1003
1 1 1 1 1 CLK_XTAL_OUT
+3VS_CK505 CLK_XTAL_IN
+3VS_+1.5VS_VDD
2 2 2 2 2
1 2
R984 X76@ 0_0603_5% CPU_STOP# R99 1 2 10K_0402_5%
+1.5VS Y1
C221 2 1 C LK_14M_PCH
11/06 HP 22P_0402_50V8J 2 1
09/05/18 EMI
1 2
R985 X76@ 0_0603_5% 2 2 09/06/26 HP
10U_0805_10V4K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C182 C183
C177
C165
C166
C167
2 2 2 2
EMI Capacitor
Layout Note:
Use common GND via for crystal load CAPs.
+VCCP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CLOCK GENERATOR
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 12 of 45
5 4 3 2 1
5 4 3 2 1
32.768KHZ_12.5PF_Q13MC14610002
1 2 HDA_SPKR
R138 @ 1K_0402_5%
1
4
18P_0402_50V8J
OSC
C188 C189
D 18P_0402_50V8J D
U4A
2 2
NC
NC
1
PCH_RTCX2 D13 B33 LPC_LAD1 27,30,31
2
2
2 PCH_RTCRST# FWH3 / LAD3
1 2 C14 RTCRST#
R139 20K_0402_1% C34
FWH4 / LFRAME# LPC_LFRAME# 27,30,31
1 2 PCH_SRTCRST# D17
R140 20K_0402_1% SRTCRST#
1 A34
RTC
LPC
LDRQ0# LPC_LDRQ#0 31
SM_INTRUDER# A16 F34 LPC_LDRQ#1
INTRUDER# LDRQ1# / GPIO23
C193 09/08/25
1U_0603_10V4Z PCH _INTVRMEN A14 AB9 SIRQ
2 INTVRMEN SERIRQ SIRQ 27,30,31
09/05/05
IHDA
HDA_SDIN2 SATA2RXP SATA_PRX_DTX_P2 28
C755 22P_0402_50V8J AF7 SATA_PTX_DRX_N2 Dock Upgrade Bay
C SATA2TXN SATA_PTX_DRX_N2 28 C
F32 AF6 SATA_PTX_DRX_P2
HDA_SDIN3 SATA2TXP SATA_PTX_DRX_P2 28
09/05/18 EMI 09/04/23 HP
SATA3RXN AH3
R148 1 2 33_0402_5% HDA_SDOUT B29 AH1
25 HDA_SDOUT_MDC HDA_SDO SATA3RXP
R149 1 2 33_0402_5% AF3
29 HDA_SDOUT_CODEC SATA3TXN
AF1 PAD PAD
SATA3TXP
H32
SATA
30 AMT_OVERRIDE HDA_DOCK_EN# / GPIO33
AD9 T130 T131
GPIO13 SATA4RXN
+3VALW 1 2 J30
HDA_DOCK_RST# / GPIO13 SATA4RXP
AD8 09/01/15 HP
R996 10K_0402_5% AD6
SATA4TXN
SATA4TXP AD5
09/08/31 HP
PCH_JTAG_TCK M3 AD3 SATA_PRX_DTX_N5
JTAG_TCK SATA5RXN SATA_PRX_DTX_N5 28
AD1 SATA_PRX_DTX_P5
SATA5RXP SATA_PRX_DTX_P5 28
PCH_JTAG_TMS K3 AB3 SATA_PTX_DRX_N5 eSATA in docking
JTAG_TMS SATA5TXN SATA_PTX_DRX_N5 28
AB1 SATA_PTX_DRX_P5
SATA5TXP SATA_PTX_DRX_P5 28
PCH_JTAG_TDI K1 09/04/23 HP
JTAG_TDI
JTAG
PCH_JTAG_TDO J2 AF16
JTAG_TDO SATAICOMPO R155
PCH_JTAG_RST# J4 AF15 SATAICOMP 1 2 PAD PAD +3VS
TRST# SATAICOMPI +1.05VS
37.4_0402_1% T132 T133
09/01/15 HP
30 KBC_SPI_CLK_R 1 2 BA2
SPI_CLK
2
for SMSC EC R157 15_0402_5%
AV3 1 2 +3VS R160
30 KBC_SPI_CS0#_R SPI_CS0# R158 10K_0402_5% 10K_0402_5%
30 PCH_SPI_CS1#_R AY3 T3 SATA_LED# 28,29
SPI_CS1# SATALED#
1
1 2 AY1 Y9 GPIO21 09/03/31 HP 11/11 HP
B notice KBC state 30 KBC_SPI_SI_R R165 15_0402_5% SPI_MOSI SATA0GP / GPIO21 B
SPI
200_0402_5%
200_0402_5%
T151
1
PAD
R355
R358
R356
@ @ @
09/02/09 Power team
09/08/26 HP
2
18 OBSDATA_A2
W=20mils W=20mils
R354 R535 R537 17 1 C208 BAV70W_SOT323-3 1K_0402_5%
@ @ @ R162 OBSDATA_A3
100_0402_1% 100_0402_1% 100_0402_1% 16 GND 1U_0603_10V4Z
30,42 PM_PW ROK 1 2 15
HOOK0
14
2
+3VS
SMBCLK 1 2 +3VALW
SMB_CLK_S3 1 2 R167 2.2K_0402_5%
+3VALW +3VL CONN@ R169 10K_0402_5% SMBDATA 1 2
JSMBUS SMB_DATA_S3 1 2 R168 2.2K_0402_5%
1 4 R171 10K_0402_5% SML0CLK 1 2
SMB_CLK_S3 GND G1 R170 2.2K_0402_5%
2 5
CLK G2
2
SMB_DATA_S3 3 09/01/15 HP SML0DATA 1 2
DATA
R147 R982 R172 2.2K_0402_5% 12/19 HP
10K_0402_5% 100K_0402_5% MOLEX_53261-0319 SML1CLK 1 2
R174 2.2K_0402_5%
09/02/05 HP SML1DATA 1 2
1
D43@ PEG_CLKREQ# 1 2 R176 2.2K_0402_5%
D LID_SW #_ISO 2 1 R177 10K_0402_5% D
LID_SW # 21,25,30
CH751H-40PT_SOD323-2 SML0ALERT# 1 2
R272 10K_0402_5%
09/08/27 HP LID_SW #_ISO R350 1 2 SML1ALERT# SML1ALERT# 1 2
@ 0_0402_5% R771 10K_0402_5%
U4B
09/07/03 HP
SMBus
29 PCIE_PRX_DTX_N3
2
PCIE_PRX_DTX_P3 PERN3 SML0DATA
29 PCIE_PRX_DTX_P3 AT30 PERP3 SML0DATA G8
Media Card C209 1 2 0.1U_0402_10V6K PCIE_PTX_DRX_N3 AU32
29 PCIE_PTX_C_DRX_N3 PETN3
C212 1 2 0.1U_0402_10V6K PCIE_PTX_DRX_P3 AV32 Q8B
29 PCIE_PTX_C_DRX_P3 PETP3
M14 SML1ALERT# 2N7002DW T/R7_SOT-363-6 R360
PCIE_PRX_DTX_N4 SML1ALERT# / GPIO74 SMBDATA R352 1 @
24 PCIE_PRX_DTX_N4 BA32 2 0_0402_5% 4 3 1 2 CAP_DAT 25,30
PCIE_PRX_DTX_P4 PERN4 SML1CLK 0_0402_5%
24 PCIE_PRX_DTX_P4 BB32 E10
C213 1 PCIE_PTX_DRX_N4 PERP4 SML1CLK / GPIO58 +3VALW
WLAN 24 PCIE_PTX_C_DRX_N4 2 0.1U_0402_10V6K BD32
C214 1 PCIE_PTX_DRX_P4 PETN4 SML1DATA
24 PCIE_PTX_C_DRX_P4 2 0.1U_0402_10V6K BE32 G12
5
PETP4 SML1DATA / GPIO75
PCI-E*
BF33
PERN5 SML1CLK
BH33 T13 R906 1 2 0_0402_5% 09/02/14 HP
Controller
PERP5 CL_CLK1
BG32
C PETN5 C
BJ32 PETP5 CL_DATA1 T11
SML1DATA R907 1 2 0_0402_5% 09/01/15 HP
Link
22 PCIE_PRX_DTX_N6 PCIE_PRX_DTX_N6 BA34 T9
PCIE_PRX_DTX_P6 AW34 PERN6 CL_RST1#
22 PCIE_PRX_DTX_P6 PERP6
NIC C217 1 2 0.1U_0402_10V6K PCIE_PTX_DRX_N6 BC34
22 PCIE_PTX_C_DRX_N6 PETN6
C218 1 2 0.1U_0402_10V6K PCIE_PTX_DRX_P6 BD34
22 PCIE_PTX_C_DRX_P6 PETP6
H1 PEG_CLKREQ#
PEG_A_CLKRQ# / GPIO47 Q7A
AT34
PERN7 2N7002DW T/R7_SOT-363-6
AU34
PERP7 SMBCLK SMB_CLK_S3
AU36 AD43 6 1 SMB_CLK_S3 4,9,10,12,26
PETN7 CLKOUT_PEG_A_N
AV36 PETP7 CLKOUT_PEG_A_P AD45
2
PERN8 CLKOUT_DMI_N
PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_EXP 4
BG36 PETN8
BJ36 Q7B
PETP8 C LK_DP# 2N7002DW T/R7_SOT-363-6
AT1 T52 PAD
CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DP SMBDATA 3 SMB_DATA_S3
AT3 T53 PAD 4 SMB_DATA_S3 4,9,10,12,26
CLKOUT_DP_P / CLKOUT_BCLK1_P
AK48 CLKOUT_PCIE0N
+3VALW AK47 11/10 HP +3VS
CLKOUT_PCIE0P
5
CLKIN_DMI_N
1 2 P9 BA24 CLK_DMI 12
R676 10K_0402_5% PCIECLKRQ0# / GPIO73 CLKIN_DMI_P
18P_0402_50V8J
18P_0402_50V8J
WLAN 24 CLK_PCIE_MCARD_PCH 1 2 0_0402_5% CLK_PCIE_MCARD_PCH_R AM53 CLKOUT_PCIE4P XTAL25_OUT AH53 XTAL25_OUT 09/07/08 HP
R186 1 C223 1 C224
24 CLKREQ_W LAN# M9 AF38 R187 1 2 90.9_0402_1% +1.05VS
PCIECLKRQ4# / GPIO26 XCLK_RCOMP
AJ50 T45 2 2
+3VALW CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T140 PAD
AJ52
CLKOUT_PCIE5P
1 2 H6 P43
Clock Flex
IBEXPEAK-M_FCBGA1071
@
+3VS CLK_14M_SIO 1 2
C923 10P_0402_50V8J
A A
5
2N7002DW T/R7_SOT-363-6
09/02/19 HP Q96B Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(2/6)-PCI-E/SMBUS/CLK
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 14 of 45
5 4 3 2 1
5 4 3 2 1
DPB_R 1 2
R822 100K_0402_5%
DPC_R 1 2
U 4C U 4D R826 100K_0402_5%
BA18 FDI_CTX_PRX_N0 T48 BJ46 MB_DP_HPD# 1 2
FDI_RXN0 FDI_CTX_PRX_N0 5 21 ENABLT L_BKLTEN SDVO_TVCLKINN
5 DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BH17 FDI_CTX_PRX_N1 T47 BG46 R827 100K_0402_5%
DMI0RXN FDI_RXN1 FDI_CTX_PRX_N1 5 21 ENAVDD L_VDD_EN SDVO_TVCLKINP
5 DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BJ22 BD16 FDI_CTX_PRX_N2
DMI1RXN FDI_RXN2 FDI_CTX_PRX_N2 5
5 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3 Y48 BJ48
DMI2RXN FDI_RXN3 FDI_CTX_PRX_N3 5 21 INV_PW M L_BKLTCTL SDVO_STALLN
5 DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BJ20 BA16 FDI_CTX_PRX_N4 BG48
DMI3RXN FDI_RXN4 FDI_CTX_PRX_N4 5 SDVO_STALLP
BE14 FDI_CTX_PRX_N5 AB48
FDI_RXN5 FDI_CTX_PRX_N5 5 21 EDID_CLK L_DDC_CLK
5 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 Y45 BF45
DMI0RXP FDI_RXN6 FDI_CTX_PRX_N6 5 21 EDID_DATA L_DDC_DATA SDVO_INTN
5 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BG22 BC12 FDI_CTX_PRX_N7 BH45
DMI1RXP FDI_RXN7 FDI_CTX_PRX_N7 5 SDVO_INTP
5 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BA20 1 2 AB46
DMI_CTX_PRX_P3 DMI2RXP FDI_CTX_PRX_P0 R830 L_CTRL_CLK
5 DMI_CTX_PRX_P3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_CTX_PRX_P0 5 +3VS 1 2 10K_0402_5% V48 L_CTRL_DATA
BF17 FDI_CTX_PRX_P1 R831 10K_0402_5%
FDI_RXP1 FDI_CTX_PRX_P1 5
D DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2 AP39 T51 D DPB_CTRLCLK D
5 DMI_CRX_PTX_N0 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P2 5 LVD_IBG SDVO_CTRLCLK DDPB_CTRLCLK 28
1
DMI_CRX_PTX_N1 BF21 BG16 FDI_CTX_PRX_P3 PAD AP41 T53 DDPB_CTRLDATA
5 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP3 FDI_CTX_PRX_P3 5 LVD_VBG SDVO_CTRLDATA DDPB_CTRLDATA 28
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4 R832 T122 11/25 HP
5 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 5
DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5 2.37K_0402_1% AT43
5 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP5 FDI_CTX_PRX_P5 5 LVD_VREFH
BB14 FDI_CTX_PRX_P6 AT42 BG44
FDI_RXP6 FDI_CTX_PRX_P6 5 LVD_VREFL DDPB_AUXN DPB_AUX# 28
DMI_CRX_PTX_P0 BD22 BD12 FDI_CTX_PRX_P7 BJ44
5 DMI_CRX_PTX_P0 FDI_CTX_PRX_P7 5 DPB_AUX 28
2
DMI_CRX_PTX_P1 DMI0TXP FDI_RXP7 DDPB_AUXP DPB_R
5 DMI_CRX_PTX_P1 BH21 DMI1TXP DDPB_HPD AU38 DPB_HPD 28
LVDS
DMI_CRX_PTX_P2 BC20 AV53
5 DMI_CRX_PTX_P2 DMI2TXP 21 LVDS_ACLKN LVDSA_CLK#
DMI_CRX_PTX_P3 BD18 BJ14 FDI_INT AV51 BD42
5 DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI_INT 5 21 LVDS_ACLKP LVDSA_CLK DDPB_0N DPB_TXN0 28
BC42
DMI
FDI
DDPB_0P DPB_TXP0 28
BF13 F DI_FSYNC0 BB47 BJ42
+1.05VS FDI_FSYNC0 FDI_FSYNC0 5 21 LVDS_A0N LVDSA_DATA#0 DDPB_1N DPB_TXN1 28
CRT
25,28,30 PW RBTN_OUT# 1 2 P5 K8 BF37 MB_DP_TXN2 19
R202 0_0402_5% PWRBTN# SLP_M# DDPD_2N
AD48 DAC_IREF DDPD_2P BH37 MB_DP_TXP2 19
1K_0402_0.5%
09/07/17 HP 09/09/15 Intel AB51 BE36
CRT_IRTN DDPD_3N MB_DP_TXN3 19
1
R833
30 AC_PRESENT P7 N2 BD36 MB_DP_TXP3 19
ACPRESENT / GPIO31 TP23 DDPD_3P
IBEXPEAK-M_FCBGA1071
LOW _BAT#_R A6 BJ10
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 4
2
11/18 11/06 HP
IBEX_R# F14 F6 SLP_LAN#
RI# SLP_LAN# / GPIO29
+3VS +3VS
IBEXPEAK-M_FCBGA1071 12/03 HP
2
R895 R887
2.2K_0402_5% 100K_0402_5% Clost to JDP1
Q81A Q81B
1
2N7002DW T/R7_SOT-363-62N7002DW T/R7_SOT-363-6
1
DDPD_CTRLDATA 1 6 3 4 MB_DP_AUXN_CONN 19
B B
5
19 DDC_EN 09/05/14 HP
Q82A Q82B
2N7002DW T/R7_SOT-363-62N7002DW T/R7_SOT-363-6
DD PD_CTRLCLK 1 6 3 4
+3VS MB_DP_AUXP_CONN 19
PM_CLKRUN# 1 2
5
2
2
R205 10K_0402_5% DDC_EN
R888
+3VALW R896 100K_0402_5%
2.2K_0402_5%
1
+3VS
LOW _BAT#_R 1 2 Clost to JDP1
R209 10K_0402_5% +3VS 09/02/09 HP
2
SLP_LAN# 1 @ 2 12/03 HP @
R340 10K_0402_5% R889
IBEX_R# 1 2 100K_0402_5%
R211 10K_0402_5% C929 Q83A Q83B
PCIE_W AKE# 1 2 09/09/15 Intel 0.1U_0402_16V4Z 2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6
1
R212 10K_0402_5% MB_DP_AUXN 2 1 MB_DP_AUXN_C 1 6 3 4
AC_PRESENT 1 2 09/05/15 HP
R439 10K_0402_5%
5
PM_RSMRST# 1 2 09/05/11 HP 09/05/14 HP DP_EN
R206 100K_0402_5%
PW ROK Q89A Q89B
1 2
R747 10K_0402_5% 2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6
MB_DP_AUXP 2 1 MB_DP_AUXP_C 1 6 3 4
0.1U_0402_16V4Z
A A
C930
5
2
@
R890 11/22 HP
SLP_S3# 1 2 100K_0402_5% DP_EN 19
R538 10K_0402_5%
SLP_S4# 1 2
1
R546 @ 10K_0402_5%
SLP_S5# 1 2
R547 @ 10K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(3/6)-DMI/GPIO/LVDS
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 15 of 45
5 4 3 2 1
5 4 3 2 1
+3VS U4E U 4F
LAN
H40 AY9 PAD T153 0_0402_5% R192
AD0 NV_CE#0 BMBUSY#
RP17 N34 AD1 NV_CE#1 BD1 PAD T154 +3VS R213 1 2 10K_0402_5% Y3 BMBUSY# / GPIO0 CLKOUT_PCIE6N AH45 CLK_PCIE_LAN_PCH#_R 2 1 CLK_PCIE_LAN_PCH# 22
PC I_IRDY# 1 8 C44 AP15 PAD T155 AH46 CLK_PC IE_LAN_PCH_R 2 1
AD2 NV_CE#2 CLKOUT_PCIE6P CLK_PCIE_LAN_PCH 22
PCI_PIRQD# 2 7 A38 BD8 PAD T156 43 OCP# O CP# C38 0_0402_5% R194
PCI_PIRQA# AD3 NV_CE#3 TACH1 / GPIO1
3 6 C36
PCI_SERR# AD4 RUNSCI_EC#
4 5 J34 AD5 NV_DQS0 AV9 PAD T157 09/08/26 HP 30 RUNSCI_EC# D37 TACH2 / GPIO6
A40 BG8 PAD T158 AF48
AD6 NV_DQS1 CLKOUT_PCIE7N
MISC
8.2K_0804_8P4R_5% D45 4 THERM_SCI# THERM_SCI# J32 AF47 11/06 HP
AD7 TACH3 / GPIO7 CLKOUT_PCIE7P
E36 AP7 PAD T159
RP18 AD8 NV_DQ0 / NV_IO0 DRAMRST_CNTRL_PCH +3VS
H48 AP6 PAD T160 4 DRAMRST_CNTRL_PCH F10
PCI_PIRQG# AD9 NV_DQ1 / NV_IO1 GPIO8
1 8 E40 AT6 PAD T161 2 1
PCI_PIRQC# AD10 NV_DQ2 / NV_IO2 CB_IN# R216 10K_0402_5%
2 7 C40 AD11 NV_DQ3 / NV_IO3 AT9 PAD T162 23 CB_IN# K9 LAN_PHY_PWR_CTRL / GPIO12 A20GATE U2 GATEA20 30
PCI_PIRQE# 3 6 M48 BB1 PAD T163
PCI_STOP# AD12 NV_DQ4 / NV_IO4 GPIO15
4 5 M45 AD13 NV_DQ5 / NV_IO5 AV6 PAD T164 T7 GPIO15
D F53 BB3 D
AD14 NV_DQ6 / NV_IO6 PAD T165
8.2K_0804_8P4R_5% M40 BA4 PAD T166 GPIO16 AA2 AM3
AD15 NV_DQ7 / NV_IO7 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 4
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4 PAD T167
RP16 J36 BB6 PAD T168 ALS_EN# F38 AM1
AD17 NV_DQ9 / NV_IO9 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK 4
PC I_REQ2# 1 8 K48 BD6 PAD T169 2009/03/31 HP
PC I_REQ1# AD18 NV_DQ10 / NV_IO10 W W AN_DET# PCH_PECI_R
2 7 F40 BB7 PAD T170 24 W W AN_DET# Y7 BG10 1 2 H_PECI 4
AD19 NV_DQ11 / NV_IO11 SCLOCK / GPIO22 PECI
GPIO
PCI_FRAME# 3 6 C42 BC8 PAD T171 0_0402_5% R217
PCI_T RDY# AD20 NV_DQ12 / NV_IO12 GPIO24 KB_RST#
4 5 K46 AD21 NV_DQ13 / NV_IO13 BJ8 PAD T172 H10 GPIO24 RCIN# T1 KB_RST# 30
M51 AD22 NV_DQ14 / NV_IO14 BJ6 PAD T173
8.2K_0804_8P4R_5% J52 BG6 PAD T174 W W AN_TRANSMIT_OFF# AB12 BE10
AD23 NV_DQ15 / NV_IO15 24,29 W W AN_TRANSMIT_OFF# GPIO27 PROCPWRGD H_CPUPW RGD 4
CPU
K51 AD24
L34 BD3 PAD T175 LAN _DIS# V13 BD10 H_THERMTRIP#_L 1 2
AD25 NV_ALE 22 LAN_DIS# GPIO28 THRMTRIP# H_THERMTRIP# 4
F42 AY6 PAD T176 56_0402_1% R218
AD26 NV_CLE
1
PCI_GNT3# 1 2 J40 STP_PCI# M11
AD27 STP_PCI# / GPIO34
R257 @ 1K_0402_5% G46
AD28
11/20 HP R219
F44 AU2 PAD T177 SATA_CLKREQ# V6 56_0402_1%
A16 swap overide Strap/Top-Block AD29 NV_RCOMP SATACLKREQ# / GPIO35
M47
AD30
PCI
Swap Override jumper H36 AV7 PAD T178 N PCI_RST# AB7 BA22 T24 PAD
30,31 NPCI_RST#
2
Low=A16 swap AD31 NV_RB# SATA2GP / GPIO36 TP1
09/04/21 HP +VCCP
PCI_GNT3# override/Top-Block J50 AY8 PAD T179 W EBCAM_ON_PCH AB13 AW22 T25 PAD
Swap Override enabled C/BE0# NV_WR#0_RE# 21 W EBCAM_ON_PCH SATA3GP / GPIO37 TP2
G42 C/BE1# NV_WR#1_RE# AY5 PAD T180
High=Default H47 11/17 HP 28 V3 BB22
C/BE2# DOCK_ID0 SLOAD / GPIO38 TP3 T26 PAD
G34 AV11 PAD T181
C/BE3# NV_WE#_CK0
NV_WE#_CK1
BF5 PAD T182 11/06 HP 28 DOCK_ID1 P3
SDATAOUT0 / GPIO39 TP4
AY45 T27 PAD
PCI_PIRQA# G38
PCI_PIRQB# PIRQA# CLK_PCIE_LAN_REQ#
H51 22 CLK_PCIE_LAN_REQ# H3 AY46 T28 PAD
PCI_PIRQC# PIRQB# U SB20_N0 PCIECLKRQ6# / GPIO45 TP5
B37 H18 USB20_N0 26
PCI_PIRQD# PIRQC# USBP0N USB20_P0 R460 1 CLKREQ_W W AN#
A44
PIRQD# USBP0P
J18
U SB20_N1
USB20_P0 26 CONN +3VALW 2 F1
PCIECLKRQ7# / GPIO46 TP6
AV43 T29 PAD
A18 10K_0402_5%
USBP1N USB20_N1 26
PC I_REQ0# F51 C18 USB20_P1 CONN GPIO48 AB6 AV45 T30 PAD
REQ0# USBP1P USB20_P1 26 SDATAOUT1 / GPIO48 TP7
PC I_REQ1# A46 N20 U SB20_N2 11/07 HP
REQ1# / GPIO50 USBP2N USB20_N2 29
PC I_REQ2# B45 P20 USB20_P2 CONN GPIO49 AA4 AF13 T31 PAD
C REQ2# / GPIO52 USBP2P USB20_P2 29 SATA5GP / GPIO49 TP8 C
PC I_REQ3# M53 J20 U SB20_N3
REQ3# / GPIO54 USBP3N USB20_N3 26
09/04/15 HP L20 USB20_P3 CONN W LAN_TRANSMIT_OFF# F8 M18 T32 PAD
USBP3P USB20_P3 26 24 W LAN_TRANSMIT_OFF# GPIO57 TP9
T148 PAD PCI_GNT0# F48 F20 U SB20_N4
GNT0# USBP4N USB20_N4 29
T149 PAD PCI_GNT1# K45 G20 USB20_P4 EXPRESS N18 T33 PAD
GNT1# / GPIO51 USBP4P USB20_P4 29 TP10
T113 PAD PCI_GNT2# F36 A20
PCI_GNT3# GNT2# / GPIO53 USBP5N
H53 C20 A4 AJ24 T34 PAD
GNT3# / GPIO55 USBP5P VSS_NCTF_1 TP11
M22 A49
NCTF
USBP6N VSS_NCTF_2
RSVD
09/02/13 HP PCI_PIRQE# B41 N22 09/08/26 HP A5 AK41 T35 PAD
PIRQE# / GPIO2 USBP6P VSS_NCTF_3 TP12
14 CLKREQ_CARD#_R K53 B21 A50
PCI_PIRQG# PIRQF# / GPIO3 USBP7N VSS_NCTF_4
A36 D21 A52 AK42 T36 PAD
ACCEL_INT# PIRQG# / GPIO4 USBP7P U SB20_N8 VSS_NCTF_5 TP13
26 ACCEL_INT# A48 PIRQH# / GPIO5 USBP8N H22 USB20_N8 26 18 PCH_NCTF6 A53 VSS_NCTF_6
J22 USB20_P8 Bluetooth B2 M32 T37 PAD
USBP8P USB20_P8 26 18 PCH_NCTF7 VSS_NCTF_7 TP14
USB
1 8
1
PC I_REQ3# 2 7 @ SN74AHC1G08DCKR_SC70-5
Security Classification Compal Secret Data Compal Electronics, Inc.
3
PCI_PIRQB# 3 6
PC I_REQ0# 4 5 R258 2008/10/31 2009/11/06 Title
100K_0402_5%
Issued Date Deciphered Date
8.2K_0804_8P4R_5% IBEX-M(4/6)-PCI/USB/RSVD
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 16 of 45
5 4 3 2 1
5 4 3 2 1
+CRTDAC +3VS
+1.05VS L45
U4J POWER
+1.05VS +VREG3_51125 Q103 +CRTDAC U4G POWER 2 1
SI2301CDS-T1-GE3 1P SOT23-3 AB24 AE50 10UH_LB2012T100MR_20%_0805
VCCCORE[1] VCCADAC[1]
1U_0603_10V4Z
10U_0603_6.3V6M
0.01U_0402_16V7K
10U_0603_6.3V6M
0.1U_0402_10V6K
AB26
VCCCORE[2]
09/10/13 HP
C226
C227
C229
C266
C231
T144 PAD AP51 V24 1 1 AB28 0.069A AE52 1 1 1
VCCACLK[1] VCCIO[5] VCCCORE[3] VCCADAC[2]
S
09/03/31 HP 0.052A V26 3 1 AD26
VCCCORE[4]1.524A
D
VCCIO[6]
CRT
AP53 Y24 1 AD28 AF53
VCCACLK[2] VCCIO[7] C232 VCCCORE[5] VSSA_DAC[1] @ @
Y26 AF26
VCCIO[8] 2 2 VCCCORE[6] 2 2 2
VCC CORE
09/02/14 HP 1U_0402_6.3V4Z AF28 AF51
G
2
VCCCORE[7] VSSA_DAC[2]
1
AF23 V28 AF30
VCCLAN[1] VCCSUS3_3[1] 2 R1011 VCCCORE[8]
D
0.344A VCCSUS3_3[2] U28
10K_0402_5%
AF31 VCCCORE[9] 09/09/15 Intel D
AF24 U26 AH26
VCCLAN[2] VCCSUS3_3[3] VCCCORE[10]
PAD T50 U24 AH28
VCCSUS3_3[4] VCCCORE[11]
P28 AH30
2
VCCSUS3_3[5] VCCCORE[12]
1 2 Y20 DCPSUSBYP VCCSUS3_3[6] P26 AH31 VCCCORE[13] 0.030A VCCALVDS AH38 +3VS
C233 0.1U_0402_10V6K N28 AJ30
VCCSUS3_3[7] R1012 VCCCORE[14]
N26 AJ31 AH39
VCCSUS3_3[8] VCCCORE[15] VSSA_LVDS
AD38 VCCME[1] VCCSUS3_3[9] M28 +3VS 1 2
09/05/13 HP M26 +3VALW L47
VCCSUS3_3[10]
22U_0805_6.3V6M
22U_0805_6.3V6M
AD39 L28 220K_0402_1% AP43 1 2
USB
VCCME[2] VCCSUS3_3[11] +1.05VS VCCTX_LVDS[1] +1.8VS
C966
C240
1 1 L26 0.059A AP45 0.1UH_MLF1608DR10KT_10%
VCCSUS3_3[12] VCCTX_LVDS[2]
0.1U_0402_10V6K
0.1U_0402_10V6K
C947
0.01U_0402_16V7K
C948
0.01U_0402_16V7K
C949
22U_0805_6.3V6M
Layout Note: AD41 J28 AT46 1 1 1
LVDS
VCCME[3] VCCSUS3_3[13] VCCTX_LVDS[3]
C236
C237
VCCSUS3_3[14] J26 1 1 09/10/19 Reserve for wavy issue use AK24 VCCIO[24] VCCTX_LVDS[4] AT45
Place near PIN AD38 AF43 H28
2 2 VCCME[4] VCCSUS3_3[15] @ @
H26
VCCSUS3_3[16] T145 PAD 2 2 2
AF41
VCCME[5] 0.163AVCCSUS3_3[17] G28
2 2
BJ24
VCCAPLLEXP0.042A
VCCSUS3_3[18]
G26 09/03/31 HP VCC3_3[2]
AB34
+1.05VS 09/04/09 HP AF42 F28
VCCME[6] VCCSUS3_3[19] +3VS
1.998A VCCSUS3_3[20] F26 AN20 VCCIO[25] VCC3_3[3] AB35
09/09/15 Intel
V39 E28 AN22
HVCMOS
VCCME[7] VCCSUS3_3[21] VCCIO[26]
22U_0805_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C241
C242
C235
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AV26
VCCIO[37]
C244
C245
>1mA F24 ICH_V5REF_SUS 1 1 AV28 AT24
C243 V5REF_SUS VCCIO[38] VCCVRM[2]
AW26
C +VCCRTCEXT VCCIO[39] C
1 2 V9 DCPRTC AW28 VCCIO[40] +VCCP
DMI
0.1U_0402_10V6K BA26 AT16
2 2 VCCIO[41] VCCDMI[1]
ICH_V5REF_RUN
BA28 VCCIO[42] 0.061A
0.035A >1mA V5REF
K49 BB26
VCCIO[43] VCCDMI[2]
AU16 1 2
AU24 BB28 C246 1U_0603_10V4Z
PCI/GPIO/LPC
PCI E*
0.072A VCC3_3[8]
J38 BC28
VCCIO[46] +1.8VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
BB51 BD26
+V1.05S_VCCA_A_DPL VCCADPLLA[1] VCCIO[47]
BB53 L38 BD28
VCCADPLLA[2] VCC3_3[9] VCCIO[48]
C254
C249
C250
1 1 1 1 BE26 AM16
VCCIO[49] VCCPNAND[1]
0.1U_0402_10V6K
0.073A M36 C247 BE28 AK16
+1.05VS VCC3_3[10] VCCIO[50] VCCPNAND[2]
C251
+V1.05S_VCCA_B_DPL BD51 0.357A 0.1U_0402_10V6K BG26 AK20 1
VCCADPLLB[1] VCCIO[51] VCCPNAND[3]
BD53 VCCADPLLB[2] VCC3_3[11] N36 BG28 VCCIO[52] VCCPNAND[4] AK19
2 2 2 2 BH27 VCCIO[53] 0.156A VCCPNAND[5] AK15
1U_0402_6.3V4Z
NAND / SPI
1 2 AH35
VCCIO[23] VCC3_3[13]
U35 09/03/31 HP AN31
VCCIO[55] VCCPNAND[8]
AM13
+3VS +3VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C252
2
1 1 AF34 VCCIO[2] 3.208A
AD13 1 2 2 1 AN35
VCC3_3[14] C255 0.1U_0402_10V6K C967 0.1U_0402_10V6K VCC3_3[1]
AH34
VCCIO[3]
2 2 +3VS
AF32
VCCIO[4] +1.8VS AT22
VCCVRM[1] 0.035A
AK3
+VCCSST VCCSATAPLL[1] PAD T146 T147 PAD
1 2 V12
DCPSST 0.032A VCCSATAPLL[2]
AK1 BJ18
VCCFDIPLL 6mA VCCME3_3[1]
AM8
0.1U_0402_10V6K
0.1U_0402_10V6K 09/03/31 HP VCCME3_3[2]
AM9
FDI
C260
C256 09/03/31 HP +1.05VS AM23
VCCIO[1] 0.085A VCCME3_3[3]
AP11 1
AP9
+V1.1A_INT_VCCSUS VCCME3_3[4]
1 2 Y22
0.1U_0402_10V6K DCPSUS
AH22
C257 VCCIO[9] 2
IBEXPEAK-M_FCBGA1071
B +3VALW P18 AT20 B
VCCSUS3_3[29] VCCVRM[4] +1.8VS
1 2 0. 2A@3.3V U19
SATA
VCCSUS3_3[30] +1.05VS
PCI/GPIO/LPC
0.1U_0402_10V6K AH19
C261 VCCIO[10]
U20
VCCSUS3_3[31]
AD20
VCCIO[11]
1U_0402_6.3V4Z
U22
VCCSUS3_3[32]
C263
AF22 1
+3VS VCCIO[12]
AD19 +1.05VS L5
0. 4A@3.3V VCCIO[13] +V1.05S_VCCA_A_DPL
1 2 V15 AF20 1 2
0.1U_0402_10V6K VCC3_3[5] VCCIO[14] 2 10UH_LB2012T100MR_20%_0805
VCCIO[15] AF19 1
C262 V16 AH20 1
VCC3_3[6] VCCIO[16] + C265
1
Y16 AB19 1U_0402_6.3V4Z 220U_B2_2.5VM_R15
VCC3_3[7] VCCIO[17] C264 @ R264 @
AB20
+VCCP VCCIO[18] 2 2
AB22 0_0603_5%
VCCIO[19] +1.05VS
AD22
0. 1A@1.1V VCCIO[20]
AT18
2
V_CPU_IO[1]
4.7U_0603_6.3V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C268
C269
2
0_0402_5% 10UH_LB2012T100MR_20%_0805 1
2 2 2 R270 D4 R271 D5
1
RTC
1
2m A@3.3V IBEXPEAK-M_FCBGA1071 2 2
1U_0402_6.3V4Z
0.1U_0402_10V6K
C275
09/02/03 HP 1 1
A C273 C274 A
1U_0402_6.3V4Z 1U_0402_6.3V4Z
2 2
2 2
09/03/31 HP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(5/6)-PWR
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 17 of 45
5 4 3 2 1
5 4 3 2 1
U 4I U 4H
AY7 H49 AB16
VSS[159] VSS[259] VSS[0]
B11 VSS[160] VSS[260] H5
B15 J24 AA19 AK30
VSS[161] VSS[261] VSS[1] VSS[80]
B19 K11 AA20 AK31
VSS[162] VSS[262] VSS[2] VSS[81]
B23 K43 AA22 AK32
VSS[163] VSS[263] VSS[3] VSS[82]
B31 K47 AM19 AK34
VSS[164] VSS[264] VSS[4] VSS[83]
B35 K7 AA24 AK35
VSS[165] VSS[265] VSS[5] VSS[84]
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
B43 L18 AA28 AK43
VSS[167] VSS[267] VSS[7] VSS[86]
B47 VSS[168] VSS[268] L2 AA30 VSS[8] VSS[87] AK46
D B7 L22 AA31 AK49 D
VSS[169] VSS[269] VSS[9] VSS[88]
BG12 L32 AA32 AK5
VSS[170] VSS[270] VSS[10] VSS[89]
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 M12 AB30 AM11
VSS[174] VSS[274] VSS[14] VSS[93]
BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 VSS[176] VSS[276] M20 AB32 VSS[16] VSS[95] AD24
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
BB42 M34 AB43 AM22
VSS[178] VSS[278] VSS[18] VSS[97]
BB49 VSS[179] VSS[279] M38 AB47 VSS[19] VSS[98] AM24
BB5 VSS[180] VSS[280] M42 AB5 VSS[20] VSS[99] AM26
BC10 M46 AB8 AM28
VSS[181] VSS[281] VSS[21] VSS[100]
BC14 M49 AC2 BA42
VSS[182] VSS[282] VSS[22] VSS[101]
BC18 M5 AC52 AM30
VSS[183] VSS[283] VSS[23] VSS[102]
BC2 M8 AD11 AM31
VSS[184] VSS[284] VSS[24] VSS[103]
BC22 N24 AD12 AM32
VSS[185] VSS[285] VSS[25] VSS[104]
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BC40 VSS[188] VSS[288] P22 AD30 VSS[28] VSS[107] AM38
BC44 VSS[189] VSS[289] P30 AD31 VSS[29] VSS[108] AM39
BC52 VSS[190] VSS[290] P32 AD32 VSS[30] VSS[109] AM42
BH9 P34 AD34 AU20 +3VS
VSS[191] VSS[291] VSS[31] VSS[110]
BD48 P42 AU22 AM46
VSS[192] VSS[292] VSS[32] VSS[111]
BD49 P45 AD42 AV22
VSS[193] VSS[293] VSS[33] VSS[112]
BD5 P47 AD46 AM49
VSS[194] VSS[294] VSS[34] VSS[113]
1
BE12 R2 AD49 AM7
VSS[195] VSS[295] VSS[35] VSS[114] R179
BE16 R52 AD7 AA50 CRACK_BGA 30
VSS[196] VSS[296] VSS[36] VSS[115]
BE20 T12 AE2 BB10
VSS[197] VSS[297] VSS[37] VSS[116]
6
BE24 T41 AE4 AN32 100K_0402_5%
VSS[198] VSS[298] VSS[38] VSS[117] Q4A
BE30 T46 AF12 AN50
2
VSS[199] VSS[299] VSS[39] VSS[118]
BE34 T49 Y13 AN52 2N7002DW T/R7_SOT-363-6
C VSS[200] VSS[300] VSS[40] VSS[119] C
BE38 VSS[201] VSS[301] T5 AH49 VSS[41] VSS[120] AP12 16 PCH_NCTF6 2
BE42 VSS[202] VSS[302] T8 AU4 VSS[42] VSS[121] AP42
BE46 U30 AF35 AP46
1
VSS[203] VSS[303] VSS[43] VSS[122]
BE48 U31 AP13 AP49
VSS[204] VSS[304] VSS[44] VSS[123] +3VS
BE50 U32 AN34 AP5
VSS[205] VSS[305] VSS[45] VSS[124]
BE6 U34 AF45 AP8
VSS[206] VSS[306] VSS[46] VSS[125]
BE8 P38 AF46 AR2
VSS[207] VSS[307] VSS[47] VSS[126]
BF3 V11 AF49 AR52
VSS[208] VSS[308] VSS[48] VSS[127]
1
BF49 P16 AF5 AT11 CR ACK_BGA
VSS[209] VSS[309] VSS[49] VSS[128] R178
BF51 V19 AF8 BA12
VSS[210] VSS[310] VSS[50] VSS[129]
BG18 VSS[211] VSS[311] V20 AG2 VSS[51] VSS[130] AH48
3
BG24 V22 AG52 AT32 100K_0402_5%
VSS[212] VSS[312] VSS[52] VSS[131] Q4B
BG4 V30 AH11 AT36
2
VSS[213] VSS[313] VSS[53] VSS[132]
BG50 VSS[214] VSS[314] V31 AH15 VSS[54] VSS[133] AT41 2N7002DW T/R7_SOT-363-6
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47 16 PCH_NCTF7 5
BH15 V34 AH24 AT7
VSS[216] VSS[316] VSS[56] VSS[135]
BH19 V35 AH32 AV12
4
VSS[217] VSS[317] VSS[57] VSS[136]
BH23 V38 AV18 AV16
VSS[218] VSS[318] VSS[58] VSS[137] +3VS
BH31 VSS[219] VSS[319] V43 AH43 VSS[59] VSS[138] AV20
BH35 V45 AH47 AV24
VSS[220] VSS[320] VSS[60] VSS[139]
BH39 V46 AH7 AV30
VSS[221] VSS[321] VSS[61] VSS[140]
BH43 V47 AJ19 AV34
VSS[222] VSS[322] VSS[62] VSS[141]
1
BH47 V49 AJ2 AV38 CR ACK_BGA
VSS[223] VSS[323] VSS[63] VSS[142] R234
BH7 V5 AJ20 AV42
VSS[224] VSS[324] VSS[64] VSS[143]
C12 V7 AJ22 AV46
VSS[225] VSS[325] VSS[65] VSS[144]
6
C50 V8 AJ23 AV49 100K_0402_5%
VSS[226] VSS[326] VSS[66] VSS[145] Q5A
D51 W2 AJ26 AV5
2
VSS[227] VSS[327] VSS[67] VSS[146]
E12 W52 AJ28 AV8 2N7002DW T/R7_SOT-363-6
VSS[228] VSS[328] VSS[68] VSS[147]
E16 Y11 AJ32 AW14 16 PCH_NCTF19 2
VSS[229] VSS[329] VSS[69] VSS[148]
E20 Y12 AJ34 AW18
VSS[230] VSS[330] VSS[70] VSS[149]
E24 Y15 AT5 AW2
1
VSS[231] VSS[331] VSS[71] VSS[150] +3VS
E30 VSS[232] VSS[332] Y19 AJ4 VSS[72] VSS[151] BF9
B E34 Y23 AK12 AW32 B
VSS[233] VSS[333] VSS[73] VSS[152]
E38 Y28 AM41 AW36
VSS[234] VSS[334] VSS[74] VSS[153]
E42 Y30 AN19 AW40
VSS[235] VSS[335] VSS[75] VSS[154]
1
E46 Y31 AK26 AW52 CR ACK_BGA
VSS[236] VSS[336] VSS[76] VSS[155] R88
E48 Y32 AK22 AY11
VSS[237] VSS[337] VSS[77] VSS[156]
E6 Y38 AK23 AY43
VSS[238] VSS[338] VSS[78] VSS[157]
3
E8 Y43 AK28 AY47 100K_0402_5%
VSS[239] VSS[339] VSS[79] VSS[158] Q5B
F49 Y46
2
VSS[240] VSS[340] IBEXPEAK-M_FCBGA1071
F5 P49 2N7002DW T/R7_SOT-363-6
VSS[241] VSS[341]
G10 Y5 16 PCH_NCTF26 5
VSS[242] VSS[342]
G14 Y6
VSS[243] VSS[343]
G18 Y8
4
VSS[244] VSS[344]
G2 VSS[245] VSS[345] P24
G22 T43
VSS[246] VSS[346]
G32 AD51
VSS[247] VSS[347]
G36 AT8
VSS[248] VSS[348]
G40 AD47
G44
G52
VSS[249]
VSS[250]
VSS[251]
VSS[349]
VSS[350]
VSS[351]
Y47
AT12
BGA Ball Cracking Prevention and Detection
AF39 AM6
VSS[252] VSS[352]
H16 AT13
VSS[253] VSS[353]
H20 AM5
VSS[254] VSS[354]
H30 AK45
VSS[255] VSS[355]
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IBEXPEAK-M_FCBGA1071
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IBEX-M(6/6)-GND
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 18 of 45
5 4 3 2 1
5 4 3 2 1
V33 8
9
V33
V33 10
GND 11
+5VS
GND 12 Placea caps. near HDD CONN.
13
GND
V5 14
0.1U_0402_10V6K
1U_0603_10V4Z
10U_0805_10V4K
10U_0805_10V4K
V5 15
C383
C398
C738
C384
16 +5VS 1 1 1 1
V5
17
GND
18
Reserved
19
GND 2 2 2 2
20
V12
V12 21
V12 22
GND 23
09/08/26 Delete Briadwood function GND 24
CONN@
P-TW O_121056-22251_NR
GND
7 09/02/13 HP
+5VS
DP
8 PAD T143 Placea caps. near ODD CONN.
9
V5
V5 10 +5VS
10U_0805_10V4K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
MD 11
GND 12
C376
C735
C736
C731
GND 13 1 1 1 1
GND 14
15
GND
SANTA_202001-1_13P-T 2 2 2 2
+5VS
+3VS
SDM10U45-7_SOD523-2
12/03 HP
2
2
0_1206_5%
R839
B B
1
Q85A
1
2N7002DW T/R7_SOT-363-6
+DPB_3V
+DPD_VCC
0.01U_0402_16V7K
10U_0805_10V4Z
2
1 1 +5VALW +5VALW
@
F2 12/03 HP
R840
C904
C905
12/03 HP
100K_0402_5%
2
2 2
1
R891 R892
DP_EN 15
@R841
10K_0402_5% 10K_0402_5%
2
1
DP_EN
DDC_EN 15
JDP1
3
20 DP_PWR
19 RTN
12/19 HP MB_DP_HPD_CONN# 18
HP_DET MB_DP_DCAD R893 1 2N7002DW T/R7_SOT-363-6
15 MB_DP_AUXN_CONN 17 2 0_0402_5% 2 5 2N7002DW T/R7_SOT-363-6
AUX_CH- Q84A Q84B
16
GND
15 MB_DP_AUXP_CONN 15
4
AUX_CH+
14
GND
12/19 11/22 HP
MB_DP_DCAD 13
CA_DET
5.1M_0402_5%
1M_0402_5%
11 21
LAN3_shield GND
R843
CRT Connector
+CRTVDD
+5VS +RCRT_VCC +CRTVDD D9
F1 D6 4 2 VGA_G
1.1A_6VDC_FUSE CH491D_SC59 VIN IO1
1 2 2 1 VGA_R 3 1
IO2 GND
W=40mils
@ CM1293A-02SR_SOT143-4
1 +CRTVDD
C277
1 D10 1
0.1U_0402_10V6K 4 2 VGA_B
2 SUYIN_070912HR015S239ZR_15P VIN IO1
JP4 3 1
IO2 GND
6
11 @ CM1293A-02SR_SOT143-4
R294 1 2 VGA_RE R472 1 2 0_0805_5% VGA_R 1
28 VGA_RED
0_0805_5% 7
D_DDCDATA +CRTVDD
12
R304 1 2 VGA_GR R473 1 2 0_0805_5% VGA_G 2 D11
28 VGA_GRN
0_0805_5% 8 4 2 D _ HSYNC
VIN IO1
13
R318 1 2 VGA_BL R565 1 2 0_0805_5% VGA_B 3 D _VSYNC 3 1
28 VGA_BLU IO2 GND
0_0805_5% 9
5.6P_0402_50V8J
5.6P_0402_50V8J
5.6P_0402_50V8J
VGA_GND 14 16 @ CM1293A-02SR_SOT143-4
2
R334
75_0402_1%
R323
75_0402_1%
R322
75_0402_1%
C350
C343
C342
1 1 1 4 17
10
1
+5VS +5VS D_DDC CLK 15 CONN@
R1001 5
C284 C285 09/10/13 HP 2 2 2 0_0402_5%
1
0.1U_0402_10V6K 0.1U_0402_10V6K
1 2 1 2
2
09/11/12 HP 09/09/03 HP
VGA_GND
U6 12/20
D _HSYNC 28
74AHCT1G125GW_SOT353-5
OE#
P
R279
R280
R281
R277
G
1
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
U7
D_VSYNC 28
OE#
P
3
2
2
74AHCT1G125GW_SOT353-5 1 1
3
C286 C287
@ @ 1 2 6 1
28 D_DDCDATA CRT_DDC_DATA 15
5P_0402_50V8C 5P_0402_50V8C R688 0_0402_5%
2 2 2N7002DW T/R7_SOT-363-6
L Place cloce to U4
5
Q94A
28 D_DDCCLK 1 2 3 4 CRT_DDC_CLK 15
R689 0_0402_5%
2N7002DW T/R7_SOT-363-6
D_HSYNC & D_VSYNC
L should be routed to
Q94B
3 L Place cloce to U4 3
L7 L8
S INDUC_ 68NH +-5% CS0805-68NJ-S S INDUC_ 68NH +-5% CS0805-68NJ-S
15 DAC_RED DAC_R ED 1 2 DAC _RE 1 2 RED_R 28
L9 L10
S INDUC_ 68NH +-5% CS0805-68NJ-S S INDUC_ 68NH +-5% CS0805-68NJ-S
15 DAC_GRN DAC_GRN 1 2 DAC _GR 1 2 GREEN_R 28
L11 L12
S INDUC_ 68NH +-5% CS0805-68NJ-S S INDUC_ 68NH +-5% CS0805-68NJ-S
15 DAC_BLU DAC _BLU 1 2 DAC_BL 1 2 BLUE_R 28
27P_0402_50V8J
27P_0402_50V8J
27P_0402_50V8J
150_0402_1%
150_0402_1%
150_0402_1%
C281
C282
C283
1 1 1
R273 1
R274 1
R275 1
09/11/12 HP
2 2 2
2
@ @ @
09/10/13 HP
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT Connector
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 20 of 45
A B C D E
5 4 3 2 1
1
R293 2K_0402_5%
D JLVDS1 R286 D
CONN@ 100K_0402_5%
INVPW R_B+ 1 2 +3VS
2
R898 1 3 4
+LCDVDD 2 0_0805_5% 5 6 D31
12/05 RF 7 8 12/05 RF LID_SW #
9 10 2 1 LID_SW # 14,25,30
+5V_W EBCAM W EBCAM_ON 09/04/21 HP
DISP_OFF# 11 12 IN V_PW M_R R900 1
13 14 2 0_0402_5% INV_PW M 15
CH751H-40PT_SOD323-2
15 16
16 USB20_P12
R287 1 2 0_0402_5% USB20_P12_R 17 18
ED ID_DATA EDID_DATA 15
16 USB20_N12
R288 1 2 0_0402_5% U SB20_N12_R 19 20
EDID_CLK EDID_CLK 15 1
680P_0402_50V7K
21 22 C297
15 LVDS_ACLKN 23 24 LVDS_B2P 15
15 LVDS_ACLKP 25 26 LVDS_B2N 15 2
27 28 LVDS_B1P 15
15 LVDS_A0N 29 30 LVDS_B1N 15
15 LVDS_A0P 31 32 LVDS_B0P 15
15 LVDS_A1N 33 34 LVDS_B0N 15
15 LVDS_A1P 35 36
15 LVDS_A2N 37 38 LVDS_BCLKP 15
15 LVDS_A2P 39 40 LVDS_BCLKN 15
41 42
11/27 Change the footprint
ACES_87216-4016_40P
C
Webcam POWER CIRCUIT C
0.01U_0402_16V7K
0.1U_0402_10V6K
4.7U_0805_10V4Z
1 100K_0402_5%
R290
@ 47P_0402_50V8J
C293
C294
C295
1 1 1
1
C751
2
2 2 2
2
09/04/21 HP
1 2
R285 0_0805_5% LCD POWER CIRCUIT
680P_0402_50V7K
680P_0402_50V7K
@ 47P_0402_50V8J
C289
@ 47P_0402_50V8J
C290
1 1
1
1
C749
C750
+LCDVDD
2
B 2 2 +LCDVDD B
LED panel to prevent inrush current
1
@ R295 Q17
Q102 100_0402_1% 1 3 SI2301CDS-T1-GE3 1P SOT23-3
S
+3VS
SI2301CDS-T1-GE3 1P SOT23-3
09/07/03 Compal
2
S
3 1
G
B+ INVPW R_B+
2
R296 1 2 1M_0402_5% +5VS
1
6
1
G
2
R1006 @ C1014 @
220K_0402_5% 2N7002DW T/R7_SOT-363-6 2 R297 1 2 47K_0402_5% C299 1 2 0.1U_0402_10V6K 09/05/14 Compal
2
Q95A
2
1 1 1
1
0.22U_0603_25V7K C1015 @ C300 C301 C302
1
1
@
+3VS R1007 @ 2 2 2
OUT
100K_0402_1%
15 ENAVDD 2
IN Q19
GND
DTC124EKAGZT146 NPN SC59-3
1
1
C291
680P_0402_50V7K R298
3
09/09/14 HP 100K_0402_5%
2
09/04/13 HP
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LCD CONN & Q-Switch & GPIO Ext.
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 21 of 45
5 4 3 2 1
5 4 3 2 1
S
0.1U_0402_10V6K 0.1U_0402_10V6K
D
3 1
1
2N7002DW T/R7_SOT-363-6 Q55 1 1 1 1 1 0.1U_0402_10V6K
1
R556 R555 29,30,33,35,43 ADP_PRES 2 C512 C507 C510 C511 1 1 1 1
1
R432 C508
G
2
10K_0402_5% 10K_0402_5% 10K_0402_5% R586 0.1U_0402_10V6K C523 C524 C525 C526
2 2 2 2 2 0.1U_0402_10V6K
47K_0402_5%
0.1U_0402_10V6K 0.1U_0402_10V6K 2 2 2 2
2 2
6
R588 0.1U_0402_10V6K 0.1U_0402_10V6K
2
2 1
47K_0402_5%
3
16 CLK_PCIE_LAN_REQ# 6 1 CLK_LAN_REQ#
D Q54B D
Q80A +1.8V_LAN_D +1.2V_+1.0V_LAN
2N7002DW T/R7_SOT-363-6 15,29,30,32,33,35,38,39,40 SLP_S3# 5
11/20 HP 0.1U_0402_10V6K
2N7002DW T/R7_SOT-363-6
1 1 1 1 1 1
4
LAN_PWR_EN# 41
C513 C514 C527 C528 C529 C530
0.1U_0402_10V6K
2 2 2 2 2 2
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
09/04/23 HP
1 2
C970 4.7U_0805_10V4Z
U15 1 2 +1.8V_LAN_D
R927 8059@ 0_0402_5%
CLK_LAN_REQ# 42 LED 59 1 2 LAN_ACT# 23,28
CLKREQn LED_ACTn
14 PCIE_PRX_DTX_P6 0.1U_0402_10V6K 2 1 C506 PCIE_ RXP2_LAN49 60 R928 8072@ 0_0402_5%
0.1U_0402_10V6K 2 TX_P LED_LINK10/100n
14 PCIE_PRX_DTX_N6 1 C509 PCIE_RXN2_LAN50 62 R465 1 2 10K_0402_5% +3V_LAN
TX_N LED_LINK1000n LANLINK_STATUS#
14 PCIE_PTX_C_DRX_P6 54
RX_P PCI-E LED_DUPLEXn
63 LANLINK_STATUS# 16,23,28
14 PCIE_PTX_C_DRX_N6 53
PCIE_WAKE# RX_N
15,24,29 PCIE_WAKE# 6 46 1 2 +3V_LAN
55
WAKEn TEST TESTMODE R929 8072@ 0_0402_5%
16 CLK_PCIE_LAN_PCH REFCLKP
16 CLK_PCIE_LAN_PCH# 56 8 1 2 +1.8V_LAN_D
R436 REFCLKN AVDDH
13,16,24,27,29 PLT_RST# 1 2 0_0402_5% 5 R930 8059@ 0_0402_5%
PERSTn
19 +1.8V_LAN_D
AVDD
23 LAN_MDI0P 17
MDIP0 POWER NC
22
23 LAN_MDI0N 18 23 1 2 +3V_LAN
MDIN0 NC R931 8072@ 0_0402_5%
C
23 LAN_MDI1P 20
MDIP1 & AVDD
28
C
23 LAN_MDI1N 21 1 2 LAN_ACT#
MDIN1 R932 8059@ 0_0402_5%
23 LAN_MDI2P 26
MDIP2 Media GROUND VDDO_TTL
1
23 LAN_MDI2N 27 40 +3V_LAN 1 2 +1.2V_+1.0V_LAN
MDIN2 VDDO_TTL R933 8059@ 0_0402_5%
23 LAN_MDI3P 30 45
MDIP3 VDDO_TTL +1.8V_LAN_D +1.8V_LAN
23 LAN_MDI3N 31 61 1 2 +3V_LAN
MDIN3 VDDO_TTL R934 8072@ 0_0402_5%
LAN_EE_CLK 38 2 1 2 +1.2V_+1.0V_LAN
LAN_ EE_DATA VPD_CLK VDD R935 8072@ 0_0402_5%
41
VPD_DATA EEPROM VDD
7
13 2 1
Remove 8075@ 09/02/03 HP VDD 0_0805_5% 8072@ R941
34 33
SPI_DO VDD
35 39 +1.2V_+1.0V_LAN
SPI_DI FLASH VDD
37 44 1 2 +3V_LAN
SPI_CLK VDD
36
SPI_CS
MEMORY VDD
48 LAN_PIN48 R936 8059@ 0_0402_5%
58 +1.2V_+1.0V_LAN 1 2 +1.2V_+1.0V_LAN
LAN_X1 VDD R937 8072@ 0_0402_5%
15 65
LAN_X2 XTALI CLOCK EAPD
14
XTALO
51 1 2 +1.8V_LAN_D
LAN_DIS#_D 1 NC R938 8059@ 0_0402_5%
2 10 52
R653 0_0402_5% LOM_DISABLEn(USB_DM-) NC
9 32
Remove 8075@ 09/02/03 HP SWITCH_VAUX(USB_DP+) (PD18LDO)NC 09/04/21 HP
57
SMALERTn
11 64
SWITCH_VCC(LOM_DISABLEn) SMCLK
+3V_LAN 1 2 12
R939 8072@ 0_0402_5% 47 VAUX_AVLBL
+3VS VMAIN_AVLBL No Connect
24
C521 2 09/04/23 HP Reserved
1 27P_0402_50V8J 4 25
CTRL18 Reserved
+3V_LAN 2 1 3 29
CTRL12 Reserved
2
1 R919 8059@
2 10K_0402_5% 16 Analog 43
LAN_X1 R437 4.99K_0402_1% RSET SMDATA LAN_PIN48 1 2 +1.2V_+1.0V_LAN
Y5 88E8072-NNC1C000_QFN64 Remove 8075@ 09/02/03 HP R940 8072@ 0_0402_5%
25MHZ_20P_1BG25000CK1A LAN_X2
+1.2V_+1.0V_LAN 1 2
1
B 2 1 C952 4.7U_0805_10V4Z B
C522 27P_0402_50V8J Close as possible to Pin 58
+3V_LAN
12/03 HP
2
+3V_LAN
+1.2V_+1.0V_LAN
R433 R434 D42 +1.5VALW
4.7K_0402_5% 4.7K_0402_5% 1 2 LAN_DIS#_D
16 LAN_DIS#
8072@ 8072@ 8072@ U 44 8072@
U14 CH751H-40PT_SOD323-2 C531 1 3 4 2 1
2
3
8072@
LAN_PWR_EN# 5 Q80B
2N7002DW T/R7_SOT-363-6
4
A A
+1.2V_+1.0V_LAN:
8072: 1.2V Security Classification Compal Secret Data Compal Electronics, Inc.
G
i
g
a
L
A
N
8
8
E
8
0
5
9
/
8
8
E
8
0
7
2
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
8059: 1.0V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-48 92P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 22 of 45
5 4 3 2 1
5 4 3 2 1
22 LAN_MDI0P LAN_MDI0P
LAN_MDI0N
22 LAN_MDI0N
LAN_MDI1P
22 LAN_MDI1P
LAN_MDI1N
22 LAN_MDI1N
LAN_MDI2P
22 LAN_MDI2P +V_3P3_LAN_LED
LAN_MDI2N
D 22 LAN_MDI2N D
LAN_MDI3P
22 LAN_MDI3P +3V_LAN
LAN_MDI3N
22 LAN_MDI3N
1 10K_0402_5%
R457
1 10K_0402_5%
R519
JP5
2
+V_3P3_LAN_LED 13 Yellow LED+
LAN_ACT# R442 1 2 300_0402_5% 14
22,28 LAN_ACT#
2
Yellow LED- +3V_LAN
SHLD1 16
MDO3- 8
PR4-
1 2 9 CB_IN# 16
+1.8V_LAN @ 680P_0402_50V7K C539 MDO3+ DETECT PIN1
7 2
PR4+
0.1U_0402_10V6K
11/20 HP MDO1- 6 C719
PR2-
11/11 HP @ 0.1U_0402_10V6K 1
2
MDO2- 5 1
PR3-
C943
R282 U35
0_0603_5% LAN_MDI0N 12 13 MDO0- MDO2+ 4
TD4- MX4- MDO0- 28 PR3+ 2
MDO1+ 3
1
PR2+
MDO0- 2
LAN_MDI0P MDO0+ R444 PR1-
11 14 MDO0+ 28 10
TD4+ 1:1 MX4+ 75_0402_1% MDO0+ DETCET PIN2 11/25 HP
1
TRM_CT MCT0 C541 1 PR1+
1 2 10 15 2 0.01U_0402_16V7K 1 2 15
C540 TCT4 MCT4 SHLD1
+V_3P3_LAN_LED 11
0.1U_0402_10V6K LAN_MDI1N MDO1- Green LED+
9 16 MDO1- 28
TD3- MX3- LANLINK_STATUS# R445 1 Fix CB_IN# can't work 09/01/06
16,22,28 LANLINK_STATUS# 2 300_0402_5% 12 Green LED-
1 2
C C971 FOX_JM3611A-P1123-7HC C
09/04/29 HP 1U_0402_6.3V4Z
LAN_MDI1P 8 17 MDO1+ R446 1 2
TD3+ 1:1 MX3+ MDO1+ 28
75_0402_1% @ 680P_0402_50V7K C542
1 2 TRM_CT 7 18 MCT1 C544 1 2 0.01U_0402_16V7K 1 2
C543 TCT3 MCT3
0.1U_0402_10V6K LAN_MDI2N 6 19 MDO2-
TD2- MX2- MDO2- 28
+3V_LAN +V_3P3_LAN_LED
LAN_MDI3P 2 23 MDO3+ R448
TD1+ 1:1 MX1+ MDO3+ 28
75_0402_1% 20 mil
1 2 TRM_CT 1 24 MCT3 C548 1 2 0.01U_0402_16V7K 1 2 C549 1 2
C547 TCT1 MCT1 LANLINK_STATUS#
1 2
0.1U_0402_10V6K NS892402 1G 1000P_1808_3KV7K R471 0_0402_5%
LAN_ACT#
2
D39
PJDLC05_SOT23-3
B B
1
11/19 ESD
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Magnetic & RJ45
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 23 of 45
5 4 3 2 1
A B C D E
WWAN 1
JP6
1
CONN@
2 2
WLAN +3V_WLAN +1.5VS
09/01/23 HP 3 3 4 4 11/22 HP
C550
39P_0402_50V8J
C551
39P_0402_50V8J
C552
39P_0402_50V8J
5 6
5 6
@ 0.01U_0402_16V7K
@ 0.1U_0402_10V6K
@ 4.7U_0805_10V4Z
7 8 UIM_PW R 1 1 1
7 8
0.01U_0402_16V7K
0.1U_0402_10V6K
4.7U_0805_10V4Z
9 10 UIM_DATA
9 10
C557
C558
C554
C555
C553
C556
11 12 UIM_CLK 1 1 1 1 1 1
11 12 UIM_RST
13
13 14
14 09/01/13 Port80 Delete
15 16 UIM_VPP 2 2 2
15 16
T92 PAD 17 18
17 18 M_W XMIT_OFF# 2 2 2 2 2 2
T93 PAD 19 19 20 20
21
21 22
22 11/20 HP
23 23 24 24
1 25 26 W W AN_DET# 1
25 26 W W AN_DET# 16
27
27 28
28 2009/03/31 HP
29 29 30 30 11/07 HP
31 32 +3V_WWAN
31 32
33 33 34 34
11/07 HP 35 36 +3V_WLAN
35 36 USB20_N9 16
37 37 38 38 USB20_P9 16
0.01U_0402_16V7K
0.1U_0402_10V6K
4.7U_0805_10V4Z
39 39 40 40 15,22,29 PCIE_W AKE#
C559
C560
C561
+3V_WWAN 41 42 W W _LED# 1 1 1 JP7
41 42 W W _LED# 29
43 44 PCIE_W AKE# 1 2
43 44 R750 1 @ 10K_0402_5% 1 2
45 45 46 46 2 3 3 4 4
47 48 +3VALW R459 1 2 5 6 +1.5VS
47 48 2 2 2 10K_0402_5% 5 6
49 50 14 CLKREQ_W LAN# 7 8
49 50 7 8
T94 PAD 51 52 9 10
51 52 9 10
14 CLK_PCIE_MCARD_PCH 11 12
11 12
53 54 14 CLK_PCIE_MCARD_PCH# 13 14
GND1 GND2 13 14
15 16
FOXCONN AS0B226-S40N-7F 52P 15 16
17 17 18 18
09/01/13 Port80 Delete 19 20 XMIT_D_OFF#
U17 19 20
21 21 22 22 PLT_RST# 13,16,22,27,29
1 CH1 CH4 6 D14
14 PCIE_PRX_DTX_N4
R461 1 2 0_0402_5% PC IE_C_RXN4 23 23 24 24
16,29 W W AN_TRANSMIT_OFF# 1 2 M_W XMIT_OFF# 14 PCIE_PRX_DTX_P4
R462 1 2 0_0402_5% PCIE_C_RXP4 25 25 26 26
2 5 +3V_WWAN 27 28
Vn Vp CH751H-40PT_SOD323-2 27 28
29 30
29 30
3 4 14 PCIE_PTX_C_DRX_N4 31 32
CH2 CH3 31 32
14 PCIE_PTX_C_DRX_P4 33 34
@ S DIO(BR) NUP4301MR6T1 TSOP-6 +3V_WWAN 33 34
35 36
+3V_WLAN 35 36
@ 37
37 38
38 09/08/26 HP
D15 UIM_DATA 1 2 C1004 39 40
39 40
@ DAN217T146_SC59-3 22P_0402_50V8J 41
41 42
42 09/02/02 HP
JP8 3 09/07/18 HP 43 44 W L_LED#
43 44 W L_LED# 29
4 1 UIM_PW R 1 45 46
2 UIM_VPP GND VCC UIM_RST 45 46 2
5 VPP RST 2 2 47 47 48 48
UIM_DATA 6 3 UIM_CLK 49 50
I/O CLK 49 50
7 DET 1 T95 PAD 51 51 52 52
+3VALW
C562
18P_0402_50V8J
53 54
GND1 GND2
4.7U_0805_10V4Z
0.1U_0402_10V6K
2 +3VALW
C563
C564
8 1 1
GND
1 10K_0402_5%
9 FOXCONN AS0B226-S40N-7F 52P
GND
1
R469
09/09/29 HP CONN@
R467 @
@ 47K_0402_5% @ 2 2
Q32
2
2
3
S
R470 SI2301CDS-T1-GE3 1P SOT23-3
2
G
CONN@ TAITW _PMPAT6-06GLBS7N14N0 30 MC2_DISABLE 1 2 2
@ R942 220K_0402_1% +3V_WLAN
UIM_PW R 10K_0402_5% D XMIT_D_OFF# 2 1 W LAN_TRANSMIT_OFF# 16
1
D16 CH751H-40PT_SOD323-2
1
09/07/03 HP @ 1
5W Add to prevent leakage issue.
3
S
C928
1 2
G
2 SI2305BDS_SOT23 0.1U_0402_10V6K
30 MC1_DISABLE
R885 Q87
220K_0402_1% 2
1 D
C645 +3VALW
0.1U_0402_10V6K 1
7W
2
09/07/03 HP 1 @ 2 +3VS
R918 0_0805_5%
+3VALW
09/09/05 HP
3 +3V_WWAN 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WWAN/NAND mini
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 24 of 45
A B C D E
CAP SWITCH BOARD. 09/02/14 HP INT_KBD CONN.
+3VL +3VS +VREG3_51125 +VREG3_51125 +3VS
KSO[0..13]
30 KSO[0..13]
KSI[0..7]
30 KSI[0..7]
R479 5.1K_0402_5%
R480 5.1K_0402_5%
1
1
JP11 JP12 CP2 @
1 2 KSO11 1 2 KSO11 CP1 @ KSI_D_14 1 8
1 2 KSO0 1 2 KSO0 KSO11 KSI_D_8
3 3 4 4 3 3 4 4 1 8 2 7
30 CAP_RST_EC 5 6 CAP_RST_EC KSO2 5 6 KSO2 KSO0 2 7 KSI_D_12 3 6
2
5 6 W L/BT_LED# KSO5 5 6 KSO5 KSO2 KSI_D_10
29 W L/BT_LED# 7 8 7 8 3 6 4 5
7 8 KSI_D_14 7 8 KSI_D_14 KSO5
9 9 10 10 9 9 10 10 4 5
14,30 CAP_CLK 1 R681 2 0_0402_5% CAP_CLK_R 11 12 CAP_CLK_R KSI_D_8 11 12 KSI_D_8 100P_1206_8P4C_50V8K
R682 2 0_0402_5% CAP_DAT_R 11 12 CAP_DAT_R KSI_D_12 11 12 KSI_D_12 100P_1206_8P4C_50V8K
14,30 CAP_DAT 1 13 13 14 14 13 13 14 14
30 CAP_INT 1 R683 2 0_0402_5% C AP_INT_R 15 16 C AP_INT_R KSI_D_10 15 16 KSI_D_10
15 16 KSI_D_0 15 16 KSI_D_0 CP3 @ CP4 @
17 17 18 18 17 17 18 18
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
STB_LED# 19 20 STB_LED# KSI_D_4 19 20 KSI_D_4 KSI_D_0 1 8 KSI_D_3 1 8
28,29 STB_LED# 19 20 19 20
2 2 2 ON /OFF# 21 22 ON /OFF# KSI_D_2 21 22 KSI_D_2 KSI_D_4 2 7 KSO3 2 7
28 ON/OFF# 21 22 21 22
1 10K_0402_5%
R481
@ C644
@ C588
@ C587
KSI_D_3 25 26 KSI_D_3 KSI_D_1 4 5 KSO4 4 5
ACES 85203-12021 12P P1.0 KSO3 25 26 KSO3
27 27 28 28
1 1 1 CONN@ KSO8 29 30 KSO8 100P_1206_8P4C_50V8K 100P_1206_8P4C_50V8K
KSO4 29 30 KSO4
31 32
2
@ 100P_0402_50V8J
KSI_D_11
KSI_D_9
1
2
CP7 @
8
7
KSO12 55 56 KSO12 KSO9 3 6
55 56
C583
1000P_0402_50V7K
C584
0.1U_0402_10V6K
C585
4.7U_0805_10V4Z
JP13 KSO13 57 58 KSO13 KSO12 4 5
CONN@ ACES 88021-12011 12P 57 58
1 1 1 59 60
59 60 100P_1206_8P4C_50V8K
1 1
H DA_SDOUT_MDC 2 2
3 3
4 4
13 HDA_SDOUT_MDC 61 63
GND1 GND3
5 5 6 6 62 GND2 GND4 64
HDA_SYNC _MDC 7 7 2 2 2
13 HDA_SYNC_MDC 8 8
13 HDA_SDIN1 1 2 HDA_SDIN1_MDC 9 9 10 10
CONN@ HIROSE FH12HP-30S-1SV 55 30P
R482 33_0402_5% 11 11 R483 2 0_0402_5%
12 12 1 HDA_BIT_CLK_MDC 13
@
1 2 11/11 HP
GND
GND
GND
GND
GND
GND
C586
@ 10P_0402_50V8J D18
D17 2 KSI_D_3
13
14
15
16
17
18
2 KSI_D_0 KSI3 1
13 HDA_RST#_MDC R908 1 2 0_0402_5% KSI0 1 3 KSI_D_11
3 KSI_D_8
BAW 56W -7-F 3P C/A SOT-323
09/01/15 HP BAW 56W -7-F 3P C/A SOT-323 D20
D19 2 KSI_D_4
2 KSI_D_1 KSI4 1
KSI1 1 3 KSI_D_12
3 KSI_D_9
BAW 56W -7-F 3P C/A SOT-323
BAW 56W -7-F 3P C/A SOT-323 D22
D21 2 KSI_D_5
2 KSI_D_2 KSI5 1
KSI2 1 3 KSI_D_13
3 KSI_D_10
BAW 56W -7-F 3P C/A SOT-323
BAW 56W -7-F 3P C/A SOT-323 D23
2 KSI_D_6
KSI6 1
3 KSI_D_14
Power button
+3VL
TrackPoint CONN.
1
R484
100K_0402_5%
JP16
+5VS 1 1 2
2
2 +5VS
3 3 4 SP_DATA 30
ON /OFF# 4
1 2 ON/OFFBTN_KBC# 30 30 SP_CLK 5 5 6
R486 6
7 7 8 1
47_0402_5% +3VALW 8 C589
1 9 10
G1 G2 0.1U_0402_10V6K
11 12
C591 @ G3 G4 2
1 2
1U_0603_10V4Z R487 100K_0402_5% ACES_87153-08011
2 D25
1 2 PW RBTN_OUT# 15,28,30
CH751H-40PT_SOD323-2
@ 09/07/17 HP
09/03/31 Update Pin Out
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MDC/KBD/ON_OFF/LID
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 25 of 45
5 4 3 2 1
+5VALW USB_VCCA
2
R488
+5VALW (2A,100mils ,Via NO.=4) 10K_0402_5%
U20
BT Connector
1
1
GND OUT
8 W=100mils JP17
2 7 1
IN OUT 1
150U_B2_6.3VM_R35M
3 6 2
GND
IN OUT 16 USB20_N0 2
29,33 SLP_S4 SLP_S4 4 5 3 JP18
EN# OC# 16 USB20_P0 3
0.1U_0402_10V6K
1000P_0402_50V7K
1 1 4 4 1 +3VAUX_BT
D C593 UP7534BRA8-15 MSOP 8P 5 D
1 1
9
+ GND 2 USB20_P8_R R489 1 0_0402_5%
6 2 USB20_P8 16
4.7U_0805_10V4Z GND 3 U SB20_N8_R R490 1 0_0402_5%
7 GND 6 4 2 USB20_N8 16
2
C594
C595
C592 8
2 2 2 GND 7 5 BT_LED 29
CONN@ SUYIN_020167MR004S511ZR_4P
ACES_87212-05G0_5P
CONN@
USB_VCCA USB_VCCB
D26 +3VALW Q35 +3VAUX_BT
J1 1 6 SI2301CDS-T1-GE3 1P SOT23-3
I/O1 I/O4
2 1
2 5 09/09/14 HP
REF1 REF2 USB_VCCA
S
PAD-SHORT 2x2m 3 1
D
USB20_P0 3 4 U SB20_N0
I/O2 I/O3
C596
C597
09/02/17 ESD
+5VALW USB_VCCB
0.1U_0402_10V6K
@ PJUSB208_SOT23-6
G
2
1
1
1
R492 C1013 R1005 1 1
10K_0402_5% @ 470_0402_5%
2
R491 2
2
+5VALW 2 2
(2A,100mils ,Via NO.=4) @ 10K_0402_5%
0.1U_0402_10V6K
10U_0805_10V4K
09/02/10 HP
1
U21 R493 D
1
1 GND OUT 8 W=100mils JP19 16 BT_OFF 1 2 2
2 7 1 G
IN OUT 1
150U_B2_6.3VM_R35M
C 3 6 2 220K_0402_1% S C
GND
16 USB20_N3
3
IN OUT 2
@ 0.1U_0402_10V6K
@ 1000P_0402_50V7K
SLP_S4 4 5 3 Q100
EN# OC# 16 USB20_P3 3
1 1 4 2N7002_SOT23-3
C598 UP7534BRA8-15 MSOP 8P 4
1 1 5
9
@ + GND
6
@ 4.7U_0805_10V4Z GND
7
2 GND
C600
C601
@ C599 8
2 2 2 GND 09/09/14 HP
CONN@ SUYIN_020167MR004S511ZR_4P
D27
1 6
I/O1 I/O4
2 REF1 REF2 5 USB_VCCB
USB20_P3 3 4 U SB20_N3
I/O2 I/O3 09/02/17 ESD
@ PJUSB208_SOT23-6
+5VALW USB_VCCC
2
R790
+5VALW (2A,100mils ,Via NO.=4) 10K_0402_5%
09/02/10 HP
B U37 B
1
1
GND OUT
8 W=100mils JP29
2 7 1
IN OUT 1
150U_B2_6.3VM_R35M
3 6 2
GND
IN OUT 16 USB20_N1 2
SLP_S4 4 5 3
EN# OC# 16 USB20_P1 3
0.1U_0402_10V6K
1000P_0402_50V7K
1 1 4
C773 UP7534BRA8-15 MSOP 8P 4
1 1 5
ACCELEROMETER
9
+ GND
6
4.7U_0805_10V4Z GND
7
2 GND
C775
C776
C774 8
2 2 2 GND +3VS
CONN@ SUYIN_020167MR004S511ZR_4P U22
LIS302DL
+3VS 1
VDD_IO
+3VS 6 2
VDD GND
0.1U_0402_10V6K
10U_0805_10V4K
4
GND
C602
C603
16 ACCEL_INT# 8 5
INT 1 GND
9 10 1 1
INT 2 GND
12
D40 SDO
4,9,10,12,14 SMB_DATA_S3 13
SDA / SDI / SDO 2 2
1 6 4,9,10,12,14 SMB_CLK_S3 14
I/O1 I/O4 SCL / SPC
RSVD 3 +3VS
2 5 USB_VCCC +3VS R494 2 1 10K_0402_5% 7 11
REF1 REF2 CS RSVD
USB20_P1 3 4 U SB20_N1 HP302DLTR8_LGA14_3X5
I/O2 I/O3 09/02/17 ESD
L Must be placed in the center of the system.
@ PJUSB208_SOT23-6
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB & BT Connector & Acclerometer
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 26 of 45
5 4 3 2 1
5 4 3 2 1
+3VS +3VALW
C604
0.1U_0402_10V6K
C605
0.1U_0402_10V6K
C606
0.1U_0402_10V6K
C607
0.1U_0402_10V6K
1 2 TPM_XTALI 1 1 1 1
C611 22P_0402_50V8J
Y6
1
2 2 2 2
2 1 R504
D NC IN 10M_0402_5% D
3 4
NC OUT
2
32.768KHZ 1TJS125DJ4A420P
+3VALW
24
19
10
5
09/01/07 ME 1 2 TPM_XTALO U23
C612 22P_0402_50V8J
VDD
VDD
VDD
VSB
LPC_LAD0 26
Q36 SI2301CDS-T1-GE3 1P SOT23-3 LPC_LAD1 LAD0
23 LAD1
JP20 LPC_LAD2 20
LAD2 +3VS
S
C608
C609
6 5 PLT_RST# 16 Base I/O Address
16 USB20_P10 6 5 LRESET#
1
8 7 1 @ 2 LPC_PD#_TPM 28 0 = 02Eh
G
1 1 15,31 SUS_STAT#
2
8 7 SIRQ LPCPD#
R992 0_0402_5% 27
SERIRQ
1 =* 04Eh
2
CONN@ 21 R497
0.1U_0402_10V6K 16 CLK_PCI_TPM_PCH LCLK
10U_0805_10V4K
R496 ACES_85203-04021 R498 4.7K_0402_5%
10K_0402_5% 2 2 1 2 1 @ 2 S L B 9 6 3 5 TT 1.2 0_0402_5%
2
+3VS @ C610 R499 10_0402_5% 15 8 1 2 1 2
10P_0402_50V8J CLKRUN# TEST1 R500 @
9
1
TESTB1/BADD 4.7K_0402_5%
15,30,31 PM_CLKRUN#
1
R501 +FP_PWR 7
220K_0402_1% D29 PP
16 FPR_OFF 1 2 4 2 USB20_N10 R502 3
VIN IO1 @ 4.7K_0402_5% TPM_XTALO NC
14 12
USB20_P10 XTALO NC
3 1 1
2
IO2 GND TPM_XTALI NC
13
CM1293A-02SR_SOT143-4 XTALI/32K IN
GND
GND
GND
GND
R503
0_0402_5% SLB 9635 TT 1.2_TSSOP28
25
18
11
4
C C
2
Add SIRQ and connect to
pin5. 10/08
+3VL
LPC Debug Port
09/06/30 SMSC
BIOS ROM(4MB)
1
+3VL
R505 B+_DEBUG
12/19 HP 100K_0402_5%
1 SPI ROM Socket SPI ROM
20mils
2
C613 U24 &U1
0.1U_0402_10V6K 8 4
B 2 VCC VSS 8051_RECOVER# JP21 B
SPI_W P# 3 1
W Ground
16 CLK_PCI_DB_PCH 2
20mils SPI_HOLD#_1 LPC_PCI_CLK
+3VL 1 2 7 3
R506 3.3K_0402_5% HOLD 45@ SST25VF032B-66-4I-S2AF Ground
SO 8P 13,30,31 LPC_LFRAME# 4
LPC_FRAME#
30 SPI_CS0# SPI_CS0# 1 13,30,31 SIRQ SIRQ 5
S +V3S
13,16,22,24,29 PLT_RST# 6
SPI_CLK LPC_RESET#
30 SPI_CLK 1 2 6 16,30 PCI_SERR# 7
R968 15_0402_5% C +V3S
13,30,31 LPC_LAD0 8
SPI_SI SPI_SO_R LPC_AD0
30 SPI_SI 1 2 5 2 1 2 SPI_SO 30 13,30,31 LPC_LAD1 9
R969 15_0402_5% D Q R507 22_0402_5% LPC_AD1
13,30,31 LPC_LAD2 10
W IESO_G6179-100000_8P LPC_AD2
13,30,31 LPC_LAD3 11 LPC_AD3
12 VCC_3VA
30 8051TX 13
PWR_LED#
30 8051RX 14
8051_RECOVER# CAPS_LED#
30 8051_RECOVER# 15
NUM_LED#
37 DEBUG_KBCRST 16
20mils SPI_W P# VCC1_PWRGD
+3VL 1 2 1 2 1 2 15_0402_5% 17
R508 3.3K_0402_5% R509 @ 0_0402_5% SPI_CLK_JP R970 SPI_CS0#_JP SPI_CLK
18
SPI_SI_JP R971 SPI_CS#
1 2 15_0402_5% 19
SPI_SO_JP R974 SPI_SI
1 2 22_0402_5% 20
SPI_HOLD#_0 SPI_SO
21
SPI_HOLD#
30 KBC_SPI_CS1#_R 22
Reserved
23 Reserved
SPI_HOLD#_1 2 1 SPI_HOLD#_0 SPI_CS0# 1 2 +3VL 24
0_0402_5% R510 R972 4.7K_0402_5% Reserved
SPI_CLK 2 1 SPI_CLK_JP
0_0402_5% R511 KBC _SPI_CS1#_R 1 2 +3VL ACES_87216-2404_24P
SPI_SI 2 1 SPI_SI_JP Layout Note: R973 4.7K_0402_5% CONN@
0_0402_5% R512
SPI_CS0# 2 1 SPI_CS0#_JP 0-ohm resisters should be placed close to the branch point 09/06/30 SMSC
0_0402_5% R513
A SPI_SO 2 1 SPI_SO_JP A
0_0402_5% R514
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TCG/BIOS ROM/PS2/SW LPC DEBUG
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 27 of 45
5 4 3 2 1
A DPIN
DOCK CONN. 190PIN DOCKING CONNECTOR VA_ON#
+5VS 1
1
+3VALW
C615
C616
(2) PS/2 Interfaces C614
(2) USB 2.channels R516 0.1U_0402_10V6K
(2) SATA Channels +5VALW +3VS DOCK_ID 1 R515 2 1K_0402_5%
1 1
2
C617
C618
C619
C620
(2) Display Port Channels 10K_0402_5%
10U_0805_10V4K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
(1) Ser ial Port D DPB_CTRLCLK R528 1 2 2.2K_0402_5%
2
2
(1) Para llel Port
0.1U_0603_50V4Z
0.1U_0603_50V4Z
1 1 1 1 DDPB_CTRLDATA R530 1 2 2.2K_0402_5%
(1) L ine In 2 2 R926 DD PC_CTRLCLK R529 1 2 2.2K_0402_5%
(1) Li ne Out DDPC_CTRLDATA R531 2.2K_0402_5%
10K_0402_5% 1 2 1 2 ON/OFF# 25
(1) RJ45 (10/100/1000) R988 0_0402_5%
(1) VGA 2 2 2 2 ON/ OFF#_DOCK
12/19 HP 1 @ 2 PW RBTN_OUT# 15,25,30
6 1
(1) 2 LAN indicator LED's STB_LED#_R R989 0_0402_5%
(1) Power Button
(1) I2C interface
Q68A 09/08/26
JP22B
25,29 STB_LED# 2 2N7002DW T/R7_SOT-363-6
PAD T58 D CAD 143 46 DCAD2 T59 PAD
143 46
142 47
1
142 47
15 DPB_HPD 141 141 48 48 DPC_HPD 15
JP22A 15 SLP_S5# 2 1 R517 140 49 ON/ OFF#_DOCK
ADPIN 12A AD P_SIGNAL 140 49 VA_ON#
09/02/11 HP ADP_SIGNAL 1K_0402_5% 139
139 50
50
190 P1 G1 189 15 DDPB_CTRLCLK 138 138 51 51 DDPC_CTRLCLK 15
15 DDPB_CTRLDATA 137 137 52 52 DDPC_CTRLDATA 15
11/25 HP 136
136 53
53 11/25 HP
135 54
135 54
188 1 134 55
MDO3+ 188 1 MDO1+ 134 55
23 MDO3+ 187 2 MDO1+ 23 133 56
MDO3- 187 2 MDO1- 133 56
23 MDO3- 186 3 MDO1- 23 132 57
186 3 LPTSTB# 132 57
185 185 4 4 31 LPTSTB# 131 131 58 58 D_DDCDATA 20
MDO2+ 184 5 MDO0+ 31 LPTAFD# LPTAFD# 130 59
23 MDO2+ 184 5 MDO0+ 23 130 59 D_DDCCLK 20
MDO2- 183 6 MDO0- 31 LPTERR# LPTERR# 129 60 D _VSYNC 20
23 MDO2- 183 6 MDO0- 23 129 60
182 7 31 LPTACK# LPTACK# 128 61 D _ HSYNC 20
182 7 LPTBUSY 128 61
31 LPTBUSY 127 127 62 62
31 LPTPE LPTPE 126 63 R_DO CK_RED 1 R524 2 0_0402_5% DOCK_RED
DETECT LPTSLCT 126 63
181 8 LANLINK_STATUS# 16,22,23 31 LPTSLCT 125 64
181 8 LPD7 125 64 R_DO CK_GRN 1 R525
180 9 LAN_ACT# 22,23 31 LPD7 124 65 2 0_0402_5% DOC K_GRN
180 9 LPD6 124 65 R_D OCK_BLU 1 R526
+5VS 179 10 +5VS 31 LPD6 123 66 2 0_0402_5% DO CK_BLU
179 10 LPD5 123 66
178 11 31 LPD5 122 67
178 11 LPD4 122 67 DCD #1
177 12 31 LPD4 121 68 DCD#1 29,31
177 12 LPD3 121 68 RI#1
176 13 31 LPD3 120 69 RI#1 29,31
176 13 LPD2 120 69 DTR#1
175 14 31 LPD2 119 70 DTR#1 29,31
175 14 LPD1 119 70 CTS#1
174 174 15 15 31 LPD1 118 118 71 71 CTS#1 29,31
173 16 LPD0 117 72 RTS#1
173 16 31 LPD0 117 72 RTS#1 29,31
172 17 LPTSLCTIN# 116 73 DSR#1
172 17 31 LPTSLCTIN# 116 73 DSR#1 29,31
171 18 LPTINIT# 115 74 TXD1
171 18 31 LPTINIT# 115 74 TXD1 29,31
170 19 STB_LED#_R 114 75 RXD1 RXD1 29,31 09/04/22 HP
170 19 USB20_N11 16 114 75
169 20 USB20_P11 16 13,29 SATA_LED# 113 76
169 20 DOCK_ID 113 76
168 21 112 77 DOCK_ID0 16
168 21 ISO_PREP# 112 77
167 22 16,30 ISO_PREP# 111 78 DOCK_ID1 16
167 22 111 78
166 23 110 79
166 23 110 79
165
165 24
24 13 SATA_PTX_DRX_P5 109
109 80
80 11/26 HP
164 25 13 SATA_PTX_DRX_N5 108 81 KBD_DATA
164 25 108 81 KBD_DATA 30
163 26 09/04/29 HP 107 82 KBD_CLK
163 26 107 82 KBD_CLK 30
162 27 106 83 PS2_DATA
162 27 13 SATA_PRX_DTX_P5 106 83 PS2_DATA 30
09/01/15 HP 161 28 09/01/15 HP 105 84 PS2_CLK
161 28 13 SATA_PRX_DTX_N5 105 84 PS2_CLK 30
160 160 29 29 104 104 85 85 LINE_IN_SENSE 29
159 30 103 86 LINE_OUT_SENSE
159 30 16 USB20_N13 103 86 LINE_OUT_SENSE 29
15 DPB_TXP0 158 158 31 31 DPC_TXP0 15 16 USB20_P13 102 102 87 87
15 DPB_TXN0 157
157 32
32 DPC_TXN0 15 101
101 88
88 DOCK_LINE_IN_L 29 12/20 HP
156 33 13 SATA_PTX_DRX_P2 100 89 DOCK_LINE_IN_R 29
156 33 100 89
15 DPB_TXP1 155 34 DPC_TXP1 15 13 SATA_PTX_DRX_N2 99 90
155 34 99 90 DLINE_OUT_L
15 DPB_TXN1 154 154 35 35 DPC_TXN1 15 09/04/29 HP 98 98 91 91 DLINE_OUT_L 29
153 36 97 92 D LINE_OUT_R
153 36 13 SATA_PRX_DTX_P2 97 92 DLINE_OUT_R 29
15 DPB_TXP2 152 37 DPC_TXP2 15 13 SATA_PRX_DTX_N2 96 93
152 37 96 93 DETECT
15 DPB_TXN2 151 38 DPC_TXN2 15 95 94
151 38 95 94
150 39
150 39
15 DPB_TXP3 149 40 DPC_TXP3 15
149 40
15 DPB_TXN3 148 41 DPC_TXN3 15
148 41
147 42
147 42 +5VS
15 DPB_AUX 146 43 DPC_AUX 15 192 191
146 43 G2 G1
15 DPB_AUX# 145 44 DPC_AUX# 15 194 193
145 44 G4 G3
144 45 196 195
144 45 G6 G5
2
12/19 HP 12/19 HP 198
G8 G7
197
R946 200 199
FOX_QL0094L-D26601-8H G10 G9
10K_0402_5%
FOX_QL0094L-D26601-8H
1
SER _SHD DOCK_RED R677 2 1 150_0402_1%
29 SER_SHD
DOC K_GRN R680 2 1 150_0402_1%
3
DO CK_BLU R687 2 1 150_0402_1%
Q68B
+3VALW 2N7002DW T/R7_SOT-363-6
5 ISO_PREP# 09/10/26 HP DOCK_RED C665 1 2 @ 0.1U_0402_10V6K
DOC K_GRN C698 1 2 @ 0.1U_0402_10V6K
12/19 HP 09/07/20 DO CK_BLU C699 1 2 @ 0.1U_0402_10V6K
4
2
R1002
10K_0402_5% @
1
ON /OFF#
3
@
1 Q101B U25 U26 U27
C1012 2N7002DW T/R7_SOT-363-6
0.1U_0402_10V6K @ 5 1 6 DOCK_ID 1 6 DOCK_ID 1 6 DOCK_ID
20 VGA_RED NO IN 20 VGA_GRN NO IN 20 VGA_BLU NO IN
2 +3VS C691 +3VS C692 +3VS C693
4
ON/ OFF#_DOCK
0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K
DOCK_RED 3 4 RED_R 20 DOC K_GRN 3 4 GREEN_R 20 DO CK_BLU 3 4 BLUE_R 20
ISO_PREP# 2 NC COM NC COM NC COM
@
Q101A TS5A3157_SC70-6 TS5A3157_SC70-6 TS5A3157_SC70-6
1
2N7002DW T/R7_SOT-363-6
IN NC<-->COM NO<-->COM
C739
Audio/Express Card/TP/LEDs Connector @ 0.1U_0402_10V6K
1 2
JP27
28 DOCK_LINE_IN_L DOCK_LINE_ IN_L 1 2 DLINE_ OUT_L DLINE_OUT_L 28
28 DOCK_LINE_IN_R
28 LINE_IN_SENSE
DOCK_LINE_IN_R
LINE_IN_SENSE
3
5
1
3
5
2
4
6
4
6
DLINE_OUT_R
LINE_OUT_SENSE
DLINE_OUT_R 28
LINE_OUT_SENSE 28
Serial Port CONN
7 8
7 8 12/20 HP +5VS 09/04/21 Update Footprint
9 10
HDA_BIT_CLK_CODEC 9 10 A_SD# +3VL +3VALW +5VS +3VS +1.5VS JP23
13 HDA_BIT_CLK_CODEC 11 12 A_SD# 30
HDA_SDOUT_CODEC 11 12 MUTE_LED_CNTL CO NN@
13 HDA_SDOUT_CODEC 13 14 MUTE_LED_CNTL 30
D HDA_RST#_CODEC 13 14 H DA_SPKR 09/05/04 HP D
13 HDA_RST#_CODEC 15 16 H DA_SPKR 13 1
HDA_ SYN C_CODEC 15 16 DC D#1 1
13 HDA_ SYN C_CODEC 17 18 28,31 DC D#1 2
17 18 2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
13 HD A_SDIN0 HD A_SDIN0 19 20 D SR#1 3
19 20 CLK_PCIE_EXP_PCH# 14 28,31 DSR#1 3
+3VL 21 22 28,31 RXD1 RXD1 4
21 22 CLK_PCIE_EXP_PCH 14 4
+3VALW 23 24 1 1 1 1 1 RTS#1 5
23 24 28,31 RTS#1 5
+5VS 25 26 PCIE_PTX_C_DRX_N2 TXD1 6
25 26 PCIE_PTX_C_DRX_N2 14 28,31 TXD1 6
C646
C647
C648
C649
C650
+3VS 27 28 PCIE_PTX_C_DRX_P2 CTS#1 7
27 28 PCIE_PTX_C_DRX_P2 14 28,31 CTS#1 7
+1.5VS 29 30 28,31 RI#1 RI#1 8
SLP_S3# 29 30 PCIE_PRX_DTX_N2 2 2 2 2 2 09/04/17 HP DTR#1 8
15,22,30,32,33,35,38,39,40 SLP_S3# 31 32 PCIE_PRX_DTX_N2 14 28,31 DTR#1 9
PCIE_WAKE# 31 32 PCIE_PRX_DTX_P2 SE R_SHD 9
15,22,24 PCIE_WAKE# 33 34 PCIE_PRX_DTX_P2 14 28 SE R_SHD 10 14
PLT_RST# 33 34 14vs15_FF_DETECT 11 10 14
13,16,22,24,27 PLT_RST# 35 36 30 14vs15_FF_DETECT 13
CPPE# 09/07/17 HP 35 36 USB2 0_N4 11 13
16 CPPE# 37 38 USB20_N4 16 12
AMBER_BATLED# 37 38 USB20_P4 09/04/07 HP 12
30 AMBER_BATLED# 39 40 USB20_P4 16
AQUAWHITE_BATLED# 39 40 E-T_3800K-F12N-03R_12P
30 AQUAWHITE_BATLED# 41 42
SATA_LED# 41 42 TP_CLK
13,28 SATA_LED# 43 44 TP_CLK 30
HDD_HALTL ED 43 44 TP_DATA
13 HDD_HALTLED 45 46 TP_DATA 30
STB_LED# 45 46
25,28 STB_LED# 47 48
WL/BT_LED# 47 48
25 WL/BT_LED# 49 50 +3VS
49 50 09/03/31 HP
For Audio power
51
53
51
53
52
54
52
54 +5VALW Card Reader 7 in 1 + 1 Port USB Connector
55 56 +3VS +5VALW JP28
55 56
1
1
2
E-T_1001K-F50E-08R_50P 2 USB20_ N2_R
3
3
0.1U_0402_10V6K
0.1U_0402_10V6K
CO NN@ 4 USB2 0_P2_R
4 SLP_S4
5 SLP_S4 26,33
5 CRD_RST#
1 1 6
6
7 +3VS_CD
7
C651
C944
8 CRD_LOCAL
8
9
2 2 9
10 C LK_PCIE_CARD_PCH 14
C 10 C
11 CLK_PCIE_CARD_PCH# 14
11
12
12
13 PCIE_PTX_C_DRX_P3 14
13
14 PCIE_PTX_C_DRX_N3 14
11/25 HP 14
15
15
16 PCIE_PRX_DTX_P3 14
16 R961 0_0402_5%
19 17 PCIE_PRX_DTX_N3 14
19 17
20 18 1 2
20 18
CO NN@ @ L46
P-TWO_196087-18021-3_18P-T 1 2
1 2 USB20_ N2_R
16 USB20_N2
CRD_LOCAL 16 USB20_P2 USB2 0_P2_R
4 3
4 3
3
Q91B 09/05/13 EMI WCM2012F2S-900T04_0805
09/09/02 HP +3VS 2N7002DW T/R7_SOT-363-6
1 2
5 ADP_PRES 22,30,33,35,43 R962 0_0402_5%
16,24 WWAN_TRANSMIT_OFF#
4
+3VS +3VS_CD
2
R532 J2
W W_LED# 1 6 47K_0402_5% 2 1
24 W W_LED#
CRD_RST# 1 2 PLT_RST# PAD-SHORT 2x2m
2
D
3 1
6
SI2301CDS-T1-GE3 1P SOT23-3
Q90 1
WL_L ED# WL/BT_LED# C950
G
24 WL_LED# 1 2
2
B R950 0_0402_5% 2 1 2 4.7U_0805_10V4Z B
R924 15K_0402_5%
2N7002DW T/R7_SOT-363-6 2
1
1
Q91A C951
0.022U_0402_25V7K +5VS
3
Q38B
2
BT_LED 5 2N7002DW T/R7_SOT-363-6
26 BT_LED
R923
R925 47K_0402_5%
4
47K_0402_5%
1
BT_LED R533 1 2 100K_0402_5% CLKREQ_CARD# +3VS_CD
14 CLKREQ_CARD#
09/09/03 HP
6
+3VS_CD
1
09/09/03 HP @
3
C1011
1
Q23A 2 0.1U_0402_10V6K
1
R1000 2N7002DW T/R7_SOT-363-6 2 Q93B
0_0402_5% @ 5 2N7002DW T/R7_SOT-363-6 100_0402_1%
1
R1010
2
32
6
Q93A
2N7002DW T/R7_SOT-363-6
4
2
A 2N7002DW T/R7_SOT-363-6 A
2
R997
15K_0402_5% C1010
1U_0402_6.3V4Z
1
1
31 SIO_GPIO43
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CR&LEDS&PW&Audio&Exp Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Cu s tom LA-48 92P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 29 of 45
5 4 3 2 1
System Board ID Detect ID R649 R648 R647 R645
+3VL 11/12 change back to 10K to fix K/B issue
Layout Note: DB1 X
09/05/07 SMSC request Q57A
RP21 One pin one cap +3VL 2N7002DW T/R7_SOT-363-6 DB2 X X
1 8 KSI3 6 1
2 7 KSI2 1 2 DBx X X
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
3 6 KSI1 R645 1 210K_0402_5%
C986
C653
C654
C655
C656
C657
4 5 KSI0 1 1 1 1 1 1 1 2 +3VS R647 @ 10K_0402_5% SI1 X
2
0.1U_0402_10V6K
R548 0_0402_5%
10K_0804_8P4R_5% 1 2 SI2 X X
C658
1 09/01/22 HP R648 1 @ 210K_0402_5%
RP22 2 2 2 2 2 2 R649 @ 10K_0402_5% SIx X X
1 8 KSI7 KSI3 3 4
2 7 KSI6 KSI2 PV X
3 6 KSI5 2 KSI1 Q57B
4 5 KSI4 KSI0 2N7002DW T/R7_SOT-363-6 N/A
5
106
119
10K_0804_8P4R_5% N/A
39
58
84
14
49
U29 11/12 remove the duplicate part 1 2
+3VL
128 15 CAP C659 1 2 4.7U_0805_10V4Z R964 10K_0402_5% PVx X
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC2
27 SPI_SI FLDATAOUT CAP
13 KBC_SPI_SI_R 127
HSTDATAOUT/GPIO45
6
SPI_CS0# 97 93 PAD T134
11/25 Change Y5V to X5R HP 09/01/22 HP Q97A N/A
09/06/30 SMSC 27 SPI_CS0# FLCS0# GPIO28
13 KBC_SPI_CS0#_R 96 98 2N7002DW T/R7_SOT-363-6
HSTCS0#/GPIO44 GPIO29 SUS_PW R_ACK 15
27 SPI_SO 95 FLDATAIN GPIO30 99 AC_PRESENT 15 N/A
94 100 AD P_EN 2
13 KBC_SPI_SO HSTDATAIN/GPIO43 GPIO31 09/04/29 HP MUTE_LED_CNTL 29
GPIO32 126 PCI_SERR# 16,27 MV
09/05/13 Compal
25 KSO[0..13]
3
KSO0 21 124 KBC_PW R_ON
KSO0 OUT0/(SCI) KBC_PW R_ON 37
KSO1 20 125 AQUAW HITE_BATLED#
KSO1 OUT1/IRQ8# AQUAW HITE_BATLED# 29
KSO2 19
KSO3 KSO2 AQUAW HITE_BATLED# Q97B
18 123 FET_A 36 5
KSO4 KSO3 CFETA/OUT7/nSMI KBRST# CH751H-40PT_SOD323-21
17 122 2 D32 2N7002DW T/R7_SOT-363-6
Keyboard/Mouse Interface
KSO5 16 121
SMSC_1098-NU_TQFP-128P
FAN_PWM 4
4
KSO6 KSO5 OUT9/PWM2
13 KSO6 OUT10/PWM0 120 BAT_PWM_OUT 35
KSO7 12 118
KSO7 PWM_CHRGCTL CHGCTRL 35 +3VL
KSO8 10
KSO9 KSO8 THM_TRAVEL#
9 KSO9 GPIO01 107 THM_TRAVEL# 34
KSO10 8 79 09/01/10 HP ADP_DET# 1 2
KSO10 GPIO02 ON/OFFBTN_KBC# 25
KSO11 7 80 14vs15_FF_DETECT R558 @ 10K_0402_5%
+5VS KSO11 GPIO03 14vs15_FF_DETECT 29
KSO12 6 81 09/04/03 HP 09/05/11 HP KBRST# 1 2
KSO12/GPIO00/KBRST GPIO04/KSO14 SLP_S3# 15,22,29,32,33,35,38,39,40
KSO13 5 83 R549 @ 10K_0402_5%
RP34 KSO13/GPIO18 GPIO05/KSO15 8051_RECOVER# 27
VC C1_PW RGD 1 2
1 8 KBD_DATA 25 KSI[0..7] 85 PM_RSMRST# R551 10K_0402_5%
GPIO07/PWM3 PM_RSMRST# 15
2 7 KBD_CLK KSI0 29 86 CR ACK_BGA CR ACK_BGA 1 2
KSI0 GPIO08/RXD CRACK_BGA 18
3 6 TP_CLK KSI1 28 87 GFX_SEL R553 100K_0402_5%
TP_DATA KSI2 KSI1 GPIO09/TXD 09/01/15 HP 09/04/10 HP 14vs15_FF_DETECT 1
4 5 27 KSI2 2
KSI3 26 88 AB2A_DATA R560 1 2 0_0402_5% R945 100K_0402_5%
KSI3 GPIO11/AB2A_DATA CAP_DAT 14,25
10K_0804_8P4R_5% KSI4 25 89 AB2A_CLK R561 1 2 0_0402_5%
KSI4 GPIO12/AB2A_CLK CAP_CLK 14,25
KSI5 24 90 R562 1 2 0_0402_5% KBC_PW R_ON 1 2
KSI5 GPIO13/AB2B_DATA CELLS 35
KSI6 23 91 R563 1 2 0_0402_5% R557 10K_0402_5%
RP23 KSI6 GPIO14/AB2B_CLK A_SD# 29
KSI7 22 92 ADP_DET# 09/05/04 HP LATCH 1 2
KSI7 GPIO15/FAN_TACH1 ADP_DET# 43
1 8 SP_CLK 101 09/01/10 HP R559 10K_0402_5%
GPIO16/FAN_TACH2 THM_MAIN# 34
2 7 SP_DATA 102 FET_A 1 2
GPIO17/A20M GATEA20 16
3 6 PS2_CLK TP_CLK 35 R575 10K_0402_5%
29 TP_CLK IMCLK
4 5 PS2_DATA TP_DATA 36 103 FET_B 1 2
29 TP_DATA IMDAT GPIO20/PS2CLK KBD_CLK 28
SP_CLK 61 105 R576 10K_0402_5%
25 SP_CLK KCLK GPIO21/PS2DAT KBD_DATA 28
10K_0804_8P4R_5% SP_DATA 62 4 R987 1 2 0_0402_5%
25 SP_DATA KDAT GPIO24/KSO16 PW RBTN_OUT# 15,25,28
PS2_CLK 66 74 09/07/17 HP
28 PS2_CLK EMCLK ADP_PRES[CKT#2]/GPIO27/WK_SE05 ADP_PRES 22,29,33,35,43
PS2_DATA 67
09/05/15 EMI 28 PS2_DATA EMDAT
+3VL
1 2 TP_CLK 111 AB1A_DATA AB1A_DATA 34 RP24
C989 47P_0402_50V8J AB1A_DATA AB1A_CLK 4.7K_0804_8P4R_5%
112 AB1A_CLK 34
TP_DATA AB1A_CLK AB1A_CLK
1 2 Access Bus Interface 1 8
C990 47P_0402_50V8J 15,27,31 PM_CLKRUN# 55 109 AB1B_DATA AB1A_DATA 2 7
CLKRUN# AB1B_DATA AB1B_DATA 34
57 110 AB1B_CLK AB1B_CLK 3 6
13,27,31 SIRQ SER_IRQ AB1B_CLK AB1B_CLK 34
AB1B_DATA
16 CLK_PCI_KBC_PCH
RUNSCI_EC#
54
76
PCI_CLK Power Mgmt/SIRQ 73 R564 1 2 0_0402_5%
4 5
16 RUNSCI_EC# EC_SCI# GPIO25 CAP_INT 25
108 PAD T139
GPIO26/KSO17
51 59 09/05/13 HP
Miscellaneous
13,27,31 LPC_LAD3 LAD[3] NC_CLOCKI
50 75 32K_CLK R568 1 2 0_0402_5% The Timing from PWR_GD to
13,27,31 LPC_LAD2 LAD[2] 32KHZ_OUT/GPIO22/WK_SE01 ADP_EN 43
48 60 PGD_IN R569 1 2 220_0402_1%
13,27,31 LPC_LAD1 LAD[1] RESET_OUT#/GPIO06 PM_PW ROK 13,42 PM_PWROK should be more than
46 LPC 78 PW R_GD
13,27,31 LPC_LAD0 LAD[0] PWRGD PW R_GD 32
Bus VCC1_RST#
77 VCC1_PW RGD 37,43 99ms.
13,27,31 LPC_LFRAME# 52 38 OCP 43
LFRAME# ADC_TO_PWM_OUT/GPIO19
16,31 NPCI_RST# 53 PGD_IN 15
LRESET# TEST R572 1
TEST PIN 69 2 1K_0402_5%
C R Y1 70 116 09/05/05 HP
XTAL1 CFETB/GPIO10 FET_B 36
C R Y2 71 113
XTAL2 BAT_LED# AMBER_BATLED# 29
115 8051TX 27
PWR_LED#/8051TX
+VCC0 68 114 8051RX 27
VCC0 FDD_LED#/8051RX PGD_IN
1 2 +3VL 1 2
36 BAT_ALARM 1 R574 100K_0402_5% R577 @ 10K_0402_5%
Alarm [CKT#2]/GPIO36
32.768KHZ 1TJS125DJ4A420P
13 KBC_SPI_CLK_R 2 41 AC_ADP_PRES 35
HSTCLK/GPIO41 AC[CKT#2]/GPIO23
27 SPI_CLK 3 42 1 2 300_0402_5% ADP_A_ID 43
FLCLK ADC2/GPIO40 R957 +3VS
24 MC2_DISABLE 30 65 LATCH 36
GPIO39 Q/GPIO33
1
22P_0402_50V8J
Y7 32 63 1 2 0_0402_5%
IN
OUT
C662
33 40 R581 +3VL
24 MC1_DISABLE GPIO38 AVCC
2
1 1 ISO_PREP#_EC 34 1 2 09/03/24 BIOS team request
GPIO37
AGND
AVSS
1 2 43 R909
VSS
VSS
VSS
VSS
VSS
VSS
VSS
35 PMC ADC1/GPIO46
R958 1 2 300_0402_5% C987 0.1U_0402_10V6K @
NC
NC
43 OCP_A_IN 44
ADC_TO_PWM_IN 09/05/07 SMSC request 10K_0402_5%
R959 300_0402_5%
2 2 KBC1098-NU_VTQFP_128P
2
72
11
37
47
56
104
82
117
45
1
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
R921 1 2 1K_0402_5% AMT_OVERRIDE 13
3
Q85B 09/02/13 HP
1
1 2N7002DW T/R7_SOT-363-6
C972
C973
C974
AQUAW HITE_BATLED# 5
2
+RTCVCC +3VL
09/01/15 HP
4
1
2
R910
R591 UMA 10K_0402_5%
0_0402_5% 2 1
09/04/29 HP R960 0_0402_5% R912 1 @ 2 0_0402_5%
2
1
GFX_SEL
R596 1 2 09/02/13 HP
+VCC0
@ 0_0402_5%
AMT ME Override Function
C664
1U_0603_10V4Z
C666
0.1U_0402_10V6K
1 1
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
11/18 remove
all options of 1091 16,28 ISO_PREP#
ISO_PREP# 1 @ 2 ISO_PREP#_EC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KBC1091
R990 0_0402_5% Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
09/07/20 HP L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 30 of 45
5 4 3 2 1
+3VS
D RP38 D
RXD1 1 8
TXD1 2 7
RTS#1 3 6
09/08/27 HP DTR#1 4 5
+3VS
09/05/18 SMSC 4.7K_0804_8P4R_5%
+3VS 1 2 LPC_PD#_SIO
R994 4.7K_0402_5%
RP37 09/04/17 HP +3VS
1 8 SIO_GPIO23 RP25
2 7 SIO_GPIO41 RI#1 1 8
3 6 SIO_GPIO42 CTS#1 2 7
4 5 DSR#1 3 6
DCD #1 4 5
10K_0804_8P4R_5%
U30 4.7K_0804_8P4R_5%
13,27,30 LPC_LAD0 LPC_LAD0 9 LAD0 RXD1 28,29
13,27,30 LPC_LAD1 LPC_LAD1 11
LPC_LAD2 LAD1 RXD1
Base I/O Address 13,27,30 LPC_LAD2 12 LAD2 RXD1 54 R603 1 @ 2 1K_0402_5% 09/05/18 SMSC
1 2 SYSOPT LPC_LAD3 13 55 TXD1
SERIAL I/F
0 = 02Eh 13,27,30 LPC_LAD3 LAD3 TXD1 TXD1 28,29
R905 10K_0402_5% 56 DSR#1
DSR1# DSR#1 28,29
* 1 = 04Eh 13,27,30 LPC_LFRAME# LPC_LFRAME# 14 1 RTS#1
LFRAME# RTS1# RTS#1 28,29
13 LPC_LDRQ#0 LPC_LDRQ#0 15 2 CTS#1
LDRQ# CTS1# CTS#1 28,29 +5VS
3 DTR#1
LPC I/F
DTR1# DTR#1 28,29
N PCI_RST# 16 4 RI#1
16,30 NPCI_RST# PCI_RESET# RI1# RI#1 28,29
RP35 1 @ 2 LPC_PD#_SIO 17 5 DCD #1
15,27 SUS_STAT# LPCPD# DCD1# DCD#1 28,29
2
1 8 SIO_GPIO43 R995 0_0402_5%
2 7 SIO_GPIO44 15,27,30 PM_CLKRUN# PM_CLKRUN# 18 D35
SIO_GPIO45 CLKRUN#
3 6 16 CLK_PCI_SIO_PCH 19
SIO_GPIO46 SIRQ PCI_CLK LPTINIT# CH751H-40PT_SOD323-2
4 5 13,27,30 SIRQ 20 SER_IRQ INIT# 35 LPTINIT# 28
+3VS 1 2 SIO_PME# 6 36 LPTSLCTIN# LPTSLCTIN# 28
1
C 10K_0804_8P4R_5% R605 10K_0402_5% IO_PME# SLCTIN# LPD0 C
PD0 37 LPD0 28
8 39 LPD1 LPD1 28
14 CLK_14M_SIO CLK14 PD1 +5VS_PRN
CLOCK 40 LPD2 LPD2 28
PD2 LPD3 LPTERR#
41 LPD3 28 1 R609 2
RP36 SIO_GPIO41 PD3 LPD4 4.7K_0402_5%
PARALLEL I/F
21 42 LPD4 28
SIO_GPIO10 SIO_GPIO42 GPIO41 PD4 LPD5
1 8 22 43 LPD5 28
SIO_GPIO12 SIO_GPIO43 GPIO42 PD5 LPD6
2 7 29 SIO_GPIO43 24 44 LPD6 28
SIO _IRQ SIO_GPIO44 GPIO43 PD6 LPD7 RP27
3 6 25 45 LPD7 28
GPIO
SIO_GPIO47 SIO_GPIO45 GPIO44 PD7 LPTSLCT LPD1
4 5 09/08/31 HP 09/04/24 HP 26
GPIO45 SLCT
47 LPTSLCT 28 1 8
09/04/24 HP SIO_GPIO46 27 48 LPTPE LPD0 2 7
GPIO46 PE LPTPE 28
10K_0804_8P4R_5% SIO_GPIO47 28 49 LPTBUSY LPTSTB# 3 6
GPIO47 BUSY LPTBUSY 28
SIO_GPIO10 29 50 LPTACK# LPTSLCT 4 5
GPIO10 ACK# LPTACK# 28
SYSOPT 30 51 LPTERR#
GPIO11/SYSOPT ERROR# LPTERR# 28
SIO_GPIO12 31 52 LPTAFD# LPTAFD# 28 4.7K_0804_8P4R_5%
SIO _IRQ GPIO12/IO_SMI# ALF# LPTSTB# RP28
32 GPIO13/IRQIN1 STROBE# 53 LPTSTB# 28
33 LPD5 1 8
SIO_GPIO23 GPIO14/IRQIN2 LPD4
34 2 7
GPIO23 LPD3 3 6
7 +3VS LPD2 4 5
VTR
10 +3VS
CLK_PC I_SIO_PCH CLK_14M_SIO VCC 4.7K_0804_8P4R_5%
57
EPAD POWER VCC
23
38 RP29
VCC
1
4.7U_0805_10V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
46 LPTAFD# 1 8
R607 R608 VCC LPTINIT#
1 1 1 1 2 7
C689
C690
C668
C667
10_0402_5% 10_0402_5% LPC47N217N-ABZJ_QFN56_8X8 LPD7 3 6
LPD6 4 5
2
2 2 2 2 4.7K_0804_8P4R_5%
1 1
RP26
C670 C671 LPTACK# 1 8
22P_0402_50V8J 10P_0402_50V8J LPTBUSY 2 7
2 2 LPTPE 3 6
B LPTSLCTIN# 4 5 B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Super I/O LPC47N217
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 31 of 45
5 4 3 2 1
+3VS
R610
1 2
1
1 2 1M_0402_5%
40 1.05VS_POK
R668 3.3K_0402_5% R611
+5VALW 10K_0402_5%
10/31
2
8
U31A
1 2 1 2 3
P
+5VS +
R613 76.8K_0402_1% R614 10K_0402_5% 1
O VCCP_EN 38
2VREF_51125 1 2 2VREF_393 2 -
G
+0.75VS 1 2 R615 34.8K_0402_1%
R616 11.5K_0402_1% LM393DR2G_SO8
4
1 2
R617 49.9K_0402_1%
11/20 HP +3VL
1
D37 C672
15,22,29,30,33,35,38,39,40 SLP_S3# 1 2 1 2 1000P_0402_50V7K U28
5
R619 3.3K_0402_5% MC74AHC1G08DFT2G SC70 5P
CH751H-40PT_SOD323-2 2 1
P
IN1
1 4 PW R_GD 30
C673 O
4,38 VCCP_POK 2
IN2
1
3300P_0402_25V7K
3
2 R620 R674
1 2 4.99K_0402_1%
1M_0402_5%
2
+5VALW
11/11 HP
VTTPWRGOOD 4
8
U31B
1 2 1 2 5
P
44 GFXVR_PWRGD +
1
@ R670 3.3K_0402_5% R621 10K_0402_5% 7
11/22 HP 2VREF_393 O R675
2VREF_393 6
-
G
+3VS 1 2 2.49K_0402_1%
R671 75K_0402_1% LM393DR2G_SO8
2
+1.5VS 1 2
R672 34K_0402_1%
+1.8VS 1 2
09/05/13 HP R880 41.2K_0402_1%
09/07/11 HP H3 H7 H8
HOLEA HOLEA HOLEA
1
2
1
R673 C687
30.1K_0402_1% 3300P_0402_25V7K
1
1
H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
H25 H26 H27 H29 H28
HOLEA HOLEA HOLEA HOLEA HOLEA
1
ZZZ1
PCB-LA-4982P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
POK CKT
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 32 of 45
A B C D E
+3VALW to +3VS Transfer +5VALW to +5VS Transfer +1.5VALW to +1.5V Transfer +1.5VALW to +1.5VS Transfer
+3VALW +3VS
B+ SI7326DN-T1-GE3 1N 1212-8 +1.5VALW +1.5VS
U33 +1.5VALW +1.5V U38
1 +5VALW +5VS 09/07/15 EMI AO4430L 1N SOIC-8
2 SI7326DN-T1-GE3 1N 1212-8 L49 Q75 8 1
0.1U_0402_10V6K
5 3 U34 FBMA-L11-453215-121LMA90T_2 AO4430L 1N SOIC-8 7 2
B+
0.1U_0402_10V6K
10U_0805_10V4K
1 1 2 8 1 6 3
C677
C679
0.1U_0402_10V6K
C778
R629 1 1 1 2 7 2 1 5 1 1
1 330K_0402_5% 5 3 6 3 C779 1
2 4
C680
C676 1 1 1 5 C777 10U_0805_10V4K
2
4
C780
10U_0805_10V4K
C781
0.1U_0402_10V6K
C782
0.1U_0402_10V6K
C783
10U_0805_10V4K
10U_0805_10V4K C681 10U_0805_10V4K
1
2 R867 2 2 C678 10U_0805_10V4K 2 2 2
1 1 1 1
4
0_0402_5% 10U_0805_10V4K
2 2 2 R791
R UNON 330K_0402_5% R792
1
R UNON 11/11 HP 2 2 2 2 1 2 R UNON
2
1 0_0402_5%
6
1 C784
1
@ 0.01U_0402_16V7K
1
SLP_S3 2 R630 R631 2
Q1A 820K_0402_5% 470_0402_5%
2N7002DW T/R7_SOT-363-6 R793 R794
1
6
820K_0402_5% 470_0402_5%
2
3
1 1
C686 SLP_S4 2 2N7002DW T/R7_SOT-363-6 C785
0.01U_0402_16V7K Q69A 0.01U_0402_16V7K
5
22,29,30,35,43 ADP_PRES
+1.8V_LAN to +1.8VS Transfer
3
Q1B 2 2
11/20 HP 2N7002DW T/R7_SOT-363-6
4
4
1
0.1U_0402_10V6K
2
5 3
C787
1 1 1
C788
2 C786 10U_0805_10V4K 2
4
10U_0805_10V4K
2 2 2
R795
1 2 R UNON
1 0_0402_5%
C789
@ 0.01U_0402_16V7K
2 11/20 HP
Discharge circuit-1
+1.05VS +5VS
+GFX_CORE
1
1
R634 R637
470_0402_5% 470_0402_5% R797
470_0402_5%
2
2
6
3
SLP_S3 2 SLP_S3 5
3 Q45A Q45B SLP_S4 5 Q95B 3
2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6 +3VL +3VL
1
2N7002DW T/R7_SOT-363-6
4
1
+1.5V +0.75VS +1.8VS +1.5VS
R632 R633
09/07/10 HP 09/07/10 HP 100K_0402_5% 100K_0402_5%
1
2
470_0402_5% 22_0402_5% 470_0402_5% 220_0402_1%
26,29 SLP_S4 SLP_S4 SLP_S3
2
3
6
4
2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6 2N7002DW T/R7_SOT-363-6
1
+3VS
+VCCP
1
09/07/17 Intel
1
100_0402_1% R798
4 R635 22_0402_5% 4
2
2
6
SLP_S3 2
2N7002DW T/R7_SOT-363-6
Q50A SLP_S3 5
Q50B
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/11/06 Title
1
2N7002DW T/R7_SOT-363-6
DC/DC Circuits
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-4 892P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 33 of 45
A B C D E
1 2 3 4
ADP_SIGNAL
PJP1
4 V- ID 3
ADPIN
8 PL6
GND_3
3
1 2
100P_0402_50V8J
1000P_0402_50V7K
9 2 HCB2012KF-121T50_0805
GND_4 V+
1
PC3
1
PC1
PC4
FOX_JPD1131-DB371-7F 100P_0402_50V8J PR1
@15K_0402_5%
PC2
2
PD1 1000P_0402_50V7K
2
PJSOT24CH 3P C/A SOT-23
1
5 5 2 1 1 2
6 PR2 1M_0402_1%
6
7
2
7 PC5 PC6
8 8
1000P_0402_50V7K 0.01U_0402_50V4Z
@SUYIN_200046GR008G102ZR_8P-T
100_0402_5%
100P_0402_50V8J
100P_0402_50V8J
1
1
1K_0402_5%
100_0402_5%
B B
1
1
PR6
PR3
PC7
PR5
PC8
PC9
100P_0402_50V8J
2
2
+3VL VL PR88
2
2
69.8K_0402_1%
1 2
1
PR4
100K_0402_5%
PQ29 PR89 AB1A_DATA 30
MMBT3906LT1G PNP SOT-23 100K_0402_1%
2
E
PD15
30 THM_MAIN#
2
B
2 BAV99W T1G_SC70-3 AB1A_CLK 30
1
D C
PD16 PD17
1
S
3
PQ30
SSM3K7002FU_SC70-3 PR91 PR90 VL
220K_0402_5% 150K_0402_1% +3VL
2
1
4 1 2 HCB2012KF-121T50_0805 100K_0402_5%
B/I
2
5 PH1
2
TS
3 PC11 Close to CPU 100K_0603_1%_TSM1A104F4361RZ
6 1 1000P_0402_50V7K EN0 37
GND PR12
2
8
@SUYIN_20163S-06G1-K PD21 53.6K +-1% 0603
1
PJSOT24CW 3P C/A SOT323 D
1 2 5
P
+ PQ1
3 O 7 2
2
1
1K_0402_5%
100_0402_5%
100P_0402_50V8J
1 2VREF_51125 1 2 6 G SSM3K7002FU_SC70-3
-
G
1
1
PR11
PC27
PR14
2 PR13 PU15B S
3
PD22 1 75K_0402_1% LM393DR SO 8P
4
1
100_0402_5%
100P_0402_50V8J
100P_0402_50V8J
+3VL
PC28
PR15
PC29
1
2
1
PR16
2
2
2
2
210K_0402_1%
2
AB1B_DATA 30
1
30 THM_TRAVEL# AB1B_CLK 30
D D
PD19
1
BAV99W T1G_SC70-3
1.0
PD18
BAV99W T1G_SC70-3
PD20
BAV99W T1G_SC70-3+3VL
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/10/31 Title
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC-IN/ BATTERY CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3942P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 34 of 46
1 2 3 4
A B C D
B+
VIN P2 P4 P4
PL101
PQ101 PQ102 @HCB2012KF-121T50_0805 PQ103
AO4407L 1P SO8 AO4407AL 1P SO8 PR102 1 2 AO4407AL 1P SO8
1 8 8 1 0.01_2512_1% 1 8
2 7 7 2 1 4 CHG_B+ 2 7
3 6 6 3 3 6
5 5 2 3 1 2 5
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
1 PL103
2.2UH_PCMB042T-2R2MS_3A_20%
4
4
ACN
1
ACP
ACDET +
+3VL
PC102
PC103
PC104
1 1 2 1 2 PR104 PC105 1
0.1U_0603_50V7K
PR103 1 2 1U_0603_6.3V6M PC125
2
1
2
PC101 47K_0402_5% 2 47U 25V M D ESR0.36 FK
56K_0402_1% 1 2
0.1U_0603_25V7K
1
1 2 PR105 PR106
PC108
PR101 15K_0402_5% 0_0402_5%
1
1 2
1
PR111 0.01U_0402_16V7K @0.1U_0603_25V7K
D CHGEN# P2
150K_0402_5%
2
G CHG_B+
2
1
S PQ104
3
ADP_EN# VL SSM3K7002FU_SC70-3 PR110
LPREF
ACSET
ACDET
LPMD
ACP
ACN
CHGEN
29 10_0805_5%
PR109 TP
PR138 1 2
1 2 0_0402_5%
5
6
7
8
100K_0402_5% 1 2 8 28 1 2
BATT P2 15,22,29,30,32,33,38,39,40 SLP_S3# IADSLP PVCC
PC109 PC110
D
D
D
D
PR139 1U_0805_25V6K 0.1U_0402_10V7K
1 2 9 27 BST_CHG 1 2 1 2
PR135 1M_0402_5% AGND BTST PR121 PQ106
8
G
BQ24740VREF
S
S
S
100K_0402_1% PU101 0_0402_5% AO4466L 1N SO8
1 2 3 1 2 10 BQ24740RHDR_QFN28_5X5 26 DH_CHG 1 2 BATT
P
4
3
2
1
+ PC111 VREF HIDRV PR145 PL102 PR112
1
O 1U_0603_6.3V6M +3VL 0_0402_5% 10UH +-20% #919AQ-H-100M=P3 5.3A 0.01_1206_1%
1 2 2
-
G
5
6
7
8
PD102
2
PR113 VADJ 12 24 REGN 2 1
VADJ REGN
PR140
2 PR141 2
453K_0402_1%
4.7U_0805_25V6M
4.7U_0805_25V6M
LL4148 LL-34 YEA-SHIN @4.7_1206_5%
PR137 13 23 DL_CHG
2
2
EXTPWR LODRV
1
24.3K +-1% 0603 30 BAT_PWM_OUT 1 2 4
1 1
PC112
PC113
1 2 PR114
422K_0402_1% 1 14 22
2
ISYNSET PGND
1
PR115 PC126
DPMDET
1
PC116 1M_0402_1% PC118 @680P_0603_50V8J
IADAPT
1 2
SRSET
CELLS
3
2
1
2
1
1U_0603_6.3V6M 1U_0603_10V6K PC117
SRN
SRP
2
BAT
PR116 CELLS 30 0.1U_0402_10V7K
2
22.6K_0402_1%
2
PQ107
15
16
17
18
19
20
21
PR117 AO4468L 1N SO8
100K_0402_5%
PR118
BATT
255K_0402_1% IADAPT
1
P2 1 2 +3VL 43 IADAPT
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
PC119
AC Detector
1
100P_0402_50V8J
2
High 11.85
PC114
PC115
PC128
PR119
200K_0402_1% PR120 SRSET 43
22K_0402_5% Low 10.55
8
2
1
5 2 1 CHGCTRL 30
P
+ PR122
O 7
1
1
6 ADP_PRES 22,29,30,33,43 210K_0402_1% PC120 PC121
2
-
G
1
PU103B PR124 0.1U_0603_50V7K @0.1U_0603_25V7K
PR123
41.2K_0402_1% LMV393DR2G SO 8P OP COMPARATOR 147K_0402_1%
4
3 PC122 3
2
1U_0603_6.3V6M
2
2VREF_51125
Charge Detector +3VL
High 17.588
100K_0402_5%
+3VL
1
Low 17.292
PR142
PR126
11K_0402_5% +5VALW
IADAPT 1 2 1
+IN
3
E
PQ108
1 2
1
B
PR125 2 5
604K_0402_1% MMBT3906LT1G PNP SOT-23 V+
C 2 V-
1 2 PC127
PR133
2
1U_0603_10V6K 4
220K_0402_5%
1 2 ACDET 3
OUTPUT PMC 30
PR129 -IN
2
1
VIN P2 VL PD103 CHGEN# 47K_0402_5%
76.8K_0402_1%
@76.8K_0402_1%
CHGCTRL 1 2 2 1 2 PQ109
1
PR128
PR127
2
1
S 1 2
3
PC124 PR150
2
1
0.1U_0402_10V7K 22K_0402_5% PR143
2
+ AC_AND_CHG
O
1 Note: X7R type
1
4 2 AC_ADP_PRES 30 470K_0402_5% 4
2
2
-
G
PU103A
PR131
LMV393DR2G SO 8P OP COMPARATOR
4
10K_0603_0.1%
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3942P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 35 of 46
A B C D
A B C D
1
2 1 1SS355_SOD323-2
1 2 PD1110
PR1100 RLZ27V
1M_0402_5% BATT_A
2
2VREF_51125 PD1100
VL +3VL CH715FPT SC70 PR1106
BATT BATT_B 2 100_0805_5%
1 1 1 2
1
1 1
3
1
PR1103
1
10K_0402_5% PR1104
PC1100 100K_0402_5%
2
2
8
1
PR1105 0.1U_0603_50V4Z B+_DEBUG
B+_DEBUG
2
93.1K_0603_1% 5 PC1102
P
+ 0.1U_0603_50V4Z
7 BAT_ALARM 30
2
2
O
6 -
G
PU10B
1
LMV393DR2G SO 8P OP COMPARATOR
PR1109 4
20K_0402_1%
2
PR1112
0_0402_5%
1
S
3 BATT_IN
D
1 1 2
30 LATCH
1
PR1110 D
8.06K_0402_1% 2 CFET_B
G PQ1102
G
2
S PQ1100 BSS84LT1G_SOT23-3
2
SSM3K7002FU_SC70-3
BATT
2 2
3
PR1114
470K_0402_5% PQ1113B
2
SSM6N7002FU 2N US6
BATT_IN5
1
PR1115
2 470K_0402_5%
4
PQ1105
1
1
PMBT2222A_SOT23-3
3
PR1117
10K_0402_5% PQ1113A
6
43 CFET_A SSM6N7002FU 2N US6
1
CFET_A 1 2
6 2
PR1118
PD1106 PD1107 2 4.7K_0402_5%
PR1119 1SS355_SOD323-2 SX34H SMA
10K_0402_5% 1 2
2
BATT_A_P
1 2 2
PQ1106A
SSM6N7002FU 2N US6
1
3
1
PQ1106B 5 5
SSM6N7002FU 2N US6 3 6 6 3 PR1120
BATT_IN 5 2 7 7 2 470K_0402_5%
1 8 8 1
BATT BATT_A
2
PQ1107 PQ1108
AO4407AL 1P SO8 AO4407AL 1P SO8
3
FET_A 30 3
PQ1109 PQ1110
AO4407AL 1P SO8 AO4407AL 1P SO8 BATT_B
1
1 8 8 1
PMBT2222A_SOT23-3
2 7 7 2 PR1121
470K_0402_5%
3 6 6 3 470K_0402_5%
PR1122 5 5
2
470K_0402_5%
2
BATT_B_P
4
4
PR1124
2
1
PQ1111
2
1
1 2
PR1125
3
1
PD1108 4.7K_0402_5%
FET_B 30 PR1126 SX34H SMA
10K_0402_5% 1 2
2
PD1109
3 2
3
1SS355_SOD323-2
PQ1114B
PQ1112B SSM6N7002FU 2N US6
SSM6N7002FU 2N US6 5
1 2 5
PR1127
4
10K_0402_5%
4
CFET_B
CFET_B
6
6
PQ1114A
PQ1112A SSM6N7002FU 2N US6
4 SSM6N7002FU 2N US6 BATT_IN2 4
BATT_IN 2
1
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Battery selector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3942P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 36 of 46
A B C D
A B C D E
2VREF_51125
1
PC302
1U_0603_16V6K
2
1 1
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
+3VALWP 1 2 1 2 +5VALWP
PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
0.1U_0402_25V6
4.7U_0805_25V6-K
2200P_0402_50V7K
PR305 PR306
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
105K_0402_1% 97.6K_0402_1%
1
1 2 1 2
1
PC318
PC304
PC305
PC306
PC301
PC317
PC303
2
2
5
5
1
PC307 PQ302
ENTRIP2
VFB2
TONSEL
VREF
VFB1
ENTRIP1
2.2U 10V K X5R 0805 25 SIS412DN-T1-GE3 1N POWERPAK1212-8
P PAD
2
4UG1_3V 7 24 4
PQ301 VO2 VO1
2 SIS412DN-T1-GE3 1N POWERPAK1212-8 8 23 PR308 PC309 2
VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR307
PR309 1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2 PR310
1
2
3
3
2
1
0_0402_5% VBST2 VBST1 0_0402_5%
PC308 0_0402_5%
PL302 1 2 0.1U_0402_10V7K UG_3V 10 21 UG_5V 1 2 PL303
4.7UH_PCMC063T-4R7MN_5.5A_20% DRVH2 DRVH1 4.7UH_PCMC063T-4R7MN_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
5
5
6
7
8
LG_3V 12 19 LG_5V
DRVL2 DRVL1
1
SKIPSEL
1
+3VL PR312
VREG5
VCLK
1 PR311 4.7_1206_5% 1
GND
EN0
VIN
4.7_1206_5%
1
+ 4 4 +
2
PU301
2
13
14
15
16
17
18
PQ304 TPS51125RGER_QFN24_4X4 PR314 PC311
1
PC310 2 AON7406L_DFN8-5 @100K_0402_5% 2 150U 6.3V M B2 LESR45M PSL H1.9
+5VLP
1
3
2
1
1
PC312 AO4712L 1N SO8 PC313
RPGOOD 15
2
1000P_0603_50V7K 1000P_0603_50V7K
2
PR315
@620K_0402_5% 51125_PWR
2
1 2 B++
1
PR319
2VREF_51125 @0_0402_5%
PC316
6 ENTRIP1
3 ENTRIP2
+3VEXTLP
2
PC314 @10U_0805_10V6K
0.1U_0603_25V7K +5VLP
3 3
1
PU303
1
PC315 1 PC320
PQ305A PQ305B 22UF 6.3V M X5R 0805 H1.25 VIN PR322
1
220K_0402_5%
SSM6N7002FU 2N US6 SSM6N7002FU 2N US6 PC319 5 64.9K_0402_1% 2.2U_0603_10V6K
2
PJP301 10U_0805_10V6K VOUT
2 5 2
2
GND
PR325
+5VALWP 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
2
4
1
FB
PAD-OPEN 4x4m 3
2
EN
1
PJP303 27 DEBUG_KBCRST
1
PR316 1 2 +3VALW (3A,120mils ,Via NO.= 6) P2 APL5317 PR323
100K_0402_5% +3VALWP 20K_0402_1%
1 2 +5VLP PR326
VL PAD-OPEN 4x4m
2
1
PU302 470K_0402_5%
1
LMV321AS5X_G SOT23 5P OP
2
PR317 PJP302 PR320 1 PR324
+IN
1
2
G PAD-OPEN 2x2m V+
2
2
V-
1
S
3
1
PQ307 PR313 PJP304 PC321 4 1 2 2 1
OUT
11.5K_0402_1%
SSM3K7002FU_SC70-3 @100K_0402_5% 2 1 3
+5VLP VL -IN
PR321
1U_0603_10V6K PR327
PAD-OPEN 2x2m 2 680K_0402_5% PD304
2
1SS355_SOD323-2
2
PJP305
2 1 2 1
4
PD305 DEBUG_KBCRST 27 +3VEXTLP +3VL 4
2 1
VCC1_PWRGD 30,43
PD301
1SS355_SOD323-2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/10/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
EN0 34 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3942P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 37 of 46
A B C D E
A B C D
1 1
B+ PL401
HCB2012KF-121T50_0805
1 2 VCCP_B+
+3VS +VCCP
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
1
1
PC417
PC416
PC401
PC402
PC403
PC404
1 2
PR427 PR401 PR417
2
2
10K_0402_5% @10K_0402_5% 1 2 1 2 0_0603_5%
PR402
BST_VCCP
2.2_0603_5% PC405
DH_VCCP
2
LX_VCCP
0.22U_0603_16V7K
+5VALW
4,32 VCCP_POK
DH_VCCP1
1
5
6
7
8
PR403
0_0402_5% PR404 PQ401
17
16
15
14
13
PU401 2.2_0603_5% AO4474L 1N SO8
1 2
GND
PGOOD
PHASE
UG
BOOT
+6269_VCC
2
4
1 12 1 2 PC406
VIN PVCC
+6269_VCC 2.2U_0603_6.3V6K
3
2
1
2 11 DL_VCCP PL402
VCC LG 0.47U 20% FDVE0630-H-R47M=P3 17.7A
1
PC407 PR405 1 2
2
2.2U_0603_6.3V6K
+VCCP 2
0_0402_5%
1 2 3 10
2
FCCM PGND
1
PR408 + + +
PC410
PC408
PC409
1 2 4 9 SE_VCCP 1 2 4.7_1206_5%
15,22,29,30,32,33,35,39,40 SLP_S3# EN ISEN PR407
PR406
COMP
7.87K_0402_1% 2 2 2
FSET
@0_0402_5%
2
VO
4
FB
1
2
1 2 ISL6269ACRZ-T_QFN16
32 VCCP_EN
5
8
PR428 PC412
PC411 PQ402
0_0402_5%
2
3
2
1
1
@0.1U_0402_25V4K +VCCP AON6718L 1N DFN 1000P_0603_50V7K
FB_VCCP
25.5K +-1% 0402
0.01U_0402_16V7K
1
1
PR409
49.9K_0402_1%
PR410
PC413
2
1
6800P_0603_50V7K
2
PC414
22P_0402_50V8J
2
1
PC415
2
3 3
1 2 1 2 1 2+VCCP
7 H_VTTVID1 PR416 PR411 PR413
51K +-1% 0402 1.58K_0402_1% 10_0402_5%
1
0_0402_5%
2
1 2
PC418 PR415 VSS_SENSE_VTT 7
2
@0.1U_0402_25V6 0_0402_5%
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.05V_VCCP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3942P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 38 of 46
A B C D
A B C D
1 1
+1.5VS_CPU
PU601
1 6
VIN VCNTL +5VALW
10U_0805_6.3V6M
@10U_0805_10V4Z
2 GND NC 5
1
3 7
VREF NC
1
PC601
PC602
2 2
+5VALW PR601
4 8 PC603
2
1K_0402_1% VOUT NC 1U_0603_10V6K
2
9
2
TP
1
PR604
25.5K_0402_1% PR602 G2992F1U_SO8
1 2
15,22,29,30,32,33,35,38,40 SLP_S3#
6
10K_0402_5%
0.1U_0402_10V7K
PQ601A
+0.75VSP
1
@1K_0402_1%
SSM6N7002FU 2N US6
1 2 2 PR603
PR605
1K_0402_1%
1
PD601
1
1SS355_SOD323-2 PC605
PC604
5 10U_0805_6.3V6M
2
PQ601B
1
SSM6N7002FU 2N US6
4
+1.5V
PC606
2
0.1U_0402_16V7K
PJP601
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)
PAD-OPEN 3x3m
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.75VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3942P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 39 of 46
A B C D
A B C D
1 1
PR516 PL501
2 1 1.05VS_B+
15,22,29,30,32,33,35,38,39 SLP_S3# HCB1608KF-121T30_0603
0_0402_5% PC519 1 2 B+
@0.1U_0402_25V6
@1000P_0402_50V7K
@1000P_0402_50V7K
4.7U_0805_25V6M
4.7U_0805_25V6M
2
1
PC504
PC505
PC506
PC507
PR511 PC511
2
5
2.2 +-5% 0402 0.1U_0402_10V7K
BST_1.05V 1 2 1 2 PQ502
2 SIS412DN-T1-GE3 1N POWERPAK1212-8 2
15
14
1
PU501 4
PR524 PR509
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +1.05VSP
1 2 2 13 UG_1.05V 1 2 UG1_1.05V PL503
TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
3
2
1
+1.05VSP 1 2 3 12 LX_1.05V 1 2
PR519 0_0402_5% VOUT LL
PR517
+5VALW +5VALW 1 2 4 11 1 2 14.3K +-1% 0402
V5FILT TRIP
1
PR518 PR503
+1.05VSP 1 2 5 10 +5VALW
316_0402_1% VFB V5DRV PR513
4.12K_0402_1% 1
1
1
6 9 LG_1.05V 4.7_1206_5%
PGOOD DRVL
1
PGND
PC520 PC521 +
GND
2
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4
2
2
PC526 PC514 PC515
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_6.3V6K 2 220U 2.5V M B2 LESR25M TPE H1.9
7
8
1
PC517
PR504 PQ504 680P_0603_50V8J
3
2
1
2
10K_0402_1% AON7702L 1N DFN
2
1.05VS_POK 32
3 3
PJP501
+1.05VSP 1 2 +1.05VS (8A,320mils ,Via NO.= 16)
PAD-OPEN 4x4m
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.05VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3942P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 40 of 46
A B C D
5 4 3 2 1
D D
B+++ B+++
PL800
HCB2012KF-121T50_0805
B+ 1 2
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4700P_0402_25V7K
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PR802
PC819
PC800
PC801
PR800 PR801 PR803
75K_0402_1%
PC818
PC802
PC803
PC804
PC805
105K_0402_1% 75K_0402_1% 75K_0402_1%
2
+1.8V_LANP 1 2 1 2 1 2 1 2 +1.5VALWP
2
+1.8V_LANP +1.5VALWP
2
PR804
0_0402_5%
5
PQ801
1
SIS412DN-T1-GE3 1N POW ERPAK1212-8
1
PU800 4
VO2
VFB2
TONSEL
VFB1
VO1
GND
PQ800 PR805 25
SIS412DN-T1-GE3 1N POW ERPAK1212-8 0_0402_5% P PAD PR806
UG1_1.8V 1 2 0_0402_5%
3
2
1
C 7 24 1 2 UG1_1.5V C
PGOOD2 PGOOD1
4
+1.8V_LANP PR807 8 23 PR808
2.2_0402_5% EN2 EN1 0_0402_5%
2 1 1 2 BST_1.8V 9 22 BST_1.5V 1 2 1 2
VBST2 VBST1 PC807
1
2
3
1
PR809
PGND2
PGND1
1
V5FILT
5
4.7_1206_5% PR810
TRIP2
TRIP1
V5IN
1
4.7_1206_5%
PC808
+
220U 6.3V M C45 R17M SVPE H4.4
1
12
PC809
4 PC812
2
2
+ TPS51124RGER_QFN24_4x4 4.7U_0805_6.3V6K
13
14
15
16
17
18
2
PC810 PC811 2
2
1
4.7U_0805_6.3V6K 1000P_0603_50V7K 4
1
2 PC813
3
2
1
1
PR811 1000P_0603_50V7K
2
7.15K_0402_1% PR812
1 2 18.2K_0402_1%
1
2
3
PQ802 PQ803
AON7406L_DFN8-5 IRFH3707TRPBF 1N PQFN
2
1
1
PR813
PC814 3.3_0402_5%
1U_0603_10V6K
2
B B
+5VALW
4.7U_0805_10V6K
1 2 +3VALW
+3VALW 0_0402_5%
PR814
1
PC815
1
PC816
2
@1000P_0402_50V7K
PR815
100K_0402_5% PR816
0_0402_5%
2
2 1
1
D PC817
2 @1000P_0402_50V7K
22 LAN_PW R_EN#
G
2
S PQ804 PJP800
3
SSM3K7002FU_SC70-3
+1.5VALWP 1 2 +1.5VALW (8A,320mils ,Via NO.= 16)
PAD-OPEN 4x4m
PJP801
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.8V_LANP/1.5VALWP
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A-3 942P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 41 of 46
5 4 3 2 1
8 7 6 5 4 3 2 1
+VCCP
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
PC205
7 H _VID0 H _VID0 H _VID5 2 1 PR271 1K_0402_5% H _VID5 2 1 PR277 @1K_0402_5%
1
PC212
PC201
PC203
PC204
+
1
PC202
PC207
PC208
7 H _VID1 H _VID1 H _VID6 2 1 PR272 @1K_0402_5% H _VID6 2 1 PR278 1K_0402_5%
2
H _VID2 P ROC_DPRSLPVR 2 1 PR273 1K_0402_5% P ROC_DPRSLPVR 2 1 PR279 @1K_0402_5% 2
7 H _VID2
2
5
6
7
8
7 H _VID3 H _VID3
7 H _VID4 H _VID4
3
2
1
G PR226 0.36UH 20% PCMC104T-R36MN1R105 30A G
5
12 CLK_EN#
1
+3VALW
4.7_1206_5%
10K_0402_1%
1
PR211
PR215
PR213
PR214
47K_0402_5% PR216
1 2 CLK_EN# 1_0402_5%
LGATE_CPU2 4
2
VSUM-
1000P_0603_50V7K
1
1 2 PQ202
3
2
1
15 VGATE
PC210
PR219 TPCA8036-H 1N SOP-ADV
0_0402_5%
2
ISEN2
VSUM+
+VCCP 1 2 PR221 @1K_0402_5%
F F
7 PSI# PSI#
2 1 PR283 1K_0402_5%
1 2
PR223 147K_0402_1%
PC211
1 2 1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31
+ VCCP
PR224 PU201 1 2
68_0402_5%
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
1 2
4 H_PROCHOT# PR225 30
0_0402_5% BOOT2
29
UGATE2
1 28
PC220 @56P_0402_50V8 PGOOD PHASE2
2 27
PSI# VSSP2
1 2 3 26
RBIAS LGATE2
4 25 +5VALW
PR227 @4.02K_0402_1% VR_TT# VCCP
E 5 24 E
NTC PWM3
1 2 1 2 6 23
PH202 VW LGATE1
7 22
@470K_0402_5%_TSM0B474J4702RE COMP VSSP1
8 21
FB PHASE1 PR228
1 2 9
ISEN3
UGATE1
10 0_0402_5%
BOOT1
ISUM+
ISEN2
ISEN1
ISUM-
8.06K_0402_1%
1000P_0402_50V7K
VSEN
IMON
PC221 1 2
VDD
RTN
VIN
22P_0402_50V8J 41
AGND
1
PC222
1
PR235
ISL62883HRZ-T_QFN40_5X5
11
12
13
14
15
16
17
18
19
20
2
390P_0402_50V7K PC223
2
1 2 1 2 1U_0603_10V6K
2
PR236
562_0402_1% PC224
PR239 0_0402_5%
1 2 1 2 1 2
PC225
10P_0402_50V8J PR238 PR242 0_0402_5% IMVP_IMON 7
D 3.16K +-1% 0402 1 2 CPU_B+ D
0.22U_0603_25V7K
1 2 1 2
PC227 PR241
150P_0402_50V8J 412K_0402_1% PR244 1_0402_5%
1 2 CPU_B+
+5VALW
1
1
PC228
PC229
PC230
1U_0603_10V6K
0.22U_0603_25V7K
ISEN2
PR246
2
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
ISEN1 11K_0402_1%
5
6
7
8
0.22U_0603_10V7K
0.22U_0603_10V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
1
PC235
PC231
VSSSEN SE
BOOST_CPU1
1
1
PC236
PC237
PC232
PC233
PC234
PC238
PC239
PR274
0_0603_5%
2
UGATE_C PU1 2 1 UGATE1_CPU1 4
2
VSUM-
PR248 PC240
C 2.2_0603_5% 0.22U_0603_10V7K C
3
2
1
VSUM+ 2 1 1 2
PQ205
AO4474L 1N SO8 PL204
0.36UH 20% PCMC104T-R36MN1R105 30A
PHASE_CPU1 1 4 + CPU_CORE
1
0.047U_0603_16V7K
2.61K_0402_1%
1
PR252
0.22U_0603_10V7K
4.7_1206_5%
L F1 2 3 V 1N
PR253
82.5_0402_1%
7 V CCSENSE 1 2
1
3.65K +-1% 0603
10K_0402_1%
2
PR255
PR251 0_0402_5% PR257
PC242 2
PC243 2
2
1
PR256
PR250
1_0402_5%
0.01U_0402_25V7K
PC244 LGATE_CPU1 4
1000P_0603_50V7K
330P_0402_50V7K
2
2
1
PC246
VSUM-
1
3
2
1
PC245
330P_0402_50V7K
2
1
B B
11K_0402_1%
PQ206
2
1
PC248
PR262
7 VSSSENSE 1 2 VSUM+
2
PR260
1.3K_0402_1%
1 2 VSUM-
0.1U_0402_16V7K
1
PC250
2
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/10/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS L A-3942P 1 .0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 42 of 46
8 7 6 5 4 3 2 1
5 4 3 2 1
BQ24740VREF
1
PR1000
165K_0402_1% +3VS
PC1000
2
0.22U_0603_10V7K
2
1 2
+5VS PR1019
0.01U_0402_16V7K
1 2 1 10K_0402_5%
35 IADAPT PR1013 +IN
D D
1
10K_0402_1% 5
V+
36 CFET_A 1 2 2 V- 1 2 OCP# 16
PC1001
PR1014 PR1020
150K_0402_5% 4 0_0402_5%
OUTPUT PR1023
3
2
-IN
1
D
G
PQ1000 @0_0402_5%
1
BSS138LT1G 1N SOT23 W/D 1 2 2
30 OCP
1 3 3 1 PU1000 G
1
LMV321AS5X_G SOT23 5P OP PR1017
D
S
D
3
1
2
G OCP_ADJ 34 105K +-1% 0402
S PQ1002
3
2
SSM3K7002FU_SC70-3
PD1001
1SS355_SOD323-2 PR1021 +3VS
PD1000 200K_0402_1%
1
ADP_SIGNAL 1SS355_SOD323-2 1 2
1
PR1010
D
1 2 3 1 2 1 27.4K_0402_1% PR1012
3.9K_0402_5%
PR1022 10K_0402_5%
1
100_0402_5% PQ1003 1 PR1011
2
+5VS
3900P_0402_50V7K
PR1025
BSS84LT1G 1P SOT23-3 100K_0402_1% PU1
G
2
2
1 2 1
IN+
5
2 VCC+
PC1003
2
2
GND
1
PC1002 4
C 0.01U_0402_16V7K OUT C
SRSET 35 3
IN-
2
1
C LMV331IDCKRG4_SC70-5
1 2 2 PQ1005
PR1028 B MMBT3904WH NPN SOT323-3
100K_0402_5% E
3
VIN +3VS
1 2
1 2OCP_A_IN OCP_A_IN 30
1
PR1032
1
PR1030 100_0402_5% PR1015
1
68K_0402_5% PR1016 100K_0402_1%
100K_0402_1%
PD1003
2
GLZ4.7B_LL34-2
2
1
PR1040
33K_0402_5%
1
2
PR1042
8.06K_0402_1%
4.7K_0402_5%
ADP_EN# 35
2
1
PR1045
+3VL
1
B B
8.66K_0402_1%
E
2
PR1046
B
2
3
C
PQ1006 PQ1007B
2
PD1004
1
1SS355_SOD323-2
PR1059
45.3K_0402_1%
2
2VREF_51125
1 2
PR1062 PQ1007A
1M_0402_5% +3VL
SSM6N7002FU 2N US6
2 ADP_EN 30
1
VL
PR1063
1
130K_0402_1% PR1064
22K_0402_5%
8
2
3
P
+
A 1 ADP_DET# 30 A
O
1
2
-
G
PR1065 PU15A
10K_0402_1%
4
LM393DR SO 8P
2
1 2ADP_A_ID ADP_A_ID 30
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/31 Deciphered Date 2009/10/31 Title
PR1066
10K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ADP_OCP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3942P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 43 of 46
5 4 3 2 1
5 4 3 2 1
PL701
B+ SMB3025500YA_2P
1 2 GFX_B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2
PR702
1
D 0_0603_5% D
GFXVR_IMON 7
PC701
PC727
PC728
0.22U_0603_25V7K
0.22U_0402_6.3V6K
PR701
PC702
PC703
PC704
PC705
22.6K_0402_1%
2 +5VALW 2 1
1 1
1
1_0603_5%
1
PC707
PR703
PC708
PC706
2
1U_0603_6.3V6M
2
PR704
10_0402_5%
ISUM+ VSS_AXG_SENSE 7
1 2
5
6
7
8
ISUM- PQ701
1 2 BST_GFX 1 2 1 2 AO4474L 1N SO8
7 VSS_AXG_SENSE PC709
1
1000P_0402_50V7K PR705 PC710
PC711 2.2_0603_5% 0.22U_0603_16V7K 4
7 VCC_AXG_SENSE 330P_0402_50V7K
1 2
29
10
11
12
13
14
2
9
PR706
+GFX_CORE 10_0402_5% PC712
AGND
RTN
ISUM
ISUM+
VDD
VIN
IMON
BOOT
1 2 330P_0402_50V7K PR733
3
2
1
0_0603_5%
5
5 17
COMP VSSP
1
C 4 18 DL_GFX C
VW LGATE PR707
PR713
1
PR710 PR711 PC717 PR712 2 1 3 19 1 2 +5VALW 2.2_1206_5%
11.5K +-1% 0402 825K_0402_1% 1000P_0402_50V7K 47K_0402_1% RBIAS VCCP PR708 PR709
0_0603_5% 4
1
2 20 3.65K_0805_1% 0_0402_5%
2
PGOOD VID0
2 1 1 2 1 2 2 1
PC718 PH701
1 21
DPRSLPVR
2
CLK_EN# VID1
2
PC716 2.2U_0603_6.3V6K 1 2 1 2
3
2
1
100P 50V J NPO 0402 PR714
VR_ON
PQ702 PC719 10KB_0603_5%_ERTJ1VR103J
2.61K_0402_1%
VID6
VID5
VID4
VID3
VID2
1
PC721 AON6718L 1N DFN 680P_0603_50V7K
22P_0402_50V8J +GFX_CORE
2 1 2 1 1 2 2 1
28
27
26
25
24
23
22
@10K_0402_1% 1 PR717 2
11K_0402_1%
PC720 PR1009 PR1008
1
32 GFXVR_PWRGD
1 2
PC724
2
0_0402_5% 2 1 PR721 0.1U 10V +-10% X7R 0402
0_0402_5% PR722 GFXVR_VID_0 7 PR723 PR725
2 1 GFXVR_VID_1 7
0_0402_5% 2 1 PR724 3.01K_0402_1% @100_0402_1%
B 0_0402_5% PR726 GFXVR_VID_2 7 PR729 B
2 1
0_0402_5% PR727 GFXVR_VID_3 7 82.5_0402_1%
2 1
1
0_0402_5% PR728 GFXVR_VID_4 7
2 1 1 2 1 2
0_0402_5% PR730 GFXVR_VID_5 7
2 1
GFXVR_VID_6 7
2
0_0402_5% 2 1 PR731 PC725
0_0402_5% PR732 GFXVR_EN 7 0.01U_0402_16V7K PC726
2 1
GFXVR_DPRSLPVR 7
@1200P_0402_50V7K
1
ISUM+
ISUM-
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VCCGFX
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3942P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, November 23, 2009 Sheet 44 of 46
5 4 3 2 1
5 4 3 2 1
D D
3
4
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Changed-List History
Size Do cument Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
L A- 3 942P 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Mo nday, November 23, 2009 Sheet 45 of 46
5 4 3 2 1