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ASSP
SWITCHING REGULATOR
CONTROLLER
MB3769A
■ PIN ASSIGNMENT
(TOP VIEW)
RT 6 11 VZ
GND 7 10 VH
VL 8 OUT
9
* : Duty ≤ 5%
** : TA = 25 °C
*** : TA = 25 °C, FPT package is mounted on the epoxy board.
(4 cm x 4 cm x 0.15 cm)
NOTE : Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as detailed in the operational sections data sheet. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
2
MB3769A
■ BLOCK DIAGRAM
S Q
+IN (C) 16 +
R 10 VH
-
+
+
1.85 V + PWM
+ + Comparator 9 OUT
VREF +
1.8 V
DTC -
4
STB 8 VL
STB
FB 3
+IN (OP) 1 +
Error
Amp.
-IN (OP) 2 -
S Q
-
2.5 V Power R
off
CT 5 1.5 V to 3.5 V
RT Triangle Wave +
6 Oscillator
(2.5 V) 8/10 V
STB
V CC 12 -
3
MB3769A
0 to
Operation Amp. Input voltage VINOP -0.2 0 to VREF VCC -3 -0.2 VCC-3 V
VREF
Timing Resistor RT 9 18 50 9 18 50 kΩ
Zener Current IZ - - 5 - - 5 mA
4
MB3769A
■ ELECTRICAL CHARACTERISTICS
(VCC=15V, TA=25°C)
Value
Parameter Symbol Condition Unit
Min Typ Max
Output Voltage VREF IREF = 1 mA 4.9 5.0 5.1 V
Input Regulation ∆ VRIN 12 V ≤ VCC ≤ 18 V - 2 15 mV
Reference
Load Regulation ∆ VRLD 1 mA ≤ IREF ≤10 mA - -1 -15 mV
Section
Temp. Stability ∆ VRTEMP -30 °C ≤ TA ≤ 85 °C - ±200 ±750 µV/ °C
Short Circuit Output Current ISC VREF = 0 V 15 40 - mA
RT=18 kΩ
Oscillator Frequency fOSC 90 100 110 kHz
CT=680 pF
Oscillator
Section Voltage Stability ∆ fOSCIN 12 V ≤ VCC ≤ 18 V - ±0.03 - %
Temp. Stability ∆ fOSC /∆ T -30 °C ≤ TA ≤ 85 °C - ±2 - %
ID - 2 10 µA
Input Bias Current
Dmax Vd = 1.5 V 75 80 85 %
Max. Duty Cycle
5
MB3769A
Value
Parameter Symbol Condition Unit
Min Typ Max
RT = 18 kΩ
Standby * ISTB - 1.5 2.0 mA
4 pin Open
* : VCC = 8V
6
MB3769A
10 kΩ
16 15 14 13 12 11 10 9
1 2 3 4 5 6 7 8
680 pF 18 kΩ
VFB VDTC
TEST INPUT
3.5 V typ.
Voltage at CT
1.5 V typ.
1.05 V
COMP in
0.95 V
90%
50%
OUTPUT
10%
tr tf
td
7
MB3769A
PWM Comparator
Output
Output Wave
Form
Comp. Current (1 V)
-in Wave Form
Comp. Current
+in Wave Form
Comp. Current
Latch Output 2.5 V
Voltage at OVP
OVP Latch
8
MB3769A
■ FUNCTIONS
1. Error Amplifier
The error amplifier detects the output voltage of the switching regulator.
The error amplifier uses a high-speed operational amplifier with an 8 MHz bandwidth (typical) and 6 V/ms slew rate (typical).
For ease of use, the common mode input voltage ranges from -0.2 V to VCC-3 V. Figure 4 shows the equivalent circuit.
VREF
To PWM
Comp.
-IN (OP)
150 Ω
+IN (OP)
700 µA
GND
Protection element
9
MB3769A
To PWM
Comp.
Protection element
VREF VREF
C C R1
DTC DTC
R R2
The quick shutdown function prevents soft start malfunction when the power is turned off and on quickly. After the power is shut
down, soft start is disabled because the DTC terminal has low electric potential from the beginning if the power is turned on
again before the capacitor is discharged. The MB3769A prevents this by turning on the discharge transistor to quickly discharge
the capacitor in the stand-by mode.
10
MB3769A
1
fOSC ~ [kHz] CT :µF
0.8 x CT x RT + 0.0002 ms RT :kΩ
For master/slave synchronized operation of several MB3769As, the CT and RT terminals of the master MB3769A are connected
in the usual way and the CT terminals of the master and slave device (s) are connected together. The slave MB3769A’s RT
terminal is connected to it’s VREF terminal to disable the slave’s oscillator. In this case, set 50/n kΩ (n is the number of master
and slave ICs) to the upper limit of RT so that internal bias currents do not stop the master oscillation.
master slave
RT CT VREF RT CT
5. Overvoltage Detector
The overvoltage detection circuit shuts the system power down if the switching regulator’s output voltage is abnormal or if
abnormal voltage is appeared. The reference voltage is 2.5 V (VREF /2). The system power is shut down if the voltage at pin
13 rises above 2.5 V. The output is kept shut down by the latching circuit until the power supply is turned off (see Figure 3).
11
MB3769A
C
MB3769A
7. Output Section
Because the output terminal (pin 9) carries a large current, the collector and emitter of the output transistor are brought out to
the VH and VL terminals. In principle, VH is connected to VCC and VL is connected to GND, but VH can be supplied from another
power supply (4 to 18 V). Note that VL and GND should be connected as close to the IC package as possible. A capacitor of
0.1 µF or more is inserted between VH and VL (see Figure 9).
12
10
9
7 8
≥ 0.1 µF
12
MB3769A
■ APPLICATION EXAMPLE
12 to 18 V
5V
1A
3.6 kΩ
3.3 kΩ
0.1 µF 1+IN (OP) +IN (C) 16
10 kΩ
2-IN (OP) IN (C) 15 2.4 kΩ
330 pF 20 kΩ
3FB VREF 14
100 kΩ
4DTC OVP 13
MB3769A
5CT VCC 12
6RT VZ 11
7GND VH 10
8VL OUT 9
R
S
220 pF
C
51 kΩ 18 kΩ 10 kΩ 5.1 kΩ 1Ω
Glitch
Point S waveform
13
MB3769A
- -
1 +IN(OP) +IN(C) 16
+ +
47 kΩ
2 -IN(OP) -IN(C) 15
22 3 FB VREF 14
kΩ 4.7 µF
4 DTC OVP 13
5 CT VCC 12
6 RT VZ 11
7 GND VH 10
*:The resistance (22 Ω)
as an output current
* 22 limiter at pin 9 is re-
8 9 Ω quired when driving
22
kΩ 680 18 the FET which is more
10 kΩ 15
than 1000 pF (CGS).
pF kΩ kΩ
43 39 1 +IN(OP) +IN(C) 16
kΩ kΩ 1000
10 27 pF 2 -IN(OP) -IN(C) 15
kΩ kΩ 51
kΩ VREF 14
3 FB
4 DTC OVP 13
5 CT VCC 12
6 RT VZ 11
7 GND VH 10
8 VL OUT 9
10 680 18
kΩ pF kΩ
14
MB3769A
V0
15 kΩ PC1 (5V output)
IN-B 8 OUT-B PC2
3 4
8.2 kΩ 500 Ω
IN-A MB3761 HYS-A
1 6
9 5 500 Ω
6.8 kΩ
MB3769A
14
20 kΩ
PC2
13
7
1 µF 10 kΩ
PC1 100 kΩ
V0 (5V output)
14
VREF
MB3769A
20 kΩ
15 kΩ 8
IN-B 13
3 6 OUT-B OVP
MB3761
8.2 kΩ IN-A HYS-A
1 2
1 µF
5 200 kΩ
6.8 kΩ
15
MB3769A
1 kΩ 500 500 Ω
+
Ω
I1 -
S
3.5 V
2 x I1 2 x I1
Q
-
ICT R
RT +
- 6 CT
5 1.5 V
+
(4 x I1)
2.5 V 300
Ω 150Ω
This circuit shows that if the voltage at the CT terminal is set to 1.5 V or less, one oscillation cycle ends and the next cycle starts.
An example of an external synchronous clock circuit is shown in Figure 17.
1
tcycle - tP = x (3.5 - VL) + (3.5 - VTH)
fOSC fOSC(3.5 - 1.5 ) x 2
16
MB3769A
fOSC ~ 1
0.8 x CT x RT
Make VL high for a large duty cycle for the clamp circuit. The circuits below can be used because the clamp voltage must be
much lower than 1.5 V.
VREF VREF
R1 (4.7 kΩ)
(1.2 V) 8
3
MB3761
(1.2 V)
4
820 Ω 5
0.1 µF R2 (1.2 kΩ) 0.1 µF
A B
17
MB3769A
Fig. 20
1.No Clamp Circuit (Connect with GND)
5V 1V
5 pin
CT (1 V/div) MB74HC04
CT
150 pF VP
GND Level (CT) 5.1 kΩ
Fig. 21
2.Clamp Circuit A (Dividing Resistor)
5V 1V
VP (5 V/div) CT = 220 pF + Prove capacitor (~ 15 pF)
RT = 11 kΩ
CT VP
220 pF 5.1 kΩ
GND Level (CT) VREF
4.7 kΩ
OUT (10 V/div)
0.1 1.2 kΩ
10 V 500 nS µF
Fig. 22
3.Clamp Circuit B (Apply MB3761)
5V 1V
VP (5 V/div) CT = 220 pF + Prove capacitor (~ 15 pF)
RT = 11 kΩ
820 Ω 8
3
OUT (10 V/div) MB3761
4
10 V 500 nS
0.1 µF 5
18
MB3769A
15 V (VCC)
12 10
1 14
2.4 kΩ
2 15
2.4 kΩ
3 16
MB3769A
2.5 V
4
5 9 OUT
6
7 8 13
11 kΩ
19
MB3769A
OVP
10.0
2.0
0.0
0.0 4.0 8.0 12.0 16.0 20.0
0
Power Supply Voltage VCC (V) -30 0 25 50 85
Temp. TA (°C)
Fig. 26 -Reference Voltage vs. Temp. Fig. 27 -“L” level Output Voltage vs.
5.1
VCC = 15 V “L” level Output Current
IREF = 1 mA 3
“L” level Output Voltage VOL (V)
VCC = 15 V
Reference Voltage VREF (V)
TA = 25 °C
±750 µV/C 2
5.0
5
VCC = 15 V
4 TA = 25 °C
0 2 4 6 8 10
“H” level Output Current IOH (mA)
20
MB3769A
500 VH
CT = 100 pF 3 VCC = 15 V VH
400 TA = 25 °C
VL
300 2
VL
Oscillator Frequency fOSC (kHz)
200 1
CT = 680 pF CT = 220 pF
0
20 k 50 k 100 k 200 k 500 k 1M
100
90 Frequency fOSC (Hz)
80
70 CT = 1000 pF
60 Fig. 32 -Oscillator Frequency vs. Temp.
50 VCC = 15 V
Oscillator Frequency fOSC (%)
4
40 100 kHz
30 2
RT (kΩ)
-2
Target
fOSC = 100 kHz
±2 % typ.
-4
Fig. 31 -Duty Cycle vs. Dead Time Control -30 0 25 50 85
Voltage
100 Temp. TA (°C)
VCC = 15 V
Dead Time Control Voltage VDTC (V)
CT = 1000 pF
fOSC = 200 kHz TA = 25 °C Fig. 33 -Dead Time Control Voltage vs.
80 Current(Standby Mode)
fOSC = 500 kHz
5.0
60 VCC = 7 V
4.0 TA = 25 °C
Duty Cycle (%)
40 3.0
2.0
20
1.0
0
0 1 2 3 4 5 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2
Dead Time Control Voltage VDTC (V) Dead Time Control Current IDTC (mA)
21
MB3769A
Phase (deg)
-300
50 fOSC = 200 kHz
Gain
0 -360
10 k 100 k 1M 10 M 45
Frequency f (Hz) 0
-30 0 25 50 85
Temp. TA (°C)
TA = 25 °C
1.5 Fig. 38 -tr/tf of Output and td of
Comparator vs. Temp.
160
VCC = 15 V
1.0 CL = 1000 pF
140
0.5 td
120
0
0 100 200 300 400 500 600 100
tr/tf/td (ns)
80
Fig. 37 -“H” level Output Voltage vs. tr
“H” level Output Current
14.0 60
“H” level Output Voltage VOH (V)
VCC = 15 V
TA = 25 °C
13.5 40
tf
20
13.0
0
12.5 -30 0 -25 50 85
0 Temp. TA (°C)
0 100 200 300 400 500 600
“H” level Output Current IOH (mA)
22
MB3769A
13 pin = 3 V
4 3
3 2
2 1
0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temp. TA (°C) Temp. TA (°C)
23
MB3769A
INDEX-1
.244±.010 .300(7.62)
(6.20±0.25) TYP
INDEX-2
.039 +.012 .060 +.012
-0 -0 .010±.002
(0.99 +0.30 ) (0.25±0.05)
-0 (1.52 +0.30 )
-0
.172(4.36)MAX
.118(3.00)MIN
.100(2.54)
TYP .020(0.51)MIN
.050(1.27) .018±.003
MAX (0.46±0.08)
Dimensions in
1990 FUJITSU LIMITED D160335-2C-2 inches (millimeters)
24
MB3769A
.307±.016
INDEX (7.80±0.40) +.016 +0.40
.268 (6.80 -0.20 )
.209±.012 -.008
“B” (5.30±0.30)
.020±.008
(0.50±0.20)
.050(1.27) .018±.004 +.002 (0.15+0.05 )
∅.005(0.13) M .006
TYP (0.45±0.10) -.001 -0.02
.008(0.20) .008(0.20)
.004(0.10)
.007(0.18) .007(0.18)
.350(8.89) REF MAX MAX
.027(0.68) .027(0.68)
MAX MAX
25
MB3769A
FUJITSU LIMITED
F9601
FUJITSU LIMITED Printed in Japan