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Abstract -A new control technique have been developed, novel load sharing control technique for parallel inverters is
which allows paralleled inverters to share linear or nonlinear put forward.
load in a distributed ac power supply system. All paralleled
inverters have the Same power reference, and are forced the 11. ANALYSIS OF POWR FLOW CONTROLPRINCIPLE
output power to follow the same reference by using a PI
controller in each inverter unit, so that all paralleled inverters A. ConvenlionalPower Flow Confrol Theory
can share the Same output power. The approach has
significant advantages over existing methods, including the A model of two inverters parallel connection is shown
ability to improve reliability and reduce interconnection bus. in Fig.1, in which the inverter connects with the load via a
Principle and scheme of the load-sharing technique is filtering inductance. As well know, the complex power at
analyzed. The experimental resdlts of B three-unit prototype the terminal vo in Fig.1 due to the ith ( i=l,or2) inverter is
system show that the proposed scheme is correct. given by[''
I. INTRODUCTION
.--.*,i
I
Fig3 Parallel syStem of inverter units with the output voltage as Now, the problem is how to control the power flow Of
feedback inverter unit in Fig.4. Although, no matter what control
strategy is adopted in Fig.3, the conclusion about the
Based on the above analysis, a general method on relationship between voltage reference and power flow is
power flow control of inverter parallel system can be unchangeable, different conclusions will get when different
summarized as follows: control strategies is used in Fig.4.
(1): To change the phase angle 'ZJi of the voltage Load voltage and inductor current dual-bops control is
reference, can control the real power flow e from the ifh a typical control strategy for inverters. Parallel system of
inverter units based on the control strategy is shown in
inverter. FigS. Power flow control principle on the parallel system is
(2): To change the amplitude V,, of the voltage discussed as follows.
In Fig.5, the IVR is the instantaneous voltage regulator,
reference, can control the reactive power flow Q, from the which enforces the load voltage to follow the voltage
ith inverter. reference tightly. The output of IVR is supplied as the
inductor current reference of the CR. The CR is the current
regulator, which enforces the inductor current to follow the
B. ModifiedPower Flow Control Theory
inductor current reference tightly.
High performance inverters have some important Generally, the load voltage v, and the voltage
features, such as high voltage regulation precision, and low
total harmonic distortion with various loads. Thus, the references of the ith inverter vmln
can he expressed as:
inverters are typically operated under feedback control to v, = V,, sin wt
realize the desired output waveform.
However, it should he noted that the load voltage is ~ sin( cot
v , =~ V,eln + 'ZJ ")
usually used as feedback to construct closed loop control in Where: w is the angle frequency of the load voltage,
the inverter. Thus, a parallel system of inverter units is
shown in Fig.4. It is distinct from the parallel system shown 'ZJn is the phase difference between the voltage reference
in Fig.3, in which the output voltage of the inverter is used
as the feedback.
of the nth inverter unit and the output voltage, v, is the
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amplitude of the load voltage and v,, is the amplitude of A. Disiribuied Logic Confguraiion
the iih voltage reference. Parallel system of inverter units has different kinds of
In additional, to simplify the analysis, some parallel configuration, such is the central control
assumptions are given: configuration, the maser-slave control configuration, the
( I ) The N R is a proportional controller; the distributed logic control contiguntion and independent
proportional gain is K, . control configuration. Considering the cost, reliability and
complexity of implementation,, the distributed logic
(2) "he CR has very perfect performance, so that the configuration shown in Fig.6 is adopted in the paper. It has
inductor current can follow the current reference only two interconnection buses to transfer the related
completely. information among all the paralleled inverter units. The
n+
Thus, the mathematical model of the nth inverter unit in phase bus is used to transfer the phase angle information, so
Fia.5 can he exmessed as:
I that the voltage references of all the paralleled inverter
+,i = K , *[V,, *sin(ui+@.)-V, *sinoil units have the same frequency and phase angle. The power
1
(3) bus is used to transfer the active power reference
information, so that the voltage references of all the
= 54"
ILn (4)
paralleled inverter units have the same active power
From the equation (3) and (4). we have: reference.
ai,"-K,sin(wf+@,)
--
aVM"
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reference ehWeeffectively.
Hence, the operational principle of the proposed load-
(9) sharing scheme can be expressed as follow:
(1) Active Power sharing: Using the same active power
PR is the active power regulator. is supplied as reference.
the input of the active power regulator. The output of PR is All the paralleled units own the same active power
used as the amplitude of the voltage reference. As reference p,h,. PR is used to control the output of active
discussed in the above, to change the amplihlde of the power to follow the power reference. Thus, all the units
voltage reference can control the active power flow of the output the same active power.
inverter unit; so, the active power regulator can control the (2) Reactive Power sharing: Using PLL (phase locked
output of active power P,+ to follow the active power loop) control
All the units transfer their Phase angle value to the coefficient K,,, , which relies on the parameters of the
phase bus respectively. The phase bus extracts the
maximum value of the phase angles and transfer back to the hardware. Due to the disagreement of the coefficient,
the load is the Same One, the
inverter units as the input of PLL. Thus, the PLL ensure the
voltage phase reference is the same in the paralleled system feedback of the unit is disagreement. Hence, the RMS
and when the active power is sharing, the reactive power is values v,
of the load voltage feedback between all units
almost sharing in the paralleled system too. are disagreement. It is possible that, the error e, in some
(3) Adaptive control of the load voltage feedback
coefficient units is positive and e, in the other units is negative when
In the paralleled system, all the controllen are
implemented by s o h a r e , so the control parameters
V, o VIn.This means it is impossible to let all the error
between parallel inverter modules has no difference. But, in e, equal zero in the same time. Because there exists an
general, it has differences bemeen System panmeters of all integrator Sectionin the RVR controller, the R V will
~ be in
the paralleled units, such as the load voltage feedback
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the positive saturation state or in the negative saturation respectively.
state. Thus, the system cannot run in a right state. It is obvious that the paralleled system has not only
To overcome this problem, an adaptive controller is good current-sharing performancm: hut also low THD and
adopted. The adaptive control law is: high precision of load voltage.
Km = Kshme (eh,
-n' ) + (10)
K , is an adaptive controller. K,,, is the
proportional coefficient of the adaptive controller. The
product of K , and K,, is used as the actual feedback
coefficient. Obviously, when Chum
> P, , the actual
feedback coefficient is less than K , . On the other hand,
when eh, < Pn, the actual feedback coefficient is bigger
than K , . Using the control law will ensure the system to
mn in the right state.
RESULTS
IV. EXPERMENTAL
Fig.8 Static response of the parallel syskm wiul full resistive load
In order to verify the proposed load-sharing scheme, a
parallel system with three inverter units has been built. The
control unit is implemented based on TMS320F240. The
parameters of the unit list as in Table 1.
A. Static Performance
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system when abruptly increasing the load from null to full
Fig.12 Dynamic response ofthe paralleled system with the resistive load
abruptly increasing fromnull 10 full Fig.14 Dynamic response of the parallel system with the resistive load
abruplly decreasing from full to null
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