Poweer Electroniccs

Prof. B.G.
B Fernan
ndes
Dep
partment of Electrical E
Engineeringg

India
an Institute of Technoloogy, Bombaay
Lecture - 6
n my last claass we discussed the neeed for snubbber circuits, the turn on snubber andd turn
Hello, in
off snubb ber. These circuits
c are required
r to protect the device againnst dr by dtt and the vooltage
spike acrross the SCRR. How did wew limit dr by
b dt? We cconnected a small inducctor in seriess with
the thyrisstor. Now, we
w know thatt the currentt through thee inductor caannot change instantaneously
and how do we limit the voltage spike acrosss the SCR? W We use a RC C network.

The seco ond point thhat we discu ussed was a high frequuency pulse pattern is recommended to
trigger th
he thyristor, large numbber of high frequency
f puulses. How do we transsmit these siignals
from thee control cirrcuit to the gate? We use
u a pulse transformer. See here, this is the pulse
transform
mer.

(Refer Sllide Time: 2:25)

It is a sp o transformeer. Why it iss a special tyype? The siggnals or the frequency oof the
pecial type of
signals th hat is transmmitting fromm one side to the anothher side is very high. The principple of
operation n of this trannsformer is same
s as thatt of a 50 herrtz transform
mer. Only thhe type of coore is
different.. See, in a 50 hertz traansformer, we
w use a lam minated corre whereas a high frequuency
transform mer, ferrite core is used.

1
 
(Refer Sllide Time: 3:10)

Ferrite coore, of coursse this is a bigger

b ferritee core, a soliid ferrite corre, these are suitable forr high
frequency y applicationn. So, there are 4 termin nals, primaryy winding annd the seconddary windingg. On
top it is written,
w 1 is to 1, it impplies that thee number of turns in thee primary wiinding is sam me as
the numb ber of turns in the secon ndary windin ng. So, this iis a pulse traansformer uused to isolatte the
power cirrcuit from thhe control cirrcuit.

Now, wh hat are the different

d typees of SCR’ss? We had ddifferent typpes of diodess. Similarly there
are differrent types off SCR’s alsoo. One of th
hem is see hhere, the connverter gradee SCR. Thesse are
slow devvices, they arre used in the circuit wheerein the freequency coulld be 50 herttz and the seecond
one is thhe inverter grade SCR.. So, these are fast devvices, fast ddevices so ssuitable for high
frequency y application
n. So, here iss the modulee that has tw
wo thyristors..

2
 
(Refer Sllide Time: 4:46)

(Refer Slide
S Time: 5:02)
5

Inverter grade
g thyristor, the ratin
ng of each th
hyristor is 445 ampere annd the voltaage rating is 1200
volts. 2 thyristors, see
s they aree connected in this fashhion. See, tthese are thhe 2 thyristoors, 3
terminalss, 3 power terminals
t haave been brought out, aanode of onne, a commoon point annd the
cathode of
o another. See, these 2 terminals forf supplyinng the gate ssignal, cathoode and gatee, see
here cath
hode and gaate. See the contact areaa, this anodee, cathode sso generally the load cuurrent
flows.

3
 
So, see the
t surface area
a that is available
a wh
hereas, see thhe surface aarea that is aavailable forr gate
and cathoode. A smalll current is flowing
f from
m the gate annd it is mounnted on a heat sink. See,, how
elegant itt looks.

(Refer Sllide Time: 6:32)

So, that is why I told you in my m introductive lecture tthat the onee of the maiin reason foor the
popularitty of powerr electronics is the advaances in poower semicoonductor techhnology. Soo, the
rating of this thyristo
or is given heere, I copied
d from, I dow
wnloaded this data sheet from their site.

(Refer Sllide Time: 7:05)

4
 
See, 46F. F stands foor first 0 8 do
ot dot till 13. This standss for the variious voltagee ratings. Seee, if it
is only 0 8, the volttage rating is 800 voltss. If it is 133, the voltagge rating is 1300 volts. See,
repetitivee peak, forw
ward off statee and reversse voltages. These are thhe various vvoltages. Seee, the
RMS currrent rating, 120 amperees whereas, the average on state currrent is 45 aamperes. Seee, the
surge currrent rating, 1300 amperes. I explaiined to you, what is surrge current oor when it fflows,
1300 am mperes and another
a impportant paraameter, I squuared t currrent, squareed time rating is
required to determinee the fuse. 84450 amperess squared s.

(Refer Sllide Time: 00

0:08:41 min
n)

See, the critical rate of rise of on

n state curreent, di by dt critical is 1220 ampere ffor micro seccond.
See, the gate trigger current IGT G 150 millii amperes. S So thereforee, just see tthe gain average
current, rating
r is 45 amperes. Su urge current is 1300 ampmperes, gate ccurrent is 1550 milli ampperes.
See, the gate trigger voltage 1.4 volts, holdiing current 2250 milli am mperes, latchhing current 1000
milli ampperes. See, I told you th hat latching current is hiigher than thhe holding ccurrent. So, these
are the so
ome of the immportant parrameters of thet thyristor .

So, that is
i about the conventionaal thyristor whichw conduucts when it is forward bbiased. Whenn it is
reverse biased,
b it doees not conduuct. What if input is AC?? Output is aalso AC. Likke, you know w fan
regulatorrs, see, I havve a 50 herttz AC supply, 230 voltss and there iis a regulatoor to regulatte the
voltage applied
a to th
he machine or voltage applied
a to thhe fan to vaary the speedd. Fan is aggain a
single ph
hase AC macchine. So, itt requires an n AC supplyy. I have an iinput AC, output is alsoo AC.
So definnitely, I need to connecct 2 thyristo ors in anti pparallel. Noow, instead of connectiing 2
thyristorss separately in anti paralllel, there is a device avaailable what is known ass the triac. A triac
was deveeloped in 196 64 by generaal electric.

5
 
(Refer Sllide Time: 11:18)

It has a complicated
c structure buut then functtionally it is equivalent tto 2 thyristoors connectedd anti
parallel. See, here is the connectiion, I have 1 thyristor, thhyristor 2, ggates are tiedd together G and I
am callinng this termiinals as MT1 and this ass MT2. See, I cannot calll anode andd cathode beccause
anode off one is tied to
t cathode of another thy yristor. So, tthere are 2 equivalent thyyristor connnected
in anti paarallel. So, now
n it is going to be a bidirectional
b l device. Reemember, it is a bidirecttional
device, th
here are 2 po ower terminaals but then there
t is onlyy 1 gate term
minal.

So thereffore, how doo I trigger? A triac can be triggeredd by see heree, making M MT2 positivee with
respect too MT1 and supplying a positive
p gatee current withh respect to MT1. See, I will repeat,, MT2
should bee positive with respect to
o MT1 and a positive gaate current w with respect tto MT. It cann also
be triggeered when MT
M 2 is negatiive with resppect to MT1 and by a neegative curreent, negativee gate
current with
w respect to t MT1.

6
 
(Refer Sllide Time: 13
3:43)

So, here are the chaaracteristics. 2 thyristorss connected in anti paraallel, say thyyristor 1 andd this
could bee thyristor 2.
2 These aree the VI ch haracteristicss, negative rresistance, rregional unsstable
conductio on, forward blocking, fo
orward block king mode foor another thhyristor, connduction modde for
the samee thyristor. So, these are
a the VI characteristic
c cs. This triaacs are veryy popular inn fan
regulatorrs. I told you
u, I showedd you a very y elegant fann regulator, just the knoob is broughht out
everythin
ng is mounteed inside a swwitch board.

(Refer Sllide Time: 14

4:31)

So, theree is no poweer dissipation

n. That is wh
hy it is so sm
mall and I toold you, thiss is a power semi
conductoor device, haas three legs. MT1 MT2 and gate, thhis are nothinng but a triaac. This is a triac,

7
 
this is a triac.
t So, triaacs are also used
u in lightt intensity coontrol, room
m temperaturee control butt then
what is a limitation of a triac? See, I am m just showiing you thee turn off chharacteristic of a
thyristor..

(Refer Sllide Time: 15

5:29)

The currrent has reveersed, it has attained a peakp value, the reverse recovery cuurrent and aat this
point J1 and
a J2, J1 and J3 have atttained the voltage
v blockking capabillity. So therrefore, a neggative
voltage is applied acrross the thyrristor and thiis happens, tthis current ddecays at a vvery fast ratee. So,
this is th
he turn off characteristic
c cs that we studied
s for the thyristorr. So, whenn this currennt has
becoming g 0, the voltaage across itt is very diffe
ferent from 00.

Now, thiis is for 1 th

hyristor, thee turn off ch
haracteristicss. When it iis turning offf there is a high
voltage appearing
a accross the enntire combination acrosss the triac. S So, there is another thyyristor
connected in anti parrallel. Now, if this dv by
y dt is high, iit may triggeer another thhyristor whenn this
current has
h become 0. 0

See, this apprehensio on was not thhere when in n the case off thyristor beecause there is only 1 deevice.
It has to block in the reverse diirection as lo ong as has vvoltage acrooss it is less than the reeverse
breakdow wn voltage. But
B then in a triac, theree are 2 thyriistor, the triaac is equivallent to 2 thyyristor
connected back to baack. So, wh hen a reversee voltage is being applieed to 1 of thhem, the forrward
voltage appears
a acro
oss another thyristor.
t So
o, the anotheer thyristor m may get trigggered becauuse of
this dv by
y dt or in oth
her words, trriac has a lesss time than a thyristor too recover itss blocking poower.

See, I havve written here, it has leess time thann the thyristoor to recoverr its blockingg power or thhe dv
by dt ratiing is less fo
or the triac. So, now let me sum up the thyristorr. It is nearlyy an ideal sw witch.
Why it iss an ideal swwitch? It requuires just a sh
harp pulse too turn on. Iff 45 ampere tthyristor, average
current rating,
r maximum gate current
c is 150 milli am mperes that is required only duringg this
switching g or turn on period. Wh hen the curreent is higher than the lattching, you ccan withdraw w the
gate sign
nal.

8
 
So, the gate
g power reequirement is very smalll compared tto the powerr rating of thhe thyristor. IIt can
block botth positive as
a well as neegative voltaage. The ratinng of this thhyristor is 12200 volts forrward
as well as
a reverse, allso high volttage, high cu
urrent devicces are availaable in the m market. The forth
point, device is very rugged, sturrdy but thenn what is thee limitation? It has 1 limmitation. It caannot
be turnedd off by the applicationn for control signal at thhe thyristor gate. It cannnot turn it ooff by
applying a negative gate
g current through thee gate. So seee here, I havve summed all the properties
of the thy
yristor.

(Refer Sllide Time: 20

0:25)

So, this is
i the limitaation, inabiliity to turn off by appliccation of a ccontrol signaal at the thyyristor
gate. To turn off the thyristor, cu urrent flowing through it should bee reduced to a value whiich is
less than the holding current. Tilll then it conttinues to connduct.

So, how do I make this device which is caapable of tuurning off thhrough gate?? Can I do some
modificaations? Answwer is yes. So, there is a device whaat is known as the gate tturn off thyrristor,
GTO wh hich is capab
ble of turnin
ng on as welll as turning off throughh gate. By appplying a coontrol
signal, we
w can turn off as well ass turn on a GTO.
G See herre, a gate turrn off thyristor, GTO.

9
 
(Refer Sllide Time: 21:50)

A small power
p GTO was develop ped by GE, general elecctric in 1961 and in 19811, a 2.5 kv, 1 kilo
ampere GTOs
G develooped by Hitachi and To oshiba. It cann be turned on by positiive IG and caan be
turned offf by negatiive IG and here
h are the 2 symbolicc representattions of the GTO, the ssame.
Anode caathode struccture is the same, across here are 2 aarrows, posiitive IG negaative IG. So, these
are the 2 symbols useed to represeent a GTO.

(Refer Sllide Time: 23

3:00)

What is the structuree? In what way

w it is strructurally diifferent from
m a thyristorr? It has 4 llayers
o SCR, P1 N1 P2 N2. Th
similar to hen, in whatt way it is ddifferent? How it is beiing turned ooff by

10
 
applying a negative IG to the gaate? We willl see. See hhere P1N1 P2 N2, one of the differennce is
thicknesss of P2 is lesss in the case of a GTO. Why,
W I will ttell you som
me time later.

The seco ond differencce is N2 layerr is removedd by itching in place wheere gate conntacts are situuated.
I will sho
ow you a 3DD picture and d it will be veery clear, seee here.

(Refer Sllide Time: 24

4:20)

See, we have
h P or P1 N1 P2. Now w, N2 is in small
s places,, small islannds of N2 aree found, see here.
There is 1 here, see here, again a separate N2 layer, a ssmall island of N2 layerr. See, this m minus
indicates the doping level is verry low and th he plus indiicates dopingg level is veery high. So, it is
similar to
o SCR, N2 laayer is highly
y doped, N1 layer
l is veryy lightly doped.

So, theree are large nu

umbers of sm
mall islands of cathode or in other w words, whatt I can say iss see,
there are large numb ber of GTO’ss. See here, P1 N1 P 2 N22, P1 N1 P 2 N2 see here also P1 N1 P 2 N2
and all th
he cathodes of these GTO’s are conn nected to a ccommon heaat sink and tthat forms a main
cathode. So, what youy can say is a GTO can c be seenn as a large number off small GTO O’s in
parallel, as if there is
i a GTO heere or anothher GTO herre, another G GTO here. OOne GTO caan be
seen as a large number of GTO’ss connected in i parallel. W
Why parallell?

Anode iss same, catho ode is also same,

s all thee cathodes arre connectedd to 1 heat ssink and thatt heat
sink form
ms the main cathode and d another diffference betw ween a GTO O and a SCR is in a GTO O gate
and cathoode structurees are highly y inter digitiized. What ddo you meann by highly iinter digitizeed? It
is somethhing like thiis, this is in
nter digitizatiion, this couuld be inter digitizationn. So, what iis the
advantagge of doing liike a inter digitization?
d The advantaage is that noow the cathoode peripherry has
increased
d, also the diistance betwween the gate and a cathoode is very sm mall. If this is gate and tthis is
cathode, this is inteer digitizatioon, cathode periphery hhas increaseed the distaance betweenn the
cathode and
a gate has reduced.

11
 
What is the
t advantag ge of this inter digitizatio
on? I will telll you some time later. N
Now, you jusst see
the structure again. I have a P layer,
l it is equivalent
e too P1 in SCR. Junction J1, N layer liightly
doped, juunction J2 and
a J3. So, when
w it is reeverse biaseed, J1 shouldd block the voltage beccause
though J3 is also reveerse biased, the reverse blocking vooltage of J3 iis very smalll similar to SCR
and when n is forward biased J2 bloocks the volttage.

Now, theere is another structure. See

S here, varriant a N pluus layer in otther words, a highly dopped N
layer pen
netrates this P1 layer and
d it is directly
y in contact w
with the N m
minus layer oor the N1 layyer.

(Refer Sllide Time: 28:49)

See here in this figurre, this N plu

us layer peneetrates at reggular intervaals and it is ddirectly in coontact
with N1 oro N minus layer.
l So, in other wordss there is a ddirect shot beetween the aanode and J1 when
it is reveerse biased. See, when itt is reverse bias, entire voltage as w we blocked bby J1 becausse we
had a P structure.
s Noow, because of this N plus which is in directly iin contact wiith anode annd N1,
now J1 caannot block the negativee voltage, thee only 1 junnction that caan block the negative vooltage
is J3.

The reveerse voltage blocking caapability is very

v small. So in other words, this structure caannot
block neggative voltag
ge or a anodde short struccture cannott block negaative voltagee. So, this GT TO is
also known as a sym mmetrical GTO.
G Why iti can blockk only positiive voltage? It is becauuse of
junction J2 and it caannot block the negativ ve voltage. IIf at all, if iit can blockk is a very small
voltage th
hat is because of J3, anotther advantaage of doing this modificcation is thaat it speeds uup the
turn off process.
p Noww, how it speeds up the turn off proocess? I will tell you whiile doing thee turn
off of a GTO.
G See in this, a 3D figure
fi shownn, here is sam
me thing P1 oor P plus higghly doped N plus
N minus P.

12
 
(Refer Sllide Time: 31:24)

Now, com ming to the inter digitizaation, I told you, the rem
mote part off a cathode iss very near tto the
gate. In SCR,
S why diid we limit dr
d by dt durin ng turn on? It is becausee the area that is available for
conductio on is very smmall when you
y turn on the t device. IIt is a area oof the cathodde adjacent tto the
gate elecctrode is avaailable and afterwards
a th
he conductioon spreads too the other pparts. Now, what
happens in the GTO O because off this inter digitization?
d Even the reemote part oof the cathoode is
very nearr to the gatee. So in other words, a laarge area is available duuring the turrn on periodd or at
the instannt of turn on
n, a large arrea is availabble. So thereefore, you caan have a veery high dr by dt
during tu
urn on.

Since thee dr by dt isi very large, GTO can n be broughht into conduuction at a much fasterr rate
compared d to SCR. This
T is becau
use of inter digitization.. Even the rremote part of the cathoode is
very nearr to the gatee, large area is availablee, so you cann have a verry high dr bby dt. So, if I can
have a veery high dr by
b dt, I can oro turn on tim
me of the GTTO reduces.

13
 
(Refer Sllide Time: 33
3:10)

See, in a 3D it looks something likel this, I have

h chosen a anode shoort structure. So, these arre the
gates, thee cathode, th
he direction of holes, the direction oof electric. S
So, GTO cann be broughht into
conductio on very rapidly that is beecause of a very
v high dr by dt is posssible.

(Refer Sllide Time: 33

3:43)

Now, co oming to thee turn on ch haracteristiccs, they are similar to an SCR. Thhere is no m much
differencce between thhe SCR charracteristics and
a the GTO O characteristtics. It is a laatching device, in
the sensee, in principle, gate signnal can be withdrawn
w onnce the anodde current is higher thaan the
latching current. Butt it is recom mmended thaat a positivee IG is mainttained throuughout durinng the
conductio on period. Why?
W It is because
b of thhis reason, I told you onne of the limitations or oone of

14
 
the difference betweeen the GTO O and SCR is that holdding currentt for a GTO
O is much hhigher
compared d to a SCR. Holding currrent of a GT
TO is higher compared too SCR.

Now, assume that am m doing somme disturban nce, anode cuurrent has diipped momeentarily. Sincce the
anode cu urrent had diipped momentarily, som me of parts off the GTO m might turn off and now again
the curreent, anode cu
urrent increaases very rap
pidly, the areea that is avaailable for coonduction iss very
small. Soo therefore, there
t could be some hott spots and bbecause of thhis localizedd heating, a GTO
may get damaged.
d Soo therefore, it
i is recommmended that dduring conduuction period, a positivee IG is
maintained througho out. But thenn, you do no ot need to mmaintain the same magnnitude of thee gate
current.

So, whatt is being don

ne is a high pulse of gatte current is provided duuring turn onn, so that thee turn
on time can
c be reducced and afterr sometime you y can reduuce this gatee current. Seee the wave fform,
looks som
mething like this.

(Refer Sllide Time: 36

6:18)

A high gate currentt, so anode current hass attained a study valuee after somee time td whhat is
known as the delay time.
t The vo
oltage acrosss the devicee also reduceed to its satuuration valuee. So,
metime you can
after som c reduce th he gate curreent to IGT. Soo, this value is approxim
mately 10% oof this
peak valuue.

15
 
(Refer Sllide Time: 37
7:09)

So, that is
i about the turn on of thet GTO. No ow, coming to the turn off of a GTO O, so even iin the
case of a thyristor when
w the thy
yristor is on
n, both T1 annd T2 are inn saturation. That is whhy the
voltage drops
d to a veery low valuue, could bee of the ordeer of 1.5 vollts or so. Soo, T1 and T2 aare in
saturationn. Now, you u want to turrn off the GTTO, so first thing that hhas to be donne is you haave to
bring thaat T2 out of saturation.
s See
S in this figure,
fi this iss T1, PNP traansistors and this is T2, NPN
transistorrs, both are in
i saturationn.

Now, dev vice has to be

b turned offf. How do I turn it off?? You have tto bring thiss transistor oout of
saturation
n. How do I bring this transistor out of saturaation? I havee to reduce the base cuurrent.
Now, let us see whatt is the relattionship betw
ween the anoode current and the gatee current thaat has
flowing out
o of the gaate terminal.

See, this expression that we hav ve derived for

f the SCR R is still vallid here. Thee total saturration
current iss given by alpha
a 2 into IG plus I CBO is
i a sum of ICO1 and ICOO2 divided by 1 minus aalpha1
plus alph
ha2. Whereinn, alpha1 and alpha2 are common basee current gaiins. We havve already deefined
them for the SCR. When
W SCR isi in on statee, we have rreduced the gate currennt to a very small
o, in on statee, I can neglect this term
value. So m, IA can be given by ICBBO divided bby 1 minus aalpha1
plus alph
ha2.

16
 
(Refer Sllide Time: 39
9:50)

See here,, this is the current

c that has to be turrned off. Seee, in the prevvious equatiion, IA becom
mes 0
when thee numeratorr becomes 0. So, when can you maake this num merator zeroo? When, ICCBO is
equal to minus of allpha2 into IG, G see here. So, the rela ationship is IG is equal to minus off ICBO
divided by
b alpha2. So o, if I want to
o find out th
he gain or thhe relationshhip between tthe anode cuurrent
and the gate,
g it comees like this, IA divided by
b IG is equaal to alpha2 ddivided by aalpha1 plus aalpha2
minus 1.

How do I improve th his gain? In other

o words, how do I m make this gainn as high as possible? A
Alpha2
should bee as high as possible. WhatW is alpha2? It is a gaiin of N1 P2 N2 transistor. See here, aalpha2
for this trransistor, thiis is N1 P2 N2. How do I make alpha2 as high as ppossible? Onne way is to make
the thickkness of P2 layer
l less. P2 layer shouuld be very thin. See, tthat is one of the differrence
between a SCR and d a GTO, I toldt you thee first differrence that I told you, laayer of P2 iss less
compared d to a SCR anda second is increase in i doping levvel in N2, theereby increaasing the vallue of
alpha2.

Now, how w to turn offf a GTO? What

W happenss exactly durring the turn off process?? IG has reveersed,
IG is flow
wing out of the
t gate, IG is i connectedd to P2. See hhere, IG is P22, now IG is fflowing out oof the
gate termminal, so holees are extraccted from P2.

17
 
(Refer Sllide Time: 42
2:50)

So, as these extractio

ons take placce, the voltaage drop is ddeveloped inn the P2 regioon. I will telll you
holes or holes
h from the anode aree extracted from
f the P baase. So, duriing this proccess, voltagee drop
is applied in P2 basee region andd eventually this voltagee, reverse bbiases your ggate and catthode
junction and both go oes into cut off.
o But then n, entire turnn off processs is not com
mpleted as yeet. As
the holess extraction continues, P2 is further depleted. See, first iss gate cathoode junctionn gets
reverse biased
b but then
t IG is still
s flowing out. So, P 2 gets furtheer depleted.. What happpens?
Conductiion area drop ps. Now, thee current maay be flowinng in the rem mote parts off the anode oor far
away from the gate.

Now, it may
m so happ pen that the current den nsity in thosee parts may increase annd if this happpens
there wouuld be a localize heating
g and devicee may fail. S So, this has tto be avoided. See, the ffigure
that show
wing the turn
n off processs, it is someth
hing like thi s.

18
 
(Refer Sllide Time: 45
5:02)

All the holes

h are diverted toward
ds the gate. The
T P2 gets ffurther depleeted, now annode currentt tries
to flow through
t the area which is far away from the gaate area. Theere is a reduuction in thee area
that is av
vailable, it may
m form orr in that areaa, the currennt density m
may increase localize heaating,
eventuallly device maay fail.

(Refer Sllide Time: 45

5:39)

Now, thee turn off off a GTO is greatly

g influeenced by thee turn off cirrcuit. Unforrtunately, turrn off
gain of a GTO is veery low. Turrn off gain is very low w, could be oof the orderr of say, 6 tto 15,
generally
y.

19
 
So thereffore, if anodde current iss 100 amperres, by the w way GTO iss a high currrent device, high
voltage device.
d So, if
i anode currrent is aroun nd 100 ampeeres, gain is of the ordeer of say, 6 tto 15.
So, gate current that is flowing out
o of the teerminal is 100 amperes annd it is fortuunately for a very
short durration. So, as
a the gate current
c startss flowing ouut of the terrminal, for ssome time aanode
current reemains constant. So, thiss period is knnown as the storage timee. See in thiss figure.

(Refer Sllide Time: 47

7:10)

At steadyy state, gatee current hass been, we have h to reduuce the gate current to a very low vvalue.
Somewhere at this po oint, it desiree to turn offf the GTO. S So, IG reversees, though IG has reverseed, IA
still remaains constannt for ts duration. So, th his is knownn as storagee time. Duriing storage time,
anode cuurrent remain ns approximaately constan nt and this pperiod ts can last for a few
w microsecoonds.

Now, wh hat happens after ts? Th his process hash to be stuudied by takking a snubbber into acccount.
There haas to be a snuubber circuitt to turn offf a GTO. I toold you, di bby dt rating oof a GTO iss very
high. So,, you can usee a very smaall inductor inn series withh a GTO. We have connnected an indductor
in series with thyristor to limit di
d by dt durin ng turn off. Similarly, too limit di byy dt, we requuire a
very smaall inductor. So, the ratin
ng of di by dt,d even now w … there haas to be a tuurn off snubbber, a
RC circuuit looks like this, someth
hing like thiss.

Now, theere is a diodde, it has itss own turn ono time andd I have shoown a small inductor whhat is
known as loop inducctance, in do otted lines. There is a vvery small iinductor in ddotted lines. You
wanted to
o turn off the thyristor, so
s IG has revversed, for soome time IA remains connstant and frrom ts
onwards,, anode curreent falls at a very fast ratte.

Now, beccause of thiss loop inducctance and because

b of thhis diode, tuurn on time oof the diodee, this
current, anode
a curren
nt cannot staarts flowing through
t the snubber circcuit immediaately and beccause
of this th
here is going to be a volttage spike beecause of thee inductancee which is thhere in other parts
of the cirrcuit.

20
 
If this inductance 0 and
a turn on time is very y small, thenn may be, im mmediately thhis anode cuurrent
finds a path, the capaacitor. Now, because of this inductoor and diode,, this currentt gets chokedd and
thereforee because off this a larg ge di by dtt, this spikee appears accross the G GTO. It coulld be
dangerou us, in the sen
nse that devicce may fail because
b of thhis spike.

So thereffore, the snu ubber circuitt layout is very

v importaant. The loopp inductancee, the inducctance
that I havve shown in the dotted liine should be b as small aas possible. S Snubber circcuit layout iss very
critical in
n the case off GTO. So, the t anode cu urrent has faallen to a verry low valuee. So, the endd of tf
is known n as the fall time
t and thiis is very sm
mall and fromm there onwaards a currennt what is knnown
as the taiil current, staarts flowing through thiss snubber cirrcuit.

Now, thee voltage across the GT TO is limitedd by the dv by dt, it is determined by the dv bby dt.
Now, wh T tail current, that perriod Ik is equual to zero, ccathode current is
hat is this taiil current? This
zero and the gate currrent is samee as the anod de current. Soo, this tail cuurrent is corrresponding tto the
free charrges, they ex
xist in N1 layyer. The currrent due to thhe free chargges which exxists in N1 w which
is nothin
ng but the blocking
b lay
yer, lightly doped
d layer.. These carrriers are num merous andd they
require a finite time to
t recombinee.

See, the problem here is as the voltage ratiing increase s N1 layer, tthe thicknesss of the N1 layer
increasess. As the thicckness of N1 layer increases, time taaken for these carriers to recombinee also
increasess. So in otherr words, the tail current period increeases with thhe blocking vvoltage capaability
of the GT TO. So, wh hat is the con
nsequence off having a hhigher fall tim me or sorry, higher tail ttime?
See, volttage across the device started increasing, currrent in the ddevice is stiill finite, the tail
current, voltage
v is a reasonably high
h value itt has attaineed, so therefoore, the losses that are taaking
place dev vice are highh. So, turn off losses in a GTO, theyy are significcant. So, how w do I reducce the
turn off losses?
l So, one
o way to reeduce is to reduce
r the faall or tail currrent durationn. How to reeduce
the tail cuurrent duratiion? This dt has to be red
duced.

(Refer Sllide Time: 54

4:47)

21
 
Having decided
d on the
t voltage rating,
r N1 laayer, thickneess of N1 layyer gets deccided and thhe tail
current depends
d on th
he thickness of N1. Is theere a way ouut? Yes. Whyy did we do anode shortiing? I
said one of the advan ode shorting is to reducee the turn offf time. How does it do? What
ntages of ano
it does is, see this.

(Refer Sllide Time: 55

5:14)

Those an
node shortin
ng N layers are
a highly doped.
d Theyy were all w
where N pluss, they are hhighly
doped. What
W they do o is this heav
vily doped N cells, they m
make the miinority carrieers trapped iin N1,
recombin
ne more quicckly.

So this highly
h dopedd N cells, th
hey helped the minority carriers traapped in N1, recombine more
quickly. So thereforee, your fall or
o sorry, taill current tim
me reduces. S
Sorry, it is a tail currentt time
reduces but
b then dev vices no lonnger symmetrical. Now,, it can blocck only the positive volltage.
Negativee voltage it cannot block. So, with th
his I will connclude my today’s lecturee.

Thank yo
ou.

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