PD - 96174

DIGITAL AUDIO MOSFET

IRFB5620PbF
Features
Key Parameters
• Key Parameters Optimized for Class-D Audio VDS 200 V
Amplifier Applications RDS(ON) typ. @ 10V 60 m:
• Low RDSON for Improved Efficiency Qg typ. 25 nC
• Low QG and QSW for Better THD and Improved Qsw typ. 9.8 nC
Efficiency RG(int) typ. 2.6 Ω
• Low QRR for Better THD and Lower EMI TJ max 175 °C
• 175°C Operating Junction Temperature for
D
Ruggedness D

• Can Deliver up to 300W per Channel into 8Ω Load in

Half-Bridge Configuration Amplifier
G
S
D
G
S
TO-220AB
G D S
Gate Drain Source
Description
This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes
the latest processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode
reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance
factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175°C operating junction
temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient,
robust and reliable device for ClassD audio amplifier applications.

Absolute Maximum Ratings

Parameter Max. Units
VDS Drain-to-Source Voltage 200
V
VGS Gate-to-Source Voltage ±20
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 25
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 18 A
IDM Pulsed Drain Current c 100
PD @TC = 25°C Power Dissipation f 144
PD @TC = 100°C Power Dissipation f 72
W

Linear Derating Factor 0.96 W/°C

TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw x
10lb in (1.1N m)x
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case f ––– 1.045
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient f ––– 62

Notes  through … are on page 2

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IRFB5620PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
BVDSS Drain-to-Source Breakdown Voltage 200 ––– ––– V VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.22 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 60 72.5 mΩ VGS = 10V, ID = 15A e
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V VDS = VGS, ID = 100µA
∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient ––– -14 ––– mV/°C
IDSS Drain-to-Source Leakage Current ––– ––– 20 VDS = 200V, VGS = 0V
µA
––– ––– 250 VDS = 200V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
gfs Forward Transconductance 37 ––– ––– S VDS = 50V, ID = 15A
Qg Total Gate Charge ––– 25 38
Qgs1 Pre-Vth Gate-to-Source Charge ––– 6.3 ––– VDS = 100V
Qgs2 Post-Vth Gate-to-Source Charge ––– 1.9 ––– VGS = 10V
nC
Qgd Gate-to-Drain Charge ––– 7.9 ––– ID = 15A
Qgodr Gate Charge Overdrive ––– 9.3 ––– See Fig. 6 and 19
Qsw Switch Charge (Qgs2 + Qgd) ––– 9.8 –––
RG(int) Internal Gate Resistance ––– 2.6 5.0 Ω
td(on) Turn-On Delay Time ––– 8.6 ––– VDD = 100V, VGS = 10V e
tr Rise Time ––– 14.6 ––– ID = 15A
ns
td(off) Turn-Off Delay Time ––– 17.1 ––– RG = 2.4Ω
tf Fall Time ––– 9.9 –––
Ciss Input Capacitance ––– 1710 ––– VGS = 0V
Coss Output Capacitance ––– 125 ––– VDS = 50V
pF
Crss Reverse Transfer Capacitance ––– 30 ––– ƒ = 1.0MHz, See Fig.5
Coss Effective Output Capacitance ––– 138 ––– VGS = 0V, VDS = 0V to 160V
LD Internal Drain Inductance Between lead, D
––– 4.5 –––
6mm (0.25in.)
nH
LS Internal Source Inductance from package
G

––– 7.5 –––

and center of die contact S

Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy d ––– 113 mJ
IAR Avalanche Current g See Fig. 14, 15, 17a, 17b A
EAR Repetitive Avalanche Energy g mJ

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS @ TC = 25°C Continuous Source Current MOSFET symbol
––– ––– 25
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse
(Body Diode) c ––– ––– 100
p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 15A, VGS = 0V e
trr Reverse Recovery Time ––– 98 147 ns TJ = 25°C, IF = 15A , VR = 160V
Qrr Reverse Recovery Charge ––– 491 737 nC di/dt = 100A/µs e
Notes:
 Repetitive rating; pulse width limited by max. junction temperature. „ Rθ is measured at TJ of approximately 90°C.
‚ Starting TJ = 25°C, L = 1.00mH, RG = 25Ω, IAS = 15A. … Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%. avalanche information
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 IRFB5620PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
12V 12V
10V 10V
100
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
7.0V 100 7.0V
6.0V 6.0V
5.5V 5.5V
BOTTOM 5.0V BOTTOM 5.0V
10

10
5.0V
1

5.0V
1
0.1
≤60µs PULSE WIDTH
Tj = 25°C ≤60µs PULSE WIDTH
Tj = 175°C
0.01 0.1
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.5

RDS(on) , Drain-to-Source On Resistance

ID = 15A
3.0 VGS = 10V
ID, Drain-to-Source Current (A)

100
TJ = 175°C
2.5
(Normalized)

10 2.0

T J = 25°C
1.5
1

VDS = 50V 1.0

≤60µs PULSE WIDTH

0.1 0.5
2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100120140160180

VGS, Gate-to-Source Voltage (V) T J , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

100000 14.0
VGS = 0V, f = 1 MHZ
Ciss = C gs + C gd, C ds SHORTED ID= 15A
Crss = C gd 12.0 VDS= 160V
VGS, Gate-to-Source Voltage (V)

Coss = C ds + C gd VDS= 100V

10000
10.0 VDS= 40V
C, Capacitance (pF)

Ciss 8.0
1000
6.0
Coss
4.0
100
Crss
2.0

10 0.0
1 10 100 1000 0 5 10 15 20 25 30 35
VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs.Drain-to-Source Voltage Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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 IRFB5620PbF
100 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

100
100µsec
TJ = 175°C
1msec
T J = 25°C
10 10
10msec

DC
1
Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse
1.0 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100 1000
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area
30 6.0

5.5

VGS(th), Gate threshold Voltage (V)

25 5.0

4.5
ID, Drain Current (A)

20
4.0

15 3.5
ID = 100µA
3.0 ID = 250uA
10 2.5 ID = 1.0mA
ID = 1.0A
2.0
5
1.5

0 1.0
25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175

T C , Case Temperature (°C) T J , Temperature ( °C )

Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Threshold Voltage vs. Temperature

10
Thermal Response ( Z thJC ) °C/W

1
D = 0.50

0.20
0.1 0.10 R1
R1
R2
R2 Ri (°C/W) τi (sec)
0.05 τJ
τJ
τC 0.456 0.000311
0.02 τ
τ1
0.01 τ1
τ2
τ2
0.589 0.003759
0.01
Ci= τi/Ri
Ci i/Ri
Notes:
SINGLE PULSE
1. Duty Factor D = t1/t2
( THERMAL RESPONSE )
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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 IRFB5620PbF
0.5 500
RDS(on), Drain-to -Source On Resistance ( Ω)

EAS , Single Pulse Avalanche Energy (mJ)

ID = 15A ID
450
TOP 2.05A
0.4 400 2.94A
350 BOTTOM 15A

0.3 300

250

0.2 200
T J = 125°C
150

0.1 100
T J = 25°C
50

0 0
4 6 8 10 12 14 16 25 50 75 100 125 150 175
Starting T J , Junction Temperature (°C)
VGS, Gate -to -Source Voltage (V)
Fig 12. On-Resistance Vs. Gate Voltage Fig 13. Maximum Avalanche Energy Vs. Drain Current
100

Duty Cycle = Single Pulse

Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Avalanche Current (A)

0.01 Tstart =25°C (Single Pulse)

10

0.05
0.10
1

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)

Fig 14. Typical Avalanche Current Vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 14, 15:
120 (For further info, see AN-1005 at www.irf.com)
TOP Single Pulse 1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
BOTTOM 1.0% Duty Cycle
100 temperature far in excess of Tjmax. This is validated for
ID = 15A
EAR , Avalanche Energy (mJ)

every part type.

2. Safe operation in Avalanche is allowed as long as neither
80 Tjmax nor Iav (max) is exceeded
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
60 4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
40 voltage increase during avalanche).
6. Iav = Allowable avalanche current.
20 7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
0 D = Duty cycle in avalanche = tav ·f
25 50 75 100 125 150 175 ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Starting T J , Junction Temperature (°C)
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy Vs. Temperature
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IRFB5620PbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

VGS=10V *
ƒ Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG V DD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor
InductorCurrent
Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
tp 0.01Ω
I AS

Fig 17a. Unclamped Inductive Test Circuit Fig 17b. Unclamped Inductive Waveforms
RD
V DS VDS

V GS
90%
D.U.T.
RG
+
- V DD

V10V
GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf

Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 19a. Gate Charge Test Circuit Fig 19b. Gate Charge Waveform
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 IRFB5620PbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

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TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/2008
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