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INA827
SBOS631B – JUNE 2012 – REVISED NOVEMBER 2017
• Power Automation 8
• Weigh Scales
1
• Medical Instrumentation -IN 10 kW 50 kW
A1
• Data Acquisition VO = G ´ (VIN+ - VIN-)
2 80 kW
8 kW G=5+
RG
7
RG A3
8 kW +
3 Load VO
-
10 kW 50 kW
6
A2
4 REF
+IN
TI Device
5 0.1 mF
V-
Copyright © 2016, Texas Instruments Incorporated
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
INA827
SBOS631B – JUNE 2012 – REVISED NOVEMBER 2017 www.ti.com
Table of Contents
1 Features .................................................................. 1 7.4 Device Functional Modes........................................ 23
2 Applications ........................................................... 1 8 Application and Implementation ........................ 24
3 Description ............................................................. 1 8.1 Application Information............................................ 24
4 Revision History..................................................... 2 8.2 Typical Application .................................................. 25
5 Pin Configuration and Functions ......................... 3 9 Power Supply Recommendations...................... 27
6 Specifications......................................................... 4 10 Layout................................................................... 27
6.1 Absolute Maximum Ratings ...................................... 4 10.1 Layout Guidelines ................................................. 27
6.2 ESD Ratings.............................................................. 4 10.2 Layout Example .................................................... 27
6.3 Recommended Operating Conditions....................... 4 11 Device and Documentation Support ................. 28
6.4 Thermal Information .................................................. 4 11.1 Documentation Support ........................................ 28
6.5 Electrical Characteristics........................................... 5 11.2 Receiving Notification of Documentation Updates 28
6.6 Typical Characteristics .............................................. 7 11.3 Community Resources.......................................... 28
7 Detailed Description ............................................ 16 11.4 Trademarks ........................................................... 28
7.1 Overview ................................................................. 16 11.5 Electrostatic Discharge Caution ............................ 28
7.2 Functional Block Diagram ....................................... 16 11.6 Glossary ................................................................ 28
7.3 Feature Description................................................. 17 12 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
Changes from Revision A (July 2013) to Revision B Page
• Added Device Information table, ESD Ratings table, Recommended Operating Conditions table, Overview section,
Functional Block Diagram section, Feature Description section, Device Functional Modes section, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
• Deleted device graphic from top of page 1 ............................................................................................................................ 1
• Changed Features section: changed sub-bullets of Supply Range bullet ............................................................................. 1
• Changed MSOP to VSSOP throughout document ................................................................................................................ 1
• Changed single supply value in first paragraph of Description section ................................................................................. 1
• Added Simplified Schematic title ............................................................................................................................................ 1
• Deleted Package and Ordering Information table .................................................................................................................. 3
• Changed Pin Configuration and Functionssection: changed section title, changed Pin Functions title, added I/O column .. 3
• Changed test conditions of Input, PSRR and VCM parameters in Electrical Characteristics table ........................................ 5
• Changed minimum specifications of Power Supply, VS parameter in Electrical Characteristics table .................................. 6
• Changed Typical Characteristics section: moved conditions from title to conditions line under curve .................................. 7
• Changed conditions of Figure 7 and Figure 8 ........................................................................................................................ 8
• Changed conditions of Figure 37 and Figure 38 .................................................................................................................. 13
• Changed power-supply range in Operating Voltage section ............................................................................................... 22
• Changed power supply low level in Low-Voltage Operation section ................................................................................... 22
• Added Design Requirements, Detailed Design Procedure, and Application Curves to the Typical Application section ..... 25
DGK Package
8-Pin VSSOP
Top View
-IN 1 8 +VS
RG 2 7 VOUT
RG 3 6 REF
+IN 4 5 -VS
Pin Functions
NAME NO. I/O DESCRIPTION
–IN 1 I Negative input
+IN 4 I Positive input
REF 6 I Reference input. This pin must be driven by low impedance.
RG 2, 3 — Gain setting pin. Place a gain resistor between pin 2 and pin 3.
VOUT 7 O Output
–VS 5 — Negative supply
+VS 8 — Positive supply
6 Specifications
6.1 Absolute Maximum Ratings (1)
MIN MAX UNIT
Supply –20 20
Voltage V
Input –40 40
REF input –20 20 V
(2)
Output short-circuit Continuous
Operating, TA –55 150
Temperature range Junction, TJ 175 °C
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to VS / 2.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
80 kW
G Gain equation 5+ V/V
RG
250 30
SD: 40.1 µV SD: 0.51 µV/°C
MEAN: −7.6 µV MEAN: 0.08 µV/°C
25
200
20
150
Units
Units
15
100
10
50
5
0 0
−150
−130
−110
−90
−70
−50
−30
−10
10
30
50
70
90
110
130
150
−3
−2
−1
3
VOSI (µV) G001
VOSI Drift (µV/°C ) G002
Figure 1. Typical Distribution of Input Offset Voltage Figure 2. Typical Distribution of Input Offset Voltage Drift
200 16
SD: 5.3 µV/°C
MEAN: −7.7 µV/°C
160
12
120
Units
Units
8
80
4
40
0 0
−2000
−1800
−1600
−1400
−1200
−1000
−800
−600
−400
−200
0
200
400
600
800
1000
1200
1400
1600
1800
2000
−25
−20
−15
−10
−5
10
15
20
25
VOSO (µV) G002
VOSO Drift (µV/°C ) G004
Figure 3. Typical Distribution of Output Offset Voltage Figure 4. Typical Distribution of Output Offset Voltage Drift
700 500
SD: 0.59 nA
600 MEAN: 0.01 nA
400
500
300
400
Units
Units
300
200
200
100
100
0 0
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
−4
−3.5
−3
−2.5
−2
−1.5
−1
−0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
Figure 5. Typical Distribution of Input Bias Current Figure 6. Typical Distribution of Input Offset Current
Figure 7. Input Common-Mode Voltage vs Output Voltage Figure 8. Input Common-Mode Voltage vs Output Voltage
4.5 4.5
Common−Mode Voltage (V)
2.5 2.5
Vref = 0V Vref = 0V
Vref = 2.5V Vref = 2.5V
1.5 1.5
0.5 0.5
−0.5 −0.5
−0.5 0.5 1.5 2.5 3.5 4.5 5.5 −0.5 0.5 1.5 2.5 3.5 4.5 5.5
Output Voltage (V) G009
Output Voltage (V) G009
Figure 9. Input Common-Mode Voltage vs Output Voltage Figure 10. Input Common-Mode Voltage vs Output Voltage
6 16
12
4
Common−Mode Voltage (V)
8
Vs = +/− 12V
2 Gain = 5 4 Vs = +/− 15V
Gain = 100
0 0
−4
−2
−8
−4
−12
−6 −16
−6 −4 −2 0 2 4 6 −16 −12 −8 −4 0 4 8 12 16
Output Voltage (V) G011
Output Voltage (V) G012
Figure 11. Input Common-Mode Voltage vs Output Voltage Figure 12. Input Common-Mode Voltage vs Output Voltage
12 6 12
Common−Mode Voltage (V)
8 4 8
0 0 0
−4 −2 −4
IIN
−8 −4 VOUT −8
−6 −12
−12
−8 −16
−16 −30 −20 −10 0 10 20 30
−16 −12 −8 −4 0 4 8 12 16
Input Voltage (V)
Output Voltage (V) G013
G014
G = 1, VS = ±15 V
Dual supply, VS = ±15 V, ±12 V, G = 100
Figure 14. Input Overvoltage vs Input Current
Figure 13. Input Common-Mode Voltage vs Output Voltage
160 140
140 120
120
100
100
80
80
60
60
G=5
40
40 G=5 G = 10
G = 10
20 20 G = 100
G = 100
G = 1000 G = 1000
0 0
10 100 1k 10k 100k 10 100 1k 10k 100k
Frequency (Hz) C015 Frequency (Hz) C016
Figure 15. CMRR vs Frequency (RTI) Figure 16. CMRR vs Frequency (RTI)
180 180
160 160
140 140
120 120
PSRR (dB)
PSRR (dB)
100 100
80 80
60 60
G=5 G=5
40 G = 10 40 G = 10
20 G = 100 20 G = 100
G = 1000 G = 1000
0 0
10 100 1k 10k 100k 10 100 1k 10k 100k
Frequency (Hz) G018
Frequency (Hz) G019
Figure 17. Positive PSRR vs Frequency (RTI) Figure 18. Negative PSRR vs Frequency (RTI)
20 100
10
0
10
−10
−20
−30 1
100 1k 10k 100k 1M 10M 100m 1 10 100 1k 10k 100k
Frequency (Hz) G022
Frequency (Hz) G023
Figure 19. Gain vs Frequency Figure 20. Voltage Noise Spectral Density vs Frequency
(RTI)
500
Current Noise Density (fA/ Hz)
400
Noise (1 mV/div)
300
200
100
0
1 10 100 1k 10k
Time (1 s/div)
Frequency (Hz) G024 G025
Figure 21. Current Noise Spectral Density vs Frequency Figure 22. 0.1-Hz to 10-Hz RTI Voltage Noise (G = 5)
(RTI)
Noise (500 nV/div)
Noise (2 pA/div)
Figure 23. 0.1-Hz to 10-Hz RTI Voltage Noise (G = 1000) Figure 24. 0.1-Hz to 10-Hz RTI Current Noise
VS = +2.7 V VS = ±15 V
Figure 25. Input Bias Current vs Common-Mode Voltage Figure 26. Input Bias Current vs Common-Mode Voltage
100 2.5
Unit 1 Unit 1
Unit 2 2 Unit 2
80 Unit 3
1.5
60
1
0.5
40
0
20
−0.5
0 −1
−50 −25 0 25 50 75 100 125 150 −50 −25 0 25 50 75 100 125 150
Temperature (°C) G030
Temperature (°C) G031
Figure 27. Input Bias Current vs Temperature Figure 28. Input Offset Current vs Temperature
50 300
Unit 1 Unit 1
40
Unit 2 Unit 2
30 Unit 3 Unit 3
Quiescent Current (µA)
250
20
Gain Error (ppm)
10
0 200
−10
−20
150
−30
−40
−50 100
−50 −25 0 25 50 75 100 125 150 −50 −25 0 25 50 75 100 125 150
Temperature (°C) G032
Temperature (°C) G034
Figure 29. Gain Error vs Temperature (G = 5) Figure 30. Supply Current vs Temperature
Non−Linearity (ppm)
4 4
2 2
0 0
−2 −2
−4 −4
−6 −6
−8 −8
−10 −10
−10 −8 −6 −4 −2 0 2 4 6 8 10 −10 −8 −6 −4 −2 0 2 4 6 8 10
Output Voltage (V) G035
Output Voltage (V) G036
4 Non−Linearity (ppm) 20
2 10
0 0
−2 −10
−4 −20
−6 −30
−8 −40
−10 −50
−10 −8 −6 −4 −2 0 2 4 6 8 10 −10 −8 −6 −4 −2 0 2 4 6 8 10
Output Voltage (V) G037
Output Voltage (V) G038
Figure 33. Gain Nonlinearity (G = 100) Figure 34. Gain Nonlinearity (G = 1000)
80 100
VS = ±15 V −45°C VS = ±15 V −45°C
60 80
25°C 25°C
85°C 60 85°C
40 125°C 125°C
Offset Voltage (µV)
40
20 20
0 0
−20 −20
−40
−40
−60
−60 −80
−80 −100
−15.5 −15 −14.5 13.5 14 14.5
Common−Mode Voltage (V) G057
Common−Mode Voltage (V) G058
VS = ±15 V VS = ±15 V
VS = +3 V VS = +3 V
14.7 −14.3
14.6 −14.4
14.5 −14.5
14.4 −14.6
14.3 −14.7
14.2 −14.8
14.1 −14.9
14 −15
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
Output Current (mA) G039
Output Current (mA) G040
VS = ±15 V VS = ±15 V
Figure 39. Positive Output Voltage Swing vs Figure 40. Negative Output Voltage Swing vs
Output Current Output Current
35 20
Vs = ±15V Settle to 0.01%
18
30 Vs = ±2.5V Settle to 0.001%
16
Output Voltage (Vpp)
25 14
Settling Time (µs)
12
20
10
15
8
10 6
4
5
2
0 0
1k 10k 100k 1M 2 4 6 8 10 12 14 16 18 20
Frequency (Hz) G043
Step Size (V) G044
VS = ±15 V
Figure 41. Large-Signal Frequency Response Figure 42. Settling Time vs Step Size
CL = 0 pF
CL = 100 pF
CL = 220 pF
0 CL = 500 pF
CL = 1 nF
CL = 220 nF
−0.1
−0.2
Time (5 ms/div) Time (5 ms/div)
G046
G045
G = 5, RL = 1 kΩ, CL = 100 pF
Figure 43. Small-Signal Response Over Capacitive Loads Figure 44. Small-Signal Response
(G = 5)
Output Voltage (10 mV/div)
Output Voltage
Output Settling
Figure 47. Small-Signal Response Figure 48. Large-Signal Response and Settling Time
Figure 49. Large-Signal Response and Settling Time Figure 50. Large-Signal Response and Settling Time
10M
Output Voltage
Output Settling
Output Settling (0.002 %/div)
1M
Output Voltage (5 V/div)
Impedance (Ω)
100k
10k
1k
100
1m 10m 100m 1 10 100 1k 10k 100k 1M 10M
Time (100 ms/div) Frequency (Hz)
G064 G055
Figure 51. Large-Signal Response and Settling Time Figure 52. Open-Loop Output Impedance
5
4
3
Offset Voltage (µV)
2
1
0
−1
−2
−3
−4
−5
0 40 80 120 160 200
Time (s) G056
7 Detailed Description
7.1 Overview
The INA827 is a monolithic instrumentation amplifier (INA) based on a 36-V and a current feedback input
architecture. The INA827 also integrates laser-trimmed resistors to ensure excellent common mode rejection and
low gain error. The combination of the current feedback input and the precision resistors allows this device to
achieve outstanding dc precision as well as frequency response and high frequency common mode
rejection(TBD this is more like a Layout text. Overview is generally an overview of the device.)
The Overview section provides a top-level description of what the device is and what it does. Detailed
descriptions of the features and functions appear in subsequent subsections. Guidelines ● Include a summary of
standards met by the device (if any). ● List modes and states of operation (from the user's perspective) and key
features within each functional mode for quick reference. Use the following sections to provide detail on these
modes and features.
V+
0.1 mF
1
-IN 10 kW 50 kW
A1
VO = G ´ (VIN+ - VIN-)
2 80 kW
8 kW G=5+
RG
7
RG A3
8 kW +
3 Load VO
-
10 kW 50 kW
6
A2
4 REF
+IN
TI Device
5 0.1 mF
V-
Copyright © 2016, Texas Instruments Incorporated
Figure 55. Simplified Block Diagram (TBD only simplified op amp goes here but this is a PNG and I can't
edit it)
VIN-
V+
RG INA827 VO
100 mA
REF 1/2 REF200
VIN+
100 W
OPA333
±10 mV 10 kW
Adjustment Range
100 W
100 mA
1/2 REF200
V-
Copyright © 2016, Texas Instruments Incorporated
50 kW
R1 R2
A1 Out = VCM + VBE + 0.125 V - VD/2 ´ G V+
8 kW V- V- 8 kW
A2 Out = VCM + VBE + 0.125 V + VD/2 ´ G 10 kW
Output Swing Range A1, A2, (V+) - 0.1 V to (V-) + 0.1 V
10 kW A3 VOUT
V+
VO = G ´ (VIN+ - VIN-) + VREF V-
Linear Input Range A3 = (V+) - 0.9 V to (V-) + 0.1 V 50 kW
REF
V-
V+ V+
-IN
Q1 Q2
VD/2 C1 C2
Overvoltage V- A1 A2 V- Overvoltage
Protection Protection
RB VB RB
VCM
VD/2
V-
+IN
Microphone,
hydrophone, TI Device
and so forth.
47 kW 47 kW
Thermocouple TI Device
10 kW
TI Device
VIN-
+5 V
OPA330 +2.5 V
REF3225 +5 V
a) Level shifting using the OPA330 as a low-impedance buffer b) Level shifting using the low-impedance output of the REF3225
Copyright © 2016, Texas Instruments Incorporated
RS- = 9.9 kW
VCM = 10 V
Signal Bandwidth: 5 kHz -15 V
Copyright © 2016, Texas Instruments Incorporated
Figure 60. Example Application With G = 10 V/V and 1-V Differential Voltage
Resistor-adjustable INAs such as the INA827 yield the lowest gain error at G = 5 because of the inherently well-
matched drift of the internal resistors of the differential amplifier. At gains greater than 5 (for instance, G = 10 V/V
or G = 100 V/V) gain error becomes a significant error source because of the resistor drift contribution of the
feedback resistors in conjunction with the external gain resistor. Except for very high gain applications, gain drift
is by far the largest error contributor compared to other drift errors (such as offset drift). The INA827 offers the
lowest gain error over temperature in the marketplace for both G > 5 and G = 5 (no external gain resistor).
Table 2 summarizes the major error sources in common INA applications and compares the two cases of G = 5
(no external resistor) and G = 10 (with a 16-kΩ external resistor). As shown in Table 2, although the static errors
(absolute accuracy errors) in G = 5 are almost twice as great as compared to G = 10, there is a great reduction
in drift errors because of the significantly lower gain error drift. In most applications, these static errors can
readily be removed during calibration in production. All calculations refer the error to the input for easy
comparison and system evaluation.
2
eNO 6
(eNI2 + eNI = 17
Voltage noise (1 kHz) BW ´ ´ 6 6
G VDIFF eNO = 250
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
0.1 mF
8
(1)
RS
1
-IN 10 kW 50 kW
A1
VO = G ´ (VIN+ - VIN-)
2 80 kW
8 kW G=5+
RG
7
RG A3
8 kW +
3 Load VO
-
10 kW 50 kW
(1) 6
RS A2
4 REF
+IN
TI Device
5 0.1 mF
V-
Copyright © 2016, Texas Instruments Incorporated
(1) This resistor is optional if the input voltage remains above [(V–) – 2 V] or if the signal source current drive capability is limited to less than
3.5 mA. See the Input Protection section for more details.
(6)
107 kΩ is a standard 0.1% resistor value that can be used in this design. Finally, the output RC filter components
are selected to have a –3-dB cutoff frequency of 1 MHz.
Figure 63. PLC Output Voltage vs Input Voltage Figure 64. PLC Output Voltage vs Input Current
10 Layout
11.4 Trademarks
E2E is a trademark of Texas Instruments.
PhotoMOS is a registered trademark of Panasonic Electric Works Europe AG.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 30-Sep-2016
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
INA827AIDGK ACTIVE VSSOP DGK 8 80 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR -40 to 125 IPSI
& no Sb/Br)
INA827AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR -40 to 125 IPSI
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 30-Sep-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Sep-2016
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Sep-2016
Pack Materials-Page 2
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