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5 4 3 2 1

Celullar ANT
Project : MT6572
REF_SCH TOP LEVEL EMI x32 BPI, APC FEM
EMI
TX RX

Memory
D D
MCP NFI RF IQ
NFI
BSI ctrl
RX
MT6166 balun

MSDC 4-bit MSDC1


26M_BB
micro SD 26M
26M_AUD DCXO ctrl
+ hot-plug

26M_CN
26M_CN
ABB

SPI MT6572 CONN IQ


TCXO
Connectivity ANT

CONN ctrl
MT6627
C C

32K_BB RTC 32K


Camera IF
Camera CAM
Module (MIPI / Parallel)

Camera IF MT6323 Headset


2nd Camera (HPL, HPR, AU_VIN1)
Module
I2C Class D/AB
i2C_0
Audio PA

LCD IF
LCD LCD AUD I/F Audio Receiver
module (MIPI / Parallel) Speech

I2C
i2C_1 AU_VIN0
CTP EINT
B controller B

POWER
I2C
ALS + PXS
EINT
SIM2
SPI SIM2
I2C Power
Management SIM1
Magnetic EINT SIM1
sensor
VIB
BC1.1
Charger

Charger
Battery
Keypad

BJT
A A
JTAG

USB 2.0 micro USB


Debug USB
UART
port

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
01 Block Diagram
Date: Friday, February 14, 2014 Sheet 1 of 17
5 4 3 2 1
5 4 3 2 1

cap Close to BB IC

C108
U101-H
cap Close to BB IC

VIO18_PMU T25 DVDD18_MIPIRX AVDD28_DAC F1 VTCXO_PMU


U25 DVSS18_MIPIRX
AVDD18_AP E5 VIO18_PMU

R25 DVDD18_MIPITX DVDD18_PLLGP U9 VIO18_PMU


P25 DVSS18_MIPITX
D D
AVDD18_MD D3 VIO18_PMU
VIO18_PMU H23 AVDD18_USB AVSS18_MD A1
VUSB_PMU G24 AVDD33_USB AVSS18_MD A4
G23 C3 C123 C128
AVSS33_USB AVSS18_MD C112
AVSS18_MD E2
C104 C113
1uF/6.3V
F6 BG
C107 C101 REFP
REFP
C109 G6
1uF/6.3V REFN
For AVDD18_AP,If AUXADC not use,cap can share with AVDD18_MD.

MT6572/TMP/SMD

VIO_EMI
U101-B

dedicate VSS ball, must return to cap then to main GND: VCCIO_EMI W9 1.8V IO for DDR1
VCC
1. REFN(G6) => C109 VCCIO_EMI W12 1.2V IO for DDR2
Memory W14
2. DVSS18_MIPIRX(U25) => C107 VCCIO_EMI C105 C122
AC21 GND VCCIO_EMI W16
3. DVSS18_MIPITX(P25) => C101 AB11 GND VCCIO_EMI W19
AF13 GND If double-sided SMT, put C105 & C122 below BB.
AD11 C110
GND
AC8 GND
If single-sided SMT, put C105 & C122 around memory.
C DVDD C
AB5 GND
AB14 Peripheral
GND
W26 GND DVDD18_MC0 AA1 VIO18_PMU
T15 GND DVDD18_CAM K20
W23 GND DVDD18_VIO_1 L3
T14 GND DVDD18_VIO_2 J19
AF26 GND DVDD18_VIO_3 H13
G3 AB24 R119
GND DVDD18_LCD
K21 GND
L11 GND
L12 GND
L14 GND DVDD3_MC1 K24 VMC_PMU
L15 C126
GND 1uF/6.3V
L16 GND DVDD3_LCD W24
M5 GND
M11 GND DVDD28_BPI C10 VIO28_PMU
M12 GND
M13 C121
GND C117 NC
M14 GND VCC 1uF/6.3V
M15 GND
M16 CPU P6
GND VCCK_CPU
N10 GND VCCK_CPU T7
N8 GND VCCK_CPU P7
N9 GND VCCK_CPU P8 Close to BB IC, recommand < 150mil
N11 GND VCCK_CPU P9
N12 GND VCCK_CPU R6
N13 GND VCCK_CPU R7
N14 GND VCCK_CPU R8
N15 GND VCCK_CPU R9
N16 GND VCCK_CPU T6 Based on your system level
N22 GND VCCK_CPU U6 design , if better FM performance
P10 GND VCCK_CPU T9
P11 GND VCCK_CPU T8 is needed on your system ,
P12 GND VCCK_CPU U7 please refer to FM desense
P13 GND
P14 performance enhance proposal
GND
P15 GND R102
B P16 GND VCC
VPROC_BB 120mil VPROC_PMU B
R10 GND
R11 Core J9
GND VCCK
R12 GND VCCK J15
R13 GND VCCK M9
R14 GND VCCK K6
R15 GND VCCK K7
R16 GND VCCK K8
T10 GND VCCK K9
T11 GND VCCK K11
2.2uF/6.3V

2.2uF/6.3V

T12 GND VCCK K14


1uF/6.3V

1uF/6.3V

1uF/6.3V

1uF/6.3V

T13 GND VCCK K15


AF1 GND VCCK M10
VCCK K16
U10 GND VCCK K17
U11 U17
C114

C115

C118

C116

C135

C120

C134

C119

C136

C137

C111

C106

C102

C103

C124

GND VCCK
V13 GND VCCK J8
W11 GND VCCK L7 Vproc remote sense :
Y21 GND VCCK L8
VCCK L9 differential 4mil with good shielding, from the BB to PMIC
VCCK L17
VCCK M6
M7 R120 GND_VPROC_FB [3]
VCCK 4mil - defferential - GND shielding
VCCK M8
J10 R121
VCCK VPROC_FB [3]
VCCK J11
VCCK J14
VCCK T16
VCCK L6
VCCK K12
VCCK T17
VCCK J16
VCCK J17
VCCK U12
VCCK U13
VCCK U14
VCCK U15
A VCCK U16
A
VCCK M17
VCCK R17

A26 DUMMY

MT6572/TMP/SMD ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210

Size Document Number Rev


D ?
01 MT6572_BB Power
Date: Friday, February 14, 2014 Sheet 2 of 17
5 4 3 2 1
5 4 3 2 1

BPI0~4 and 10~11 are 2G+3G mode both


U101-A
BPI5~9 and 12~14 are 3G mode only
[6] RX_I_P D2 DL_I_P BPI_BUS0 B12 ASM_VCTRL_A [6]
[6] RX_I_N C2 DL_I_N BPI_BUS1 B11 ASM_VCTRL_B [6]
[6] RX_Q_P B1 DL_Q_P BPI_BUS2 C12 ASM_VCTRL_C [6] U101-D
[6] RX_Q_N C1 DL_Q_N BPI_BUS3 A11 WG_GGE_PA_ENABLE [6]

BPI_BUS4 D11 [3] AUD_MISO J1 AUD_DAT_MISO


[6] TX_I_P A2 UL_I_P BPI_BUS5 C11 [3] AUD_CLK K5 AUD_CLK_MOSI
[6] TX_I_N B2 UL_I_N BPI_BUS6 A13 GPIO137_GPS_LNA_EN [10] [3] AUD_MOSI K1 AUD_DAT_MOSI
[6] TX_Q_P B4 UL_Q_P
D [6] TX_Q_N B3 UL_Q_N BPI_BUS7 A10 W_PA_B1_EN [3] PMIC_SPI_MOSI L2 PMIC_SPI_MOSI D
BPI_BUS8 B10 [3] PMIC_SPI_MISO L5 PMIC_SPI_MISO
reserve for JTAG debug
BPI_BUS9 D10 [3] PMIC_SPI_SCK L4 PMIC_SPI_SCK VIO18_PMU
BPI_BUS10 E9 W_PA_B8_EN [3,4]PMIC_SPI_CS K2 PMIC_SPI_CSN
BPI_BUS11 E8
B9 [3] WATCHDOG G2 [3] SIM1_SCLK R208 NC
BPI_BUS12 EINT7_MAG [80] WATCHDOG
VM0 A8 VM0 BPI_BUS13 B8 EINT4_GY [80] R210=20K,DDR1,VM=1.8V; [3,6]SRCLKENA H4 SRCLKENA
VM1 A7 E7 R210=NC,DDR2,VM=1.2V R210 J2
VM1 BPI_BUS14 EINT5_ALP [21] [3] EINT_PMIC EINTX
D7 NC
BPI_BUS15
[6] TXBPI D5 D6 BSI-A_DAT2 [6] [3] SIM1_SCLK H5
TXBPI BSI_DATA2
C7 BSI-A_DAT1 [6] M3
SIM1_SCLK Normal : NC
BSI_DATA1 [3] SIM1_SIO SIM1_SIO
[6] WG_GGE_PA_VRAMP F2 APC BSI_DATA0 F9 BSI-A_DAT0 [6] JTAG : 20K
BSI_EN F11 BSI-A_EN [6]
F3 VBIAS BSI_CLK G11 BSI-A_CK [6] [3] SIM2_SCLK J5 SIM2_SCLK
[3] SIM2_SIO M1 SIM2_SIO

Reserve R footprint
for JTAG debugging
MT6572/TMP/SMD
MT6572/TMP/SMD

U101-E

VIO18_PMU
C [6] CLK1_BB E1 CLK26M PWM_A D12 GPIO128_PWM_BL_CTRL
SYSTEM PWM C
PWM_B E12
[3] CLK32K_BB H2 CLK32K_IN
LCD
[3] RESETB M2 SYSRSTB LPD17 N1 EINT6_HP [5]
Parallel N2
LPD16
G4 TESTMODE LPD15 N3
LPD14 P2
AC24 N4 R216 R219 R220
FSOURCE LPD13
LPD12 R2 1 TP203
LPD11 N5
[3] CHD_DP J26 R1 MC1INS [2] NC NC NC
CHD_DP BC 1.1 LPD10
[3] CHD_DM J25 CHD_DM LPD9 P5
Based on your system level design , if better LPD8 T1
LPD7 R5
desense performance is needed on your [14] USB_DM 90-ohm differential G26 USB_DM LPD6 T2
[14] USB_DP G25 USB 2.0 T5
U101-G system , please refer to desense R203 USB_VRT H25
USB_DP LPD5
U2
USB_VRT LPD4
performance
MIPI_2nd_CAM
enhance proposal LPD3 T3
[13] GPIO_CMPDN2 L25 CMPDN2 close to BB LPD2 U5
[13] GPIO_CMRST2 K25 Parallel 8-bit R209 [13] SCL_0 C25 i2C T4
CMRST2 SCL_0 LPD1 R221 R222 R223
[13] CMPDN H22 CMPDN NC [13] SDA_0 C26 SDA_0 LPD0 V2
[13] CMRST J22 CMRST [12,21]SCL_1 B24 SCL_1
[12,21]SDA_1 B23 SDA_1
Y22 CMMCLK [13] NC NC NC
CMMCLK
2 MIPI_RDN0 R24 RDN0
2 MIPI_RDP0 R23 MIPI_CAM Y23 AD25
RDP0 CMPCLK CMPCLK [13] LPCE0B
2 MIPI_RDN1 R22 RDN1 GPIO100_CTP_RSTB F24 SPI_MISO LPTE AB26 LPTE [12]
2 MIPI_RDP1 R21 V25 F25 SPI AC26 GPIO_LRSTB [12]
RDP1 RCN_A CMVSYNC [13] GPIO99_FLASH_EN SPI_MOSI LRSTB
2 MIPI_RCN R26 RCN RCP_A W25 CMHREF [13] GPIO98_FLASH_SEL F23 SPI_SCK LPRDB AA22
2 MIPI_RCP T26 RCP RDN1_A V24 CMDAT7 [13] [12] EINT3_CTP E23 SPI_CS LPA0 AB23
RDP1_A V23 CMDAT6 [13] LPWRB AC25
2 MIPI_TDN0 P19 TDN0 RDN0_A U22 CMDAT5 [13]
2 MIPI_TDP0 P20 MIPI_LCD U21
TDP0 RDP0_A CMDAT4 [13]
2 MIPI_TDN1 N25 TDN1 [18] MC1CMD K23 MC1_CMD KROW0 B25 KROW0 [20]
2 MIPI_TDP1 N26 Y26 L21 T-flash KP A24 KROW1 [20]
TDP1 CMDAT3 CMDAT3 [18] MC1CK MC1_CK KROW1
P23 Y25 [18] MC1DAT0 K22 B26 JTMS TP205
TDN2 CMDAT2 CMDAT2 MC1_DAT0 KROW2
P24 TDP2 CMDAT1 AA25 CMDAT1 [18] MC1DAT1 M22 MC1_DAT1 KCOL0 C24 KCOL0 [20]
B 2 MIPI_TCN N20 TCN CMDAT0 AB25 CMDAT0 [18] MC1DAT2 M25 MC1_DAT2 KCOL1 D24 KCOL1 [20] B
2 MIPI_TCP N19 [18] MC1DAT3 L26 A25 TP206
TCP MC1_DAT3 KCOL2
GPIO109_SPK_EN

LCD_ID B7 AUX_IN0 UTXD1 E25 UTXD1 1 TP201


R202 MIPI_VRT P26 VRT B6 AUX_IN1
ADC UART
URXD1 D25 URXD1 1 TP202
MT6572 support JTAG from below :
C5 AUX_IN2_XP UTXD2 E26 UTXD2 1 TP207 TP209 1. KP (recommand)
R202 close to BB B5 AUX_IN3_YP URXD2 F26 URXD2
C4 AUX_IN4_XM
2. MC1
C201 A5 AUX_IN5_YM 3. CAM
MT6572/TMP/SMD
for JTAG pin out from MC1/CAM, refer
R212
to HW design notice
GPIO99_FLASH_EN
R213
GPIO98_FLASH_SEL
MT6572/TMP/SMD

VCAMD_IO_PMU MAINBOARD MARK


TP212
1
VIO18_PMU R211
EINT5_ALP [21]
R217 NC TP214
EINT7_MAG [80]
R218 NC R204 R205 1
EINT4_GY [80]
R214 NC EINT6_HP [5]
TP213
[13] SCL_0 Power by CAM_IO 1
[13] SDA_0
TP211
1

A VIO18_PMU A

R206 R207

[12,21]SCL_1
[12,21]SDA_1 Power by CTP, MEMS sensor ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
02 BB Peripheral
Date: Friday, February 14, 2014 Sheet 3 of 17
5 4 3 2 1
5 4 3 2 1

Charger

VBUS

D D

U301
R329 VCDT VCDT rating: 1.268V
MT6323/VFBGA145/P0.4/B0.25/5.8X5.8

1. Close to Battery Connector. R324


SPK_P K1
(Rsense (R328) <10mm) C329
SPK_N L1
2. Main path should be 40mil. VBAT P1 VBAT_SPK
(VBUS -> U303's E, -> U303's C -> R328 -> VBAT) 40mils C313 L2 GND_SPK AU_HSP H1 AU_HSP [5]
2.2uF/6.3V G1
3. Star connection from R328 to BAT Connector AU_HSN AU_HSN [5]

AU_HPL H4 AU_HPL [5]


R331 CHR_LDO MICBIAS0 F2 J4
AU_MICBIAS0 AU_HPR AU_HPR [5]
MICBIAS1 G2 AU_MICBIAS1
C312
U303 [5] AU_VIN0_P E4 E9
AU_VIN0_P ISINK0 KEYLED1
3

1
[5] AU_VIN0_N F4 AUDIO DRIVER C9
AU_VIN0_N ISINK1
U305 E10
ISINK2
1 3 2 SSM3K35MFV VDRV [5] AU_VIN1_P G3 AU_VIN1_P ISINK3 C10
[5] AU_VIN1_N G4 AU_VIN1_N
VA_PMU D2
2

AU_VIN2_P
D1 AU_VIN2_N
40mils
ISENSE J2 AVDD28_ABB

1
C314 D3
40mils 4mil 1uF/6.3V AVDD28_AUXADC
H2 GND_ABB D305
R328
Differential with VBAT to MT6323 pin P13 p12
Rsense

2
[5] ACCDET E2 ACCDET BUCK OUTPUT C14
4mil VPROC L301
[6] CLK4_AUDIO E1 CLK26M VPROC D14 VPROC_SW VPROC_PMU
40mils
VPROC E14

AUXADC_REF [6] VPROC_FB B12 VPROC_FB [1]


ISENSE/BSTSNS 4mil CHARGER
GND_VPROC_FB C12 GND_VPROC_FB [1]
VBAT to Rsense
differential P13 BATSNS
BATTERY TP301 R334
ISENSE
BAT_ON
ISENSE
BAT_ON
P12
K3
ISENSE
BATON
VPA
VPA
A14
B14
VPA_SW L304 PMU_PA

R334,R335 must to be close to C330 VCDT A12


VCDT VCDT
CONNECTOR 1uF/6.3V VDRV M13 D12 C328
1

VDRV VDRV VPA_FB


C
40mils PMIC AUXADC_REF pin
40mils 2.2uF/6.3V
C

4 4 3 3 VBAT CHR_LDO CHR_LDO N13 CHRLDO


5 2 R317
5 2 BAT_ON L303
6 6 1 1 VSYS H14 VSYS_SW VSYS_PMU
7

C316
C316 Close to PMIC 1uF/6.3V CONTROL SIGNAL D306 VBAT
7

R316 M2 2 1
[20] PWRKEY PWRKEY
R335 [2] WATCHDOG A1 SYSRSTB

2
J303 VR302 VR301 C317 C302 C305 C315 [2] RESETB K4 RESETB ALDO OUTPUT
A9 FSOURCE VA M3 VA_PMU
[2] EINT_PMIC A7 INT
C331 D307
N12 EXT_PMIC_EN VCN28 N3 VCN_2V8_PMU
NC L4 VTCXO_PMU

1
if battery NTC is 10kohm, R334=16.9K, R335=27K; VTCXO VEMC_3V3_PMU
N2 PMU_TESTMODE VPA_SW
if battery NTC is 47kohm, R334=61.9K, R335=100K. VCAMA P3 VCAMA_PMU

2
[2] AUD_MOSI E7 AUD_MOSI VCN33 M6 VCN_3V3_PMU
[2] AUD_CLK E8 AUD_CLK AVDD33_RTC C3 VRTC
B6 D308 C326
[2] AUD_MISO AUD_MISO NC C321
A2 C355 1uF/6.3V NC

1
[2,6]SRCLKENA SRCLKEN
M1 DLDO OUTPUT
FCHR_ENB
VM J13 VM_PMU
[2] PMIC_SPI_SCK D9 SPI_CLK VRF18 H11 VRF18_PMU
[2,4]PMIC_SPI_CS B7 SPI_CSN VIO18 L12 VIO18_PMU
[2] PMIC_SPI_MOSI D8 SPI_MOSI VIO28 M4 VIO28_PMU
VBAT [2] PMIC_SPI_MISO B8 SPI_MISO VCN18 J12 VCN_1V8_PMU
VCAMD K14 VCAMD_PMU
VCAM_IO L13 VCAMD_IO_PMU
F13 VBAT INPUT
R336 VBAT_VPROC
80mil 30mil F14 VBAT_VPROC
G13 VBAT_VPROC VEMC_3V3 P7 VEMC_3V3_PMU
4mil (VPA no use) A13 VBAT_VPA VMC L6 VMC_PMU
VMCH P4 VMCH_PMU
15mil H13 VBAT_VSYS VUSB N6 VUSB_PMU
P8 VBAT_LDOS3 VSIM1 P9 VSIM1_PMU
Add Zenar Diode 20mil P6 VBAT_LDOS3 VSIM2 N9 VSIM2_PMU
Place on the path 20mil P5 VBAT_LDOS2 VGP1 L8
C310 20mil P2
from VBAT to 500mW
IC VBAT_LDOS1
VIBR M7 VIBR_PMU
(Battery connector VSYS_PMU 20mil J14 AVDD22_BUCK VGP2 N8
M14 AVDD22_BUCK VGP3 L14
or test point or IO N7
D301

VCAM_AF VAF_PMU
connector)
VF : 4.85V~5.36V DVDD18_DIG_PMIC A8 DVDD18_DIG
VIO18_PMU A5 DVDD18_IO

Between IC and IO port AUXADC


[6] AUXADC_REF AUXADC_REF C2 AUXADC_VREF18
B AUXADC_TSX B1 AUXADC_AUXIN_GPS VREF P14 VREF B
GND_AUXADC B2 AVSS28_AUXADC
C332 dedicate VSS ball, must return to cap then to main GND:
C327 C322 C320 1. GND_VREF(N14) => C320
1uF/6.3V BC 1.1
[2] CHD_DM A10 CHG_DM GND_VREF N14
[2] CHD_DP A11 CHG_DP

RTC_32K1V8 D5 CLK32K_BB [2]


R301 SIM LVS RTC C4
RTC_32K2V8
C322 must to be close [2] SIM1_SCLK B5 SIM1_AP_SCLK XIN A3 32K_IN
to PMIC AUXADC_TSX pin [2] SIM1_SIO M11 SIMLS1_AP_SIO XOUT A4 32K_OUT X301
RTC
1uF/6.3V

1uF/6.3V

1uF/6.3V

E6 SIM1_AP_SRST
NC

[2] SIM2_SCLK C5 SIM2_AP_SCLK GND_ISINK B10


[2] SIM2_SIO K11 SIMLS2_AP_SIO GND_VSYS G11
D6 E13 1 2
C301

C303

C304

C318

C306

C309

C307

C308

SIM2_AP_SRST GND_VPA
Connect TSX/XTAL GND GND_VPROC E11
to AUXADC_GND first [19] SCLK M9 SIMLS1_SCLK GND_VPROC F11
[19] SIO N11 SIMLS1_SIO GND_VPROC F10
than connect to main GND [19] SRST M10 SIMLS1_SRST
GND_LDO K6
K9 K8 C324 C319
[19] SCLK2 SIMLS2_SCLK GND_LDO
[19] SIO2 L11 SIMLS2_SIO
[19] SRST2 K10 SIMLS2_SRST GND_LDO F5 Close to chip
GND_LDO F6
F7 R333 NC DCXO_32K [6]
GND_LDO VIBR_PMU
F8

GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO F9
GND_LDO G5
GND_LDO G6

J10
J9
J8
J7
J6
H10
H9
H8
H7
H6
H5
G9
G8
G7
RTC 32K : X301+C324+C319=> mount, R333=> NC
32K-less: X301+C324=> remove, C319+R333=> 0R
Vibra R337

1 J301

1uF/6.3V
VRTC

C311
R312

A A
C323 1 J302

1
C325
B301

2
ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
03 MT6623_PMIC core
Date: Monday, February 17, 2014 Sheet 4 of 17
5 4 3 2 1
5 4 3 2 1

U101-F

DRAM DRAM
AF2 Data Ctrl
ED31 ED31 VIO18_PMU
ED30 AC5 ED30 ECS0_B AF25 ECS0_B
ED29 AE4 ED29 ECS1_B AD18 ECS1_B
ED28 AD5 ED28
AF3 AF19
ED27
ED26
ED25
AF5
AE5
AB6
ED27
ED26
ED25
EWR_B
ERAS_B
ECAS_B
AB18
AC18
AB19
Memory MCP C421
D ED24 ED24 ECKE ECKE D
AB16 VM_PMU R401 VIO_EMI
ED23 ED23
ED22 AE13 ED22 EDQM0 AD12 EDQM0
AE14 AE12 EDQM1 C422
ED21 ED21 EDQM1
AC15 AB13 EDQM2 U402
ED20 ED20 EDQM2
ED19 AF16 ED19 EDQM3 AD8 EDQM3 EA0 U3 CA0 VDD1 E6
ED18 AE15 ED18 EA1 T3 CA1 VDD1 F1
AE16 Y13 EDQS0 EA2 R3 V1 VIO_EMI
ED17 ED17 EDQS0 CA2 VDD1
ED16 AF15 ED16 EDQS1 AA9 EDQS1 EA3 R2 CA3 VDD1 W6
ED15 AC7 ED15 EDQS2 AA14 EDQS2 EA4 R1 CA4
AE7 Y8 EDQS3 EA5 K2 E5 C401
ED14 ED14 EDQS3 CA5 VDD2
ED13 AC9 ED13 EA6 J2 CA6 VDD2 G2
ED12 AF6 ED12 EDQS0_B AA13 EDQS0_B EA7 J3 CA7 VDD2 K1
ED11 AB9 ED11 EDQS1_B Y9 EDQS1_B EA8 H3 CA8 VDD2 M7 Put C402 & C403 between BB & memory.
ED10 AF8 ED10 EDQS2_B Y14 EDQS2_B EA9 H2 CA9 VDD2 U2
ED9 AE8 ED9 EDQS3_B AA8 EDQS3_B VDD2 W5
AE6 ED0 T8 C402
ED8 ED8 DQ0
AE11 Y18 ED1 R8 F7
ED7 ED7 EDCLK0_B DQ1 VDDQ
AE9 AA18 ED2 R7 F10
ED6 ED6 EDCLK0 DQ2 VDDQ
AF9 ED3 R9 G5 C403
ED5 ED5 DQ3 VDDQ
ED4
ED4 AC13 ED4 EDCLK1_B AA19 EDCLK_B
ED5
R6 DQ4 Power VDDQ H9
ED3 AF11 ED3 EDCLK1 Y19 EDCLK P7 DQ5 VDDQ J10
AF12 ED6 P8 L6
ED2 ED2 DQ6 VDDQ
AE10 ED7 P9 M6 C406 1uF/6.3V
ED1 ED1 DQ7 VDDQ
AD15 Y4 ED8 K9 N6
ED0 ED0 ND0 NLD0 DQ8 VDDQ
AA2 ED9 K8 R10
ND1 NLD1 DQ9 VDDQ
AB17 VREF1 ND2 V5 NLD2
ED10 K7 DQ10 VDDQ T9 C405 eMMC
EVREF AC11 W1 DO NOT use these GPIO as enable signal @ eMMC boot ED11 J6 U5
VREF0 ND3 NLD3 DQ11 VDDQ
ND6 Y3 NLD6
ED12 J9 DQ12 VDDQ V7
VIO18_PMU R461:0 ohm R462 NC
DRAM
Y2 NLD8
(refer to design notice - GPIO selection) ED13 J7 V10
Address ND8 ED14 DQ13 VDDQ R456:0 ohm R457 NC R458 NC
AE19 EA18 ND9 W2 NLD9 J8 DQ14
AE18 W4 ED15 H8 J1
NLD12
AE17
EA17
EA16
ND12
ND13 W3 NLD13
ED16 W7
DQ15
DQ16
VDDCA
VDDCA L1 R402 If use Nand MCP, R402: 47K ohm. R464:0 ohm R463 NC
AC23 V1 ED17 U6 T2 NC
EA15 ND15 NLD15
ED18 DQ17 VDDCA NAND If use eMMC MCP, R402: NC. R459:0 ohm R460 NC
AF22 EA14 NCEB W5 NCEB W8 DQ18
AE21 Y5 ED19 T5 A8 NAND_VCC_EMMC_VCC
AD24
EA13
EA12
NWRB NWRB
ED20 U7
DQ19
DQ20
VCC
VCC B2 R402:47Kohm
AC22 ED21 W9 B8 NAND_D15_EMMC_VCCQ
EA11 ED22 DQ21 VCCQ
AE24 EA10 V8 DQ22 VDDI A5 NAND_VCC_EMMC_VDDI
EA9 AE26 EA9
ED23 T6 DQ23
NAND
EA8 AE25 eMMC I/F ED24 H6 B5 C410
EA8 DQ24 CLKM NREB
EA7 AD21 EA7 DVDD18_MC0
MC0_RSTB AB1 NLD10
ED25 F8 DQ25 RST C1 NLD10
C404 C412 R461:NC R462 0 ohm
EA6 AD22 AD3 ED26 E9 C5 1uF/6.3V
EA6 MC0_DAT7 NALE DQ26 CMD NRNB
EA5 AB20 EA5 1.8VMC0_DAT6 AC3 NCLE
ED27 G7 DQ27 eMMC R456:NC R457 0 ohm R458 0 ohm
EA4 AE22 AC2 ED28 H5 B4
NLD4 NALE
EA3 AF21
EA4
EA3
MC0_DAT5
MC0_DAT4 AD2 NLD5
ED29 E8
DQ28
DQ29
DAT7
DAT6 A4 NCLE
R464:NC R463 0NAND
ohm
EA2 AE23 AE2 ED30 G6 A6 R462 NC VIO18_PMU
EA1 AF18
EA2
EA1
MC0_DAT3
MC0_DAT2 AE1
NLD7
NLD14
ED31 E7
DQ30
DQ31
DAT5
DAT4 B6
NLD4
NLD5
R459:NC R460 0 ohm
EA0 AE20 AB3 A7
EA0 MC0_DAT1
MC0_DAT0 AB2
NLD11
GPIO46
R454 ZQ0 G3 ZQ0
DAT3
DAT2 B7
NLD7
NLD14
R402:NC
NAND_VCC_EMMC_VCC
EMMC
R461 VEMC_3V3_PMU
AC1 R455 ZQ1 F3 B3
C MC0_CK NREB ZQ1 DAT1 NLD11 C
AF24 ERESET MC0_CMD AE3 NRNB DAT0 A3 NWPB

F6 VSSQ CS0# P1 ECS0_B


F9 VSSQ CS1# P2 ECS1_B NANDNC
G10 NAND_D15_EMMC_VCCQ R457
VSSQ NLD15
MT6572/TMP/SMD H10 VSSQ CKE0 N1 ECKE
J5 VSSQ CKE1 N2
K10 R456
VSSQ
M5 VSSQ CLK M3 EDCLK EMMC
P10 VSSQ CLK# L3 EDCLK_B NANDNC
R5 NAND_VCC_EMMC_VDDI R458 VIO18_PMU
VSSQ
T10 VSSQ DQS0 P6 EDQS0
U10 VSSQ DQS0# P5 EDQS0_B
V6 VSSQ DQS1 K6 EDQS1
V9 VSSQ DQS1# K5 EDQS1_B
Please make sure the ball map is T1
DQS2 U8
U9
EDQS2
EDQS2_B
NANDNC
R463 WATCHDOG [2]
VSSCA DQS2#
M1 G8 EDQS3
match to the MCP type you selected H1
VSSCA
VSSCA
DQS3
DQS3# G9 EDQS3_B EMMC
R464
NWPB GPIO46
VIO_EMI
B9 VSSM DM0 N5 EDQM0
E1 VSSM DM1 L5 EDQM1
F2 VSS LP-DDR2 DM2 T7 EDQM2
F5 VSS DM3 H7 EDQM3
G1 R452
L2
VSS
K3
NANDNC
R460 NAND_D3_EMMC_VSS
VSS VREFCA EVREF NLD3
M8 VSS VREFDQ M9
U1 VSS
V2 C2 N109662888 R417 NC EVREF
V5
VSS NC
C4 N109408516 R408 NC
NLD1 EMMC
R459
VSS NC NWRB
NAND_D3_EMMC_VSS C3 C6 N109619952 R410 NC
VSSQM NC NLD6
D1 N109631512 R411 NC
NC NLD8
A1 D2 N109650637 R412 NC R453 C453
DNU NC NLD0
A2 D3 N109643029 R413 NC
DNU NC NLD2
A9 D4 N109407950 R409 NC
DNU NC NCEB
A10 D5 N109657406 R414 NC
DNU NC NLD12
B1 D6 N109659726 R415 NC
DNU NC NLD13
B10 E2 N109660133 R416 NC
DNU NC NLD9
E10 DNU NC E3
W1 DNU NC M2
W10 DNU NC N3
Y1 DNU NC P3 Ôö¼ÓÍøÂçÃûΪ·ûºÏMMD·ÂÕæ¡£
Y2 DNU NC V3 ´Ë×éµç×èΪ¼æÈÝEMMC/NANDÄ¿µÄ¡£
Y9 DNU NC W2
Y10 DNU NC W3

B B

A A

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
04 Memory
Date: Friday, February 14, 2014 Sheet 5 of 17
5 4 3 2 1
5 4 3 2 1

Receiver Earphone Audio same power domain

VR504 close to IC
close to IC close to connector close to connector
C506 VIO18_PMU R505

[3] AU_HSP L503


REC501
[2] EINT6_HP R506

D C505 2 D
2
1 1 Reserve bead+C footprint for FM
L504
performance tuning C530 C529
[3] AU_HSN
SDRP0615CJ03-F2B
NC NC
C504 VR505 J502
2
R501 C519 R507 HP_MP3L L505 4
[3] AU_HPL
L511 5
R502 C520 R508 HP_MP3R L510 3
[3] AU_HPR
HP_MIC L507 1
C521 C522
R509 R510

VR508

VR509

VR510

VR501
Handset Microphone 1
R521 FM_ANT [10]
MICBIAS0 C528
L509

R514 R522 FM_RX_N_6572 [10]


Close to Close to
C C
BB MIC

Analog MIC Single via to GND plane


R515 C510 VR506

C511 L506
[3] AU_VIN0_P MICP

C513 C508

C512 L508
[3] AU_VIN0_N MICN

R516 VR507
C509

R517

MICBIAS1

Earphone MICPHONE
B R511 B
Close to BB Close to MIC GND of C(4.7uF) and headset
should tie together and single
[3] AU_VIN1_N C523 C531 via to GND plane
C526
R512 Close to EarJack

C525

Speaker C527

VIO18_PMU VBAT
C501 VR502 [3] AU_VIN1_P C524 HP_MIC

U501
SPKP
C507 R503 A1 A3 L501
AU_HPR INP OUTP
together then single
C514 R504 C1 C3 L502 C502 R513
INM OUTN [3] ACCDET
via to main GND
C2 R519 NC
GPIO109_SPK_EN CTRL SPKN
VREF B2
R520 NC C503
B1 AGND VDD A2
B3 VR503
C515 PGND

R518 C516 C517

A A

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
05 Audio Circuit
Date: Friday, February 14, 2014 Sheet 6 of 17
5 4 3 2 1
GGE_PA_LB_IN C630 R631

R640 R643 U601

8
7
6
5
4
3
2
1
NC NC

GND
GND
GND
GND
GND
GND
GND
GND
J601
GND 29 MM8430-2600B J602

3
D

GND

GND
9 TX_HB_IN GND 28

SKY77593

GND GND
R627 10 TX_LB_IN GND 27 R618 C615
ASM_VCTRL_A BS2 ANT ASM_CPL 1 IN ANT 6 4 SIG GND 2
ASM_VCTRL_B R637 11 26

GND

GND
12 BS1 GND 25 R630
13 VBATT GND 24
14 VCC TRX_4 23 TRXB8
C628 C616

VRAMP

1
TRX_1
TRX_2
TRX_3
MODE
C611 C625

TXEN
GND

GND
NC NC

15
16
17
18
19
20
21
22
VBAT
R620
C629 C631 C624 C604
TRXB1
NC NC
2G_LB
2G_HB

ASM_VCTRL_C R629
WG_GGE_PA_ENABLE R638

EDGE TXM
C617 C622

WG_GGE_PA_VRAMP R636

R641
C609

RX
L601 12nH
LB_RX_P
Z600

10
C
C601 L618 2.2nH L615 L616

GND
2G_LB
1 LBIN LBOUT 9 NC 39nH
C665 C666
2 8 L619 12nH
GND LBOUT LB_RX_N
NC NC
3 7 L623 6.2nH
GND HBOUT HB_RX_P
C667
L622 3.0nH 4 6
2G_HB

GND
HBIN HBOUT L624 L625
C668 NC 7.5nH
C670

5
NC L626 6.2nH
HB_RX_N

GGE_PA_HB_IN

GGE_PA_LB_IN
W_PA_B1_IN

W_PA_B8_IN
3GB1_RXP

3GB1_RXN

3GB8_RXP

3GB8_RXN
VRF18-1

C669

R633
VTCXO_PMU VTCXO28-1 PDET
R634 L617
VRF18_PMU VRF18-1
2nH

VIO18_PMU R635 VIO18 VIO18

D11

C10
A10

A11

B11

B10
D3
C3

C2

C7

C8

C9
E3

A2

A3

B3

B4

A5

B5

A6

B6

B8

A8

A9
J2

J7

J8
U600

GND
GND
GND
GND
GND

3GB1_RXP

3GB1_RXN

3GB5_RXP

3GB5_RXN

3GB2_RXP

3GB2_RXN

3GB8_RXP

3GB8_RXN

2GHB_TX

3GH1_TX

3GH2_TX

3GL5_TX

2GLB_TX

VTXHF

DET

GND
GND

GND
GND
GND
GND
GND
B
F3 GND GND D9
G3 GND GND E9
H3 GND GND F9
J3 GND GND G9
C4 FDD RX TXO H9
GND GND
D4 GND GND J9

A1 B40_RXP DETGND D10

B1 B40_RXN TMEAS C11 TMEAS

LB_RX_P C1 LB_RXP V28 E10 VTCXO28-1


TDD RX
D1 G10 TX_I_P [2] R639
LB_RX_N LB_RXN 3GTX_IP C674 NC
2G RX HB_RX_P E1 HB_RXP
TX(I/Q) 3GTX_IN G11 TX_I_N [2]

HB_RX_N F1 HB_RXN 3GTX_QP F10 TX_Q_P [2]


R645
C675 F2 F11 TX_Q_N
VRF18-1
G2
VRXHF

RFVCO_MON
MT6166 3GTX_QN

TXVCO_MON L11 VRF18-1


[2]

R645close to 3G PA
MT6166/TMP/SMD
4 3 XTAL1 J1 J11 C676
GND X600 HOT XTAL1 VTXLF
H2 XTAL2 TXBPI H10 TXBPI [2]
XTAL2 XO
1 HOT GND 2 K1 VTCXO28 RCAL J10 RCAL R600
Test pin
DCXO_32K_EN G1 32K_EN TST2 K11

L1 EN_BB TST1 L10


R616 BSI
VTCXO28-1
K2 CLK_SEL BSI_DATA2 G8 BSI-A_DAT2 [2]
C677 26M output
R601 NC L2 H8 BSI-A_DAT1 [2]
VTCXO28-1 XO3 BSI_DATA1
R604 E4 B7
GND GND

AVDD_VIO18
F4 GND GND J6

BSI_DATA0
G4 RX(I/Q) D8
GND GND

BSI_CLK
OUT32K

VXODIG
H4 E8

XMODE

BSI_EN
RX_QP

RX_QN
GND GND

VRXLF

RX_IP

RX_IN
GND
GND
GND
GND
GND
GND

GND
GND

GND
GND
GND
GND
XO4

XO2

XO1
[2,3]SRCLKENA

J4
C5
D5
E5
F5
D7

K4

K3

L4

K5

L5

K6

K7

L7

L8

K8

K10

K9

G6

H6

F8

E7
J5

C6
D6
E6
F6
[3] CLK4_AUDIO R625
BSI-A_DAT0 [2]
[2] CLK1_BB R626
DCXO_32K BSI-A_CK [2]

[2] RX_I_P

[2] RX_I_N

[2]RX_Q_P

[2]RX_Q_N
VIO18_VGPIO
BSI-A_EN [2]
R614 NC XMODE
VTCXO28-1
Logic R617
XMODE VXODIG VIO18
MODE
DCXO_ R622
VIO18 A
32K_EN VRF18-1
C682
1uF/6.3V C684
R621 NC
DCXO + 32K XO 0(GND) 1(VIO18) 1(VIO18) VTCXO28-1
VIO18
R619 VXODIG
Reserved LC filter
DCXO + 32K-Less 1(VTXCO28) 1(VTXCO28) 1(VTXCO28)

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
06 MT6616_T+G
Date: Friday, February 14, 2014 Sheet 7 of 17

5 4 3 2 1
×÷TDÏîÄ¿ÓëEDGEÏîÄ¿£¬´ËÒ³NC¡£
D

WCDMA B1/B8 RX
C701
3GB1_RXN [6]
[6] W_PA_OUT_B1

U701

L701 L703
NC 4.3nH 3 6 R701
TX ANT [6] TRXB1
1 RX
8 RX L713

G
G
G
G
G
2nH C705
C702 NC

2
4
5
7
9
3GB1_RXP [6]

L706 1.8nH VBAT R702 NC PMU_PA


3GB8_RXN [6]

[6] W_PA_OUT_B8
U702

L704 L708
NC 33nH 3 6 L709 1.0nH C
TX ANT [6] TRXB8
1 RX
8 RX

G
G
G
G
G
L710 L711
L707 1.8nH 9.1nH 27nH

2
4
5
7
9
3GB8_RXP [6]

WCDMA B1 TX WCDMA B8 TX
VBAT

VBAT C714 C715 C716


PMU_PA 2.2uF/6.3V

C706 C707 C708


2.2uF/6.3V C709 C710
VM1
VM0 PMU_PA

VM1
C717 C718

10
VM0

4
3

1
C719
R707

VMODE_0
VMODE_1

VBAT
VCC
[6] W_PA_B8_IN
10
4
3

C711 R708 R710 1.0nH B


2 9
VMODE_0
VMODE_1

VBAT
VCC

R703 C712 C713 RF_IN RF_OUT [6] W_PA_OUT_B8


W_PA_B1_IN NC
NC NC
2 9 L712 1.0nH 8 U704 6 L720 C721
RF_IN RF_OUT COUPLE CPL_IN CPL_OUT
R704 [6] W_PA_OUT_B1 22nH NC
NC
8 U703 6 1 W_PA_B8_EN R709 5

GND
GND
CPL_IN RF7241 CPL_OUT [6] COUPLE VEN

W_PA_B1_EN R714 5 R711 R712

7
11
1
GND
GND

VEN [6] PDET


R706
NC R713
7
11

R705

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
07 WCDMA_B1/B8_TX
Date: Friday, February 14, 2014 Sheet 8 of 17

5 4 3 2 1
5 4 3 2 1

D D
8-pin connector

SIM1 T-FLASH CARD


VMCH_PMU
11
12
13
14

J903
1 5
11
12
13
14

VSIM1_PMU VSIM GND


[3] SRST 2 6 R910
RST VCC VSIM1_PMU
[3] SCLK R907 3 7
CLK I/O SIO [3]
4 NUM NUM 8
J901
10
9

[2] MC1DAT2 R901 1 9


R902 DAT2 9
[2] MC1DAT3 2 10
10
9

R903 CD/DAT3 10
[2] MC1CMD 3 CMD 11 11
4 VDD 12 12
C [2] MC1CK R904 5 13 C
CLK 13
6 VSS2 14 14
[2] MC1DAT0 R905 7 15
VR908 R906 DAT0 15
[2] MC1DAT1 8 DAT1 16 16
VR912 [2] MC1INS R909 NC 17 18
C902 DET 18
1uF/10V VR909 VR913
VR901

VR902

VR903

VR904

VR905

VR906

C901
2.2uF/6.3V

B SIM2 B
8

J1002
1 4
8

VSIM2_PMU VSIM GND


[3] SRST2 2 RST VPP 5 VSIM2_PMU

[3] SCLK2 R908 3 6


10

CLK I/O SIO2 [3]


9
10

VR914

C903
VR910

VR911

VR907

1uF/10V

A A

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
09 SIM&TF
Date: Friday, February 14, 2014 Sheet 9 of 17
5 4 3 2 1
5 4 3 2 1

U101-C

GPS_RX_IN B16 GPS_RXIN GND_WBG A14


GPS_RX_IP A16 GPS_RXIP GND_WBG D18
GND_WBG B22
GND_WBG C16
GPS_RX_QN B14 GPS_RXQN GND_WBG C17
GPS_RX_QP B15 GPS_RXQP GND_WBG C18
GND_WBG C19
GND_WBG C20
WB_TXIN A19 WB_TXIN GND_WBG C21
WB_TXIP B19 WB_TXIP GND_WBG C15
GND_WBG D16
WB_TXQN B18 WB_TXQN GND_WBG D17
WB_TXQP A18 WB_TXQP GND_WBG D19
GND_WBG D20 D
WB_RXIN A21 WB_RXIN
WB_RXIP A22 WB_RXIP
CONN_WB_CTRL0 E20 WB_CTRL0
WB_RXQN B20 WB_RXQN CONN_WB_CTRL1 F20 WB_CTRL1

5
WB_RXQP B21 WB_RXQP CONN_WB_CTRL2 D22 WB_CTRL2
CONN_XO_IN R1013 4 6 R1025 VCN_2V8_PMU E22 WB_CTRL3

TSENS
OUT VCC CONN_WB_CTRL3
CONN_WB_CTRL4 C22 WB_CTRL4
CONN_WB_CTRL5 C23 WB_CTRL5
3 1 C1022
GND VREF 1uF/6.3V AVDD18_WBG F18 AVDD18_WBG CONN_RSTB C14 CONN_RSTB

EN
CONN_SEN E15 CONN_SEN
CONN_SDATA E14 CONN_SDATA
U1006 G12 CONN_SCLK

2
CONN_SCLK

CONN_F2W_DAT E13 FM_DATA


CONN_F2W_CLK F12 FM_CLK

CONN_XO_IN F14 CONN_XO_IN

MT6572/TMP/SMD

WIFI/BT/GPS Single ANT Ref. WB_CTRL3

TP1002 TP1001 R1007 NC WB_CTRL2


50 Ohm WB_CTRL4
C
WB_CTRL1
WB_CTRL5
1
2
3
4

1
2
3
4

Close to MT6572
F1002
WB_CTRL0
6 1 C1043
GND WIFI
50 Ohm 50 Ohm
WB_RXIP
R1006 50 Ohm R1023 5 2 AVDD18_WBG 10mil R1017 VCN_1V8_PMU
ANT GND L1005

29 AVDD18_WB
NC WB_RXIN
L1004 Same pad 4 3 50 Ohm C1044
C1042 39nH GND GPS C1001
NC
C1004
30

28

27

26

25

24

23

22

21
NC U1000
W_LNA_EXT

AVDD18_WBT

WB_CTRL5

WB_CTRL4

WB_CTRL3

WB_CTRL2

WB_CTRL1

WB_CTRL0

WB_RX_IP

WB_RX_IN
Optional: L1004 for better ESD performance
WBG_ANT 50 Ohm 31 WB_GPS_RF_IN WB_RX_QP 20 WB_RXQP

AVDD18_WB 10mil R1018 VCN_1V8_PMU


GPS_RF_LNA 50 Ohm R1016 NC 32 19 WB_RXQN
GPS_DPX_RFOUT WB_RX_QN
AVDD18_GPS 10mil R1021 VCN_1V8_PMU

AVDD33_WB 33 AVDD33_WBT WB_TX_IP 18 WB_TXIP

Star Conn
C1007
34 17 WB_TXIN C1008 for WB/GPS/WBG 1V8
NC WB_TX_IN
50 Ohm

35 NC WB_TX_QP 16 WB_TXQP

GPS_RF C1005 C1006


1uF/6.3V
AVDD28_FM 36 AVDD28_FM MT6627-NS/MQFN40/SMD/P0.4/5X5 WB_TX_QN 15 WB_TXQN

B
FM [5] FM_RX_N_6572 37 FM_LANT_N GPS_RX_IP 14 GPS_RX_IP

[5] FM_ANT L1011


38 FM_LANT_P GPS_RX_IN 13 GPS_RX_IN

L1012 Same pad


NC R1010 NC GPS_RFIN 50 Ohm 39 12 GPS_RX_QP
GPS_RFIN GPS_RX_QP

AVDD18_GPS 40 AVDD18_GPS GPS_RX_QN 11 GPS_RX_QN


R1015
AVDD28_FSOURCE

AVDD28_FM 8mil R1022 VCN_2V8_PMU


41 DVSS
F2W_DATA

C1002
F2W_CLK
FM_DBG
HRST_B

SDATA

XO_IN
SCLK

CEXT
SEN

GPS VCN_2V8_PMU MT6627 SMD QFN40


1

10

R1019 Close to MT6627

CONN_RSTB AVDD33_WB 20mil R1024 VCN_3V3_PMU


Close to ANT
C1051 1uF/6.3V CONN_XO_IN
1uF/6.3V

R1026 NC GPS_ANT
C1013 C1003 C1009
2.2uF/6.3V C1010
FM_DATA C1011
50 Ohm C1037 L1006 7.5nH 2.2uF/6.3V
GPS_RF_LNA 1 4 3 4
C1014

IN OUT RFIN VCC


G
G
G

2 5 R1020 GPIO137_GPS_LNA_EN [2]


GND SHDN A
1 6 FM_CLK
2
3
5

U1005 GND RFOUT


50 Ohm
C1050 U1010
NC
SAFEB1G57KE0F00

CONN_SCLK

CONN_SDATA ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
CONN_SEN WBW5210
Size Document Number Rev
D ?
10 MT6627_WIFI_BT_FM_GPS
Date: Friday, February 14, 2014 Sheet 10 of 17

5 4 3 2 1
5 4 3 2 1

D D

Power Key
C C

CN1102

1 1 GND-E1 7
2 2
R1103 3
2 KCOL1 3
R1101 4
2 KROW0 4
R1102 5
2 KROW1 5
6 6 GND-E2 8
[3] PWRKEY
VR1103

VR1104

VR1105

C1101
VR1101

B B

A A
ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
11 Keypad
Date: Friday, February 14, 2014 Sheet 11 of 17
5 4 3 2 1
5 4 3 2 1

Main LCM
CTP
1 TE 24 GND
2 VCC 23 DA0- CTP I2C address
3 IOVCC 22 DA0+
Main LCM 4 RESET
5 LED+
6 LED+
21
20
19
GND
GND
CLK-
0XBA/0XBB
7 GND 18 CLK+

GT_DRV0
GT_DRV1
GT_DRV2
GT_DRV3
GT_DRV4
GT_DRV5
GT_DRV6
GT_DRV7
GT_DRV8
8 LED- 17 GND
D 9 LED- 16 GND D
10 ID(1.5V) 15 DA1- 3 O2 I2 2 MIPI_TDN1 2
TP1205 11 BC 14 DA1+ 4 1 MIPI_TDP1 2
O1 I1
12 GND 13 GND
TP1206

41

40
39
38
37
36
35
34
33
32
31
J1201 EMI1203 U1202
LPTE 1 24

EP

AGND
DRV0
DRV1
DRV2
DRV3
DRV4
DRV5
DRV6
DRV7
DRV8
2 1 24
VIO28_PMU 2 2 23 23
VIO18_PMU 3 3 22 22 3 O2 I2 2 MIPI_TCN 2
[12] GPIO_LRSTB 4 4 21 21 4 O1 I1 1 MIPI_TCP 2
LEDA 5 5 20 20 GT_SENS0 1 SENS0 DRV9 30 GT_DRV9
6 19 GT_SENS1 2 29 GT_DRV10 DVDDIO_CTP
6 19 EMI1202 SENS1 DRV10
7 7 18 18 GT_SENS2 3 SENS2 DRV11 28 GT_DRV11
LEDK 8 8 17 17 GT_SENS3 4 SENS3 DRV12 27 GT_DRV12
9 9 16 16 GT_SENS4 5 SENS4 DRV13 26 GT_DRV13
R1223 10 15 3 2 MIPI_TDN0 2 GT_SENS5 6 25 GT_DRV14 R1202
LCD_ID 10 15 O2 I2 SENS5 DRV14
2 CABC 11 11 14 14 4 O1 I1 1 MIPI_TDP0 2 GT_SENS6 7 SENS6 DRV15 24 GT_DRV15
12 12 13 13 GT_SENS7 8 SENS7 DRV16 23 GT_DRV16

SENSOR_OPT1
SENSOR_OPT2
GT_SENS8 9 SENS8 NC 22
EMI1201
GT_SENS9 10 SENS9 RSTB 21 GPIO100_CTP_RSTB [2]
C1208 C1211

I2C_SDA
DVDD12

I2C_SCL
AVDD28
AVDD18

DVDDIO
DGND
1uF/6.3V 1uF/6.3V
C1214

INT
11
12
13
14
15
16
17
18
19
20
DVDDIO_CTP

C1204 1uF/6.3V DVDDIO_CTP C1207 1uF/6.3V

AVDD18_CTP
DVDD12_CTP
C VIO28_PMU SCL_1 [2,21]
C
SDA_1 [2,21]
OPT2
OPT1
EINT3_CTP [2]
C1205
2.2uF/6.3V

C1206 R1201
L1201 2.2uF/6.3V

VBAT

U1201 D1201
6 VIN SW 1 1 2 LEDA [3]

R1215

2 GND OVP 5
J1202

42
41
NC
ILED 3 LEDK [2] 1 40
GPIO128_PWM_BL_CTRL R1214 4 2 39
EN
OPT1 3 38 DVDDIO_CTP
2 CABC R1212 NC 4 37 GT_DRV14
C1209 C1210 R1220 OPT2
GT_DRV13 5 36 GT_DRV15
C1213 GT_DRV12 6 35 GT_DRV16
R1216 GT_DRV11 7 34
NC GT_DRV10 8 33
GT_DRV9 9 32
GT_DRV8 10 31 GT_SENS9
GT_DRV7 11 30 GT_SENS8
GT_DRV6 12 29 GT_SENS7
GT_DRV5 13 28 GT_SENS6
GT_DRV4 14 27 GT_SENS5
GT_DRV3 15 26 GT_SENS4
B GT_DRV2 16 25 GT_SENS3 B
GT_DRV1 17 24 GT_SENS2
GT_DRV0 18 23 GT_SENS1
19 22 GT_SENS0
20 21
44
43

CON40A VIO18_PMU

R1207
NC

[2,21]SDA_1
[2,21]SCL_1
[2] EINT3_CTP
[2]GPIO100_CTP_RSTB

VR1201

VR1202

VR1203

VR1204
A A

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
12 LCD,Touch
Date: Friday, February 14, 2014 Sheet 12 of 17
5 4 3 2 1
5 4 3 2 1

D D

Main CAM VCAMD_IO_PMU


VCAMA_PMU

Sub CAM
5M VCAMA_PMU VAF_PMU VCAMD_IO_PMU VCAMD_PMU

VAF VDDIO DVDD 0.3M R1309


R1306

C1317 C1309 C1310 C1314 C1313 C1312 J1304


1uF/10V 1uF/10V 1uF/10V 1uF/10V

PWDN 1 GPIO_CMPDN2 [2]


2 R1302
NC GPIO_CMRST2 [2]
NC 3
NC 4
VSYNC 5 CMVSYNC
DOVDD_1_8V 6
AVDD_2_8V 7
AGND 8
PCLK 9 CMPCLK
HREF 10 CMHREF
EMI1307 11 CMMCLK [2]
XCLK1
DGND 12
2 MIPI_RDP0 1 I1 O1 4 SUB_MCAM_RDP0 SIO_D 13 SDA_0 [2]
2 MIPI_RDN0 2 I2 O2 3 SUB_MCAM_RDN0 SIO_C 14 SCL_0 [2]
Y7 15 CMDAT7
Y6 16 CMDAT6
Y5 17 CMDAT5
Y4 18 CMDAT4
EMI1306 19
Y3 CMDAT3
C Y2 20 CMDAT2 C
2 MIPI_RCP 1 I1 O1 4 SUB_MCAM_RCP Y1 21 CMDAT1
2 MIPI_RCN 2 I2 O2 3 SUB_MCAM_RCN Y0 22 CMDAT0
NC 23
NC 24

EMI1308
C1306 C1308 C1307
2 MIPI_RDP1 1 4 SUB_MCAM_RDP1 1uF/6.3V
I1 O1
2 MIPI_RDN1 2 I2 O2 3 SUB_MCAM_RDN1

CN801
[2] SDA_0 1 1 24 24 CMMCLK 2
[2] SCL_0 2 2 23 23
VCAMD_PMU R1314 3 22
R1313 3 22
VCAMD_IO_PMU 4 4 21 21 SUB_MCAM_RDN0
5 5 20 20 SUB_MCAM_RDP0
6 6 19 19
7 7 18 18 SUB_MCAM_RCN
[13] CMPDN 8 8 17 17 SUB_MCAM_RCP
[13] CMRST 9 9 16 16
VCAMA_PMU R1311 10 15 SUB_MCAM_RDN1
10 15
11 11 14 14 SUB_MCAM_RDP1
VAF_PMU R1312 12 13
12 13

B
Camera Flash LED driver Torch : <100mA B
Flash : <500mA

1
2
U1305
VBAT 1 VIN VOUT 10 D1301

VR1301
2 9 C1327
C1 PGND
SGND 8
C1330 3 11
C2 TGND
1uF/6.3V
4 7

3
GPIO98_FLASH_SEL FLASH FB

GPIO99_FLASH_EN 5 EN RSET 6

C1328 C1315 R1318


1uF/10V

R1316

VIH = 1.3V Rset Rsen

SENSOR_FLASH_SEL
H: Flash mode Vfb(Torch) = 47mV
A L: Torch mode Vfb(Flash) = 1.26/Rset x10.2K A
I_out = Vfb / Rsen

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
13 Camera,Flashlight
Date: Friday, February 14, 2014 Sheet 13 of 17
5 4 3 2 1
5 4 3 2 1

Test point
D D

C C

2,3 PWRKEY 1 TP1401

VBAT
1 TP1402

1 TP1403

1,2 KCOL0 1 TP1406

1 TP1407
B B
1 TP1404

A A

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
14 Test point
Date: Friday, February 14, 2014 Sheet 14 of 17
5 4 3 2 1
5 4 3 2 1

G Sensor I2C address


0011001W/R W(33h) R(32h)
G-Sensor
M-Sensor
R1512

VIO28_PMU
D
VIO18_PMU M Sensor I2C address
D
NC

C1501 0001101R/W R(1B) W(1A)


R1511
NC
16
15
14

U1501
NC
NC
VDD

VIO18_PMU
1 VDDIO NC 13
VIO28_PMU VIO18_PMU
2 BYP GND 12
3 11 R1504 NC
SCL_1 NC INT1 EINT4_GY [2]
4 SCL GND 10 U1503
[2,12] 5 9
GND INT2 R1514
B1 VDD SCL A3 SCL_1
SDA
SA0

VIO18_PMU NC
NC

C4 VID SDA A4 SDA_1


C1502 C1503 VIO18_PMU
C1504 C1505 D4 A2
6
7
8

RSTN CSB
1uF/6.3V 1uF/6.3V
R1506 NC EINT7_MAG
C1 VSS DRDY A1
[2]
R1501 R1502 C3 TRG VIO28_PMU
B3 RSV
[2,12] SDA_1 B4 SO CAD0 D1
C2 TST1 CAD1 D2
C C
R1503
NC

ALS & PS Sensor ALS Sensor I2C address


0100011 write 0x46 read 0x47
VIO18_PMU
VIO28_PMU

B R644 B
[2] EINT5_ALP
R1505

CN1201
1 1 10 10
C1507 C1508 2 9
2 9 R1508 EINT5_ALP [2]
3 3 8 8 SDA_1 [2,12]
4 7 R1509
4 7 SCL_1 [2,12]
5 5 6 6

R1507

VBAT

C1506
1uF/6.3V

A A

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
15 sensor
Date: Friday, February 14, 2014 Sheet 15 of 17
5 4 3 2 1
5 4 3 2 1

C
19
20

J1601
1 16
EGND
EGND

1 16 SPKP
MICP 2 2 15 15 SPKN
MICN 3 3 14 14
VBUS
4 4 13 13 USB_DM [2]
KEYLED1 5 5 12 12 USB_DP [2]
VBAT 6 6 11 11
EGND
EGND

7 7 10 10
8 8 9 9 1 TP1609
17
18

TP1409TP1410 close to USB_DM/USB_DP.

TP1608
90 ohm differential TP1607
2 USB_DM 1 TP1610
2 USB_DP 1
VBUS
1

ÉîÛÚÊнðÁ¢Í¨ÐÅÉ豸ÓÐÏÞ¹«Ë¾
Title
WBW5210
Size Document Number Rev
D ?
16 Sub_board
Date: Friday, February 14, 2014 Sheet 16 of 17
5 4 3 2 1
5 4 3 2 1

V0001:³õʼ°æ±¾

D D

C C

B B

A A

Title

Size Document Number Rev


D ?
17 Change Notice
Date: Friday, February 14, 2014 Sheet 17 of 17
5 4 3 2 1