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10, OCTOBER 1983


Quick turn-around line (QTL)technology hasbeen devel- The authors wish to thank Dr. H. Oka and Dr. H. Nakata,
opedtofabricatecustom LSI circuitsin ashortperiod of and T. Kashiwagi for their support and encouragement.
Themain features of thistechnology aresummarixed as [ 11 M. Taniguchi, T. Yoshihara, M. Yamada, K. Shimotori, T. Nakano,
follows: andY.Gamou. IEEE J. SolidStateCircuits, vol. SC-16, no. 5,
p. 492, 1981.
Y. Watakabe. T. Kato. A. Shigetomi. and H. Morimoto, J. Vac. Sei.
1) Electron-beam direct writing for multilevel metallization. Technol., vol.21,p. 1005,1982. .
2 ) Automatic data handling and transformation fronn logic [3] C. Tanaka, S. Murai, H. Tsuji, T. Yahara, et al., in Proc. 18thDe-
sign Automation Conf., p. 812, 1981.
design data t o electron-beam writing data. [4] J. S. Greenneich, Electron-BeamTechnologyin Microelectronic
3) Dry process technology including RIBE for AI-Si-Cu etch Fabrication, G. R.Brewer, Ed. New York: Academic Press, 1980,
without 2nd layer metallization process. p. 59.
[SI Y.Akasaka,K.Tsukamoto,H.Sakurai,T.Hirao, Y.Horiba,
K. Kijima, and H. Nakata,in ZEDM Tech. Dig., Dec. 1978.
Using thistechnology,anumber of 1500-gateECI, gate [6] S.Imamura,J. Electrochem. SOC.,vol. 126, no. 9, p. 1628, 1979.
[7] D. F. Downey, W. R. Bottoms, and P. R. Hanley, Solid-state Tech-
arrays have been produced for use in main frame comFuters. nol., vol. 2, 1981.
Electron-beam irradiation on the device induces a decre,*se of [8] M. Nakaya, S, Kato, K. Tsukamoto, H. Sakurai, and Y. Horiba,
h ~which ~ recovers
, with a 450°C anneal for 15 min in N 2 . IfiEE J. Solidstate Circuits, vol. SC-16, p. 558, 1981.
[9] H. Harada, H. Yakushiji, T. Nishioka, H. Kotani, and Y. Hirata, in
Bias-temperature tests have been done for various logic cir- Proc. 13th Con5 on Solid State Devices, Tokyo, Japan, 1981; also
cuits, and showed no failures with over 1000 h of testing. Japan. J. Appl. Phys., vol. 21, Supplement 21-1, p. 205, 1982.

Threshold Voltage of Thin-Film Silicon-on-Insulator


Abstract-The charge coupling between the front and back gales of tive to silicon-on-sapphire (SOS) in the fabrication of mono-
thin-filmsilicon-on-insulator (SOI: e.g., recrystallizedSi on ;3iO2) lithiccircuitscomprisingadvantageousdielectricallyisolated
MOSFET’s is analyzed, and closed-form expressions for the threshold
devices [ 3 ] . Thesilicon-on-oxide (hereinafter termed SOI)
voltage under all possible steady-state conditions are derived. The ex-
pressions clearly show the dependence of the linear-region channe! con- technology furthermore has the flexibility to possibly enable
ductance on the back-gate bias and on the device parameters, inchding the
those of the back silicon-insulator interface. The analysis is supported dimensional”) integrated circuits [4] .
by current-voltage measurements of laser-recrystallized SO1 MOSFET’s. Because SO1 films are thin,the electrical propertiesof
The results suggest how the back-gate bias may be used to optimize the MOSFET’s fabricated in them are typically influenced by the
performance of the SO1 MOSFET in particular applications.
charge coupling betweenthefrontandback gates. Forex-
ample,the(front-gate)threshold voltage VTf differs con-
I. INTRODUCTION siderably from that of the bulk counterpart and depends on
the bias and properties of the back gate. Although much em-
HE RECENTLY demonstrated [ 11 , [2]dramaticim-
T provement in the quality of polycrystalline-silicon (poly-
silicon) films yielded byzone-melting recrystallization has
phasis hasbeen placed onthe recrystallization technology,
little work has been done on the characterization of the elec-
trical properties of SO1 MOSFET’s.
spurred new interestinsilicon-on-insulator (SOI) integrated Worley [ 5 ] derived an analytic modelfor VTf of the SOS
circuits and devices. This new technology provides an alterna- transistor in which similar charge coupling occurs. However
his model,which is unnecessarily complex, pertains only to
Manuscript received November 1, 1982; revisedApril 8 , 1983. This
workwassupportedbythe NavalResearchLaboratoryunderCon- the usual SOS case in which the back siliconsurface is de-
tract N00014-82-K-2067 monitored by G. E. Davis and the University pleted. Sano et al. [6] developed a rigorous numerical model
of Florida throughits
Center-of-Excellence Program in Physical for VTf of the SO1 MOSFET that illustrated important para-
The authors are with the Department of Electrical Engineering, Uni- metric dependences. However because no analytic expressions
versity of Florida, Gainesville, FL 32611. were derived, their illustrationswere limitedand provided

0018-9383/83/1000-1244$01.00 0 1983 IEEE


little physical insight. Furthermore, their model is not useful !GI -Polyrilicon or Metal

in SO1 circuit analysis.

Barth [7] , using a comprehensive numerical analysis, devel-
oped an analytic model for VTf that includes a dependence on Poiysilicon Film
the back-gatebias and proUFrties. However themodeldoes
not adequately account for the cases in which the backsilicon
surface is accumulated or inverted.Furthermore,themaxi-
mum value of VTf of the SO1 MOSFET, which can exceed the
threshold voltage of the bulk counterpart [6] when the back
Si Substrate
surface is accumulated, is incorrectly described.
In this paper we present a general steady-state analysis of the
charge coupling between the front and back gates of the SO1
MOSFET that yields closed-form expressions for VTf under all d
' b
possible steady-state charge conditions of thebacksurface.
Fig. 1. Four-terminal SO1 MOSFET structure. The terminalvoltages
We initially assume a uniformdopingdensityinthe silicon are referenced to the source voltage (Vs = 0).
film, but later the analysis is extended to account for the non-
uniform density resulting from a deep implant commonly used
in the n-channel MOSFET to suppress the back-surface leak-
age. To render the model applicable to SO1 circuit analysis,
we use thedepletionapproximation [ 5 ] , [7],the general
validity of which we discuss. The results can also be applied
to SOS MOSFET's by setting the back-gate insulator capaci-
tance to zero.
+Pot- +Gb- ' - gb+
The analysis yields a description of VTf in terms,of the back- Fig. 2. One-dimensional active portion of the SO1 MOSFET. T o sim-
gate bias and the properties of the device, including those of plify thenotation,thefrontgate is labeled M even thoughit is
typically polysilicon.
thebackSI-Si02interface,i.e.,thefixed charge and fast
surface-state densities. Consideration of the effect of charge
in the silicon substrate [8] is included and shown t o be typ- steady-state,between the two gates. In this case, the conduc-
ically insignificant. The analysis also leads t o asimple char- tion in the front as well as the back channel is described by
acterization of the drain current in thelinear region (low drain conventional bulkMOSFET theory [ 9 ] . However the film
voltage) of operation. thickness of typical SO1 MOSFET's is thin enough that com-
Results of current-voltage measurements of laser-recrystal- plete depletion can occur, thereby coupling the two gates and
lized SO1 MOSFET's are discussed and shown to support the rendering the threshold voltage of each gate dependent on the
analysis. These measurements reveal, in accord with the anal- conditions at the other. We now analyzethesedependences,
ysis, that the back gate not only affects the back-channel con- To emphasize the charge coupling, we neglect small-geometry
duction but also, in typical devices, can significantly affect the effects [lo] and consider the one-dimemsional active portion
front-channel conduction. The results therefore indicate how of the MOSFET shown in Fig. 2. The front ($sf) and back
well the back-gateparameters must be controlled across an ($&) surface potentials are the band bending from a hypo-
SO1 wafer t o ensure acceptable chip yield. Furthermore they thetical neutral film-body point to the respective surface. The
suggest how the back-gate bias may provide a control by which electrostatic potential at this point, if the source is grounded,
optimal SO1 MOSFET performance in particular applications is just the built-in potential of the source-film body junction.
is derived. This control does not exist in SOS MOSFET's. Thus in analogy t o bulk MOSFET theory [ 9 ] ,we can write


The device we analyze is thefour-terminalenhancement-
mode SO1 MOSFET (n-channel)illustratedin Fig. 1. It is VGb = $sb ' '@%S
$ob (2)
fabricated in a recrystallized silicon (we ignore the grain bound- where V,, and V G b are thefront-and back-gate voltages,
aries) film on an insulating layer of silicon-dioxide, which has $of and $ob are thepotentialdrops across thefront-and
been thermally grown or deposited on a silicon substrate. The back-gate oxides,and @hs andarethefrontandback
front (conventional metalor polysilicon) andback (silicon gate-bodywork-function differences. We have not included
substrate) gates compete for charge in the film body, which is in (2) a possible potential drop in the silicon substrate (back
manifested as thedependenceofthe(front-gate)threshold gate) [8] , We justify this neglect later in this section. Note
voltage onthe back-gate bias andproperties.Althoughthe that the difference between (1) and (2) would follow directly
analysis refers directly to the device structure in Fig. 1, it can by summing the potential drops between the twogates.
be applied t o any MISIM device, e.g., the SOS MOSFET. If the silicon film is completely depleted, except for perhaps
If the silicon film is sufficiently thick, it will never be com- narrow inversion or accumulation layers at the surfaces, then
pletelydepleted,andhencethere will be nointeraction,in the charge density is - q N A , andintegration of Poisson's

equation across the film yields yields

where Esf is the electric field at the front-surface edge 'Jf the Because $sb is virtually independent of VGb for this condi-
depletion region, t b is the film thickness, and NA is the Coping tion, so i s V T f .
density in the film, assumed for now to be uniform,
Applying Gauss' theorem to the front surface, we get B. Inverted BackSurface
When the backsurface is inverted, $sb 2 4 ~ .Thenthe
1 threshold voltage for this case is given by (6) as
$of = - - Qff - Qcf) (4)
where Cof = eo/tof is the front-gate oxide capacitance, Qff is
the fixed charge density at the front Si-Si02 interface, and
Qcf is the front-surface carrier charge density, which i:? our AS is @ f , V i f is independent of V G b , again because $& is
VTf analysis representsinversioncharge. We have notex- virtually invariant for this condition.
plicitly in (4) accounted forfastsurface statesatthefront
interface since they can be implicitly accounted for by modi- C. Depleted BackSurface
fying Q f f in a strong-inversion analysis. At the back surface When the back surface is depleted, $sb is strongly dependent
on V G b ; its value ranges fromabout zero to 245~between
- $ob = - (€sEsf - qNA t b Q f b - qNsb $sb Qcb.1 ( 5 )
the onsets of accumulationand inversion, respectively. The
values of V G b (v&and vi$,) corresponding to these onsets
when the front surface is inverted ($sf N 2 @ B ) are defined by
where C o b = e o / t o b , Q f b , and Qcb are the back-gate counter-
(7) with Qcb 0 (<< - Q b )
parts of Cof, Q f f , and Qcf respectively, and N s b is the fast
surface-state density assumed to be uniformly distributed. over
the energy gap. We explicitly account for N s b in ( 5 ) besause
thesurface-state charge will vary with V G b , In ( 5 ) we have
implicitly expressed the electric field at the back-surface edge
of the depletion region as (Esf - qNA t b / e , ) .
We relate VGf to $sf and $& by combining (l), (3), and (4) The dependence Of V T f On V G b for V G b < V G b < v k b iS
obtained by combining (6) and (7) to eliminate $ab and letting
$sf = 2 @ B , QCf N 0, and Qcb 2: 0. The result is

(6 1
where V i E = @Ls- Qff/Cof is the front-gate (bulk MOSI'ET)
flatband voltage, c b = e s / t b is the depletion capacitance. and
Qb = -qNA t b is the depletion-region areal charge der sity.
Similarly we relate V G b to $sf and $$b by combining (2): (3), I
and ( 5 ) Thus as VGb increases from v& to V G b (an increase of
2@j3 (1 t ( c b t c s b ) / c o b ) ) , VTf decreases linearly with V G b
from v+ to V& (a decrease of 2 @ B ( C b j c o f ) ) . The entire de-
pendence of VTf on V G b for the SO1 MOSFET (n-channel)
with its film body completely depleted is plotted in Fig. 3.
47) The discontinuities in the slope of the plot are unreal because
where V& = @hs- & , / C o b is the back-gate (bulk MOSFET) the transitions from one surface charge condition to another
flatband voltage and c s b = qN&. Equations (6) and (7) arc the are not abrupt aswas implicitly assumed in the analysis. Ac-
two key relations that describe the charge coupling between tually the surface potential corresponding to inversion and ac-
the front and back gates when the film body is completely de-
pleted. Combining them leads to the description of the (front-
gate) threshold voltage VTf in terms of V G b and the device
cumulation differs from 2@B and zero, respectively, by a few
thermal voltages (nkT/q where n 5) depending on the degree
of inversion and accumulation. These differences,whichcan
parameters. We now detail the description of VTf forcach be evaluated by numerically solving Poisson's equation in the
possible steady-state charge condition at the back surface. film [7], however are typically small relative to the variation
in surface potential between inversion and accumulation, and
A. Accumulated BackSurface hence do not significantly affect the VTf( V G b ) characteristic.
When the backsurface is accumulated, $sb is virtually This is tantamount to the fact that the effective widths of the
pinned at zero. We define the threshold condition [9] of the inversion and accumulation layers (across which the nkT/q is
front surface by = 2@B where @B = (kT/q) ln(NA /ni) is the dropped) are typically much smaller than t b [7], which was
film-body Fermi potential; then Qcf = 0 (<< - Q b ) , and ( 6 ) assumed in the derivation of (3).

A . Case I: 2 2Xd(max)

In this case the film body can never be completely depleted
by any combination of V Gand ~ V G b , Consequently there is
no charge coupling between the front and back gates, and VTf
is given by the bulkMOSFET theory [9]

B, Case11: t b
I I i In this case the film body is necessarily completely depleted
atthethresholdcondition of the front gate, irrespective of
"2b VbFB VIGb V G b . Thus V T and-
~ its dependence on V G are ~ given directly
by the results of Sections 11-A,11-B, and 11-C, whichare
Fig. 3. Theoretical dependence of V p on VGb for a completelyde-
pleted SO1 MOSFET. For reference, the correspondingbulk MOSFET plotted in Fig. 3. Note that V T can~ exceed V T f o . This is the
threshold voltage V T given
~ ~in (14) is indicated. case when the electric field at the back .surface is sufficiently
positive (same direction as E,f), for example, when the back
The simplifying assumptionsunderlyingour analysis were surface is accumulated. Then since the integral of the electric
made to enable the derivation of closed-form expressions for field over the depleted film at threshold is fixed at about 2rpB,
VTf that could be used in an SO1 MOSFET model amenable E,f will increase as tb decreases, and hence VTf can become
to computer-aided circuit simulation. In addition to the as- very high.
sumption discussed above, we also neglected in ( 2 ) the possible
potential drop in the silicon substrate [ 8 ] . If the substrate is
c. Case 111; Xd(mm) < t b < 2xd(max)
p-type and lowly doped (-lo1' ~ m - and ~ ) if &/4 is high In this case thedepletionconditionofthe film body at
(-5 X 10" cm-'),whichare typically the case [l 11, then threshold depends on V G b . To describe thisdependence,
b < VGb < l'Gb, vis-6-vis, when VTf varies with v G b ,
A I we first define l'& as the value of V G b above which the film
for V G
the substrate surface is inverted [ 121 , and hence the potential is completelydepletedwhenthefront surface is inverted.
drop is fixed at about twice the Fermi potential of the sub- Recognizing that the depletion-region widthextendingfrom
strate. This means that the l'Tf(VGb) characteristic in Fig. 3 theback surface at l'Gb = V& is [ t b - Xd(max)], we can
would simply shift to the left by this drop. For typical values write [9]
of tob (- 1 pm), this drop is much less than ( V k b - l'&,),but
for thinner tob it is not. If the substrate is n-t pe, the surface
is typically accumulated for v&, J
< l'Gb < l'Gb, and the PO-
tential drop is negligible.


THRESHOLD VOLTAGEOF SO1 MOSFET's Now for VGb < v&, the silicon film is not completely de-
To generalize the analysis described in Section 11, we must pleted, and VTf is VTf0 given by (14). For l',,2 l'&, VTf
define theconditionsfor which theassumptionthatthe is given by the results of Section II. That is, for V& < V G b <
silicon film is completelydepleted is valid. Thecomplete- V&b,V T is~given by (12), andfor 2 V i b ,it isgiven by
depletion condition depends on the relative values of t b and (9). AS VGb increases from l'& to v&,,vTf decreases from
VTfo to V$f
In Fig. 4 we have plotted the dependences of VTf on V G b
for several ratios of t b and x ~ ( ~which~ ~ is) fixed
, by NA as
described in (13). As expected, the sensitivity of VTf to V G b
the maximum depletion-region widthextendingfromanin- diminishes as t b increases, and interest.ingly the sensitivity of
vertedsurface [9] . In using (13) we areimplicitlyassuming vTfto t b is reduced as V G b is decreased. We note that the
that the transitions from depletion to neutrality in the film dijpendence of VTf on V.& (= - Qfb/Cob)is also givenby
occurabruptly.Actuallythesetransitions occur over a few the plots in Fig. 4. These plots are thus important in identify-
Debye lengths L D [9]. However L D << Xd(max), irrespective ing ways to suppress the influence of Q f b , which is difficult to
of N A , and hence the charge in a transition region is much control uniformly across an SO1 wafer. As evident in Fig. 4,
smaller thanthat in the associated depletion region.Conse- one such way is to apply a sufficiently negative V G b . The de-
quently the charge coupling between the front and back gates pendence of VTf on NA is implied by Fig. 5 in which we have
effected byoverlapping transition regions is negligible, and plotted VTf versus VGbfor several values of Xd(max), defined
an analysis based on this depletionapproximation is suffi- by N A in (13), relative to t b , which is fixed. We see that VTf
ciently accuratefor developing SO1 MOSFET modelsfor becomes less sensitive to NA as VGb decreases. Furthermore
computer-aidedsimulation. We consider the following three as NA decreases [vis-6-vis,Xd(max) increases] , the sensitivity of
cases. VTf to VG, is enhanced until x ~ ( reaches ~ ~ t b ~. )

I U =


(1 +-I 2& - 'd-
'ob 'ob

Fig. 4. Theoreticai dependences of VTf on VGb and f b for tht: four-

terminal SO1 MOSFET with fixed NA , which defines Xd(max) in (13)
and &qmax) = -qNAxd(max). The parameter CY is used to si.hplify
the scaling of the VTf axis.

Fig. 6 . Thedopingdensityprofile NA (x) anditsstep-functionap-

proximation for then-channel SO1 MOSFETwithadeep boron
implant.The charge distribution p a ( x ) andtheelectricfield E(x)
and electrostatic potential $ (x) variations follow from the approxi-
mate profilewhen thefrontsurface is stronglyinvertedandthe
2 depletion approximation is used.
'd i m a x l = Y t b

depletion region from the inverted front surface extends to the

'd ( m a x l tb
implanted region [ t , < x d ( m a x ) ] but not to the back surface,
'd i m a x l '.2tb
the charge distribution and the electric field and electrostatic
potential variations in the film body are as illustrated in Fig. 6.
The threshold voltage of the n-channel MOSFET in this case
is [ 9 ]


where IVAf and N A b are the front andback doping densities in

the film body that define the step at x = t, (see Fig. 6) and
is the extent of the depletion into the implanted (NA = N A b )
Fig. 5 . Theoreticaldependencesof VTf on VGb and NA [through region. We stress that VgB includes the front gate-body work-
x d ( m a x ) ] forthefour-terminal SO1 MOSFETwithfixed t b . The function difference defined by NA = NAP and hence implicitly
parameter p is used to simplify the scalingof the VTf axis. Note accounts for the equilibrium potential barrier at x = t,, AGB =
that GB, whichdependson N A , variesslightly fromone curve to
another. ( k T / q ) lnwAb/NAf). That is, when thefront surface is
stronglyinverted, N 2@B t AGB as indicated in Fig. 6. In-

tegration of Poisson's equation yields

D. Deep-Boron-Implanted Film Body
It is common in the fabrication of n-channel SO1 MOSFIIT's
to implant boron deep into the film body so as to avoid deple-
tion or inversion at the back surface 1131. This implant serves
to suppress the back-surface leakage current as well as to Inserting (17) into (16) then gives the desired expression for
negate the dependence of the front-channel conductionon the VTf.
back-gate parameters, e.g., Q f b . We note that this result can be simplified in most cases be-
To account for this implant in our analysis we approximate cause N A b (>> N A f ) is typically high enough that thesquare-
the resultant nonuniform doping density NA (x) by a step Fro- root term in (17) is approximated well by the first two terms
file as shown in Fig. 6. For the case of interest in which the of its Taylor-series expansion. Then (17) becomes

ts N A f boundary scattering, which depends on VGf, affects the chan-

x&= -- $sf - nel mobility p n f in(20) and causes an apparent increasein
qtsNAb 2NAb
VTf [ l 5 ] . Thus the common measurement of threshold volt-
which, with(1 6) and the threshold condition$,f = 2@B-t A@B, age based on the extrapolation of (20) yields ambiguous re-
yields sults for these devices.
However it is possible to detect the dependence of VTf on
VGb for these devices using the experimental method we now
describe. For a given V G b , we measure
where cbf = €,its and Qbf = - q N A f t s . Note the similarity be-
tween (19)and V& defined in (8). The threshold voltage is AID > V T f ) - I D ( V G f < < v;.f> (22)
uniquely defined by N A f , N A bt,,, and the front-gate param- which is merely the change in ID that occurs when the front-
eters; it does not depend on theback-gate parameters. surface condition is altered fromaccumulation to strongin-
version. Recognizing that x ~ ( <~tb < ~ 2xd(max)
~ ) in these
devices and referring to Section 111-C and to (20) and (21), we
To provide experimental support for the analysis described
in thispaper, we measuredlinear-region ID(VD, VGf, V G b )
characteristics of four-terminal SO1 MOSFET’s (n-channel)
fabricated at Texas Instruments, Inc. [ 111 , The silicon film is
0.5-pm-thick and was laser-recrystallized after being deposited
ona1-pm-thick layer ofsilicon-dioxide (e&= 3.5 X lo-’
F/cm2), which had been thermally grown on a p-type silicon
substrate with resistivity of 6-8 i-2 * cm. The film was doped
by ionimplantationthatyielded, based on SUPREM-I1 cal-
culations [ l l ] ,NA N 2 X 10l6 cm-3near the front surface
and NA = l O I 5 cm-3 at the back surface. No deep boron im-
plant was done. The front gate is n+ polysilicon, and the gate
oxidethickness is 600 A (eof = 5.8 X lo-’ F/cm2). Large
devices (Z = L = 40 pm) were selected to avoid unnecessary
complications, e.g., small-geometry effects [lo] .
For strong-inversion conditions in the linear region [ V D <<
(VGf - V T ~ ,)ID
] is approximately related to VTf by [9]
and where g m b , V&,, and VTbo are the back-gate counterparts
Pnf cof ( VGf - V T f ) VD (20) of g m f , V k f , and V T f o ,respectively. We have neglected the
grain-boundaryeffectsonchannelconductance, which are
where the terms have their usual meanings. We note that VTf significant only for relatively low values of VGf [15].
in (20), which is the threshold voltage implied by the linear We see from (23) and (26) that at a fixed VGf, AIDis inde-
extrapolation of the measured I D ( V G ~characteristic
) to the pendent of V G b when VGb is sufficiently low ( G I/&,)or suf-
VGf axis, is not exactly the threshold voltage we definedin ficiently high (2VTbo). When V& Q V G b < V&b,(24) shows
Section 111, but is typically -0.1 V higher [14]. This differ- that AID increases with increasing V G b because VTf is de-
ence, which reflects the difference between $,f and 2@B,is creasing; whereas when V&, Q VGb < VTbO, (25) shows that
however not strongly dependent on V G b [ 121 , and hence (20) it increases with V G b because ofback-channelconduction.
can be used in conjunction with our measurements to check Note then that the difference between AID4 and AID1 reveals
our theoretical predictions forVTf( V G e ) . quantitatively the shift in VTf resulting from the correspond-
If theback-channelcurrent IBC is significant, itmust be ing change in VGb. From (23) and (26) we have
added to (20)
ID +ID -t IBc. (2 1)
- = gmf(I/TfO - Vkf) ’ gmb(VTbO - V&b) (28)

Note that IBc could be expressed in the form of(20) with the
back-gate parameters and voltage substituted for p n f , Cof, VTf,
and VGf. The back-gate counterpart to VTf could further be the equivalentexpression (29) follows from (28) when we
characterized as was VTf using the analysis described in Sec- note from (9) and (14) that
tions I1 and 111.
Because of IBc and its dependence on VGfimplied by our
analysis, V& cannot be determined from the direct extrapola-
tion of (20) with sufficientaccuracy to measure the depen- and hence that (VTbo - Vgb) can be expressed similarly. Thus
dence of VTf on V G b . Furthermoretheconductanceprop- if pnf and &b are known, then measuring (AID4- AID^) im-
erties ofthe MOSFET’s measured are influencedby grain plies, via (29), (VTfo- V&), which reflects the influence of
boundaries in the laser-recrystallized (po1y)silicon film. Grain- VGb on VTp

I .5 , emplify further the sensitivity of VTf to Q f b , we note from

# /f -1
- (12), when VGb is fixed such that the film body is completely
,--=---4;-- depleted (e.g., VGb = 0 for the devices used in our measure-
- .
I ,//
*ID3 ments), that
'11.0- P
2 - Calculated
'4 2
- - - - --- - - _ - cb
;p_-- -+
9 = *ID 1 - vTf
-I -
c5 (3 1)
ti '*--------
- Measured
dQfb Cof (cb cob -t csb> '

P 06-
$ - Hence for the devices measured, in which csb is significant,
0 -
d ~ ~ ~ / d N ( ~0.08 / q ) v cm2. Consequently varia-
~ X~ 10-l'
tions in (Qfb/q)larger than IO" cm-' produce considerable
0 -20 -15 /-10# -5 VGb(VI0 5 10 15 20 25 changes in V T . As evidenced by (3 l), this sensitivity is more
pronounced in devices with thinner t b ,
Fig. 7. Calculatedandmeasured AID versus VGb for a four-tcrminal In most cases the sensitivity of ID to the back-gate prop-
laser-recrystallized SO1 MOSFETreflectingthedependence of vTf erties is undesirable, and processes like a deep-boron implant
on VGb. in the n-channel MOSFETare used to suppress it. However
there may be applications in which the front-back-gate charge
We have plotted in Fig. 7 the measured dependence oi' AZD coupling can be exploited to improve the MOSFET perfor-
on VGb,which resulted when VGf = 'SI v was used to invert mance. As indicated in Fig. 3 it is possible to bias the back
and accumulate the frontsurface. As predicted by our anslysis, gate (VGb N V$b) such that VGf can simultaneously turn the
AZD saturates when VGb is sufficiently low or high. For com- back and front channels on and off. In this case, when the device
parison we plot also inFig. 7 the calculated (estimated) is on (VGf> V&), ZD is enhanced by ZBC as well as by an ef-
AZD (VGb)dependence obtained from (23)-(27). For the cal- fective reduction in VTf dueto V G b ,which increases the
culations, g,f and gmb were estimated for linear-region 1, I ~ V G ~front-channel
, conduction. When the device is off (VGf <<
V G b ) measurements,and VTf and Vrb were evaluated using V&), the leakage is low because VTb is increased above V$b,
our analysis, the same measurements,andestimated device which implies that the back channel is off. The front-channel
parameter values [ l l ] . The fact that the theoretical an'l ex- leakage is thus concomitantly further reduced because of an
perimental curves in Fig. 7 have the same basic shape suI).?orts effective increase in VTf.
our analysis. We note that the fast surface states at the back
Si-Si02 interface (Nsb N 3 X lo1' cm-?/eV [ I I ] )stretch-out VI. SUMMARY
the AZD ( V G ~ curve ) along the VGb axis. Thisstretch-out, The charge coupling between the front and back gates of
which is described by AZD,, reflects variation in the charge of thin-film uniformly doped SO1 MOSFET's has been analyzed,
the surface states resulting from change in VGb,i.e., in $ s t . and closed-formexpressions forthethreshold voltage VTf
An obviousdiscrepancy betweenthe calculatedand .ne& under all possible steady-stateconditions have been derived.
suredresults plotted in Fig. 7 is the difference betweer the The expressions clearly show the dependence of channel con-
respective values of (AZD4 AIDI). This difference implies a ductance in the linear region on the back-gate bias VGb and on
discrepancy betweenourtheoreticalandexperimental esti- the device parameters, including the fixed charge density Qfb
mations of (VTfo- V;f) based on (30) and (29), respectildy. and the fast surface-state densityNsb at the back Si-Si02 inter-
The measurementsyield 0.21 V whereas the theory predicts face. Thethreshold voltage ofann-channel SO1 MOSFET
0.14 V. Because the grain boundaries tend to reduce ZD [ L5], having a deep boron implant that negates the influence of the
they are probablynotthe cause of this discrepancy. More back gate was also described.
plausible reasons are thenonuniform N A (x) and/orurcer- The analysis, which characterizes directly the linear-region
tainty in rb. Approximating the actual NA (x) by a step pro- (strong inversion) drain current I D , was supported in essence
file or assuming about a 10-percent thinner t b will remove the bymeasurements of this current inlaser-recrystallized SO1
discrepancy [ 121 . MOSFET's [ 1 1] . Although the VTf( V G b ) dependence cannot
The theoretical and experimental results plotted inFig. 7 be measured directly,measurements of changes in ZD pro-
imply that in typical SO1 MOSFET's the charge condition of duced by variationsin VGb yieldedresults that are basically
the back surface, which is defined by VGb and the propelties in agreement with the theoretical predictions. This novel ex-
of the Si-Si02 interface, can significantlyaffect the concluc- perimentalmethod can begenerally used to characterize
tion properties of the front surface, and vice versa. We note VTf( V G b ) of thin-film SO1 MOSFET's.
that the back-gate influence on ID is even stronger for thinner An n-channel MOSFET was assumed in the analysis, but the
silicon films and for lower doping densities in the film as irn- corresponding results for p-channelMOSFET'scan be easily de-
plied by Figs. 4 and 5. rived analogously. Hence the analysis can provide a basis for
The variations in V T f and I D discussed above, which result optimizing the performance of SO1 CMOS integrated circuits.
from changes in the back-surface charge condition, can be For example it describes how a negative V G b , despite reducing
inducedbyvariationsin V i B , Le., Q f b , as well as in V,;b. the current-drive capability in n-channel MOSFET's, could be
Hence the resultsindicatehow well Q f b must be controlled used to diminish the sensitivity of V T to ~ Q f b andtothe
across an SO1 wafer to ensure acceptable chip yield. To ex- silicon film parameters, e.g., thickness, all of which may vary
VOL. NO. 10, OCTOBER 1 9 8 3 1251

considerablyacross an SO1 wafer.Alternatively it describes [41 J. F. Gibbonsand K. F. Lee,“One-gate-wide CMOS i ~ e r t e ron

laser-recrystallized polysilicon,” ZEEE Electron Device Lett., vol.
how a deep boron implant could provide the same desensitiza- EDL-1, pp. 117-118, June 1980.
tion,thus enabling the use of VGb t o optimizetheperfor- . - E. R. Worley,“Theoryof the fullydepleted SOS/MOS transis-
mance of the p-channel MOSFET. The analysis indicated also tor,” Solid-State Electron.,vol. 23, pp. 17107-1111, 1980.
that the current-drive capability of the s o 1 MOSFET could 161 E. Sane, R. Kasai, K. Ohwada,andH.Ariyoshi,“Atwo-dimen-
sional analysis for MOSFET’s fabricated on buried Si02 layer,”
possibly be enhanced without significant increase in leakage by ZEEE Trans. Electron Devices, vol. ED-27, _DP. - 2043-2050, Nov.
proper choice of V G b . 1980.
[7] P. W. Barth, “Dielectric isolation technology for bipolar andMOS
integrated circuits,” Technical Report No. SEL-80-JBA-1, Stan-
ACKNOWLEDGMENT ford Electronics Laboratories, Stanford University, Mar. 1980.
[8] E. Sano, K. Ohwada, and T . Kimura, ‘‘Aburied-channel/surface
The authors would like to thank H.-W. Lam of Texas Instru- channel CMOS IC isolated by an implantedsilicon dioxide layer,”
ments,Inc.for supplying the SO1 MOSFET’s usedin our IEEE Trans. Electron Devices, vol. ED-29,pp.
459-461, Mar.
measurements and
problems asso- 1982.
[9] S.M. Sze, Physics of Semiconductor Devices, 2nd ed. New York:
ciated with SO1 MOSFET design and fabrication. Wilev. 1981.
[ 10) L. A: Akers and J. J. Sanchez, “Thresholdvoltage model of short,
REFERENCES narrowandsmallgeometryMOSFET’s:Areview,” SoZid-State
Electron., vol. 25, pp. 621-641, 1982.
H.-W. Lam, A. I;. Tasch, Jr., and T. C. Holloway, “Characteristics [ 111 H.-W. Lam, private communication.
of MOSFET’s fabricated in laser-recrystallized polysilicon islands [ 121 H.-K. Lim, unpublished work.
with a retaining wall structure on an insulating substrate,” ZEEE [ 131 H.-W. Lam, Z. P. Sobczak, R. F. Pinizzotto, and A. F. Tasch, Jr.,
Electron Device Lett., vol. EDL-1, pp. 206-208, Oct. 1980. “Devicefabrication in (100) silicon-on-oxideproducedby a
B.-Y. Tsaur, M. W. Geis, J.C.C. Fan, D. J. Silversmith, and P. W. scanningCW-laser-induced lateral
technique,” ZEEE
Mountain,‘%Channeldeep-depletionmetal-oxide-semiconduc- Trans. Electron Devices, vol. ED-29, pp. 389-394, Mar. 1982.
torfield-effecttransistorsfabricatedinzone-melting-recrystal- [14]Y. Tsividis,“Moderateinversion in MOS devices,” Solid-State
lized polycrystalline Si films on Si02 ,”Appl. Phys. Lett., vol. 39, Electron., vol. 25, pp. 1099-1104, 1982.
pp. 909-911, Dec. 1981. [15] J. G. Fossum, A. Ortiz, H.-K.Lim, and H.-W. Lam, “Effects of
H.-W. Lam, A . F. Tasch, Jr., and R. F. Pinizzotto, “Silicon-on- grain boundaries on channel conduction in thin-film SO1 MOS-
insulator for VLSI and VHSIC,” in VLSZ Electronics: Microstruc- FET’s,” presented at SPIE Technical Symp. (Los Angeles, CA);
ture Science, vol. 4. New York: Academic Press, 1982. also SPZE Proc., vol. 385, Jan. 1983.

A Study of Projected Optical Images for Typical

IC Mask Patterns Illuminated by Partially
Coherent Light

Abstract-Optical projection printing using partially coherent illumi- margins of different object shapes and sizes, the effects of high versus
nation is simulated for one micrometer and half micrometer objects low degrees of coherence, single versus dual wavelength, as well as long-
representative of typical mask patterns such as contact holes, rectangu- wavelength high NA versus short-wavelengthlow NA were studied using
lar bars and openings, intersections of perpendicular lines, and adjacent the 1-pm rectangular opening.
lines of unequal lengths. The image intensity distributions in absorp-
tionless photoresists on nonreflective substrates are plotted as sets of
constantintensitycontours.For each patternandillumination, an I. INTRODUCTION
exposure-defocus (E-D) diagram is generated by evaluating the com-
bined exposure and defocus tolerance yielding linewidths within
percent of the mask linewidth. Besides comparing the image and
N A TYPICAL optical projection system, the illuminationis
deliberately set t o an optimum degree of coherence so that
the Modulation Transfer Function (MTF) at the fundamental
Manuscript received October 7, 1982; revised April 5, 1983. spatial frequency corresponding to the minimum feature in an
A. C. Liu is with Harvard University, Cambridge,MA. He was formerly IC circuit is increased at the expense of the higher spatial fre-
a summer student at the IBM Thomas J. Watson Research Center, York- quencies. Therefore, in order to quantitatively study the opti-
town Heights, NY 10598.
B. J. Lin is with the IBM Thomas J. Watson Research Center, York- cal images produced by a projection lens, partially coherent
town Heights, NY 10598. illuminationhas tobeincluded. Partially coherent imaging

0018-9383/’83/1000-12.51$01.000 1983 IEEE