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Electronics Projects
Vol. 22
EFY Books & Publications
FOR YOU
EFY is a reputed information house, specialising in electronics and information technology
magazines. It also publishes directories and books on several topics. Its current publications are:
(A) CONSTRUCTION PROJECTS
1. Electronics Projects, Vol. 1: A compilation of selected construction projects and circuit ideas Rs 120
published in Electronics For You magazines during 1979 and 1980.
2. Electronics Projects, Vol. 2 to 19 (English version): Yearly compilations (1981 to 1998) of Rs 120 (each)
interesting and useful construction projects and circuit ideas published in Electronics For You.
3. Electronics Projects, Vol. 20, 21 and 22 (with CD): Yearly compilations (1999 to 2001). Rs 150 (each)
4. Electronics Projects, Vol. 16 (fgUnh laLdj.k): Yearly compilations (1995) of interesting and Rs 95
useful construction projects and circuit ideas published in Electronics For You.
(B) OTHER BOOKS
1. Learn to Use Microprocessors (with floppy): By K. Padmanabhan and S. Ananthi (fourth enlarged edition). Rs 180
An EFY publication with floppy disk. Extremely useful for the study of 8-bit processors at minimum expense.
2. ABC of Amateur Radio and Citizen Band: Authored by Rajesh Verma, VU2RVM, it deals Rs 75
exhaustively with the subject—giving a lot of practical information, besides theory.
3. Batteries: By D.Venkatasubbiah. Describes the ins and outs of almost all types of batteries used Rs 60
in electronic appliances.
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(C) DIRECTORIES
1. EFY Annual Guide: Includes Directory of Indian manufacturing and distributing units, Buyers’ Guide and Rs 300 (with CD)
Index of Brand Names, plus lots of other useful information.
2. ‘i.t.’ Directory: First comprehensive directory on IT industry covering hardware, software, telecom, Rs 250 (with CD)
dotcom and training institues.
3. Technical Educational Directory: Includes course-wise and state/city-wise listings of technical educational Rs 100
institutes in India, besides the alphabetical main directory offering all the relevant information about them.
(D) MAGAZINES
1. Electronics For You (EFY): In regular publication since 1969, EFY is the natural choice for the entire Rs 60 (with CD)
electronics fraternity, be it the businessmen, industry professionals or hobbyists. From microcontrollers to Rs 35 (without CD)
DVD players, from PCB designing software to UPS systems, all are covered every month in EFY.
2. Linux For You (LFY): Asia’s first magazine on Linux. Completely dedicated to the Open Source community. Rs 100 (with CD)
Regular columns by Open Source evangelists. With columns focused for newbies, power users and developers,
LFY is religiously read by IT implementers and CXOs every month.
3. ‘i.t.’ (Information Technology): A monthly magazine for ‘Techies’ and those who want to be. Its readers have Rs 30
two things in common—a background related to IT and the thirst to know more. Topics covered boast technical
depth and aim to assist in better usage of IT in organisations.
4. Facts For You: A monthly magazine on business and economic affairs. It aims to update the top decision makers Rs 50
on key industry trends through its regular assortment of Market Surveys and other important information.
5. ePower: Published every alternate month for the electronic-power industry, primarily consists of all electronic Rs 50
power-supply equipment, and their related components and services. A must read for those in this industry and
those catering to it.
6. BenefIT: A technology magazine for businessmen explaining how they can benefit from IT. Rs 20
★ Kindly note that these prices can change without any notice. Magazines 1 Year 2 Years 3 Years 5 Years
★ Registered Post or Courier Delivery for Books and CDs: (Monthly) Rs Rs Rs Rs
Rs 40 for first copy, and Rs 15 for every additional copy of
any book or directory. Electronics For You (with CD) 500 920 1,290 1,800
Add Rs 50/- on an outside Delhi cheque. Electronics For You (without CD) 335 630 880 1,260
Important: The prices mentioned here are the current prices at Information Technology 300 575 810 1,255
the time of publication; please reconfirm the prices before plac-
ing order, or be prepared to pay the difference—if any Linux For You (with CD) 725 1,395 1,950 3,000
★ Payment should be sent strictly in advance by demand draft/money ePower (bi-monthly) 180 360 540 900
order/postal order in favour of EFY associates Kits‘n’Spares.
Facts For You 400 700 1,000 1,600
BenefIT 190 360 — —
www.electronicbo.com
All rights reserved. No part of this book may be reproduced in any
form without the written permission of the publishers.
ISBN 81-88152-17-X
We are also including a CD with this volume, which not only con-
tains the datasheets of major components used in construction proj-
ects but also the software source code and related files pertaining
to various projects. This will enable a reader to copy these files
directly to his PC and compile/run the program as necessary, without
having to prepare them again using the keyboard. In addition, the CD
carries useful software, tutorials and other goodies (refer ‘contents’
in CD).
www.electronicbo.com
7. Access-Control System................................................................................................ 42
8. Telephone Line-Interfaced Generic Switching System............................................... 46
9. Programmable Melody Generator............................................................................... 55
10. Auto Control for 3-Phase Motors................................................................................ 66
11. Telephone Remote Control.......................................................................................... 72
12. Microcontroller-Based School Timer.......................................................................... 75
13. Digital Capacitance-cum-Frequency Meter................................................................. 80
14. Fluid-Level Controller with Indicator......................................................................... 84
15. MGMA—A Mighty Gadget with Multiple Applications............................................ 87
16. Traffic and Street Light Controller.............................................................................. 91
17. Lead-Acid Battery Charger with Active Power Control.............................................. 98
18. Amplitude Measurement of Sub-Microsecond Pulses................................................ 101
19. Automatic Submersible Pump Controller.................................................................... 104
20. Transistor Curve Tracer............................................................................................... 107
21. Tripping Sequence Recorder-cum-Indicator................................................................ 113
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52. Running Lights and Running Holes............................................................................ 171
53. A Simple Transistor Tester........................................................................................... 172
54. 12V, 3A Power Supply................................................................................................. 172
55. Speller Effect Sign Display.......................................................................................... 173
56. Darkroom Timer.......................................................................................................... 174
57. Active Shortwave Antenna.......................................................................................... 174
58. Long-Range Target Shooter......................................................................................... 175
59. Power Supply for Walkie-Talkies................................................................................ 176
60. High-Performance Interruption Detector..................................................................... 177
61. Digital Relay Tester for RAX and MAX..................................................................... 178
62. Fastest Finger First Indicator....................................................................................... 179
63. Decorative Signboard.................................................................................................. 180
64. Condenser Mic Audio Amplifier.................................................................................. 181
65. Smoke Alarm............................................................................................................... 182
66. Overload Protector with Reset Button......................................................................... 183
SECTION A:
CONSTRUCTION PROJECTS
Page = 1
Build Your Own
Pentium III PC
K.c. Bhasin and neeraj Kundra
T
he procedure presented here there must be some slack after these ence between them.
would enable you to assemble are installed and connected.) This will • The motherboard contains sensitive
your own multimedia personal improve the cooling and reduce the components, which can be easily dam-
computer. It is assumed that you have a chances of electromagnetic interfer- aged by static electricity. Therefore the
fundamental knowledge of how a PC func- motherboard should remain
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tions and some basics of electronics. By in its original antistatic
way of tools you only need Philips-head envelope until it is required
and flat-blade screwdrivers. A simple mul- for installation. When it is
timeter is the only test equipment that taken out from the enve-
you would ever require during assembly, lope, it should be immedi-
for AC and DC voltage measurement. ately placed on a suitable
All the parts needed to assemble grounded conductive sur-
this multimedia PC with processor face. The motherboard itself
speed of 700 MHz are listed under Parts should be held from edges
List. The cost of parts may vary from and the person taking it
dealer to dealer and also with time.
It is suggested to source these items
from authorised dealers who would meet
their warranty obligations. We have also
mentioned the brand names of the parts
that we used during assembly of the basic
unit. It is, however, not necessary to use
identical makes, except, of course, the
main processor and the motherboard,
based on identical chipset mentioned later
in this article.
Precautions
Before starting the actual assembly of
the PC system, the following precautions
would help you to avoid any mishap dur-
ing the assembly process:
• While the motherboard has to
be fitted at a fixed place inside the
PC cabinet, the locations of add-on
cards (as and when used) and the
drives (hard disk drive, floppy disk
drive, and CD-ROM drive) within
the drives’ bay of the cabinet can be
changed within certain limits. But it
is better to place them far away from
each other. (Of course, the length of
the cable provided for interconnec-
tions to the motherboard or add-on
cards has to be taken into account, as Fig. 1: Block diagram of motherboard employing 810E chipset
The motherboard
While the processor is the most important
part of the motherboard, the motherboard
itself is the most important part of the com-
puter system. Together with the chipset, it
forms the brain of your computer.
The modern motherboards do away
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with the large number of controller chips
and cards that were used in the older XT
and AT versions, such as clock generator,
bus controller, timer/counter, monitor/
printer adopter, FDD and HDD control-
lers, multi-I/O or super IDE controller
card, and DMA controller. All the func-
tions performed by these controllers/cards
(and others) are now performed by just
two or three chips and that too at much
higher speed.
The motherboard based on Intel’s
810/810E chipset (being used in the
Fig. 2: PC Partner motherboard layout diagram
present system) combines the advan-
tage of a multimedia (full-screen, full-
Table I motion video with realistic graphics)
and enhanced Internet performance at
JP1, JP2—System Bus Frequency
a budget price. With this motherboard,
JP1 JP2 CPU Clock Speed
one does not need separate sound,
1 Open 1 Open 133MHz (100MHz CPU run at 133MHz Front Side Bus) video, or graphics enhancement cards.
1 Open 1 1-2 100MHz (66MHz CPU run at 100MHz Front Side Bus) A block diagram of a motherboard
1 Close* 1 1-2* Auto* employing 810E chipset is shown in
Fig. 1.
JP15 - BIOS (Firm Ware Hub) Key features. The main features
Boot Block Protect JP4 - CMOS Clear of the PC Partner motherboard used
JP15 Function JP4 Function in this project are shown in the accom-
panying box. A layout diagram showing
1 Close* Unlocked* 1 1-2* Normal
the relative position of the jumpers,
1 Open Locked 1 2-3 CMOS Clear
connectors, major components, PCI
slots, and DIMM and CPU sockets is
JP34 - On Board Crystal PCI Sound (Optional) JP29 - Keyboard Power On Select shown in Fig. 2.
JP34 Function JP29 Function Jumper settings. Positions of vari-
1 1-2* Powered by +5V* ous jumpers within the motherboard are
1 1-2* PCI Sound Enable*
1 2-3 Powered by +5V Standby shown in Fig. 3. The jumper settings for
1 2-3 PCI Sound Disable (Allows Keyboard Power On) enabling various functions are shown in
Table I. Default settings are shown with
* Default settings
JP35, JP36 - On Board AC97 Codec Sound an asterisk mark. (Note. Leave all these
# P= jumpers in their default setting posi-
JP35 JP36 Function
Primary AMR, tions for the present project. The proces-
1 1-2* 1 2-3* (S)# AC97 Sound Enable*
S = Secondary AMR sor speed setting is to be done through
1 2-3 1 1-2 (P)# AC97 Sound Disable
CMOS setup as indicated later.)
Hardware installation
and checkout
Verifying components. First, carry out
a physical check of all the items as per
the parts list to ensure that there are no
apparent deficiencies and no signs of any
physical damage, and the parts are correct
as indicated by the labels on the items/pack-
ages. For example, the Pentium processor
pack should comprise Pentium III proces-
sor labeled 700MHz/100MHz system bus,
fan/heat-sink assembly, and installation Fig. 6: DIMM installation
time being, leave them alone.) An 8-ohm,
0.5W speaker (with black and red twisted
A wires and 4-pin connector), to go into
corresponding 4-pin speaker connector
on motherboard, also forms part of the
cabinet.
Checking SMPS. The control con-
sole on the cabinet also has a DPDT
(a) push-button switch to switch on the
mains (230V AC) to SMPS of the compu-
ter and a parallel-wired 3-pin AC socket
(c) on SMPS for connecting AC power to the
(b) A monitor used with the PC. At this stage,
slide the shielded connectors of the four
power supply wires of the SMPS into the
corresponding connectors on the DPDT
(d) switch as per the diagram provided on
the SMPS case (top side). The same is
reproduced in Fig. 4. The white and
black wires have a return path via blue
and brown wires, respectively, when the
power supply switch is flipped ‘on’. Con-
nect the 3-pin power cord provided with
the cabinet to the socket at the back
Fig. 5: Installation of Pentium III processor in PGA 370 socket of SMPS and plug 3-pin plug into the
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with their colour 1 DCD 6 DSR
Header (connectors with cables) for HDD (40-pin twin) - one 2 SIN 7 RTS
Header for FDD (34-pin twin) - one codes are shown
3 SOUT 8 CTS
Header for PS/2 mouse - one in Table II. 4 DTR 9 RI
Port bracket set with headers for: Check the cor- 5 GND 10 NC
(a) VGA (15-pin ‘D’ connector ending into 16-pin FRC and rectness of these *These connectors are for the serial port
parallel port (25-pin ‘D’ ending into 26-pin FRC) - one
(b) Com1 and Com2 (two 9-pin ‘D’ ending into 10-pin FRC) - two
voltages within bracket. Both connectors have the same pin-
the range as outs.
(c) Onboard AC97 sound codec (line-in, line-out, mic-in and
MIDI/game port ending into 26-pin FRC) - one given in Table
(red wire)] meant for various drives are
II. Then switch
also correct.
socket of the mains supply or the UPS, off the power
Motherboard fitment. The chassis
as appropriate. supply and take out the 3-pin plug
on which motherboard is to be mounted
Switch on the SMPS. The fan blower from the mains socket. If the AT power
can be easily removed from the PC
inside the SMPS should start running, connector voltages are correct, you
cabinet. Unscrew it and gently slide it
indicating availability of +12V supply to can safely assume that voltages in all
out from the main casing. Lay it flatly
the fan. Now verify all DC outputs of the other power connectors [4-pin Molex,
on the antistatic workbench (properly
SMPS as follows. carrying +12V (yellow wire) followed
grounded conductive surface). Mark the
There are two distinct 6-pin Molex by two black wires (ground) and +5V
side facing the keyboard connecter cutout
Table II on the chassis.
At Power Connector Pin Voltages All motherboards have standard
Pin Voltage Range Wire Pin Voltage Range Wire mounting holes. The hardware supplied
Colour Colour comprises plastic and metallic mother-
1 *P. G. 4.5V (min) Orange 7 Ground - Black board retaining fasteners/screw-holders.
2 +5V +5%/-4% Red 8 Ground - Black Metal-type screw-holders are better as
3 +12V +5%/-4% Yellow 9 -5V +10%/-8% White these have better strength and also these
4 -12V +10%/-9% Blue 10 +5V +5%/-4% Red ground the motherboard to the chassis.
5 Ground - Black 11 +5V +5%/-4% Red
6 Ground - Black 12 +5V +5%/-4% Red You may use four metallic screw-holders
*P. G. = Power good signal which is +5V (delayed, 100ms – 500ms).
for the four corner holes in the mother-
board, while the plastic fasteners may be
used for the middle
Table III
holes of the mother-
VGA–VGA Out Connector CN34*
board.
Pin Signal Name Pin Signal Name
Before attempting
1 Red signal 9 NC fitment of the mother-
2 Green signal 10 GND
3 Blue signal 11 NC board, align it on the
4 NC 12 Display data channel data chassis such that the
5 GND 13 Horizontal sync keyboard connector
6 GND 14 Vertical sync on the motherboard
7 GND 15 Display data channel clock
8 GND
is towards the side
*This connector is for the VGA display port. Connect a marked earlier for
VGA or higher resolution display monitor to it. this purpose. Now
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and MA (master). Ensure that jumper board. Projections on Molex connector of
is used in the middle to select the slave SMPS would engage into corresponding
mode for CD-ROM. The cable connection holes in PW1 connector. Once you have
Fig. 8: Connection of HDD and CD-ROM drive arrangement for HDD and CD-ROM is engaged the connector in this fashion,
using IDE-1 header shown in Fig. 8. make it vertical and then simply slide it
Before installation of drives, note down. It will snap into its position. (Be
and the corresponding projection, which down pin-1 orientation/position of the careful not to bend the pins and ensure
serves as a key so that they can go only 34-/40-pin interface cable connectors on that you have not engaged the wrong
the correct way. The cables used for the the drives. pins.) Similarly, insert the other 6-pin
drives have an additional connector in The CD-ROM drive may be installed Molex connector in the adjacent pins of
the middle (for slave in case of HDD and in the topmost position for 13.33cm AT power connector. On installation, all
drive B in case of FDD, which will be ex- (5.25-inch) drive, after pushing out the black coloured wires will be adjacent to
plained later). Using the tips given here, plastic piece (used for protection) cover- each other.
you can install the motherboard end of ing the cutout in this drive’s bay. Align Some of the connectors originating
the following cables: it from the front side of the case to en- from the motherboard (e.g. COM1, COM2,
• 16-pin VGA connector CN34 (refer sure that it is flush with the cabinet’s and VGA connectors) can be secured into
Table III). external surface. Using four Philips the cutouts provided on the case below the
• 26-pin parallel-port connector CN6 screws (6-32 UNC) secure it in proper SMPS. Thus secure the ‘D’ connectors for
(refer Table IV). horizontal position. The screws should COM1, COM2, and VGA into the respec-
• 10-pin serial/com ports 1 and 2, CN4 not be allowed to go more than 3.5 mm tive cutouts using Philips screws. This
and CN5 (refer Table V). into the threaded holes. saves the precious space inside the PC
• 26-pin sound cable connector CN31 Suitable cutout also exists in the drive case and gives it an ethical look.
(refer Table VI). bay for installing the 8.9cm (3.5-inch) For accommodating the panel/bracket
• 8-pin USB connector CN7 (refer floppy drive. Before fitting, ensure that for 25-pin ‘D’ connector of parallel port and
Table VII). drive door in the front opens downward PS/2 mouse as well as audio panel/bracket,
• 40-pin IDE-1 connector for HDD/CD- (hinged towards top). For installing floppy remove two of the cutouts from the rear
ROM drive CN1 (refer Table VIII). drive follow the same procedure as used of the case by just forcing them out with
• 34-pin FDD connector CN3 (refer for fixing CD-ROM drive. hands, and secure these brackets in the
Table IX). vacant positions using Philips
• 6-pin PS/2 mouse connector CN8 screws.
(refer Table X). Now you may terminate
• Installation of drives in drive’s the connectors originating from
bay. Before proceeding with the physical control panel on the cabinet at
installation of CD-ROM drive, hard disk the motherboard. Connect the
drive, and floppy drive in the drive’s bay, loudspeaker connector to CN14,
you have to plan their configuration. We power-on LED connector to
propose to use only one floppy drive. This CN12, HDD LED connector to
drive will be configured as floppy drive CN13, and reset switch connector
‘A’. The 34-pin floppy drive cable end with to CN11. (Correct orientation
twisted wires, emanating from CN3 on can be ensured by matching
the motherboard, needs to be connected the pin connected to coloured
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CMOS setup
Switch on the newly assembled PC. It
performs power-on-self-test (POST). Dur-
ing POST you will find ‘Num Lock’, ‘Caps
Lock’, and ‘Scroll Lock’ LEDs flashing. A
single short beep during POST indicates
that motherboard is ‘OK’.
Certain messages will keep appearing
on the screen of your monitor, including
“Press Del to enter CMOS setup”. When
this message appears, press ‘Del’ key to
enter setup. The CMOS Setup Utility
screen appears on monitor screen (refer
screenshot 1). There are seven items on
the left, which can be selected using ar-
row keys on your keyboard. On the right,
it shows certain options that are quite
obvious and can be interactively executed
when required.
Select the first item on the left,
Continued
“Standard CMOS Features”, and press
enter to see its screen (refer screenshot 2). You would notice from screenshot second, and third boot devices to read
Use arrow keys to move between the items 2 that during power up, the BIOS has CD-ROM, HDD-0, and floppy, respec-
and ‘Page Up’ or ‘Page Down’ key to edit identified the primary master (Seagate’s tively. This will enable you to boot/run
or select the options. You may correct the 10GB hard disk ST310211A), 52X Sam- the computer from CD-ROM (if you have
date, including year and century, and the sung’s CD-ROM Drive SC-15, floppy a Windows installation), CD, HDD (after
time to their current values. drives, video, and RAM address range formatting and transferring the system
(including its breakdown). This files), or floppy drive (using the startup
latest Award BIOS 1984-2000 does floppy created earlier), in that priority.
not contain ‘Auto Detect Hard Disk’ Press ‘Esc’ to come back to the open-
as a separate utility in the CMOS ing screen. For the time being, skip
setup options. utilities/screens 4 through 7 with their
To select any other screen/setup default values. Select the last “Fre-
utility option, press ‘Esc’, select quency/Voltage Control” menu item. Edit
the next item from setup utility ‘CPU clock/spread spectrum’ item to read
menu, and press ‘Enter’. The next ‘100MHz/On’. Thereafter press ‘Esc’ and
screenshot (screen shot 3) pertains select ‘Save and Exit Setup’ or F10 key,
to ‘Advanced BIOS Features’. Here and then ‘Y’ and ‘Enter’ for saving the
you may edit and change the first, edited BIOS selections.
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mat D:’ menu box, choose full and click it. (A sound icon will concurrently
on ‘Start’ button. After completion of the appear on the bottom line of your
formatting of ‘D’ drive, it is accessible for desktop.)
read/write operations. This completes par- • Intel Firmware Hub
titioning and formatting of the hard disk. configuration. In ‘Device Man-
ager’ under ‘Other Devices’, an below.
‘Unknown Device’ would still appear. This • APM. APM caters to the PC to enter
Loading concerns ‘Intel’s Firmware Hub’. To correct an energy-saving standby mode. BIOS
enables APM by default. It can be initiated
this problem, again go to 810 subdirectory
motherboard drivers on the CD, double click on ‘INF_install’, in the following ways:
• On-board VGA display driver. When and then on ‘Setup.exe’ within that sub- 1. By specifying time-out period in
the PC is running, insert the motherboard directory. A message “Found New Device BIOS setup program.
driver CD that came with the motherboard – Intel Firmware Hub” appears on the 2. By connecting a hardware suspend/
(PCPartner driver’s CD, in our case) into screen. This device will be automatically resume switch to CN10 on the mother-
CD-ROM drive. Select drive ‘E’, select ‘In- configured when you follow the instruc- board.
tel Chipset Products’, 810, VGA , Win9X, tions appearing on the screen properly. To 3. From ‘Suspend’ menu item in Win-
and Graphics, in that order, and double confirm that there are no unknown devices dows.
click on its ‘Setup.exe’ icon and follow the now, open ‘Device Manager’ and check all • ACPI. ACPI provides direct control
instructions on screen. After finishing, the items under ‘Other Devices’. to the operating system over the power
shut down the PC as per Windows shut- With installation of drivers for on- management as well as plug-‘n’-play func-
down procedure and restart to allow the board devices, hardware and software tions. Features include:
drivers to take effect. configuration of your multimedia PC 1. Power management control of
• On-board AC97 Codec sound is complete. Other secondary functions individual devices, add-on cards, video
driver. Click on ‘Start’ button, select set- such as power management functions— display, and HDD.
tings, select control panel, double click on APM (advanced power management) or 2. Methods for achieving less than
‘System’ icon, click on ‘Device Manager’, ACPI (advanced configuration and power 30W operation in ‘Power-on Suspend
go to ‘Other Devices’, double click on ‘PCI management interface)—can be incorpo- Sleeping State’ and less than 5W in ‘Sus-
multimedia’, select ‘PCI Audio’, click on rated later through pend to Disk Sleeping State’.
‘Remove button’ (since compatible soft- CMOS ‘Power Man- 3. A soft-off feature to power off the
ware drivers have not yet been installed to agement Setup’ fa- PC.
avoid conflicts), and then click on ‘refresh’ cility. Similarly, 4. Support for multiple wake-up events
button. you can install for the PC to resume normal operation.
Go back to control panel and, click Ethernet card for 5. Support for front-panel power and
on ‘Add new H/W’. A wizard guides you LAN and modem ‘sleep’ mode switch.
through rest of the process, and in due card for the Inter- • Ethernet card for LAN. Ethernet
course, a message “Found new hardware net, fax, and e-mail cards capable of running at 10Mbps to
– PCI multimedia audio, display, sound accessibility via 100Mbps, of different makes such as
video” appears. The program asks if you telecom lines. A Intel, Real Tek, Mercury and Dax, as
have disk (drivers). Click the ‘Browse’ brief information Ethernet PCI adapter are available in
button, select E:, ‘Intel Chipset Products’, on these additional the market.
810 , AC97 Sound, CS4299, Win98, in that functions is given Each card comes with a bracket, driver
Readers’ comments: Q5. I have successfully assembled the Data; 2. N/C (not connected); 3. Ground;
Q1. The authors have shown irresponsi- PC as per the given procedure using a 4. Vcc; 5. Clock; and 6. N/C.
bility by planning to install a Pentium III 128MB RAM instead of a 64MB RAM. 2. Label Energy Star is awarded by
processor on a PGA 370 socket meant for Please answer the following regarding Environmental Protection Agency (EPA),
a Celeron or lower processor. this project: USA, for products which meet its specifi-
Adarsh Soodan 1. How should I proceed to partition cations. It was introduced in 1992. Green
Through e-mail my hard disk into four logical drives? PC is Energy Star program developed
Q2. The article is really interesting and 2. The booting speed of my PC is lower by EPA for minimising unnecessary en-
useful. Please clarify the following techni- than that of my colleague’s PC that uses ergy consumption and release of harmful
cal terms: 500MHz Celeron processor and 64MB chemicals during production, especially
1. PS/2 mouse connector RAM. Why so? chlorofluorocarbons (CFCs) that cause
2. Energy Star, Green PC 3. What is the difference between AMI depletion of ozone layer.
3. Audio modem riser (AMR) BIOS and AWARD BIOS? 3. The AMR (audio modem riser) card
R. Sreerekha Hareendran Narla Sankar is a new modular specification that inte-
Kollam, Kerala Through e-mail grates the audio/modem functions on the
Q3. I request the authors to clear the fol- Q6. Following the guidelines in the article, motherboard by assigning the analogue
lowing doubts. I have successfully assembled my PC using I/O functions to a riser card. Integration
1. Is there any single and reliable altogether a different processor (500MHz of the audio/modem function enhances
dealer in Chennai, Bangalore or Kerala AMD K6-2) and a different motherboard system capabilities while reducing costs.
from where I can procure all the com- (Tomato with SIS 530 Chipset) with The AMR interface is based on an AC-link
ponents. Award BIOS. All is well except that dur- that is compliant with Intel audio codec
2. Is the PC available in kit form? ing the first switching, it flashes “CMOS ’97 version 2.1 specification. It supports
3. Instead of a 35.5 cm (14-inch) colour checksum error” and “CMOS battery data, fax, and voice modes. The pin details
monitor, can I use a 43.2 cm (17-inch) col- failed”. The former message “Checksum of its 46-pin edge connector are given in
our monitor with this PC, without making error” does not appear on restarting the Table I.
any alterations. Further, is there any 43.2 PC. Is this problem due to wrong orienta- The general features of the card in-
cm LCD, colour monitor available for this tion of BIOS chip? clude:
PC. In that case what are all the altera- Vinod D. Buchia – Transmission protocols supported
tions required to be made? Gandhidham (ITU-T V.90 and K56flex, V.34, V.32is,
A. Venugopalan Unny Authors, K.C. Bhasin and Neeraj Kun- V.22bis, V.21, Bell 212A, and Bell 103)
Palakkad dra, state: – Maximum download speed of 56,000
Q4. Please clarify: A1. We have not only planned but bps
1. What is the difference between a also installed the Intel’s Pentium III – Virtual COM Port throughput
boot disk and a start-up disk? processor in PGA 370 socket, and the – 460.8 kbps
2. How can I increase the HDD capac- system is up and running superbly at – Call progress monitor
ity to 20 GB? Further, how can I partition EFY ever since. – On-/off-hook control
HDD into four sections (logical drives) and In fact, Fig. 5 showing its installation – DTMF detection and generation
CD-ROM drive as the fifth drive? in PGA 370 socket is from Intel Pentium – Distinctive ring for data, fax, and
3. Define primary master/slave and III processor installation notes which ac- voice
secondary master/slave. company the Intel Pentium III processor. – Call ID support (optional)
4. How can I configure HDD as second- So the remarks made by the reader are We will try to publish troubleshoot-
ary master and CD-ROM drive as second- totally unwarranted. ing procedures for the PC, in EFY, very
ary slave? A2. 1. PS/2-compatible keyboard and soon.
5. Provide a few tips for attaching a mouse connector are miniature 6-pin A3. 1. We have not carried out a mar-
CD-writer and also a DVD drive to the DIN connectors unlike the PCAT 5-pin ket survey of the cities/states mentioned
system. keyboard and 9-/25-pin (comport) connec- by you and as such we cannot provide you
T. K. Hareendran, Kadakkal tor for the mouse. The pin signals are: 1. any related information.
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Windows Explorer, select 3½ floppy, and
above. The setting at serial No. 3 is not that case your four drives on the first HDD
right-click on ‘+’ sign on its left. Now from
applicable to the newer PCs that are all will be named C:, E:, F:, and G:. The last
the pull-down menu, select ‘format’. Select
compatible with ATA (advanced technol- drive name after partitioning of the next
‘copy system files only’ and click on its
ogy attachment) packet interface. The HDD will be assigned to the CD-ROM
start button to copy the above-mentioned
fourth setting (cable select) is meant drive. In the case of two physical HDDs,
files to make the floppy bootable. for computers that use CSEL option for the page 1 of menu in ‘Fdisk’ will show an
If you desire to view hidden files in
master and slave device by selecting or additional choice ‘5. Change current fixed
the disk, click ‘view’ on the menu bar of
deselecting pin 28 of the interface bus, by disk drive’.
Windows Explorer and select ‘view’ in the
jumpering pins 5 and 6. 3. The two devices connected to IDE1
‘folders’ option. Then under ‘hidden files’,
One can use the ‘IDE HDD auto connector (refer the motherboard in Fig.
select ‘show all files’ and click ‘apply’. You
detect’ option from the main menu for 2 of the article) are termed ‘primary’
can now see all files including hidden files
auto-detection of HDD parameters. In and those associated with IDE2 connec-
on the disk. most cases, the BIOS will auto-detect the tor ‘secondary’. Master and slave will be
A start-up disk on the other handHDD(s). If it does not, select the ‘User’ configured as per the shorting link’s posi-
has, in addition to the above-mentioned
option to manually enter the drive’s pa- tions. It is a normal practice to configure
rameters by referring the drive at extreme connector as master
Table I to its documentation and the one connected to middle connec-
AMR Connector Pin Definitions (AMR) that gives the values for tor as slave. (You can also configure them
Pin Signal Pin Signal cylinders, heads, and so vice-versa.)
number number on. The mode should be 4. The shorting link in jumper block
B1 Audio mute# A1 Audio_PWRDN set to LBA (logical block of CD-ROM drive (Fig. 9) will need to
B2 GND A2 Mono_phone addressing). short pins marked ‘SL’. For HDD, fol-
B3 Mono_out_/PC_beep A3
B4 A4 The procedure for low the guidance given in the preceding
B5 A5 creating one active paragraph. Both the devices should be
B6 Primary_DN# A6 GND (bootable) primary par- connected to the cable terminating on
B7 -12V A7 +5V dual/+5V SB tition (drive C:) and one IDE2 connector.
B8 GND A8 USB_OC#
B9 +12V A9 GND
extended DOS partition 5. Attaching a CD-R (CD-recorder/
B10 GND A10 USB+ (drive D:) has already burner/r-drive). There are various ver-
B11 +5VD A11 USB- been covered in the sions. Some can be attached externally
(Key) (Key) article. Assume that we while the others can be installed like a
(Key) (Key) want a primary parti- CD-ROM itself inside the PC. Some will
B12 GND A12 GND
B13 A13 S/P-DIF_IN tion of 50 per cent and be IDE-compatible and can be configured
B14 A14 GND three extended DOS using IDE cable referred above. Some ver-
B15 +3.3VD A15 +3.3V dual/3.3V SB partitions of equal size sions will be SCSI compatible (for higher
B16 GND A16 GND of the leftover disk space speed), but for that you will need an extra
B17 AC97_SDATA_OUT A17 AC97_SYNC
B18 AC97_RESET# A18 GND
for drives D:, E:, and SCSI adapter card in one of the vacant
B19 AC97_SDATA_IN3 A19 AC97_SDATA_IN1 F:, respectively. (Note. PCI slots. The latest ones are USB (uni-
B20 GND A20 GND Drive letter ‘G:’ will be versal serial bus) port-compatible. (The
B21 AC97_SDATA_IN2 A21 AC97_SDATA_IN0 automatically assigned USB port is available on your Pentium
B22 GND A22 GND to CDROM drive in the motherboard.) Some external recorders
B23 AC97_MSTRCLK+RST A23 AC97_BITCLK
process.) In effect, we can be connected via the printer port.
U
IC4 - 74LS192, up/down decade
sually, when we enter our room BCD output of the counter, at any time, counter
in darkness, we find it difficult represents the number of persons inside IC5 - 74LS85, 4-bit magnitude
to locate the wall-mounted switch- the room. The output of the up/down comparator)
board to switch ‘on’ the light. For a counter is decoded by 7-segment decoder/ IC6 - 7447, BCD to 7-segment
decoder/driver
stranger, it is tougher still as he has no driver and displayed on 7-sement display.IC7 - MCT2E, opto-coupler
knowledge of the correct switch to be Simultaneously, the output of counter is IC8 - 7805, +5V regulator
turned on. Here is a reliable circuit that compared by 4-bit magnitude compara- IC9(N1-N4) - 74LS00, quad 2-input
takes over the task of switching ‘on’ and tor. NAND gate
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IC10(N5-N10) - 74LS14, hex schmitt
switching ‘off’ of the light(s) automatically The output of comparator remains inverter gate
when somebody enters or leaves the room high as long as BCD output of counter is T1, T2 - BC548, npn transistor
during darkness. This circuit has the fol- greater than zero. A logic gate is used to
T3 - SL100, npn transistor
lowing salient features: D1-D3
initiate energisation of a relay to switch - IN4001, rectifier diode
IRLED1, IRLED2 - Infrared LED
• It turns on the room light whenever ‘on’ the light when comparator output is
Resistors (all ¼-watt, ±5% carbon, unless
a person enters the room, provided that high and it is dark outside.
stated otherwise):
the room light is insufficient. If more than R1 - 3.3-kilo-ohm
one person enters the room, say, one after R2 - 10-kilo-ohm
the other, the light remains ‘on’. The circuit R3 - 100-ohm
R4, R5, R21 - 1.2-kilo-ohm
• The light turns ‘off’ only when the The detailed section-wise description of
R6, R7, R12 - 33-kilo-ohm
room is vacant, or, in other words, when the circuit shown in Fig. 2 is as follows:
R8, R9 - 180-kilo-ohm
all the persons who entered the room IR transmitter. The IR transmitter R10, R11 - 1-kilo-ohm
have left. R13-R19
circuit consists of an astable multivibra- - 470-ohm
R20 - 100-kilo-ohm
• A 7-segment display shows the tor built around NE555 timer IC1. The
VR1 - 10-kilo-ohm preset
number of persons currently inside the output of IC1 at pin 3 is a rectangular
Capacitors:
room. waveform of around 36kHz frequency. C1 - 0.001µF, ceramic disk
• The circuit is resistant to noise and This output is used to drive two IR LEDs,C2, C3, C4 - 0.01µF, ceramic disk
errors since the detection is based on in- which transmit modulated IR light at C5, C6 - 4.7µF, 16V electrolytic
frared light beams. 36kHz frequency. Modulating frequency C7, C8 - 10µF, 16V electrolytic
C9 - 1µF, 16V electrolytic
• The circuit uses commonly available of 36 kHz is used because the IR receiver
Miscellaneous:
components and is easy to build and test. modules used in this circuit respond to IR
M1, M2 - IR sensor modules
The functional block diagram of the signals modulated at 36kHz frequency. DS1 - LT542 (common anode
circuit is shown in Fig.1. It comprises The multivibrator frequency can be cor- display)
36kHz IR transmitter, two IR detector RL1
rectly adjusted with the help of preset VR1 - 12V, 200 ohm, 2 C/O.
LDR1 - LDR (Dark resistance > 120
modules, two monostable multivibrators, (10 kilo-ohm). Resistor R3 is a current kilo-ohm)
up/down-counter, 4-bit magnitude com- limiting resistor that keeps the IR LEDs,L1 - 230V, 100W electric bulb
parator, 7-segment decoder display, light current within the required range. - 12V power supply
sensor, and relay driver. IR detector modules. The IR de- - Printed circuit board
- IC sockets
Two pairs of IR transceivers are em- tector modules used in the circuit are
ployed in order to detect whether the
person is entering or leaving the room.
When a person enters the room, IR
detector 1 gets triggered, followed by
triggering of IR detector 2. Conversely,
when a person leaves the room, IR
detector 2 gets triggered, followed by
triggering of IR detector 1.
A priority detector circuit deter-
mines which of the two detectors is
triggered first and then activates an
up/down counter accordingly. The Fig. 1: Block diagram of automatic room light controller
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pulse is applied at its countdown input
(pin 4) while its countup pin 5 is held at
logic 1 and its output decreases by one.
Thus the 4-bit output always represents
the number of persons still inside the
room. The output of the decade counter
is connected to 7-segment decoder/driver
IC6 (7447) that displays the number on
common-anode 7-segment LED display
(LT542).
Magnitude comparator. The output
of the up/down counter is also applied to
4-bit magnitude comparator that acts
as zero detector, i.e. it detects whether
Fig. 4: Actual-size, single-sided PCB layout for the circuit the number of persons inside the room
is greater than zero or not. The 4-bit
output of the decade counter is always
compared with a reference 4-bit number
(0000), and if a match occurs, the output
at pin 5 (P>Q) of the comparator goes
low to represent an ‘empty room’ condi-
tion. In all other cases (when the number
of persons in the room is greater than
zero), P>Q output will be at high state.
This output is given as one of the inputs
to NAND gate N4 (followed by inverter
gate N8). Thus, as long as the room is
not empty, one of the inputs to N4 gate
will be high.
The second condition for the light to
get switched ‘on’ is yet to be satisfied.
Whether there is sufficient light in the
room or not is checked by the light sensor
circuit.
Light sensor. The light sensor is
wired around the opto-coupler MCT2E.
The resistance of the LDR depends upon
the amount of light in the room. An LDR
with resistance below 5 kilo-ohm in nor-
mal light and more than 120k resistance
Fig. 5: Component layout for PCB in darkness is required. When there is
I
n coming years, the drinking water tank has become full. As a result, water ler circuit presented here. It has the fol-
is going to be one of the scarce com- keeps overflowing until the household lowing features:
modities. This would partly be at- people notice the overflow and switch • It can automatically switch on the
tributable to our mismanagement of the pump off. As the OHT, in general, is pump when the tank is empty and switch
water supply and its wastage. In normal kept on the topmost floor, it is not quite it off when the tank becomes full.
households, where pumps are used to fill convenient to go up frequently and see • It can check the ground tank (sump
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the overhead tanks (OHT), it is usually the water level in the OHT. tank) water level from which the water is
observed that people switch on the pump This problem can be solved by using pumped into the overhead tank (OHT).
and forget to switch it off even when the the intelligent digital liquid level control- If the sump tank water level is below the
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R25 - 1-kilo-ohm
Fig. 5: Actual-size, single-sided PCB for water level controller R26, R27 - 220-kilo-ohm
R28-R34 - 330-ohm
VR1, VR2 - 100-kilo-ohm preset
Capacitors:
C1-C4, C7 - 0.01µF ceramic disc
C5 - 470µF, 35V DC electrolytic
C6 - 2200µF, 35V DC electrolytic
C8,C9 - 10µF, 25V DC electrolytic
Miscellaneous:
RL1 - 12V, 200-ohm 2 C/O relay
X1 - 230V AC primary to
(a) 0-15V, 750 mA, and
(b) 0-12V, 100 mA secondary
transformer
S1 - Push-to-on button
S2 - On/Off switch
- IC sockets
- Heat sinks for regulator ICs
- SS304, 5mm dia. stainless
steel rod for anode and 3mm
dia. for all cathodes - of ap-
propriate length
- Multi-core feed wire
A
separate alternative circuit of a and the power
unique liquid level indicator supply circuit
to provide a display in terms of in Fig. 2 inde-
the percentage of full-scale level in OHT pendantly.
is shown in Fig. 7. It can either be used The latter
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to replace the digital display circuit configuration
included in Fig. 1 (by simply connecting can be used
the 10% and 100% sensor probes of Fig. 7, when you do
additionally, to points marked ‘A’ and ‘B’ not desire to
respectively in Fig. 1, apart from connec- have auto-
tion of +5V and +12V supplies and ground matic control
points) or it can be used in conjunction for switching
with an audio alarm unit shown in Fig. 8 the pump mo- Fig. 8: Audio alarm unit
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R46 - 2.7-kilo-ohm
R47, R48 - 680-ohm
Capacitor:
C1 - 100µF, 25V electrolytic
Miscellaneous:
LS - 8-ohms speaker 7.5 cm dia
- SS 304, 5 mm dia and 3mm
dia stainless steel rods of
appropriate length for anode
and cathodes respectively.
- Multi-core feed wire
I
t is very convenient to interface a croprocessor know that its buffer is full,
TABLE 1
printer to print 8085 programs. Here and it cannot accept any more characters Pin Assignments of Centronics
a simple hardware interface circuit until it prints out some of the already Interface Connector
with its driver software is described that stored characters. A common standard for Pin No. Signal Direction
would enable student to take printout of interfacing with parallel printers is the 2 Data bit 0 (D0) In
the 8085 programs in hexadecimal codes Centronics interface. 3 Data bit 1 (D1) In
along with their memory locations in the 4 Data bit 2 (D2) In
5 Data bit 3 (D3) In
format: xxxx DD, where XXXX is the 4-bit
hexadecimal address and DD is 2-bit hexa- Centronics interface 6
7
Data bit 4 (D4)
Data bit 5 (D5)
In
In
decimal data. Centronics printers usually have a 36-pin 8 Data bit 6 (D6) In
For most types of printers, the data to interface connector. The pin assignments 9 Data bit 7 (D0) In
1 Strobe (STR) In
be printed is sent to the printer as of the significant pins of Centronics inter-
14 Auto Feed (AF) In
face connector, used in this project, are 36 Device Select (DSL) In
given in Table 1. 31 Initialise (INIT) In
Fig. 1 shows the timing waveforms 11 Busy (BSY) Out
for transferring data characters to 13 Select (SEL) Out
32 Error (ERR) Out
the printer using the basic handshake 12 Paper end (PE) Out
signals. Assuming that the printer has 19 to
been initialised, first check the busy 30, 33 Ground —
signal pin to see if the printer is ready
to receive data. If this signal is low (not which is used for connecting 8255 to the
Fig. 1: Timing diagram busy), send an ASCII code on the eight printer, should normally have a 26-pin FRC
parallel data lines. After at least 0.5 µs, connector to meet with the corresponding
assert the STROBE connector on the kit, and the other end
signal low to tell the should have a 36-pin male Centronics con-
printer that a char- nector to go into the corresponding connec-
acter has been sent. tor on the printer.
The strobe signal Port A of 8255 is used for transferring
going low causes the the data to the printer. Port B is used for
printer to assert its checking the status signals coming from
Busy signal high. Af- the printer. Port C is used for sending the
Fig. 2: System's block diagram
ter a minimum time control signals required to activate the
ASCII characters on eight parallel of 0.5 µs the strobe signal can be raised printer. The interface signals between
lines. The printer receives the characters high again. Note that the data must be 8255 and the printer should be connected
to be printed and stores them in an inter- held valid on the data lines for at least 0.5 as show in Table 1.
nal buffer. When the printer detects a car- µs after the strobe signal is made high. (EFY Lab note. The maximum cur-
riage return (odH), it prints out the first When the printer is ready to receive the rent that an 8255 output pin can source
row of characters from the printer buffer. next character, the BUSY signal will be and sink is limited to 400 µA and 2.5 mA,
When the printer detects a second car- low. The process continues. respectively. To enhance this capability,
riage return, it prints out the second row The 8085 microprocessor is interfaced open-collector hex buffers/drivers 7407
of characters. The process continues until to the printer through 8255 program- shown in Fig. 3 were used for all output
the desired characters are printed. mable peripheral
Transfer of ASCII codes from the interface device as Table II
microprocessor to a printer needs to be shown in the block Port B of 8255—(Input) Status Signals
done on a handshake basis because the diagram (Fig.2) and Cent. Pin no b2 32 13 11
microprocessor can send characters much the detailed inter- Signal PE ERR SEL BSY Comments
faster than the printer can print them. face diagram (Fig.3). Data B3 B2 BI B0
The printer must in some way let the mi- One end of the cable, 0 1 1 0 =06H (status OK)
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The end of the
program is in-
dicated using
RST1 (CFH).
The start-
ing location of
the program
to be printed
should be
stored in D
and E regis-
ters. The eight
MSBs and
eight LSBs of
memory loca-
tion should
be stored in
Fig. 3: Schematic diagram of the printer interface circuit D register and Fig. 5: Component layout for the PCB
E register, re-
port pins. For input port pins, there is no spectively. The complete software Parts List
danger of overloading, and hence these program is given with comments as Semiconductors:
pins were connected directly from the necessary. ICI, IC2 - 7407 hex buffer/driver (open
printer to the kit.) (EFY Lab note. The original program collector type)
Resistors (all ¼-watt, ±5% carbon, unless stated
was tried many times, but we did not suc- otherwise):
Printer driver program ceed. Finally, the program was extensively
modified and successfully run using Epson
R1-R12 - 1-Kilo-ohm (or use one-/two-
resistor networks
overview 9-pin printer. The program, along with Miscellaneous: - Centronics connector and
During initialisation, some memory loca- cable
Tables II and III showing the status and
tions are kept aside to
store the ASCII equiva- Table III
Port B of 8255—(Input) Status Signals
lent of the characters that
Cent pin no NU 14 31 1 NU 36 NU NU
are to be printed. This is Signal AF INIT STR DSL Comments
followed by configuration Data C7 C6 C5 C4 C3 C2 C1 C0
(initialisation) of 8255 by X 0 1 1 X 0 X X =30H
sending the mode con- X 0 0 1 X 0 X X =10H Printer
long delay initialisation
trol world to its control X 0 1 1 X 0 X X =30H
register. To initialise
the printer first send ini- X 0 0 1 X 0 X X =20H
tialisation (INIT*) pulse Short delay strobe
X 0 1 1 X 0 X X =30H
for a few microseconds.
Then send the select NU=Not Used
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7228 CPI 00 FE 7202 DCR C 0D Decrement the contents of C reg.
7229 00 7203 JNZ 7202 C2 if the contents of C is not zero, goto
722A JNZ 7224 C2 7204 02 7202.
722B 24 7205 72
722C 72 7206 RET C9
control signals that have been used in Port A (output): 08H onward ASCII conversion of data to be
program implementation, is included for Port B (input): 09H printed starts at 9A20H. Data to end with
the benefit of readers, who may try both Port c (output): 0AH CFH as the last byte.
the programs, if desired.) Control word register: 0BH The actual-size, single-sided PCB lay-
Address map of devices used: Important memory location: out of the printer interface circuit and the
RAM locations used: 9000H to 92AEH Stack pointer initialised: 9500H component layout are shown in Figs 4 and
(70FCH onwards used by author) Data to be printed is stored at: 9D20H 5, respectively. ❏
Mo
rse code, introduced by Samuel been used, which relieves the micro- 7-segment display pattern employed
Morse, is still used universally processor from scanning the keyboard for different characters is shown in
even though better modes of and display. Here, 25 keys, includ- Table I.
communication are now available Follow- ing SHIFT and CTRL keys, and six Two hardware interrupts, RST5.5
ing are the main reasons for its preference 7-segment common cathode character and RST6.5, are used for reading the key
over other means of communication. displays are used. Though 7-segment entries. These are driven by the IRQ line
1. It enables communication with displays are not suitable for alpha- from the keyboard/display interface IC
distant stations, using low-power trans- numeric characters, these have been 8279.
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mitters. used here with some compromise for A buffer (IC8) is connected at the
2. It avoids the problem of regional reducing the overall cost. (Note: The display output of 8279 to drive the
accents and pronunciation. use of dot-matrix LCD display avoids 7-segment displays. The encoded scan
3. It has the ability to override noise the difficulty in displaying characters lines (SL2-SL0) are decoded by an octal
as it occupies only a fraction of the in 7-segment format. One can go for a decoder 74LS138 (IC9), whose outputs
bandwidth microcontroller design, if needed.) The drive the common cathode of displays
required for via transistor switches. The keys are
a radio te- TABLE II wired in such a way that those can be
lephony sig- Address Distribution represented by the seven higher order
nal. Device Address rate of the keyboard data.
The cir- EPROM 0000 to 03FF Morse signals in the form of sound are
cuit presented RAM 1000 to 17FF converted to microprocessor-compatible
here converts 8279: signals. The arrangement comprises con-
Command Port 21
text into the Data Port 20
denser microphone, preamplifier, and
correspond- retriggerable monostable multivibrator
ing Morse
code, and vice
versa. The
high light of
this circuit is
that is can in-
terpret Morse
signals avail-
able in the
form of sound
from ham
radio or any
other source.
It is very use-
ful for not
only learning
but also for transmission and reception of
Morse code. It can find application in ham
radio, telegraphy, etc.
Hardware
The circuit is configured around the
basic 8085 microprocessor. For simplify-
ing the overall design, a programmable
keyboard/display interface 8279 chip has
Size 215×100 mm
with a prefixed time value and accord-
ingly decides whether the sound was
due to dot or dash. Moreover, it displays
characters corresponding to the entered
Morse code.
(e) Display. This module displays
characters in the moving display format
as per the entered message. The speed
of movement is fixed to approximately
three characters per second.
(f) Lookup table (Table IV). This
is a block of data, which contains the
7-segment data for every character
and the data needed for Morse code
generation or reception. Each character
takes four EPROM locations. The first
location indicates the 7-segment data,
while the second and third locations
hold the Morse data code. The fourth
location is unused. (EFY Note. We
have included Table IV showing the
hex data generated by depression of
any key alone or in combination with
SHIFT or CTRL keys, for ready refer-
ence by the readers.)
Control-key functions
Before going to the operating procedure,
we have to know the functions of key as-
sociated with CTRL key.
CTRL+SETUP (8EH). The default
speed is initialized for approximately
5 words/minute. If you want to change
this setting, you can do so by using this
control key combination. When you press
this combination k, the message ‘SEtUP’
is displayed. Here you can enter any
one of the characters ranging from ‘1’
through ‘9’ and ‘A’ through ‘K’ to change
the speed. Note that the minimum speed
is associated with ‘K’ and the maximum
with ‘1’.
CTRL+CLEAR (98H). It clears the
RAM content.
CTRL+PLAY (84). CTRL+PLAY is
used for displaying the RAM content in
moving format. You can interrupt any
process by pressing any control key that
has no function.
CTRL+CONT (86). It is used for
continuing the play operation if it were
interrupted.
Operating procedure
1. Switch on the power supply. A message Fig. 2: Actual-size, single sided PCB for the Morse processor
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0020 CDE000 CALL DISPLAY Display ‘SELECt’ by six places
0023 FB El 0094 19 DAD D
0024 76 HLT Halt 0095 C9 RET
0096 FE82 CPI 82H Checking CNTL+TABL key
RST 5.5 0098 C2A000 JNZ 00A0H
002C C3F700 JMP 00F7H Go to ISR of RST5.5 009B 11F9FF LXI D.,FFF9H Shifting the characters right
by six places
RST 6.5
009E 19 DAD D
0034 DB20 IN 20H Reading keyboard data from
009F C9 RET
IC 8279
00A0 FE88 CPI88H Checking CNTL+ START
0036 F5 PUSHPSW Store it in the stack
key
0037 FE8A CPI8AH Checking CNTL+ RECEIVE
00A2 CA1001 JZ TRANSMIT
key
00A5 FE96 CPI 96H Checking CNTL+DEL key
0039 CA0002 JZ RECEIVE
00A7 C2BA00 JNZ 00BAH
003C FE8C CPI8CH Checking CNTL+
00AA E5 PUSH H
TRANSMIT key
00AB 46 MOV B,M Delete one character in the
003E CA8001 JZ KEYBOARD
left most position of the display
0041 FE84 CPI 84H Checking CNTL+PLAY key
00AC 2B DCX H
0043 CAD001 JZ PLAY
00AD 70 MOV M,B
0046 FE86 CPI 86H Checking CNTL+
00AE 23 INX H
CONTINUE key
00AF 23 INX H
0048 CAD501 JZ 01D5H
00B0 7C MOVA.H
004B FE98 CPI98H
00B1 FE17 CPI 17H
Checking CNTL+ CLEAR
00B3 DAAB00 JC 00ABH
kev
00B6 El POPH
004D C26000 JNZ 0060H
00B7 2B DCX H
0050 210010 LXIH.1000H Clearing the RAM
00B8 2B DCX H
0053 36C8 MVI M.C8H
00B9 C9 RET
0055 23 INXH
00BA FE94 CPI 94H Checking CNTL+INS key
0056 7C MOV A, H
00BC C2D100 JNZ 00D1H
0057 FE17 CPI 17H
00BF 2B DCX H Inserting a space for adding
0059 DA5300 JC 0053H
character
005C 2A5117 LHLD 1751H Return to mode from 00C0 E5 PUSH H
005F E9 PCHL where clearing action is 00C1 46 MOVB.M
called 00C2 36C8 MVI M.C8H
0060 FE8E CPI8EH Checking CNTL+ SETUP 00C4 23 INX H
key 00C5 7E MOV A,M
0062 C27700 JNZ 0077H 00C6 70 MOV M,B
0065 3E0E MVIA.0EH Activating RST5.5 00C7 47 MOV B,A
0067 30 SIM 00C8 7C MOVA.H
0068 11F403 LXI D.03F4H 00C9 FE17 CPI 17H
006B CDE000 CALL DISPLAY Display the message ‘SEtUP’ 00CB DAC400 JC 00C4H
006E FB El 00CE E1 POPH
006F 76 HLT 00CF 2B DCX H
0070 3E0D MV1A.0DH Activating RST6.5 00D0 C9 RET
0072 30 SIM 00D1 FE7F CPI7FH Checking whether key data
0073 2A5117 LHLD 1751H is valid character
0076 E9 PCHL Return to mode from where 00D3 D2CF00 JNC 00CFH
setup action is called 00D6 07 RLC
00D7 77 MOVM,A Enter it into the RAM 0156 217017 LXI H.1770H
00D8 C9 RET Return 0159 46 MOVB.M
015A CD7001 CALL DELAY1 Waiting
DISPLAY SUBROUTINE:
015D 05 DCRB
00E0 0E06 DISPLAY: MVI C,06H Display six characters taken
015E C25A01 JNZ015AH
from lookup table
0161 Fl POPPSW
00E2 1A LDAX D Lookup table is pointed to
0162 0F RRC
by DE -reg pair
0163 0F RRC
00E3 D320 OUT 20H
0164 0D DCRC
00E5 13 INX D
0165 C22501 JNZ 0125H
00E6 OD DCR C
0168 C32101 JMP 0121H
00E7 C2E200 JNZ 00E2H
00EA CDCOO1 CALL DELAY2 Wait for some time
DELAY1 SUBROUTINE:
00ED CDC001 CALL DELAY2
0170 E5 DELAY1: PUSH H Executing these instructions
00F0 C9 RET Return
require approximately
0171 21CF01 LXIH.01CFH 3 msec
VECTOR RST 5.5
0174 2B DCXH
00F7 DB20 IN 20H Reading key closure data
0175 7C MOVA.H
from 8279
0176 B5 ORAL
00F9 E63F ANI3FH
0177 C27401 JNZ0174H
00FB 07 RLC
017A E1 POPH
00FC 327017 STA 1770H Storing clot value
017B C9 RET
00FF 47 MOV B,A
0100 80 ADD B
KEYBOARD SUBROUTINE:
0101 80 ADDB
0180 AF KEYBOARD: XRAA Updating mode and positing
0102 327117 STA 1771H Storing dash value
data
0105 C9 RET Return
0181 325017 STA 1750H
0184 218001 LXIH.0180H
TRANSMIT SUBROUTINE:
0187 225117 SHLD 1751H
0110 31FF17 TRANSMIT: LXI SP.17FFH
018A 11E203 LXI D.03E2H Displaying message
0113 7C MOVA.H
018D CDE000 CALL DISPLAY ‘trAnSf for indicating the
0114 FE17 CPI17H Checking end of mem.
TRANSMIT mode
0116 D2B301 JNC 01B3H
0190 31FF17 LXI SP.17FFH
0119 1603 MVID.03H
0193 210610 LXIH.1006H Entering keyboard data to
011B 5E MOVE.M
the RAM
011C 1A LDAX D
0196 11FBFF LXI D.FFFBH
011D D320 OUT20H Display character in the
0199 19 DADD
RAM
019A 0E06 MVI C.06H
011F F3 DI
019C 1603 MVID.03H
0120 E5 PUSHH
019E 5E MOV E,M
0121 0EO4 MV1C.04H Morse code generation
019F 1A LDAX D
0123 13 INXD
01A0 D320 OUT20H
0124 1A LDAX D
01A2 23 INX H
0125 F5 PUSHPSW
01A3 0D DCRC
0126 217017 LXIH.1770H
01A4 C29E01 JNZ 019EH
0129 E603 ANI 03H
01A7 7C MOVA.H
012B FE01 CPI01H
01A8 FE17 CPI17H Checking end of mem.
012D CA4801 JZ 0148H
01AA DAB301 JC 01B3H
0130 23 INXH
01AD 11E803 LXI D.03E8H
0131 FE02 CPI02H
01B0 CDE000 CALL DISPLAY If mem. is over display
0133 CA4801 JZ 0148H
‘MoVEr’
0136 FE03 CPI 03H
01B3 FB El
0138 CA5901 JZ0159H
01B4 76 HLT
013B Fl POPPSW
01B5 C39601 JMP 0196H
013C El POPH
0131 FB El
DELAY2 SUBROUTINE:
013E 7E MOVA.M
01C0 0E9F DELAY2: MVIC.9FH Wait approximately
013F 23 INXH
400 msec
0140 FECC CPICCH Checking end of message
01C2 CD7001 CALL DELAY1
character’]’
01C5 0D DCRC
0142 C21001 JNZ0110H
01C6 C2C201 JNZ 01C2H
0145 C3B301 JMP01B3H
01C9 C9 RET
0148 3ECD MVIA,CDH Setting SOD line
014A 30 SIM
PLAY SUBROUTINE:
014B 46 MOVB.M
01D0 1603 PLAY: MVI D.03H
014C CD7001 CALLDELAY1 Waiting
01D2 210510 LXI H.1005H
014F 05 DCRB
01D5 F3 DI
0150 C24C01 JNZ 014CH
01D6 23 INXH
0153 3E4D MVIA.4DH Resetting SOD line
01D7 7C MOVA.H
0155 30 SIM
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0211 11FA03 LXI D.03FAH 027F 23 INXH
0214 CDE000 CALL DISPLAY Clear the display 0280 23 INX H
0281 23 INXH
0217 FB El 0282 05 DCR B
0218 110510 LXI D.1005H Morse code aquisition 0283 C29102 JNZ 0291H If given
021B 13 INXD morse code is
invalid, display V
021C D5 PUSH D 0286 FE04 CPI 04H
021D 218117 LXIH.1781H 0288 DA1D02 JC 021DH
0220 3600 MVI M.00H 028B 215C03 LXI H.035CH
028E C39F02 JMP 029FH
0222 2B DCX H 0291 BE CMPM
0223 E5 PUSH H 0292 C27B02 JNZ 027BH
0224 0E00 MVI C,00H 0295 3A8117 LDA 1781H
0298 23 INXH
0226 1E04 MVI E.04H 0299 BE CMP M
0228 61 MOVH.C 029A 2B DCX H
0229 0600 MVI B.00H 029B C27B02 JNZ 027BH
029E 2B DCX H
022B CD7001 CALL DELAY1 029F Dl POPD
022E 04 INR B 02A0 7A MOV A,D
022F 20 RIM 02A1 FE17 CPI 17H
Reading the SID pin Checking end of mem.
02A3 D2D102 JNC 02D1H
0230 07 RLC 02A6 7E MOVA.M
0231 DA2B02 JC 022BH 02A7 D320 OUT 20H Display
0234 24 INR H the character
02A9 7D MOV A,L Store
0235 3A7117 LDA 1771H data, corresponding
0238 BC CMPH 02AA 12 STAXD to
Checking for the space displayed character, in
the RAM
between characters 02AB 0600 MVI B,00H
0239 DA6602 JC 0266H 02AD 217017 LXI H.1770H
023C 78 MOV A,B 02B0 7E MOVA.M
02B1 07 RLC
023D FE02 CPI02H 02B2 23 INX H
023F DA2902 JC 0229H 02B3 86 ADD M
0242 2600 MVI H.00H 02B4 D2B802 JNC 02B8H
02B7 04 INRB
0244 1640 MVI D,40H 02B8 4F MOV C,A
0246 3A7117 LDA 1771H 02B9 0B DCX B
0249 OF RRC 02BA CD7001 CALL DELAY1
02BD 20 RIM
024A B8 CMPB 02BE 07 RLC
Checking for dot and dash 02BF DA1B02 JC 021BH Check
024B D25702 JNC 0257H for space between
02C2 78 MOVA.B words
024E 7A MOV A,D 02C3 B1 ORAC
024F 07 RLC 02C4 C2B902 JNZ 02B9H
0250 57 MOV DA 02C7 AF XRAA
02C8 D320 OUT 20H Giving
0251 00 NOP space in display
0252 00 NOP 02CA 13 INX D
0253 00 NOP 02CB 3EC8 MVI A,C8H
02CD 12 STAX D Store
0254 00 NOP the apace data in the
0255 00 NOP RAM
0256 00 NOP 02CE C31B02 JMP021BH Repeat
the process
0257 79 MOVA.C 02D1 76 HLT Halt
Constructing morse code
data
Construction
PCB designed particularly for this
circuit (as given in Fig. 2, with compo-
nent layout shown in Fig. 3) is needed
for making this circuit. IC bases are
preferred for fixing the ICs. For con-
tinuous operation, provide a heat
sink for the regulator IC. Since this is
based on time comparison, it is neces-
sary to use the correct frequency crystal
(6.144 MHz).
Fig. 3: Component layout for the PCB
Readers’ comments: Going through the software, we found an anomalies in the software.
Q1. In the software part of this project error at the address 003CH, after which Sidharth M. Modi
some steps are missing, due to which the processor doesn’t jump to the transmit Mumbai
the processor is not functioning properly. mode and hangs up. Please correct the Q2. The project ‘Morse Processor’ pub-
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T
he easy-to-construct access control If any one or more of the six consecu- IC4). Each CD4508 contains two complete-
(code lock) circuit presented here tive keyboard-entered digits do not con- ly independent 4-bit data latches having a
incorporates the following unique form to the predetermined code, an alarm common power supply. The 6-digit code is
features: generator sounds the alarm to indicate stored in these latches.
(a) Many people can use the same sys- wrong code. If the result of final compari- The 4-bit data bus originating from
tem with their own unique 6-digit code. son of all the six digits is correct, a mono the output of IC1 is connected to data
(b) A single-digit system code has been multivibrator, serving as lock driver for
Parts List
included, which is common to all users of opening/closing a lock, gets activated for
the system. It can be easily changed with a fixed preset duration. Semiconductors:
IC1 - 74C922 16-key encoder
the help of DIP switches. The detailed description of individual IC2-IC4 - CD4508 dual 4-bit latch
units, as shown in Fig. 2, is as follows: IC5 - CD4017 decade counter
Keyboard and keyboard encoder. IC6 - 27C32 EPROM
Description The keyboard consists of 16 push-to-on IC7-IC9 - CD4063 4-bit magnitude
comparator
The block diagram of the system shown type keys in a 4x4 matrix format. It can be IC10 - CD4528 dual retriggerable
in Fig. 1 provides an overall view of its made using data switches or one can use monostable
composition and working. A 16-digit key- membrane-type keyboard at some extra IC11 - NE555 timer
pad is used for sequentially entering six cost. The keys should be numbered in Hex IC12 - CD4069 Hex inverter
Hex numbers, which are decoded by the as shown in the figure. T1-T4 - BC547 npn transistor
T5 - SL100 npn transistor
keyboard encoder into their equivalent The encoder is built around 74C922 T6 - 2P4M SCR
binary numbers and stored in separate (IC1), which is a 16-key keyboard encoder. D1, D2, D4 - 1N4148 switching diode
data latches in binary form. It generates a 4-bit binary number corre- D3 - 1N4007 rectifier diode
The first three Hex numbers are used sponding to the key pressed; for example, LED1-LED3 - Red LED
LED4 - Green LED
as an address for an EPROM, which shorting pin 1 (R1) with pin 11 (C1) gener-
stores a predetermined code at prefixed ates the binary equivalent of digit ‘0’. Resistors (¼-watt ±5% carbon, unless stated
otherwise)
addresses allocated to separate users or Whenever a key is pressed, the signal R1, R3, R4,
used for separate purposes. The code data generated by this encoder IC is available R15, - 10-kilo-ohm
output from EPROM (one byte/two nibbles) as logic ‘high’ output at pin 12 and is used R2, R5, R8,
at a specified address is compared with to activate a piezo-buzzer (PZ1) via tran- R21, R22 - 4.7-kilo-ohm
R6 - 18-kilo-ohm
the next two keyboard entries in two 4-bit sistor T1 (BC547). The continuous tone of R7 - 10-mega-ohm
comparators that are cascaded together. PZ1 indicates that a key is pressed. The R9 - 2.2-mega-ohm
The resultant outputs of these two key-pressed signal is also used to store R10, R11,
comparators are connected to the next data in the latches. R17-R20 - 1-kilo-ohm
comparator stage, in which the last The output from pin 12 is connected to R12-R14 - 470-ohm
R16 - 47-kilo-ohm
keyboard digit (i.e. sixth Hex digit) is pin 13 of IC5 (CD4017 counter) for clock- R23 - 47-ohm
compared with the system code selected ing at its trailing edge. On each clocking, Capacitors:
by DIP switch. counter IC5 advances by one count and C1, C7, C8,
thereby stores C12 - 0.1µF ceramic disc
data in separate C2 - 2.2µF, 25V electrolytic
C3, C5, C6,
data latches one
C9, C10 - 22µF, 25V electrolytic
after the other. C4, C13 - 47µF, 25V electrolytic
IC1 also holds C11 - 470µF, 25V electrolytic
the last number Miscellaneous:
at its output S1 - Push-to-on switch
pins. S2 - Push-to-off switch
- 4x4 keyboard matrix
Data latch-
PZ1 - Continuous tone-type piezo-
es. There are buzzer
six data latches RL1 - 9V, 200-ohm, 1 C/O relay
formed from S3 - 4-way DIP switch
three CD4508 - Regulated 5V power supply
etc
Fig. 1: Block diagram of the access-control system ICs (IC2 through
43
ELECTRONICS PROJECTS Vol. 22
Fig. 2: Schematic diagram of access-control system
(IC6). Out of the six Hex digits, first five
digits are used as personalised code, and
out of these five digits, the first three are
used to form an address for EPROM.
The leftmost digit of the code is the
MSD (most significant digit) and the third
digit from left is the LSD (least signifi-
cant digit) of the 12-bit wide address for
IC6. The fourth and fifth digits from left
are to be the same as the data stored in
IC6 (beforehand) at that particular ad-
dress. Thus, when a code is entered via
the keyboard, the fourth and fifth digits
are compared with the data stored at the
address formed by the first three digits.
(The EPROM can be programmed with
the help of ‘Manual EPROM Programmer’,
and may be replaced by an EEPROM for
better reliability.)
Code comparator. There are three
4-bit comparators (IC7 through IC9)
used in the circuit, which are cascaded
together to form a 12-bit comparator.
Comparators IC7 and IC8 compare the
8-bit data output of EPROM with the cor-
responding fourth and fifth digits entered
via the keyboard and stored in latches
IC3B and IC4A.
While IC7 compares the upper 4-bit
output of IC6 with the contents of IC3B
(i.e. the fourth digit from left), IC8 com-
pares the lower 4-bit output of IC6 with
the contents of IC4A (i.e. the fifth digit
from left). Similarly, IC9 compares the
last digit (i.e. the contents of IC4B) with
the code entered/formed by 4-way DIP
switch S3 (marked A through D), which is
referred to here as the system code. This
system code digit can be changed from
time to time.
The result of the comparison by the
three comparators is finally available from
Fig. 3: Actual-size, single-sided PCB layout for access-control system IC9. If the entered code matches with the
stored data, pin 6 of IC9 goes high, indi-
input pins of all the six latches in parallel. to be stored and available at the output cating a correct code. Otherwise, either of
For example, pin 17 (QA) of IC1 is con- of IC2A. pins 5 and 7 goes high depending upon the
nected to the corresponding pins 4 and 16 Similarly, when the second key is magnitude of the data. Pins 5 and 7 are
of all the latches as the LSB of 4-bit binary pressed, new data is stored in IC2B with- connected together via diodes D1 and D2
output from IC1. Initially, pin 3 of IC5 out affecting the previously stored data in and used as the trigger for alarm circuit.
provides a high output to ‘clear’ and ‘store’ IC2A. The outputs from first three data The outputs from IC9 are available only
pins 1 and 2 of IC2A, thereby clearing its latches are connected to address pins of after entering the last digit.
4-bit register. EPROM 27C32 (IC6). The outputs from Alarm generator. The alarm gen-
When a key is pressed, the equivalent fourth and fifth data latches are connected erator is built around a 555 timer (IC11).
binary code is present at data input pins to two 4-bit magnitude comparators IC7 The logic ‘high’ output from pin 5 or pin 7
of all the latches. On releasing the key, and IC8 (CD4063), and the output from of IC9 triggers the SCR and applies Vcc
pin 12 of IC1 changes its state from ‘high’ sixth data latch is connected to a similar supply to IC 555 to make it oscillate. The
to ‘low’, thereby generating the required 4-bit magnitude comparator IC9 for fur- output from pin 3 of IC11 is used to drive
clock pulse for IC5. This clocking makes ther processing. transistor T2 (BC547) to generate a long-
pins 3 and 2 of IC5 low and high, respec- The memory. All 8-bit codes, except duration alarm tone from PZ1.
tively, causing the binary data correspond- the 4-bit system code, are stored at differ- A common buzzer is used for key-press
ing to the first Hex digit keyboard entry ent locations (addresses) in the EPROM audio indicator and alarm generator to
Construction
Data input/output pins are to be con-
nected with utmost care because im-
proper connection will force the system
to work unpredictably. Also, care should
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be taken while using IC1, as it is quite
costly. The points marked Vcc should be
connected to the power supply directly.
The system can be built on a general-
purpose PCB or a veroboard. A single-
sided PCB layout for the circuit is, how-
ever, shown in Fig. 3, with its component
layout shown in Fig. 4.
Operation
Initially, when IC1 is disabled by IC10,
no code can be entered. To activate the
keyboard, press switch S1 momentar-
ily. This will activate the keyboard for
a predetermined time. The code should
be entered within this time. Using the
4-way DIP switch S3, the system code
can be changed at any time for extra
security.
If wrong code is entered, the buzzer
sounds alarm and the red LED starts
Fig. 4: Component layout for the PCB flashing. In this case, you can reset the
circuit by a momentary depression of
switch S2. It is to be noted that no dis-
keep the cost low. The output from pin 3 MMV and lock driver. When a valid play unit is used, to keep the code secret.
of timer also drives LED2, which flashes code is entered, pin 6 of IC9 becomes high But if you still prefer to have one, the
at the output frequency of the astable and triggers monostable multivibrator same could be included.
oscillator. CD4528 (IC10) via transistor T3. On trig- ❏
Readers’ comments: Praveen Shanker, Haridwar Now assume data stored is B5 (Hex), i.e.
Q1. The construction project is very inter- A1. EFY: Though programming of 1110 0101 at the above mentioned ad-
esting and useful. However, how memory EPROM is well explained by the author, dresses. Let the system code be E (Hex),
dump is to be programmed in EPROM here is an example of coding. Let us say i.e. 1010. For getting this system code
IC6 is not given. Though different people address of the EPROM where a specific close DIP switches B, C, D, and leave A
would like to program different codes, at code is stored is 41A (Hex). It is equiv- open (in S3).Thus access code=41A B5E
least one example should have been given atent to 0100 0001 1010, which is used as (Hex) or MSB.......................LSB 0100
to illustrate this. address All through AO of the EPROM. 0001 1010 1011 0101 1110 (Binary).
The pulse-width of monostable should the call has not been answered yet (local a pre-programmed number of rings).
be slightly greater than 0.6 second to telephone handset still on cradle), the MT8870 (IC4) generates an StD pulse
ensure that the pulse does not terminate counter (IC2) is frozen and ‘D’ flip-flop whenever fresh data is latched onto its
during the 0.2-second pause between a (IC3A) is set. This activates relay RL1 outputs. This signal is used as a ‘data
pair of ring signals of 0.4-second duration. that places a 220-ohm load across the valid’ gate wherever appropriate. Also,
Thus the monostable produces one pulse lines to simulate handset off-cradle con- when a key is pressed, an ESt (Early
for each ring (in fact, a pair), which clocks dition and also enables MT8870 (IC4) steering) pulse is generated at its pin 16,
CD4017 counter. by applying a ‘low’ at its inhibit (active which lasts till the key is pressed. This
IC2 will freeze after counting a high) pin 5. This causes the ring signal, ESt pulse is used for clocking IC12B in
pre-programmed number of rings. This in turn, to be taken off the telephone the authentication and control unit and
number is determined by its output pin lines (by telephone exchange) and es- retriggering monostable multivibrator
which is tied to its pin 13. In Fig. 2 pin tablish a connection (analogous to the 74123 (IC5), extending the duration of
9 (O8 output) is shorted to pin 13. Thus maturity of a call). The circuit is now Reset pulse. This ensures that the circuit
count of IC2 is frozen at the beginning of ready to receive signals from the remote- will operate as long as the user presses
the eighth ring. end telephone. keys within preset time intervals, or else
The first pulse from IC1 also triggers In case the call is answered from the a time-out is decreed and the device is
the first stage of monostable multivibra- local telephone before the preset count of reset.
tor 74123 (IC5), which causes the Reset IC2 is reached, the ring ceases as the local The resetting process includes hang-
output to go high. As a result, CD4017 telephone is in off-hook condition. Since up (HUP) state, clearing the authenti-
(IC2) is enabled (which was otherwise there is no other way of re-triggering IC5, cation circuit status, and consequently
reset, when no ring signal was present). a time-out eventually occurs and the de- deactivating the main switching circuit,
Also, the authentication circuit is ena- vice reinitialises all units automatically. thus restoring the device to its initial
bled to receive BCD data and control sig- The device is also protected against acti- state. (The flip-flops, which control de-
nals, as and when generated by MT8870 vation by dialing from a parallel phone vices in the main device selection and
(IC4). instrument, since the ring signal is neces- switching unit, are allowed to retain
If the preset count is reached and sary to power up the ASIC MT8870 (after their states.)
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of the comparator is latched into ‘D’ flip- the output of inverter gate IC11F goes
flop (IC9A). Initially, both flip-flops (IC9A low. This enables IC13 (CD4017) again
and 9B) are set, as explained earlier. So by taking its MR pin low. At the same
the ‘CLK’ input of the second flip-flop time, the high ‘Preset’ signal at both the
Fig. 5: Method of programming code using (IC9B) is low. flip-flops (IC9A and IC9B) keeps them
DIP switches enabled.
If at any instant, a low is latched into
the first flip-flop IC9A (as a result of a When the code is not entered within
a result, this circuit is in its initialised failed match between the preset code and preset period, the Reset signal goes low
state, wherein IC13 (CD4017) is reset and the code entered via the remote telephone on expiry of the time-out period, the
ICs 9A and 9B (7474) are set (i.e. their Q set), the second flip-flop (IC9B) is clocked, circuit again goes back to its initial state
outputs are high and Q outputs are low). and it latches a low at its Q output. This by taking the preset pin on the flip-flops
Also, IC12A has its CLR pin low and it resets decade counter IC13 via inverter (IC9A and 9B) low and MR pin of CD4017
is in reset state with its Q pin low. As IC11F. The Q2 output of IC9B is nor- (IC13) high. Simultaneously, IC12A is
stated earlier, the Auth signal is initially mally low. But when a wrong password is cleared (its Q output goes low). As a
high. entered, this output goes high. As a result, result, Auth output goes high and the
The password consisting of four 4-bit transistor T2 (2N2222) of the interface main device selection and switching
words is applied at the input pins D0-0 and control unit, grounds the power-on- circuit is initialised and deactivated.
through D0-3 to D3-0 through D3-3 of reset capacitor C10, as stated earlier. Since the initialised state is maintained
74LS244 ICs 15 and 14 respectively as Thus the unauthorized call is terminated as long as the Reset signal is low, any
shown in Fig. 3. These words may be when the CLR signal (from the output of possibility of noise triggering is elimi-
programmed using thumbwheel switches IC6A) is activated. As a result, IC2 and nated.
or arrays of DIP switches with pull-down IC3A are reset (asynchronously) and the Main device selection and switch-
resistors as shown in Fig. 5. off cradle simulation circuit is deactivated. ing unit (Fig. 6). This circuit receives
As soon as the device establishes Also since the Reset signal is low, all other StD control signal after a successful au-
a call (i.e. relay RL1 energises after a units are initialised. This feature ensures thentication of the four-digit code by the
preprogrammed number of rings), the that a denial-of-service attack (wherein authentication unit. The AUTH and its
authentication unit (and not the main unauthorised agents engage the system inverse AUTH signals available on code
device selection and control unit) is ac- and thus prevent authorised users from authentication are used in this circuit for
tivated due to a high Reset pulse that is using it) is discouraged. enabling various chips such as IC23 and
generated as soon as the ring arrives and However, if correct codes are entered, IC24 (74LS195), IC25 (CD4017), IC27
also on every pressing of a key due to (ESt) each time when a StD pulse arrives, it through IC29 (74LS154), and StD gate
signal from IC4 via OR gate (IC7A), which clocks CD4017 (IC13) counter so that IC19C (7408).
triggers IC5. the next word is applied at the input of A combinational logic circuit, compris-
Now the caller is expected to enter the comparator. The result of the current ing three 3-input NOR gates inside 7427
the 4-digit password sequence from the comparison (high) is latched into the first (IC16) and two inverter gates (IC17B and
remote telephone set in DTMF mode. ‘D’ flip-flop (IC9A). 17C) of 7404, has been used to discrimi-
Initially, only the first word (nibble) of When the user presses all four keys nate between an address (numeric digit)
the array of tri-state buffer drivers (ICs in the correct sequence, the first flip-flop and a switching signal (‘*’ for ‘on’ and ‘#’
74LS244) is enabled by O0 output of IC13 always latches a high and the second for ‘off’). DTMF digit switches 1 through 9
(CD4017). As a result, the first 4-bit flip-flop is never clocked. At the end of and 0 (0 on the telephone keypad stands
programmed word is applied to the ‘P’ the sequence, when the last digit is com- for decimal 10 and the decoded output
51
ELECTRONICS PROJECTS Vol. 22
Fig. 6: Main device selection and switching unit
as the control signal for a corresponding
tri-state gate of 74LS125 (IC20).
We have shown only four gates, out
of possible 100, in this circuit. The output
pins of tri-state gates are connected to
the clock inputs of the corresponding ‘D’
flip-flops (only four out of possible 100 are
shown). The clock pins of IC21 and IC22
have been pulled high to avoid any noise
triggering when tri-state buffers are in
high-impedance state.
Switching the selected device.
Only one device corresponding to
the digit in the registers—IC24 for
group address and IC23 for device
address—is enabled to be affected by
the signal (‘*’ or ‘#’) as the seventh (or
the third after authentication) code.
On pressing DTMF keypad switch ‘*’
or ‘#’, the selected device is switched
on or switched off depending on the
key pressed. D0 bit of the decoded
switching signals ‘*’ and ‘#’ is applied
to data pins of all 7474 flip-flops in
parallel. Only the data corresponding
to the selected device gets clocked via
the corresponding tri-state gate of
74LS125.
The Q2 output of IC25 is still high
when SCLK is generated and, as a result,
AND gate IC18D is enabled to allow ap-
plication of SCLK to all 74LS125 gates
Fig. 7: Actual-size, single-sided PCB for the circuits in Figs 2 and 3 on depression of either ‘*’ or ‘#’ on the
remote keypad. Switching takes place at
the trailing edge of SCLK pulse, while the
trailing edge of SCLK pulse causes reset-
ting of IC25, thereby creating conditions
that were unavailable just before the pre-
vious group selection. Subsequently, you
can select any other (or the same) group
and any other (or the same) device. You
can switch on or off the selected device by
following the same procedure.
Switching on or off refers to Q output
of the corresponding ‘D’ flip-flop (7474)
going high or low, respectively. You may
suitably use the flip-flop outputs to ener-
gise a relay or fire a triac or control the
corresponding device/devices.
If you press any number key (1
through 9 or 0) instead of ‘*’ or ‘#’ key
on the DTMF keypad, IC25 will receive
a clock pulse via AND gates IC18B and
IC18C, and the ‘high’ state will shift from
Q2 to Q3 (pin 7 of IC25). Since Q3 output
is coupled to the base of transistor T2 via
diode D4, it will result into a system reset.
A system reset implies that you have to
redial the local telephone number from
remote telephone. When relay RL1 again
Fig. 8: Actual-size, single-sided PCB for the circuit in Fig. 6 energises, redial the four-digit authentica-
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• If the handset is not lifted before
the programmed number of rings, wait
for simulated off-hook status of the local
telephone handset (indicating energisation
of relay RL1).
• Now dial the four digits of the
preset authentication code in a proper
sequence from the remote keypad within
the preset duration. A system reset
will occur in case the 4-digit code is not
dialed within the preset duration or
the code used is wrong, which causes
Fig. 9: Component layout for PCB-1 de-energisation of the relay and creates
conditions similar to on-hook state of
the local telephone handset. So you will
have to repeat all steps from the begin-
ning.
• If the 4-digit authentication code
matches the preset code, you can dial the
next two digits identifying the group and
the device within that group selected for
the purpose of switching on or off (or even
as a dummy operation for the purpose of
forcing a system reset).
• Dialing ‘*’ from the remote tel-
ephone keypad will result into switching
on of the selected device, while dialing
‘#’ will result into switching off of the
selected device. (Dialing any number, 1
through 9 or 0, causes a system reset.
Relay RL1 will be de-energised, and you
will have to restart from the initial step.)
You can proceed with the same procedure
to switch on/off the next selected device.
The procedure can be repeated for any
number of devices (one-at-a-time) with-
out affecting the status of non-selected
devices.
Testing. It is recommended that the
circuit be built in stages, verifying proper
Fig. 10: Component layout for PCB-2 operation at each stage. The main switch-
Readers’ comments: EFY: 1. The interface and control section. number in the selected group are not
We have the following queries regarding Only one of the ten outputs of IC2 decade connected in parallel and only their
the project: counter needs to be connected to its pin address (input) pins are connected in
1. The interface and control section. In 13 [and pin 3 of IC3(A)] to freeze IC2 parallel, which are controlled by device-
IC2 (CD4017), where would be pins 3, 2, and create a condition simulating lifting select outputs from IC23. However, the
4, 7, 10, 1, 5, 9, 6, 11, and 12 connected? of handset after waiting for a few rings. selection of a group is dependent on IC29,
Also show the connections of available pin This is well explained in the article. The which, in turn, is controlled by group-
11 (RST) in IC5 (74123). maximum number of rings can be nine, to select IC24.
2. The authentication section. Show avoid false ring condition on the line. Output connections Y1 and Y10 from
the connections of pins 1, 5, 6, 9, 10, 11, RST and Reset outputs are not going IC27 pertain to device Nos. 1 and 10,
and 12 in IC13 (CD4017). to part II and have been used via IC6(A) respectively, of group 1, while connec-
3. The selection and switching unit. in part I itself. The flags just indicate the tions Y1 and Y10 from IC28 pertain to
(a) Pins 2 to 11 (Y1 to Y10) of IC27 label of these signals. device Nos. 1 and 10, respectively, of
(74LS154) and IC28 (74LS154) are 2. The authentication section. The group 10. Each device is controlled via
connected in parallel. Pins 2 and 11 of mentioned output pins of IC13, excluding 74LS125 gate in conjunction with one
IC27 are connected to pins 1 and 4 of pin 10, are not used/connected. Pin 10 is flip-flop from 7474 IC. In the circuit only
IC20 (74LS125), respectively, and pins Q3 and is used as clock for IC12(A). two groups (1 and 10), with two devices
2 and 11 of IC28 are connected to pins 3. The selection and switching unit. (1 and 10) from each group, have been
10 and 13 of IC20 (74LS125), respec- (a) The first four digits dialled from the shown instead of all the ten groups and
tively. Pins 2 to 11 (Y1 to Y10) of IC29 remote telephone keypad are used for a hundred (ten per group) devices. You
(74LS154) are connected to the normal tel- matching the authentication code. After should be able to correlate as to which
ephone keypad. Are all these connections authentication, the fifth digit selects the 74LS125 (IC20) gate and 7474 section
correct? group. If the fifth digit is ‘1’ then IC27 (IC21 and IC22 pair) select which device
(b) After entering IC16 (7427), four (group 1) will be selected, and if the fifth out of which group.
data lines D0 through D3 go to IC23 digit is ‘0’ (code 1010 or ten decimal) then (b) Data lines D0 through D3 are com-
(74LS195) and thereafter IC24 (74LS195) IC28 (group 10) will be selected. The sixth ing from IC4 and go into pins labelled D0
and then go out as shown in the PCB dialled digit selects the device inside the through D3 of IC8, IC16, IC17, IC23, and
layout. Please explain which data goes in selected group. The seventh dialled digit IC24, respectively. They are thus related
IC16 and where does it output in IC24. Are (‘*’ for ‘on’ or ‘#’ for ‘off’) of the selected to PCB1.
these connections related to PCB1? device or ‘0 through 9’ for circuit reset can The Auth signal is correctly con-
Ranjit Singh be used as desired. nected to IC27, IC28, and IC29 in Fig. 7
Amravati The output pins reflecting the device and there is no ambiguity.
A
number of melody generator cir- key to another is very short, the required half notes. So each octave has twelve
cuits based on chips like UM3481, notes can be played properly and hence notes. On a piano keyboard, black keys
UM3482, UM34815A, UM66, etc the tune can be heard. The notes can also in between white keys produce the av-
have appeared in EFY. All these UMC have breaks in between. This feature can erage frequency of adjacent keys. For
chips contain preprogrammed masked be explained by considering five notes example, ‘Sa’ has a frequency of 595
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ROM and are not field-programmable as written in the following two ways: Hz and ‘Re’ has a frequency of 668 Hz.
such. 1. Sa Re Ga Ma Pa When a black key in between them is
Here is the detailed design of a typical 2. Sa---Re Ga---Ma Pa pressed, a frequency of 631.5 Hz is pro-
melody generator circuit using different In the first case the notes are continu- duced. These black keys are called half-
types of memories, including EPROM, ous. In the second case there are breaks note keys.”
RAM, and ROM (hard-wired). (no sound), indicated by ‘—’ for a stipulat- Here we have selected a total of 28
As soon as the power is switched on ed amount of time, in between Sa and Re notes, including all notes from the middle
to UMXX series melody generators, a as well as Ga and Ma. Each of the circuits octave, eleven notes from upper octave,
tune is heard, which stops after a while. explained in this project incorporates the and a few from the lower octave. All the
When a switch on the melody generator is break (no sound) feature. 28 notes with their respective frequencies
pressed, the second tune is heard. If the You should make sure that you have are given in Table I.
chip is capable of producing twelve tunes, access to a musician before attempting
each successive depression of the switch any of the circuits. In addition, you would Software and testing
results in a new tune being played. After need a computer and a frequency meter
the twelfth tune has been played, the next or a digital multimeter. The computer is of notes
depression of the switch causes the first required to test the tunes, i.e. to make Before moving to the software program,
tune to repeat, and so on. The circuit pre- sure that the given notes match the tune let us see how the notes for a tune can
sented here can be programmed exactly of a given song. be obtained. Give your musician the
the same way. A brief on music from the software song for which you need notes. Write those
article ‘Generation of Indian Classical notes in terms of Sa Re Ga etc, making
Music on a Microprocessor’ by Prof. V.V. sure that all the notes of the tune lie with-
Basics of music Athani, published in April ’94 issue of in the range of the 28 notes given in Table
Generally, an electronic organ or piano EFY, is as follows: I. No sound in between the notes, includ-
is played with both hands. Now imagine “Taking into account only one elec- ing its duration, as also the duration of
playing a 32-key organ with a single tronic organ (piano), the number of notes each particular note, should be taken into
finger. In that case, only one key can in music are only seven—Sa Re Ga Ma account. For example, if in a tune the time
be pressed at a time and hence only one Pa Dha Ni. But these basic notes are period of a note SA is 500 ms and that of
note can be heard. Considering that the divided into three octaves (refer Fig. 4), Re 1500 ms, the two notes can be written
time taken by the finger to move from one where each octave also has notes called as Sa Re Re Re. Similarly, no sound in
between can be written
as Sa Re-Re-Sa.
The notes so ob-
tained have to be con-
verted into data char-
acters. This can be done
directly by using Table I;
for example, Sa-Re Re
Ga---Ma can be written
as C-E E G---H.
Execute the program
Fig. 1: Block diagram of EPROM-/RAM-based melody generator
EPROM-/RAM-
based melody
generator
Since most parts of the
circuits for EPROM- and
RAM-based melody gen-
erators are similar, the
main circuits for both
versions have been inte-
grated in Fig. 2. Relevant
changes have been de-
Fig. 2: Main circuit of EPROM-/RAM-based melody generator
scribed appropriately.
The common block
diagram for EPROM-
and RAM-based melody
generators is shown in
Fig. 1. A low-frequency
oscillator followed by a
binary counter is used to
generate the addresses for
EPROM/RAM.
In the case of EPROM,
the preprogrammed data
output is directly coupled
to two 1-of-16 decoders
(one for upper nibble and
the other for lower nibble
of data).
However, in RAM
based-circuit, a keyboard
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to the address pins of and other components of this circuit has
1-of-16 decoder IC4 been done for convenience.)
(CD4514) and those of IC101 is wired with presets to form
the higher nibble (D4 an oscillator. At any time, only one of
Fig. 4: Piano keyboard through D7) to the ad- diodes D101 to D128, depending on the
dress pins of another 1-of-16 decoder IC5 current note selected via EPROM’s ad-
is deployed at the time of writing the (CD4514). dressed location, will be forward biased
data at specified locations (addresses) The ‘Hex value’ column in Table I and its corresponding preset will form
into the RAM. Thereafter the keyboard indicates that either the lower nibble part of the oscillator circuit. Each preset
is detached and data output pins are or the upper nibble, or both nibbles, of is adjusted to a value (refer Table I) to
connected to two 1-of-16 decoders, as in
stored hex data in memory will always obtain the frequency corresponding to
EPROM-based circuit. Only 28 outputs
(out of 32 outputs) of the two decoders, be zero. It means that at least one of the the selected note.
with each representing a unique note, are No sound (00 hex). Breaks are
used in conjunction with individual pre-
sets to control the oscillator’s frequency
and thus the resulting sound from the
loudspeaker
EPROM-based circuit
In Fig. 2, NE555 timer (IC1) is wired in
astable mode, which provides clock pulses
for the 12-stage binary counter CD4040
(IC2). In the EPROM ver-
sion, jumper J1 is used to
permanently short pin 3
of IC1 and pin 10 of IC2,
while there is no need
to operate push-to-on
switches S2 and S3 and
you can leave them open
(i.e. in off state).
An 8-bit, 4k EPROM
2732 is used for IC3.
Since its pin 21 is address
A11, switch S6 is to be
kept in position ‘a’ to con-
nect it to O11 output of
Fig. 5: Flow IC2. When clock pulses
chart of door- are fed to IC2, it starts
bell counting up from its reset Fig. 6: Actual-size single-sided PCB-1 layout for circuit of Fig. 2
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second tune at their inputs to pro-
(tune-2). duce the corresponding notes.
Thus each Power supply. The circuit shown in
tune is made Fig. 11 is used to obtain the regulated 5V
to end with DC using IC 7805.
10 hex code The actual-size, single-sided PCB
for stop sig- layouts for the circuits of Figs 2 and 3
nal. When (common for EPROM and RAM versions
all tunes of of the melody generator) are shown in
the doorbell Figs 6 (PCB-1) and 7 (PCB-2), respec-
are exhaust- tively. The component layouts for PCBs of
ed, the last Figs 6 and 7 are shown in Figs 8 and 9, re-
Fig. 9: Component layout for PCB-2
stop-clock data is followed by a reset data spectively. The power supply circuit (Fig.
(01 hex), so that one goes to the start of 11) has also been integrated in PCB-2.
the data output of EPROM corresponds tune-1 (on reset), and the cycle repeats. This circuit can be used as a door-
to 10 (hex), Q1 output of IC5 goes high, For instance, the hexadecimal value bell, or even as a car-reverse horn. The
which after inversion of ‘SA’ is 70H (refer Table I) or binary flow chart for car-reverse horn is shown
by NAND gate N1 is ap- 0111 0000, which means that binary in Fig. 12. The necessary connections
plied to pin 4 of IC1 via data at the input of IC4 and IC5 is 0000 are shown in Fig. 13. When the circuit
normally-closed contacts and 0111, respectively. As a result, only is used as a car-reverse horn, data flows
of push-to-off switch S1. Q7 output of IC5 goes high. This output from the next address location to where
As a result, IC1 stops os- brings the associated preset resistor it stopped earlier.
cillating and producing tuned to the frequency of SA (595 Hz)
clock pulses. The active into the oscillator circuit. Simultaneously,
‘high’ Q1 output of IC5 data 0000 at the input pins of IC4 causes Preset adjustment
is therefore referred to its Q0 pin to go high. But since Q0 is left Connections to join the two PCBs should
as stop-clock signal in be made only after the adjustment of pre-
this circuit. Pushing sets on PCB-2 using any of the following
switch S1 at this stage three procedures:
removes logic ‘high’ in- Using frequency
put from NAND gate N1 meter. Assemble all the
and the clock oscillator components of PCB-2.
starts oscillating. Connect a probe to the
The flow chart for Vcc using a crocodile
a doorbell given in Fig. clip at the other end.
5 shows the order in Switch on the 5V power
which the data is en- supply and connect the
tered/read. First, the output from the tone
data pertaining to the Fig. 10: Flow oscillator on the PCB
first tune is stored. Once chart for re- to the frequency me-
all the notes (including adjustment Fig. 11: Power supply ter. Now connect the
probe to the anode
ELECTRONICS PROJECTS Vol. 22 59
choose the main notes in the mid- adjusting the
dle octave. Connect the probe to the variable resis-
respective diode of SA and tell the tors to lower
musician to adjust the variable resistor values in the
to the frequency of SA. Now connect table may be
the probe to the respective diode of RE very tedious.
and adjust the variable resistor to the Any method
frequency of RE, and so on. After ad- may be used to
Fig. 13: Wiring connections for car-reverse horn justing main notes, adjust half notes. adjust all the
(In Table I, music notes shown in small variable resis-
of diode D101 and adjust preset resis- letters are half notes.) This method will tors. But after
tor VR101 for 446 Hz (refer Table I). be successful only if the musician is well playing a tune,
In this way all the variable resistors trained in music. it may be felt
are adjusted one by one by connecting Using digital multimeter. First, that the tune
+5V from the probe to the corresponding assemble only preset resistors VR101 doesn’t sound
diodes. through VR128. Now adjust the variable proper, even if
With the help of a musician. You resistors to their respective values (shown it sounded right
can seek the help of a musician if you in column 6 of Table I) using a digital with computer.
don’t have access to a frequency meter or multimeter. Use the variable resistors The reason can Fig. 14: LED indicator
a digital multimeter. Connect the output with maximum value as given in column be that the re- circuit
from the tone oscillator to the speaker 7 of Table I. You can also use the values sistors were not
and switch on the power supply. First, shown in the circuit diagram of Fig. 3, but properly tuned or it may be due to
minute imperfections in output voltages
from IC4 and IC5. These imperfections
Table I
can be overcome by readjusting the resis-
Music Frequency Data Hex Variable Variable Maximum
note of music character value resistor resistor value of tors by the method given below.
note (preset) in-circuit variable The imperfections can only be ad-
(Hz) number value (ohm) resistor justed when data from the EPROM is
Lower octave heard. But, the notes of a tune will not
Pa❚ 446 1 20 vr101 8274 10k
be in an increasing frequency sequence.
dha❚ 472 2 30 vr102 7740 10k The sequence should be PA , dha , ----- to
❚ ❚
dha❚ 500 3 40 vr103 7230 10k ----- DHA , ni . To do this, include at least
❚ ❚
ni❚ 530 a 50 vr104 6744 10k two sets of sequence data from Table I
NI❚ 561 b 60 vr105 6288 10k with 2-3 bytes of gap in between succes-
Middle octave sive sequences, after all the tunes, as
sa 595 c 70 vr106 5850 10k shown in the flowchart of Fig. 10. This
re 630 d 80 vr107 5445 10k method of readjustment is used only to
re 668 e 90 vr108 5055 10k prevent disconnection of PCB of Fig. 7
ga 707 f a0 vr109 4698 5k from PCB of Fig. 6 and tuning the resis-
ga 749 g b0 vr110 4356 5k tors again and again.
ma 794 h c0 vr111 4029 5k Remove jumpers J1 and J2. Switch
ma 841 i d0 vr112 3726 5k
on the power supply. Press switch S4
pa 891 j e0 vr113 3438 5k
dha 944 k f0 vr114 3165 5k
to provide clock pulses for IC2. Say, if
dha 1000 l 02 vr115 2910 5k the EPROM contains 10 tunes, after the
ni 1062 m 03 vr116 2655 5k tenth tune release S4. Now keep pressing
ni 1120 n 04 vr117 2445 5k S2 momentarily until the first note of the
Upper octave sequence (PA ) sounds. Now connect the
❚
board for programming the RAM in of 6116 is WE (write enable – active low). The inputs of N1 are shorted and connected
RAM-based circuits. Besides, an LED Switch S6 is to be kept in position ‘b’ while to the ground via resistor R7. So the output
panel is used for displaying the selected working with RAM. of N1 becomes high, which keeps IC1 oscil-
RAM address. At the time of writing (programming) lating.
Switch S2 is used to manually provide data into the RAM, there is no connection After a stop-clock (active ‘high’) sig-
clock pulses to IC2. Similarly, switch S3 between connectors K2(F) and K3(M). nal appears at the input of NAND gate
is used to manually reset IC2 before and Also, jumper J1 is removed. To program N1, its output goes low. When switch S1
after programming. Both switches (S2 and the RAM, K4(M) is to be mated with is pressed, the output of N1 goes high
S3) are integrated into Fig. 2. The connec- K2(F). After programming is over, K2(F) and IC1 starts oscillating again. Gates
tor K1 in between IC2 and IC3 is used is connected to K3(M). N2 and N3 are used to provide read and
to connect to K5(M) connecter along IC6 (CD4011) contains four NAND write logic for RAM. In read condition,
with the associated LEDs as shown in gates, of which NAND gate N1 is used for the output of N3 is at logic 0 because its
Fig. 14. EPROM 2732 (IC3) is replaced stop-clock signals. It functions in the same inputs are at logic 1. Pressing of switch
with an 8-bit, 2k SRAM (6116). Pin 21 manner as in an EPROM-based circuit. S5 provides ‘write’ condition, since the
Appendix ‘A’
#include <stdio.h> } case’F’:sound(707); break;
#include <dos.h> } break; case’S’:sound(1498);
#include <stdlib.h> void play(char *str,int d) case’G’:sound(749); break;
#include <conio.h> { break; case’T’:sound(1588);
#include <ctype.h> int i=0; case’H’:sound(794); break;
void play(char *str,int d); while(str[i]!=’\0') break; case’U’:sound(1682);
void main() { case’I’:sound(841); break;
{ switch(str[i]) break; case’V’:sound(1782);
int f,d=200; { case’J’:sound(891); break;
char ch1[180],ch2; case’1':sound(446); break; case’W’:sound(1888);
clrscr(); break; case’K’:sound(944); break;
printf(“\n Enter delay value:”); case’2':sound(472); break; case’X’:sound(2002);
scanf(“%d”,&d); break; case’L’:sound(1000); break;
while(1) case’3':sound(500); break; case’Y’:sound(2122);
{ break; case’M’:sound(1062); break;
printf(“\n enter tune :”); case’A’:sound(530); break; case’-’:nosound();
scanf(“%s”,&ch1); break; case’N’:sound(1120); break;
play(ch1,d); case’B’:sound(561); break; }
a:ch2=getch(); break; case’O’:sound(1190); delay(d);
if (tolower(ch2)==’r’) case’C’:sound(595); break; i++;
{ play(ch1,d); break; case’P’:sound(1260); }
goto a; case’D’:sound(630); break; nosound();
} break; case’Q’:sound(1335); }
if (tolower(ch2)==’e’) case’E’:sound(668); break;
exit(0); break; case’R’:sound(1414);
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hex values.
After entering all the tunes, discon-
nect keyboard from K2(F) and connect
K3(M) to K2(F). Now connect external
jumper J1 as shown in the circuit dia-
gram.
Switch S4 across jumper J1 termi-
nals is not necessary but it may prove
useful if any readjustment of variable
resistors is needed (as in the case of
EPROM), or for checking each and every
tune one by one.
The programming steps are summa-
rised as below:
1. Press switch S3.
2. Touch tab 00 with the probe.
3. Press and release switch S5.
4. Lift the probe. Fig. 18: Actual-size, single-sided PCB layout for the circuit
5. Press S2 to go to the next memory
location.
the circuit of a ROM-based programmable
6. Repeat from step 2 onwards for the
PARTS LIST melody generator is totally a new one.
next hex value programming.
The ROM, as stated earlier, is home-built
Semiconductors: 7. After last data is entered, press
using discrete components, which can be
IC1 - NE555 timer S3.
used for storage of 100 bits (100 notes).
IC2, IC3 - CD4017 decade counter 8. Keep S4 pressed to check all the
IC4, IC5 - CD4069 hex inverters The block diagram of the ROM-based
tunes that have been entered.
T1-T10 - BC547 npn transistor melody generator is shown in Fig. 16.
9. Connect jumper J1 if all tunes are
T11-T110 - BC558 pnp transistor Note that the last block comprising
entered.
variable resistor array is identical to that
Resistors (¼-watt ±5% carbon, unless other- The data table (Table I), writing of
wise stated) used in EPROM/RAM version (refer Fig. 3
musical notes, conversion of notes to hex
R1 - 10-kilo-ohm in Part I of the article). The power-supply
values, preset-array alignment, and flow
R2 - 100-kilo-ohm circuit shown in Fig. 11 can also be used
charts for door-bell and car-reverse tune
R3 - 680-ohm for ROM-based melody generator. Thus
are also applicable for the RAM version.
R4 - 1-mega-ohm PCB and component layouts shown in Figs
R5 - 1-kilo-ohm Now we shall study a programmable
7 and 9 can be used without any modifica-
R6 - 68-ohm melody generator using home-brewed
tion in this system.
ROM.
Capacitors:
There were only a few differences be-
C1 - 2.2µF, 12V electrolytic
C2, C3 - 0.01µ ceramic disc
tween the circuits of RAM- and EPROM- ROM-based circuit
based programmable melody generators
Miscellaneous: The circuit diagram of ROM-based mel-
and as such we could integrate the com-
S1 - Push-to-off switch ody generator is shown in Fig. 17. Here
mon portion of the two circuits into a
timer NE 555 (IC1) is wired as an astable
single schematic/PCB design. However,
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T101 together from the components side. cause the data is no sound) detached from the PCB while installing.
Similarly connect emitters of other rows of T14GAD10 [EFY note. To overcome this problem to
transistors. Suitable pads for the purpose T15SAD6 (Again to D6) some extent, a 28-pin (16+12) SIP con-
have been provided on the PCB. T16PAD13 nector (with pins projecting towards both
Similarly the collectrors of transis- Reset. With this circuit a maximum sides of the PCB) may be used. This will
tors T1 through T10 may be connected of 100 notes are feasible. However if all obviate the need to run loose wires between
together using bare wire from the ROM PCB and variable-resistor array
components side. Now assemble all the notes are not utilised, Reset is necessary
remaining components. after the last utilised note. Because if the oscillator PCB. Wires originating from the
total number of notes is less than 98, for collectors of the transistor array may be
connected to one side of the connector on
Programming example, 86, then after 86th note there are
ROM PCB itself and a ribbon cable with
In this circuit, programming means hard 14 more bits to reach for an automatic reset
wiring. You should have a lot of patience to occur. (The circuit automatically resets 28-pin SIP connector on both sides can be
to do all the hard wiring. No hexadecimal itself after 100th bit.) So there is a big delay used between the two PCBs.]
values are required. Before starting with for the tune to get repeated. To skip the ❏
I
nduction motors widely used in work- • Automatic starting/tripping. Parts List
shops, irrigation pump sets, etc re- • Programmable timer with battery Semiconductors:
quire a 3-phase supply. Normally, backup to count the motor’s run time. IC1-IC3 - MCT2E optocoupler
these motors are connected to 3-phase sup- • Latching circuit to prevent the IC4 - CD4027 J-K flip-flop
ply from electricity boards using thermal motor from frequently starting and trip- IC5, IC6 - NE555 timer
IC7, IC9, IC10 - CD4017 decade counter
bimetal relays and relay contactors. Ther- ping. IC8 - CD4060 14-stage counter
mal relays protect the motor from over- • Easy operation with just two switch- and oscillator
load. Relay coils having hold-on contacts es for time set and reset. IC11 - 7805 5V regulator
with push-to-‘on’ and push-to-‘off’ switches The phase-sequence detector protects D1-D30 - 1N4007 rectifier diode
ZD1, ZD2 - 3.3V zener diode
are used for activating and deactivating the motor before starting, while the LED1-LED4 - Red LED
the relay contacts. current-sensing circuit protects it during Resistors (1/4W ± 5% carbon, unless specified
Single-phasing, line dropout, and running. This double protection makes the otherwise)
reverse phasing are harmful for 3-phase motor operation really safe. R1-R3 - 100-kilo-ohm, 0.5 watt
motors. In the event of line dropout and R4-R6, R16,
single-phasing, the motor draws a heavy R18-R23, R25,
current from the existing phases, and dur- Circuit description R30, R31, R38,
R47, R49 - 4.7-kilo-ohm
ing phase reversal the motor simply rotates The schematic circuit diagram of induction R7, R24 - 27-kilo-ohm
in reverse direction. Further, an operator motor controller is shown in Fig. 1. R8-R10 R17,
(attendant) for switching ‘on’/‘off’ the motor 3-Phase sequence checker. The volt- R26, R29, R32,
R37, R39, R43,
is always not possible, especially when the age from each of the three phases is con- R44, R46, R48,
motor has to be operated round the clock. nected to optocouplers IC1 through IC3 via R51-R53 - 10-kilo-ohm
Also the protection provided by the thermal rectifier diodes D1 through D3. The out- R11, R28, R34 - 1-kilo-ohm
relay in the starter assembly is inadequate, puts from the optocouplers are half-wave R12 - 220-kilo-ohm
R13, R41 - 1-mega-ohm
since it involves some delay in activation. rectified DC pulses with a phase difference R14, R35, R36,
Thus some damage to the windings of the of 120° (during the conduction period of R45, R50 - 470-ohm
motor can take place, especially if overload diodes), which are applied to a positive- R15 - 470-ohm, 0.5 watt
conditions occur frequently. edge-triggered, dual JK flip-flop IC4. R27 - 180-kilo-ohm
R33 - 2.2-kilo-ohm
The circuit presented here incorpo- When the red phase rises, the output R40 - 22-kilo-ohm
rates the following features to overcome of IC1 goes from ‘low’ to ‘high’, resulting R42 - 82-kilo-ohm
all the above-mentioned problems: in clearing of both flip-flops FF1 and FF2 VR1 - 4.7-kilo-ohm preset
• Electronic sensing of phase sequence through 0.1µF capacitor C1. While the red VR2 - 47-kilo-ohm preset
with under-frequency cut-out. phase is still ‘high’, the yellow phase rises, Capacitors:
• Current sensing for single-phasing resulting in the output of IC2 going ‘high’ C1-C3, C6,
C13 - 0.1 ceramic disk
prevention. and providing a clock pulse to FF1. As a C4, C7, C11, C17 - 100µF, 63V electrolytic
• Current sensing for overload result, Q output of FF1 goes ‘low’ (since C5, C14-C16,
cut-out. J1 input of FF1 is already ‘high’ when the C18, C19 - 10µF, 25V electrolytic
clock pulse arrives at CLK1 pin). Now, C8, C10, C12 - 47µF, 25V electrolytic
C9 - 1000µF, 63V electrolytic
Table I when the blue phase rises, the output of
Miscellaneous:
Phase sequence Signal OK LED RL1 IC3 goes ‘high’, while the output of IC2 is
X1-X3 - Current-sensing trans-
Correct On On already ‘high’, resulting in the output Q of formers
Incorrect Off Off FF2 going ‘low’. X4 - 0-230V AC primary to
The above process 12V-0-12V, 500mA sec-
Table II ondary transformer
repeats once dur-
Motor Core Core Primary Secondary S1 - ‘On’/‘off’ switch
ing each 50Hz cy- S2 - SPDT switch
HP size area Max SWG Turns S W G
Turns cle. If Q outputs S3 - 7-way rotary switch
(Max) amps of both FF1 and - 1.5V X4 battery
FF2 are ‘low’, the - Starter assembly
6 17 0.25 10 14 14 38 170 - Cabinet
20 23 0.56 22 11 9 38 110 phase sequence is
correct and both diodes D28 and D29 are As a result, IC5 is triggered and hence retriggerable monoshot. Its time period
in blocking mode. The base of transistor ‘sequence OK’ LED connected to pin 3 of is set at 25 milliseconds (approx.). If the
T1 is pulled towards ground via resistor IC5 via resistor R14, glows. monoshot is not retriggered within 25
R11 and transistor T1 starts conducting. IC5 is a popular 555 timer wired as a milliseconds, the ‘sequence OK’ signal goes
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sequentially after 30/60-minute time
intervals, depending on the selection
made via switch S2. Thus multiples
of 30-/60-minute basic timing can be
selected with the help of 7-way rotary
switch S3. (The 7-way rotary switch may
be substituted with decade thumb-wheel
switch, if desired.)
The output available at the pole of
rotary switch S3 goes ‘high’ after the
selected duration to forward bias tran-
sistor T12, which, in turn, causes de-en-
ergisation of relay RL1. Also, when the
selected run time is over, the oscillator
of IC8 (CD4060) gets inhibited because
oscillator pin 11 of IC8 goes ‘high’ due to
the feedback from the pole of switch S3
via resistor R43 and diode D23. LED1
glows to indicate that run time is over.
To restart the motor, IC8 and IC9 can
be manually reset by closing and then
opening switch S1. The timer may be
Fig. 3: Component layout for the PCB
bypassed by keeping switch S1 closed.
The timer section requires very low
Motor on/off counter and latch. start, pin 7 (Q3) goes ‘high’ and transis- power in standby mode and is powered
Frequent start and stop operations subject tor T13 gets forward biased. As a result, by four 1.5V cells as standby supply. A
the motor to lot of fatigue due to heavy CK pin 14 of IC10 is pulled low to stop battery-low indicator is provided to warn
currents, which may damage the motor. In any further clock to the decade counter, the user about the low battery condition.
this circuit, automatic restarting of motor which thus gets latched and LED3 glows Power supply. The normal DC power
is limited to three attempts for each power to indicate the latched state of the counter. supply for the circuit is provided by a
‘on’, by using another decade counter Simultaneously, this ‘low’ signal causes small step-down transformer X4 connected
CD4017 (IC10). It monitors each ‘on-off’ transistor T2 to cut off and de-energise between R (red) phase and neutral, fol-
cycle of the motor by advancing the count relay RL1. Thus the motor cannot restart lowed by rectifier and filter capacitor. The
of decade counter by one on every start. automatically and only complete resump- unregulated voltage is used for operation
The clock for IC10 is obtained from tion of power can reset the latch. of the relays, while the 5V regulated sup-
the output of IC5 via resistor R15. This Motor on-off timer. A timer is provided to ply is used for the remaining circuit.
point i.e. the junction of resistor R15 and run the motor for a predetermined time. It counts
diode D30 is also used as supply point for run time of the motor and thereafter switches off
transistors T6, T7, T12 and T13 as also the motor automatically. The signal from pin 11 Construction and testing
for reset pin of timer IC6. On the third (Q9) of IC7 is connected to the base of transis- An actual-size, single-sided PCB for the
Readers’ comments: 1. Can I use star-delta starter (which 1. In Table II, the turns ratio of cur-
Q1. Please clarify the following: can reduce the starting current and can rent transformers (CTs) is 12 for both 6HP
1. Which starter in the circuit starts be used for motors up to 25 HP) instead of and 20HP motors. If the ratio is same, the
the motor? the contactor-type starter? If no, suggest a secondary currents of CTs work out to be
2. Is the starter manually operated or proper alternative as the starting current of different, i.e. 1.8A for 20HP motor and
automatically? up to 40A may affect other components. 0.8A for 6HP motor.
Ramaswamy Iyer 2. Are there any current-reducing 2. In the phase-sequence indicator cir-
Through e-mail circuits used to withstand the high start- cuit, you have connected an RC (1-mega-
Q2. When a 3-phase motor is started, it ing current while using the contactor-type ohm-0.1µF) combination to the reset pin of
takes six times the rated current. So the assembly? IC5 (NE555). In such a case, can the reset
current sense circuit will trip the motor 3. At the time of testing, what HP mo- pin get a high input.
during start-up. If we adjust the overload tor was used with contactor-type starter Abhijeet S. Bhosle
current setting for starting current, this assembly? Through e-mail
will not trip the motor during normal 4. The 12V, 300-ohm, 1 C/O relays (RL1 EFY: A1. 1. The starter comprises a con-
running current through the load. Is and RL2) specified in the circuit are not tactor, an ‘on’ button (N/O), and an ‘off’
there any initial bypass provided for over- available. The available relays are 12V, button (N/C). The contactor in Fig. 1 of
current trip? 200-ohm, 1 C/O and 12V, 150-ohm, 1 C/O. the project uses three main N/O contacts
G. Saravana Mohan So which relay should I use? What is the connected to R, Y, and B phases and one
Salem purpose of using VR2? auxiliary N/O contact, which is wired
Q3. The contactor-type starter can be used Ramaswamy Iyer as shown in Fig. 1. The contactor coil is
for starting motors up to 10 HP. As I need Through e-mail rated at 415V AC. At EFY, we used ML1
to control motors of 15 to 20 HP, please Q4. I am facing the following problems in contactor from L&T to make the starter
clarify the following: the project: assembly.
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T
elephone remote control implies operation is as
control of devices at a remote follows:
location via a circuit interfaced to 1. From the
the remote telephone line/device by dialing local telephone,
specific DTMF (dual-tone multi-frequency) dial the number
digits from a local telephone. The tel- of the remote tel-
ephone remote control system described ephone to which
here has the following features: the circuit is con-
1. It can control multiple channels/ nected. In a short
relays. while you will
2. It provides you feedback when the hear a musical
current is in energized state and also note indicating
sends an acknowledgement indicating that the circuit
action w.r.t. the switching ‘on’ of each connected to the
requested relay and switching ‘off’ of all remote telephone
relays (together). is active.
3. It can selectively switch ‘on’ any 2. Now if you
one or more relays one after the other and want to switch
switch ‘off’ all relays simultaneously. ‘on’ a particular
relay/device, press
‘*’ button on the
Operation telephone keypad
Instead of straightway proceeding with followed by any
the circuit description, we shall start one of digits 1
with the operation as this would help us to 7 correspond-
in understanding the circuit better. The ing to the device/
relay number
Table I(a) that you desire to
switch ‘on’. The
Input Output
A2 A1 A0 Qn = addressed switching ‘on’ of
L L L Q0 the relay will be
L L H Q1 acknowledged/in-
L H L Q2 dicated by a mu-
L H H Q3 sical note. Now
H L L Q4
you may keep the
H L H Q5
H H L Q6 handset on the
H H H Q7 cradle.
3. If you want
Table I(B) to switch ‘off’ the
WR R Q Q relays, press ‘*’
addressed un-addressed and them press
L L = DATA hold key for digit 8.
L H = DATA L A musical note
H L hold hold
H H L L
is heard, which
indicated that all
H = High; L = Low
the relays have Fig. 1: Schematic diagram of the telephone remote control
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otherwise stated)
R1, R16. R17 - 150-kilo-ohm
Fig. 2: Actualsize, single-sided PCB for the circuit R2. R21 - 10-kilo-ohm
R3 - 33-kilo-ohm
R4 - 680-kilo-ohm
R5 - 560-ohm
R6, R10 - 22-kilo-ohm
R7 - 1-mega-ohm
R8, R15 - 390-ohm
R9, R12 - 15-kilo-ohm
R11 - 270-ohm
R13, R14 - 3.3k-kilo-ohm
R18 - 330-kilo-ohm
R19, R22-R27- 4.7-kilo-ohm (R22-R27 not
shown in the figure)
R20 - 220-ohm
VR1 - 10-kilo-ohm preset
VR2 - 1-mega-ohm preset
VR3 - 220-kilo-ohm preset
VR4 - 470-kilo-ohm preset
Capacitors:
C1 - 0.22uF ceramic disk
C2 - 220uF. 10V electrolytic
C3 - 100uF, 10V electrolytic
C4, C5, C8 - 0.0luF ceramic disk
C6, C11, C12 - 0.1uF ceramic disk
C7 - 10uF, 10V electrolytic
C9 - 0.02uF ceramic disk
CIO - 0.47uF, 100V polyester
Miscellaneous:
Fig. 3: Component layout for the PCB X PAL - 3.58MHz crystal
RL-RL7 - 9V, 150-ohm 1C/0 relay (only
been switched ‘off’. Keep the handset on When a ring is detected by IC1, its RL4 shown)
cradle. output triggers one of the timers in IC 556.
The output of the timer after inversion by is still persisting) applied to pin 9 of the
one of the NAND gates of IC3 (CD4011), same NAND gate (after inversion by an-
The Circuit enabled IC4 (CD4060) by taking its reset other NAND gate) will pass through it to
At the remote telephone end, the ringing pin 12 ‘low’. (IC4 is an oscillator-cum-14- trigger the second monostable inside IC2
signal is detected by a high-input-imped- bit binary counter.) As a result, IC4 starts (NE556) as well as IC5 (NE555), which
ance op-amp CA3140E that is wired as a counting when the ring signal strikes the is again wired as a monostable. This ar-
comparator. Since the op-amp output is input of the circuit. rangement avoids the circuit of being
open-controller type, the output pin has After some time, decided by the set- triggered by any transients or false ring
been pulled Vcc via 10-kilo-ohm resistor ting of preset VR3, Q12 output of IC4 signals on the telephone line.
R21, IC2 (NE556) comprised two timers goes ‘high’. This output coupled to pin 8 The output of the second monostable
(NE555 type) that have been configured of a NAND gate inside IC3 will enable it. of IC2, available at its pin 9, drives tran-
as monostables. The detected ring signal (if the ring signal sistor T2 and shunts the telephone line
Readers’ comments: Devjyoti Biswas be achieved with discrete ICs also, but
Q1. In the circuit, if anyone makes a Through e-mail the microcontroller method is better
call to the connected telephone line The author, Junomon Abraham, and flexible.
and presses the consecutive switches, replies: EFY: Please refer to ‘Microcontroller-Based
the unauthorised person can also A1. It is possible to incorporate the Access Control System’ and ‘Multichannel
switch the circuit on/off. Can the circuit facility as desired by you by using a mi- Access Control System’ projects published
be altered such that switching on/off crocontroller. The microcontroller will in October and November issues of EFY for
the circuit is possible only after enter- receive the signal from DTMF decoder implementation of the password authenti-
ing the authorisation code via telephone and it will verify whether the correct pass- cation schemes used in such a system.
keypad? word has been received. The same can
T
he basic requirements of a realtime PARTS LIST
programmable timer generally
Semiconductors:
used in schools and colleges for IC1 - 68HC705JIACP Microcontrol-
sounding the bell on time are: ler
• Precise time base for time keeping. IC2 - CD4532 8-bit priority En-
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• Read/write memory for storing the coder
bell timings. IC3 - 74LS138 3-line to 8-line de-
coder
• LCD or LED display for displaying IC4 - 74LS47 BCD-to-7-segment
real time as well as other data to make the decoder/driver
instrument user-friendly. T1-T3 - BC547/BC147 npn transistor
• Keys for data entry. T4-T7 - 2N2907 pnp transistor
Fig. 1: MC68HC705J1A pin assignment D1-D7 - 1N4007 diode
• Electromechanical relay to operate ZD1 - 5.6V, 0.5 watt zener
the bell. The time-keeping section. Ac- Resistors (1/4-watt, ±5% carbon, unless stated
We are describing here a sophisti- curate time-keeping depends on the otherwise)
cated, yet economical, school timer based accuracy of time base used for driving R1 - 210-ohm, 0.5 watt
on Motorola’s 20-pin MC68HC705J1A the microcontroller. In this project, the R2 - 27-ohm
microcontroller. microcontroller is driven by AT-cut R3, R12-R14,
R24-R-27 - 1-kilo-ohm
parallel resonant crystal oscillator that
R4-R8 - 100-kilo-ohm
is expected to provide a very stable clock.
Description A 3.2768MHz crystal provides a time
R9-R11,
R23, R29 - 10-kilo-ohm
The pin assignments and main features of base to the controller. The frequency R15-R22 - 47–ohm
the microcontroller are shown in Fig.1 and (fosc) of the oscillator is internally divided R28 - 10-mega-ohm
the Box, respectively. The complete sys- by 2 to get the operating frequency (fop). Capacitors:
tem is divided into four sections, namely, This high-frequency clock source is used C1 - 350µF, 25V electrolytic
C2, C3 - 1µF, 16V electrolytic
the time keeping section, the input section to control the sequencing of CPU instruc- C4, C5 - 27µF ceramic disk
(keyboard), the output (display, indicators, tions. C6 - 0.1µF ceramic disk
and relay driving) section, and power sup- Timer. The basic function of a timer Miscellaneous:
ply and battery backup. is the measurement or generation of S1-S5 - Push-to-on switch (key)
time-dependant events. Timers usu- S6 - On/off switch
PZ1 - Piezo buzzer
RL1 - Relay 12V, 300-ohm, 1C/O
Main features of mc68h705j1a XTAL - 3.2768MHz AT-cut crystal
X1 - 230V AC primary to 12V-0-
• 14 bidirectional input/output (I/O) lines.
12V, 500mA secondary trans-
(All the bi-directional port pins are programmable as inputs or outputs.)
forer
• 10 mA sink capability on four I/O pins (PA0-PA3). DIS.1-DIS.4 - LTS542 common-anode dis-
• 1,240 bytes of OTPROM, including eight bytes for user vectors. play
- 4 x 1.2V Ni-Cd cells
• 64 bytes of user RAM.
• Memory-mapped I/O registers.
• Fully static operation with no minimum clock speed. ally measure time relative to the internal
• Power-saving stop, halt, wait, and data-retention modes. clock of the microcontroller. The MC68H-
• Illegal address reset. C705J1A has a 15-stage ripple counter
preceeded by a pre-scaler that divides the
• A wide supply voltage range from-0.3 to 7 volts.
internal clock signal by 4. This provides the
• Up to 4.0 MHz internal operating frequency at 5 volts.
timing references for timer functions.
• 15-stage multifunction timer, consisting of an 8-bit timer with 7-bit pre-scaler.
The programmable timer status and
• On-chip oscillator connections for crystal, ceramic resonator, and external clock.
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increase the display’s and Programmer software to support
brightness. 74LS47 Motorola’s device programmer and soft-
is rated for sinking ware simulator. The ICS05JW in-circuit
a current of up to 24 simulator and non-real-time I/O emula-
mA. As the current tor for simulating, programming, and
persists for a very debugging code for a MC68HC705J1A/KJ1
Fig. 3: Power supply circuit for the school timer small time in multi- family device.
plexed display, it is When you connect the pod to your
peaky and can be as host computer and target hardware, you
high as 40 mA per can use the actual inputs and outputs of
segment. the target system during simulation of
The decimal the code. You can also use the ISC05JW
point is control- software to edit and assemble the code in
led individually by standalone mode, without input/output
transistor BC547, to/from pod. The pod (MC68HC705J1CS)
as 74LS47 does not can be interfaced to any Windows 3.x-or
support the decimal Windows 95-based IBM computer using
point. PA0 and PA1 serial port.
bits of port A are The software for the timer has been
used for controlling so developed that the system becomes
the electro-mechani- as user-friendly as possible. The main
cal relay and buzzer, constraint is read/write memory (RAM)
respectively. space. As mentioned earlier, the micro-
Power supply controller has only 64 byte RAM. About
and battery twenty bell operating timings are required
backup . T h e to the stored. So the efficient use of RAM
microcontroller becomes essential.
and the associ- The software routines for the timer,
ated IC packages along with their Assembly language codes,
require a 5V DC are listed in a folder. (Note: This folder,
supply, while the containing source code (.asm) and listing
relay and the file (.lst) will form part of the EFY-CD
buzzer require provided with the August 2001 issue. As
12V DC supply. files are quite large, it is not feasible to in-
A simple rectifier clude them here.) Basically, the following
along with zener functions are performed by the software
diode-regulated program:
power supply 1. Initialisation of ports and the
is used. The mi- timer.
crocontroller is fed 2. Reading of keypressed data.
Fig. 4: Actual-size single-sided PCB for the circuits in Figs 1 and 2 through a battery- 3. Storing of real time and bell
Readers’ comments:
www.electronicbo.com
Q1. I have assembled this circuit and
found that pins D0 and D1 of IC 4532
are not properly terminated. Will
this affect the keyboard data? Could
you please tell me from where I can
get the programmed controller?
Deep Saraf
Pune
Q2. Does the circuit work by just
assembling it with the IC (MC68H-
C705J1A) bought from the market,
or do we have to install a software
in it? From where can we get the
software? Give a detailed procedure
about how to install the software in
the IC. Fig. 1: Modification of display circuit to operate 2.5cm/5cm display
A. Rajasekaran
Chennai present circuit after omitting resistor R1. ment kit and IDE (integrated development
Q3. The circuit can be modified as shown Somnath Bera environment) software available through
in Fig. 1 for using a brighter and bigger Through e-mail Motorola distributors/Internet. The same
display. You can use this modification for A1 and 2. EFY: Leaving two of the un- can be purchased through our associate
one set of 2.5cm (1-inch) or 5cm (2-inch) used input pins open will not affect the Kits‘n’Spares.
display. For 5V supply, use 7805 regu- circuit performance. The microcontroller A3. EFY: The circuit sent by the reader
lator in place of the zener diode in the has to be programmed using a develop- had anomalies, which have been corrected.
He
re is an inexpensive circuit of and external frequency = 1 kHz, we can Parts List
a digital capacitance-cum-fre- read the value of the capacitor under test Semiconductors:
quency meter that can meas- (CUT) directly in nanofarads. With R = IC1 - NE555 timer
ure capacitance in the range of 1 pF to 1 kilo-ohm and frequency = 1 kHz, we IC2, IC3 - CA3140 high-input imped-
10,000 µF and frequency in the range of can read the value of the CUT directly in ance op-amp
microfarads. IC4 (A-D) - 7408 AND gate
0 to 100 kHz. With a slight modification, IC5 - MM74C925 4-digit counter/7-
this circuit can be used as an article coun- Frequency measurement. This segment driver
ter or a time meter. involves passing the unknown frequency IC6 - 74LS121 monostable MV
The principle. In a frequency coun- signal for a known time base period IC7-IC9 - 74LS90 decade counter
through the counter. In a 4-digit counter (divide-by-10)
ter, the unknown input is ANDed with a
IC10 - 7476 JK flip-flop
known time-base period, so that the num- with a time base of one second, the maxi-
IC11 - 7805 regulator +5V
bers of cycles passed over the time-base mum display will be 9999, which means D1-D5 - 1N4007 rectifier diode
period are counted. The time period can be that we cannot read a frequency of more D6 - 1N4148 switching diode
measured similarly if a known frequency than 9999 Hz (≈10 kHz). However, if we LED1 - Red LED
reduce the time base to 0.1 second, the T1-T5 - BC547B npn transistor
is gated with the unknown time period. T6 - BS107 FET
The same instrument can also determine frequency reading can go up by a factor of Resistors (all ¼ watt, ±5% carbon, unless
the time period of a periodic waveform or ten to 99.99 kHz (≈100 kHz) as the time stated otherwise)
the time elapsed between two events. base virtually divides the input frequency R1 - 2.2-kilo-ohm
by 10. For low-frequency measurement, R2, R5 - 1-mega-ohm
In this circuit, the capacitance meas-
R3, R8, R24 - 4.7-kilo-ohm
urement is nothing but the measurement we can increase the resolution by a factor
R4, R20 - 10-kilo-ohm
of the time between two events in a charg- of ten by increasing the time base period R6, R7, R18
ing capacitor. An R-C (resistor-capacitor) to 10 seconds, which is equivalent to the R21 - 1-kilo-ohm
circuit works as a time generator and the multiplication of the input frequency by a R9-R16 - 220-ohm
factor of 10. R17 - 20-kilo-ohm
time is directly proportional to capacitance R19 - 100-kilo-ohm
value under suitable conditions. In the R22, R23 - 560-kilo-ohm
present case the condition being satisfied VR1 - 1-kilo-ohm preset
is that the time period (T) is equal to the
Circuit and operation Capacitors:
The capacitance measurement mode. C1 - 15µF, 25V electrolytic
product RxC, where R is the value of the
C2 - 0.01µF ceramic disk
charging resistor in ohms and C the ca- During the capacitance measurement
C3 - 10nF ceramic disk
pacitance value in farads. mode, switches S1 through S5 are kept C4 - 10µF, 250V electrolytic
Capacitance measurement. One slided towards position ‘C’. The unknown C5 - 1000 µF, 25V electrolytic
RxC time (seconds) is required to charge capacitor is placed across CUT terminals. C6 - 100µF, 25V electrolytic
Ganged switches SR1 and SR2 are used C7, C8 - 22 pF ceramic
a capacitor to 63 per cent (approximately C9 - 0.01µF ceramic
two-third) of its final value (applied volt- for capacitance measurement. Position 1 Miscellaneous:
age). is used for capacitance range of 1 pF to X1 - 230 AC primary to 9-0-9 volt,
Consider the following example: 9999 pF (≈10 nF), position 2 for capaci- 500mA secondary trans-
tance range of 1 nF to 9999 nF (≈10 µF), former
If C = 470 pF and R = 1 mega-ohm,
XTL - 1MHz quartz crystal
then one RC time period T = 470x10–6 and position 3 for capacitance range of 1
S1-S5 - Slide switch
seconds = 470 microseconds. µF to 9999 µF. S6, S7 - Push-to-on switch
If we select the external frequency for Switch SR1 selects 1 mega-ohm charg- SR1-SR2 - Ganged 3-way, 2-pole rotary
the counter as 1 MHz (time period = 1 mi- ing resistor in its positions 1 and 2, while switch
switch SR2 selects a frequency of 1 MHz SR3-SR4 - Ganged 3-way, 2-pole rotary
crosecond), the counter progresses by one switch
count every microsecond and the counter in position 1 and a frequency of 1 kHz in DIS1-DIS4 - LT543 common-cathode,
reading is 470, as the gate will be open for position 2 for the counter operation. In po- 7-segment display
470 microseconds for the above-mentioned sition 3, 1-kilo-ohm charging resistor R6 is
R and C under testing. We get the capaci- selected by SR1, while SR2 selects 1 kHz only. (EFY note. As decimal indication
tance value directly from the readout of as the frequency for counter operation. is not required during capacitance meas-
the counter in picofarads. Ganged rotary switches SR3 and SR4 urement, one might have an additional
Similarly, if we take R = 1 mega-ohm are used for frequency measurement mode ‘off’ position for SR3/SR4 ganged rotary
switch.)
81
ELECTRONICS PROJECTS Vol. 22
Fig. 1: Circuit diagram for digital capacitance-cum-frequency meter
IC1 is a monostable multivibrator of 15-second duration. As soon as its out- input of IC3 is biased at 0.63Vcc, which is
based on timer NE555 and is meant for put goes high, it switches off FET switch. set accurately by 1-kilo-ohm preset VR1.
capacitance measurement only. In normal Simultaneously, it takes pin 5 of AND Now the capacitor begins to charge. As
condition, the low output of the monostable gate IC4A high. soon as the voltage across the capacitor
turns on the FET (BS107) switch. So the Now let us examine the conditions at crosses 0.63Vcc (i.e. 3.15 volts with Vcc
capacitor under test gets shorted via the IC2 and IC3 (both CA3140 op-amps). The = 5 volts), the output of IC3 goes low.
FET switch. As and when triggered by the voltage across CUT, after being buffered Thus the output of IC3 and also that of
momentary push-to-on operation of start by IC2, is fed to the inverting input of IC3 AND gate IC4A remains high until the
switch S6, the monostable provides a pulse wired as a comparator. The non-inverting capacitor charges to 63 per cent of Vcc in
one RC time.
Latch-enable (LE) pin 5 of counter
IC5 (74C925) connected to pin 6 of IC4A
remains high to pass the clock selected
via rotary switch SR2 and coupled to
CL (clock) pin 11 of IC5 via AND gate
IC4B. It goes low after one CR time to
latch its count as the output of IC3 goes
low. Thus the number of cycles from the
frequency source passed over one CR
time is recorded in the counter and gets
displayed.
For precise generation of 1MHz fre-
quency, a 1MHz crystal oscillator is wired
around Schmitt inverter gates N3 and N4.
The oscillator output is routed via AND
gate IC4C to slide switch S2 and rotary
switch SR2 position 1. In capacitance (C)
position of switch S2, this signal, after
Fig. 2: Internal block diagram and functional description for IC 74C925 division by three decade counters IC7, IC8,
and IC9 (7490), which are common to both
frequency and capacitance meter modes,
provides 1kHz signal at pin 12 of IC9,
which, in turn, is extended to positions 2
and 3 of switch SR2. (Note. The outputs
of IC10 are not used during capacitance
measurement. IC10 comes into play only
during the frequency measurement as
explained later.)
The NE555 timer used as a monoshot
ensures the capacitance measurement in
an easy and automatic manner. The LED
connected to AND gate IC4D glows during
the charging of the capacitor. During the
measurement of high-value capacitances,
it may take several seconds to charge to
0.63Vcc. For low-value capacitances, the
LED glows for just a moment after press-
ing start switch S6. If the LED goes off af-
ter the start button is pressed, it indicates
that the measurement is over.
You can reset NE555 timer using
switch S7 if you want to make another
measurement. If this switch is not pro-
vided/operated, you would have to wait
for at least 15 seconds until NE555 timer
becomes normal. Alternatively, you will
have to switch off the complete circuit and
then switch it on again.
Frequency counting. In place of
1MHz oscillator, a 100Hz full-wave recti-
Fig. 3: Actual-size, single-sided PCB layout for digital capacitance-cum-frequency meter fied (pulsating DC) after being shaped by
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of IC3 and set the point at 0.63Vcc = 3.15
volts using 1-kilo-ohm preset VR1. To
test the capacitance meter, use a 470pF
polystyrene capacitor with one per cent
tolerance.
Precaution. Try to screen the mains
transformer from the input. Place the
transformer at a place where the chances
of its interference with the input are mini-
mal or nil. While measuring the frequency,
Fig. 4: Component layout for the PCB the frequency source under test should not
be touched or loaded to avoid affecting its
Schmitt inverter N2, is used as the master of gate N2. This 100Hz signal is divided frequency due to stray capacitance associ-
clock to provide the required time bases. by decade counters IC7, IC8, and IC9 to ated with the test leads.
The voltage divider network of resistors obtain 10Hz, 1Hz, and 0.1Hz frequencies. An actual-size, single-sided PCB
R20 and R21 protects gate N2 against The frequency selected via rotary switch for the circuit of Fig. 1 is shown in Fig.
high voltage. SR3 is then divided by 2 by JK flip-flop 3, with its component layout shown in
R21 is test selected to get proper 100 7476 (IC10) so as to provide a gate time of Fig. 4. ❏
Hz rectangular wave form at the output 0.1 second, 1 second, or 10 seconds in po-
sitions 1, 2, and 3, respectively, of switch
Readers’ comments: Praveen Shankar frequency meter after suitably calibrating
Q1. A provision to include inductance Haridwar its scale.
measurement by using an FET-based Q2. I have the following queries: A2. EFY: 1. Yes, ICs DM74LS121 and
tank oscillator circuit (as shown in 1. Are ICs DM74LS121 and SN74LS121 SN74LS121 are similar and you may use
Fig. 1) would enhance the utility of the the same? Can I use DM74LS121 or either of these two ICs as IC6.
circuit. The tank circuit could be tuned by SN74LS121 as IC6? 2. You can replace 15µF, 25V ca-
trimmer CT for a frequency of, say, 1 MHz 2. Can I replace 15µF, 25V capacitor pacitor C1 with a 22µF, 25V capacitor
with a standard inductor of 1 µH. Decade C1 with a 22µF, 25V capacitor? by changing the value of resistor R2
dividers can be used for other ranges for Chang Heen Loong (1 mega-ohm) such that R2 x C1 product
direct readout. Through e-mail remains the same, in order to retain
The author, Pratap Chan- the same output pulsewidth. Since IC1
dra Sahu, replies: (NE555) is a timer IC, configured as
A1. Such a tank oscillator is a monostable, the output at pin 3 is
not suitable for this circuit as approximately 16 seconds as per the
the frequency in such a circuit following relationship:
is inversely proportional to the Pulsewidth = 1.1(R2 x C1) seconds
value of inductance and there So, if the capacitor value is changed
is an offset frequency. The from 15 µF to 22 µF, the resistor value
circuit proposed by the reader needs be changed from 1 mega-ohm to 680
could, however, be used in con- kilo-ohms so that R2 x C1 product remains
Fig. 1: FET-based tank oscillator circuit junction with moving coil type almost the same.
T
he fluid-level controller circuit pre- from ground level (0V) to supply voltage.
sented here allows you to set the The circuit Thus the reference voltage source should
lower and upper fluid levels at The main part of the circuit as shown in be externally preset, which is feasible with
the desired specific positions between Fig. 1 is dot/bar graph driver LM3914 the help of IC1. This IC can also display
two extreme levels. The total fluid level (IC1). This IC is linearly scaled and is the input voltage on a linear scale using
is divided into ten equal parts. Any two intended for use in LED voltmeter appli- ten LEDs in the bar graph or the dot mode.
of these ten positions may be defined as cation where the number of illuminated Here we have used the bar graph mode.
‘low’ and ‘high’ level, respectively. The LEDs indicates the value of input voltage. The outputs of IC1 are active-
system shows the preset levels on the It contains a floating 1.2V reference source ‘low’ and hence they sink current to
two 7-segment displays and the current between pins 7 and 8 that may be used as illuminate LEDs. Inverters are used
fluid level at any instant on a 10-LED bar the reference input for the IC. The voltage between the outputs of IC1 and the
graph indicator. The same circuit could from the sensor is fed to the input of IC1 inputs of IC3 and IC4 to invert the
also be used for controlling temperature at pin 5. active-‘low’ outputs of IC1. There
in a similar fashion. The output of the sensor may vary are ten outputs available from IC1,
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level). Thus the five levels are empty, one- approximately 1Hz pulse train. should remain ‘on’ until the maximum
fourth, half, three-fourth, and full. This The high level is set by pressing switch level is reached. It must not start if the
division is meant only for controlling the S1, while the low level is set by pressing fluid level falls below the maximum level
level, while all levels including the inter- switch S2. IC6 is reset when the power is but remains above the minimum level.
mediate levels are constantly displayed
on LED bar graph.
The lower level can be set anywhere
between 0 and 3 in steps of 1 and high
level can be set between 1 and 4. The
fluid level can be maintained between
any two levels by using IC3 and IC4.
IC3 selects the high level and gets inputs
of levels 1, 2, 3, and 4, while IC4 selects
the low level and gets inputs of levels 0,
Parts List
Semiconductors:
IC1 - LM3914 bar/dot display
driver
IC2 - 4069 hex inverter
IC3, IC4, IC5 - 4051 8-channel analogue
multiplexer
IC6 - 4520 dual binary counter
IC7 - 555 timer
IC8 - 4081 quad 2-input AND
gate
IC9, IC10 - 4511 BCD-to-7-segment
latch/decoder/driver
LED1, 3, 5, 7, 9 - Green LED
LED2, 4, 6, 8,
10, 11 - Red LED
Resistors (all ¼-watt, ±5% carbon unless
stated otherwise):
R1-R10,
R16-R31 - 470-ohm
R11-R15 - 10-kilo-ohm
R32-R33 - 47-kilo-ohm
R34 - 1-kilo-ohm
VR1 - 10-kilo-ohm preset
Capacitors:
C1, C2 - 22µF, 25V electrolytic
C3, C4 - 10µF, 25V electrolytic
C5 - 1µF ceramic disk
Miscellaneous:
DIS1, DIS2 - Common-cathode
7-segment display
S1, S2 - Push-to-on switch
Fig. 4: Actual-size, single-sided PCB layout for fluid-level controller with indicator
Readers’ comments: bottom side of the tank cover. The work- reflected light intensity received by
Q1. Please explain the detailed working ing of the LDR to control the water level is the LDR will be low when the water level
of the circuit. Also elaborate as to how to explained below. is low and it will increase as the water
arrange the LDR and filament lamp in the The light rays from the lamp are re- level in the tank rises. (The intensity at
tank? Please give details, how water level flected from the water surface and fall on the LDR depends on the total length of
will be controlled by LDR? Is there any LDR1. The orientation and the intensity the path travelled by light.) Thus the re-
reflection of light from water surface? of light source are the deciding factors for sistance of LDR is high when the level of
Ajit incidence of adequate reflected light on the water is low and its resistance decreases
Through email LDR for proper control of water level control. as the water level increases. The intensity
A1. EFY: The optical sensor section (LDR No direct light should be allowed to fall of light is indicated by the LEDs and
and filament lamp) can be fixed rigidly on on the LDR. Fix a suitable opaque screen 7-segment display in Fig. 1. of the article.
the bottom side of the tank lid/cover using closer to LDR, between the light source and VR2 (preset) is used to vary the sensitivity
M-seal or Fevi Quick or similar compound. the LDR. of LDR1 so as to obtain a predetermined
Alternatively, you may mount them on a For any given orientation of the light LED/7-segment display when a specified
wooden strip and secure the strip to the source and the position of the LDR, the level is reached.
M
GMA, pronounced as migma, is Fig. 1 shows the block diagram of tor C1, and potmeter VR1 form the oscillator
a versatile and multi-purpose the MGMA circuit. Block 1 is an oscil- circuit. Let us presume that capacitor C1 is in
gadget. It can be used for a lator that is controlled by block 2. Block discharged state and pin 2 of gate N1 is in high
range of applications, from a simple toy 2 contains another oscillator whose fre- state. As the input pin is low, output pin 3 is
to domestic and workbench applications. quency is much lower than that of the high and capacitor C1 starts charging through
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It measures time, compares light output, former. The differentiator circuit in block potmeter VR1.
temperature, resistance and capacitance, 3 resets the decade counters periodically. When the voltage across capacitor
etc. You can use this gadget in a number Blocks 4 and 5 count the pulses, which, C1 reaches above half of the supply
of ways, depending on your imagination in turn, are displayed by blocks 6 and voltage, input pin 1 of gate N1 goes high
and creativity. 7. Digit 9 in tens counter is decoded and output pin 3 goes low. Now capaci-
Basically, MGMA is a resistance- by block 8, and its output disables the
capacitance-controlled oscillator that counting process and triggers the aural
counts the pulses for a specific period. If indicator in block 9. Block 10 comprises Parts List
any transducer, such as light-dependent the regulated power supply to run the Semiconductors:
resistor (LDR) or heat-dependent resis- gadget. IC1 - CD4093 quad 2-input Sch-
tor (thermistor), is connected to it, the mitt trigger NAND gate
IC2, IC3 - CD4033 decade counter/
display shows the value corresponding to
its resistance. Contact or break (normally Circuit IC4
7-segment decoder
- 7805 +5V regulator
open or closed) type transducers can also Oscillator. In Fig. 2, Schmitt trigger input T1 - BC557 pnp transistor
be used with MGMA. NAND gate N1 of IC1 (CD4093), capaci- T2 - SL100 npn transistor
D1-D7 - 1N4148 switching diode
D8, D9 - 1N4001 rectifier diode
LED1 - Red LED
Resistors (all ¼-watt, ±5% carbon, unless
stated otherwise)
R1, R6-R9 - 100-kilo-ohm
R2 - 220-kilo-ohm
R3 - 470-kilo-ohm
R4 - 3.3-kilo-ohm
R5, R10, R11 - 330-ohm
VR1 - 1mega-ohm pot., linear
VR2 - 47-kilo-ohm pot., linear
Capacitors:
C1, C3 - 0.001µF ceramic disk
C2 - 4.7µF, 10V tantalum
C4 - 1000µF, 25V electrolytic
C5, C6 - 0.1µF ceramic disk
Miscellaneous:
X1 - 230V AC primary to 9-0-9V
AC, 100mA secondary trans-
former
S1, S2 - Push-to-on switch
S3 - SPST switch, 230V AC
DIS1, DIS2 - LT543 7-segment, common-
cathode type LED display
SOC1 - SOC4 - Earphone socket
SOC5 - DC IN socket
PZ1 - Piezo-buzzer
- IC bases, knobs, mains
chord, cabinet
- Banana-type earphone plugs
Fig. 1: Block diagram of the MGMA circuit
tor C1 discharges through potmeter pulses through R1 when switch S1 is held low. So on reset, only DIS1 (unit
VR1. When the voltage across capacitor pressed. digit) will show zero as RBI pin 3 of
C1 falls below half of the supply voltage, Counter and display. The output of IC3 is grounded.
pin 1 of gate N1 goes low and the output the oscillator is connected to clock input Switch S2 is provided to reset the
pin goes high. Now capacitor C1 starts pin 1 of IC2 (CD4033, a decade counter counter manually. Current-limiting
charging again and the cycle repeats for unit digits). The carry-out pin 5 of IC2 resistors R5 and R10 provided with
DIS2 and DIS1, respectively, are used
itself. is connected to the clock input of decade
to reduce the component count and
The pulses from the output of gate counter IC3 that is meant for ten’s digits. ensure the proper operation of digit-9
N1 reach counter IC2 through resistor The segment outputs of both IC2 and decoder circuit.
R1. Switch S1 is provided to stop the IC3 go to the respective seven segments Display controller and differ-
counting manually by grounding the of DIS1 and DIS2 (LT543) for displaying en-tiator. For accurate reading of the
the number of pulses. counter, it must be reset periodically
Table Lamp-test (LT) pin 14 of and the pulses must be counted
Count Decoded output of IC CD4033 both IC2 and IC3 is grounded for a specific period. For this an
a b c d e f g CO through 100-kilo-ohm resistor oscillator circuit comprising gate
0 1 1 1 1 1 1 0 1 R8. The test-point (TP) may N2, diodes D1 and D2, resistor R2,
1 0 1 1 0 0 0 0 1
potmeter VR2, and capacitor C2 is
be used to check the display.
2 1 1 0 1 1 0 1 1
used. This oscillator also works like
When a high-level voltage (5V) the previous one, but its charging
3 1 1 1 1 0 0 1 1 is applied to the test-point, all and discharging paths are separated
4 0 1 1 0 0 1 1 1 segment outputs go high and by diodes D1 and D2. Its ‘on’ time
5 1 0 1 1 0 1 1 0 the display shows 88. (high-level output) can be controlled
6 1 0 1 1 1 1 1 0 by potmeter VR2.
The display is blanked out
7 1 1 1 0 0 0 0 0 When output pin 4 of gate N2 goes
when the number to be dis-
8 1 1 1 1 1 1 1 0
played is 0, provided the ripple from low to high state, the differentiator
9 1 1 1 1 0 1 1 0
blanking input (RBI) pin 3 is circuit comprising capacitor C3 and resis-
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parallel across capacitor operate the gadget with external 9V bat-
C3 is used to discharge tery. LED1 acts as a power-on indicator.
it quickly and diode D3
is used to block the DC
voltage (when switch S2 is Construction
pressed) going to gates N1 Figs 3 and 4 show suggested actual-size,
and N3, and other parts of single-sided PCB layout and component
the circuit. layout, respectively, for the circuit in Fig.
Digit 9 decoder and 2. Solder the components in the order of IC
aural indicator. It is sockets, jumpers, resistors, capacitors, di-
very useful to sound an odes, LED, and transistors. Then connect
alarm for a certain read- the rest of the components through wires.
Fig. 3: Actual-size, single-sided PCB pattern suggested for ing or otherwise, say, for a Fig. 5 shows the proposed front-panel
the circuit in Fig. 2 layout of MGMA.
particular temperature or
light output or resistance Before connecting VR1 and VR2 to
value, etc. A permanent the PCB, mark the dials using a digital
number 90 is chosen for multimeter. Both dial 1 and dial 2 (refer
simplicity of the decoding Fig. 5) are calibrated in terms of resist-
circuit. When the display ance for the variable resistance values of
shows 90, the counter must 1 mega-ohm in case of VR1 and 47 kilo-
be disabled and the buzzer ohm in case of VR2, respectively, using a
enabled. digital multimeter. (Note. There may be
From the table of de- dead-ends on both ends of the potmeter,
coded outputs of IC 4033 it and it may vary in construction from
is found that for number 9, manufacturer to manufacturer.) Mark the
at least one of the segment dials for every ten units for easy reading
outputs is low (a, b and f and setting.
are high, while e is low).
For number 8, segment e
is inverted by transistor Applications
T2. As RBI pin 3 of IC3 is For high-resistance and low-resistance
grounded, all the segment transducers, use earphone-type sock-
outputs go low for 0. The ets SOC1 and SOC3, respectively. For
clock-enable (CE) pin 2 of low-capacitance and high-capacitance
IC3 is pulled up by resis- testing, use earphone-type sockets SOC2
tor R7. and SOC4, respectively. For SOC1 and
Pin 2 is also connected to SOC2, the reading will decrease for
a, b, f and e segment outputs of the increasing value of resistance and
IC3 through diodes D5, D6, D7, capacitance, and vice versa for SOC3
and transistor T2, respectively, and SOC4.
Fig. 4: Component layout for the PCB that altogether act as AND Strength-0-meter. This game re-
T
his circuit of an adjustable traffic signal for streetlight operation. Its opera- light modes (Part I) controls the switch-
and street light controller can con- tion does not require any software and ing time of streetlights in evenings and
trol the timings of four sides of hardware knowledge. mornings and the time to changeover from
traffic lights separately. It can also control This circuit can also be adopted for
the changeover from continuous traffic synchronisation with the signals of ad- PARTS LIST
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light mode to blinking yellow light mode jacent traffic lights by introduction of Semiconductors:
(at night), and from blinking yellow light appropriate delay in traffic light signals’ IC1 - LM358 op-amp
mode to continuous traffic light mode timings. IC2 - 7404 Hex inverters
IC3, IC6, IC12 - NE555 timer
(during day). In addition, this circuit also IC4 - 74LS93 4-bit binary coun-
controls the automatic switching off/on ter
of the streetlights in the mornings and The circuit IC5 - 74LS164 8-bit serial shift
evenings with flexible settings—defining The circuit has two parts—the first for register
IC7-IC9 - 7476 dual JK master-slave
the morning and evening time. In order generation of control signals for streetlight flip-flop
to prevent false triggering of streetlight and traffic light modes and the second IC10 - 7400 Quad 2-input NAND
circuitry due to some shadow or light on for generation of four sides of traffic light gates
IC11 - 7410 Triple 3-input NAND
the sensor, some time delay is taken into signals. gates
consideration before sending the control The circuit for streetlight and traffic IC13 - 7408 Quad 2-input AND
gates
IC14-IC17 - 7402 Quad 2-input NOR
gates
T1-T6 - SL100 npn transistor
D1-D14 - 1N4007 rectifier diode
LED1, LED3,
LED6, LED9,
LED12 - 3mm red LED
LED2, LED5,
LED8, LED11 - 3mm green LED
LED4, LED7,
LED10, LED13 - 3mm yellow LED
Resistors (all ¼-watt, 5% carbon, unless
stated otherwise):
R1, R2,
R18-R21 - 2.2-kilo-ohm
R3-R5, R8,
R12-R17,
R22-R25 - 100-kilo-ohm
R6 - 47-kilo-ohm
R7, R9, R11 - 10-kilo-ohm
R10 - 100-ohm
R26 - 47-ohm
R27 - 22-kilo-ohm
R28 - 6.8-kilo-ohm
VR1, VR2,
VR4-VR7 - 1-mega-ohm preset
VR3 - 100-kilo-ohm preset
VR8 - 10-kilo-ohm preset
Capacitors:
C1 - 220µ, 10V electrolytic
C2, C4, C6 - 0.01µ ceramic
C3, C5 - 6.8µ, 10V electrolytic
Miscellaneous:
LDR1
Fig. 1: Block diagram of traffic and street light controller S1 - Push-to-on switch
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decide morning and evening timings, to 4-bit negative-edge-triggered counter high (delayed evening signal) QH outputs
respectively. The output of comparator is 74LS93 (IC4). go to the second part of circuit for se-
properly delayed for obtaining the signals Period of output QD of IC4 is 16 times lecting the mode of traffic light. Table I
for streetlight and traffic light modes. the clock-1 time period. This QD output summarises the functioning of the circuit
In the detailed circuit diagram shown (low for first eight clock-1 cycles and high for signal generation for streetlight and
above the dotted line in Fig. 2, a natural for the next eight clock-1 cycles, and re- traffic light modes.
light-dependent voltage is obtained at the peating thereafter) of IC4 is connected to Part II Circuit. The block diagram
junction of light-dependent resistor LDR1 the clock input of an 8-bit (positive-edge- of the circuit for signal generation for
and resistor R7. Resistor R6 is used in triggered) serial shift register 74LS164 four sides of traffic lights is given below
parallel with LDR1 to limit the variation (IC5). the dotted line in Fig. 1. Here, the 4-bit
of the LDR. Light-dependent voltage and The output of IC1(a) forms the data and 2-bit counters are joined together to
variable reference voltage are connected to (D) input for the shift register. The data form a 6-bit counter. Outputs of the 2-bit
the inverting and non-inverting terminals (D) at QA output is available after eight counter, representing two MSB digits, are
respectively of comparator IC1(a). clock-1 cycles, while that at QH is avail- connected to a decoder that has two con-
In the evening, voltage at the invert- able after 120 clock-1 cycles. Thus morn- trol inputs and four outputs. The decoder
ing terminal of the comparator decreases ing/evening (low/high) data is available at activates one of the four outputs depend-
with time due to the increasing resist- QA and QH outputs after 8 and 120 clock-1 ing upon the input (00 or 01 or 10 or 11)
ance of LDR1. At a particular natural cycles, respectively. Note that the clock-1 of 2-bit counter.
light intensity (determined by variable period itself differs for morning data and Each output of the decoder can drive
reference voltage, which can be adjusted evening data. clock-2 at a different frequency. These four
with the help of preset VR8), it becomes Streetlight indicator (LED1) is con- outputs are connected to the four sides of
less than the voltage at the non-inverting nected to QA output of shift register IC5. traffic lights and select each side one after
terminal. This drives the comparator into
positive saturation region. Similarly, in Table I
the morning the comparator goes into Functional Summary of Part I Circuit
negative saturation region at the same Time Output Output at Output at Activated RA Street Traffic
natural light intensity. In this way, the of IC1(a) QA of IC5 QH of IC5 Resistance Light Light
comparator gives high voltage (logic 1) (LED1) Mode
for evening and low voltage (logic 0) for Evening HIGH LOW LOW RA1 OFF A
morning. After 8 cycles of clock-1 HIGH HIGH LOW RA1 ON A
IC1(b), with the non-inverting ter- (Delay time for streetlight)
minal biased at about 1/3rd Vcc, is simply After 120 cycles of clock-1 HIGH HIGH HIGH RA1 ON B
used as an inverter (though wired as (Delay time for night)
comparator). The inverted output of Morning LOW HIGH HIGH RA2 ON B
comparator IC1(a) is coupled to transistor After 8 cycles of clock-1 LOW LOW HIGH RA2 OFF B
T1 through resistor R4, while its direct (Delay time for streetlight)
output is coupled to transistor T2 via After 120 cycles of clock-1 LOW LOW LOW RA2 OFF A
(Delay time for day)
resistor R5.
It is observed that transistor T1 is Evening HIGH LOW LOW RA1 OFF A
cut off in the evening and Vcc is applied Delay times and evening/morning times are adjustable.
A: Continuous traffic light mode B: Blinking yellow light mode
to pin 7 of timer IC3 (wired in astable
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gate N4 will be high during the day. This
output is connected to one of the inputs of
four AND gates H1 through H4. Each of
these AND gates is a part of one side of
traffic light circuit.
NAND gates B1, B2, and B3 are con-
nected to the outputs of flip-flops F2, F3,
and F4 of the 6-bit counter. The final
output of this circuit (the output of gate
B2) will be high whenever the first four
bits of the counter are 1110 or 1111 or
0000 or 0001 (14 or 15 or 0 or 1), otherwise
it will be low. Accordingly, inverter N5
output will be low for the above contents
of the counter and high for the remaining
contents (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
or 13).
The output of NAND gate B2 and its
complement (the output of inverter N5)
are connected to NOR gates X2 (=E2,
J2, K2, and M2) and X3 (=E3, J3, K3,
and M3) of the each side of traffic light,
respectively. Other inputs of X2 and X3
Fig. 5: Connections for vehicular traffic lights and pedestrians’ signals NOR gates are common.
The last two flip-flops (F5 and F6) of
the 6-bit counter are connected to four
NAND gates G1 through G4 in such a way
that the output of G1, G2, G3, and G4 will
be low when last two counter bits are 00
(0), 01 (1), 10 (2) and 11 (3), respectively.
For example, when last two bits of counter
contents are 01 (1), only output of NAND
gate G2 will be low and others (G1, G3 and
G4) will be high.
The complements of these four NAND
gate outputs (obtained from collectors of
transistors T3 through T6) are connected
to the four RA resistors of 555 clock-2.
Other terminals of these four resistors
are connected to the anodes of diodes D8,
Fig. 6: The traffic and street light controller D10, D12, and D14, while their cathode
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H
igh-power lead-acid battery char- Constant voltage at a constant current to vary the charging current in accordance
gers usually employ constant results in a very large initial current in with the existing terminal voltage of the
voltage charging method. In a ‘flat’ battery and a very low current in battery.
such chargers the charging is monitored a partially charged battery. To overcome In the circuit presented here the
against the battery terminal voltage. this problem, the charger should be made charging current is adjusted against the
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The output from the secondary
of transformer X1 is rectified by the
bridge rectifier comprising 1N5408
diodes D3 through D6, rated at 800V,
3A. The rectified output is smoothed
by three capacitors C1, C2, and C3
before being applied to the rest of the
circuit. The 4.7-kilo-ohm resistor R6
acts as a bleeder resistance. LED7
indicates that DC is available at the
output of this section.
The series DC voltage regu-
lation section. This section is
configured around power Darlington
transistor TIP142 (T1) that functions
in conjunction with transistor T3
(BC549) and preset VR2 to regulate
Fig. 3: Actual-size, single-sided PCB for battery charger
the output voltage from the DC volt-
age regulator section.
Since zener diode ZD1 conducts
only after the output voltage reaches
15 volts, the output voltage needs to
be adjusted in the vicinity of 15 volts
with the help of preset VR2. When
transistor T3 conducts fully, the base
of transistor T1 is pulled towards
ground via resistor R8 and it stops
conducting after the output voltage
exceeds a specific value.
Transistor T2 (also a BC549)
helps in current limit adjustments.
Low-value, high-wattage resistors
R15 (shunted by R14) through R19
connected in series form a current-
limiting resistor network at the
output of transistor T1. This resistor
network limits the charging cur-
rent depending on the energisation/
de-energisation state of relays RL1
through RL4 that select the cur-
Fig. 4: Component layout for the PCB rent range. The resistors are either
A
pulse or a repetitive train of
pulses is one of the most fre-
quently encountered electronic
signals, and the conventional way to
determine its peak amplitude is to have
an oscilloscope display of the waveform.
An oscilloscope that has the required
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bandwidth to correctly display sub-
microsecond-wide pulses is an expensive
instrument, and is often beyond the reach
of most electronics enthusiasts, hobby-
ists, and small-scale units. The circuit
presented here allows you to measure the
peak amplitude of a single pulse as well
as of a repetitive train of pulses with a
conventional multimeter.
The circuit is capable of measuring
peak amplitude of pulses as narrow as
100 nanoseconds (ns) up to a maximum of
100V amplitude. There is practically no
limit on the maximum value of the pulse
width. It can also be used to measure the
peak amplitude of a repetitive pulsed
waveform as long as the time interval
between two successive pulses is greater
than 100 microseconds (µs).
The circuit
The pulse under measurement is fed to
the input of a cascaded arrangement of
two unity-gain peak detection stages built
around IC1 and IC2 using high-speed
op-amps AD829, as shown in Fig. 1. The
op-amp has a guaranteed unity-gain band-
width of 120 MHz and a slew rate of 230
V/µs, and it is capable of driving highly
capacitive loads. This makes it ideal for
receiving input pulses as narrow as 100
ns. D1 and D2 (1N914) are high-speed
switching diodes having a response time
of the order of 2 ns to 3 ns.
The input pulse gets stretched to
about 10 µs at the output of the first peak-
detection stage built around IC1 and to
about 100 µs at the output of the second
peak-detection stage built around IC2.
With switch S1 open, the circuit can Fig. 1: Circuit for measuring sub-microsecond pulses
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input at the start of conversion.
Fig. 4: Component layout for the PCB The latched digital output from the
ADC feeds the corresponding inputs of
volts, which is the maximum amplitude it acts as the start-of-conversion pulse the DAC0808 (IC6) as stated earlier. The
it can accept. for analogue-to-digital converter IC5 output of the DAC, after conversion into
The output of the first peak detector (ADC0808). The NAND logic is used here the proportional voltage by LF356 (IC7),
stage after a division by a factor of 2 by to incorporate the reset feature. is fed to the multimeter (set to appropri-
the arrangement of resistors R11 and The clock generator circuit for IC5 ate DC voltage scale) for measurement of
R12 feeds comparator LM319 (IC3). The is built around 74HCT04 (IC8) to pro- peak pulse amplitude. Potentiometer VR1
leading edge of the pulse output from the vide 1MHz clock. The clock frequency is used for calibration.
comparator coincides with the leading is decided by R24, R25, and C18. The The display holds the peak amplitude
edge of the input pulse. The leading-edge latched digital output from IC5 feeds the of the last pulse until it is reset using
comparator output triggers monoshot corresponding inputs of DAC0808 (IC6). switch S2 or it is updated by another
74121 (IC4) to produce a 1µs pulse (as The DAC output, which is a latched DC pulse at the input. The accompanying
determined by timing components R1 current, is converted into a proportional photograph shows the assembled circuit
7-C10) at its Q-output, with its leading voltage in the current-to-voltage circuit that the author used for performance
edge coinciding with the leading edge of built around op-amp LF356 (IC7). This DC evaluation.
the input pulse. voltage is connected to the multimeter for An actual-size, single-side PCB for the
The monoshot output is passed indication of peak amplitude of the input circuit is shown in Fig. 3 and its component
through an appropriate NAND gate pulse to the circuit. Potentiometer VR1 is layout in Fig. 4. ❏
logic circuit built around 7400 (IC9) and meant for calibration.
A
number of construction projects as 2850 rpm typically. the run capacitor value can be calculated
well as circuit ideas for water-/ The ESP body is made of cast iron using the simple thumb rule (70 µF per
fluid-level control have appeared or stainless steel. For low and medium HP), while the start capacitor value may
in EFY over the years, but so far no dedi- range, one can use 3-phase or split-phase be determined from Table I.
cated project has appeared for automating (also referred to as 2-phase) supply. ESPs Manual operation of ESP motor
the control of submersible water pumps. of 3 HP or higher rating invariably use (Fig. 1). The control panel comprises an
Looking into the demand for such a project 3-phase supply. isolator switch, push-to-on single-/dual-
from readers, we present here a circuit for Let us consider a typical case of 1.5HP section ‘start’ button, push-to-off ‘stop’
button, a triple-pole moulded case circuit
breaker (MCCB) for motor protection with
magnetic trip and resetting facility (with
an adjustable current range of 12 to 25 am-
peres), start and run capacitors, ampere-
meter, voltmeter, neon indicators, etc.
(Note. The MCCBs used for motor con-
trol are termed as motor circuit protectors
(MCPs). These are classified/catalogued
by number of poles, continuous ampere rat-
ing, and magnetic trip range (current). For
details, you may visit Cutler-Hammer’s
Website or contact Bhartia Cuttler-Ham-
mer dealers.)
Fig. 1 shows a simplified control panel
diagram, along with ESP motor wiring.
Fig. 1: Line diagram of control panel for manual operation of ESP motor The ‘start’ pushbutton (green), which is
automating the operation of an electrical ESP with 100mm bore diameter, using normally open, and the ‘stop’ pushbutton
submersible pump (ESP) based on the a split-phase motor. The motor draws a (red), which is normally closed, are in
minimum and the maximum levels in the running current of 10 to 11 amp, while
Motor rating Start capacitor value (µF)
overhead tank (OHT). This circuit can be the starting current is around 2.5 to three in HP 230V AC (working)
interfaced to the existing manual control times the running current value. 275V AC (surge)
panel of an ESP and can also be used as a To obtain a higher initial torque, the 1/6 20-25
standalone system after minor additions. run winding is connected in series with a 1/5 30-40
parallel combination of 120-150µF, 230V 1/4 40-60
AC bipolar paper electrolytic capacitor 1/3 60-80
ESP basics and 72µF, 440V AC run-mode capacitor.
1/2
3/4
80-100
100-120
Electrical submersible pumps are single- After two or three seconds of running, 1 120-150
or multiple-stage radial-flow pressure se- when the motor has picked up sufficient 1½ 150-200
ries impeller pumps that are close coupled speed, the start capacitor goes out of the 2 200-250
to the motor for low and medium heads. circuit because of the opening
These find applications in domestic, in- of the centrifugal switch in- Truth Table for relay operation
dustrial, irrigation, air-conditioning, and side the motor, while the run Water level Relay operation (2.5 – 3 sec.) Pump motor
various other systems. capacitor stays in the circuit in tank RL1 (stop) RL2 (Start) operation
The ESPs are classified by the bore permanently. For ESPs that Below
diameter (which generally varies from don’t have an integral cen- low level No Yes Starts
100 mm to 200 mm), horse-power (from trifugal switch arrangement, Above
about 0.5 HP to 40 HP), and discharge rate a dual-section start switch low level
(typically 120 litres per minute for 0.5 HP (explained later) can be used but below
high level No No Remains on
to about 2000 litres per minute for 40 HP). to perform the function of the
Reaches
These are run at a fixed speed, which is centrifugal switch.
high level Yes No Stops
For the split-phase motor,
series with the live or phase line. centrifugal switch opens to take the start ‘off’ button, which interrupts the supply to
The isolator switch is normally in ‘on’ capacitor out of the circuit and only the run the contactor coil.
position. When ‘start’ button is momentar- capacitors (2x36 µF) permanently stay in To interface the control circuit shown
ily pressed, the contactor energises via the series with one of the two stator windings in Fig. 2, we use circled points A and B
closed contacts of ‘off’ button. One of the of the ESP motor. (in parallel with ‘on’ button) and C and D
contact pairs of the contactor is used as In case the ESP is not provided with (formed by disconnecting one of the wires
the hold contact to shunt ‘on’ button and an integral centrifugal switch, a second going to ‘off’ button terminal, i.e. in series
provide a parallel path to the contactor section in ‘start’ button (shown in light with ‘off’ button). Points E and F will be
coil, which thus latches. shade in Fig. 1) can be used to shunt used if the ESP does not have an integral
The supply to the motor gets completed points ‘E’ and ‘F’. Since this switch sec- centrifugal switch.
via the other N/O contacts of the contac- tion has no hold on contacts, the start It may be recalled, by referring to Fig.
tor and the pump motor starts. When the capacitor will go out of circuit as soon as 1 of the project ‘Auto Control for 3-phase
motor gains sufficient speed (around 80 ‘start’ button is released. The motor can be Motor’ published in EFY’s June issue
per cent of the normal running speed), the switched off by momentarily depression of (same EP Vol. 22), that wiring of ‘on’ and
‘off’ buttons of 3-phase (4-wire system)
and split-phase motors are identical.
Hence the control circuit described here
can equally be used for 3-phase motors of
up to about 10 HP. For motors of higher
HP, one must use star-delta type starter
configuration.
The circuit
As shown in Fig. 2, the 230V AC mains
(tapped from the same points from which
it is fed to the control panel of Fig. 1) is
stepped down to 12V-0-12V by trans-
former X1. The rectified output smoothed
Fig. 3: Actual-size, single-sided PCB layout for Fig. 2 by capacitor C1 is used for operation of
T
ransistor is the basic component circuit designed may need to be operated single control terminal unlike op-amps.
of all electronic equipment. A good at different conditions (for example, at an
design of electronic circuitry re- ambient temperature of 40°C and collec-
quires proper knowledge of the character- tor current of 10 mA), the manufacturer’s Block diagram
istics and parameters of transistors. Due data is no longer adequate. The manual The transistor curve tracer is built around
to such factors as changes in doping level procedure to draw the characteristics of the ramp generator and the current-to-
of impurities and physical dimensions, a transistor is tedious and cumbersome. voltage converter. The ramp generator
production imperfections, and environ- Further, using the manual procedure, it produces a linear ramp that is applied
mental (ambient temperature, humidity, is not feasible to draw the dynamic char- to the transistor under test either as
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etc) changes, no two transistors can have acteristics of a transistor. the collector-emitter voltage (VCE) or the
the same characteristics. The transistor curve tracer circuit base-emitter voltage (VBE). The ramp is
Transistor is an active device and presented here enables one to draw the also used to deflect the electron beam
even a very small change in its param- input and output characteristics of npn horizontally (along x-axis) on the screen of
eters causes a large drift in its operation. transistors in common-emitter configura- the CRO. Similarly, the current-to-voltage
This affects the overall efficiency and the tion on a cathode ray oscilloscope (CRO). converter converts either the collector
reliability of an equipment. Hence for an It can be constructed and calibrated by the current (IC) or the base current (IB) into a
efficient, reliable, and trouble-free design/ designer himself. proportional voltage that is used to deflect
operation of the electronic equipment, the The circuit can be upgraded to the electron beam vertically (along y-axis)
designer must know the characteristics draw the characteristics of both npn on the screen.
and parameters of each transistor used in and pnp transistors, field effect tran- The signal conditioning and switching
the equipment. sistors (FETs), metal-oxide semicon- circuits, along with the ramp generator
The manufacturer provides general- ductor field effect transistors (MOS- and current-to-voltage converter, make
ised family characteristics of transistors FETs), unijunction transistors (UJTs), a complete curve tracer for the input and
bearing specific part numbers. These silicon-controlled rectifiers (SCRs), output characteristics of an npn transis-
characteristics are drawn under specific TRIACs, etc. In general, it can be up- tor.
test conditions such as 25oC temperature graded for any two- or three-terminal Output characteristics (Fig. 1).
and 10mA collector current IC. But as the analogue electronic device that has a The ramp and clock generator generates
a linear ramp and 1 kHz clock pulses. The
ramp is amplified by the ramp buffer am-
plifier to 0 to 5 volts. This amplified ramp
is applied to the collector of the transistor
under test as the collector-emitter volt-
age (VCE) through the current-to-voltage
converter.
The current-to-voltage converter gives
an output voltage proportional to collector
current IC that is applied to the CRO to
Fig. 1: Block diagram for tracing transistor output characteristics
deflect the beam in y-axis. The 0-5V ramp
output is applied to the CRO to deflect the
beam in x-axis. Hence we can trace the
output characteristics of the transistor
with the collector-emitter voltage (VCE) on
x-axis and IC on y-axis.
To trace the output characteristic
graph for various base current (IB) val-
ues, the generator’s clock output fed to
the counter is incremented for each clock
pulse. The count sequence is 000, 001,
010, 011, 100, 101, 110, and 111 (0 to
Fig. 2: Block diagram for tracing transistor input characteristics 7 decimal). After 111, the counter resets
automatically to 000 and the sequence input characteristics of the transistor with 35V capacitors act as filters to eliminate
repeats. The lower three bits of the coun- VBE on x-axis and IB on y-axis. ripples and provide unregulated DC out-
ter are applied to the base-current control To trace the input characteristics put voltage.
circuit. graph for various VCE values, the clock The unregulated dual DC voltage is
The base-current control circuit sets output of the generator is fed to the coun- converted by three-terminal ICs AN7812
IB in eight discrete 100µA steps, i.e. 0 µA, ter and switching circuit. The counter and AN7912 into ±12V regulated power
100 µA, 200 µA, 300 µA, 400 µA, 500 µA, counts the number of pulses in the binary supply. (Note. Connect 0.1µF decoupling
600 µA, and 700 µA. Adjust the step width form. Q0 output of the counter is used as capacitors between the supply terminals
(100 µA) using a potentiometer such that the collector-emitter voltage control that and ground of every IC in order to sup-
the output characteristics of various npn toggles VCE with 0 volt and 10 volts for press unwanted noise signals in the sup-
transistors with various current gains (β) every clock pulse. Thus we can trace the ply voltage.)
are traced/accommodated. input characteristics for VCE = 0 volt and 2. The ramp and clock generator
Input characteristics (Fig. 2). VCE = 10 volts. section. The ramp and clock generator
Here again, the ramp and clock generator uses a constant current source (LM334)
generates a linear ramp and 1kHz clock and a capacitor, in conjunction with timer
pulses. The ramp is amplified by the ramp The circuit NE555 (IC3) wired as an astable multi-
buffer amplifier to 0-5V. This amplified The transistor curve tracer circuit (Fig. 3) vibrator, to generate a linear ramp. The
ramp is attenuated and amplified as re- comprises power supply, ramp and clock control terminal of timer 555 (pin 5) is
quired to get 0-1V ramp and applied to generator, ramp buffer and offset null, held at a reference voltage of 5 volts by a
the base of the transistor under test as current-to-voltage converter, counter, base zener diode so that the upper threshold
the base-emitter voltage (VBE) through the current control, and switching sections. (VUTP) is at 5 volts and the lower threshold
current-to-voltage converter. 1. The power supply section. The (VLTP) at 2.5 volts.
The current-to-voltage converter gives circuit operates on ±12V regulated power The output current from IC LM334
an output voltage proportional to base supply. The input AC mains supply is can be controlled with the help of poten-
current IB that is applied to the CRO to stepped down by transformer X1 to deliver tiometer VR1. This current charges the
deflect the beam in y-axis. The 0-1V ramp a secondary supply of 15-0-15V AC at 1 capacitor linearly in the form of a linear
output is applied to the CRO to deflect the ampere. The output of the transformer is ramp. As soon as the voltage across the
beam in x-axis. Hence we can trace the rectified by a bridge rectifier. The 1000µF, capacitor exceeds the upper threshold volt-
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as the constant current source, and the
method of using the same is shown in Fig.
3 within dotted lines.)
3. The ramp buffer and offset null
section. Since the output impedance of
the ramp source is very high, we cannot
load it. Also, a DC offset voltage equal to
the lower threshold voltage (VLPT = 2.5V)
is present in the ramp output. In order
Fig. 4: Actual-size, single-side PCB layout for transistor curver tracer to nullify the offset voltage of the ramp
and to source the current from the ramp,
use a buffer amplifier. An op-amp in non-
inverting amplifier configuration is used
to achieve this function.
As the input impedance of the non-
inverting amplifier is very high, it will not
load the ramp source. Also, it is possible to
nullify the DC offset voltage present in the
ramp output with the help of ramp offset
adjustment preset VR2.
By adjusting feedback preset VR3, the
output of ramp buffer can be set to deliver
a linear 0-5V ramp. This output is used as
VCE for the transistor under test to source
the collector current (IC).
To draw the input characteristics of
the transistor, the base-emitter voltage
(VBE) should be varied linearly. For this we
require a linear 0-1V ramp with sufficient
current sourcing capability. In order to
achieve this, a ramp attenuator (voltage
divider) and an amplifier are used.
The 0-5V ramp output of ramp buffer
is attenuated by the potential divider
network (comprising resistors R4 and R5)
followed by an op-amp (IC5) connected in
non-inverting configuration. The gain of
the op-amp can be adjusted using preset
VR5 connected in the feedback path.
In order to nullify the offset voltage of
Fig. 5: Component layout for the PCB
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changeover switch on the front panel. The metal film resistor between the collector
switching details are obvious from the and emitter terminals of the transistor
circuit diagram in Fig. 3. under test. Connect the output of the
current-to-voltage converter to a CRO.
By observing the ramp waveform on
Fig. 8: Actual input curves on CRO (shown
Construction the screen of the CRO, nullify DC offset
without retrace) Wire the circuit on a 2.5mm, IC-type gen- voltage using preset VR6 and adjust the
eral-purpose printed circuit board (PCB) amplitude of the observed ramp wave-
as shown in Fig. 3. The use of glass-epoxy form to 0-5 volts with the help of preset
The high-level outputs of the counter PCB is recommended. An actual-size, VR7. Calibrate the current-to-voltage
are fairly constant at 10 volts. single-side PCB for the circuit is shown in converter to convert 1 mA of current into
When we connect a resistor of 100 Fig. 4, with its component layout shown 1 volt (refer waveform 4 in Fig. 6). Then
kilo-ohms in series with Q0 output of the in Fig. 5. check the clock output by connecting the
counter, it supplies a constant current of Carefully solder all the components CRO to pin 3 of timer 555 (refer waveform
100 µA during its logic 1 state. Similarly, and use sockets for ICs. All range resis- 5 in Fig. 6).
when we connect a resistor of 50 kilo-ohms tors used should be stable, close-tolerance 6. Verify the outputs of the counter by
(two 100 kilo-ohm resistors in parallel) type (preferably MFRs). Preferably use using a dual-trace oscilloscope. Connect
in series with Q1 output of the counter, linear-type IB SET potentiometer and one input channel of the CRO with clock
it supplies a constant current of 200 µA mount it on the front panel of the instru- pulses at pin 3 of IC3 and the outputs at
during its logic 1 state. Using 25-kilo-ohm ment. Enclose the circuit board, power pins 6, 11, and 14 of counter IC7 to the
resistor in series with Q2 output we can transformer, and other circuit compo- other input of the CRO sequentially (refer
get a constant current source of 400 µA. nents in a metal box having approximate waveforms 5, 6, 7, and 8 in Fig. 6).
When more than one current source dimensions of 22x17x7.5 cm. Extend 7. Short-circuit the base-emitter ter-
are connected in parallel, the result is input and output leads to the correspond- minals of the transistor under test. Select
similar to having a current source equal to ing points in the circuit. Terminate the input/output characteristics switch S2 to
the sum of individual source currents. outputs for connection to the CRO in output characteristics position and con-
If we use the base current (IB) setting BNC(F) connectors. nect the CRO to the output of the current-
as it is for a transistor with large current to-voltage converter. By adjusting IB SET
amplification factor (α), its collector cur- potentiometer VR8 on the front panel of
rent (IC) gets saturated for much smaller Calibration the instrument, check proper operation
values of IB and only two or three traces After construction, check the circuit of the base-current section by observing
appear on the screen of the CRO. To get thoroughly for short circuits, breaks, stair-case ramp of varying amplitude on
the maximum number of traces, reduce and open circuits on the PCB. After the screen of the CRO (refer waveform 9
the base current by increasing the series switching on the instrument, let it in Fig. 6).
resistor values through IB SET potentiom- warm up for a few minutes before
eter VR8. With the help of VR8, we can commencing with the calibration.
adjust the base current in incremental Calibration procedure of the circuit is Operation
steps from 10 µA to 100 µA. as follows: After calibration, the instrument is ready
(Note. Connect two 100-kilo-ohm re- 1. Check and ensure ±12V regu- for use to trace the input and output
sistors in parallel to get 50-kilo-ohm resis- lated voltage with respect to ground. characteristics of npn transistors. Follow
tor. Similarly, connect four 100-kilo-ohm 2. Connect a CRO to shorted pins 2 the operating procedure given below every
I
n applications like power stations and events that might have occurred during
continuous process control plants, a the period when the clock was low. Hence The circuit
protection system is used to trip the events themselves are used as clock IC1 and IC2 (CD4043) Quad NOR RS
faulty systems to prevent damages and signals in this circuit. flip-flops in Fig. 2 are used to capture and
ensure the overall safety of the personnel Fig. 1 shows the block diagram of the store the information pertaining to the
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and machinery. But this often results in tripping sequence recorder-cum-indicator. tripping of individual units. Reset pins of
multiple or cascade tripping of a number The inputs derived from auxiliary relay all the eight flip-flops and sub-parallel en-
of subunits. contacts (N/O) of subunits or push-to-on able (PE) pin 1 of BCD up-/down-counter
Looking at all the tripped units doesn’t switches are latched by RS flip-flops when CD4510 (IC3) are returned to ground via
reveal the cause of failure. It is therefore the corresponding subunits trip, causing 10-kilo-ohm resistor R22, while set pins
very important to determine the sequence the following four actions: of all RS flip-flops are returned to ground
of events that have occurred in order to 1. The latch outputs are ORed to acti- via individual 10-kilo-ohm resistors R14
exactly trace out the cause of failure and vate audio alarm. through R21.
revive the system with minimal loss of 2. The latch outputs are differentiated Initially, all the eight Q outputs of
time. individually and then ORed to provide IC1 and IC2 are at logic 0. The auxiliary
The circuit presented here stores the clock pulses to the counter to increment relay contacts of the subunits, which are
tripping sequence in a system with up to the output of the counter that is initially depicted here by push-to-on switches S1
eight units/blocks. It uses an auxiliary relay preset at 1 (decimal). through S8, connect the set terminal of the
contact point in each unit that closes when- 3. Each individual latch output acti- corresponding stage of RS flip-flop to +12V
ever tripping of the corresponding unit oc- vates the associated latch/decoder/driver whenever tripping of a specific subunit
curs. Such contact points can be identified and 7-segment display set to display the occurs. This makes the output of the as-
easily, especially in systems using program- number held at the output of the counter, sociated flip-flop go high. Thus whenever
mable logic controllers (PLCs). which, in fact, indicates the total number
This circuit records tripping of up to of trips that have taken place since the Parts List
eight units and displays the order in which last presetting. Semiconductors:
they tripped. A clock circuit, however fast, 4. LEDs associated with each of the IC1, IC2 - CD4043 quad NOR RS latch
IC3 - CD4510 BCD up-/down-
cannot be employed in this circuit because latch, decoder, and driver sets remain lit counter
the clock period itself will be a limiting to indicate the readiness of the sets to re- IC4-IC11 - CD4511 BCD-to-7-segment
factor for sensing the incidence of fault. ceive the tripping input. LEDs associated latch/decoder/driver
Besides, it may also mask a number of with the tripped unit go off. T1-T11 - BC547 npn transistor
T12-T19 - BC557 pnp transistor
D1-D16 - 1N4007 rectifier diode
DIS1-DIS8 - LT543 common-cathode
7-segment display
Resistors (all ¼-watt, ±5% carbon, unless
stated otherwise):
R1-R11,
R13-R38 - 10-kilo-ohm
R12, R39-R46 - 1-kilo-ohm
R47-R102 - 470-ohm
Capacitors:
C1-C8 - 0.01µF ceramic disk
Miscellaneous:
S1-S8 - Push-to-on switch or relay
contacts (N/O)
S9 - Push-to-on switch
PZ1 - Piezobuzzer
- 12V, 500mA power supply
Fig. 1: Block diagram of tripping sequence recorder-cum-indicator
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low-to-high transition and the cor-
Fig. 4: Component layout for Fig. 3
responding display (DIS8) shows
digit ‘2’. The above sequence of
operation holds true for any further
subunit tripping—with the displayed
digit incrementing by one for each se-
quential tripping.
In the prototype, LEDs D17 through
D24 were fixed below the corresponding
7-segment displays pertaining to subunits
A through H to provide a visual indication
that these units are ready to respond to
a tripping.
The circuit works satisfactorily with
twisted-pair wires of length up to 5 me-
tres. In electrically noisy environments,
the length of the cable has to be reduced
Fig. 5: Actual-size, single-side PCB for Fig. 6: Component layout for Fig. 5 or a shielded twisted-pair cable can be
latch decoder/driver and display circuit of used.
one subunit
outputs go high. An actual-size, single-side PCB layout
chronous up-/down-counter with preset) However, the common-cathode drive for the main control portion of the tripping
after amplification and pulse shaping by is absent in all the 7-segment displays sequence recorder-cum-indicator circuit is
transistor amplifier stages built around because driver transistors T4 through T11 shown in Fig. 3 and its component layout
transistors T2 and T3. These pulses serve are cut off due to the low outputs of all RS in Fig. 4. The PCB layout for the indica-
as clock to count the number of trippings flip-flops and hence the displays are blank. tor set comprising IC4, DIS1, transistors
that occurred after a reset. At the same time, the low outputs of all T4 and T12, LED1, etc is shown in Fig. 5
RS flip-flops (1Q through 8Q) forward bias and its component layout in Fig. 6. The
pnp transistors T12 through T19 associ- indicator set of Fig. 5 can be connected
Operation ated with LED1 through LED8 of each of to the main PCB of Fig. 3 using Bergstrip
Let us assume that three units, say, E, H, the displays. As a result, all these LEDs type SIP (single-inline-pin) connectors as
and A (fifth, eighth, and first), tripped in glow, indicating no tripping. per requirements.
that order following a fault. Now when unit E trips, output 5Q This tripping sequence recorder-cum-
When the system is reset (before of RS flip-flop IC2 goes high to provide indicator circuit can also be used in quiz
any tripping), the outputs of all RS flip- the base drive to common-cathode drive games to decide the order in which the
flops (1Q through 8Q) are low. This LE* transistor T8. This, in turn, activates DIS5 teams responded to a common question.
active-low makes latches IC4 through (fifth from left in Fig. 2) to display ‘1’, indi- For this, provide push-to-on switches on
IC11 transparent and as the counter is cating that unit E tripped first. The corre- the tables of individual teams and a mas-
preset to 1 (since P1 input is high while sponding LED5 goes off as transistor T16 ter reset to the quiz master. Modify the
P2, P3, and P4 are low) with the help is cut off. Also, latch IC8 is disabled due alarm circuit suitably with a retriggerable
of switch S9, all the latches hold that to logic 1 on its pin 5 and therefore it does monostable stage so that the audible alarm
‘1’ and their decoded ‘b’ and ‘c’ segment not respond to further changes in its BCD stops after a short interval. ❏
A
novel single-phase electronic hence relay RL2 latches even if switch The contact rating for relays RL1 and
starter circuit meant for 0.5HP S1 is subsequently opened. The other N/O RL2 should be 5 amperes, while contact
and 1HP motors is presented here. contacts RL2(b) of relay RL2, on energisa- ratings of relay RL3 should be 10 to 15
It incorporates both overload and short- tion, connect the voltage developed across amperes.
circuit protections. A special current- capacitor C2 to relay RL3, which thus Transformer X1 can be wound using
sensing device has been added in this energises and completes the supply to the any suitable size CRGO core. (One can
starter to sense the current being drawn motor, as long as current passing through use a burntout transformer core as well.)
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by the motor. primary of transformer X1 is within limits The primary comprises 30 to 31 turns for
If the motor jams due to bearing fail- (for a 1hp motor). use with 1HP motor and additional eight
ure or defect in the pump or any other When the current drawn by motor turns, if you are using a 0.5HP motor.
reason, it would draw much higher current exceeds the limit (approx. 5A), the volt- Fuses F1 and F2 are kit-kat type. The ‘on’
than its normal rated current. This will age developed across the secondary of pushbutton is normally-‘off’ type, while
be sensed by the current-sensing device, transformer X1 is sufficient to energise ‘off’ pushbutton S2 is of normally-‘on’
which will trip the circuit and protect the relay RL1 and trip the supply to relays type. Capacitors C1 and C2, apart from
motor. Some other reasons for the motor RL2 and RL3, which was passing via the smoothing the rectified output, provide
drawing higher current are as follows: N/C contact of relay RL1. As a result, the necessary delay during energisation and
(a) Windings damaged or short-circuit supply to the motor also trips. de-energisation of relays. Diodes across
between them.
(b) Shorting of motor terminals by
mistake.
(c) Under voltage or single phasing
occuring in the mains supply source (nor-
mally, a 440V AC, 3-phase with neutral
four-wire system).
The main components used in the
circuit comprise a specially wound sensing
transformer X1, another locally available
step-down transformer X2, single-change-
over relay RL1, two double-changeover
relays (RL2 and RL3), and other discrete
components shown in the figure. The
mains supply to the motor is routed in
series with the primary of transformer
X1 via normally-open contacts of relay
RL3. The primary of transformer X1 is
connected in the neutral line.
To switch on the supply to the mo-
tor, switch S1 is to be pressed momen-
tarily, which causes the supply path
to the primary of transformer X2 to
be completed via N/C contacts of relay
RL1. Relay RL2 gets energised due to
the DC voltage developed across capac-
itor C2 via the bridge rectifier. Once
the relay energises, its N/O contacts
RL2(a) provide a short across switch
S1 and supply to the primary of trans-
former X2 becomes continuous, and
H
ere is an interesting, low com-
ponent-count, and easy-to-build
electronic circuit for the Internet
surfers. This circuit, using two LEDs,
indicates the modem status, i.e. whether
it is in use or not.
The incoming telephone line termi-
nating on a master phone is shunted by a
metal oxide varistor.
The circuit is configured around the
popular timer chip NE555, which is wired
as an astable multivibrator. When power
is applied to the circuit, the astable starts
working as usual. However, LEDs D2 and
D3 connected to its output pin 3 would not
glow as transistor T1 is in off condition and D1 and D2 start blinking at the bist- wiper of preset VR1 very slowly until the
hence resistor R4’s bottom end is hanging able IC1’s frequency determined by the LEDs start blinking. Memorise the wiper
in high impedance state. values of resistors R1 and R2 and capaci- position and fix it in this position using a
However, when the modem is work- tor C1. good-quality glue/compound.
ing, voltage drop across preset VR1 A 9V, 0.5A AC adapter can be used After construction, fix the complete
illuminates the LED inside the opto- to power the circuit. Finally, one minor circuit in a suitable and attractive cabinet
coupler (IC2). As a result, transistor adjustment is required for successful op- with one LED in its front panel. Keep
T1 gets sufficient base-bias through eration of the gadget. For this, first switch the whole unit near the modem and fit
activated transistor inside opto-coupler on the supply to the gadget and then another LED near the master telephone
via resistor R3. Consequently, LEDs switch ‘on’ the modem. Now adjust the with the label ‘Modem in Use’.
O
ften you need to connect out- pact that it can be fixed within the audio causes selection of CD outputs being con-
put from more than one source power amplifier cabinet and can use the nected to the power amplifier input, which
(preamplifier) such as tape same power supply source. is indicated by lighting of LED1.
recorder/player and CD (compact The circuit uses just two CMOS ICs When touch-plate S2 is touched, the
disc) player to audio power amplifier. and a few other componenets. The ICs outputs of gates N1 and N2 toggle. That
This needs disconnecting/connecting used are MC14551/CD4551 (quad 2-chan- is, IC2 pin 3 is pulled ‘low’ while its pin 4
wires when you want to change the nel analogue multiplexer) and CD4011 goes ‘high’. This results in selection of tape
source, which is quite cumbersome (quad 2-input NAND gate). When touch- recorder outputs being connected to the
and irritating. plate S1 is touched (its two plates are input of power amplifier. This is indicated
Here is a circuit that helps you choose to be bridged using a fingertip), gate N1 by lighting of LED2.
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between two stereo sources by simple output (IC1, pin 3) goes high while the Pin 9 is the control pin of IC2. In the
touch of your hand. This circuit is so com- output of gate N2 at pin 4 goes low. This circuit, the state of multiplexer switches
is shown with pin 9 ‘high’
(CD source selected). When
pin 9 is pulled ‘low’, all the
switches within the multi-
plexer change over to the
alternate position to select
tape player as source.
EFY Lab note. Al-
though one can connect pin
7 (VEE) of IC2 to ground,
but for operation with
preamplifier signals going
above and below ground
level, one must connect it
to a negative voltage (say,
–1V to –1.5V) to avoid
distortion.
Precision attenuator
with digital control
anantha narayan
W
hen instruments are designed, ator with digital control is described here, lar OP07 op-amp with ultra-low offset
an analogue front-end is es- where digital control can be a remote dip in the inverting configuration. A dual,
sential. Further, as most equip- switch, or CMOS logic outputs of a decade 4-channel CMOS analogue multiplexer
ment have digital or microcontroller in- counter (having binary equivalent weight switch CD4052 enables the change in
terface, the analogue circuit needs to have of 1, 2, 4, and 8, respectively), or I/O port gain. An innovative feature of the circuit
digital control/access. of a microcontroller like 80C31. is that the ‘on’ resistance (around 100
The circuit of a programmable attenu- The heart of this circuit is the popu- ohms) of CD4052 switch is bypassed so
Precision Amplifier
with Digital Control
anantha narayan
T
his circuit is similar to the pre- in this configuration, which is useful for The gain selection resistors R3
ceding circuit of the attenuator. signal conditioning of low output of trans- to R6 can be selected by the user and
Gain of up to 100 can be achieved ducers in millivolt range. can be anywhere from 1 kilo-ohm to 1
T
his electronic game is simulation ‘run’ position, all segments of 7-segment tinue advancing and the final display
of one-arm bandit game. Elec- displays (DIS1 through DIS3) will light is unpredictable. Thus the final number
tronics hobbyists will find it very up. On turning toggle switch S1 from ‘run’ displayed in DIS1 through DIS3 is of
interesting. When toggle switch S1 is in to ‘stop’ position, displayed digits will con- random nature. The speed with which
T
his circuit is able to handle nine distance of 100m from each other, for re- line is to be shared by more members re-
independent telephones (using a ceiving and making outgoing calls, while siding in different rooms/apartments.
single telephone line pair) located maintaining conversation secrecy. This Normally, if one connects nine phones
at nine different locations, say, up to a circuit is useful when a single telephone in parallel, ring signals are heard in all
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creases and voltage drop
across R28 (220-ohm, 1/2W
resistor) increases and oper-
ates opto-coupler IC5 (MCT-
2E). This in turn resets timer
IC2 causing:
(a) interruption of the
power supply for processing
circuitry as well as the ring
signal relays RL1 through
RL9, and
(b) removal of loop re-
sistance R16, via the second
contact of relay RL10.
As a result, the telephone
line voltage shoots up to 48V,
DIAC1 and diode D1 con-
nected in series with phone
1 conduct within a few mil-
liseconds, and phone 1 comes
into operation. The telephone
exchange does not interpret
the nine telephones (it is also possible that extension number, say, ‘1’, within 10 sec-
this as break in off-hook condition, since
the phones will not work due to higher onds. (In case the calling subscriber fails
some delay margin is set at exchange.
load), and out of nine persons eight will to dial the required extension number
When phone ‘1’ is busy, the other
find that the call is not for them. Further, within 10 seconds, the line will be discon-
eight phones will not work, since line
one can overhear others’ conversation, nected automatically.) Also, if the dialed
voltage will again drop to 10V and the
which is not desirable. To overcome these extension phone is not lifted within 10
other diacs will not conduct. Thus conver-
problems, the circuit given here proves seconds, the ring-back tone will cease.
sation secrecy will be maintained.
beneficial, as the ring is heard only in the The ring signal on the main phone
The other extensions also work in a
desired extension, say, extension number line is detected by opto-coupler MCT-
similar manner when another extension
‘1’. 2E (IC1), which in turn activates the
number is dialed and its corresponding
For making use of this facility, the 10-second ‘on timer’, formed by IC2 (555),
relay energises to extend the 50Hz ring
calling subscriber is required to ini- and energises relay RL10 (6V, 100-ohm,
to another extension.
tially dial the normal phone number 2 C/O). One of the ‘N/O’ contacts of the
The 24V, 50Hz ring signal derived
of the called subscriber. When the call relay has been used to connect +6V rail
from transformer X1 is sufficient for
is established, no ring-back tone is to the processing circuitry and the other
working with phones of Beetel and ITI
heard by the calling party. The call- has been used to provide 220-ohm loop re-
make, but for Pretel and some other
ing subscriber has then to press the sistance to de-energise the ringer relay in
makes, it may be necessary to increase
asterik (*) button on the telephone to telephone exchange, to cut off the ring.
the ring voltage to about 30 volts or even
activate the tone mode (if the phone When the caller dials the extension
higher.
normally works in dial mode) and dial number (say, ‘1’) in tone mode, tone re-
T
his circuit of electronic card lock 3, 21, and 22 (address pins A0 through result, transistor T1 conducts and ex-
system is much simpler and A3), makes corresponding output go logic tends positive supply to the collectors of
cheaper than other similar circuits high, thus turning on the appliance transistors T2 through T5. Then, depend-
that have appeared in earlier issues of through relay contacts. Up to 15 appli- ing upon the holes blocked/punched in
EFY. ances can be switched on/off (one at a the inserted card, any combination of
The circuit is configured around time). Output Q0 (pin 11) can be used emitters of transistors T2 through T5
an addressable 1 of 16 demultiplexer for visual indication, to show that circuit turns logic ‘high’ (transistors’ output
CD4514B (IC1). Any number in binary is active. corresponding to blocked LDRs only goes
form, when available at input pins 2, A 40W bulb illuminates LDR1 ‘high’). These outputs connected to address
input pins A0 through A3 of IC1
Table I
Appliance LDR2 LDR3 LDR4 LDR5
no.
1 - * * *
2 * - * *
3 - - * *
4 * * - *
5 - * - *
6 * - - *
7 - - - *
8 * * * -
9 - * * -
10 * - * -
11 - - * -
12 * * - -
13 - * - -
14 * - - -
15 - - - -
- Blocked hole corresponding to selected
binary address.
* Punched holes corresponding to LDR posi-
tion on card
H
ere a simple low-cost technique pulsed discharges, optical communication, digital storage oscilloscope and it is also
for converting a CW laser di- fibre-optic sensors, image processing, connected to the PC for getting a hard
ode at 670 nm wavelength to etc—where one is required to check the copy.
pulsed laser up to a frequency of 500 kHz frequency response of the detection system Up to a frequency of around 20 kHz,
is presented. or optical simulation of an optical source the threshold voltage for laser oscillations
A low-power pulsed radiation source or local networking using optical fibre is around 2.4V. For frequencies greater
is very important for any laboratory in- cable. Fast-speed LED offers the solu- than 20 kHz, the threshold for laser
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volved in optical pulsed systems—laser, tion for such requirements, but because oscillations depends on the operating
of very low power and large frequency and is higher than 2.4V. The
divergence, its use remains behaviour of laser pulses up to 10 kHz is
limited. On the other hand, nearly similar. Laser output at a typical
a pulsed diode laser offers frequency of 2 kHz is shown in Fig. 3, at
a very good solution for this various voltages (2.6V, 3.4V, and 4V). The
problem. input waveform ‘A’ is shown at the bottom
Commercial systems are of the figure.
usually expensive. However, For a driving pulse of about 3V (which
a CW diode laser operating is the normal operating voltage for CW
at 670 nm can easily be operation), the laser pulse becomes flat
pulsed up to a frequency of after a delay of approximately 40 µs (time
500kHz with low-cost technique, using taken to build up the laser oscillations
a function generator and an inexpensive to its maximum amplitude). Above 3V,
push-pull amplifier interface circuit. The probably population inversion is devel-
block diagram of the system is shown in oped much above threshold, before the
Fig. 1. laser oscillations build up into the cavity,
A 3mW CW diode laser at 670 nm and so we observe the sharp peak in laser
with voltage and current rating of 3V output (for more details, refer Laser Fun-
at 100mA, respectively, is used. The damentals book by W. T. Silfvast, pub-
source (a function generator) is capable of lished by Cambridge University Press),
delivering square pulses of 3V amplitude, exponentially decaying to a steadystate
which are amplified by a complementary value with a time constant depending on
symmetry push-pull circuit shown in Fig. the initial peak intensity and the carrier
2. life time in the excited state. After the
The output of the
amplifier is
connected to
the diode la-
ser for pulsed
operation.
The laser is
focused onto
a photodiode
terminated
with 50-ohm
resistor (Fig.
1). The out-
put of pho-
todiode is
displayed on
T
his circuit using a dual-timer timer 1 in NE556 triggers by itself. C6. This action results in momentar-
NE556 can produce 1Hz pulses The output of the first timer is con- ily pulling down of pin 8 towards the
spaced 5 seconds apart, either nected to trigger pin 8 of second timer, ground potential, i.e. ‘low’. (Otherwise
manually or automatically. IC NE556 which, in turn, is connected to a potential pin 8 is at 1/2 Vcc and triggers at/below
comprises two independent NE555 timers divider comprising resistors R4 and R5. 1/3 Vcc level.) When the second timer is
in a single package. It is used to produce Resistor R1, preset VR1, resistor R2, triggered at the trailing edge of 5-second
pulse, it generates a 1-second
wide pulse.
When switch S2 is on posi-
tion ‘b’, switch S1 is discon-
nected, while pin 6 is connected
to pin 2. When capacitor C2
is charged, it is discharged
through pin 2 until it reaches
1/3Vcc potential, at which it is
retriggered since trigger pin 6 is
also connected here. Thus timer
1 is retriggered after every
5-second period (corresponding
to 0.2Hz frequency). The second
timer is triggered as before to
produce a 1-second pulse in
synchronism with the trailing
edge of 5-second pulse.
two separate pulses of different pulse preset VR2, and capacitors C2 and C5 are This circuit is important wherever a
widths, where one pulse initiates the acti- the components determining time period. pulse is needed at regular intervals; for
vation of the second pulse. Presets VR1 and VR2 permit trimming of instance, in ‘Versatile Digital Frequency
The first half of the NE556 is wired the 5-second and 1-second pulse width of Counter Cum Clock’ construction project
for 5-second pulse output. When slide respective sections. published in EFY Oct. ’97 (or Electronics
switch S2 is in position ‘a’, the first When switch S2 is in position ‘a’ Projects Vol. 18), one may use this circuit
timer is set for manual operation, i.e. and switch S1 is pressed momentarily, in place of CD4060-based circuit. For
by pressing switch S1 momentarily the output at pin 5 goes high for about the digital clock function, however, pin 8
you can generate a single pulse of 5-sec- 5 seconds. The trailing (falling) edge of and 12 are to be shorted after removal of
ond duration. When switch S2 is kept in this 5-second pulse is used to trigger 0.1µF capacitor and 10-kilo-ohm resistors
‘b’ position, i.e. pins 6 and 2 are shorted, the second timer via 0.1µF capacitor R4 and R5.
T
his inexpensive circuit can be rupted for another one minute, and so tor T3 remains cut off (with its collector
connected to an air-conditioner/ on, until the mains supply comes within remaining high) until the mains supply
fridge or to any other sophisticated limits (>180V AC). The AC mains supply falls below the lower limit, causing its
electrical appliance for its protection. is resumed to appliance only when it is collector voltage to fall. The collector of
Generally, costly voltage stabilisers are above the lower limit. transistor T3 is connected to the trigger
used with such appliances for maintain- When the input AC mains increases point (pin 2) of IC1.
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ing constant AC voltage. However, due to beyond 270 volts, preset VR1 is adjusted When the input is more than the lower
fluctuations in AC mains supply, a regular such that transistor T1 conducts and limit, pin 2 of IC1 is nearly at +Vcc. In
‘click’ sound in the relays is heard. The relay RL1 energises and resistance this condition the output of IC1 is low,
frequent energisation/de-energisation of R8 gets connected in series with the relay RL2 is de-energised and power is
the relays leads to electrical noise and electrical appliance. This 10-kilo-ohm, supplied to the appliance through the N/C
shortening of the life of electrical appli- 20W resistor produces a voltage drop terminals of relay RL2.
ances and the relay/stabiliser itself. The of approximately 200V, with the fridge If the mains supply is less than the
costly yet fault-prone stabiliser may be as load. lower limit, pin 2 of IC1 becomes momen-
replaced by this inexpensive high-low The value and wattage of resistor R8 tarily low (nearly ground potential) and
cutout circuit with timer. may be suitably chosen according to the thus the output of IC1 changes state from
The circuit is so designed that relay electrical appliance to be used. It is ‘low’ to ‘high’, resulting in energisation
of relay RL2.
As a result, power
to the load/appli-
ance is cut off.
Now, capacitor
C2 starts charg-
ing through resis-
tor R6 and preset
VR3. When the
capacitor charges
to (2/3)Vcc, IC1
changes state
from ‘high’ to
‘low’. The value
RL1 gets energised when the mains practically observed that after con- of preset VR3 may be so adjusted that it
voltage is above 270V. This causes re- tinuous use, the value of resistor R8 takes about one minute (or as desired) to
sistor R8 to be inserted in series with changes with time, due to heating. So charge capacitor C1 to (2/3)Vcc. Relay is
the load and thereby dropping most of adjustment of preset VR1 is needed two now de-energised and the power is sup-
the voltage across it and limiting the to three times in the beginning. But once plied to the appliance if the mains supply
current through the appliance to a very it attains a constant value, no further voltage has risen above the lower cut-off
low value. adjustment is required. This is the only limit, otherwise the next cycle repeats
If the input AC mains is less than 180 adjustment required in the beginning, automatically.
volts or so, the low-voltage cut-off circuit which is done using a variac. One additional advantage of this
interrupts the supply to the electrical ap- Further, the base voltage of transis- circuit is that both relays are de-
pliance due to energisation of relay RL2. tor T2 is adjusted with the help of pre-set energised when the input AC mains
After a preset time delay of one minute VR2 so that it conducts up to the lower voltage lies within the specified limit
(adjustable), it automatically tries again. limit of the input supply and cuts off and the normal supply is extended to
If the input AC mains supply is still low, when the input supply is less than this the appliance via the N/C contacts of
the power to the appliance is again inter- limit (say, 180V). As a result, transis- both relays.
T
his circuit uses a complementary To test the working of the circuit, bring conducting. Simultaneously, transistor
pair comprising npn metallic tran- a burning matchstick close to transistor T2 also conducts because its base is con-
sistor T1 (BC109) and pnp germa- T1 (BC109), which causes the resistance nected to the collector of transistor T1. As
nium transistor T2 (AC188) to detect heat of its emitter-collector junction to go low a result, relay RL1 energises and switches
(due to outbreak of fire, etc) in the vicinity due to a rise in temperature and it starts on the siren circuit to produce loud sound
and energise a siren. The collector of tran- of a firebrigade siren.
Pin Designation Sound Effect
sistor T1 is connected to the base of tran- Lab note. We have added a
SEL1 SEL2
sistor T2, while the collector of transistor table to enable readers to obtain
No Connection No Connection Police Siren
T2 is connected to relay RL1. +3V No Connection Fire Engine Siren all possible sound effects by re-
The second part of the circuit com- Ground No Connection Ambulance Siren turning pins 1 and 2 as suggested
prises popular IC UM3561 (a siren and Do not care +3V Machine Gun in the table.
machine-gun sound generator IC), which
can produce the sound of a fire-brigade
siren. Pin numbers 5 and 6 of the IC are
connected to the +3V supply when the re-
lay is in energized state, whereas pin 2 is
grounded. A resistor (R2) connected across
pins 7 and 8 is used to fix the frequency of
the inbuilt oscillator. The output is avail-
able from pin 3.
Two transistors BC147 (T3) and
BEL187 (T4) are connected in Darlington
configuration to amplify the sound from
UM3561. Resistor R4 in series with a 3V
zener is used to provide the 3V supply to
UM3561 when the relay is in energised
state. LED1, connected in series with
68-ohm resistor R1 across resistor R4,
glows when the siren is on.
H
ere is a musical call bell that can transistor BC558 is pnp type. loudspeaker. One end of 2.2-mega-ohm
be operated by just bridging the The emitter of transistor BC548 is resistor R1 is connected to the positive rail
gap between the touchplates with shorted to the ground, while that of tran- and the other to a screw (as shown in the
one’s fingertips. Thus there is no need sistor BC558 is connected to the positive figure). The complete circuit is connected
for a mechanical ‘on’/‘off’ switch because terminal. The collector of transistor BC548 to a single pencil cell of 1.5V.
the touch-plates act as a switch. Other is connected to the base of BC558. The When the touch-plate gap is bridged
features include low cost and low power base of BC548 is connected to the washer with a finger, the emitter-collector junc-
consumption. The bell can work on 1.5V (as shown in the figure). The collector of tion of transistor BC548 starts conduct-
or 3V, using one or two pencil cells, and BC558 is connected to pin 2 of musical IC ing. Simultaneously, the emitter-baser
can be used in homes and offices. UM66, and pin 3 of IC UM66 is shorted junction of transistor BC558 also starts
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Two transistors are used for sensing to the ground. The output from pin 1 is conducting. As a result, the collector of
the finger touch and switching on a melody connected to a transistor amplifier com- transistor BC558 is pulled towards the
IC. Transistor BC548 is npn type while prising BEL187 transistor for feeding the positive rail, which thus activates melody
generator IC1 (UM66). The output of IC1
is amplified by transistor BEL187 and fed
to the speaker. So we hear a musical note
just by touching the touch points.
The washer’s inner diameter should
be 1 to 2 mm greater than that of the
screwhead. The washer could be fixed in
the position by using an adhesive, while
the screw can be easily driven in a wooden
piece used for mounting the touch-plate.
The use of brass washer and screw is rec-
ommended for easy solder-ability.
Non-contact
liquid-level controller
R.G. Thiagaraj Kumar
E
FY readers are quite familiar with duction, or variation in resistance or tric current passes through the liquid. The
liquid-level controllers. But the capacitance principle, are employed for corrosion of contacts is a major problem
one presented here is different. level sensing. while using DC excitation. The cost and
Usually, transducers using electric con- In conduction type of sensors, the elec- the size are the two restrictive factors
Readers’ comments: for monitoring a vehicle’s fuel tank level. We are undergraduate students from a
The circuit is indeed very effective and Since the idea of using an electric conduc- leading University of Sri Lanka and have
accurate, while being very simple and tion method is out of question with petrol, constructed the project successfully.
straightforward. Congratulations to the I was agonisingly pondering over various The IC should function when both
author! alternatives. The idea given by Mr Kumar switches S1 and S2 are open and the AC
Based on this circuit, I successfully is what exactly I was looking for. supply is switched on, but we found that
arranged a number of reed switches us- M.K. Chandra Mouleeswaran it becomes on automatically. Also explain
ing a 24-lead flat cable inside a PVC tube, Tamil Nadu the purpose of using diode D3 and capaci-
A
n interesting circuit of a bicycle terminals of IC1 is 28V. Therefore zener tone generator based on IC1 (KA2411).
horn based on a popular, low-cost diode ZD1 is added to the circuit for pro- The dual-tone output signal from pin 8 of
telecom ringer chip is described tection and voltage regulation. IC1 is fed to the primary of transformer
here. This circuit can be powered us- The remainder of the circuit is the X1 (same as used in transistor radios) via
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ing the bicycle dynamo supply and does capacitor C6. The secondary of X1 is con-
not require batteries, which need to be nected to a loudspeaker directly.
replaced frequently. In case you are interested in connect-
The section comprising diodes (D1 ing a piezoceramic element in place of the
and D2) and capacitors (C1 and C2) forms loudspeaker, remove capacitor C6, trans-
a half-wave voltage-doubler circuit. The former X1, and the loudspeaker. Connect
output of the voltage doubler is fed to ca- one end of the piezoceramic disk to pin 5
pacitor C3 via resistor R1. The maximum of IC1 and the other end to pin 8 of IC1
DC supply that can be applied to the input through a 1/4W, 1-kilo-ohm resistor.
IC1 KA2411 is also available in COB
style, with the same pin configuration.
Both packages work equally well. How-
ever, to get the best results with the COB
package, change values of resistors R2
through R4 to 330-kilo-ohm, capacitor C4
to 0.47µF, 63V electrolytic (positive end to
pin 3 of IC1), and C5 to 0.005µF, 63V.
This bicycle horn project can also be
used as a telephone extra ringer by just
removing all components on the left side
of capacitor C3 and connecting the circuit
shown in Fig. 2 to the terminals of capaci-
tor C3.
AC mains phase-sequence
indicator
M.K. Chandra Mouleeswaran
A
mains phase-sequence indicator The basic idea of the circuit is that phase (say, R) is positive while its lagging
serves as a hand-tool in checking when any (say, Y) of the three phases phase (B) is negative, and these states can
electrical wiring, especially the wiring (RYB), taken as a reference phase, is at be easily verified.
of three-phase AC motors. negative-going zero voltage, its leading The circuit comprises two main parts.
Luxurious toilet/
bathroom facility
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A.R. Gidwani
Ag
ed persons in the house and circuits (one each for toilet and bath- are also closed, and vice versa. (Door is
guests often fumble while search room) sharing common power supply and assumed in closed condition with nobody
ing for the toilet and bath- a melody generator-cum-audio warn- inside bathroom/toilet, i.e. reed switch is
room switches at night. Also, very few ing unit. The reed switches S1 and S2 activated.)
of us take care to switch off the lights of are of normally-open type, operated by The operational features of the circuit
toilets/bathrooms after using them. The permanent magnets appropriately fixed are:
circuit given here helps to overcome both to the doors of bathroom and toilet, re- • Lamp and exhaust fan are switched
the problems. spectively. When the doors of bathroom on when the door is opened.
The figure shows two symmetrical and toilet are closed, the reed switches • Soft music is played continuously
EEPROM W27C512
(Winbond) Eraser
j.p. Sharma
E
PROMs (electrically erasable ERPOM. Nowadays a special EEPROM The simple, low-cost circuit presented
PROMs) are generally erased by from Winbond is available in the market, here takes only 100 ms to erase old pro-
ultraviolet rays, and it takes half which is being used in telecommunica- grams electrically. The programming
an hour or so to erase the data in an tion due to its low cost. voltage VPP for the mentioned IC is 12.7V,
Readers’ comments: 3. Is it possible to set pulse time with erasing W27C512 EEPROM.
Please clarify the following: DTM? 2. 27C010 and 27C020 are UV eras-
1. Why all address pins, except 24 4. Is it possible to erase EEPROM able EPROMs (with less than A15 pins).
(A9), are connected to 0V (GND)? other than Winbond make? For 28C020, refer the datasheet.
2. If there are more than A15 address Angika Electronics, Bhagalpur 3. A monostable low pulse of 100 mil-
pins (as in 27C010, 27C020, 28C020 etc), The author, J.P. Sharma, replies: liseconds can be set with DTM.
which address pin willbe connected to Vcc 1. The given configuration is mandatory 4. You can erase similar EEPROMs
(+5V)? as per the manufacturer’s catalogue for electrically.
T
his intelligent electronic lock cir- one has to press tactile switches S1 different numbers on the control panel/
cuit is built using transistors through S4 sequentially. For deception keypad.
only. To open this electronic lock, you may annotate these switches with For example, if you want to use ten
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D. Prabaharan
M
ost Indian amateur radio op- positive feedback between the two
erators prefer to operate on is provided by ceramic filter CF1.
SSB (single sideband) and CW A significant amount of feedback
because these carry the signal over a long is provided only at the operating
distance for a given transmitter power. frequency of the filter, which is
Broadcast receivers are not meant to 455 kHz. So the circuit oscillates
directly receive Morse code transmission at this frequency. The ceramic filter
on SSB and CW. Short-wave listeners gives good frequency stability and
require some arrangement to receive the requires no adjustment in order to
same. One such arrangement comprises a produce the correct frequency. This
simple IF BFO (beat frequency oscillator), BFO is meant for single-sideband
which is an RF oscillator of conventional reception only.
type. The output of BFO is heterodyned There is no need to connect
to beat with another frequency to obtain BFO to receiver. Tune your BC
a resultant frequency (difference of the clarity. When BFO signal is heterodyned receiver to any SSB signal, and then on
two frequencies) lying in the audio range with SSB signal, this RF acts like a carrier keeping BFO just close to it, you may
(about 1 kHz). and the signal is well resolved. notice some hissing noise in your receiver.
BFO can be used to get an audio note The BFO circuit comprises transis- Match BFO frequency to your receiver’s
from CW reception and also to resolve SSB tors T1 and T2, which are connected IF, which may be between 452 and 460
signals. An SSB signal is transmitted with- in a straightforward two-stage, direct- kHz, until you get clear sound. If the BFO
out carrier signal. In ordinary receivers, it coupled, common-emitter configuration. signal is too strong, increase the distance
does not produce speech with sufficient The input and output are in phase and between BFO and receiver.
H
ere are two simple, low-cost cir- tape recorder, CD player, and amplifier). The circuits will also protect the
cuits that can be used to shut These circuits are helpful to those in the equipment from getting damaged due to
off the mains supply to any habit of falling asleep with their music high-voltage spikes whenever there is a
audio or video equipment (such as system on. resumption of power after a break. This
H
ere is a low-cost, invisible laser used to direct the laser beam around (X1 and X2), two 6V relays (RL1 and
circuit to protect your house the house to form a net. The laser beam RL2), an LDR, a transistor, and a few
from thieves or trespassers. A is directed to finally fall on an LDR that other passive components. When switches
laser pointer torch, which is easily avail- forms part of the receiver unit as shown S1 and S2 are activated, transformer
able in the market, can be used to operate in Fig. 2. Any interruption of the beam X1, followed by a full-wave rectifier and
this device. by a thief/trespasser will result into smoothing capacitor C1, drives relay RL1
The block diagram of the unit shown energisation of the alarm. The 3V power- through the laser switch.
in Fig. 1 depicts the overall arrangement supply circuit is a conventional full-wave The laser beam should be aimed contin-
for providing security to a house. A laser rectifier-filter circuit. Any alarm unit uously on LDR. As long as the laser beam
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torch powered by 3V power-supply is used that operates on 230V AC can be con- falls on LDR, transistor T1 remains forward
for generating a laser beam. A combina- nected at the output. biased and relay RL1 is thus in deenergised
tion of plain mirrors M1 through M6 is The receiver unit comprises condition. When a person crosses the line
two identical of laser beam, relay RL1 turns ON and
step-down transformer X2 gets energised to provide
transformers a parallel path across N/C contact and the
T
his water-level indicator-cum-
alarm circuit is configured around
the well-known CMOS input-
compatible, 7-channel IC ULN2004 Dar-
lington array.
As the water level rises in the tank, it
comes in contact with probes P1 through
P7 and thereby makes pins 7 through 1
high, sequentially. As a result, the cor-
responding output pins 10 through 16 go
low one after the other, and LED1 through When water comes in contact with the the piezo-buzzer connected to output pin
LED7 light up in that order. final probe P7, it results in sounding of 16 along with LED7.
T
his circuit for measurement of in- inductance L in Henries, and time t in contacts of two-way push-to-on/off switch
ductance and capacitance can be seconds. S1. When switch S1 is pushed, the
used to test whether the values of The voltage across capacitor in R-C capacitor’s voltage begins to grow (or
inductors and capacitors quoted by the network rises exponentially to 0.632 of the inductor’s voltage begins to drop).
manufacturer are correct. the applied voltage and voltage across Simultaneously, the output of timer 555
The principle used in the circuit is inductor in R-L network degrades expo- IC, which is wired as an astable multi-
based on the transient voltages produced nentially to 0.368 of the applied voltage vibrator, is passed through NOR gates
across inductors and capacitors connected in one RxC and one L/R time (referred to N1 and N2 and applied to the counter
as series R-L and R-C networks, respec- as time constant T of the combination), circuit.
tively, across a constant voltage source. respectively. When the time constant (one CxR or
The time constant for R-C and R-L net- When the inductor/capacitor under one L/R, as the case may be) reaches, gate
works is given by the relationships t=RxC test is connected across terminals A N2 is inhibited as its pin 2 goes high and
and L/R, respectively, where resistance and B shown in the circuit, it is dis- the counter circuit freezes. Mode switch
R is in ohms, capacitance C in Farads, charged through the normally-closed S2 is to be kept in position ‘a1’ for capaci-
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capacitances can
be measured,
and when it is in
position a2, in-
ductances can be
measured.
4. When
range-select
switch S3 is in
position ‘b1’, the
output of 555 IC
will have a time
inductors cov- period of 1 ms
Table
ered in each (frequency = 1 kHz), and when it is in posi-
555 IC Capacitance Inductance Displayed
range, together tion ‘b2’, the output of 555 IC will have a
Time period range range value
C=Tx10–3 L=Tx103 with displayed time period of 1 µs.
1 ms When T=1 ms, When T=1 ms, L=1H Capacitance in values, are (EFY lab note. The guaranteed
(Switch S3 in C=1 µF When T=9999 ms, µF and inductance shown in the frequency of NE555 is limited to 500
position b1) When T= L=9999 H in H table. kHz, and hence it may not be possible to
9999 ms, From the get 1µs period. One may therefore use a
C=9999 µF
table it is obvi- 2nF capacitor to get a period of 2 µs and
1 µs When T=1 µs, When T=1 µs, Capacitance in nF
(Switch S3 in C=1 nF L=1 mH and inductance ous that this multiply the displayed value by 2, in b2
position b2) When T=9999 µs, When T=9999 µs, in mH circuit can range.)
C=9999 nF L=9.999H measure ca- 5. Use a breadboard for connecting
=9.999 µF =9999 mH pacitance from inductors or capacitors across terminals
1 nF to 9,999 A and B.
tance measurement and in position ‘a2’ for µF and inductance from 1 mH to 9999 6. Using both the ranges for meas-
inductance measurement. H. While presets VR1 and VR2 are to be uring an inductor or capacitor enables
As series resistance R1 is 1 kilo-ohm, adjusted for the in-circuit value of 1.717 one to obtain the accurate value. For
the capacitance value is given by the kilo-ohm each, the in-circuit value of example, a 4.7µF capacitor will display
relationship C=Tx10–3 while the inductor preset VR3 is close to 4.7 kilo-ohm. If a only 4 µF when measured in range b1 ,
value is given by the relationship L=Tx103. regulated +5V is not used, the measure- while in b2 range it will display 4700 nF
The time period (1/frequency) of timer ment of capacitance and inductance will (or 4.7 µF).
555 (IC2) is adjusted for 1 ms and 1 µs in be imprecise. 7. Don’t press switch S1 before insert-
‘b1’ and ‘b2’ positions, respectively, of the Given below are some important ing the capacitor or the inductor between
range switch. The values of capacitors and points to be taken care of: terminals A and B.
Readers’ comments: tor and the inductor aren’t connected for in the said circuit idea? Kindly tell me the
I have asssembled the circuit, which measurement, it still shows some values. cause of this problem.
doesn’t work at all. It is showing different I have checked all the ICs and found them Asif Draboo
values all the time. Even when the capaci- all in good condition. Is there any misprint Bemiba, Jammu & Kashmir
Under-/Over-Voltage Beep
for Manual Stabiliser
K. Udhaya Kumaran
for low level one may preset low-
M
anual stabilisers are still popu- the output voltage may reach the preset level AC voltage 20V to 30V above
lar because of their simple con- auto-cut-off limit to switch off the load minimum operating voltage for a
struction, low cost, and high re- without the user’s knowledge. To turn on given load.
liability due to the absence of any relays the load again, one has to readjust the The primary winding terminals of
while covering a wide range of mains AC stabiliser voltage using its rotary switch. step-down transformer X1 are connected
voltages compared to that handled by au- Such operation is very irritating and in- to the output terminals of the manual
tomatic voltage stabilisers. These are used convenient for the user. stabiliser. Thus, 9V DC available across
mostly in homes and in business centres This under-/over-voltage audio alarm capacitor C1 will vary in accordance with
for loads such as lighting, TV, and fridge, circuit designed as an add-on circuit for the voltage available at the output ter-
and in certain areas where the mains the existing manual stabilisers over- minals of the manual stabiliser, which is
AC voltage fluctuates between very low comes the above problem. Whenever the used to sense high or low voltage in this
(during peak hours) and abnormally high stabiliser’s output voltage falls below a circuit.
(during non-peak hours). preset low-level voltage or rises above Transistor T1 in conjunction with
Some manual stabilisers available in a preset high-level voltage, it produces zener diode ZD1 and preset VR1 is used
the market incorporate the high-voltage different beep sounds for ‘high’ and ‘low’ to sense and adjust the high-voltage level
auto-cut-off facility to turn off the load voltage levels—short-duration beeps for beep indication. Similarly, transistor
when the output voltage of manual stabi- with short intervals between successive T2 along with zener ZD2 and preset VR2 is
liser exceeds a certain preset high voltage beeps for ‘high’ voltage level and slightly used to sense and adjust low voltage level
limit. The output voltage may become high longer-duration beeps with longer interval for beep indication.
due to the rise in AC mains voltage or due between successive beeps for ‘low’ voltage When the DC voltage across ca-
to improper selection by the rotary switch level. By using these two different types pacitor C1 rises above the preset
on manual stabiliser. of beep sounds one can readily readjust high-level voltage or falls below the
One of the major disadvantage of us- the stabiliser’s AC voltage output with the preset low-level voltage, the collector
ing a manual stabiliser in areas with a help of the rotary switch. There is no need of transistor T2 becomes high due to
wide range of voltage fluctuations is that of frequently checking voltmeter reading. non-conduction of transistor T2, in ei-
one has to keep a watch on the manual It is advisable to preset the high- ther case. However, if the DC voltage
stabiliser’s output voltage that is dis- level voltage 10V to 20V less than sampled across C1 is within the preset
played on a voltmeter and keep changing the required high-voltage limit for high- and low-level voltage, transistor
the same using its rotary switch. Or else, auto-cut-off operation. Similarly, T2 conducts and its collector voltage
gets pulled to the
ground level. These
changes in the col-
lector voltage of tran-
sistor T2 are used to
start or stop oscilla-
tions in the astable
multivibrator circuit
that is built around
transistors T3 and
T4. The collector of
transistor T4 is con-
nected to the base of
Ultra-Sensitive
Solidstate Clap Switch
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Pradeep G.
H
ere is the circuit of a highly sen- transistor T4 is further amplified by tran- clap signal, the lamp is either switched
sitive clap switch that can be sistor T5, whose output is used to trigger ‘on’ or ‘off’.
operated from a distance of up to a monostable multivibrator wired around Triac 8T44A (or ST044) can drive load
10 metres from the microphone. the 555 timer (IC1). of up to 4-amp rating. The 12V DC for
Signals picked up by the microphone The output of IC1 is used as a clock for operation of the circuit is directly derived
are amplified by transistors T1, T2, and decade counter 4017 (IC2) that is wired from the mains using rectifier diode D2,
T3. Diode D1 detects clap signals and the as a divide-by-two counter. For each suc- current-limiting resistor R16, and 12V
resulting positive voltage is applied to the cessive clap, transistor T6 conducts and zener ZD1 shunted by filter capacitor C7.
base of transistor T4. The output from cuts off alternately. As a result, for each
H
ere is a simple circuit to obtain steps as shown in the table. The input The first section of the circuit com-
variable DC voltage from 1.25V voltage may lie anywhere between prises a digital up-down counter built
to 15.19V in reasonably small 20V and 35V. around IC1—a quad 2-input NAND
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Vyjesh M.V.
B
uying a microphone for a com- sound card. With the help of a
puter is costly. Especially when multimeter, find out the posi-
there is a need to have two mi- tive terminal out of the three
crophones—one for modem and another wires.
for sound card—or if the present micro- There exists a potential dif-
phone is not working properly and needs ference of 4V or so between the
to be replaced, you are likely to feel the positive and ground terminals.
burden of extra cost. Here is a low-cost The third terminal will obvi-
microphone circuit that comes within ously be for the signal input.
your budget. provides the necessary positive voltage The positive terminal is used for biasing
All sound cards and modems have a for a condenser microphone. Before build- the condenser microphone. After iden-
socket for microphone that is in compatible ing the full circuit, connect three wires to tifying all the terminals, connect them
with stereo jack pins. The stereo socket the jackpin, switch on the computer, and as shown in the accompanying circuit
takes condenser microphone as input and insert the jack pins; into the socket of the diagram.
Z
ener diodes available in the mar- a zener diode. For full-fledged zener diode testing
ket are specified according to their The dynamic impedance characteris- you will have to refer to the manufac-
breakdown voltage as well as toler- tics of a zener diode determine as to how turer’s datasheet to check zener diode
ance. The tolerance may vary from 5 per well the zener diode regulates its own parameters such as zener voltage, power,
cent to 20 per cent. The circuit of a versa- breakdown voltage. Thus this circuit can and current (maximum/nominal) rat-
tile zener diode tester presented here ena- be used to compare the dynamic imped- ings. In addition, temperature coefficient
bles you to verify the specified breakdown ance characteristics of zener diodes from and dynamic impedance have also to be
voltage and tolerance values. In addition, a lot and segregate/categorise them ac- checked if zener diode is to be used for
you can check the dynamic impedance of cordingly. critical functions such as voltage reference
A
DTMF-based IR transmitter and (determined by capacitor C1 and resis- shielded from direct IR light transmis-
receiver pair can be used to rea- tors R1 and R16 in the base circuit of sion path of IR LED1 by using any
lise a proximity detector. The the transistor) to generate DTMF tone opaque partition so that it receives only
circuit presented here enables you to (combination of 697 Hz and 1209 Hz) the reflected IR light.) On detection of
detect any object capable of reflecting corresponding to keypad digit “1” con- the signal by photodetector, it is coupled
the IR beam and moving in front of the IR tinuously. to DTMF decoder IC2 through emitter-
LED photodetector pair up to a distance of LED 2 is used to indicate the tone follower transistor T1.
about 12 cm from it. output from IC3. This tone output is When the valid tone pair is detected
The circuit uses the commonly avail- amplified by Darlington transistor pair of by the decoder, its StD pin 15 (shorted to
able telephony ICs such as dial-tone gen- T3 and T4 to drive IR LED1 via variable TOE pin 10) goes ‘high’. The detection of
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erator 91214B/91215B (IC1) and DTMF resistor VR1 in series with fixed 10-ohm the object in proximity of IR transmitter-
decoder CM8870 (IC2) in conjunction resistor R14. Thus IR LED1 produces receiver combination is indicated by
with infrared LED (IR LED1), photodiode tone-modulated IR light. Variable re- LED1. The active-high logic output pulse
D1, and other components as shown in sistor VR1 controls the emission level (terminated at connector CON1, in the
the figure. A properly regulated 5V DC to vary the transmission range. LED 3 figure) can be used to switch on/off any
power supply is required for operation of indicates that transmission is taking device (such as a siren via a latch and
the circuit. place. relay driver) or it can be used to clock a
The transmitter part is configured A part of modulated IR light signal counter, etc.
around dialer IC1. Its row 1 (pin 15) and transmitted by IR LED1, after reflection This DTMF proximity detector finds
column 1 (pin 12) get connected together from an object, falls on photodetector applications in burglar alarms, object
via transistor T2 after a power-on delay diode D1. (The photodetector is to be counter and tachometers, etc.
A
simple, low-cost hardwired step such as moving toys etc is presented here. with approx. 1Hz frequency. The fre-
per motor control circuit that can The circuit comprises a 555 timer IC quency is determined from the following
be used in low-power applications, configured as an astable multivibrator relationship:
Low-Cost Intercom
Pradeep G.
T
he intercom circuit described here components in addition to condenser
uses two transistors, an audio microphone and low-wattage speaker
transformer, and a few passive (refer Fig. 1). The complete unit
can be made on a
general-purpose
veroboard.
The micro-
phone signals are
amplified by a
two-stage transistor C3 gets connected between the base of
amplifier, while the transistor T2 and the top end of primary
speaker is driven winding of audio output transformer. As a
through an audio result, the amplifier circuit wired around
output transformer transistor T2 gets converted into a Hartley
(similar to the one oscillator and produces an audible tone
used in transis- for call-bell.
tor radios). When To build a two-way intercom set, make
ring button (push- two identical units with the speaker of
to-on switch S1) is each circuit installed near the other unit
pressed, capacitor as shown in Fig. 2.
T
o operate car audio (or video) sys-
tem from household 230V AC
mains supply, you need a DC adap-
tor. DC adaptors available in the market
are generally costly and supply an unregu-
lated DC. To overcome these problems, x1
an economical and reliable circuit of a
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high-power, regulated DC adaptor using
reasonably low number of components is
presented here.
Transformer X1 steps down 230V AC
mains supply to around 30V AC, which GND
is then rectified by a bridge rectifier
comprising 1N5406 rectifier diodes D1
through D4. The rectified pulsating DC is
smoothed by two 4700µF filter capacitors unregulated DC sup-
C1 and C2. ply, resulting in the
The next part of the circuit is a series- blowing of fuse F1
transistor regulator circuit realised using instantly. This offers
high-power transistor 2N3773 (T1). Fixed- guaranteed protec-
base reference for the transistor is taken tion to the equipment
from the output pin of 3-pin regulator IC1 connected and to the
(LM 7806). The normal output of IC1 is circuit itself.
raised to about 13.8 volts by suitably bias- This circuit can
ing its common terminal by components be assembled using
circuit is added. If the output voltage
ZD1 and LED1. This simple arrangement a small general-purpose PCB. A good-
exceeds 15V due to some reason such as
provides good, stable voltage reference at quality heat-sink is required for transis-
component failure, the SCR fires because
a low cost. LED1 also works as an output tor T1. Enclose the complete circuit in a
of the breakdown of zener ZD2. Once SCR
indicator. readymade big adaptor cabinet as shown
fires, it presents a short-circuit across the
Finally, a crowbar-type protection in the figure.
Readers’ comments:
The way of biasing of transistor
T1 seems to be wrong. As per the da-
tasheet, the transitor T1 should be of
pnp type and connected as shown in
Fig. 1 here.
Chittaranjan Parida
Cuttack Fig. 2: Schematic of a conventional series
Fig. 1: Reader’s modification to battery regulator
The author, T.K. Hareendran, re-
eliminator circuit
plies: role of a bypass transistor. At low
As clearly mentioned in the text, transistor T1 regulator IC1 is used to increase the efficiency load currents, all the load current is
works as a series regulator transistor. In conven- and lifetime. The schematic of a conventional provided by IC1 and whenever the
tional circuits, one ordinary zener diode is used series regulator is shown in Fig. 2. load current is increased beyond a
to provide a fixed-base bias to T1. The circuit The circuit indicated by you, preset value (decided by R) transis-
published is an improved version based on NSC datasheet, is in fact tor T1 comes into picture and sup-
and the fixed three-terminal voltage a current booster. Here T1 plays the plies all the excess current.
T
he circuit presented here waters 1 of op-amp N1 goes ‘low’. This triggers To arrange the circuit, insert copper
your plants regularly when you timer IC2 (NE 555) configured as a monos- wires in the soil to a depth of about 2 cm,
are out for a vacation. table multivibrator. As a result, relay RL1 keeping them 3 cm apart. When the soil
The circuit comprises a sensor part is activated for a preset time. The water gets dried, adjust VR1 towards ground
built using only one op-amp (N1) of quad pump starts immediately to supply water rail until LED1 turns off and relay RL1
op-amp IC LM324. Op-amp N1 is con- to the plants. is energised. The motor starts pumping
figured here as a comparator. Two stiff As soon as the soil becomes suf- the water. LED1 glows up as the water
copper wires are inserted in the soil con- ficiently wet, the resistance between reaches the probes.
taining plants. As long as the soil is wet, sensor probes decreases rapidly. This For small areas a small pump such as
conductivity is maintained and the circuit causes pin 1 of op-amp N1 to go ‘high’. the one used in air coolers is able to pump
remains off. LED1 glows to indicate the presence of enough water within 5 to 6 seconds. The
When the soil dries out, the resistance adequate water in the soil. The threshold timing components for IC2 are selected
between the copper wires (sensor probes point at which the output of op-amp N1 accordingly. The timing can be varied with
A and B) increases. If the resistance in- goes ‘low’ can be changed with the help the help of preset VR2.
creases beyond a preset limit, output pin of preset VR1. The circuit is more effective indoors
if one intends to use
it for long periods.
This is because the
water from reservoir
(bucket, etc) evapo-
rates rapidly if it
is kept in the open.
For regulating the
flow of water, either
a tap can be used or
one end of a rubber
pipe can be blocked
using M-seal com-
pound, with holes
punctured along its
length to water sev-
eral plants.
H
ere is a simple telephone ring tone and needs only DC voltage (4.5V loud when this circuit is operated on
tone generator circuit designed DC to 12V DC). One may use this cir- +12V DC power supply. However, the
using only a few components. cuit in ordinary intercom or phone- volume of ring sound is adjustable.
It produces simulated telephone ring type intercom. The sound is quite The commonly available 14-stage
binary ripple counter with built-in oscil- spectively. ‘on’ and ‘off’ at 20Hz for ring tone sound
lator (CMOS IC CD4060B) is used to Transistors T1 through T3 are cas- by transistor T3. 20Hz pulses are avail-
generate three types of pulses, which caded in such a way that the positive able at the collector of transistor T3 for
are available from pin 1(O11), pin 3 (O13), voltage available at the emitter of tran- 0.4-second duration. After a time interval
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and pin 14 (O7), respectively. Preset VR1 sistor T1 is extended to the collector of of 0.4 second, 20Hz pulses become again
is adjusted to obtain 0.3125Hz pulses Transistor T3 when the outputs of all available for another 0.4-second dura-
(1.6-second ‘low’ followed by 1.6-second the three stages are low. As a result, tion. This is followed by two seconds of
‘high’) at pin 3 of IC1. At the same time, transistors T1 through T3 are forward nosound interval. Thereafter the pulse
pulses available from pin 1 will be of biased for 0.4, 1.6, and 0.025 seconds, pattern repeats itself.
1.25 Hz (0.4-second ‘low’, 0.4-second respectively and reverse biased for simi- Refer the figure that indicates
‘high’) and 20 Hz at pin 14. The three lar durations. waveforms available at various points
output pins of IC1 are connected to base Using a built-in oscillator-type piezo- including the collector of transistor T3.
terminals of transistors T1, T2, and T3 buzzer produces around 1kHz tone. In Preset VR2 can be used for adjusting the
through resistors R1, R2, and R3, re- this circuit, the piezo-buzzer is turned amplitude of the ring tone.
Dual-input high-fidelity
audio mixer
Prasad J.
Th
e circuit described here is based MOSFET 3N200. One may, however, MOSFET such as 3N187 and BF966. (It
on the superior characteristics of substitute it with any other dual-gate is to be noted that BF966 is not gate-pro-
dual-gate MOSFET (metal- tected and hence
oxide semiconductor field-effect transistor). calls for suitable
It exhibits a very high input impedance precaution in han-
that lends for good sensitivity and very dling it.)
less loading of the input signal source. The audio fre-
Low cross-modulation characteristic leads quency (AF) input
to minimal distortion of the output with from the first chan-
respect to the input signals. Also, the nel (CH1) is ap-
MOSFET offers low feedback capacitance plied on gate 1 (G1)
and high transconductance. All these ad- of the MOSFET
vantages make the MOSFET the most ef- through 500-kilo-
fective for high-quality mixer and converter ohm potentiometer
applications. VR1. The AF input
This dual-input audio frequency from the second
mixer circuit employs a single dual-gate channel (CH2) is
Unipolar/bipolar
triangular and bipolar
square wave generator
Yogesh Kataria
T
he circuit given here is capable of S1 is open, it generates unipolar trian-
generating unipolar and bipolar gular and bipolar square waves—both
triangular waves as well as bi- having double the frequency in the
polar square waves. In unipolar mode, first case.
the output frequency is double that of Op-amp 301 acting as a compara-
bipolar mode (using identical component tor produces bipolar square wave with
values). output swinging between +Vcc and –VEE.
When switch S1 is closed, the circuit The square wave output is fed to op-amp
generates bipolar triangular as well as 741 that is configured as an integrator to
bipolar square waves, and when switch produce a triangular waveform.
Figs 2 and
3 show the
waveforms
with switch S1
in closed and
open positions,
respectively,
using 0.047µF
capacitor C and
in-circuit value
of preset VR1 as
28 kilo-ohm. The
circuit is capable
of working on
a few hertz to
around 250kHz.
T
his small circuit, based on popu- the oscillator circuit built around gates transistor T1 for a short duration. (The
lar CMOS NAND chip CD4093, N2 and N3 is enabled and it controls the combination of capacitor C1 and resistor
can be effectively used for pro- ‘on’/‘off’ timings of the relay via transis- R5 acts as the differentiating circuit.)
tecting your expensive car audio system tor T2. (Relay contacts can be used to As a result, buzzer in the collector
against theft. energise an emergency beeper, indicator, terminal of T1 beeps for a short duration
When 12V DC from the car battery car horns, etc, as desired.) to announce that the security circuit is
is applied to the gadget (as indicated by Different values of capacitor C2 give intact. This ‘on’ period of buzzer can be
LED1) through switch S1, the circuit different ‘on’/‘off’ timings for relay RL1 to varied by changing the values of capacitor
goes into standby mode. LED inside be ‘on’/‘off’. With 100µF we get approxi- C1 and/or resistor R5.
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optocoupler IC1 is lit as its cathode mately 5 seconds as ‘on’ and 5 seconds as After construction, fix the LED and
terminal is grounded via the car audio ‘off’ time. buzzer in dashboard as per your require-
(amplifier) body. As a result, the output Gate N4, with its associated com- ment and hide switch S1 in a suitable lo-
at pin 3 of gate N1 goes low and disables ponents, forms a self-testing circuit. cation. Then connect lead A to the body of
the rest of the circuit. Normally, both of its inputs are in ‘high’ car stereo (not to the body of vehicle) and
Whenever an attempt is made to re- state. However, when one switches off the lead B to its positive lead terminal. Take
move the car audio from its mounting by ignition key, the supply to the car audio is power supply for the circuit from the car
cutting its connecting wires, the optocou- also disconnected. Thus the output of gate battery directly.
pler immediately turns off, as its LED N4 jumps to a ‘high’ state and it provides a Caution. This design is meant for car
cathode terminal is hanging. As a result, differentiated short pulse to forward bias audios with negative ground only.
Readers’ comments: Also clarify the use of R3 in sign. The fault indicated
The oscillator circuit built around the circuit and show pin connec- may be due to a faulty opto-
gates N1, N2, and N3 is not working. The tions of MCT2E. coupler (MCT2E).
circuit works like a timer when pin 2 of D. Mohan Kumar, Trivandrum Resistor R3 (100 kilo-
MCT2E is connected to the body of the The author, T.K. Hareendran, ohm) is used to pull down
audio. There is no change in the perform- replies: the input of gate N1 (wired
ance when pin 2 is left hanging. But when Carefully recheck your assembled as inverter) in active state.
pins 2 and 4 of MCT2E are shorted, the circuit. No modification/corrections Fig. 1: MCT2E pin The pin configuration of
circuit starts working. are required in the published de- configuration MCT2E is shown in Fig. 1.
T
his hardware-cum-software project display, while data output lines D4 to D7 minute decoder (IC2) is used for electronic
is meant to control hardware (pins 6 through 9) are connected to four roulette.
through software. The hardware data inputs of the decoder used for hour The dial clock and electronic roulette
using LEDs to simulate both dial clock and display. functions, which can be selected via the
electronic roulette is rather simple. Since the outputs of these decoders are software program, are explained below:
Of the two 4-line-to-16-line decoders active-low, the positive terminals of LEDs Dial clock. When dial clock is selected,
used in the circuit, the first (IC1) drives are made common. This obviates the need system time is displayed on the LED panel.
‘hour LEDs’ and the other (IC2) drives to use additional inverters. In accordance The hour-indicating LED glows continu-
‘minute LEDs.’ These decoders are in- with 4-bit binary address at inputs A ously, while minute-indicating LED blinks
terfaced directly to the PC’s printer port through D of decoders, only one of the 16 for each odd second (i.e. 1, 3, 5, ...., and so
provided on its backside. outputs at a time goes active-low to light on). The clock incorporates hourly chime
Data output lines D0 to D3 (pins 2 the corresponding LED. and alarm setting features. Chime and
through 5 of 25-pin ‘D’ connector) of the Since a dial clock requires only 12 alarm sound can be distinguished from the
printer port are connected to four address LEDs, only 12 of 16 outputs of 74154 duration for which it will sound.
inputs of the decoder used for minute decoders are used in this circuit. Only the Electronic roulette. Roulette is a
game of chance that basically comprises
a circular wheel divided into a number
of sectors that are numbered serially and
a pointer. There exists a relative motion
between the pointer and the wheel. The
rotation is initiated by mechanical means.
The wheel is allowed to stop itself and the
number indicated by the pointer decides
the winner.
This game can also be arranged elec-
tronically by using sequential running
lights, which will simulate the rotating
wheel, and making them to stop at ran-
dom position. The chance of a number to
be winner is 1 out of 12 in the PC-based
electronic roulette explained here. The
software for dial clock and electronic rou-
lette is written in ‘C’ language.
For simulation of dial clock, the soft-
ware uses gettime () function to read time
from the computer, which is then stored
in a variable. This time is written into
DialCLK.C
#include <stdio.h> if(ho>12) scanf(“%d” ,&mns);
#include <dos.h> { printf(“Enter seconds\n”);
#include <stdlib.h> ho=ho-12; scanf(“%d” ,&scs);
#define PORT 0x0378 } Aclock(hrs,mns,scs);
main() if(ho==0) }
{ int k=0; { alarm(int beps) /*Function to produce beeping sound*/
clrscr(); ho=12; {
gotoxy(30,10); } int i;
printf(“1.(D)ial Clock\n”); i=sc % 2; for(i=0;i<beps;i++)
gotoxy(30,12); mn=mn*i; /*Making minute LED to blink*/ {
print(“2.(R)un Electronic Roulette \n”); mn=mn/5; sound(1500);
gotoxy(30,14); outportb(PORT,ho*16+mn); delay(100);
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printf(“3.(E)xit\n”); printf(“hour:min:sec = %2d:%02d:02d\n”,ho,mnt,sc); nosound();
do gotoxy(30,10); delay(100);
{ printf(“1.(G)oto MAIN MENU\n”); }
k=getch(); gotoxy(30,12); }
k=touchper(k); printf(“2.(S)et Alaram\n”); Roulet()/*Function for Roulette Wheel*/
if(k==’D’) if(shor==ho&&smin==mnt&&ssec==sc) {
{ { int i,k=0;
Aclock(0,0,0); alarm(15); clrscr();
} } gotoxy(30,10);
if(k==‘R’) if(mnt==0&&sc==0) printf(“1.Press any key to Reset\n”);
{ { gotoxy(30,12);
Roulet(); alarm(1); printf(“2.(P)lay\n”);
} } gotoxy(30,14);
} if(bioskey(1))/* To check Whether any keyis pressed */ printf(“3.(G)oto MAIN MENU\n”);
while(k!=‘E’); k=getch(); k=getch();
clrscr(); k=toupper(k); k=toupper(k);
print(“By Vijaya kumar.P,3rd Sem,E&C, K.V.G.C.E,Sullia\n”); if(k==‘S’) do
printf(“Dedicated to Father of Electricity Michael Faraday who { {
is my favourite Scientist.\n”); setala(); for(i=1;i<13;i++)/* To generate decimal number from 1 to 12*/
exit(0); } {
} } if(bioskey(1))
Aclock(int shor,int smin,int ssec) while(k!=‘G’); k=getch();
{ { k=toupper(k);
int ho,sc,mn,mnt,k,i=0; outportb(PORT,0); if(k==‘P’)
struct time tim; main(); break;
clrscr(); } outportb(PORT,i);/*outputting binary equivalents of i
do } through Data pins of LPT port*/
{ setala() /*Function to set Alarm*/ delay(50);
gettime(&tim); { }
gotoxy(30,8); int hrs,mns,scs; }
ho=tim.ti_hour; clrscr(); while(k!=‘G’);
mn=tim.ti_min; printf(“Enter hour\n”); outportb(PORT,0);
sc=tim.ti_sec; scanf(“%d” ,&hrs); main();
mnt=mn; printf(“Enter Minute\n”); }
Long-Range
Cordless Burglar Alarm
t.k. hareendran
T
his long-range cordless burglar pressed and held in that position, the
alarm circuit makes use of a handset starts beeping to indicate that
cordless telephone (CLT) unit with somebody is calling. This function is used
paging facility and a few low-cost discrete here to build the gadget. The system con-
components. The circuit is so simple that sists of three sub-assemblies:
even a novice can easily construct it with- 1. Wireless beeper. The handset of
out any difficulty. the CLT.
Fig. 1
When the ‘page’ button on a CLT is 2. Infrared transmitter. A number
Water-Level Controller
joydeep kumar chakraborty
I
n most houses, water is first stored overhead tank (OHT) located on the roof. when the overhead tank starts overflow-
in an underground tank (UGT) and People generally switch on the pump when ing. This results in the unnecessary wast-
from there it is pumped up to the their taps go dry and switch off the pump age and sometimes non-availability of
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connected through water. As a result,
transistor T1 gets forward biased and
starts conducting. This, in turn, switches
transistor T2 on. Initially, when the
overhead tank is empty, transistors T3
and T5 are in cut-off state and hence pnp
transistors T4 and T6 get forward biased
via resistors R5 and R6, respectively. and C-L, respec-
As all series-connected transistors tively. Resistor R4
T2, T4, and T6 are forward biased, they ensures that transis-
conduct to energise relay RL1 (which is tor T2 is ‘off’ in the
also connected in series with transistors absence of any base
T2, T4, and T6). Thus the supply to the voltage. Similarly,
pump motor gets completed via the lower resistors R5 and R6
set of relay contacts (assuming that switch ensure that transis-
S2 is on) and the pump starts filling the tors T4 and T6 are
overhead tank. ‘on’ in the absence
Once the relay has energised, tran- of any base voltage.
sistor T6 is bypassed via the upper set Switches S1 and S2
of contacts of the relay. As soon as the can be used to switch
water level touches probe L in the over- on and switch off, re-
head tank, transistor T5 gets forward spectively, the pump
biased and starts conducting. This, in manually.
turn, reverse biases transistor T6, which You can make
then cuts off. But since transistor T6 is and install probes
bypassed through the relay contacts, the on your own as per
pump continues to run. The level of water the requirement and
continues to rise. facilities available.
When the water level touches probe However, we are de-
H, transistor T3 gets forward biased and scribing here how the
starts conducting. This causes reverse probes were made for
biasing of transistor T4 and it gets cut this prototype.
off. As a result, the relay de-energises The author used a piece of non- in Fig. 2.
and the pump stops. Transistors T4 and metallic conduit pipe (generally used for Care has to be taken to ensure that
T6 will be turned on again only when the domestic wiring) slightly longer than the probes H and L do not touch wire C di-
water level drops below the position of depth of the overhead tank. The common rectly. Insulation of wires is to be removed
L probe. wire C goes up to the end of the pipe from the points shown. The same arrange-
Presets VR1, VR2, and VR3 are to be through the conduit. The wire for probes ment can be followed for the underground
adjusted in such a way that transistors L and H goes along with the conduit from tank also. To avoid any false triggering
T1, T3, and T5 are turned on when the the outside and enters the conduit through due to interference, a shielded wire may
water level touches probe pairs C-S, C-H, two small holes bored into it as shown be used.
P
ortable loads such as video cam- are used to sense the presence of 230V AC around 7 mA. Alternatively, one may use
eras, halogen flood lights, elec- field around the live wire and buffer weak two 1.5V R6- or AA-type batteries. Using
trical irons, hand drillers, grind- AC voltage picked from the test probe. The this gadget, one can also quickly detect
ers, and cutters are powered by connect- voltage at output pin 10 of gate N2 can en- fused small filament bulbs in serial loops
ing long 2- or 3-core cables to the mains able or inhibit the oscillator circuit. powered by 230V AC mains.
plug. Due to prolonged usage, the power When the test probe is away from any The whole circuit can be accommo-
cord wires are subjected to mechanical high-voltage AC field, output pin 10 of dated in a small PVC pipe and used as
strain and stress, which can lead to in- gate N2 remains low. As a result, diode a handy broken-wire detector. Before
ternal snapping of wires at any point. In D3 conducts and inhibits the oscillator detecting broken faulty wires, take out
such a case most people go for replacing circuit from oscillating. Simultaneously, any connected load and find out the faulty
the core/cable, as finding the exact loca- the output of gate N3 at pin 6 goes ‘low’ to wire first by continuity method using any
tion of a broken wire is difficult. In 3-core cut off transistor T1. As a result, LED1 goes multimeter or continuity tester. Then con-
cables, it appears almost impossible to off. When the test probe is moved closer to nect 230V AC mains live wire at one end of
230V AC, 50Hz mains live the faulty wire, leaving the other end free.
wire, during every positive Connect neutral terminal of the mains
half-cycle, output pin 10 of AC to the remaining wires at one end.
gate N2 goes high. However, if any of the remaining wires is
Thus during every also found to be faulty, then both ends of
positive half-cycle of the these wires are connected to neutral. For
mains frequency, the os- single-wire testing, connecting neutral
cillator circuit is allowed only to the live wire at one end is sufficient
to oscillate at around 1 to detect the breakage point.
kHz, making red LED In this circuit, a 5cm (2-inch) long,
(LED1) to blink. (Due to thick, single-strand wire is used as the
the persistence of vision, test probe. To detect the breakage point,
the LED appears to be turn on switch S1 and slowly move the test
glowing continuously.) probe closer to the faulty wire, beginning
This type of blinking with the input point of the live wire and
reduces consumption of proceeding towards its other end. LED1
the current from button starts glowing during the presence of AC
detect a broken wire and the point of cells used for power supply. voltage in faulty wire. When the break-
break without physically disturbing all A 3V DC supply is sufficient for power- age point is reached, LED1 immediately
the three wires that are concealed in a ing the whole circuit. AG13 or LR44 type extinguishes due to the non-availability
PVC jacket. button cells, which are also used inside of mains AC voltage. The point where
The circuit presented here can easily and laser pointers or in LED-based continuity LED1 is turned off is the exact broken-
quickly detect a broken/faulty wire and its testers, can be used for the circuit. The wire point.
breakage point in 1-core, 2-core, and 3-core circuit consumes 3 mA during the sensing While testing a broken 3-core rounded
cables without physically disturbing wires. of AC mains voltage. cable wire, bend the probe’s edge in the
It is built using hex inverter CMOS CD4069. For audio-visual indication, one may form of ‘J’ to increase its sensitivity and
Gates N3 and N4 are used as a pulse gen- use a small buzzer (usually built inside move the bent edge of the test probe closer
erator that oscillates at around 1000 Hz in quartz alarm time pieces) in parallel with over the cable. During testing avoid any
audio range. The frequency is determined by one small (3mm) LCD in place of LED1 strong electric field close to the circuit to
timing components comprising resistors R3 and resistor R5. In such a case, the cur- avoid false detection.
and R4, and capacitor C1. Gates N1 and N2 rent consumption of the circuit will be
Readers’ comments: 1. How do gates N1 and N2 sense the for the detection of signal at pin 10 of IC
❏ I congratulate the author for giving a presence of 230V AC field around the live 4069?
smart, useful, and compact circuit of ‘In- wire? 4. While searching broken points in
visible Broken Wire Detector’ in August 2. What is meant by buffering weak faulty wires, why the remaining wires are
issue. I have the following queries regard- AC voltage? neutralised?
ing this circuit: 3. Why only 1kHz oscillator is used Rajeev Mehndiratta, Rohtak
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author, K. Udhaya Kumaran, states: remains inhibited. because my circuit show wrong continuity
1. CMOS gate has a very high input im- 4. While connecting 230V AC phase indication even if in between any part of
pedance. When the test probe is placed point to the faulty wire, there is a possi- wire are partially contacted or long wire
closer to 230V AC electrical field, some bility of voltage induction into the wires may act as probe and sense any neigh-
AC voltage is induced in the test probe, that are in close proximity to the faulty bouring electrical field.
PC-BASED MULTI-MODE
LIGHT CHASER
vijaya kumar p.
F
or those who want to use their PC Triac BT136 used here can take up a load
Table I
for various electronic functions, of up to 800 watts. If you want to drive
Pin Configuration
here is a circuit that converts a PC higher loads, BT136 (4A) can be replaced
to a multi-mode light chaser. The advan- Pin Description
with triacs of higher current ratings, like
tage of this light chaser over other light 1 *Strobe BT139 (16A). Since we are using triacs to
2 Data bit 0
chasers is that users can define their own 3 Data bit 1 drive 230V bulbs, the mains supply would
patterns (designs) of running lights by 4 Data bit 2 also appear on the PC. Optocouplers have
altering the source program that requires 5 Data bit 3 been used to isolate the PC from 230V
a simple hardware. The program given 6 Data bit 4 mains supply.
here produces 24 different patterns of 7 Data bit 5
The circuit can be assembled on a
8 Data bit 6
running light. 9 Data bit 7 general-purpose dotted PCB and can be
The circuit shown in Fig. 1 is mainly 10 Acknowledge linked to the PC’s LPT port (female) us-
used to physically isolate the PC hardware 11 *Busy
from the mains supply and to make it 12 Paper end Decimal number Binary equivalents
13 Select
capable of driving 230V loads. The PC’s 14 *Auto feed
1 00000001
parallel port (LPT1) provided on its back 2 00000010
15 Error
4 00000100
is used to interface with the circuit. LPT 16 Initialise
8 00001000
port is terminated in a 25-pin ‘D’ type 17 *Select input
16 00010000
female connector. Its pin configuration is 18-25 Ground
32 00100000
shown in Table I. Note: *indicates that pins are internally 64 01000000
(hardware) inverted. 128 10000000
Triacs are used to drive 230V bulbs.
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Fuse Status Indicators
For Power-supplies
M.K. CHANDRA MOULEESWARAN
F
use status indicators are very with all sorts of power-supplies and other LED in series with the red part of the
simple to construct using a few instruments that use power-supply sec- bi-colour LED. So the fuse failure is in-
components. These go very nicely tions. The logic and the formula, if any, dicated by the flashing of LED as well as
used with each cir-
cuit/figure are shown
in the corresponding
truth tables.
Fig. 1 shows the
use of a 3-pin bi-col-
our LED. When the
fuse is intact, both
red and green parts
of the LED are lit and the LED
emits a yellow light. With the fuse
in blown condition, only the bottom
part of the LED gets the supply
and therefore only the red part of
the LED is lit. The formulae for
working out the values of current-
limiting resistors
Table I (refer Fig. 1) for each colour
Indicator Details LED are shown the red part of the bi-colour LED.
Fuse status Bias to LED1 Colour of LED1 in Table I. These Fig. 3 shows the use of a bi-colour
A1-red anode A2-green anode relationships are LED in the AC mains supply circuit. The
Intact Forward Forward Red+green=yellow applicable to the unique feature of this circuit is that just
Blown Forward Nil Red circuits of Figs 1 by altering the resistor values, it can be
Relationship to evaluate R1 and R2 in Figs 1 and 2: and 2. used in low-voltage AC circuits or DC
DCVin-VLED % ILED=R1 or R2 in ohms Fig. 2 em- circuits.
where Vin and VLED are in volts, ILED in amperes
In Fig. 2, VLED=VD2+VLED for flasher LED path
ploys an addi- The AC is converted into pulsating
tional flashing DC using rectifier diodes before appli-
A
normal priority encoder encodes data value is cancelled using XNOR gates plied to 3-line-to-8-line (one out of eight
only the highest-order data line. (N1 through N8) to retain the second- outputs is active-‘low’) decoder 74138.
But in many situations, not only highest priority value that is generated by Let the output lines of 74138 be denoted
the highest but the second-highest the second encoder. as M0 through M7. Now only one line
priority information is also needed. The To understand the logic, let the incom- is active-‘low’ among M0 through M7,
circuit presented here encodes both ing data lines be denoted as L0 to L7. Lp and that is Mp (where the value of p is
the highest-priority information as well as is the highest-priority line (active-‘low’) explained as above). Therefore the logic
the second-highest priority information of and Lq the second-highest priority line level of line Mp is ‘0’ and that of all other
an 8-line incoming data. The circuit uses (active-‘low’). Thus Lp=0 and Lq=0. All M lines ‘1’.
the standard octal priority encoder 74148 lines above Lp and also between Lp and The highest-priority line is cancelled
that is an 8-line-to-3-line (4-2-1) binary Lq (denoted as Lj) are at logic 1. All lines using eight XNOR gates as shown in the
encoder with active-‘low’ data inputs and below Lq logic state are irrelevant, i.e. figure. Let the output lines from XNOR
outputs. ‘don’t care’. Here p is the highest-priority gates be N0 through N7. Consider inputs
The first encoder (IC1) generates value and q the second-highest-priority Lp and Mp of the corresponding XNOR
the highest-priority value, say, F. The value. (Obviously, q has to be lower than gate. Since Mp = 0 and also Lp = 0, the
active-‘low’ output (A0, A1, A2) of IC1 is p, and the minimum possible value for p output of this XNOR gate is Np = com-
inverted by gates N9 through N11 and fed is taken as ‘1’.) plement of Lp = 1. All other L’s are not
to a 3-line-to-8-line decoder (74138) that Priority encoder IC1 generates binary changed because the corresponding M’s
requires active-‘high’ inputs. The decoded output F2, F1, F0, which represents the are all 1’s. Thus data lines N0 through N7
outputs are active-‘low’. The decoder identi- value of p in active-‘low’ format. The are same as L0 through L7, except that
fies the highest-priority data line and that complemented F2, F1, and F0 are ap- the highest-priority level in L0 through
C
ontinuous monitoring of the mains to set the DC voltages corresponding to output from pin 1 of CD4067B is fed to
voltage is required in many ap- the 16 voltage levels over the 50-250V the non-inverting input of comparator
plications such as manual voltage range as marked on LED1 through A2 (half of op-amp LM358) after being
stabilisers and motor pumps. An ana- LED16, respectively, in the figure. The buffered by A1 (the other half of IC2). The
logue voltmeter, though cheap, has many LED bar graph is multiplexed from the unregulated voltage sensed from rectifier
disadvantages as it has moving parts and bottom to the top with the help of ICs output is fed to the inverting input of
is sensitive to vibrations. The solidstate CD4067B (16-channel multiplexer) and comparator A2.
voltmeter circuit described here indicates CD4029B (counter). The counter clocked The output of comparator A2 is low
the mains voltage with a resolution that by NE555 timer-based astable multi- until the sensed voltage is greater than
is comparable to that of a general-purpose vibrator generates 4-bit binary address the reference input applied at the non-
analogue voltmeter. The status of the for multiplexer-demultiplexer pair of inverting pins of comparator A2 via
mains voltage is available in the form of CD4067B and CD4514B. buffer A1. When the sensed voltage goes
an LED bar graph. The voltage from the wipers of presets below the reference voltage, the output of
Presets VR1 through VR16 are used are multiplexed by CD4067B and the comparator A2 goes high. The high output
Electronic Dice
Vijaya kumar P.
H
ere is a small circuit of an elec- the hardware port. To understand this, outportb(0x0378,i);
tronic dice to interface with your let us consider the following program: }
PC. The circuit simulates a digital #include <dos.h> The above program is used to out-
dice and uses the parallel-port LPT1 pro- main() put the binary equivalent of a decimal
vided on the back of the PC. LPT employs { number entered via the keyboard.
a 25-pin ‘D’ type female connector. int i; ‘Scanf’ function is used to take the input
‘C’ language provides a built-in out- printf(“Input a decimal number”); decimal number from the keyboard. The
portb() function to output binary data to scanf (“%d”,&i); ‘outportb()’ function directly outputs the
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2 0 1 0 ON OFF OFF OFF OFF ON OFF
(pins 2 through 4) of the LPT port in the
form of a 3-bit binary number.
3 0 1 1 ON OFF OFF OFF OFF ON ON Fig. 1 shows the hardware interface
circuit of a BCD-to-decimal converter
4 1 0 0 ON OFF ON ON OFF ON OFF
employing a 7-segment display driver IC
5 1 0 1 ON OFF ON ON OFF ON ON 7447, which directly converts the input
BCD number into 7-segment display.
6 1 1 0 ON ON ON ON ON ON OFF Fig. 2 shows the circuit simulating the
electronic dice with dot pattern display
that satisfies the truth table shown. Fig.
3 shows the Karnaugh Map simplification
of minterms.
When the software program using
‘C’ language is run after compilation, it
prompts you to press letter ‘T’ for simu-
lating an action equivalent to throwing of
dice by generating/outputting a random
number, or press letter ‘X’ to exit the pro-
gram. The program is given below:
#include <stdio.h>
#include <dos.h>
#include <conio.h>
#include <graphics.h>
#include <stdlib.h>
#define PORT 0x0378 /*LPT1 Data Port
Fig. 2 Address */
/*Use 0x0278 for LPT2 */
void main(void)
{
int ran;
int gd=DETECT,gm,ch,x,y;
initgraph(&gd,&gm ,""); /* Initializes
graphics mode */
/* Decorating the screen */
x = getmaxx();/*Get maximum screen
coordinates x & y*/
y = getmaxy();
setbkcolor(BLUE);
rectangle(10,y-10,x-10,10);
setcolor(YELLOW);
settextstyle(DEFAULT_FONT,
Fig. 3
Light-Operated Organ
pradeep g. included in the emitter circuit of T1 as shown in the diagram. When LDR re-
ceives light from a light source,
such as an electric bulb, a
H
ere is a circuit based on a sharp and pleasing audio tone
unijunction transistor (UJT) is heard from the speaker. The
2N2646 or its equivalent that can intensity of light falling on
be used as a light-operated organ. Wired LDR can be varied by waving
as a relaxation oscillator, it can oscillate a hand to and fro between the
independently without a tank circuit or lamp and the LDR. As a result,
complicated RC feedback network. the frequency of the output
A light-dependent resistor (LDR) is sound changes.
H
ere is a stereo tape head pream- The amplified and equalised signals line-input terminal for operating some
plifier circuit for your PC sound available at output pins 3 and 6 of IC1 other audio device as well.
card that can playback your are coupled to the inputs of line ampli- When the preamplifier is in ‘off’ state,
favourite audio cassette through the fier circuit built around transistors T1 switching relay RL1 is off and it allows
PC. Audio signals from this circuit can (via capacitor C5, potmeter VR1, resis- connection of external signals to the sound
be directly connected to the stereo-input tor R8, and capacitor C12) and T2 (via card. When the preamplifier is turned
(line-input) socket of the PC sound card capacitor C10, potmeter VR2, resistor ‘on’, the relay is energised by transistor
for further processing. R19, and capacitor C16), respectively. T3 after a short delay determined by
The circuit is built around a popular Left and right playback levels can be the values of resistor R21 and capacitor
stereo head preamp IC LA3161. Weak adjusted by variable resistors VR1 and C20. On energisation, the relay contacts
electrical signals from the playback VR2. The audio signals are finally avail- changeover the signals to internal source,
heads are fed to pins 1 and 8 of IC1 via able at the negative ends of capacitors i.e. the head preamplifier.
DC decoupling capacitors C1 and C6, C13 and C17. After constructing the whole circuit
respectively. Components between pins 2 The circuit wired around relay driver on a veroboard, enclose it in a mini metal-
and 3 and pins 6 and 7 provide adequate transistor T3 serves as a simple source lic cabinet with level controls and sockets
equalisation to the signals for a normal selector. This is added deliberately to help at suitable points. Use a regulated 1A,
tape playback. the user share the common PC sound card 12V DC power supply for powering the
H
ere is a simple and low-cost cir-
cuit of heart beat monitor using
readily available components. It
uses the piezo-electric plate of audible
piezobuzzers as the sensing device, which
can be purchased for around Rs 2 only
from component vendors.
The sensor is pressed against human
body near the heart region. It should make
a solid contact with your palm to convert
heart beat sound into low-frequency elec-
trical variations. These electrical varia-
tions are amplified by transistor T1 that is
configured as a common-emitter amplifier.
Amplified signals are coupled to transistor
T2 for driving the audio power amplifier
stage. The speaker reproduces heart beat used in the power output stage are freely silicon transistors, replace 220-ohm resis-
notes as audible sound. available. In case you use AC188/128 ger- tors with 47-ohm resistors and 680-ohm
The two BEL188 silicon transistors manium transistors in place of BEL188 resistors with 1-kilo-ohm resistors.
T
he circuit presented here can be duration current pulses at its gate. For The pedestal voltage is derived from
used to control the speed of fans this purpose a UJT relaxation oscillator the non-filtered DC through optocoupler
using induction motor. The speed is used that outputs sawtooth wave- 4N33. The conductivity of the Darlington
control is nonlinear, i.e. in steps. The form. This waveform is coupled to the pair transistors inside this optocoupler is
current step number is displayed on a gate of the triac through an optocoupler varied for getting the pedestal voltage. For
7-segment display. Speed can be varied (MOC3011) that has a triac driver out- this, the positive supply to the LED inside
over a wide range because the circuit can put stage. the optocoupler is connected via different
alter the voltage applied to the fan motor Pedestal voltage control is used for values of resistors using a multiplexer
from 130V to 230V RMS in a maximum of varying the firing angle of the triac. The (CD4051).
seven steps. power supply for the relaxation oscillator The value of resistance selected by
The triac used in the final stage is is derived from the rectified mains via the multiplexer depends upon the control
fired at different angles to get differ- 10-kilo-ohm, 10W series dropping/limiting input from BCD up-/down-counter CD4510
ent voltage outputs by applying short- resistor R2. (IC5), which, in turn, controls forward
biasing of the transis-
tor inside optocoupler
4N33. The same BCD
outputs from IC5 are
also connected to the
BCD-to-7-segment de-
coder to display the
step number on a 7-seg-
ment display.
NAND gates N3
and N4 are configured
as an astable multi-
vibrator to produce rec-
tangular clock pulses
for IC5, while NAND
gates N1 and N2 gener-
ate the active-low count
enable (CE) input using
either of push-to-on
switches S1 or S2 for
count up or count down
operation, respectively,
of the BCD counter.
Optocoupler 4N33
electrically isolates
the high-voltage sec-
tion and the digital
section and thus pre-
vents the user from
shock hazard when
using switches S1 and
S2. BCD-to-7-segment
decoder CD4543 is
used for driving both
common-cathode and
common-anode 7-seg-
ment displays. If phase
input pin 6 is ‘high’
the decoder works as
a common-anode de-
T
his four-channel, two-mode light astable multivibrator for generating clock using preset VR1. CD4030 (IC3) is a quad
chaser circuit produces effects of signals for decade counter CD4017 (IC2). XOR gate that can be used both as an in-
running holes and running lights. The speed of running lights can be varied verting and a non-inverting gate by tying
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•
Fig. 1
Fig. 2
T
his simple-to-construct circuit is
useful for testing both npn and
pnp low-power transistors. It com-
prises a few resistors, LEDs, diodes, and
a mains step-down transformer.
The 230V mains voltage is stepped
down to about 6 volts AC before applica-
tion to the circuit. The leads of transis-
tor under test are inserted in the test
terminals (sockets) marked E, B, and C
(for emitter, base, and collector, respec-
tively) appropriately, i.e. the emitter of the
transistor is to be inserted in terminal
E, the base of the transistor in terminal
B, and the collector of the transistor in
terminal C. the transistor. Two different coloured not. Likewise, when a pnp transistor is
The resistor to be connected in series (green and red) LEDs are used for indi- tested, the glowing of red LED indi-
with the base terminal is selected with cation. cates that the transistor is good and no
the help of a 6-position rotary switch Green LED glows if the npn tran- glowing indicates that the transistor
S1 as per base current requirement for sistor under test is good, otherwise is bad.
T
his circuit provides a 12V regu- cially designed for use with 2m handheld The circuit uses monolithic IC CA3085
lated power supply with output rigs with linear power amplifier and CB voltage regulator in 8-lead TO-5 package.
current up to 3 amperes. It is spe- portable QRP rigs. Its salient features include good load and
line regulation, output current up to 100
mA (which can be increased to several
amperes with additional pass transistors),
output short-circuit protection, and lower
input voltage.
A low power dissipation is achieved
by driving external series-pass transis-
tor 2N4241 (T1) from pin 2 of CA3085.
Normal output pin 8 is returned to ground
via diodes D3 and D4 to ensure error am-
plification operation in the linear region.
Ripple rejection is approximately 50 dB on
no load and 35 dB on full load.
T
he circuit described here uses low- running lights effect. To change this se- transistors next to transistor T1, i.e. tran-
cost and easily available IC quence to get the speller effect, pnp tran- sistors T2 through T9, do not get supply
CD4017 to produce a speller type sistors T1 through T9 are wired as shown and hence all their outputs go low.
light display. In such displays, each letter in the figure. Nine triacs (triac 1 through Next, when Q1 output goes high,
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of the sign sequentially lights up, one after triac 9) are used to drive 230V bulbs. (In transistor T2 goes off. Thus outputs of
the other, until all letters are glowing. place of 230V bulbs, miniature lamps con- transistors T2 through T9 remain low.
After a few seconds, the letters switch off nected in series in the form of characters Since Q0 output at this instant is low,
and the cycle repeats. This circuit provides or letters can also be used, provided the transistor T1 is forward biased and its
a maximum of nine channels and therefore voltage drop across the series combination output goes high to light up the first
can be used to spell a word or sign having is 230 volts.) character.
up to nine characters. When any of the outputs of IC2 goes Similarly, when Q2 output goes high,
Timer IC1 (555) is configured in asta- high, the corresponding transistor con- Q0 and Q1 outputs are low and there-
ble mode to produce clock signal for trig- nected to the output goes off. When Q0 is fore outputs of transistors T1 and T2
gering IC2 (CD4017). Speed of switching high, transistor T1 goes off and its output go high to light up the first and second
on the display can be controlled by varying at the collector goes low. Since the emit- characters.
preset VR1. ter of transistor T2 is connected to the This process continues until all tran-
CD4017 is a decade counter having ten collector of transistor T1, and collector sistors turn on, making all the characters
outputs, of which one output is high for and emitter terminals of transistors T1 to light up. The cycle repeats endlessly,
each clock pulse. However, this produces through T9 are connected in series, all producing the speller type light effect.
T
he timer circuit described here pro- built around transistor T2, turning it transistor T2 is coupled to a small speaker
vides a pleasant musical tone in on and off. As capacitor C1 is charged through a transistor-radio type output
your darkroom at 1-second in- through preset VR1 and resistor R1, the transformer.
tervals. The circuit takes up very little emitter voltage of UJT rises toward the The 22-kilo-ohm value of resistor R3
space and can be easily converted into a supply voltage. represents a compromise between tone
metronome. When the emitter voltage becomes suf- duration and intensity. You can use resis-
Unijunction transistor (UJT) T1 func- ficiently positive, the emitter becomes for- tors having a value anywhere between 10
tioning as a relaxation oscillator triggers ward biased and discharges capacitor C1 kilo-ohms and 25 kilo-ohms for different
the phase-shift audio oscillator circuit through the emitter-base 1 (B1) junction durations and intensities of the output
and resistor R2. signals.
The voltage drop Since the unijunction transistor is
across R2 forward functioning as the oscillator trigger,
biases transis- changing the values of one or more com-
tor T2 and turns ponents in the UJT circuit will change the
it on. As capaci- rate of the tone burst. The tone frequency
tor C1 becomes can be varied by changing the value of
discharged, the any or more of capacitors C2 through C4
current through and resistors R5 and R6 in the phase-shift
resistor R2 drops network.
and transistor T2 The primary winding of transformer
is cut off. X1 can be tuned for a slight increase in
A tone sig- the output, using capacitor values between
nal is generated 0.05 and 0.25 µF for C5 by trial-and-error
by transistor T2 method. Tone pulses should begin about
and R-C coupled ten seconds after the unit is turned on.
phase-shift oscil- After a minute or so, adjust preset VR1 for
lator. Part of the 1-second beats by comparing the timing of
signal taken from the beats with the seconds needle on your
the collector of wristwatch.
T
he circuit presented here boosts mines the quiescent base-emitter current
weak shortwave signals so that for transistor T1. Resistor R2 limits the
these can be heard with enhanced current flowing through transistor T1
clarity over a shortwave receiver. Fur- and, in conjunction with capacitor C2,
ther, the receiver doesn’t require any determines the operating point for its
physical connection as its placement in stable operation.
the vicinity (within 6 to 7 cm) of the cir- The number of turns in inductor L1
cuit will suffice. The circuit works well would have to be reduced as operation
over a wide range of supply voltage from area shifts towards the upper end of the
3 volts to 12 volts. high-frequency band. A 180µH RFC in
Low-noise transistor T1 (BF494 or series with positive supply rail, along
BF495) is connected as shown in the with a bypass capacitor to the ground, is
figure. Resistor R1 gives the DC bias to recommended for reducing signal loss in
T1. R1’s value may lie anywhere between the power supply.
l00 kilo-ohms and 22 kilo-ohms; it deter- The current consumption is well be-
Long-Range
Target shooter
pratap chandra sahu
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P
racticing target shooting using a everybody to have a gun. The circuit distance of more than 100 metres without
real gun is both expensive and presented here makes you feel the excite- any risk or much expenditure.
risky. Also, it is not possible for ment of shooting a target situated at a The circuit simply uses a laser pointer
(also referred to as laser torch) as the
transmitter at the gun end. Laser point-
ers can reach a maximum of 1 kilometre
distance but it is advisable to limit the
range within, say, 200 metres.
While constructing the gun no change
has to be made in the readymade pointer.
Just tightly fit the pointer inside the toy
gun, so that the triggering switch can ac-
tivate the press-to-on button of the laser
pointer, as shown in Fig. 1.
The receiver comprises a counter-cum-
7-segment display driver IC (CD4033)
with a debouncer formed by 555 timer and
an LDR sensor at the input. The counter
works as a scoreboard and directly shows
the number of successful hits.
The LDR senses the pointer’s laser
beam and activates the monostable mul-
tivibrator wired around 555 timer IC. To
increase the sensitively of the receiver,
the LDR signal is amplified by transis-
tor T1. The timer pulse-width is set at
around 100 milliseconds so as to work as
a debouncer. The timer output is coupled
to IC CD4033.
CD4033 is a serial decade counter-
cum-7-segment decoder/driver. With
every output pulse from monostable IC1,
the count in CD4033 gets incremented by
one. Thus the output of IC2 reflects the
latest score by a competitor. Pressing reset
switch resets the display too.
You can increase the size of the
display board manyfolds using the ad-
ditional circuit shown in Fig. 3. This
multiplexed board avoids higher power
H
ere is a simple power supply cir-
cuit that can be used for citi-
zen-band and VHF walkie-talkies
of power rating up to 10 watts. The circuit
uses a step-down transformer, followed by
bridge rectifier, filter, regulator, and cur-
rent booster stages.
A pnp power transistor is added to
the circuit to increase its current sourcing
capabilities. Regulator 7812 can support
around 100 mA current. When the cur-
rent flowing through R1 nears 100mA
value, the voltage (>0.65V) across the
emitter-base junction makes transistor
T1 to conduct and provide a path for ad-
ditional current.
The circuit can source around one am-
pere of current at 12+1.4 volts=13.4 volts. Both the regulator IC and the power transistor must be mounted on heat sinks.
T
he circuit presented here detects in the receiver. The transmitter frequency sor module is meant for pulsed operation.
interruption in security systems. is adjusted by preset VR2. For making Thus interruption of the IR path for a brief
Its features include no false trigger- the duty cycle less than 50 per cent, diode period gives rise to pulsed operation of the
ing by external factors (such as sunlight 1N4148 is connected in the charging path sensor module.
and rain), easy relative positioning of the of capacitor C7. Once monostable IC2 gets triggered,
sensors and alignment of the circuit, high The output of astable multivibrator its output goes high and stays in that state
sensitivity, and reliability. modulates the IR signal emitted from IR for the duration of its pulse width that can
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The circuit comprises three sections, LEDs that are used in series to obtain a be controlled by preset VR1. The high
namely, transmitter, receiver, and power range of 7 metres (maximum). To increase output at pin 3 of the monostable makes
supply. The transmitter generates modu- the range any further, the transmitted the musical IC to function. Voltage divider
lated IR signals and the receiver detects power has to be raised by using more comprising R2 and R3 reduces the 555
the change in IR intensity. Power supply number of IR LEDs. In such a case, it is output voltage to a safer value (around
provides regulated +5V to the transmitter advisable to use another pair of IR LEDs 3V) for UM66 operation. The duration of
and the receiver. and 33-ohm series resistor in parallel the musical notes is set by preset VR1 as
The power supply and the speaker with the existing IR LEDs and resistor R5 stated earlier.
are kept inside the premises while the across points X and Y. For proper operation of the circuit,
transmitter and the receiver are placed The receiver unit consists of a monos- use 7.5V to 12V power supply. A bat-
opposite to each other at the entrance table multivibrator built around NE555 tery back-up can be provided so that the
where the detection is needed. Three (IC2), a melody generator, and an IR sen- circuit works in the case of power failure
connections (Vcc, GND, and SPKR) are sor module. The output of the IR sensor also. Potmeter VR3 serves as a volume
needed from the power supply/speaker module goes high in the standby mode control.
to the receiver section, while only two or when there is continuous presence of The transmitter, receiver, and power
connections (Vcc and GND) are required modulated IR signal. supply units should be assembled sepa-
to the transmitter. When the IR signal path is blocked, rately. The transmitter and the receiver
The transmitter is basically an astable the output of the sensor module still re- should have proper coverings (booster) for
multivibrator configured around NE555 mains high. However, when the block is protection against rain. The length of the
(IC3). Its frequency should match the removed, the output of the sensor module wire used for connecting the IR sensor mod-
frequency of the detector/sensor module briefly goes low to trigger monostable ule and IR LEDs should be minimum.
(36 kHz for the module shown in figure) IC3. This is due to the fact that the sen- Note. The heart of the circuit is the
Readers’ comments: tion using this circuit? circuit! A lamp can be connected easily by
This circuit helps me in various ways. I Bhavik A. Patel using a simple transistor driver circuit at
have the following queries regarding it: Through e-mail output pin 3 of IC2 (NE555). For larger
1. How can I fit a lamp in place of the The author, Junomon Abraham, loads, you may need a relay circuit to
speaker or another device? replies: connect the load through the contacts of
2. Can I perform more than one func- Thank you for your keen interest in this the relay.
T
his high-speed relay tester is in- mounted relays used in RAX (small- DOT origin. It is a reliable tool for testing
tended for testing 12V DC 2C/O capacity rural automatic exchange) and relays in bulk. For other than 2C/O and
(changeover) and 4C/O PCB- MAX (main automatic exchange) of C- 4C/O contact relays, slight modification
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Fastest Finger First Indicator
p. rajesh bhat
Readers’ com-
ments:
What modi-
fications are
required to
accommodate
more than four
contestants?
Suyash
Narayan
Delhi
EFY: To ac-
commodate up
to eight con-
testants, the
modified cir-
cuit is shown
in Fig. 1 below.
In this circuit,
IC8 (7475) is
added to the
previous circuit
to accommo-
date switches
S5 through S8. Fig. 1: Modification of the fastest finger first circuit for eight contestants
In place of IC3
(7420) of the (74LS00) have been used to lock out the propriate latch-disable signal. The rest
previous circuit, IC9 (74LS30) and IC10 subsequent entries by producing the ap- of the circuit remains the same.
Decorative Signboard
pratap chandra sahu
T
his eye-catching signboard can be Q9 of IC5 triggers 4- to 5-second (pulse Driving characters at 1 Hz ensures
used for special occasions such as width) monostable multivibrator IC2. The that the characters are illuminated one
birthdays and marriage ceremo- output of IC2 is ANDed in gate A1 with by one for one second each. Similarly,
nies. The characters in the display board 100Hz stepped down/pulsating DC sup- 100Hz signal driving IC4 ensures that
are illuminated one by one, each for one ply available at the output of the bridge the characters are refreshed rapidly for a
second. After the last character is illumi- rectifier comprising diodes D1 through continuous glow effect due to persistence
nated, the entire board gets illuminated D4. The output of AND gate A1 drives of vision. AND gate A2 is used to block
for 4 to 5 seconds. The above two sequenc- second decade counter IC4, whose outputs 1Hz signal reaching the first counter (IC5)
es are repeated continuously. (Q1 through Q8) are ORed with the cor- while the second counter (IC4) is active,
Timer 555 (IC1) generates 1Hz pulses, responding outputs of first counter IC5. i.e. when the output of IC2 is high. When
which are applied to decade-counter (Note. Only eight of the ten outputs of IC2 output goes low after 4-5 seconds, it
CD4017B (IC5). The output from pin CD4017s have been used.) enables gate A2 to pass 1Hz clock to the
T
he compact, low-cost condenser watts at 4.5 volts. It can be used as part Transistors T1 and T2 form the mic
mic audio amplifier described here of intercoms, walkie-talkies, low-power preamplifier. Resistor R1 provides the
provides good-quality audio of 0.5 transmitters, and packet radio receivers. necessary bias for the condenser mic while
Smoke Alarm
pradeep g.
T
he smoke alarm circuit presented to interrupter module is used as the
here is based on the readily avail- smoke detector, while timer 555 is
able photon-coupled interrupter wired in astable configuration as an
module and timer IC NE555. The pho- AF oscillator for sounding alarm via a
loudspeaker.
In the ab-
sence of any
smoke, the gap
of photo inter-
rupter module
is clear and the
the timer is reset and hence the alarm
light from LED
does not sound.
falls on the pho-
However, when smoke is present in
totransistor
the gap of the photo interrupter module,
through the slot.
the light beam from LED to the pho-
As a result, the
totransistor is obstructed. As a result, the
collector of pho-
phototransistor stops conducting and pin
totransistor is
4 (reset) of IC 555 goes high to activate
pulled towards
the alarm.
ground. This
Note. The unit must be housed
causes reset pin
inside an enclosure with holes to allow
4 of IC 555 to go
entry of smoke.
low. Accordingly,
I
n applications like inverters and set combination R3-VR1 also increases. old pin that resets the flip-flop output to
UPS, the load must not exceed the (Note. The power dissipated in 1-ohm low state. The circuit can be reset after
rated output power since it can cause resistor for 500W load is just 2.1 watts, removing unwanted loads.
excess heating of output transformer which is negligible compared to the Note. Since the circuit is very sensi-
windings and active driving devices and maximum power rating of the load. To tive, fluctuations in AC mains can also
thereby damage them.
The circuit presented
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here can be used as over-
load protector for inverters
or as an electronic fuse
in AC mains supply. The
mains supply to the load
is routed via the the N/C
(normally closed) contacts
of relay RL1. In an in-
verter, the relay contacts
could be used as ‘inverter
oscillator’ on/off control.
Whenever overload occurs,
it inhibits inverter oscilla-
tor circuit, which, in turn,
stops generation of power.
Resistor R1 is used
as the overload sensing
element. When the load
exceeds the maximum
rated value, it draws current in excess of use this circuit for 1kW load, select R1 trigger the circuit undesirably. This effect
its rated value. This causes the potential as 0.5-ohm, 10W.) can be eliminated by using 4.7µF bypass
drop across resistor R1 to increase. An Overload limiting point can be set by capacitor C1 as shown in the figure.
optocoupler is used to sense this volt- preset VR1. When the potential at wiper of Since some equipments like TV draws
age drop. The optocoupler, in addition, preset VR1 becomes greater than VZ+VBE more current initially for few seconds,
isolates the AC mains part from the rest (where VZ is the breakdown voltage of this can cause the overload protector to
of the circuit. Zener diode ZD1 across the zener diode ZD1 and VBE the forward volt- cutoff the supply, which is undesirable.
optocoupler MCT2E, which is connected age drop at the base-emitter junction of Inserting a small time delay of around 5
in reverse prevent inbuilt LED of the transistor T1), it causes forward biasing seconds by using a capacitor C3 of 220µF
optocoupler MCT2E from negative half of transistor T1. This results in the col- can eliminate this. The time delay can
cycles across R1. lector of transistor T1 to be pulled down be increased by using higher values of
Resistor R1 is selected as 1 ohm for to ground and trigger IC555, which is C3 and can be decreased by using higher
230V, 500 watts (max.) load capacity. connected in bistable mode. values of C3.
When the load just exceeds 500 watts, The output of IC1 forward biases If you are using the circuit for loads,
the current through R1 is approximately transistor T2 to energise the relay RL1 which do not draw more current initially,
2.1 amperes, producing a potential and causes overload indicating LED1 to the delay feature may be useless and even
difference of 2.1 volts across R1. The glow. Once the output of bistable IC1 goes be harmful. Therefore disable the feature
inbuilt transistor inside the optocoupler high, it continues to remain high, unless by simply disconnecting capacitor C3.
senses this voltage and its collector cur- reset pushbutton S1, which is connected While adjusting the overload cutoff
rent increases proportionally. When the between Vcc and threshold terminal (pin point disconnect C3, which will otherwise
current reaches the required designed 6) of timer 555, is pressed. On pressing can cause confusion, and reconnect it
value, voltage drop across resistor-pre- S1, a high pulse is applied to the thresh- after final adjustments.