Compal La-A792p r0.1 Schematics PDF

5 4 3 2 1
ZZZ
PCB DAZ@
DA8000WX000
PCB 10G LA-A401P REV0 M/B HDI 1
D D
S1
FRAME
EC0MV000200
Compal Confidential
S4
FRAME
EC0MV000200
for GLONASS
@
C C
Schematics Document
ZEJ20
LA-A792
B B
2013-05-20
REV:0.1
A A
Security Classification Compal Secret Data Compal Electronics, Inc.

2012/11/09 2014/11/09 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. ZEJ20 - LA-A792P
3UTJG_0[TK
Date: Sheet 1 of 28
5 4 3 2 1
5 4 3 2 1
ZEJ20 (ZARA 3G) block diagram

Max. support VRAM size : 2GB.
D D
DDR3L 1GB (4Gb X16 *2 Pcs)

P6
switching
External Memory Interface Charger P22 Battery
P22
LCM
CONN. I2C
P7 MT8193 RGB
HDMI P7
Battery Input
P7
LDO Output
BUCK Output
Capacitive Touch Sensor IC
I2C,
Touch Panel EINT
S7300 USB 2.0
micro USB, OTG
CONN. VIBR_PMU
P11 P17 Vibrator
MT6320
P16
PMIC Optional
AUDIO
C C
MIPI,I2C LDO OUTPUT
5M Camera BUCK OUTPUT
CHARGER Speaker P16
P10
MT8389W/MT8125 I2S, SPI, EINT, I2C
YUV,I2C MIC P16

0.3M Camera combo JACK
P10 Cortex-A7 LSA401P
P23~P25
(Audio/B)
Gyro Sensor
MPU-6050
1.2GHz Quad-Core
I2C, EINT
P12
SIM Card
P Sensor
P18
IQS1280000
P12
GPIO
Audio board combo JACK 3G SKU
P Sensor conn. GPIO
IQS1280000 P8 P Sensor
P12
B JTAG BSI MT6167 B
UART1
UART2 26MHz
3G GSM
Debug Port UART4
P11 P19,P20
Sidekey (volume up/down) KCOL & KROW

P15 PCM, UART3, EINT NH520T/NH520*
WIFI/BT
P4,P5 MSDC3 WIFI
BT4.0
GPS*
GPS
MSDC0 MSDC1
P9
eMMC micro SD Russian Sku

8G/16G P17
P13 UART1, EINT MT3332 GPS
GLONASS
A A
P21

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
ZEJ20 - LA-A792P 0.1
Date: Monday, June 17, 2013 Sheet 2 of 28

5 4 3 2 1
5 4 3 2 1
D D
Voltage Rails
MT6320 Power Plane Function Power Level IDLE Sleep mode I2C address
VCORE_PMU VCORE switching output 0.75 ~ 1.3 ON Low voltage
Address(8bit)
VPROC_PMU VPROC switching output 0.75 ~ 1.3 ON Low voltage Device Address(7 bit)
Write Read
VTCXO_1_PMU LDO output for TCXO 2.8V ON OFF
VCAMA_PMU LDO output for camaera analog 2.8V ON Gating by SW
Gyro+G (MPU-6050) 0x68 0xD0 0xD1
VSRAM_PMU LDO output used for 1.2V SRAM 1.2V ON Low voltage
Touch screen (S7300B) 0x20 0x40 0x41
VDD28_6583 LDO output used for 2.8V IO 2.8V ON Gating by SW
Camera 0.3M 0x21 0xBA 0xBB
VGP2_PMU LDO output for camaera 1.8V 1.8V ON Gating by SW
Camera 5M 0x36 0x6C 0x6D
VEMC_3V3_PMU LDO output for eMMC&P-sensor 3.3V ON Gating by SW
Charge (BQ24196 ) 0x6B 0x42 0x43
C VMCH_PMU LDO output for SD card 3.3V ON Gating by SW
PMU(MT6320) 0xD6 0xD7 C
VGP5_PMU LDO output for Touch panel 2.8V ON Gating by SW

Battery 0x55 0xAA 0xAB
DDR3VCCIO LDO output for DDR3L 1.35V ON Gating by SW
VDD33_6583 LCD & Bridge power 3.3V ON Gating by SW
VDD18_6583 LDO output used for 1.8V IO 1.8V ON Gating by SW
VRF18_PMU LDO output for RF_MT6167 1.8V ON Gating by SW
Main board ID BOM structure

MB_ID0 MB_ID1 Name Function
B B
0 0 EVT 3G@ 3G only

0 1 DVT WIFI_ONLY@ WIFI ONLY
1 0 PVT DAZ@ PCB
1 1 MP EMC@ for EMC request
NH520@ AW-NH520
NH520_EMC@ GPS EMC
GLONASS@ MT3332
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Notes List
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
U201
3G@
SA00006SG00
S IC MT8389WK/A 1.2G FCCSP 515P CPU U201F
R1632 0_0402_5% R1627
1 2 AG17 T3 1 2
+VDD18_6583 DVDD18_MD DVDD18_MIPITX +VDD18_6583
U201 T2 0_0402_5%
WIFI_ONLY@ 1 2 AH14 DVSS18_MIPITX
+VA_PMU AVDD18_MD 1 1 1
R1633 1 1 1 AD16 L7 C1637 C1638 C1639
0_0402_5% C1607 C1608 C1609 AE17 AVSS18_MD DVDD18_MIPIRX M6
SA00006S500 AVSS18_MD DVSS18_MIPIRX
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

D 2 2 2 D
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

S IC MT8389WK/A 1.2G FCCSP 515P CPU AJ12 H1
2 2 2 AD12 AVDD18_AP DVDD18_MIPIIO K6
AE13 AVSS18_AP DVSS18_MIPIIO
R1635 AVSS18_AP
10_0402_5% 2 AH19 AB28 1 R1628 2 +VUSB_PMU
+VTCXO_1_PMU AVDD28_DAC AVDD33_USB_P0 AD27 0_0402_5%
1 R1636 2 AJ11 AVDD18_USB_P0 AB26 1 0_0402_5%
R1652 2
+VDD18_6583 DVDD18_PLLGP AVSS33_USB_P0 +VUSB_PMU
0_0402_5% 1 2 +VSIM1_PMU
AF29 R1653 0_0402_5% @
1 R1637 2 M16 AVDD33_USB_P1 AC26 1 2
+VDD18_6583 AVDD18_MEMPLL AVDD18_USB_P1 +VDD18_6583
0_0402_5% 1 1 1 M15 AE28 2 2 1 R1629 0_0402_5%
C1610 C1618 C1621 AVSS18_MEMPLL AVSS33_USB_P1 C1640 C1641 C1673
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

2 2 2 MT8389E1_PCDDR3 1 1 2
@ 8125 footprint
1.8V IO for DDR

1.2V IO for DDR2
+DDR3VCCIO
1.5V IO for DDR3
1.35V IO for DDR3L : Default
U201B
C R1639 C
C5 H10 1 2
GND DVDD18_EMI +VM_PMU
C8 H19 1 1 1 1 1
C21 GND DVDD18_EMI H20 C1665 C1661 C1662 C1663 C1664 0_0805_5%
C24 GND DVDD18_EMI J10
GND DVDD18_EMI
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

D7 J11
2.2U_0402_6.3VM
D9 GND DVDD18_EMI J17 2 2 2 2 2
D11 GND DVDD18_EMI J18
D22 GND DVDD18_EMI K13
J6 GND DVDD18_EMI K15
J14 GND DVDD18_EMI K20
K10 GND DVDD18_EMI
K11 GND R24 1 R1654 20_0402_5%
GND DVDD18_MC0 +VEMC_1V8_PMU
K12 U1 1 R1640 20_0402_5% +VMC_PMU
K16 GND DVDD33_MC1 Y1 1 R1641 20_0402_5%
GND DVDD33_MC2 +VDD28_6583
K17 AE25 +VDD18_6583
K18 GND DVDD28_BPI AG23
L24 GND DVDD28_BSI AJ22 1 R1643 20_0402_5%
GND DVDD18_BSI +VDD18_6583
P11 J29 1 R1658 20_0402_5% +VDD18_6583
P12 GND DVDD18_NML1 Y24 1 R1659 20_0402_5%
GND DVDD28_NML2 +VDD18_6583
P13 AF1
P14 GND DVDD18_NML3 F1 1 R1644 20_0402_5%
GND DVDD18_NML4 +VDD18_6583
P15 W8
P16 GND DVDD18_MC12
R10 GND N10
GND DVDD 2 1 1 1 1 1 1 1 1
R11 N11 C431 C1656 C1657 C1658 C1659 C1660 C1667 C1670 C1671
R13 GND DVDD N12
1U_0402_6.3V6K
GND DVDD
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

R14 N13
R16 GND DVDD N14 1 2 2 2 2 2 2 2 2
R18 GND DVDD N15
R20 GND DVDD N16
T8 GND DVDD N17
T9 GND DVDD P10
GND DVDD +DVDD (23)
T11 P17
T13 GND DVDD P18 +DVDD 1 R1648 2
GND DVDD +VCORE_PMU
T14 P19 2 1 1 +DVDD
B
T16 GND DVDD P20 C457 0_0805_5%
B
GND DVDD 1 1 1 1 1
T18 R17 C1651 C1652 C1653 C1654 C1655
1U_0402_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
T20 GND DVDD R19 C434 C454 C455
GND DVDD 1 2 2 1 1 1 1
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
U8 T17 22UF 6.3V M X5R 0805 H1.25 C1674 C1675 C1676 C1677
U11 GND DVDD T19 2 2 2 2 2 @ @ @ @
GND DVDD
0.1U 10V X7R 0402_NC
0.1U 10V X7R 0402_NC
0.1U 10V X7R 0402_NC
0.1U 10V X7R 0402_NC

U16 U17 1 R1655 2
U18 GND DVDD U19 0_0402_5% 2 2 2 2
V6 GND DVDD U20
V7 GND DVDD V17 1 @ 2
GND DVDD +DVDD_GPU_R (23)
V8 V20 R1657 0_0402_5%
V11 GND DVDD W20 R1649 0_0603_5%
V16 GND DVDD +DVDD_GPU 1 @ 2
GND +VGPU_PMU
V18 T10 1 1 2 1
V19 GND DVDD_GPU U9 C1649 C1650 C436 C453
W11 GND DVDD_GPU U10 +DVDD_GPU
1U_0402_6.3V6K
10U_0402_6.3V6M
GND DVDD_GPU
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
W16 V9
W19 GND DVDD_GPU V10 2 2 1 2 +DVDD_DVFS (23)
W24 GND DVDD_GPU R1650
GND 1 1
AA6 R12 +DVDD_DVFS 1 2 C1678 C1679
GND DVDD_DVFS +VPROC_PMU
AD20 R15 1 1 1 1 1 2 1 1 @ @
GND DVDD_DVFS
0.1U 10V X7R 0402_NC
0.1U 10V X7R 0402_NC

AD24 T12 C1644 C1645 C1646 C1647 C1648 C446 C449 C450 C451 0_0805_5%
GND DVDD_DVFS T15 2 2
DVDD_DVFS
22UF 6.3V M X5R 0805 H1.25
U12
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0402_6.3V6K
DVDD_DVFS 2 2 2 2 2 1 2 2
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
U13
DVDD_DVFS U14
DVDD_DVFS U15 1 R1660 2
AB11 DVDD_DVFS V12 GND_DVDD_DVFS (23)
0_0402_5%
AD11 VPROC_FB DVDD_DVFS V13
GND_VPROC_FB DVDD_DVFS V14 +DVDD_DVFS
DVDD_DVFS V15
DVDD_DVFS W12
A1 DVDD_DVFS W15 +DVDD_SRAM (23)
NC DVDD_DVFS 1 1 1
A29 R1651 0_0603_5% C1680 C1681 C1682
AJ1 NC W13 +DVDD_SRAM 1 2 @ @ @
NC DVDD_SRAM +VSRAM_PMU
0.1U 10V X7R 0402_NC
0.1U 10V X7R 0402_NC
0.1U 10V X7R 0402_NC

AJ29 W14 1 1 2 1
NC DVDD_SRAM C1642 C1643 C447 C448 2 2 2
A A
10U_0402_6.3V6M
1U_0402_6.3V6K
2 2 1 2
0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402
MT8389E1_PCDDR3
+DVDD_SRAM
@ 8125 footprint
1
C1683
@
0.1U 10V X7R 0402_NC

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date MT8377 - Power
C
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
+VDD18_6583
1
R207 R208
4.7K_0402_5%
4.7K_0402_5%
U201A
+VDD18_6583 +VDD18_6583 +VDD18_6583 +VDD18_6583 +VDD18_6583
2
AF18 AJ24
(19) TX_IP AF17 UL_I_P1 BPI1_BUS0 AG26 BPI1_BUS0 (20)
(19) TX_IN AF19 UL_I_N1 BPI1_BUS1 AJ27 BPI1_BUS1 (20)
(12,5) SCL3 (19) TX_QP UL_Q_P1 BPI1_BUS2 BPI1_BUS2 (20)
2
AF20 AH28
(12,5) SDA3 (19) TX_QN UL_Q_N1 BPI1_BUS3 @ PAD TP1370
AF27 R1520 R1522 R1524 R1526 R1528 U201D
BPI1_BUS4 BPI1_BUS4 (20) (6) ED[0..31]
AG13 AG28 GLONASS@ @ @ @ @
AG14 UL_I_P2 BPI1_BUS5 AF26 @ PAD TP1371 C11 F12
ED31
+VDD18_6583 AF14 UL_I_N2 BPI1_BUS6 AJ25 @ PAD TP1372 C7 RDQ31 RCS_ E14 RCS0_R (6)
10K_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5% ED30
BPI1_BUS7 (20) RCS1_R (6)
1
UL_Q_P2 BPI1_BUS7 RDQ30 RCS1_
DVDD28_BPI
AF13 AG27 ED29 B12
UL_Q_N2 BPI1_BUS8 BPI1_BUS8 (20) RDQ29
AH26 MB_ID0 MB_ID1 GPIO_0 GPIO_1 GPIO_2 ED28 B5 E16
BPI1_BUS9 BPI1_BUS9 (20) RDQ28 RWE_ /EWR (6)
R217 R218 AJ16 AH24 ED27 B11 C14
(19) RX_IP DL_I_P1 BPI1_BUS10 BPI1_BUS10 (20) RDQ27 RRAS_ /ERAS (6)
1
4.7K_0402_5%
4.7K_0402_5%
D AH16 AF24 ED26 A5 B15 D
(19) RX_IN DL_I_N1 BPI1_BUS11 BPI1_BUS11 (19) RDQ26 RCAS_ /ECAS (6)
2
AH18 AJ28 ED25 A12 E13
(19) RX_QP DL_Q_P1 BPI1_BUS12 BPI1_BUS12 (19) RDQ25 RCKE ECKE (6)
5/30 M AH17 AH25 R1521 R1523 R1525 R1527 R1529 ED24 C6
(19) RX_QN DL_Q_N1 BPI1_BUS13 BPI1_BUS13 (19) RDQ24
AE26 NH520@ @ @ @ @ ED23 D8 A21
BPI1_BUS16 @ PAD TP1390 RDQ23 RDQM0 EDQM0 (6)
AG15 AH27 ED22 C10 C18
(19) RXD_BBIP @ PAD TP1362 EDQM1 (6)
2
2
AG16 DL_I_P2 BPI1_BUS17 AE24 10K_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5% ED21 B7 RDQ22 RDQM1 A8
(19) RXD_BBIN @ PAD TP1361 EDQM2 (6)
1
SCL2 AF15 DL_I_N2 BPI1_BUS18 ED20 D10 RDQ21 RDQM2 C9
(19) RXD_BBQP DL_Q_P2 RDQ20 RDQM3 EDQM3 (6)
SDA2 AF16 AF28 ED19 D6
(19) RXD_BBQN DL_Q_N2 VM0 VM0 (20) RDQ19
AH29 VM1 (20) ED18 A9 F23
VM1 RDQ18 RDQS0 EDQS0 (6)
ED17 B8 E20
AE20 B9 RDQ17 RDQS1 E6 EDQS1 (6)
ED16
+VGP2_PMU
AG18
AG20 VBIAS
BSI1A_CS0
BSI1A_CLK
AH22
AH21
BSI-A_EN (19)
BSI-A_CK (19) Reserve ED15
ED14
C23
B17
RDQ16
RDQ15
RDQS2
RDQS3
F9
E23
EDQS2
EDQS3
(6)
(6)
(20) WG_GGE_PA_VRAMP APC1 BSI1A_DATA0 BSI-A_DAT0 (19) RDQ14 RDQS0_ /EDQS0 (6)
AG19 AE21 BSI-A_DAT1 (19) ED13 A24 F20
TP1359 PAD @ APC2 BSI1A_DATA1 RDQ13 RDQS1_ /EDQS1 (6)
(19) DCOC_Flag AH20 AG22 BSI-A_DAT2 (19) ED12 B18 F6
TXBPI1 BSI1A_DATA2 C22 RDQ12 RDQS2_ E9 /EDQS2 (6)
R210 R212 ED11
RDQ11 RDQS3_ /EDQS3 (6)
1
1
4.7K_0402_5%
4.7K_0402_5%
AE23 ED10 D19

BSI1B_CS0 RDQ10
DVDD28_BSI
AF21 AF23 ED9 B24 H16
BSI1C_CLK BSI1B_CLK RDQ9 RCLK0 EDCLK (6)
AH23 AE22 ED8 A17 H15
(12) POUT_1 BSI1C_DATA BSI1B_DATA RDQ8 RCLK0_ EDCLK_B (6)
ED7 B20 H12
C20 RDQ7 RCLK1 H13 EDCLK1 (6)
ED6
EDCLK1_B (6)
2
MT8389E1_PCDDR3 +DDR3VCCIO ED5 D21 RDQ6 RCLK1_

ED4 C19 RDQ5 G25
(10,5) SCL1 RDQ4 NLD15
ED3 B21 D28
(10,5) SDA1
Power by CAM_IO
@ 8125 footprint 1 ED2 D23 RDQ3 NLD14 F28
RDQ2 NLD13
1
C205 ED1 A20 F25
8.06K +-1% 0402 ED0 B22 RDQ1 NLD12 E26
R209 0.1U 10V +-10% X7R 0402 RDQ0 NLD11 H25
2
5/21 M NLD10
+EVREF H14 J28
+VDD18_6583 +EVREF H18 VREF NLD9 E28
(6) +EVREF
1 2
VREF NLD8 C29
C15 NLD7 G28
1 (6) EBA2 RBA2 NLD6
1
R219 R220 8.06K +-1% 0402 C206 C207 C12 H28
(6) EBA1 RBA1 NLD5
1
1
4.7K_0402_5%
4.7K_0402_5%
R211 1U 10V K X5R 0402 B14 B28

(6) EA[0..14] (6) EBA0 RBA0 NLD4
EA14 D12 G27
0.1U 10V +-10% X7R 0402
2
2 EA13 D17 RA14 NLD3 H27
2
EA12 B13 RA13 NLD2 G26
EA11 F16 RA12 NLD1 C28
2
EA10 D14 RA11 NLD0

EA9 F17 RA10 B29
EA8 F18 RA9 NRNB D27
(11,5) SCL0 TP1366 PAD @ C17 RA8 NCLE H26
Power by CTP URXD4 EA7
(11,5) SDA0 (11) URXD4 SCL0 (11,5) RA7 NALE
UTXD4 EA6 E18 F29
(11) UTXD4 SDA0 (11,5) RA6 NWEB
EA5 C16 J25
TP1369 PAD @ SCL1 (10,5) RA5 NREB
EA4 A13 E29
C SDA1 (10,5) A15 RA4 NCEB0 H29 C
SCL2 EA3
(9) URXD3 SCL2 (7) 0509 Change D13 RA3 NCEB1
SDA2 EA2
(9) UTXD3 SDA2 (7) RA2
EA1 E12 N19
SCL3 (12,5) RA1 TP_MEMPLL
EA0 E11 N18
SDA3 (12,5) RA0 TN_MEMPLL
<TESTMODE> URXD2 E17 E15
(11) URXD2 (6) ERESET_ DDR3RSTB REXTDN
Connect to VIO18 : Enter Test Mode UTXD2
(11) UTXD2
1
Connect to GND : Normal mode GPIO_SUB_CMPDN (10)
1
GPIO_1 R1661
<FSOURCE_P> GPIO_2 NC MT8389E1_PCDDR3 R204
@ 68 +-1% 0402
Connect to VGP6 (2v0) : w/i EFUSE program GPIO_0
CABC_ENABLE1
@
Connect to GND : w/o EFUSE program 8125 footprint
2
URXD1 @
(21) URXD1 CABC_ENABLE0
2
UTXD1 MB_ID1
(21) UTXD1
AA29
AA26
AA28
W26
W28
W25
W27
AG5
AH5
AE9
AF9
AF5
Y27
Y26
Y29
Y25
V24
V25
Y28
V29
V28
AJ6
D2
C1
B3
A2
B1
F4
U201C
SPI1_CSN
SPI1_MI
SPI1_CLK
UTXD1
URXD1
UCTS1
URTS1
UTXD2
URXD2
UCTS2
URTS2
UTXD3
URXD3
UTXD4
URXD4
SCL0
SDA0
SCL1
SDA1
SCL2
SDA2
SCL3
SDA3
SPI1_MO
PWM1
PWM2
PWM3
PWM4
1 2 SYSCLK1 AJ19 R29 U201E
(19) CLK1_BB_R2 CLK26M1 SYSRSTB SYSRST_B (11,23,7)
R634 0_0402_5% AJ14 VDD28_NML2
CLK26M2 VDD28_NML2 VDD28_NML2 AJ21 P8 AD1
P25 EXT_CLK_EN E5 @ PAD TP1358 R7 TCP DPIVSYNC AC2 DPI_VSYNC (7)
(23,7) RTC32K1V8 RTC32K_CK SRCLKENAI P26 SRCLKENAI (9) R3 TCN DPIHSYNC AF4 DPI_HSYNC (7)
SRCLKENA SRCLKENA (19,23,7) 6/7 R637->R636 TDP0 DPIDE DPI_DE (7)
L25 AF22 EINT0 : Gyro-Sensor P3 AJ2
TESTMODE SRCLKENA2 SRCLKENA2 (23) TDN0 DPICK DPI_PCLK (7)
D24 P29 EINT1 : SIM P4
FSOURCE_P SRCVOLTEN SRCVOLTEN (19,23,7) TDP1
EINT2 : G-Sensor R4 AE5
R28 L29 R1 TDN1 DPIR0 AG3 DPI_R0 (7)
0_0402_5% EINT3 : PMU MT6320
(23) WATCHDOG_B WATCHDOG PWRAP_SPI0_CSN M29 PWRAP_SPI0_CSN (23) 1 R636 2 R2 TDP2 DPIR1 AB2 DPI_R1 (7)
PWRAP_SPI0_CLK PWRAP_SPI0_CLK (23) TDN2 DPIR2 DPI_R2 (7)
U24 M26 1 P7 AD5
(11) MCU_JTCK
U28 JTCK PWRAP_SPI0_MI M28
PWRAP_SPI0_MI (23) EINT5 : CTP P6 TDP3 DPIR3 AF2
DPI_R3 (7)
Close to MT6583 (11) MCU_JTDO JTDO PWRAP_SPI0_MO PWRAP_SPI0_MO (23) 5/23 ADD FOR RF EINT6 : MT3332 TDN3 DPIR4 DPI_R4 (7)
T25 L28 @ C1736 AD2
(11) MCU_JTRST_B U29 JTRST_B PWRAP_EVENT PWRAP_EVENT (23) EINT8 : MT6628 BGF M4 DPIR5 AC4 DPI_R5 (7)
R201 33P 50V J NPO 0402
(11) MCU_JTDI U25 JTDI K25 2 EINT9 : MT6628 WiFi (10) RCP N4 RCP DPIR6 AG2 DPI_R6 (7)
5.11K +-1% 0402
(11) MCU_JRTCK JRTCK ADC_CLK ADC_CLK (24) (10) RCN RCN DPIR7 DPI_R7 (7)
MIPI function only

2 1 V26 K26 L1
(11) MCU_JTMS JTMS ADC_WS ADC_WS (24) EINT10 : HEADSET (10) RDP0 RDP0
K28 M1 AC1
ADC_DAT_IN ADC_DAT_IN (24) (10) RDN0 RDN0 DPIG0 DPI_G0 (7)
USB_VRT AD28 M27 N3 AB5
1 R222 2 AE27 USB_VRT DAC_CLK L26 DAC_CLK (24) (10) RDP1 M3 RDP1 DPIG1 AH1 DPI_G1 (7)
+VBUS_R
+VBUS AC27 USB_VBUS DAC_WS L27 DAC_WS (24) (10) RDN1 M2 RDN1 DPIG2 AD3 DPI_G2 (7)
4.99M +-1% 0402
(17) USB_DP USB_DP_P0 DAC_DAT_OUT DAC_DAT_OUT (24) RDP2 DPIG3 DPI_G3 (7)
90 Ohm AB27 N2 AD6
(17) USB_DM USB_DM_P0 RDN2 DPIG4 DPI_G4 (7)
1 R221 2 R26 N25 P2 AA5
B 1M_0402_1%
differential
(17) USB_ID IDDIG SIM1_SCLK M25
SIM1_SCLK (24)
P1 RDP3 DPIG5 AH2
DPI_G5 (7)
B
AE29 SIM1_SIO P28 SIM1_SIO (24) RDN3 DPIG6 AA2 DPI_G6 (7)
USB11_DP
TP1374 PAD @ AD29 USB_DP_P1 SIM1_SRST M24 SIM1_SRST (24) L4 DPIG7 DPI_G7 (7)
USB11_DM 5/23 Add GPIO_SW UART1: Debug/MT3332
TP1378 PAD @ USB_DM_P1 SIM2_SCLK GPIO_SW (8) (10) CMDAT9 RCP_A
5/27 D N24 K4 AC3
AB25 SIM2_SIO N28 5/21 Del LTE_ON_OFF#, GPS_OFF#, LTE_RESET
UART2: (10) CMDAT8
L3 RCN_A DPIB0 AC5
DPI_B0 (7)
R1765,R1766 (23) CHD_DP
AA25 CHD_DP_P0 SIM2_SRST UART3: MT6628 (10) CMVREF
K3 RDP0_A DPIB1 AG1
DPI_B1 (7)
(23) CHD_DM CHD_DM_P0 (10) CMHREF RDN0_A DPIB2 DPI_B2 (7)
EINT0
T28
EINT_GY (12)
UART4: Debug (10) CMDAT7
K2
RDP1_A DPIB3
AB4
DPI_B3 (7)
T27 L2 Y5
EINT1 EINT_A (18) (10) CMDAT6 RDN1_A DPIB4 DPI_B4 (7)
B2 T26 AE2
(9) DAICLK MRG_I2S_PCM_CLK EINT2 DPIB5 DPI_B5 (7)
C2 R27 J4 AD4
(9) DAIPCMIN MRG_I2S_PCM_RX EINT3 EINT_PMU (23) (10) CMDAT5 RCP_B DPIB6 DPI_B6 (7)
C3 R25 MB_ID0 I2C0 : CTP H4 AA1
(9) DAISYNC E2 MRG_I2S_PCM_SYNC EINT4 AE8 (10) CMDAT4 J3 RCN_B DPIB7 DPI_B7 (7)
(9) DAIPCMOUT E1 MRG_I2S_PCM_TX EINT5 AH8 EINT_CTP (11) I2C1 : Sub Camera H3 RDP0_B
(9) DAIRST DAI_RSTB EINT6 MT8389_EINT_MT3332 (21) I2C2 : RDN0_B
AG8 5/23 add LED_Signal_EN J2 G3
EINT7 LED_Signal_EN (7) (10) CMDAT3 RDP1_B CMMCLK CMMCLK (10)
(7) I2S0_CK
AG9
I2S_CLK EINT8
AJ8
EINT_6628_BGF (9) I2C3 : G/GYRO sensor (10) CMDAT2
J1
RDN1_B CMRST
H2
CMRST (10)
AH9 AF8 I2C4 (PMIC) : Charger IC G4
(7) I2S0_WS AJ9 I2S_WS EINT9 AD10 EINT_6628_WIFI (9) CMPCLK F2 CMPCLK (10)
I2S0_DAT_IN AD8 I2S_DATA_IN EINT10_AUXIN2 AE10 EINT_HP (8) I2C5 (PMIC) : MIPI_VRT R6 CMPDN G2 CMPDN (10)
(7) I2S0_DAT_OUT I2S_DATA_OUT EINT11_AUXIN3 CHG_TEMP (22) I2C6 (PMIC) : VRT CMFLASH
AF10
EINT16_AUXIN4 MT8193_INT (7)
1
AJ3
AH11 LSCE0B AJ5 MT8389_GPIO_GPS_EN (21)
R203 MT8389E1_PCDDR3
TP1357PAD @ AH10 AUXIN0 LSCE1B AG4 GPIO_CTP_RST (11)
5/10 1.5K_0402_1%
AUXIN1 LSCK DPI1_CK (7)
AH3 MODE4/6 : MD1/2_GPS_SYNC I2S :
AF12 LSDA AE6
GPIO_6628_GPS_SYNC (9)
LED_EN (7)
@ 8125 footprint
2
AE11 AUX_XP LSA0 AH6
AE12 AUX_XM LRSTB AH4 GNSS_HRST (21)
AUX_YP LPCE0B GPIO_HDMI_POWER_EN (7) MSDC0 : eMMC
AG12 DVDD33_MC2 AF6
AUX_YM DVDD33_MC1
LPCE1B MT8389_GPIO_FRAME_SYNC (21) MSDC1 : SD Card
MSDC2_SDWPI
MSDC1_SDWPI
AH7
Close to MT6583
MSDC0_RSTB
LCM_BL_EN (7)
MSDC3_DAT3
MSDC3_DAT2
MSDC3_DAT1
MSDC3_DAT0
MSDC2_DAT3
MSDC2_DAT2
MSDC2_DAT1
MSDC2_DAT0
MSDC1_DAT3
MSDC1_DAT2
MSDC1_DAT1
MSDC1_DAT0
MSDC0_DAT7
MSDC0_DAT6
MSDC0_DAT5
MSDC0_DAT4
MSDC0_DAT3
MSDC0_DAT2
MSDC0_DAT1
MSDC0_DAT0
LPTE MSDC2 : GPIO (2.8V)

MSDC3_CMD
MSDC2_CMD
MSDC1_CMD
MSDC0_CMD
AH12
MSDC3_CLK
MSDC2_CLK
MSDC1_CLK
MSDC0_CLK
MSDC2_INSI
MSDC1_INSI
REFP @ PAD TP1360

AH13
REFN DISP_PWM
AE7
LCD_PWM (7) MSDC3 : MT6628
+VDD18_6583
1
C213
1U 10V K X5R 0402
MT8389E1_PCDDR3
2
D3
D4
B4
A4
C4
D5
W5
W2
Y4
V4
W3
W4
V5
Y3
T5
V2
T4
V1
U2
U5
U6
Y2
D26
B27
A27
A25
D25
B25
C26
B26
C27
A28
E25
@ AH4 NEED CHANGE

eMMC_RST (13)
8125 footprint eMMC_CMD (13) 6/3 A
eMMC_CLK (13)
2
Close to MT6583 eMMC_DAT0 (13)
@ R1869 R1872 @ MTK intn
(9) MC3DA3 eMMC_DAT1 (13)
10K_0402_5% 10K_0402_5%
1
A A
(9) MC3CLK eMMC_DAT5 (13)
GPIO_CTP_RST
(9) MC3CMD eMMC_DAT6 (13)
eMMC_DAT7 (13)
EINT_CTP
(9) GPIO_6628_GPS_LNA_EN
(9) GPIO_6628_PMU_EN MC1INSI (17)
LCM_RST_2V8
LCM_STBY_2V8 MC1CM (17)
MC1CK (17)
MC1DA0 (17)
MC1DA1 (17)
MC1DA2 (17)
MC1DA3 (17)
2012/11/03 2013/11/03 Title
Issued Date Deciphered Date MT8377 - Baseband
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
ZZZ1
U5 U6 EDCLK
2
+EVREF M8 E3 ED3 +EVREF M8 E3 ED20
(5,6) +EVREF VREFCA DQL0 (5,6) +EVREF VREFCA DQL0
H1 F7 ED6 H1 F7 ED19 100_0201_5%
VREFDQ DQL1 F2 ED2 VREFDQ DQL1 F2 ED22
1 DQL2 1 DQL2
C61 EA0 N3 F8 ED5 C69 EA0 N3 F8 ED23 R525 DDR3L NAN 256Mx16@
EA1 P7 A0 DQL3 H3 ED1 EA1 P7 A0 DQL3 H3 ED18 X76521BOL01
1
A1 DQL4 A1 DQL4
0.1U 6.3V K X5R 0201

EA2 P3 H8 ED4 0.1U 10V +-10% X7R 0402 EA2 P3 H8 ED21 EDCLK_B ALT. GROUP PARTS NANYA 1G ZEJ00
2 EA3 N2 A2 DQL5 G2 ED0 2 EA3 N2 A2 DQL5 G2 ED16
EA4 P8 A3 DQL6 H7 ED7 EA4 P8 A3 DQL6 H7 ED17 ZZZ2
EA5 P2 A4 DQL7 EA5 P2 A4 DQL7
EA6 R8 A5 EA6 R8 A5 EDCLK1
+EVREF EA7 R2 A6 D7 ED8 +EVREF EA7 R2 A6 D7 ED30
A7 DQU0 A7 DQU0
2
D D
EA8 T8 C3 ED13 EA8 T8 C3 ED29
EA9 R3 A8 DQU1 C8 ED14 EA9 R3 A8 DQU1 C8 ED28 100_0201_5%
1 A9 DQU2 1 A9 DQU2
C66 EA10 L7 C2 ED15 C65 EA10 L7 C2 ED25 DDR3L HYN 256Mx16@
EA11 R7 A10/AP DQU3 A7 ED10 EA11 R7 A10/AP DQU3 A7 ED24 R526 X76521BOL02
A11 DQU4 A11 DQU4
0.1U 6.3V K X5R 0201

EA12 N7 A2 ED9 0.1U 10V +-10% X7R 0402 EA12 N7 A2 ED31 ALT. GROUP PARTS HYNIX 1G ZEJ00
1
2 EA13 T3 A12 DQU5 B8 ED12 2 EA13 T3 A12 DQU5 B8 ED26 EDCLK1_B
EA14 T7 A13 DQU6 A3 ED11 EA14 T7 A13 DQU6 A3 ED27
M7 A14 DQU7 M7 A14 DQU7
A15/BA3 A15/BA3 6/6 M X76 Part number
ED0 +DDR3VCCIO +DDR3VCCIO
ED1 EBA0 M2 B2 EBA0 M2 B2
ED2 EBA1 N8 BA0 VDD D9 EBA1 N8 BA0 VDD D9
ED3 EBA2 M3 BA1 VDD G7 EBA2 M3 BA1 VDD G7 Vendor X76 level BOM structure
ED4 BA2 VDD K2 BA2 VDD K2
ED5 VDD K8 VDD K8
ED6 VDD N1 VDD N1 NANYA-1G X76521BOL01 NAN 256Mx16@
ED7 J7 VDD N9 J7 VDD N9
ED8
(5) EDCLK
K7 CK VDD R1
(5) EDCLK1
K7 CK VDD R1 HYNIX-1G X76521BOL02 HYN 256Mx16@
(5) EDCLK_B K9 CK VDD R9 (5) EDCLK1_B K9 CK VDD R9
ED9 ECKE ECKE
ED10 CKE/CKE0 VDD CKE/CKE0 VDD
ED11
ED12 RODT1_R K1 A1 RODT2_R K1 A1
ED13 RCS0_R L2 ODT/ODT0 VDDQ A8 RCS1_R L2 ODT/ODT0 VDDQ A8
ED14 /ERAS J3 CS/CS0 VDDQ C1 /ERAS J3 CS/CS0 VDDQ C1
ED15 /ECAS K3 RAS VDDQ C9 /ECAS K3 RAS VDDQ C9
ED16 /EWR L3 CAS VDDQ D2 /EWR L3 CAS VDDQ D2
ED17 WE VDDQ E9 WE VDDQ E9
ED18 VDDQ F1 VDDQ F1
ED19 F3 VDDQ H2 F3 VDDQ H2
(5) EDQS0 DQSL VDDQ (5) EDQS2 DQSL VDDQ
ED20 C7 H9 C7 H9
(5) EDQS1 DQSU VDDQ (5) EDQS3 DQSU VDDQ
ED21
ED22 U5 U6
ED23 E7 A9 E7 A9 @ @
(5) EDQM0 D3 DML VSS B3 (5) EDQM2 D3 DML VSS B3
ED24
(5) EDQM1 DMU VSS (5) EDQM3 DMU VSS
ED25 E1 E1
ED26 VSS G8 VSS G8 NANYA-1G SA00006UM10 SA00006UM10
ED27 G3 VSS J2 G3 VSS J2
(5) /EDQS0 DQSL VSS (5) /EDQS2 DQSL VSS 256M16 NT5CC256M16BP-DI 256M16 NT5CC256M16BP-DI
C ED28 B7 J8 B7 J8 C
(5) /EDQS1 DQSU VSS M1 (5) /EDQS3 DQSU VSS M1
ED29
ED30 VSS M9 VSS M9 U5 U6
(5) ED[0..31] VSS VSS
ED31 P1 P1 @ @
ERESET_ T2 VSS P9 ERESET_ T2 VSS P9
RESET VSS T1 RESET VSS T1
L8 VSS T9 L8 VSS T9 HYNIX-1G SA00005AV50 SA00005AV50
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
R65 256M16/1600 H5TC4G63AFR-PBA 256M16/1600 H5TC4G63AFR-PBA
1
R71
240_0201_1% J1 B1 J1 B1
L1 NC/ODT1 VSSQ B9 240_0201_1% L1 NC/ODT1 VSSQ B9
J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1
2
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
(5) EBA1 VSSQ E8 VSSQ E8
(5) /EWR VSSQ VSSQ
F9 F9
(5) ECKE VSSQ G1 VSSQ G1
(5) EBA0 VSSQ VSSQ
G9 G9
(5) ERESET_ VSSQ VSSQ
(5) EBA2
96-BALL 96-BALL
(5) /ERAS
SDRAM DDR3 SDRAM DDR3
(5) /ECAS
H5TC4G63MFR-PBA 96P H5TC4G63MFR-PBA 96P
@ +DDR3VCCIO @ +DDR3VCCIO
DDR3L DDR3L
1
R75 @ @ R73
0_0201_5% 1K_0201_1%
2
2
RCS0_R RODT1_R RODT2_R RCS1_R
(5) RCS0_R (5) RCS1_R
1
1
R77 R70
@ R76 R72 @
1K_0402_1% 1K_0201_1% 1K_0201_1% 1K_0402_1%
2
2
B
U5 Test Point B
/ERAS
TP01 PAD @
/ECAS
TP02 PAD @
/EWR
TP03 PAD @
+DDR3VCCIO +DDR3VCCIO ECKE
TP04 PAD @
+DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO EBA0
TP05 PAD @
0.1U 6.3V K X5R 0201
EBA1
TP06 PAD @
1 1 1 1 1 1 1 1 EDQM0
TP07 PAD @
C71 C56 C60 C67 C1619 C1630 C1634 EDQM1
TP08 PAD @
C78 EDQS0
TP09 PAD @
0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U_0402_6.3VM 2.2U_0402_6.3VM 2.2U_0402_6.3VM /EDQS0
2 2 2 2 2 2 2 2 TP10 PAD @
0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 EDQS1
(5) EA[0..14] TP11 PAD @
EA0 /EDQS1
TP12 PAD @
EA1 EA9
TP13 PAD @
EA2 +DDR3VCCIO +DDR3VCCIO EA10
TP14 PAD @
EA3 +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO ED1
TP15 PAD @
0.1U 6.3V K X5R 0201
0.1U 6.3V K X5R 0201
0.1U 6.3V K X5R 0201

EA4 ED5
TP16 PAD @
0.1U 6.3V K X5R 0201
0.1U 6.3V K X5R 0201
EA5 1 1 1 1 1 1 1 1 ED10
TP17 PAD @
EA6 C62 C70 C74 C54 C1620 C1629 C1633 C57 ED15
TP18 PAD @
EA7
EA8 2.2U_0402_6.3VM 2.2U_0402_6.3VM 2.2U_0402_6.3VM
EA9 2 2 2 2 2 2 2 2
EA10 U6 Test Point
EA11
EA12 +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO /ERAS
TP19 PAD @
EA13 /ECAS
TP20 PAD @
EA14 1 1 1 1 1 1 1 1 1 /EWR
TP21 PAD @
0.1U 6.3V K X5R 0201
C73 C58 C63 C68 C1626 C1632 C1636 C76 C1669 ECKE
TP22 PAD @
EBA0
TP23 PAD @
0.1U 10V +-10% X7R 0402 0.1U 10V +-10% X7R 0402 2.2U_0402_6.3VM 2.2U_0402_6.3VM 2.2U_0402_6.3VM 0.1U 6.3V K X5R 0201 2.2U_0402_6.3VM EBA1
2 2 2 2 2 2 2 2 2 TP24 PAD @
EDQM2
TP25 PAD @
0.1U 10V +-10% X7R 0402 EDQM3
TP26 PAD @
EDQS2
TP27 PAD @
+DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO +DDR3VCCIO /EDQS2
TP28 PAD @
EDQS3
TP29 PAD @
1 1 1 1 1 1 1 1 1 /EDQS3
TP30 PAD @
0.1U 6.3V K X5R 0201
0.1U 6.3V K X5R 0201
0.1U 6.3V K X5R 0201
C64 C72 C75 C59 C1627 C1631 C1635 C77 C1668 EA9
TP31 PAD @
A EA10 A
TP32 PAD @
0.1U 6.3V K X5R 0201
2.2U_0402_6.3VM 2.2U_0402_6.3VM 2.2U_0402_6.3VM 0.1U 6.3V K X5R 0201 2.2U_0402_6.3VM ED20

2 2 2 2 2 2 2 2 2 TP33 PAD @
ED21
TP34 PAD @
ED30
TP35 PAD @
ED31
TP36 PAD @
+DDR3VCCIO
1
C1617
2012/11/03 2013/11/03 Title
2.2U_0402_6.3VM
Issued Date Deciphered Date Memory (DDR3)
2
C
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
+VAST_PMU_R need check GPIO_HDMI_POWER_EN U4030

(5) GPIO_HDMI_POWER_EN 1 7
+VEMC_3V3 SHDN TP 6
5/29 D C-
2 R5178 1 +VAST_PMU_R C4234 2 1 0.1U_0402_16V4Z 2 0_0402_5%
+VAST_PMU GND
0_0402_5% C4235 2 1 0.1U_0402_16V4Z R5194 1 2 0_0402_5% 5 2 R5165 1 1
2 1 3 VIN +VBAT
C4236 0.1U_0402_16V4Z @ <BOM Structure> +5V_DDC
2 1 VOUT 4
C4237 0.1U_0402_16V4Z 6/7 Q27->Q26 Q26 AO3413_SOT23-3
C+ 2 C4227 HDMI_HPD
1U_0603_10V6K
C4238 2 1 0.1U_0402_16V4Z 1U 6.3V K X5R 0402
2
2
C4228
C4239 2 1 0.1U_0402_16V4Z 1 3 +MT8193_AVDD33_HDMI C4226
1
C4240 2 1 0.1U_0402_16V4Z 1U 6.3V K X5R 0402 1 D812
1 C4229 R5162 SOT523
TVNST52302AB0
2
+VEMC_3V35/29 D 5/30 A @ 0_0402_5%
G
2
+VEMC_3V3 0.1U_0402_25V4Z
+VEMC_3V3_PMU R5205 2 1 +VEMC_3V3 C4241 2 1 0.1U_0402_16V4Z Differential Signal !2
2
0_0603_5% 1 R5221 2 1 R5230 2 No Through Hole ! JP1
C4243 2 1 0.1U_0402_16V4Z 47K +-5% 0402 47K +-5% 0402 L3502 DLP11TB800UL2L_4P 100 ohm - Impedance HTPLG 1
C4244 2 1 0.1U_0402_16V4Z HDMI_DAT2_P 1 2 2 HP_DET
D +VDD18_6583 @ Utility D
C4245 2 1 0.1U_0402_16V4Z HDMI_DAT2_P_C 3
D2+
2
D 0.1U_0402_16V4Z 4
+VDD18_6583 2 QL1 C4242 HDMI_DAT2_M 4 3 HDMI_DAT2_M_C 5 D2_Shield
G BSS138W-7-F_SOT323-3 HDMI_DAT1_P_C 6 D2-
1
1 2 2 1 R5171 +MT8193_DVDDIO18_1 0.1U_0402_25V4Z 2 1 C4230 7 D1+
0_0402_5% 6/6 M Q26,QL1 S
3
R5169 0_0402_5% 2 1 R5173 +MT8193_DVDDIO18_2 0.1U_0402_25V4Z 2 1 C4231 L3501 DLP11TB800UL2L_4P HDMI_DAT1_M_C 8 D1_Shield 20
0_0402_5% 0_0402_5% 2 1 R5174 +MT8193_DVDDIO18_DPI0.1U_0402_25V4Z 2 1 C4232
D R5224 HDMI_DAT1_P 1 2 HDMI_DAT0_P_C 9 D1- GND0 21
10 D0+ GND1 22
HDMI_DAT0_M_C 11 D0_Shield GND2 23
0_0402_5% HDMI_DAT1_M 4 3 HDMI_CK_P_C 12 D0- GND3
R5175 2 1 +MT8193_AVDD28 2 1 C4233 13 CK+
+VTCXO_1_PMU CK_Shield
+VTCXO_2_PMU R5176 1 @ 2 0.1U_0402_25V4Z HDMI_CK_M_C 14
0_0402_5% HDMI_CEC 15 CK-
0_0402_5% 16 CEC
DDC_SC 1 R5172 2 HDMI_SC 17 DDC/CEC_GND
L3503 DLP11TB800UL2L_4P DDC_SD 1 2 HDMI_SD 18 SCL
HDMI_DAT0_P 1 2 R5182 1 R5150 2+HDMI_VCC 19 SDA
+5V_DDC +5V
U1B 0_0402_5% 0_0402_5%
1.8K +-1% 0402 1
1
HDMI_DAT0_M 4 3 1 R5170 2 C4224 C4225
+VEMC_3V3 A3 1 2
DVDDIO33_18_NFI E4 +VAST_PMU_R R5177 0.1U_0402_25V4Z 10U_0603_25V6M
2
DVDD12_1
2
+MT8193_AVDD33_HDMI C1 E7 L3504 DLP11TB800UL2L_4P 1.8K +-1% 0402 2
+VAST_PMU_R K3 AVDD33_HDMI DVDD12_2 E8 HDMI_CK_P 1 2
+VAST_PMU_R L1 AVDD12_HDMI_C DVDD12_2 F8
F4 AVDD12_HDMI_D DVDD12_2 G8 D814 @
H3 AVSS12_HDMI DVDD12_2 H10 HDMI_CK_M 4 3 TVNST52302AB0 SOT523
K4 AVSS12_HDMI DVDD12_3 J9
power domain
1
AVSS12_HDMI DVDD12_4 B7
+MT8193_AVDD28 L2 DVSS12 G5
M4 AVDD28 DVSS12 G6
AVSS28 DVSS12 G7
+VEMC_3V3 P2
AVDD33_PLLGP
DVSS12
DVSS12
G9 Backlight
+VAST_PMU_R R1 G12 6/7 R1663->R5229 5/23 Change backlight circuit
N3 AVDD12_VPLL DVSS12 F5
AVSS12_VPLL DVSS12
DVSS12
H7 +VBAT LCD VDD @
+VEMC_3V3 R10 H8 5/27 M +VBAT 1 2 R1662
+VAST_PMU_R R2 AVDD33_LVDSA DVSS12 H9 0_0603_5% +LEDVDD
C
AVDD12_LVDSA DVSS12 5/21 A C
N6 H11 U8
AVSS12_LVDSA DVSS12 U21
1
M8 H12 C1615 0_0402_5% +VCD_VDD 5/27 A W=60mils
AVSS12_LVDSA DVSS12
1U_0402_6.3V6K
C605
M7 J6 2 R1642 1 1 1 2 6 1
AVSS12_LVDSA DVSS12 IN IN OUT
4.7U_0603_6.3V6K
J7 2.2U_0603_10V6K 5 1 R5229 6/11 A
2
DVSS12 OUT
0.1U_0402_25V6
+VEMC_3V3 R11 J8 2 0_0603_5% @ 1
DVDDIO33_DGO DVSS12 GND
1
J11 2 1 3 5 C2651
C2650
DVSS12 FLAG SET
1
+MT8193_DVDDIO18_DPI J12 K6 (5) LED_EN 3 4 C1616 @ R1656 100K_0402_5%
DVDDIO18_33_DPI DVSS12 SHDN SET
1
K7 2 R1663
1
2
+MT8193_DVDDIO18_2 A8 DVSS12 K8 NCT3705U-33_SOT23-5 2.2U_0603_10V6K 4 2 2
(5) LCM_BL_EN
2
DVDDIO18_33 DVSS12 EN(/EN)GND
30K_0402_1%
+MT8193_DVDDIO18_1 A13 K9 C1685
DVDDIO18_33 DVSS12
2
P10 0.1U_0402_25V6 G527ATP1U_TSOT23-6
R5219 1 2 N13 DVSS12 2
2
EFUSE R1638
0_0402_5% 6/6 M R1646
MT8193 100K_0402_5% 100K_0402_5% 6/13 M
2
6/13 M
1
U1A
C8
16V2 rating
1
CK_SEL 0_0402_5% SRCLKENA (19,23,5)
D6 2 1 R5197
EN_BB 0_0402_5% SRCVOLTEN (19,23,5)
B9 D8 2 1 R5193
D9 NLD0 control RESET_N D7 0_0402_5% 2 1 R5191 SYSRST_B (11,23,5) +LCM_VDD
+VDD18_6583
NLD1 INT 0_0402_5% MT8193_INT (5)
B10 A7 2 1 R5190
C9 NLD2 NFI_CPU RTC_32K_CK E11 0_0402_5% R5187 RTC32K1V8 (23,5)
NLD3 SCL SCL2 (5) 05/24 ADD
A10 E12
NLD4 SDA SDA2 (5)
D10 6/7 R1758->R1756
NLD5
2
B11
D11 NLD6 5/27 Change R214 R1756
A11 NLD7 A14 DPI_B0 +LCM_VDD 100K_0402_5%
NREB DPI0D0 DPI_B0 (5) 10K_0402_5%
2
+VDD18_6583
G
D12 C13 DPI_B1
NWEB DPI0D1 DPI_B1 (5)
B12 B14 DPI_B2
MT8193 DPI_B2 (5)
1
C12 NALE DPI0D2 D13 DPI_B3 U87 3 1 LED_Signal_EN_R
NCLE DPI0D3 DPI_B3 (5) (5) LED_Signal_EN
B13 B15 DPI_B4 1 6
D
NRNB BGA-150 DPI0D4 A15 DPI_B5
DPI_B4 (5) 1 2 3 VCCA VCCB 4 1 2 LCD_PWM_R
DPI0D5 DPI_B5 (5) (5) LCD_PWM A B
C14 DPI_B6 R151 1K_0402_1% 5 2 R205 33_0402_5% Q2 BSS138W-7-F_SOT323-3
B DPI0D6 DPI_B6 (5) DIR GND B
E13 DPI_B7
B6 DPI0D7 E15 DPI_B7 (5)
DPI0 DPI_G0 SN74AVC1T45DCKR_SC70-6
NFRBN DPI0D8 DPI_G0 (5)
C5 E14 DPI_G1 SA000029A00 6/7 Q3->Q2
B5 NFCLE DPI0D9 G14 DPI_G1 (5)
DPI_G2
NFALE DPI0D10 DPI_G2 (5)
A5 F13 DPI_G3
NFWEN DPI0D11 DPI_G3 (5) +VCD_VDD
C4 H14 DPI_VSYNC 5/27 M
B3 NFREN DPI0VSYNC G13 DPI_VSYNC (5)
DPI_HSYNC
NFCEN DPI0HSYNC DPI_HSYNC (5)
A2 H15 RGB_CK 2 1
NFD7 DPI0CK DPI_PCLK (5)
2
B2 0_0402_5% 1 2 need check vcom 0513
A1 NFD6 R5147 @ C1748 R5132
5/23 ADD FOR RF
B1 NFD5 NFI_NAND 33P 50V J NPO 0402 0_0402_5%
C2 NFD4 J13 DPI_R0 JP8
NFD3 DPI1D0 DPI_R0 (5)
D4 J14 DPI_R1 1 +LCM_VDD
DPI_R1 (5) C4219
1
C3 NFD2 DPI1D1 J15 DPI_R2 1 2
NFD1 DPI1D2 DPI_R2 (5) 5/27 M NET 2
D5 K13 DPI_R3 3 1 2 LCM_RIN0-_C 4 3LCM_RIN0-
NFD0 DPI1D3 DPI_R3 (5) 3
6/6 M DPI1 L15 DPI_R4 4
DPI1D4 L14 DPI_R4 (5) 4 5
DPI_R5 5/27 A
DPI1D5 DPI_R5 (5) 5 1U 6.3V K X5R 0402
R5218 1 2 2.49K_0402_1% D1 M14 DPI_R6 6 LCM_RIN0+_C 1 2LCM_RIN0+
F2 HDMI_EXT_RES DPI1D6 N14 DPI_R6 (5) 6 7
HDMI_CK_M DPI_R7
CLK_M DPI1D7 DPI_R7 (5) TP1393 PAD @ DPI_DE (5) 7 L3507 DLP11TB800UL2L_4P
HDMI_CK_P F1 N15 DPI1_CLK 2 1 8 LCM_RIN0-_C
CLK_P DPI1CK DPI1_CK (5) TP1394 PAD @ DPI_G4 (5) 8
HDMI_DAT0_M F3 0_0402_5% 9 LCM_RIN0+_C
G3 CH0_M TP1395 PAD @ DPI_G5 (5) 9 10 4 3LCM_RIN1-
HDMI_DAT0_P R5145 LCM_RIN1-_C
CH0_P TP1397 PAD @ DPI_G6 (5) 10
HDMI_DAT1_M H1 11 LCM_RIN1-_C
H2 CH1_M M12 TP1300 PAD @ DPI_G7 (5) 11
HDMI_DAT1_P HDMI R5220 1 2 0_0402_5%
I2S0_CK (5)
12 LCM_RIN1+_C
HDMI_DAT2_M H4 CH1_P (analog) I2S I2S_BCK L13 R5222 1 2 0_0402_5% 12 13 LCM_RIN1+_C 1 2LCM_RIN1+
CH2_M I2S_LRCK I2S0_WS (5) 13
HDMI_DAT2_P J4 L12 R5223 1 2 0_0402_5% 14 LCM_RIN2-_C
CH2_P I2S_DATA I2S0_DAT_OUT (5) 14 L3505 DLP11TB800UL2L_4P
15 LCM_RIN2+_C
15 16
16 17 LCM_CLKIN-_C LCM_RIN2-_C 4 3LCM_RIN2-
HDMI_HPD P15 N1 17 18 LCM_CLKIN+_C
DDC_SD R14 HTPLG HDMI XTALI N2 18 19
6/3 M HDMISD (digital) XTALO 19
D815 DDC_SC R15 DCXO L4 20 LED_ID1 R5183 2 110K_0402_5% LCM_RIN2+_C 1 2LCM_RIN2+
1 R5225 2 2 1HDMI_CEC P14 HDMISCK CLKBUF1 L5 20 21 LED_ID2 R5179 1 2
+VEMC_3V3 CEC CLKBUF2 21 L3506 DLP11TB800UL2L_4P
27K +-1% 0402 M3 22 10K_0402_5%
RB551V-30_SOD323-2 CLKBUF3 X605 22 23 2 R5154 1LCD_PWM_R
3 4 23 24 0_0402_5% LCM_CLKIN-_C 4 3LCM_CLKIN-
@1 R5227 2 100_0402_1% P3 OUT GND 24 25
TP_VPLL 25 +LEDVDD
A LCM_RIN0- P4 L10 26 A
LCM_RIN0+ R4 AO0N G0 K11 31 26 27 LCM_CLKIN+_C 1 2LCM_CLKIN+
LCM_RIN1- N4 AO0P B5 M10 2 1 32 G1 27 28
LCM_RIN1+ N5 AO1N LVDS RGB B4 N10 GND IN 33 G2 28 29 LED_Signal_EN_R L3508 DLP11TB800UL2L_4P
LCM_RIN2- P6 AO1P B3 L11 34 G3 29 30
AO2N B2 26MHZ_7.3PF_TZ1689A G4 30
LCM_RIN2+ R6 P11 5/23 ADD L for RF require
LCM_CLKIN- N7 AO2P B1 R13 NEED CHECK LCM_EL_EN
LCM_CLKIN+ N8 AOCK0N B0 N11
LCM_RIN3- R8 AOCK0P VCLK P13
LCM_RIN3+ P8 AO3N HSYNC N12
5/31 D TP1396,1399 AO3P VSYNC
Issued Date 2012/11/03 Deciphered Date 2013/11/03 Title
MT8193 LVDS/HDMI
C
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
(5) EINT_HP
close to IC close to connector +VDD18_6583
1 1
Earphone RECEIVER
1
C1699 C1700 R1690
33P 50V J NPO 0402 R1691 R1692 33P 50V J NPO 0402 JP2
2 2 1 2 1 2 HP_MP3L 470K_0402_5% AUDJACK_MIC 1
AU_HPL_R 4
AUDJACK_GND_R
2
1 33_0402_5% 0_0603_5% 1 AUDJACK_L 2
C1701 C1702 EMC@ FBMA-L11-160808-700LMT_2P AUDJACK_GND 1 2 R1693 AUDJACK_GND_R
L843 1 2 0_0402_5% AUDJACK_L
D R1694 D
100P_0402_50V8J 100P_0402_50V8J EMC@ FBMA-L11-160808-700LMT_2P
2 R1695 R1696 2 1 2 EMC@L844 1 2 ADDJACK_DET_R AUDJACK_R 3
2 1 2 1 HP_MP3R 47K +-5% 0402 L845 1 2 FBMA-L11-160808-700LMT_2P AUDJACK_R ADDJACK_DET_R 5
AU_HPR_R 1 2 FBMA-L11-160808-700LMT_2P
1 1 L846 AUDJACK_MIC
33_0402_5% 0_0603_5% EMC@
2
C1703 C1704 @
3
33P 50V J NPO 0402 33P 50V J NPO 0402 Microphone: 6k~13k Ohm R1 @
2 2 0_0402_5% R2 6/6 M JP2 PCB Footprint
TV: 75 Ohm
0_0402_5%
D1 D2
EMC@ EMC@
1
TVNST52302AB0 SOT523 TVNST52302AB0 SOT523
1
1000P_0402_50V7K 1 2 C1705 EMC@
1
2 1 R1701 HP_MIC
(24) ACCDET
1K_0402_1% 1000P_0402_50V7K 1 2 C1706 EMC@
1
C1714 @ 1000P_0402_50V7K 1 2 C1707 EMC@
0.1U_0402_25V4Z
2
2
releate to MIC Detect +VGP6_PMU
L847
FBMA-L11-160808-700LMT_2P
EMC@ 1 C1484
1
+MICBIAS1 0.1U_0402_10V7K
R438
GND of C1709(10uF) and headset
1
0_0402_5% 5/21 M
Single via to GND plane
Earphone MICPHONE
2
2
should tie together and single via to U146
GND plane
2
1K_0402_1% A2 A1 AU_SPK1P_R
R1699 AU_SPK1N_R A3 V+ NO2 B1 AU_HPR
C B3 NO1 COM2 C1 AU_HPR (24) C
Close to BB Close to MIC 5/23 ADD R for COST DOWN SW AU_HPL AU_HPR_R
(24) AU_HPL
1
C1709 AU_HPL_R C3 COM1 NC2 D1

1 2 AU_VIN1_N1 1 2 AU_HPL 1 @ 2 AU_HPL_R ADDJACK_DET_R 1 2 SW_DET D3 NC1 IN2 D2
(24) AU_VIN1_N 6/7 R443->R442 IN1 GND
C1708 10U_0603_6.3V6M R442 0_0402_5% R4401 20_0402_5%
R444->R443 (5) GPIO_SW
2
0.1U 10V +-10% X7R 0402 1 1 @ 2 AU_SPK1N_R R441 0_0402_5% TS5A22362YZPR_DSBGA10

R445->R444 R443 0_0402_5%
C1710
Close to JP2
1.5K_0402_1% R446->R445 AU_HPR 1 @ 2 AU_HPR_R SA00005AE00
33P1 50V J NPO 0402 R1700 R444 0_0402_5%
C1711 2 1 @ 2 AU_SPK1P_R
1
R445 0_0402_5% IN NC to COM NO to COM

100P_0402_50V8J
2 1
COM to NC COM to NO
HP Switch
C1712 tie together and single via to GND plane L ON OFF HP
0.1U 10V +-10% X7R 0402 33P 50V J NPO 0402
2 R1241
C1713 H OFF ON SPK
1 2 HP_MIC 1 2 +VDD_SPKR 5/21 M
(24) AU_VIN1_P +VBAT
0.1U_0402_10V7K 1
1
5V C1417 C1418
0_0402_5%
10U_0603_25V6M
2
2
U143
4
6/7 R1698->R1730
SPAKER
PVDD1
PVDD2
R1697->R1729
5/21 Update MIC1 PCB Footprint
3300P_0402_50V7K JP9
AU_SPK1P_R 1 2 C1419 9 5 SPK_R-
DMIC Conn. 5/30 A +MICBIAS0 +VDD18_6583 INPUT-R OUT-RN FBMA-L11-160808-700LMT_2P 2 EMC@ 1 L851 SPKR_RIGHT# 1
1
6 SPK_R+ FBMA-L11-160808-700LMT_2P 2 EMC@ 1 L852 SPKR_RIGHT 2
SW_DET 1 2 ADDJACK_DET
7 OUT-RP FBMA-L11-160808-700LMT_2P 2 1 SPKR_LEFT# 3 2 5
MIC1
R1730 0_0402_5% 5/23 M PD#
EMC@ L859
3 G1
EMC@
EMC@
EMC@
EMC@
B 1 2 R1267 0_0402_5% FBMA-L11-160808-700LMT_2P 2 EMC@ 1 L860 SPKR_LEFT 4 6 B
1 6 1 2 @ 2 SPK_L- 4 G2
2 GND VDD 5 R1729 0_0402_5% DM_DATAR AU_SPK1N_R 1 2 10 OUT-LN
1 1 1 1 ACES_88266-04001
3 LEFT/RIGHT DATA 4 AU_VIN0_N (24) INPUT-L 1
C1415 SPK_L+
GND CLOCK AU_VIN0_P (24) OUT-LP
DM_CLK 5/27swap p9 and p10 3300P_0402_50V7K 5/21 M
8 11 AMP_GAIN1
SPM0423HD4H-WB-2_6P BYPASS G1
3
12 AMP_GAIN2 2 2 2 2
GND
G2
C1773
C1772
C1768
C1767
D57 C1292
TVNST52302AB0 SOT523 2.2U_0603_6.3V6K
EMC@ ALC105-GR_DFN12_3X3 33P 50V J NPO 0402 33P 50V J NPO 0402
13
33P 50V J NPO 0402
33P 50V J NPO 0402
AMP.
1
5/21 M
GAIN1 GAIN2
+VDD_SPKR +VDD_SPKR
0 0 11dB
1 0 14dB 0_0402_5% @
1
2 1 R436
R1266 R1277 0 1 19dB
1K_0402_1% 1K_0402_1% 0_0402_5% @
1 1 25dB 2 1 R437
2
0_0402_5%
AMP_GAIN1 AMP_GAIN2 2 1 R439
6/7 R442->R439
1
A @ R1268 @ R1281 A
1K_0402_1% 1K_0402_1%
5/21 Add Compal GND MTK GND
2
5/21 M 5/21 M Security Classification Compal Secret Data Compal Electronics, Inc.
2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Audio IO
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
(21) GLONASS_RF
2
6/7 UPDATE
R1705
GLONASS@ 0_0402_5% 5/21 add
5/30 M U819 FOR RF
1
U819 JP4 NH520_EMC@ NH520_EMC@ NH520_EMC@
JP3 EMC@ EMC@ EMC@ EMC@ 2 R1704 R1706 U820 NH520_EMC@
2 R1703 RFBPF2012080AM0T62_3P C1716 GND1 1 50 Ohm 1 2 50 Ohm 1 2C1717 1 2 50 Ohm 4 1 GPS_RF
GND1 1 50 Ohm 1 2 50 Ohm C1715 1 2 50 Ohm 3 1 50 Ohm 1 2 50 Ohm WIFI_BT_ANT 3 SIG 0_0402_5% 0_0402_5% Output Input
3 SIG OUT IN GND2 18P_0402_50V8J
1 1
GND
GND2 0_0402_5% 18P_0402_50V8J 18P_0402_50V8J C1720 C1721
1 1
C1718 C1719 IPEX_20279-001E-01 @ @
D D
IPEX_20279-001E-01 @ @ CONN@ 0.1U_0402_10V7K 0.1U_0402_10V7K
GND
GND
GND
2
0.1U_0402_10V7K 0.1U_0402_10V7K 2 2
CONN@
2 2
5
3
2
SAFEB1G57KB0F00R14_5
U822 U822
PK29S004M00 PK29S004R00 5/30 A

AW-NH520(MT6228) AW-NH520T(MT6628T) TP1384 TP1385 6/7 TP1392->TP1384
PAD PAD
NH520@ GLONASS@ @@
TP1400->TP1385
+MT6620_1V8
5/30 A
0_0402_5% R1713
+VDD18_6583 2 1 1 R1708 2 1 2
RTC32K2V8 (21,23)
0_0402_5% R1723 2 0_0402_5%
0.1U_0402_10V7K RTCCLK_O
2 @ PAD TP1391
1
C1737 C1723
0.1U_0402_10V7K 2.2U_0603_10V6K C1722 OSC_IN_6620 2 1
1 CLK2_WCN_R (19)
0_0402_5% R635
2
1 @ GLONASS@ SYNC -----> BPI_BUS8
60
59
58
57
56
52
28
15
40
34
33
35
U822
6
5
+VBAT
change to SH00000RT00
DVDDIO_SD1
ANTSEL3
ANTSEL2
GND
GND
GND
GND
GND
GND
GND
EEDI
OSC_IN
RTCCLK_O
RTCCLK
R1707 0_0603_5% EMC@ 4
1 2 (5) GPIO_6628_PMU_EN 14 PMU_EN
+VBAT_6620
1 2 LXB_6620 11 VBAT 1
LXB SYSRST_B DAIRST (5)
2 2 L848 2.2UH_LQM2HPN2R2MJ0L_1A_20%
C1724 C1725 12 3 OSC_EN_6620
8 BUCKOUT OSC_EN
C C
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K WF_PA_LDOOUT 42
1 1 GPS_SYNC GPIO_6628_GPS_SYNC (5)
7
9 WF_PA_VDD +TLDO
13 DVDDIO18 54
GND_SMPS FSOURCE 1
C1726 NH520@
+TLDO 36
TCXO_LDO
AW-NH520 @ PAD TP1380
2
41 MT6620 module 2 .033U 16V K X7R 0402 @ C1727
DVDDIO28 BGF_INT_B EINT_6628_BGF (5) 2
2 2 2 32 10 33P_0402_50V8J
+VRTC_6620 VRTC WIFI_INT_B EINT_6628_WIFI (5)
C1729 C1730 C1731 C1728 2 1 55 ALL_INT_B
@ PAD TP1381
1
ALL_INT_B
4
NH520@ 1U_0402_6.3V6K C1733 U824 L849 C1734
4.7U_0603_6.3V6K
0.1U_0402_10V7K
C1732 NH520@ 1U_0402_6.3V6K SD1_DAT1_6620 20 39 50 Ohm 1R1709 2

NH520_EMC@ 1 2 6 3 1 2 2 1 GPS_RF
Vcc
NH520@ U823 1 1 1 SD1_DAT2_6620 17 SD1_DAT1 GPS_ANT_P 6.8NH +-5% LQG15HS6N8J02D 0402 33P_0402_50V8J RF_OUT RF_IN 5.6NH_LQG15HS5N6S02D_5%
OSC_IN_6620 2 1 3 4 1 R1710 2 SD1_DAT3_6620 21 SD1_DAT2 50 PCM1SYNC_6620 NH520_EMC@ 5 NH520_EMC@ 470P 50V J NPO 0402
OUT Vcc 0_0402_5% SD1_CMD_6620 19 SD1_DAT3 PCM1SYNC 49 PCM1IN_6620 ENABLE NH520_EMC@
2 SD1_CMD PCM1IN
1000P_0402_50V7K SD1_CLK_6620 18 48 PCM1OUT_6620 Add offpage.1102.
Close to MT6620
GND
GND
SD1_CLK PCM1OUT
1
I2S_DATA_OUT
NH520@ C1735 SD1_DAT0_6620 16 47 PCM1CLK_6620
FM_AUOUT_R
6.8NH +-5% LQG15HS6N8J02D 0402

FM_AUOUT_L
SD1_DAT0 PCM1CLK
I2S_DATA_IN
FM_TX_OUT
2 1 1U_0402_6.3V6K 0_0402_5% @
FM_AUIN_R
FM_AUIN_L
GND GND 1 1 R1714 2 23 38 L850 BGU7005_XSON6_1P45X1
FM_RX_N
FM_RX_P
WiFi_ANT
(5) UTXD3
1
UART1_URXD RF_I_CAL
I2S_CLK
BT_ANT
26MHZ_10PF_7L26002009 1 R1720 2 22 37 NH520_EMC@
I2S_WS
(5) URXD3 UART1_UTXD AUX_REF
NH520@ 0_0402_5%
2
change to SJ000004W00 5/30 ADD R1714,R1720 FOR RF
AW-NH520
53
51
29
30
31
27
26
24
25
43
46
44
45
AWAVE_AW-NH520_60P
1 2
GPIO_6628_GPS_LNA_EN (5)
R1712 NH520@ 0_0402_5%
WIFI_BT_ANT
Compal footptint Close to U824
IF GPS have to pass AGPS IOT, recommend to
reserve an external GPS LNA between U824
pin3 and U822 pin39
B B
R1716 @
OSC_EN_6620 1 2
SRCLKENAI (5)
0_0201_5%
2
R1868
10K_0402_5%
+VRTC 0_0402_5% 2 1 R1715 +VRTC_6620 XTEST EEDI ANTSEL_3

1
2.8V TCXO or OSC 0 0 0 Default

clock setting 1.8V TCXO or OSC 0 1 0
XTAL 0 0 1
external clock mode 0 1 1
SD1_CMD_6620 0_0201_5% 1 R1717 2 PCM1CLK_6620
MC3CMD (5) DAICLK (5)
SD1_DAT3_6620 0_0201_5% 1 R1718 2 PCM1SYNC_6620
MC3DA3 (5) DAISYNC (5)
XTEST ANTSEL_2 ANTSEL_1
SD1_DAT2_6620 0_0201_5% 1 R1719 2 PCM1OUT_6620
MC3DA2 (5) DAIPCMIN (5)
WIFI :SDIO1 0 0 0 Default
SD1_DAT1_6620 0_0201_5% 1 R1721 2 PCM1IN_6620 WIFI host
MC3DA1 (5) DAIPCMOUT (5)
interface WIFI :SDIO2 0 0 1
SD1_DAT0_6620 0_0201_5% 1 R1722 2
MC3DA0 (5)
WIFI :SPI 0 1 0
SD1_CLK_6620 0_0201_5% 1 R1711 2
MC3CLK (5)
WIFI :reserved 0 1 1
1
5/23 ADD FOR RF
A @ C1749 A
2
33P 50V J NPO 0402 XTEST ANTSEL_0
BT/common host
interface UART1 0 0 Default
SDIO2 0 1
Compal GND MTK GND
2012/11/03 2013/11/03 Title
Issued Date Deciphered Date BT, FM, GPS, WiFi (MT6628)
C
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
0.3M Camera 5M Camera

2 1
EMI1 0_0402_5% R1737
1 8 SUB_DAT8 EMI10 L1
(5) CMDAT8 2 7 1 8 1 2
SUB_VREF GPIO_MAIN_CMPDN MIPI_D1_P
(5) CMVREF (5) CMPDN (5) RDP1 1 2
3 6 SUB_DAT6 5/21 DEL EM12 2 7 GPIO_MAIN_CMRST
(5) CMDAT6 4 5 (5) CMRST 3 6
SUB_DAT9 SENSOR_SDA @
D (5) CMDAT9 (5) SDA1 D
4 5 SENSOR_SCL 4 3 MIPI_D1_N
(5) SCL1 (5) RDN1 4 3
0 +-5% 8P4R 0804
EMC@ 0 +-5% 8P4R 0804 CMMI21T-900Y-N_4P
EMC@ 2 1
0_0402_5% R1736
2 1
EMI3 EMI4 0_0402_5% R1735
1 8 SUB_PCLK 1 8 SUB_DAT7
(5) CMPCLK 2 7 (5) CMDAT7 2 7 SUB_HREF L2
(5) CMHREF
3 6 SUB_DAT5 3 6 SUB_DAT2 1 2 MIPI_D0_P
(5) CMDAT5 4 5 (5) CMDAT2 4 5 (5) RDP0 1 2
SUB_DAT4 SUB_DAT3
(5) CMDAT4 (5) CMDAT3
@
0 +-5% 8P4R 0804 0 +-5% 8P4R 0804 4 3 MIPI_D0_N
(5) RDN0 4 3
EMC@ EMC@
CMMI21T-900Y-N_4P
2V8 2 1 +AVDD2.8V_CAM_5M 2 1
+VCAMA_PMU
2V8 +VCAMA_PMU 2 1 +AVDD2.8V_CAM 0_0402_5% R1727 0_0402_5% R1734
0_0402_5% R1724 2
2
@ For Camera Prview Issue 47U_0805_6.3V6M 0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z C1745 2 1
C1738 5/21 M @ C1746 0_0402_5% R1733
1
C1739 1
2.2U_0603_10V6K
1
1
C C
L3
1 2 MIPI_CLK_P
(5) RCP 1 2
1V8 2 1 +DOVDD1.8V_CAM_5M @
+VGP2_PMU
1V8 +VGP2_PMU 2 1 +DOVDD1.8V_CAM 0_0402_5% R5256 4 3 MIPI_CLK_N
(5) RCN 4 3
0_0402_5% R1725 @
2
@ 0.1U_0402_16V4Z CMMI21T-900Y-N_4P
2
0.1U_0402_16V4Z C1744
C1740 2.2U_0603_10V6K C1747 2 1
1
2.2U_0603_10V6K C1741 0_0402_5% R1732
1
2 1 SENSOR_MCLK
(5) CMMCLK
0_0402_5% R1731
Acer reserve 5/31 D EM6,EM7 change to comm choke

2
C1742
@
5/27 M
1 22P_0402_50V8J JP5
B 5/31 Change JP7 for ME B

29 30 +DOVDD1.8V_CAM
SENSOR_MCLK 27 29 30 28 +DOVDD1.8V_CAM
25 27 28 26 +AVDD2.8V_CAM 23
SENSOR_SCL 23 25 26 24 +AVDD2.8V_CAM GND 22
SUB_DAT9 21 23 24 22 21 GND
SUB_DAT8 19 21 22 20 SENSOR_SDA 19 21 20 +AVDD2.8V_CAM_5M
SUB_DAT3 17 19 20 18 SUB_HREF 17 19 20 18 +DOVDD1.8V_CAM_5M
SUB_DAT7 15 17 18 16 15 17 18 16 SENSOR_MCLK
SUB_DAT6 13 15 16 14 SENSOR_SDA 13 15 16 14 GPIO_MAIN_CMRST
SUB_DAT5 11 13 14 12 GPIO_MAIN_CMPDN 11 13 14 12 SENSOR_SCL
SUB_DAT4 9 11 12 10 MIPI_D1_N 9 11 12 10 MIPI_D1_P
SUB_DAT2 7 9 10 8 MIPI_CLK_P 7 9 10 8
R1726 5 7 8 6 SUB_VREF 5 7 8 6 MIPI_CLK_N
SUB_PCLK 1 2 SUB_PCLK_R 3 5 6 4 MIPI_D0_N 3 5 6 4 MIPI_D0_P
EMC@ 1 3 4 2 1 3 4 2
1 2 GPIO_SUB_CMPDN (5) 1 2
0_0402_5% 2
@ CONN@ JP7
C1743
22P_0402_50V8J
1
SP020015H00
EMI
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Camera
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
Common Debug
D
JP6
6/13 A
@ PAD TP1382
Touch 5/30 D R1760,C1766
Change pin for small board D
1 2
(11,23) PWRKEY 1 2 3 1 2 4 @ PAD TP1383
ACES_50506-01041-P01
(11,23,5,7) SYSRST_B 3 4
R1728 0_0402_5% 5 6 JP10 0_0402_5% 6/3 A
(11,24) KCOL0 7 5 6 8 URXD2 (5) 1 2 R5135 1 0603 Update
(11,24) KROW0 7 8 UTXD2 (5) 1 2 +VGP5_PMU
9 10 2 1
11 9
11
10
12
12 2 3
3 4
R5134
+VBAT Compal GND MTK GND
13 14 SCL0 0_0402_5%
13 14 4 5 SCL0 (5)
15 16 SDA0
17 15 16 18 5 6 SDA0 (5)
17 18 MCU_JRTCK (5) 6 7 GPIO_CTP_RST (5)
19 20
21 19 20 22 MCU_JTDO (5) 7 8
23 21 22 24 MCU_JTMS (5) 8 9 EINT_CTP (5)
23 24 MCU_JTDI (5) 9 10 +VIBR_PMU
25 26
(5) URXD4 27 25 26 28 MCU_JTRST_B (5) 10
(5) UTXD4 27 28 MCU_JTCK (5)
29 30
31 29 30 32 11
33 31 32 34 GND1 12
35 33 34 36 GND2
37 35 36 38
39 37 38 40
39 40
G
G
G
G
C C
44
43
42
41
PANAS_AXT440124
CONN@
+VDD18_6583
Power-on Button
MTK comment don't pull up R on PWRKEY.1101. MTK advise don't need SWITCH BOARD
RESET
2
SW1
R1753 JP13
B 1 SW2 @ 10K_0402_5% 1 B
(11,24) KCOL0 1
2 2
3 PWRKEY (11,23) 1 (11,24) KROW0 3 2 5
(24) KCOL1
1
2 4 3 G1 6
3 SYSRST_B (11,23,5,7) 4 G2
TAFG1-12WQR_3P 1
4
SYSRST_B C1759
TAFG1-12WQR_3P ACES_51512-0040N-P01
4
5 @ 1U_0402_10V6K
3
1 D805
C1758
EMC@
1U_0402_10V6K
1
2 TVNST52302AB0 SOT523
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Debug/Button/Touch
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
0_0402_5%
Gyro G-Sensor MPU-6515
5/30 Add R4903 +VDD_GYRO33 1 R4902 2
2.85V earlier than 1.8V MPU-6050 1
C4172
+VDD28_6583
0.1U_0402_10V7K
0_0402_5%
1 R4903 2 U4029 2
+VEMC_1V8_PMU
0513 change
@
D 3 13 NEED PULL UP??
10K_0402_5%
6/14 M D
0_0402_5% RESV/CCS# VDD 1 R4907 2
+VDD18_6583 5/30 D R4909,R4911 U4031
1 R4901 2 +VDD_GYRO18 8
+VDD18_6583 VLOGIC
@ 12 GYRO_INT 1 2
INT EINT_GY (5)
1
C4171 R4908 0_0402_5% +VDD_GYRO18 8 13 +VDD_GYRO33
0.01UF_0402_25V7K 14 VDDIO VDD
RESV/DRDY 24 I2C_GYRO_SDA R4912 1 2 0_0402_5%
SDA3 (5)
2
SDA 23 I2C_GYRO_SCL R4913 1 2 0_0402_5% 24 I2C_GYRO_SDA
SCL SCL3 (5) SDA / SDI
6 7 23 I2C_GYRO_SCL
7 AUX_DA 19 AUX_CL SCL / SCLK
AUX_CL RESV1 21 21
RESV2 22 AUX_DA 12 GYRO_INT
RESV3 INT
16 +VDD_GYRO18 22
0_0402_5% NC 5 nCS 17
1 2 GYRO_AD0 9 NC 4 NC17 16
R4918 AD0 NC 2 GYRO_AD0 9 NC16 15
1 NC AD0 / SDO NC15 14
CLKIN 10 GYRO_RO NC14 6
11 REGOUT GYRO_RO 10 NC6 5
FSYNC 20 REGOUT NC5 4
15 CPOUT NC4 3
CAD1 1 1 NC3
18 C4175 C4176 11 2
17 GND 25 0.1U_0402_10V7K FSYNC NC2 1
C CAD0 GND PAD NC1 C
2.2U_0402_10V6M
2 2 19 18
5/30 D RESV1 GND
MPU-6050_QFN24_4X4
5/30 D 20 25
RESV2 GND PAD
MPU-6515_QFN24_3X3
+VEMC_3V3_PMU
P-Sensor
+VDD18_6583 5/21 Add 6/6 D PAD1, A H1
1
B 2 B
@ R1754 H1
10K_0402_5% 6/7 U3->U2 C1 HOLEA
1
MTK intn 6/6 M P/N 1

2P_0402_50V8C
@ R213
2
2
G
100K_0402_5% R4 R5
1
0_0402_5% U2 470_0402_5% R6 0_0402_5%
3 1 POUT 2 1POUT_R 1 6 2 1 2 1 CAP
(5) POUT_1
2
2 OUT CX 5 +3VS_P 2 1
5/21 M
S
VSS VDDHI +VEMC_3V3_PMU

Q1 @ CTRL 3 4 P_VREG R7 0_0402_5%
BSS138W-7-F_SOT323-3~D CTRL VREG
3
IQS1280000EBTSR TSOT23 6P
1
2 R8 1 2 1 2 1 D3 5/29 A
6/3 A 0_0402_5% R1755 C2 C3 C4 C5 EMC@
10K_0402_5% TVNST52302AB0 SOT523
100P_0402_50V8J
1U_0402_6.3V4Z
100P_0402_50V8J
1U_0402_6.3V4Z
need check POUT
1 2 1 2
5/21 Add
2
1
P-SENSOR CNN JP16
1
+VEMC_3V3_PMU
POUT 2 1
3 2 5
4 3 G1 6
4 G2
A ACES_88460-0401 A

Issued Date 2012/11/03 2013/11/03 Title
Deciphered Date
Sensors
Compal GND MTK GND DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
+VEMC_3V3_PMU
R546
169 ball eMMC 1

0_0402_5%
2
U502
KIN 8GB@
U502
KIN 16GB@
C555 0.1U_0402_16V7K SA00006MF30 SA00006MG30

1 2 Kingston 8G KE4CN3K6A Kingston 16G KE4CN4K6A
U502
eMMC_DAT0 H3 M6 +eMMC_VCC 2 1
eMMC_DAT1 H4 DAT0 VCC N5 U502 U502
eMMC_DAT2 H5 DAT1 VCC T10 C544 4.7U_0603_6.3V6K
D eMMC_DAT3 J2 DAT2 VCC U9
@ HYN 8GB@ HYN 16GB@ D
eMMC_DAT4 J3 DAT3 VCC +VEMC_1V8_PMU
eMMC_DAT5 J4 DAT4 K6 SA00006PW10 SA00006VJ10
Close to eMMC_DAT6 J5 DAT5
DAT6
VCCQ
VCCQ
W4 HYNIX 8G H26M42002GMR HYNIX 16G H26M52002EQR
eMMC_DAT7 J6 Y4
Memory EMMC_VDDI K2
DAT7 VCCQ
VCCQ
AA3
AA5 +eMMC_VCCQ 2 1
VDDI VCCQ 0_0402_5% R543 U502 U502
K4 W5 eMMC_CMD 1 2 SAM 8GB@ SAM 16GB@
Y2 VSSQ CMD W6 eMMC_CLK_R 0.1U_0402_16V7K
Y5 VSSQ CLK C508
AA4 VSSQ U5 eMMC_RST C543 4.7U_0603_6.3V6K
SA00006VE10 SA00006Z610
AA6 VSSQ RST# / NC L4 2 1
VSSQ A1 INDEX / NC @ Samsung KLM8G1WE4A-A001 Samsung KLMAG2WE4A-A001
1 M7 K7
P5 VSS NC K8
C430 R10 VSS NC K9
1U_0201_6.3V6K U8 VSS NC K10
2 VSS NC K11
A4 NC K12
A6 NC NC K13 CLIP1 CLIP2 CLIP3 CLIP4
A9 NC NC K14 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
A11 NC NC L1
B2 NC NC L2
B13 NC NC L3
1
D1 NC NC L12
D14 NC NC L13
H1 NC NC L14
H2 NC NC M1
H8 NC NC M2 CLIP5 CLIP6 CLIP7 CLIP8
C H9 NC NC M3 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P C
H10 NC NC M12
H11 NC NC M13
H12 NC NC M14
1
H13 NC NC N1
H14 NC NC N2
J1 NC NC N3
J7 NC NC N12
J8 NC NC N13 CLIP9 CLIP11 CLIP12
J9 NC NC N14 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
NC NC 5/27 M fOOTPRINT
J10 P1 eMMC_DAT7
NC NC eMMC_DAT7 (5)
J11 P2 eMMC_DAT6
NC NC eMMC_DAT6 (5)
J12 P12 eMMC_DAT5
eMMC_DAT5 (5)
1
J13 NC NC P13 eMMC_DAT4
NC NC eMMC_DAT4 (5)
J14 P14 eMMC_DAT3 5/29 A
NC NC eMMC_DAT3 (5)
K1 T1 eMMC_DAT2
NC NC eMMC_DAT2 (5) CLIP14
K3 T2 eMMC_DAT1
NC NC eMMC_DAT1 (5) EMIST_SUL-0815A1_1P
R1 T3 eMMC_DAT0 CLIP13 CLIP15 CLIP16
R2 NC NC T12 eMMC_DAT0 (5)
eMMC_CLK_R 1 R535 2 eMMC_CLK EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
R3 NC NC T13 eMMC_CLK (5)
27_0201_1% eMMC_CMD
NC NC eMMC_CMD (5)
R12 T14 eMMC_RST
1
R13 NC NC V1 eMMC_RST (5)
1
R14 NC NC V2
NC NC MTK advise to use 27ohm @ PAD TP1389
U1 V3
U2 NC NC V12
U3 NC NC V13
U12 NC NC V14 CLIP17 CLIP18 CLIP19 CLIP20
U13 NC NC Y1 EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
U14 NC NC Y3
W1 NC NC Y6
B W2 NC NC Y7 10K_0201_1% B
1
W3 NC NC Y8 eMMC_CMD R534 1 2 +eMMC_VCCQ
W7 NC NC Y9
W8 NC NC Y10 eMMC_DAT0 R536 1 2 47K_0402_5%
NC NC 6/6 A CLIP25
W9 Y11 eMMC_DAT1 R529 1 2 47K_0402_5% 6/3 A CLIP25
W10 NC NC Y12 eMMC_DAT2 R527 1 2 47K_0402_5% CLIP21 CLIP22 CLIP23 CLIP24
NC NC EMIST_SUL-0815A1_1P
W11 Y13 eMMC_DAT3 R528 1 2 47K_0402_5% EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
W12 NC NC Y14 eMMC_DAT4 R530 1 2 47K_0201_5%
W13 NC NC AE1 eMMC_DAT5 R531 1 2 47K_0402_5%
NC NC
1
W14 AG2 eMMC_DAT6 R533 1 2 47K_0402_5%
1
AA1 NC NC AH4 eMMC_DAT7 R532 1 2 47K_0402_5%
AA2 NC NC AH6
AA8 NC NC AH9
AA9
AA11
AA12
NC
NC
NC
NC
NC
NC
AH11
AG13
AE14
SCREW HOLE S3
TP @
AA13 NC NC H2 H3 H4
AA14 NC HOLEA HOLEA HOLEA
NC 5/30 D S2
H6
1
AA7 RFU H7
AA10 RFU RFU K5
1
1
U10 RFU RFU M5
U7 RFU RFU M8
U6 RFU RFU M9
T5 RFU RFU M10
R5 RFU RFU N10
P10 RFU RFU P3
RFU RFU
169 ball eMMC
H6 H7
A SDIN4E2-16G-T_TFBGA_169P-P FD1 FD2 FD3 FD4 H_1P7N H_1P7X2P2N A
1 1 1 1
Compal
@ footptint 5/29 M
1
2012/11/03 2013/11/03 Title
Issued Date Deciphered Date eMMC, SCREW HOLE
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

Deciphered Date
BLANK
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

Deciphered Date
BLANK
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date BLANK
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
If mini-A connector insert => CID < 0V => Low

Micro-USB If mini-B connector insert => CID > 1.2V => High
IDPULLUP pin is replaced by 1.2V power source.

+VIN
D D
JP11
EMC@ 1
L853 VBUS
4 3 USB_DM_R 2 6
(5) USB_DM USB- GND 7
USB_DP_R 3 GND 8
1 2 USB+ GND 9
(5) USB_DP GND
4
(5) USB_ID ID
OCE2012120YZF_4P
5/29 M 5
GND
Compal GND MTK GND
EMC@ ACON_MUE41-531200
3
10U_0603_10V6M
FOR RF request @ CONN@
EMC@ D809 D7
C4270
1
USB_DM_R TVNST52302AB0 SOT523 TVNST52302AB0 SOT523
TP1364PAD @
C1769
2
USB_DP_R
TP1365PAD @
1
1U_0402_6.3V6K 2
5/30 M D7
C C
6/7 C4720->C4270
+VMCH_PMU +VSD
C1770
R1761 0_0603_5%
1 2 2 1
SD card 4.7U_0603_6.3V6K
JP12
10
9 DET TERM (GND)
(5) MC1INSI 8 SWITCH TERM CD
(5) MC1DA1 7 DAT1
(5) MC1DA0 DAT0
R1762 EMC@ 6 11
1 2 SD_CLK 5 VSS G1 12
(5) MC1CK CLK G2
0_0402_5% 4 13
3 VDD G3 14
(5) MC1CM 2 CMD G4 15
B 2 2 (5) MC1DA3 CD/DAT3 G5 B
@ @ 1
(5) MC1DA2 DAT2
C1905 C1771
10P 50V J NPO 0402 10P 50V J NPO 0402
1 1 PROCO_879S-N010-03A0
CONN@
SW:
EMI H: Card remove
L: Card insert
for RF request
close U201 side
MC1CM
MC1DA0
MC1DA1
MC1DA2
MC1DA3
10P_0201_50V8J
10P_0201_50V8J
10P_0201_50V8J
10P_0201_50V8J
10P_0201_50V8J
1 1 1 1 1
C9
C10
C11
C12
C13
A A
@ 2 @ 2 @ 2 @ 2 @ 2

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Connector-2(SD card/G-se)
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
SIM CARD
+VSIM1_PMU
5/23 M
SIM_DET_R
+VDD18_6583
3 SIM1_DATA
SIM1_RST
SIM1_CLK
2 @ 1
R5272 4.7K_0201_5%
D D
MTK Intn
2
100K_0201_5% 5/23 M 5/21 M
2
R5294 @
JSIM DM2 @
2 1 SIM_DET_R 1 2 @ DM1 TVNST52302AB0_SOT523-3
EINT_A (5)
1
NC DETECT R435 0_0402_5%
SIM1_DATA 4 3 TVNST52302AB0_SOT523-3
(24) SIM1_DATA I/O NC
6/7 R439-<R435
1
5/29 A 6 5 SIM1_CLK
VPP CLK SIM1_CLK (24) SCA00001W00
1 8 7 SIM1_RST
GND RST SIM1_RST (24)
C4269
33P_0201_25V8J
33P_0201_25V8J 10 9 +VSIM1_PMU
NC VCC
33P_0201_25V8J
2 1
12 11 1
GND GND
33P_0201_25V8J
C4268
0.1U_0201_10V6K
4.7U_0402_6.3V6M
C4267
14 13 1 1
GND GND
1
2
C4259
C4258
2
C4266
16 15
GND GND
2
18 17 2 2
GND GND
C
T-SOL_159-1000302602 C
Detect pin
Normal : short GND Compal GND MTK GND
Insert Card : Open
+MICBIAS0 2'nd MIC For 3G
1
R1270 6/5 A
1
1K_0402_1%
C4246
0.1U_0402_16V4Z
2
Handset SPK For 3G
1
R215 Close to U301
B Close to U301 1.5K_0402_1% B
6/13 M 6/5 A TP1403 1U_0402_6.3V4Z
TP1401 PAD C8 R1665 0_0402_5%
2
PAD R1666 0_0402_5% R1634 0_0402_5% @ 1 2 1 2 1
@ 1 2 1 2 AU_VIN2_P (24) C452
AU_HSP (24) 2
2 C7
10U_0402_6.3V6M
C6
100P_0402_50V8J R1664 0_0402_5% 2
100P_0402_50V8J R1667 0_0402_5% R1647 0_0402_5% @ 1 1 2 1 2
@ 1 1 2 1 2 PAD C14 AU_VIN2_N (24)
AU_HSN (24) 1
1
PAD TP1404 C4273 1U_0402_6.3V4Z
TP1402 1 1 1 33P_0201_25V8J R206
C4271 1.5K_0402_1%
C4274 33P_0201_25V8J C4272 2
33P_0201_25V8J 33P_0201_25V8J
2
2 2 2
1
6/7 C4272->C4274
R1269
1K_0402_1%
2
A A

Deciphered Date
SIM
B
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
A B C D E
3.3P_0402_50V_NPO
TRXB1 1 2
TRXB1_1 (20)
C618 3G@
1
L638 3G@ 1.5NH_LQG15HS1N5S02D
1 2 W_RX_LB5_SE_P_1 W_PA_OUT_B5_1 (20)
1
C676 3G@ U605 3G@ R1856
2
1.3NH_LQG15HN3N3S02D_0.3NH C652 SAYFH836MCA0F00R05_9P 0_0402_5% 3G@
U607 3G@ C_0402 L612@ 3G@ L626 3 6 TRXB51 2
(20) W_PA_OUT_B1_1 TRXB5_1 (20)
SAYFH897MHA0F00R05_9P 2
@ L_0402 47NH_LQG15HS47NJ02D_0.2A_5% 1 TX ANT
2
RX
1
3 1 W_RX_LB8_SE_M_1 1 2 8 5.6NH_LQG15HS8N2J02D_5%_0402
1
(20) W_PA_OUT_B8_1 TX RX1 RX
C685 3G@ C1834
G
G
G
G
G
18NH_LQG15HS33NJ02D_5%_0402
1 2 TRXB8 6 8 2.2NH_LQG15HS2N2S02D_0.3A_3% 3G@ C617 3G@ L620 @
(20) TRXB8_1
1
C639 3G@ ANT RX2 9 1 2 W_RX_LB5_SE_M_1 2P_0402_50V8C
ANT
2
4
5
7
9
27NH_LQG15HS27NJ02D_300MA_5%
G 2
7.5NH_LQG15HS9N1J02D_5%
1.6NH_LQG15HS1N6S02D_5% L618 @ L614 7 1.5NH_LQG15HN1N5S02D_0.3NH
G
1
3G@ L_0402 5
2
L616 G 4
@ C641 G 2
GND
GND
GND
GND
GND
2
3G@ W_RX_LB8_SE_P_1 1 2 G
RX
RX
TX
1 C684 3G@ U616 1
2.2NH_LQG15HS2N2S02D_0.3A_3% SAYRF1G95HQ0F0AR05_9P
2
4
5
7
9
3
1
8
3G@
W_RX_HB1_SE_M_1 C624 3G@
W_RX_HB1_SE_P_1 3.9P_0402_50V8C
L653 3G@
1 2 W_PA_OUT_B2_1 (20)
3.9NH_LQG15HN3N9S02D_0.3NH W_RX_HB2_SE_P_1
Note : Use RX Co-banding 1 2
2
C625 2.7NH_LQG15HS2N7S02D_ +-.3NH
GSM850 = 3G B5 L622
1.8P_0402_50V_NPO
2P_0402_50V8C 1.8P_0402_50V_NPO U615 3G@
GSM900 = 3G B8 U602 3G@ GSM_DCS_RX_P_1 1 2 GSM_DCS_RX_P_2 1 3G@ 2 1
L_0402 3G@ SAYRJ1G88CA0B0AR05_9P C642 3G@
GSM1900= 3G B2 SAFEA1G84FA0F00R15_5P C616 C655 @ 3G@ @ L630 1 3 1.8NH +-.3NH LQG15HS1N8S02D
8 RX1 TX 6
1
4.7NH_LQG15HS4N7S02D
2 5 3G@ C_0402 C645 TRXB21 2
C630 GND GND 3G@ L611 C653 C_0402 RX2 ANT
2
2.7NH_LQG15HS2N7S02D_ +-.3NH 4 L631 2 @ L621 1 L634 2 1 2 5
OUT2 L_0402 GND
1 2 GSM_DCS_RX_1 1 3 2 L_0402 1 2 L_0402 1 @ 7 2 3G@ C1835 L617
(20) GSM_DCS_RX IN OUT1 @ GND GND
2
3G@ @ 9 4 L_0402
GND GND
2.4NH +-0.3NH LQG15HS2N4S02D

1 L627 @
2
C1845 @ L619 GSM_DCS_RX_M_1 1 2 GSM_DCS_RX_M_2 L_0402
C_0201 L_0402 W_RX_LB5_SE_P_2 @
1
C626 3G@ W_RX_LB5_SE_M_2 C646 need updat P/N
W_RX_HB1_SE_M_2
W_RX_LB8_SE_M_2
W_RX_HB1_SE_P_2
@
W_RX_LB8_SE_P_2
2 2P_0402_50V8C W_RX_HB2_SE_P_2 C622 3G@
1
W_RX_HB2_SE_M_2 1 2 W_RX_HB2_SE_M_1
1
C620 3G@ U611 C602 3G@ RXD3 H= 1->3 3.9P_0402_50V8C
47P_0402_50V8J SAFEA2G14FF0F00R14_5P 4.7P_0402_50V8B
D_W_RX_HB1_SE_11 2 D_W_RX_HB1_SE_2 1 3 D_W_RX_HB1_M_1 1 2 D_W_RX_HB1_M_2
IN OUT1 4 D_W_RX_HB1_P_2 (20) TRXB2_1
OUT2
1
GGE_PA_HB_IN (20)
L606 2 5 L609 @
GND GND W_PA_B1_IN (20)
L_0402 3G@ L_0402 +VTCXO28-1 U601 @ W_PA_B2_IN (20)
@ 3G@ L602 3G@ 5/29 change net MT6167B_TFBGA100 W_PA_LB_IN (20)
G1
G2
5/27 M
H2
H1
D1
D9
D5
D4
D3
D2
C9
C8
C7
C6
C4
C1
4.7NH_LQG15HS4N7S02D C611 C650 3G@
K1
E2
E1
E9
E4
E3
B1
A1
F2
F9
F6
F5
F4
F3
J2
GGE_PA_LB_IN (20)
4.7P_0402_50V8B 100P_0402_50V8J
2
D_W_RX_HB1_P_1 1 2 3G@C601 4.7P_0201_50V_NPO
LNA_5P
LNA_4P
LNA_3P
LNA_2P
LNA_1P
TX_HB1
TX_HB2
LNA_5N
LNA_4N
LNA_3N
LNA_2N
LNA_1N
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TXO_GND
2
D_W_RX_HB5_P_3 1 2D_W_RX_HB5_P_4
2
2 2
C610 3G@
VDD
5
C608 3G@ 33P_0201_50VJ L601 L1 A2
47P_0402_50V8J 3 D_W_RX_HB8_P_1 1 2 D_W_RX_HB8_P_2 5 3G@ @ L_0402 K2 LNA_D1P TX_HB3 B2
10
12
14
16
17
G
OUT Port2+ LNA_D1N TX_LB1
1
5
7
9
D_W_RX_HB8_1 1 2 D_W_RX_HB8_2 1 7 L608 B3

IN 4 Port1+ D_W_RX_HB5_M_4 K3 TX_LB2 C3
GND
GND
GND
GND
GND
GND
GND
NC
GND
OUT LNA_D2N TXO_GND

1
G
D_W_RX_HB8_M_1 1 2 D_W_RX_HB8_M_2 4 27NH_LQG15HS27NJ02D_300MA_5% D_W_RX_HB5_P_4 L3
1
11 L605 Port2- 8 D_W_RX_HB5_M_3 1 2 LNA_D2P 3G@
(20) D_ASM_ANT_1 ANT
2
6 L_0402 U609 3G@ 33P_0201_50VJ Port1- 3G@C604 4.7P_0201_50V_NPO L4 R617 2K_0402_1% C623 3G@
0_0402_5%
2 3G@ 3 RF4 LNA_D3P
R622 1 8 @ SAFEA942MFR0F00R15_5P C609 3G@ K4 B4 1 2 2 1 0.47U_0402_16V4Z
(19,5) RXD2
1 2 4 CTL2 RF3 15 HB5/HB8 SW port LNA_D3N RCAL A4
(19,5) RXD1 CTL1 RF2 +VRF18-1 close to 3G PA
Vdd
R621 0_0402_5% 3G@ 13 1 C629 3G@ VTXHF A5

RF1
2
C614 3G@ Port3+ 0.47U_0402_16V4Z TMEAS B5 0.47U_0402_16V4Z

DET PDET (20)
5
2
U612 3G@ C607 3G@ 33P_0201_50VJ K5 C5 3G@ C649 2 1
2
+VRF18-1 VRXHF DET_GND

SKY13380-350LF_QFN16_3X3 47P_0402_50V8J 3 D_W_RX_HB5_P_1 1 2D_W_RX_HB5_P_2 6 1 2 B6 R609 3G@
G
OUT CTL V28(ESD) +VTCXO28-1

D_W_RX_HB5_1 1 2 D_W_RX_HB5_2 1 10 D6 0_0402_5%
IN Port3- TXBPI1(DCOC) DCOC_Flag (5)
1
4 D_W_RX_HB5_M_1 1 2D_W_RX_HB5_M_2 K6
+VTCXO28-1 OUT RX_BBQN
1
100K_0402_1%_NCP15WF104F03RC
1 R623 RX_BBQN L6 A7 TX_BBQP @ C1901 2 110P_0201_50V8J
GND
GND
1 1
L604 U608 3G@ 33P_0201_50VJ RX_BBQP RX_BBQP TX_BBQP B7 TX_BBQN R610
0_0402_5%
2
C657 @ L_0402 SAFEA881MFR0F00R15_5P C613 3G@ RX_BBIN K7 TX_BBQN A8 TX_BBIP @ C1900 2 110P_0201_50V8J
D_W_RX_HB2_1
3G@ RX_BBIN TX_BBIP

C_0402 @ RX_BBIP L8 B8 TX_BBIN 3G@
2
2 U613 3G@ RX_BBIP TX_BBIN B9
VLF2 +VRF18-1
XM0831SZAL1001_LGA10_1P55X1P15 1
RXD3 (19,5)
2
K8 A10
2
TST1 DCXO_32KEN A11 C627
DCXO_32K
SP4T Control Truth Table_SKY13380 K9 2
0.47U_0402_16V4Z
(5) RXD_BBIN 3G@
Vct1 Vct2 RXD_BBIN
1
K10 G3
(5) RXD_BBIP RXD_BBIP GND
C632 3G@ C606 3G@ G4 R1769
RF1 L L 47P_0402_50V8J U617 3G@ 4.3P_0402_50V8 L10 GND G5 0_0402_5%
(5) RXD_BBQN RXD_BBQN GND
RF2 L H
XTAL2/VAFCout
1 2 D_W_RX_HB2_2 1 3 D_W_RX_HB2_N_1 1 2 D_W_RX_HB2_N_2 L11 G6 3G@
IN OUT1 (5) RXD_BBQP RXD_BBQP GND
1
4 G9
XTAL1/REFin
D_W_RX_HB2_P_2
RF3 H L
2
OUT2 GND
BSI_DATA2
BSI_DATA1
BSI_DATA0
1
1
L607 3G@ H3
VTCXO28
CLK_SEL
GND
RF4 H H
VXODIG
L_0402 2 5 L603 L610 @ L633 L6323G@ H4
XMODE
BSI_CK
BSI_EN
GND GND GND
ENBB
@ L_0402 1 2 1 2 +VIO18_LC K11 H5 Note : EN32k (2012/02/08, Checked PMU POR)
CLK3
CLK2
CLK4
CLK1
TST2
VLF1
GND
GND
GND
GND
GND
GND
GND
+VIO18 VIO18 GND
SAFEA1G96FR0F00R14_5P 5.1NH_LQG15HS5N1S02D 0_0402_5% 0_0402_5% 1 H9 32kEN = 0 ==> MT6320 is 32K XO
GND
2
C603 3G@ C631 @
32kEN = 1(VTCXO28) ==> MT6320 is 32K Less
2
3 4.3P_0402_50V8 3G@ C621 3G@ C_0201 3

2
J10
J11
H11
H10
G10
F11
F10
E10
D10
D11
H8
G8
F8
E8
D8
C10
B11
B10
J9
J8
J7
J6
J5
J4
J3
D_W_RX_HB2_P_1 1 2 1U_0402_6.3V6K
1
2
Reserved LC filter
Note : VXODIG
0_0402_5%
VXODIG = VIO18 ==>(VCTCXO or DCXO) + 32K XO 1 2 +VXODIG
VXODIG = VTCXO28 ==> DCXO + 32K Less +VIO18_LC
R1770 3G@
ENBB (19,23,5,7)
(19,23,5,7) CLK_SEL
R647 3G@ +VRF18-1
Note : Xmode 0_0402_5% 1
1 2 3G@ C628
Xmode = 0 ==> VCTCXO + 32K XO +VTCXO28-1
C654 3G@ 0.47U_0402_16V4Z
R606 3G@ Xmode = 1(VIO18) ==> DCXO + 32K XO 0.47U_0402_16V4Z
0_0402_5% Xmode = 1(VTCX28) ==> DCXO + 32K Less 2 1 2
1 2
+VTCXO_1_PMU +VTCXO28-1
1 2 XMODE
+VIO18_LC
R607 3G@ R1771 3G@
BSI-A_EN (5)
2
0_0402_5% 0_0201_5%
1 2 BSI-A_CK (5)
+VRF18_PMU +VRF18-1 R612
X601 BSI-A_DAT0 (5)
R_0201 3G@
BSI-A_DAT1 (5)
R608 3G@ 4 3
@ GND OUT BSI-A_DAT2 (5)
0_0402_5% Place close X604 side
1
1 2 CLK1_BB_R2
+VDD18_6583 +VIO18 CLK1_BB_R2 (5)
CLK4_Audio_R2 3G@ R5228 1 2 0_0402_5%
1 2 SYSCLK_PMU (24)
C4248
IN GND 1
1000P_0402_50V7K 2
CLK2_WCN_R (9)
R630 1 3G@ 2 0_0402_5% RX_BBIP 26MHZ_7.3PF_TZ1689A
(5) RX_IP
R629 1 3G@ 2 0_0402_5% RX_BBIN 6/7 R636-<R5228
(5) RX_IN
R632 1 3G@ 2 0_0402_5% RX_BBQP
(5) RX_QP
R631 1 3G@ 2 0_0402_5%
C1839
C1836
RX_BBQN RX_IP RX_QP
(5) RX_QN
2 2
2 2
R625 1 3G@ 2 0_0402_5% TX_BBIP @ @
(5) TX_IP
R626 1 3G@ 2 0_0402_5% TX_BBIN C1898 @ C1899 @
(5) TX_IN 1 2 TX_BBQP 1 1
R627 3G@ 0_0402_5%
33P_0402_50V8J
33P_0402_50V8J
(5) TX_QP 10P_0201_50V8J 10P_0201_50V8J
R628 1 3G@ 2 0_0402_5% TX_BBQN 1 1
4 (5) TX_QN 4
RX_IN RX_QN
(5) BPI1_BUS11 RXD1 (19,5)

(5) BPI1_BUS12 RXD2 (19,5)
U601 3G@
(5) BPI1_BUS13 RXD3 (19,5)
(23,5,7) SRCVOLTEN ENBB (19,23,5,7)

(23,5,7) SRCLKENA CLK_SEL (19,23,5,7) Security Classification Compal Secret Data Compal Electronics, Inc.
MT6167B_TFBGA100 2013/01/30 2014/01/30 Title
SA00006RV00
Issued Date Deciphered Date RF_MT6167_RX_B1B8
ZEJ20 - LA-A792P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
Date: 3UTJG_0[TK Sheet 19 of 28
A B C D E
A B C D E
SKY77590 control logic table 0_0603_5%

VctA VctB VctC TxEn +VPA_PMU 3G@ R701 1 2
+W_PA_VCC
3G@ BS2 BS1 mode ebable 1
(5) WG_GGE_PA_VRAMP
R703 2 1 10K_0402_5% (TRX1)G_DCS L L H L 0_0603_5% C735 3G@
@ R702 1 2 2.2U_0402_6.3V6M
(TRX2)W_Band8 L H H L +VBAT 2
2
3G@ R717
1
C701 3G@
(TRX3)W_Band1 H L H L
(TRX4)W_Band5 H H H L BPI0~6 are 2G+3G mode both
24K_0402_1%
220P_0402_50V7K BPI7~13 are 3G mode only
2 (TRX5)W_Band2 L H L L 3G@
1
GSM_DCS_RX (19) (TRX6) NA H L L L (5) BPI1_BUS0 ASM_VCTRL_A (20,5) +VBAT R706 1 2 0_0402_5%
+W_PA_VCC1
3G@
(20,5) WG_GGE_PA_ENABLE
R716 2 1 0_0402_5% EDGETX_L H L H H (5) BPI1_BUS1
(5) BPI1_BUS2
ASM_VCTRL_B (20,5)
ASM_VCTRL_C (20,5)
1 3G@
TRXB8_1 (19) EDGETX_H H H H H 1
(20,5) ASM_VCTRL_C
R715 2 1 1K_0402_1% GMSKTX_L H L L H (5) BPI1_BUS4 WG_GGE_PA_ENABLE (20,5)
3G@
TRXB1_1 (19) GMSKTX_H H H L H CON704
L835
R714 1 2 1K_0402_1%
(20,5) ASM_VCTRL_B (5) BPI1_BUS7 W_PA_B1_EN (20,5) 2 1 D_ASM_ANT 1 2
TRXB5_1 (19) (5) BPI1_BUS8 W_PA_B2_EN (20,5) D_ASM_ANT_1 (19)
3G@ 3
(5) BPI1_BUS9 W_PA_B5_EN (20,5)
R713 1 2 1K_0402_1% 39P_0402_50VG_NPO
(20,5) ASM_VCTRL_A (5) BPI1_BUS10 W_PA_B8_EN (20,5)
1
3G@ 1
TRXB2_1 (19) I-PEX_20279-001E-01 C864
R722 1 2 CONN@ C_0402
+VBAT
3G@ C863 @
2
22U_0603_6.3V6M
3G@ 0_0603_5% 1 1 C702 39NH_LQG15HN39NJ02D_0.3NH

C_0402
3G@ 0723 50ohm terminated
2
@
15
16
17
18
19
20
21
22
2 2 3G@ 51_0402_1%
MODE
VRAMP
TRX_1
TRX_2
TRX_3
TRX_4
GND
TxEN
C707 R730 1 2
14 23
13 VCC TRX_5 24 CON703
VBATT TRX_6
SKY77590
12 25 1NH +-0.3NH LQG15HS1N0S02D 3
11 BS1 GND 26 ASM_ANT_PRIMARY 1 2 ASM_ANT_PRIMARY_1 1 2
1 2 GGE_PA_LB_IN_1 10 BS2 ANT 27 L730 3G@
(19) GGE_PA_LB_IN TX_LB_IN GND
9 28 1
TX_HB_IN GND
1
C710 3G@ I-PEX_20279-001E-01
R712 56P_0402_50V8 29 @ C744 CONN@ U710 3G@
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
R705 C_0402 XM0860SH-DL0672TMP_QFN6_1X1

2
R_0402
@ C740 @ 2
PORT1 W_PA_B8_IN (20)
R_0402
@ U702 3G@ 39NH_LQG15HN39NJ02D_0.3NH 1

8
7
6
5
4
3
2
1
(20,5) W_PA_B8_EN CTL1 6 W_PA_LB_IN_2 2 1 W_PA_LB_IN_12 1
U702 @ W_PA_LB_IN (19)
2
SKY77590-11_MCM28_6X6 5 PORT2 3G@R750 0_0402_5%
GND
2
(20,5) W_PA_B5_EN CTL2
1
4 C799 3G@
PORT3 W_PA_B5_IN (20)
1 1 R724 56P_0402_50V8
C727 C728 R_0402
3
SKY77590-11_MCM28_6X6 C_0402 C_0402 @
SA00006RM00 @ @
2
C712 3G@ 2 2
2 1 GGE_PA_HB_IN_1
(19) GGE_PA_HB_IN
18P_0402_50V8J
2 R711 R710 2
1
1
R_0402
R_0402
@ @
put on power source
+W_PA_VCC1
2
+W_PA_VCC1
3G@ 3G@ +W_PA_VCC
2.2U_0603_6.3V6K
3G@ 3G@ 3G@
82P_0402_50V8J
0.01U_0402_50V7K
C716 C717 C721 @ C719 1 C720 1 +W_PA_VCC
1
2
C1844
1500P_0402_50V7K
1500P_0402_50V7K
0.1U_0402_25V6
3G@
2
1
2 2
0.01U_0402_50V7K
1
C733
(20,5) VM1
(20,5) VM0 2
(20,5) VM1 2 1 W_PA_B1_IN_1 1 2
(20,5) VM0 (19) W_PA_B1_IN
C725 3G@ 0_0402_5%
W_PA_B1_IN_2
18P_0402_50V8J R7193G@
1
C724
10
10
4
3
4
3
1
3.6NH_LQG15HS3N6S02D R727
W_PA_OUT_B5 1 2 R_0402
VMODE_0
VMODE_1
VCC1
VCC2
VMODE_0
VMODE_1
VCC1
VCC2
W_PA_OUT_B5_1 (19)
3G@ 3G@ @ 3G@
C723 3G@ 0_0402_5% 1 1 1NH_LQG15HS1N0S02D_0.3NH
2
1 2 W_PA_B5_IN_1 1 2 W_PA_B5_IN_2 2 9 C729 C730 2 9 W_PA_OUT_B1 1 2
(20) W_PA_B5_IN RF_IN RF_OUT RF_IN RF_OUT W_PA_OUT_B1_1 (19)
C_0402 C_0402 C726
56P_0402_50V8 R1848 @ @ 1 1
1
8 6 2 2 3G_B1_PA_CPL_IN 8 6 C750 C732

CPL_IN CPL_OUT CPL_IN CPL_OUT
0.5P_0402_50V_NPO
0.5P_0402_50V_NPO
R1849 @ 3G@ @
R_0402
5 5 2 2
GND
GND
GND
GND
(20,5) W_PA_B5_EN VEN (20,5) W_PA_B1_EN VEN
2
U707 3G@ U713 3G@

7
11
7
11
SKY77765-11_MCM10_3X3 SKY77761-11_MCM10_3X3
3 3
3G_B5_PA_CPL_IN
WCDMA PA control logic table
HB_EN B1_EN B2_EN B5_EN LB_EN
W_Band1 H H L L L
3G@
W_Band2 H L H L L 3G@ 3G@ 3G@ +W_PA_VCC1 3G@ C741
W_Band4 H H L L L +W_PA_VCC1 C1903 C736 C737 1 C783 1 +W_PA_VCC
2
120P_0402_50VJ_NPO
0.1U_0402_25V6
82P_0402_50V8J
3G@
W_Band5 L L L H H
2
1
2.2U_0603_6.3V6K
0.01U_0402_50V7K
2.2U_0603_6.3V6K C722 1 3G@
put on power source C812
W_Band8 L L L L H +W_PA_VCC
1
2 2 0.01U_0402_50V7K
1
3G@
C746 2
(20,5) VM1
2
(20,5) VM0
120P_0402_50VJ_NPO
(20,5) VM1
3G@
(20,5) VM0 2 1W_PA_B2_IN_1 1
(19) W_PA_B2_IN R726 2
3G@ 0_0402_5%
W_PA_B2_IN_2
1
C742
10
10
4
3
4
3
1
18P_0402_50V8J R735
3G@ R_0402
VMODE_0
VMODE_1
VCC1
VCC2
VMODE_0
VMODE_1
VCC1
VCC2
C751 3G@ @
56P_0402_50V8 0_0402_5% 6.8NH_LQG15HS6N8J02D_300MA_0.3NH 1.8NH +-.3NH LQG15HS1N8S02D _0.3NH
2
1 2W_PA_B8_IN_1 1 2 W_PA_B8_IN_2 2 9 W_PA_OUT_B8 1 2 2 9 W_PA_OUT_B2 1 2

(20) W_PA_B8_IN RF_IN RF_OUT W_PA_OUT_B8_1 (19) RF_IN RF_OUT W_PA_OUT_B2_1 (19)
C745 3G@ C828 3G@
1
R1850 1 1 3G@ 1 1
R1851 8 6 C754 C749 1 R720 2 3G_B2_PA_CPL_IN 8 6 3G@ C747
R_0402 CPL_IN CPL_OUT 3P_0402_50VW_NPO 3P_0402_50VW_NPO 51_0402_1% CPL_IN CPL_OUT C748 C_0402
@ 3G@ 3G@ 0.5P_0402_50V_NPO @
5 2 2 5 2 2
3G_PA_CPL_OUT
GND
GND
GND
GND
2
(20,5) W_PA_B8_EN VEN (20,5) W_PA_B2_EN VEN
U708 3G@
7
11
7
SKY77768-11_MCM10_3X3 11 U1911 3G@
3G@ 3G@ R744 SKY77762-11_MCM10_3X3
26.1_0402_1% 26.1_0402_1% 0_0402_5%
2 1 R737 PDET_2
2 1 R733 PDET_1 2 1
PDET (19)
4 4
1
3G@
1
3G@ R746
34.8_0402_1% R745 R747
R_0402 R_0402
@ @
2
near IC
3G_B8_PA_CPL_IN

2012/11/09 2014/11/09 Title
Issued Date Deciphered Date RF_TX_ASM
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
ZEJ20 - LA-A792P
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
A B C D E
5 4 3 2 1
+GNSS_VTCXO_SW
1
GLONASS@
C1874
0.033U_0201_6.3V
2
GLONASS@
GLONASS@ GLONASS@ GLONASS@ GLONASS@
U1912 C1876 L854 U1913 C1877
GLONASS@ SAFFB1G58KA0F0AR14_5P 1000P_0201_16V7K 5.6NH_LQG15HS5N6S02D_5% BGU7005_XSON6_1P45X1 18P_0201_50V8J
4
C1875 1 2 50 Ohm 1 4 2 1 1 2 3 6 1 2 MT3332_GPS_RF
Vcc
(9) GLONASS_RF Input Output RF_IN RF_OUT
D 18P_0201_50V8J 5 D
ENABLE
GND
GND
GND
5/21 del JP15 R1857 C1878 C1879 for RF require
GND
GND
1
share JP4 connect @
2
3
5
C1880
2
1U_0201_6.3V6K
2
+GNSS_VTCXO_SW
MT3332 on-chip LNA
Matching
GLONASS@
C1881
1000P_0201_16V7K U1914
2
2 GLONASS@ 1 2 4 6 +GNSS_VTCXO_SW
@ L855 OUT VCC
C1882 3.3NH_LQG15HS3N3S02D_300MA_.3NH 5 2
NC NC
C_0201
1 3 1
C1883 GND NC
1
1
1.2P_0201_50V8C 26MHZ_10PF_1XXB26000CTP GLONASS@
MT3332_GPS_RF 1 2 C1884
3.3V LDO GLONASS@
1U_0201_6.3V6K
GLONASS@ 2
+VBAT U1915 GLONASS@

C R1859 0_0402_5% C
1 5 1 2 +GNSS_VGNSS_MAIN
VIN VOUT
1 1
GLONASS@ 2 GLONASS@
+GNSS_DCV_1V8
GLONASS@
+GNSS_DCV_1V8
2 2 GLONASS@
C1885 VSS C1886 U1907
4.7U_0402_6.3V6M 3 4 4.7U_0402_6.3V6M GLONASS@ C1887 C1902
2 EN NC 2
GPS_RFIN
4700P_0201_6.3V6K 4700P_0201_6.3V6K
1 1
XC6215B332MR-G_SOT-25-5 SA00006M400
GLONASS@ S IC MT3332N QFN 48P GPS 1.8V / 2.8V IO Voltage Selection
(5) MT8389_GPIO_GPS_EN
2.8V IO : U1907 pin30
1.8V IO : U1907 pin30
、、42 need change to GNSS_VTLDO
42 (IO voltage is SMPS_1V8)
48
49
1
3
@ R1860 @ R_0201
Connect to Host GPIO Pin 47 1 2
RF_IN
OSC
T1N
MAIN_GND
AVDD18_CM
AVDD18_RXFE
T1P
HRST_B GNSS_HRST (5)
U1907
+GNSS_VGNSS_MAIN 46
GLONASS@ XTEST
U1906 without output high-speed discharge function, then C1888 44
IF[2]/EINT0/GIO12
tdrop-down (2.7V-to-0.5V) > 50ms. 1U_0201_6.3V6M
Reserved for GPS HRST from host,
2 1 9 45
Please use MTK qualified LDOs, such as Torex XC6215/XC6221. C1889 GLONASS@ AVDD43_VBAT IF[3]/EINT1/GIO13
connect to Host (MT62xx) GPIO pin
1U_0201_6.3V6M 36
2 1 GNSS_VREF 7 EINT2/GIO14
VREF
+GNSS_VTCXO_SW 10 24 +GNSS_CORE_1V1
AVDD_TCXO_SW DVDD11_CORE2
+GNSS_VTLDO 11 43
AVDD28_TLDO DVDD11_CORE3 GLONASS@
8 6 C1890 1 2 2.2U_0402_10V6M
MT3332
1 AVSS43_MISC DVDD11_CORE1
C1891 is close to pin11 GLONASS@
C1891
1U_0201_6.3V6M
2 30 +GNSS_DCV_1V8
DVDD28_IO1 GLONASS@
+GNSS_CORE_1V1
+GNSS_DCV_1V8 12
13
AVDD28_CLDO
QFN-48pins DVDD28_IO2
42 C1892 1 2 0.1U 6.3V K X5R 0201
B
AVDD11_CLDO
1 29
GLONASS@ +GNSS_VGNSS_MAIN GND
C1893 is close to pin11 C1893 34
JRCK/GIO10
1U_0201_6.3V6M 1 GLONASS@ @
SCK1/GIO4/F_SCK/EE_SC L
2 C1894 39 R1862
4.7U_0402_6.3V6M JDO/GIO9 R_0201
RX2/GIO2/F_SI/EE_SDA
pin14 connet to C1894 GND net first, 16
AVDD43_DCV IF[1]/JDI/GIO8/SYNC
33 GNSS_FRAME_SYNC 1 2
MT8389_GPIO_FRAME_SYNC (5)
2
SCS1#/GIO5/F_SCS
then connect to reference GND
TX0/H_SO/I2C_DA
RX0/H_SI/I2C_CK
RX1/GIO0/H_SCK
14 26
TX1/GIO1/TXIND
AVSS43_DCV IF_CLK/JCK/GIO6
TX2/GIO3/F_SO
GLONASS@
AVDD43_RTC
AVDD11_RTC
+GNSS_DCV_1V8 1 2 +GNSS_DCV 15 40 Reserved for improving GNSS Hot-Start performance.
FORCE_ON
L856 1UH_LQM2MPN1R0NG0L_30% DCV IF[0]/JMS/GIO7/PPS
32K_OUT
17 38
DCV_FB JRST_/GIO11/H_SCS
XOUT
1
XIN
GLONASS@
C1895
4.7U_0402_6.3V6M
MT3332N_QFN48_6X6
23
22
19
18
21
20
37
35
25
27
28
32
31
41
2
MT3332 QFN (48 Pins, 0.4mm pitch)
1
@ GLONASS@ Reference Frequency Selection
GNSS_HOST_32K
R1863 R1864
R_0201 10K_0201_1%
+AVDDRTC
16.368MHZ TCXO : R1864 = NC , PIN_41 = NC
26MHZ TCXO : R1864 = 10K , PIN_41 = NC
2
GLONASS@ 26MHZ XTAL : R1864 = 10K , PIN_41 contact 10K
R1870 1 2 0_0402_5%
RTC Voltage (2.8V) +VDD28_6583
@
MT8389_EINT_MT3332 (5)
+VRTC R1871 1 2 0_0402_5%
UTXD1 (5)
GLONASS@
RTC32K2V8 R1867 1 2 0_0402_5%
(23,9) RTC32K2V8 URXD1 (5)
A A
As EINT to Host
Connect to HOST UART (TX/RX) interface

Connect GNSS_HOST_VRTC to always alive voltage source, and keep the
voltage swing of GNSS_HOST_32K RTC clock same as GNSS_HOST_VRTC. Security Classification Compal Secret Data Compal Electronics, Inc.
2012/11/09 2014/11/09 Title
Issued Date Deciphered Date MT3332
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
ZEJ20 - LA-A792P
0.1
5 4 3 2 1
5 4 3 2 1
+VIN
close USB connector Charger

PL5 OVP: 12V
HCB2012KF-221T30_2P +VBUS
1 2 +VIN
PL4 R1821
10P_0402_50V8J
100P_0402_50V8J
@ 2.2UH_PH041H-2R2MS_3A_20%
1U_0603_16V6K
10U_0603_10V6M
330K_0402_1%
1
1
1 19 CHARGER_SW 1 2 VCDT rating: 1.268V
PC144
PC143
VBUS_1 SW1 +VBAT
1
1 2
25V rating
PC21
PC20
PC31 VCDT (23)
2
24 20
2.2U_0603_6.3V6K
2
2
10U_0805_25V6K VBUS_2 SW2
1U_0603_25V6K
PC142
1
D PD11 D
PC24
1 2 CHARGER_PMID 23 21 0.047U_0402_16V7K 1 2
1
PMID BTST
C1828
BQ24196_REGN 2 1 R1822
4 15
2
+VDD18_6583 TP1367 STAT SYS_1 39K_0402_1%
3 16 RB551VM-30TE-17 SOD-323 80mil R1823
2
1
TP1398 /PG SYS_2
PC28 3.3K_0402_1%
PR39 5 17
(24) SCL4 SCL PGND_1 1U_0402_10V6K 2 1
10K_0201_1%
2
6 18 CHR_LDO (23)
(24) SDA4 SDA PGND_2
1
2 1 CHARGER_INT1 7 13
(24) EINT_CHG_STAT PR37 10K_0201_1% INT BAT_1 +VBAT_SUPPLY
PR30 0_0201_5%
+VBAT 2 1 8 14
2.2U_0603_6.3V6K
4.7U_0603_6.3V6K
OTG BAT_2 PR31
1
THERMAL PAD
9 10 1 2
PC25
PC26
(24) GPIO_CHG_EN PR38 10K_0201_1% /CE ILIM
0_0201_5% +VBAT_SUPPLY
2 1 2 12
+VBUS
2
PSEL TS2
2
BATT_TEMP
BQ24196_REGN 22 11 @
PR36 REGN TS1 1 2 ISENSE (23)
10K_0201_1% 4mil R1826 0_0402_5%
PU3
1
25
BQ24196RGER_QFN24_4X4
+VBAT
@
BQ24196_REGN 4mil 1 2
BATSNS (23)
+VDD18_6583 R1829 0_0402_5%
1
PR48
1
10K_0201_1%
PR51
2
15K_0402_1% BATT_TEMP
1
C C
2
CHG_TEMP (5) PR49 BATTERY CONNECTOR

1
10K_0201_1%
Add BAT CONN.1102.
PH1 R384
2
10K_0402_1%_TSM0A103F34D1RZ 39K_0402_1%
B value:3370K±1% 1 2
2
+VBAT_SUPPLY +VA_PMU
R1837
80mil
1K_0402_1%
BAT_NTC 40mil 1 2
BATON (23)
40mil 1 2
TREF (23)
JP14 @ R1838
2
1 24K_0402_1%
1 2 D810 @
2 3 TVNST52302AB0 SOT523
3 4 2 1
Rfg
4 5 2 0_0402_5%
1 SDA6 (24)
5 PR33 SCL6 (24) R1840
6
PR32 0_0402_5%
1
6 7 FGN 4 1
7
1
8
GND 9 @ PR50 3 2
GND 10K_0201_1%
ACES_50496-00701-001 0_1206_5%
Compal Part
PR35
2
1 2
FGP_IC (23)
0_0402_5%
1
PR34
0_0402_5%
2
B B
FGN_IC
FGN_IC (23)
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date Charger
C
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
C647 1000P_0402_50V7K
VPROC_SW 1 2
LPDDR2/1.2V DDR3U/1.25V DDR3L/1.35V DDR3/1.5V
PMIC
VMSEL2 L L H H VCORE_SW
C646 1000P_0402_50V7K
1 2
VMSEL1 L H L H U301A C635 1000P_0402_50V7K

VM_SW 1 2
@ R330 4.7K_0402_1% C1 DRIVER C17
2 1 C2 PWM ISINK0 C18
+VDD18_6583 2 1 B2 VMSEL1 ISINK1 B18 3G@ C638 1000P_0402_50V7K
VMSEL2 ISINK2 D308 1 2
R331 4.7K_0402_1% RB521CM-30TR2 VPA_SW
E14 1 2
(22) VCDT W17 CHARGER KPLED D15
U16 VCDT FLASH L301 0.68UH_VLS252010ET-R68N_30%
(22) CHR_LDO K15 AVDD28_CHRLDO B13VPROC_SW1 2 +VPROC_PMU
(22) ISENSE TP1368 W15 VDRV BUCK OUTPUTVPROC B14 C333 4.7U_0603_6.3V6K +VPROC_PMU
D W16 ISENSE VPROC 2 1 D
(22) BATSNS V16 BATSNS E13
(22) BATON U15 BATON VPROC_FB F13 +DVDD_DVFS (4)
(22) TREF J16 TREF GND_VPROC_FB GND_DVDD_DVFS (4)
L302 0.68UH_VLS252010ET-R68N_30%
PCH_DET B11 VCORE_SW
1 2 +VCORE_PMU
1U_0402_10V6K
1U_0402_10V6K
TP1377
VCORE B12 D309 RB521CM-30TR2 C334 4.7U_0603_6.3V6K +VCORE_PMU
VCORE
C317
1 2 2 1
C316
CONTROL SIGNAL D14
C4 VCORE_FB +DVDD (4)
@
1
(19,5,7) SRCLKENA A2 SRCLKEN_PERI L303 0.68UH_VLS252010ET-R68N_30%
(5) SRCLKENA2 A4 SRCLKEN_MD2 A15 VM_SW 1 2 +VM_PMU
(19,5,7)
R316 2 1K_0402_1%
1 SRCVOLTEN G15 SRCVOLTEN VM A16 D310 RB521CM-30TR2 C335 4.7U_0603_6.3V6K
+VM_PMU
(11) PWRKEY T16 PWRKEY VM 1 2 2 1
G13 PMU_TESTMODE C15
(11,5,7) SYSRST_B 1 2 A3 RESETB VM_FB +DDR3VCCIO
(5) WATCHDOG_B C9 SYSRSTB
R339 0_0402_5% L304 1UH_VLS252010ET-1R0N_30%
FSOURCE B10VSRAM_SW1 2 +VSRAM_PMU
A7 VSRAM C336 4.7U_0603_6.3V6K +VSRAM_PMU
(5) PWRAP_SPI0_CLK B7 SPI_CLK D13 2 1
(5) PWRAP_SPI0_CSN B6 SPI_CSN VSRAM_FB +DVDD_SRAM (4)
3G@ D311 RB521CM-30TR2
(5) PWRAP_SPI0_MO D5 SPI_MOSI 1 2
(5) PWRAP_SPI0_MI SPI_MISO
B8 H2 VPA_SW
1 2 +VPA_PMU
(5) PWRAP_EVENT C3 WRAP_EVENT VPA 3G@ L305 2.2UH_PHI25201B-2R2MS_20% 3G@ C337 2.2U_0603_10V7K
+VPA_PMU
(5) EINT_PMU INT D2 1 2
VPA_FB
3G@ L306
2 1 B3 E2 VRF18_1_SW
1 2 +VRF18_PMU
TP1379 HOMEKEY VRF18_1 2.2UH_PHI25201B-2R2MS_20% 3G@C338 4.7U_0603_6.3V6K
+VRF18_PMU
@ R315 1K_0402_1% H13 E3 1 2
PMU_EN VRF18_FB
R321 0_0402_5% VBAT INPUT L307 @
+VBAT 1 2 A13 F2 VRF18_2_SW
1 2 +VGPU_PMU
+VBAT R322 0_0402_5% A14 VBAT_VPROC VRF18_2 2.2UH_PHI25201B-2R2MS_20% @ C342 4.7U_0603_6.3V6K
+VGPU_PMU
1 2 A11 VBAT_VPROC E4 2 1
22U_0603_6.3V6M
A12 VBAT_VCORE VRF18_2_FB +DVDD_GPU_R (4)

R323 0_0402_5%
VBAT_VCORE
3
D302 1 2 A17 L308 R329 0_0402_5%

VBAT_VM
1
A18 G2
VIO18_SW1 2 1 2
VBAT_VM VIO18 +VDD18_6583
C341
R324 0_0402_5% B16 2.2UH_PHI25201B-2R2MS_20% C343 4.7U_0603_6.3V6K

1 2 A10 VBAT_VM F4 2 1
2
C R325 0_0402_5% VBAT_VSRAM VIO18_FB C

1 2 G1
1
TVNST52302AB0 SOT523 1R326 2 0_0402_5% D1 VBAT_VPA

R327 0_0402_5% E1 VBAT_VRF18 LDO OUTPUT
1 2 F1 VBAT_VRF18_2 T17
1U_0402_10V6K
R328 0_0402_5% VBAT_VIO18 VA R16 +VA_PMU
VRF28_1
2
1 2 P18 P17
VBAT_LDOS1 VRF28_2
C318
N18 R15
K18 VBAT_LDOS2 VTCXO_1 N15 +VTCXO_1_PMU
+VTCXO_2_PMU
1
D18 VBAT_LDOS3 VTCXO_2 P14
H17 VBAT_LDOS4 VCAMA T14 +VCAMA_PMU
G18 VBAT_LDOS5 VAST H18 +VAST_PMU
VBAT_LDOS6 VIO28 L18 +VDD28_6583
VUSB L17 +VUSB_PMU
R338 0_0402_5% VMC L13 +VMC_PMU
1 2 T18 VMCH K12 +VMCH_PMU
+VDD18_6583 AVDD18_LDO VEMC_3V3 +VEMC_3V3_PMU
1 C301
1 C302
1 C303
1 C304
1 C305
1 C306
1 C307
E18
VEMC_1V8 L15 +VEMC_1V8_PMU
VGP1 L16 +VGP1_PMU
VGP2 M16 +VGP2_PMU
A6 VGP3 N16 TP1375
M1 DVDD18_IO VGP4 D16 TP1376
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+VGP5_PMU
2
2.2U_0402_6.3V6M2
2.2U_0402_6.3V6M2
2.2U_0402_6.3V6M2
DVDD18_IO VGP5
1 C312
1 C313
2 C314
2 C315
F15
+VGP6_PMU
GND_DCDC
B1 VGP6 G16
DVDD18_DIG VSIM1 G17 +VSIM1_PMU
VSIM2 +VSIM2_PMU
GAS GAUGE M15
VIBR +VIBR_PMU
0.1U_0402_25V6
V17
0.1U_0402_25V6
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CS_P
2
U17 C340
CS_N V14 1U_0402_6.3V6K C346 @ C344 @ C345 @
GND_DCDC GND_VREF 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
1
V15 1 2
BC 1.1 VREF C328 1U_0402_6.3V6K
V18
(5) CHD_DP CHG_DP V2
Symbol Application Vout (V) Iout (mA) Cap Value (uF) AVDD33_RTC +VRTC
U18
(5) CHD_DM CHG_DM W1
VPROC CPU 0.7~1.25 (DC/DC) 2000 42 XIN V1
E10 XOUT U2
VCORE MDSYS/Infra 0.7~1.25 (DC/DC) 1200 30 GND_VPROC RTC_XOSC32_ENB
F10 U3
(22) FGP_IC GND_VPROC RTC_GPIO
1U_0402_6.3V6K
B J10 A9 B
VM VM 1.2/1.25/1.35/1.5 1100 10 GND_VPROC RTC_32K1V8 RTC32K2V8 (21,9) (24) 32K_OUT (24) 32K_IN
K10
C324 22P_0402_50V8J
C319 22P_0402_50V8J
(22) FGN_IC GND_VPROC
1
F9 RTC32K1V8 (5,7)
VSRAM Memory 0.7~1.25 (DC/DC) 600 10
C320
G9 GND_VCORE L10
Buck GND_VCORE GND_LDO
VPA 3GPA 0.5~3.4 (100mV/step) 600 2.2+2.2 J9 A1
2
GND_VCORE GND_LDO
0_0402_5%
0_0402_5%
K9 L11
GND_VCORE GND_LDO
1
1
VRF18 1st RF 1.825 450 4.7 E11 L8
PR41 PR40 F11 GND_VM GND_LDO L9
GND_VM GND_LDO
TP320
TP321
VRF18_2 2nd RF 1.825 450 10 0_0402_5% J11 M10
0_0402_5% K11 GND_VM GND_LDO E6
GPU OD 1.05~1.25 (50mV/step) F8 GND_VM GND_IO M6
2
2
GND_VSRAM GND_IO
R1855
R314
VIO18 IO App. 1.8 600 4.7 J6 F6
K8 GND_VPA GND_DIG E15
H8 GND_VPA GND_DRV M11 @
VA 1.8/2.5 100
GND_DCDC
H7 GND_VRF18 GND_LDO M8
GND_VRF18_2 GND_LDO +VRTC
VRF28_1 MDSYS 2.85 200 2.2 H5 M9
J8 GND_VIO18 GND_LDO P11
GND_VIO18 GND_LDO T8
Analog VRF28_2 General 1.8/2.85 200 2.2 GND_LDO V6
LDO GND_LDO W18
VTCXO_1 MDSYS 2.8 40 1 GND_LDO
VTCXO_2 MDSYS 1.8/2.8 40 1
MT6320GA-A_TFBGA_216P
VCAMA VCAMA 1.5/1.8/2.5/2.8 200 2.2
VIO28 2.8 400 2.2
VAST MT6168 0.9/1.0/1.1/1.2 300 2.2
Digital VUSB 3.3 200 1
LDO
VMC T-Card 1.8/3.3 200 1
VMCH T-Card 3.0/3.3 800 4.7
VEMC_3V3 eMMC (Core) 3.0/3.3 800 4.7
VEMC_1V8 eMMC 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 2.2
A
VGP1 VCAMD 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 400 2.2 A
VGP2 VCAM_IO 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1

VGP3 VCAM_AF 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1
VGP4 CTP/CMMB 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1
VGP5 CTP/CMMB 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1
VGP6 CTP/CMMB 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1
VSIM1 VSIM1 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1 Security Classification Compal Secret Data Compal Electronics, Inc.
VSIM2 VSIM2 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1 2012/11/03 2013/11/03 Title
Issued Date Deciphered Date MT6329 PMIC
Vibrator VIBR Vibrator 1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3 200 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTC VRTC RTC Block 2.8 2 1~22 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
PMIC_Audio +VDD18_6583 +VDD18_6583

+VDD18_6583
R305 4.7K_0201_5%
R306 4.7K_0201_5%
1
1
R301 4.7K_0201_5%
R302 4.7K_0201_5%
R303 4.7K_0201_5%
R304 4.7K_0201_5%
Audio
1
1
1
1
5/29 M
D
Digital U301C
D
2
2
2
2
2
2
@@ 1 2 W4 W2
U301B +VBAT R311 0_0402_5% C322 2.2U_0402_6.3V6M VBAT_SPK SPK_N @ PAD TP1363 Change 0510
1 2 U4 W3
GND_SPK SPK_P @ PAD TP1373
U1 K5
(11) KCOL0 R2 KP_COL0 SCL_0 K4 SCL4 (22) C325 1U_0402_10V6K
(11) KCOL1 KP_COL1 SDA_0 SDA4 (22)
T1 1 2 W10 R11 2 1
T2 KP_COL2 K6 SCL5 TP327 +VBAT R312 0_0402_5% VBAT_AUD AVDD28_AUD T11 C326 2.2U_0402_6.3V6M
R4 KP_COL3 SCL_1 L6 SDA5 TP328 AVSS28_AUD W12 1 2
N5 KP_COL4 SDA_1 B9 AVSS28_AUD
KP_COL5 5/29 A (5) ADC_DAT_IN ADC_DAT
P4 L4 SCL6 D7 P8 1 2
P5 KP_COL6 SCL_2 L5 SDA6 SCL6 (22) (5) ADC_CLK
F7 ADC_CK AVDD18_AUD R8 R313 0_0402_5% +VDD18_6583
(22) GPIO_CHG_EN KP_COL7 SDA_2 SDA6 (22) (5) ADC_WS C6 ADC_WS AVSS18_AUD
(5) DAC_DAT_OUT D6 DAC_DAT
(5) DAC_CLK DAC_CK
C7 V5 1 2
(11) KROW0 N2 (5) DAC_WS DAC_WS AVSS12N_AUD
TP326 N1 KP_ROW0 C323 2.2U_0402_6.3V6M
KP_ROW1
1U_0402_10V6K
R1 V13
(22) EINT_CHG_STAT KP_ROW2 +MICBIAS0 AU_MICBIAS0
1U_0402_10V6K
R3 W13 W9 AU_FLYP
KP_ROW3 +MICBIAS1 AU_MICBIAS1 AU_FLYP
2
T3
C KP_ROW4 C
2
5/30 D M4
KP_ROW5
C442
C327
M5 U9 AU_FLYN
1
P2 KP_ROW6 R12 AU_FLYN
(8) AU_VIN0_P
1
KP_ROW7 T12 AU_VIN0_P
(8) AU_VIN0_N AU_VIN0_N ACCDET (8)
V12 U13
J1 (8) AU_VIN1_P V11 AU_VIN1_P ACCDET
+VSIM1_PMU D8 DVDD_VSIMLS1 J3
(8) AU_VIN1_N
U12 AU_VIN1_N
(5) SIM1_SCLK M3 SIM1_AP_SCLK SIMLS1_SCLK L3 SIM1_CLK (18) (18) AU_VIN2_P U11 AU_VIN2_P U8
(5) SIM1_SIO SIM1_AP_SIO SIMLS1_SIO (18) AU_VIN2_N AU_VIN2_N HSN AU_HSN (18)
B4 J2 SIM1_DATA (18) T9 6/3 A
(5) SIM1_SRST SIM1_AP_SRST SIMLS1_SRST SIM1_RST (18) HSP AU_HSP (18)
6/5 A
H1 T7 AU_HPR (8)
+VSIM2_PMU E7 DVDD_VSIMLS2 K2 V7 HPR V8
SIM2_AP_SCLK SIMLS2_SCLK AU_REFN HPL AU_HPL (8)
M2 L2
B5 SIM2_AP_SIO SIMLS2_SIO L1
SIM2_AP_SRST SIMLS2_SRST W7
W6 AU_FMINL R10
AU_FMINR CLK_26M SYSCLK_PMU (19)
MT6320GA-A_TFBGA_216P
@ MT6320GA-A_TFBGA_216P
@
B B
5/21 Del
X301
1 2
(23) 32K_OUT 32K_IN (23)
32.768KHZ_12.5P_1TJF125DP1A000D
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date MT6329 PMIC Audio
B
ZEJ20 - LA-A792P 0.1
Date: 3UTJG_0[TK Sheet 24 of 28

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

2012/11/03 2013/11/03
Issued Date Deciphered Date Title
LED Backlight Driver
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
5V Adapter
VBUS 0
PWR Key
VBAT_SUPPLY
2710mAh
BQ24196 Battery 1S1P
Charger
2
0
U201 MT8389
VBAT
VBAT_VPROC MT6320 VPROC
7
VPROC_PMU
2000 mA
R1650 0.7~1.25 (DC/DC) DVDD_DVFS
3 1200 mA MT6320 JP2 Audio/B
D
VBAT_VCORE VCORE VCORE_PMU R1648 VBAT D
0.7~1.25 (DC/DC) DVDD R311 VBAT_SPK AMP
8 600 mA
VBAT_VSRAM VSRAM VSRAM_PMU R1651 VDD
VBAT_AUD AU_MICBIAS0 MICBIAS0
9 1100 mA 0.7~1.25 (DC/DC) DVDD_SRAM R312
VBAT_VM VM VM_PMU
AU_MICBIAS1 MICBIAS1
4 600 mA 1.825 /
VIO18 BUCK VIO18 VDD18_6583 R1655 DVDD_GPU
450 mA 1.05~1.25 (50mV/step) JP8 MIC
VBAT_VRF18-1 VRF18-1 VRF18_PMU
450 mA R1632 1.8 DVDD18_MD
VBAT_VRF18-2 VRF18-2 VGPU_PMU VDD
600 mA R1636 1.8 DVDD18_PLLGP
VBAT_VPA VPA VPA_PMU
5 100 mA R1637 1.8 AVDD18_MEMPLL

VA VA_PMU
200 mA R1627 1.8 DVDD18_MIPITX
VRF28_1 VRF28_1_PMU
200 mA
VRF28_2 VRF28_2_PMU 1.8 DVDD18_MIPIRX
12 40 mA
VTCXO_1 VTCXO_1_PMU
40 mA 1.8 DVDD18_MIPIIO
VTCXO_2 VTCXO_2_PMU
200 mA R1629 1.8 AVDD18_USB_P0
VCAMA VCAMA_PMU
6 300 mA
VAST VAST_PMU 1.8 AVDD18_USB_P1
5 400 mA
VIO28 VDD28_6583
10 200 mA R1645 1.8 DVDD28_BPI
VUSB VUSB_PMU
11 200 mA 1.8 DVDD28_BSI
VMC VMC_PMU
VBAT_LDOS1
11 800 mA
VMCH VMCH_PMU R1643 1.8 DVDD18_BSI
VBAT_LDOS2
LDOs VEMC_3V3
10
VEMC_3V3_PMU
800 mA
VBAT_LDOS3 R1658 1.8 DVDD18_NML1
C 10 200 mA C
VEMC_1V8 VEMC_1V8_PMU
VBAT_LDOS4
400 mA R1659 1.8 DVDD28_NML2
VGP1 VGP1_PMU
VBAT_LDOS5
200 mA
VGP2 VGP2_PMU 1.8 DVDD28_NML3
VBAT_LDOS6
VGP3 200 mA
1.8 DVDD18_MC12
VGP4 200 mA
200 mA R1644 1.8 DVDD18_NML4
VGP5 VGP5_PMU
200 mA
VGP6 VGP6_PMU R1633 1.8/2.5 ADVDD18_MD
200 mA
VSIM1 VSIM1_PMU
200 mA 1.8/2.5 ADVDD18_AP
VSIM2 VSIM2_PMU
200 mA R1635 2.8 ADVDD28_DAC
VIBR VIBR_PMU
1 2 mA
VRTC VRTC 3.3 ADVDD33_USB_P0
R1628
3.3 ADVDD33_USB_P1
U707/U708/U713/U1911 R1652
TX/RX
1.35 DVDD18_EMI
R1639
VCC1
R706 1.2/1.3/1.5/1.8/2.5
DVDD18_MC0
R1654 /2.8/3.0/3.3
0.5~3.4
小小)
VCC2 R701
(100mV/step) 1.8/3.3 DVDD33_MC1
U1( P-Sensor R1640
R1766 3.3V DVDD33_MC2
VDD 2.8 R1641
JP5 CAM
B 1.2/1.3/1.5/1.8 U5/U6 DDR3L B

DVDD1.8 R1725
/2.5/2.8/3.0/3.3
1.35 VDD
JSIM1 SIM AVDD2.8 1.5/1.8/2.5/2.8 R1724
1.35 VDDQ
VCC 3.3
JP1 LCD
U502 EMMC
DVDD 3.3 R1779
3.3 VCC
R546
AVDD 11
R1670 1.8 VCCQ
R543
PU1 APW7137BI
U828 Touch U818 Bridge
AVDD28 R1741 1.8 VCCIO

R1682
VDDIO 1.8 3.3 VCC
R1742
3.3 PLLVCC
R1683
3.3 LVDSVCC
U825 G-Sensor
U822 WLAN
VDD 2.8 R1764
1.8 DVDDIO18
VLOGIC 1.8 R1723
U826 GYRO R1763
A 2.8 DVDDIO_SD1 A
R1720
VDD 2.8 R1736
2.8 VRTC
R1715
VLOGIC 1.8
R1739
VBAT
R1707
JP12 SD
U601 3G
VDD 3.3 R1761
2.8 VTCXO_28
R606
JP10 Vibrator 1.825 VRF18 Issued Date 2012/11/03 2013/11/03 Title
POWER TREE
R607 Deciphered Date
Size Document Number Rev
VCC 2.8 R1760 1.8 VIO18 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A1
ZEJ20 - LA-A792P 0.1
R608 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
2013/3/11
Update PD11 , D308 , D309 , D310 , D311 , L301 ,
L302 , L303 , L304 , L307 , C647 , C646 , C635 ,
C638 compal P/N
Change to un-pop : PR50 , R1838 , R314 ,R315
Change to pop : R1855
2013/3/13
Add C318
D D
2013/3/14
Del R332,R348
2013/4/1
add R1847
reserve 0-ohm for panel design
2013/4/10
reserve C346 for VGP6_PMU
PR51 change to 15K_0402_1%
PH1 change to 10K_0402_1%
2013/4/15
Add PL5 , PC143 ,PC144 for EMI request
Add PC21 , PC22 ,PC23 for RF request
2013/4/22
C C
Change L307 and C342 to reserve
2013/5/6
Change L306 and C338 BOM structure to 3G@
2013/5/6
Change PC21,PC22 and PC23 BOM structure to 3G@
PC21 change from 22P to 10P
PC22 and PC23 change 68P to 33P
2013/5/8
Change L305 and C337 BOM structure to 3G@
2013/5/8
Change D311 and C638 BOM structure to 3G@
B B
A A

2012/11/03 2013/11/03
Issued Date Deciphered Date Title
POWER PIR
Custom
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

2012/11/03 2013/11/03 Title
Issued Date Deciphered Date HW PIR
C
ZEJ20 - LA-A792P 0.1

5 4 3 2 1
www.s-manuals.com

Compal La-A792p r0.1 Schematics PDF

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5 4 3 2 1

Security Classification Compal Secret Data Compal Electronics, Inc.

ZEJ20 (ZARA 3G) block diagram

DDR3L 1GB (4Gb X16 *2 Pcs)

YUV,I2C MIC P16

Sidekey (volume up/down) KCOL & KROW

eMMC micro SD Russian Sku

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, June 17, 2013 Sheet 2 of 28

VGP5_PMU LDO output for Touch panel 2.8V ON Gating by SW

Main board ID BOM structure

0 0 EVT 3G@ 3G only

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, June 17, 2013 Sheet 3 of 28

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

1.8V IO for DDR

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V X7R 0402_NC

0.1U 10V X7R 0402_NC

0.1U 10V X7R 0402_NC

0.1U 10V X7R 0402_NC

0.1U 10V +-10% X7R 0402

0.1U 10V X7R 0402_NC

0.1U 10V X7R 0402_NC

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V X7R 0402_NC

0.1U 10V X7R 0402_NC

0.1U 10V +-10% X7R 0402

Security Classification Compal Secret Data Compal Electronics, Inc.

Date: Monday, June 17, 2013 Sheet 4 of 28

AE23 ED10 D19

MT8389E1_PCDDR3 +DDR3VCCIO ED5 D21 RDQ6 RCLK1_

R211 1U 10V K X5R 0402 B14 B28

0.1U 10V +-10% X7R 0402

EA10 D14 RA11 NLD0

MIPI function only

LPTE MSDC2 : GPIO (2.8V)

REFP @ PAD TP1360