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PROFET
Pin Definitions and Functions Pin configuration
Pin Symbol Function
(top view)
1,10, Vbb Positive power supply voltage. Design the
11,12,
15,16,
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
Vbb 1 • 20 Vbb
19,20 thermal resistance GND1 2 19 Vbb
3 IN1 Input 1,2, activates channel 1,2 in case of IN1 3 18 OUT1
7 IN2 logic high signal ST1 4 17 OUT1
17,18 OUT1 Output 1,2, protected high-side power output IS1 5 16 Vbb
13,14 OUT2 of channel 1,2. Both pins of each output have GND2 6 15 Vbb
to be connected in parallel for operation IN2 7 14 OUT2
according ths spec (e.g. kilis). Design the wiring ST2 8 13 OUT2
for the max. short circuit current IS2 9 12 Vbb
4 ST1 Diagnostic feedback 1,2 of channel 1,2, Vbb 10 11 Vbb
8 ST2 open drain, invers to input level
2 GND1 Ground 1 of chip 1 (channel 1)
6 GND2 Ground 2 of chip 2 (channel 2)
5 IS1 Sense current output 1,2; proportional to the
9 IS2 load current, zero in the case of current
limitation of the load current
Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ Max
Thermal resistance
junction - soldering point4),5) each channel: Rthjs -- -- 12 K/W
junction - ambient 4) one channel active: Rthja -- 40 --
all channels active: -- 33 --
) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω
resistor for the GND connection is recommended.
) R = internal resistance of the load dump test pulse generator
I
) V
Load dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for V
bb
connection PCB is vertical without blown air See page 15
Data Sheet 3 V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max
Operating Parameters
Operating voltage9) Vbb(on) 5.0 -- 34 V
Undervoltage shutdown Vbb(under) 3.2 -- 5.0 V
Undervoltage restart Tj =-40...+25°C: Vbb(u rst) -- 4.5 5.5 V
Tj =+150°C: 6.0
Undervoltage restart of charge pump
see diagram page 13 Tj =-40...+25°C: Vbb(ucp) -- 4.7 6.5 V
Tj =150°C: -- -- 7.0
Undervoltage hysteresis ∆Vbb(under) -- 0.5 -- V
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Overvoltage shutdown Vbb(over) 34 -- 43 V
Overvoltage restart Vbb(o rst) 33 -- -- V
6) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
7) not subject to production test, specified by design
8) See timing diagram on page 11.
9) At supply voltage increase up to Vbb= 4.7 V typ without charge pump, VOUT ≈Vbb - 2 V
Data Sheet 4 V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max
Protection Functions13)
Current limit, (see timing diagrams, page 12)
Tj =-40°C: IL(lim) 48 56 65 A
Tj =25°C: 40 50 58
Tj =+150°C: 31 37 45
Repetitive short circuit current limit,
Tj = Tjt each channel IL(SCr) -- 24 -- A
two parallel channels -- 24 --
(see timing diagrams, page 12)
Initial short circuit shutdown time Tj,start =25°C: toff(SC) -- 2.0 -- ms
(see timing diagrams on page 12)
Output clamp (inductive load switch off)14)
at VON(CL) = Vbb - VOUT, IL= 40 mA Tj =-40°C: VON(CL) 41 -- -- V
Tj =25°C...150°C: 43 47 52
Thermal overload trip temperature Tjt 150 -- -- °C
Thermal hysteresis ∆Tjt -- 10 -- K
10) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω
resistor in the GND connection is recommended). See also VON(CL) in table of protection functions and
circuit diagram page 9.
11) Measured with load; for the whole device; all channels off
12) Add IST, if IST > 0
13 Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
14) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
VON(CL)
Data Sheet 5 V1.0, 2007-05-13
Smart High-Side Power Switch
BTS740S2
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max
Reverse Battery
Reverse battery voltage 15) -Vbb -- -- 32 V
Drain-source diode voltage (Vout > Vbb) -VON -- 600 -- mV
IL = - 4.0 A, Tj = +150°C
Diagnostic Characteristics
Current sense ratio16), static on-condition,
VIS = 0...5 V, Vbb(on) = 6.517)...27V,
kILIS = IL / IIS Tj = -40°C, IL = 5 A: kILIS 4350 4800 5800
Tj= -40°C, IL= 0.5 A: 3100 4800 7800
Tj= 25...+150°C, IL= 5 A: 4350 4800 5350
Tj= 25...+150°C, IL = 0.5 A: 3800 4800 6300
Current sense output voltage limitation
Tj = -40 ...+150°C IIS = 0, IL = 5 A: VIS(lim) 5.4 6.1 6.9 V
Current sense leakage/offset current
Tj = -40 ...+150°C VIN=0, VIS = 0, IL = 0: IIS(LL) 0 -- 1 µA
VIN=5 V, VIS = 0, IL = 0: IIS(LH) 0 -- 15
VIN=5 V, VIS = 0, VOUT = 0 (short circuit) IIS(SH) 18) 0 -- 10
Current sense settling time to IIS static±10% after
positive input slope18), IL = 0 5A tson(IS) -- -- 300 µs
Current sense settling time to 10% of IIS static after
negative input slope18), IL = 5 0A tsoff(IS) -- 30 100 µs
Current sense rise time (60% to 90%) after change
of load current18) IL = 2.5 5A tslc(IS) -- 10 -- µs
15) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 9).
16) This range for the current sense ratio refers to all devices. The accuracy of the k can be raised at least by
ILIS
a factor of two by matching the value of kILIS for every single device.
In the case of current limitation the sense current IIS is zero and the diagnostic feedback potential VST is
High. See figure 2c, page 12.
17) Valid if V
bb(u rst) was exceeded before.
18) not subject to production test, specified by design
19) External pull up resistor required for open load detection in off state
Parameter and Conditions, each of the two channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified min typ max
20) If ground resistors RGND are used, add the voltage drop across these resistors.
Truth Table
Current
Input 1 Output 1 Status 1
Sense 1
Current
Input 2 Output 2 Status 2
Sense 2
level level level IIS
Normal L L H 0
operation H H L nominal
Current- L L H 0
limitation H H H 0
Short circuit to L L H 0
GND H L21) H 0
Over- L L H 0
temperature H L H 0
Short circuit to L H L22) 0
Vbb H H L <nominal 23)
Open load L L24) H (L25)) 0
H H L 0
Undervoltage L L H 0
H L L 0
Overvoltage L L H 0
H L L 0
Negative output L L H 0
voltage clamp
L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit
H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 13)
Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status
outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. The current
sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.
Terms
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21) The voltage drop over the power transistor is Vbb-VOUT > 3V typ. Under this condition the sense current IIS is
zero
22) An external short of output to V , in the off state, causes an internal current from output to ground. If R
bb GND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
23) Low ohmic short to V may reduce the output current I and therefore also the sense current I .
bb L IS
24) Power Transistor off, high impedance
Input circuit (ESD protection), IN1 or IN2 Inductive and overvoltage output clamp,
OUT1 or OUT2
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ESD-Zener diode: 6.1 V typ., max 5.0 mA; RST(ON) < 375 Ω
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RST=15kΩ, RI=4.5kΩ typ., RIS=1kΩ, RV=15kΩ,
,
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5 by the load. Temperature protection is not active
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OFF-state diagnostic condition:
ESD-Zener diode: 6.1 V typ., max 14 mA;
VOUT > 3 V typ.; IN low
RIS = 1 kΩ nominal
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Any kind of load. In case of IN = high is VOUT ≈ VIN - VIN(T+).
Due to VGND > 0, no VST = low signal available. Energy stored in load inductance:
2
GND disconnect with GND pull up EL = 1/2·L·I L
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Maximum allowable load inductance for
a single switch off (one channel)4)
Any kind of load. If VGND > VIN - VIN(T+) device stays off / I,/Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω
Due to VGND > 0, no VST = low signal available.
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Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and
channel 2
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Figure 2c: Switching a lamp with current limit: Figure 3a: Turn on into short circuit:
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Package Outlines
0.35 x 45˚
2.65 max
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Index Marking
1) Does not include plastic or metal protrusions of 0.15 max per side
2) Does not include dambar protrusion of 0.05 max per side
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government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-
free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Please specify the package needed (e.g. green package) when placing an order
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Revision History
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