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Power
Power.SchDoc

Vexternal
5-12V Power Selector POWER 1.8V

ADP5054
LTC4412 3.3V
ADP2164- 1.8V ADP1755- 1.3V ADP1755- 1.3V
VBUS_5V VSYS

VDD_INTERFACE
A A

TPS76801QD

VDDA_GPO

1.3V_A

1.3V_B
3.3V

1.8V 1.0V 1.35V 3.3V


1.2V

USB_3.0 FPGA
FPGA.SchDoc AD9364_Interface AD9364_RF
USB3.0.SchDoc AD9364_Interface.SchDoc AD9364_RF.SchDoc

AD9364 ANALOG

1.3V_B
VDDA_GPO

1.3V_A
VDD_INTERFACE
1P3_TXA
POWER
POWER 40 Mhz
DQ[31..0] DQ[31..0] POWER
P0_D[11..0] P0_D[11..0]
External Clock In
P1_D[11..0] P1_D[11..0] XTALP XTALP

BANK 14 & BANK 34 (1.8V)


CTL[12..0] F_CLT[12..0]
DATA_CLK DATA_CLK

USB 3.0 FX3_INT_CTL FX3_INT_CTL


FPGA ARTIX-7
FB_CLK FB_CLK
FRONT END
XTALN XTALN

BANK 35 (1.8V)
FX3_PCLK FX3_PCLK RX_FRAME RX_FRAME

BANK 1,2,3,4 (1.8V)

DIGITAL I/O

ANALOG I/O
EZUSB-FX3 XC7A100T-1FTG256C TX_FRAME TX_FRAME
AD9364 RF Tranformer PGA-102+
0 - 6 Ghz
SPI_SSN PROGRAM_B EN_AGC EN_AGC TXA_N TXA_N
B B
GPIO52/INTB INIT_B ENABLE_AD9364 ENABLE_AD9364 TXA_P TXA_P

SPI_CLOCK CCLK TXNRX TXNRX

SPI_MOSI DIN CTRL_IN[3..0] CTRL_IN[3..0] TX_MON TX_MON

GPIO50/DONE DONE CTRL_OUT[7..0] CTRL_OUT[7..0]

SPI_MISO FPGA_MOSI SYNC_IN SYNC_IN


RF Tranformer
CLK_OUT CLK_OUT 0 - 6 Ghz
LEDS[7..0] SPI_CLK SPI_CLK
RXA_N RXA_N
BANK 15 (1.8V) SPI_EN SPI_EN
RXA_P RXA_P

DDR3_DQ[0..15]
GPIO[7..0] SPI_DO SPI_DO

DDR3_DM[0..1]

DDR3_DQS0_N

DDR3_DQS1_N
DDR3_DQS0_P

DDR3_DQS1_P
DDR3_BA[0..2]
DDR3_A[0..13]

DDR3_CKL_N

DDR3_CKL_P

DDR3_RESET

DDR3_ODT
DDR3_CKE

DDR3_RAS

DDR3_CAS
SPI_DI SPI_DI

DDR3_WE
GPIO
GPIO.SchDoc DDR3_Memory
Memory.SchDoc
LEDS[7..0]

GPIO[7..0]

DDR3_DQ[0..15]

DDR3_A[0..13]

DDR3_BA[0..2]

DDR3_DM[0..1]
DDR3_CLK_N

DDR3_DQS0_N

DDR3_DQS1_N
DDR3_CKE

DDR3_RESET

DDR3_WE

DDR3_ODT
DDR3_CLK_P

DDR3_RAS

DDR3_CAS

DDR3_DQS0_P

DDR3_DQS1_P
GPIO

POWER
DDR3 Memory 1.35V

C MT41K128M16JT-125 C

D D

Title
Block Diagram
Size Number Revision
D 0
Date: 05/12/2018 Sheet of 7
File: D:\Tesis\..\Intro.SchDoc Drawn By: Omar Lopez

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

PIC6302 1V 3A

Buck Regulators BST1


PIC6301
COC63
C63
Cout11 Power Path Selector
VER TODOS LOS COMPONENTES!! SW1
PIC6401
PIC6402
COC64
C64
Cbst11
0.1uF PIL301
COL3
L3
PIL302
100uF

L11 GND
ADP505x BuckDesigner.xlsm parametros:
-Vout1 = 1V (3A) 1,5uH COR17
R17 FB1
-Vout2 = 1,8V (2A) PIR1702 PIR1701
PIR1802
-Vout3 = 3,3V (1A) Rf11 COR18 Funcionamiento:
-Vout4 = 1,35V (1A) GND 16.2K R18 -If only the primary supply is present,the Power Source
-Temp Amb(max)= 55ºc PIQ101 Rf21
PIR1801 64.9K
Vout = ( Rf11 / Rf21 + 1 ) * Vref
Selector will power the LTC4412 from the VIN pin.

1
COC65
C65 Vref=0.8V GATE (Pin 5): Primary P-Channel MOSFET Power Switch
-Criteria = Most efficient COQ1A
COQ1B
Q1A - SENSE (Pin 6): Power Sense Input Pin. Supplies power
DL1 2 Gate Drive Pin. This pin is directed by the power controller
PIQ102
BSC072N03LD G
PIC6502 PIC6501
to maintain a forward regulation voltage (VFR) of 20mV to the internal circuitry and is a voltage sense input to the
internal analog controller (The other input to the controller
PIQ1087 Cf11 GND between the VIN and SENSE pins when an auxiliary power

7, 8
220pF is the VIN pin). This input is usually supplied power from
SW1 source is not present. When an auxiliary power source
A is connected, the GATE pin will pull up to the SENSE pin an auxiliary source such as an AC adapter or back-up A
battery which also supplies current to the load.
COC67
C67 SW2 voltage, turning off the primary P-channel power switch.
COR19
R19 COU4
U4
COMP1
PIQ1065

5, 6
GND PIC6702 PIC6701PIR1901 PIR1902 COC66
C66 Q1B
Rc11 BSC072N03LD G
Cc11 GND PIC6601 PIC6602 VDD_ADP5054 43
PIU4043 VDD
31
DL1 PIU4031
DL1 DL2 4
3.9nF 4.42K 29 DL2 PIQ104
DL2 PIU4029 1.8V 2A
Cv PIC6802
COC69
C69
COR20 VSYS Falta indicador PG PIQ103

3
R20 COMP2 1uF BST1 32 17 PWRGD COC68
C68
GND PIC6902 PIC6901
PIR2001 PIR2002 PIU4032 BST1 PWRGD PIU4017 GND
Rc13 PIR1 402 BST2 28
PIU4028
BST2 BST2 PIC6801 Cout12
Cc12
3.3nF
3.32K
PIR1 401 3K
COR114
R114
1%
BST3 1
PIU401
BST4 12
PIU4012
BST3
BST4
33
SW1 PIU4033
35
SW1 PIU4035
34
SW1 PIU4034
SW1 PIC70 1 COC70
C70
Cbst12
COL4
L4
GND
100uF
External Voltage LTC4412 Si4963BDY
Q2B
COC71
C71 COR22 R22
ENABLE_1V 18
PIU4018 CFG12 SW2 PIC70 2 0.1uF PIL401 PIL402
GND
Vextern 3
COMP3 GND 13 25 L12 PIQ205
PIQ206 PIQ203
GND PIC7102 PIC7101PIR2201 PIR2202 PIR1 502 PIU4013
CFG34 SW2 PIU4025
26 SW2 COR21
R21 FB2 5, 6
Rc13 COR115
R115 COMP1 40 SW2 PIU4026
27 1,5uH PIR2102 PIR2101
Cc13 PIU4040
COMP1 SW2 PIU4027 PIR2302
2.37K 1% Rf12
3.3nF PIR1 501 2K Power Sequence COMP2 20
PIU4020 COMP2 R23
COR23 J5
COJ5
PIJ502B2 PIQ204 COQ2B

4
COMP3 47 4 SW3 35.7K PIJ502A
PIJ502 COQ2A
Q2A Si4963BDY
COC73
C73 1V>1.8V>3.3V>1.5V PIU4047
COMP3 SW3 PIU404
Rf22 3 COF1
F1
COR24
R24 COMP4 15 5 PIJ503B
PIJ503A
PIJ503

GND PIC7302 PIC7301PIR2401 PIR2402 COMP4 PIU4015 COMP4 SW3 PIU405


RT (kΩ) = [14,822/fSW
COC72
C72 PIR230128.7K PIJ501B1
PIJ501A
PIJ501 Jack_IN PIF101 PIF102 Vextern
VBUS PIQ208
PIQ207 1
PIQ201 VSYS
7, 8
Rc14 GND ENABLE_1V 39 9 SW4 (kHz)]^1.081 PIC7202 PIC7201
PJ-002BH SF-1206F400-2
Cc14 PIU4039
EN1 SW4 PIU409
1.69K 21 8 COU5 PIR2502
4.7nF 1V PIU4021 EN2 SW4 PIU408 Cf12 U5
PIQ20 PIC7402

2
1.8V 48
PIU4048
EN3 100pF GND COR25
R25 COC74
C74
14 42 RT R26
COR26
3.3V PIU4014 EN4 RT PIU4042 PIR2601 PIR2602 GND 1
PIU501 6 1% PIC7401 Cap
VIN SENSE PIU506
Rt 3.3V 1A 2
PIU502
GND
5
GATE PIU505
PIR2501470K 22uF
FB1 PIU4041
41 FB1 SYNC/MODE 44
PIU4044
SYNC/MODE 68.1K 3 4
FB2 PIU4019
19 BST3 PIC7502 GND PIU503 CTL STAT PIU504
FB2 GND
FB3 PIU4046
46 45 VREG C75
COC75
FB3 VREG PIU4045

VSYS FB4 PIU4016


16
FB4
PIC810 PIC7601 COC76
C76
L5
COL5
PIC7501 Cout13 LTC4412
30 COC81
C81 Cbst13 10uF
36 PGND PIU4030 PIC8102 Cvreg PIC7602 0.1uF
PIC7 02 PIC7802 PIC7902 PIC80 2 PIU4036 PVIN1 SW3
37 2 1uF PIL501 PIL502
GND
COC77
C77 COC78
C78 COC79
C79 COC80
C80 PIU4037 PVIN1 PGND3 PIU402 L13 COR27
R27
VSYS 38 PVIN1 3
PGND3 PIU403 GND FB3
PIC7 01 Cin11 PIC7801 Cin12 PIC7901 Cin13 PIC80 1 Cin14 PIU4038
22 10 GND 15 uH PIR2702 PIR2701

10uF 22uF 22uF 10uF PIU4022 PVIN2 PGND4 PIU4010 Rf13


PIR2802
PCB!!!!! 23 11 COR28
R28
PIU4023 PVIN2 PGND4 PIU4011 41.2K
(INFO sacada de: Data Sheet ADP5054, usar como referencia el layout del 24
PIU4024 PVIN2 C82
COC82 Rf23
DataSheet ) 6
PIU406 PVIN3 49
EP PIU4049 GND PIR280113.3K
7 PIC8202 PIC8201 STAT (Pin 4): Open-Drain Output Status Pin. When the
PIU407
PVIN4
• Place the input capacitor, inductor, MOSFET, output capacitor, and GND Cf13 SENSE pin is pulled above the VIN pin with an auxiliary
bootstrap capacitor close to the IC. 82pF GND VIN (Pin 1): Primary Input Supply Voltage. Supplies power power source by about 20mV or more, the reverse turnoff
• Use short, thick traces to connect the input capacitors to the PVINx pins, ADP5054ACPZ-R7 to the internal circuitry and is one of two voltage sense threshold (VRTO) is reached. The STAT pin will then go
R29 1.35V 1A inputs to the internal analog controller (The other input from an open state to a 10μA current sink (IS(SNK)). The
and use a dedicated power ground to VREG COR29 BST4
connect the input and output capacitor grounds to minimize the connection
PIR2902 PIR2901
PIC8302 to the controller is the SENSE pin). This input is usually STAT pin current sink can be used, along with an external
length.
• Use several high current vias, if required, to connect PVINx, PGNDx, or
680 ohms PID301 COD3
PIC8401 COC84
C84
Cbst14
COL6
L6
PIC8301
COC83
C83
Cout14
supplied power from a battery or other power source which
supplies current to the load. This pin can be bypassed to
resistor, to turn on an auxiliary P-channel power switch
and/or signal the presence of an auxiliary power source
D3
SWx to other power planes. SW4 PIC8402 0.1uF 22uF ground with a capacitor in the range of 0.1μF to 10μF if to a microcontroller.
LED2
• Use short, thick traces to connect the inductors to the SWx pins and the
output capacitors.
PID302 Sync Mode : 1 = PWM fijo , 0=
modo automaticoPWM/PSM. DNP
PIL601
L14
PIL602 needed to suppress load transients.

COR30
R30 6.8uH
• Maximize the amount of ground metal for the exposed pad, and use as VREG GND
PIR3001 PIR3002 R31
COR31 FB4
many vias as possible on the component
B side to improve thermal dissipation.
• Use a ground plane with several vias connecting to the component side PWRGD
PIQ302 COQ3
Q3
Rt1
0 Ohms
PIR3102

Rf14
PIR3101

PIR3202 B
PIQ301
FDV301N SYNC/MODE
R33
COR33 19.6K COR32
R32
ground to further reduce noise PIR3301 PIR3302 GND Rf24
interference on sensitive circuit nodes.
• Place the decoupling capacitors close to the VREG and VDD pins. PIQ303 Rt2
0 Ohms PIC8502
C85
COC85
PIC8501
PIR320128.7K
• Place the frequency setting resistor close to the RT pin.
• Place the feedback resistor divider close to the FBx pin. In addition, keep Cf14 GND
the FBx traces away from the high current 180pF
traces and the switch node to avoid noise pickup. GND
• Use 0402 or 0603 size resistors and capacitors to achieve the smallest
possible footprint solution on boards where
space is limited.

AD9364 Power Circuito Copiado de la placa fmcomms4


(ad9364 board). TPS76801QD USB Power
COU6
U6

1 8 Regulador recomendado por


PIU601 VIN NC PIU608
Cypress Pag.7 AN70707
PIC8602 PIC8702 PIC8 02 PIU602 VIN
2
C86
COC86 C87
COC87 C88
COC88 3 17 "Hardware Design Guidelines
PIU603 VIN EP PIU6017 GND and Schematic Checklist"
PIC8601 Cap PIC8701 Cap PIC8 01 Cap
PIU6015 VIN
15 6
GND PIU606
0.1uF 47uF 0.1uF 16 COC89
C89
PIU6016 VIN
7
SS PIU607 PIC8901 PIC8902
0.01uF U7
COU7
PIU6010
10
VOUT PG
5
PIU605
PIR3402
COE1
E1 GND
PIU6011 VOUT
11
GND
1
PIU701 GND
8
PG PIU708 COR34
R34
1.3V_A_OUT 12 4 1.8VAD9364 2 7 FB_USB
COL7
L7 PIU6012 VOUT EN PIU604 PIU702 *EN FB/NC PIU707
3.3V PIL701 PIL702 PIE101
1 2
PIE102
VDDA_GPO_OUT PIC9202 C92 PIC9302 C93 PIC9402 C94
PIC9502 C95 PIC9602 C96
PIC9702 C97 PIU6013 VOUT
14
13
9
3.3V
3
PIU703 IN
4
6
OUT PIU706
5
1
PIR340240K 1.2V
PIC9802 PIC9 02 0.47uH PIC10 02 PIC10 2 PIC102 PIC103 2 COC92 COC93 COC94 COC95 COC96 COC97 PIU6014 VOUT ADJ PIU609 PIU704 IN OUT PIU705
C98
COC98
Cap
C99
COC99
Cap
C100
COC100
Cap
C101
COC101
Cap
C102
COC102
Cap
C103
COC103
Cap
PIC9201 Cap
0.1uF
PIC9301 Cap
0.1uF
PIC9401 Cap
0.1uF
PIC9501 Cap
0.1uF
PIC9601 Cap
10uF
PIC9701 Cap
10uF
PIC9801 PIC9 01 PIC10 01 PIC10 1 PIC102 1 75 ohms PIC103 1 PIC10801 C108
COC108 PIC10901 C109
COC109
0.1uF 10uF 10uF 0.1uF 0.1uF 0.1uF ADP1755ACPZ-R7 Cap Pol3 TPS76801QDR Cap Pol3
PIC10802 4.7uF PIC10902 10uF
GND
GND GND GND GND R35
COR35 Vout = 0.5×(1+ Rtop / Rbot )=1.3V
PIR3502 PIR3501 1.2V
Rtop PIR3601 GND
16K COR36
R36
Rbot GND
PIR360210K PIR3702 Circuito Pag.12
R37 "TPS768xxQ.pdf"
COR37

C 1
PIR370430 C
GND
FB_USB
R38
COR38
PIR3801 PIR3802
VIN
PIR3902 VO = Vref * ( R1 / R2 + 1)
1%
PIC1 601 10 ohms U8
COU8 COR39
R39
C116
COC116
PIC1 602 10V
PIU8014
14
VIN EP PIU8017
17
Dos fuentes de 1.3v separadas 1 K
PIR39030.1
1uF
de acuerdo con Rx and Tx
12
PIU8012 PVIN Synthesizer Supplies(AD9364
1.8VAD9364 GND 13 8
PIU8013 PVIN PGND PIU808 ref Manual pag 116)
7
PGND PIU807 GND
PIR40 1 PIU8016
16 PGOOD 6
PGND PIU806
R40
COR40 GND
Rtop VIN 15 5
PIU8015 EN GND PIU805
PIR40 2 20K
4 1 VIN
Vout = 0.6×(1+ Rtop / Rbot )=1.8V PIU804 FB SYNC PIU801
E2
COE2 E3
COE3
PIR4101 R41 GND PIU802
2
RT
11
SW PIU8011
10 L8
COL8
1 2 1.8VAD9364 1 2 VDD_INTERFACE_OUT
COR41 SW PIU8010 PIL801 PIL802
Rbot VIN
PIU803
3
TRK
9
SW PIU809 XFL4020-222MEB PIC1 702 C117
PIC1 802 C118 PIC1 902 C119PIE201 PIE202 PIE301 PIE302
PIC120 C120
PIC12102 C121
PIR4102 10K 2.2 uH COC117 COC118 COC119 COC120 COC121
PIC1 701 Cap
47uF
PIC1 801 Cap
0.1uF
PIC1 901 Cap
0.1uF
120 ohms 75 ohms PIC120 1 Cap
10uF
PIC12101 Cap
0.1uF
ADP2164ACPZ-R7

GND
GND GND
U9
COU9
1 8
PIU901 VIN NC PIU908
PIC12602 PIC12702 PIC12802 2
C126 C127 C128 PIU902
3 VIN 17
COC126 COC127 COC128
Cap Cap Cap PIU903
15 VIN EP PIU9017
6 GND
PIC12601 47uF
PIC12701 0.1uF
PIC12801 0.1uF PIU9015
16
VIN GND PIU906
C129
COC129
PowerPathControl Power to AD9364
PIU9016

10
VIN
SS 7
PIU907
5
PIC12901 PIC12902
0.01uF
VOUT PG
COP4P4 11
PIU9010

VOUT
PIU905

1.3V_A_IN 1 GND PIU9011


12 4 1.8VAD9364
1.3V_A_OUT PIP401 PIU9012 VOUT EN PIU904
1.3V_A_IN 1.3V_B_OUT 13
PIP402 2 1.3V_A
PO103V0A PIU9013 VOUT
PIC13202 PIC13 02 PIC13402 PIC13502 PIC13602 PIC13702 14 9
Header 2 C132 C133 C134 C135 C136 C137 PIU9014 VOUT ADJ PIU909
COC132 COC133 COC134 COC135 COC136 COC137
P5
COP5 PIC13201 Cap PIC13 01 Cap PIC13401 Cap PIC13501 Cap PIC13601 Cap PIC13701 Cap
1.3V_B_IN 1.3V_B_IN 0.1uF 0.1uF 0.1uF 0.1uF 10uF 10uF ADP1755ACPZ-R7
1.3V_B_OUT PIP501 1 1.3V_B
PO103V0B
PIP502 2
Header 2
P6 VDD_INTERFACE GND R42
COR42
COP6 VDD_INTERFACE
POVDD0INTERFACE PIR4202 PIR4201
Vout = 0.5×(1+ Rtop / Rbot )=1.3V
VDD_INTERFACE_OUT PIR4301 R43
1 Rtop
D VDD_INTERFACE PIP601 D
PIP602 2 16K COR43
Rbot
Header 2
VDDA_GPO
POVDDA0GPO
VDDA_GPO PIR4302 10K
COP7P7
VDDA_GPO_OUT 1
PIP701
VDDA_GPO 2
PIP702
Header 2 GND

Title
Power
Size Number Revision
D 5
Date: 05/12/2018 Sheet of 7
File: D:\Tesis\..\Power.SchDoc Drawn By: Omar Lopez

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Powe&Decoupling Data&Control
PowerPathControl COP8
P8 Clock&Boot COU10A
COU10B
COU10C
COU10D
COU10E
COU10F
COU10G
U10A
1.2V PIP801
1 P - PORT
1.2V_USB PIP802 2
SEC 1/7 i Net Class ClassName: USB_R_DATA
Header 2 COR44
COP9
P9 F10 R_DQ0PIR4402R44 FX3_DQ0
DQ0 PIU100F10 PIR4401

22 ohms FX3_DQ[31..0] PODQ0310000


PODQ31
PODQ30
PODQ29
PODQ28
PODQ27
PODQ26
PODQ25
PODQ24
PODQ23
PODQ22
PODQ21
PODQ20
PODQ19
PODQ18
PODQ17
PODQ16
PODQ15
PODQ14
PODQ13
PODQ12
PODQ11
PODQ10
PODQ9
PODQ8
PODQ7
PODQ6
PODQ5
PODQ4
PODQ3
PODQ2
PODQ1
PODQ0
1.8V PIP901
1 COR45
F9 R_DQ1PIR4502R45 FX3_DQ1
DQ[31..0]
1.8V_USB PIP902 2 DQ1 PIU100F9 PIR4501
COR46 22 ohms
Header 2 U10E F7 R_DQ2PIR4602R46 FX3_DQ2
5. Frequency Select DQ2 PIU100F7 PIR4601
XTAL / CLK 22 ohms
Configuration 19.2 MHz crystal 5.Clock Crystal (AN70707 COR47
3.Power System (AN70707 G10 R_DQ3PIR4702R47 FX3_DQ3
Pag.4) (AN70707 Pag.11) Pag.9) DQ3 PIU100G10 PIR4701
22 ohms
COR48
SEC 5/7 G9 R_DQ4PIR4802R48 FX3_DQ4
DQ4 PIU100G9 PIR4801
22 ohms
A B2 COR49
R49 COR50
F8 R_DQ5PIR5002R50 FX3_DQ5 A
FSLC0 PIU100B2 PIR4901 PIR4902
GND DQ5 PIU100F8 PIR5001
Y3
COY3 22 ohms
B4
COR51
H10 R_DQ6PIR5102R51 FX3_DQ6
FSLC1 PIU100B4 10K DQ6 PIU100H10 PIR5101
XTALIN 1 3 XTALOUT COR52 22 ohms
PIC14 01 COC144 PIY301 PIY303
PIC14501 COC145 R52
E6
FSLC2 PIU100E6 C144 C145 H9 R_DQ7PIR5202
DQ7 PIU100H9 PIR5201 FX3_DQ7
Cap Cap 22 ohms
1.2V_USB U10G PIC14 02 13pF PIC14502 13pF J10 R_DQ8PIR5302 R53
COR53
FX3_DQ8
DQ8 PIU100J10 PIR5301
POWER XTALIN C6 XTALIN 2 GND GND 4 22 ohms
R_DQ9PIR5402R54
PIU100C6 PIY302 PIY304
COR54

CVDDQ
J9 FX3_DQ9
DQ9 PIU100J9 PIR5401
E10 C7 XTALOUT 22 ohms
H1 SEC 7/7 VBAT PIU100E10 XTALOUT PIU100C7 K11 R_DQ10
COR55
R55 FX3_DQ10
NX2520SA-19.200000MHz-NBG1
PIU100H1
C3 VDD1 1.8V_USB GND GND DQ10 PIU100K11 PIR5502 PIR5501
22 ohms
PIU100C3 VDD2 COR56
R56
L7 D7 L10 R_DQ11 FX3_DQ11
PIU100L7
VDD3 CLKIN PIU100D7
DQ11 PIU100L10 PIR5602 PIR5601

E9
PIU100E9 22 ohms
F11 VDD4 C11 D6 K10 R_DQ12 COR57
R57 FX3_DQ12
PIU100F11
VDD5 VIO5 PIU100C11
CLKIN_32 PIU100D6
DQ12 PIU100K10 PIR5702 PIR5701

22 ohms
K9 R_DQ13
COR58
R58 FX3_DQ13
DQ13 PIU100K9 PIR5802 PIR5801
L5 VDD_SRAM_VDD1 CYUSB3014-BZXC Sin Clock COR59 22 ohms
PIU100L5

J11 F1 J8 R_DQ14 R59 FX3_DQ14


PIU100J11 VDD_SRAM_VDD2 VIO2 PIU100F1 externo DQ14 PIU100J8 PIR5902 PIR5901

VIO1
22 ohms
COR60
R60
G8 R_DQ15 FX3_DQ15
AVDD A7 E3 DQ15 PIU100G8 PIR6002 PIR6001
22 ohms
PIU100A7 AVDD VIO3 PIU100E3 Memoria COR61
R61
U10F EEPROM J6 R_PCLK FX3_PCLK POFX30PCLK
PCLK PIU100J6 PIR6102 PIR6101
FX3_PCLK
22 ohms
U3RXVDDQ A2 B6 CVDDQ MISC K8 R_CTL0 COR62
R62 FX3_CTL0
PIU100A2
U3RXVDDQ CVDDQ PIU100B6 GND CTL0 PIU100K8 PIR6202 PIR6201
22 ohms
U3TXVDDQ B5 B1 SEC 6/7 K7 R_CTL1
COR63
R63 FX3_CTL1
PIU100B5 U3TXVDDQ VIO4 PIU100B1 1.8V_USB CTL1 PIU100K7 PIR6302 PIR6301
COR64 22 ohms FX3_CTL[12..0] POCTL0120000
POCTL12
POCTL11
POCTL10
POCTL9
POCTL8
POCTL7
POCTL6
POCTL5
POCTL4
POCTL3
POCTL2
POCTL1
POCTL0
CTL[12..0]
R64
D9 FX3_I2C_SCL J7
CTL2 PIU100J7 R_CTL2
PIR6402 PIR6401 FX3_CTL2
B10 L9 I2C-GPIO58_SCL PIU100D9
22 ohms
PIU100B10
VDD_EFVDDQ VIO1_1 PIU100L9
R65
COR65
H11 D10 FX3_I2C_SDA H7 R_CTL3 FX3_CTL3
VIO1_2 PIU100H11
I2C-GPIO59_SDA PIU100D10
PIR6701 CTL3 PIU100H7 PIR6502 PIR6501

COR66
22 ohms
G1
PIU100G1 VSS1
PIR6801 R67
COR67
CTL4
G7 R_CTL4
PIU100G7
R66
PIR6602 PIR6601
FX3_CTL4
PIC15102 PIC15202 PIC15302 PIC150 2 PIC14602 PIC14702 PIC14802 PIC14902 L1 PIR70 1 COR68
R68 COU11
U11 PIR7102 22 ohms
PIC15401 C154
COC154 PIC15 02 COC155 PIC15602 COC156 COC151
C151 COC152
C152 COC153
C153 COC150
C150 COC146
C146 COC147
C147 COC148
C148 COC149
C149
PIU100L1
E2 VSS2 B7 D11 R70
COR70 PIR670210K 1 7 PIR720 R71
COR71 G6 R_CTL5 COR69
R69 FX3_CTL5
Cap C155 C156 PIU100E2
VSS3 AVSS PIU100B7 I2C-GPIO60_CHARGER-DETECT PIU100D11 PIU1101 A0 WP PIU1107
CTL5 PIU100G6 PIR6902 PIR6901

Cap PIC14601 0.01uF PIC14701 PIC14801 0.01uF PIC14901 PIC15702 PIC15802 PIC15902 PIC160 2 PIC16102 PIC16202 PIC16302 PIC16402 PIC16502 PIC16 02 PIC16702 PIR6802 10K COR72

VIO5
0.01uF PIC15101 Cap PIC15201 0.01uF PIC15301 Cap PIC150 1 Cap Cap L6 2 R72 22 ohms
PIC15402 22uF PIC15 01 Cap PIC15601 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
PIU100L6
D8
VSS4
A1 COC157
C157 COC158
C158 COC159
C159 COC160
C160 COC161
C161 COC162
C162 COC163
C163 COC164
C164 COC165
C165 COC166
C166 COC167
C167 PIR70 2 10K
PIU1102 A1
3 6 1
PIR7102.2K FX3_I2C_SCL K6 R_CTL6 R73COR73 FX3_CTL6
0.1uF PIU100D8 VSS5 U3VSSQ PIU100A1 PIU1103 A2 SCL PIU1106 CTL6 PIU100K6 PIR7302 PIR7301
G11
PIU100G11 VSS6 PIC15701 Cap PIC15801 Cap PIC15901 0.01uF PIC160 1 Cap PIC16101 0.01uFPIC16201 Cap PIC16301 0.01uF PIC16401 Cap PIC16501 0.01uF PIC16 01 Cap PIC16701 0.01uF 5
SDA PIU1105 PIR7201 2.2K FX3_I2C_SDA
COR74
R74
22 ohms
L11 B9 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF F6 FX3_JTAG_TCK H8 R_CTL7 FX3_CTL7
PIU100L11 VSS7 U2AFEVSSQ PIU100B9 TCK PIU100F6 8 4 CTL7 PIU100H8 PIR7402 PIR7401
K4 22 ohms
PIU100K4
VSS8 1.8V_USB PIU1108 VCC VSS PIU1104
R75
COR75
GND L3
PIU100L3 B8 E7 FX3_JTAG_TDI G5 R_CTL8 FX3_CTL8
VSS9 U2PLLVSSQ PIU100B8 TDI PIU100E7
24LC256-I/SN CTL8 PIU100G5 PIR7502 PIR7501
K3 VSS10 22 ohms
PIU100K3 R76
COR76
L2 VSS11 C10 FX3_JTAG_TDO H6 R_CTL9
CTL9 PIU100H6 FX3_CTL9
PIU100L2
A8 GND TDO PIU100C10
GND
PIR7602 PIR7601
22 ohms
PIU100A8 VSS12 R77
COR77
E8 FX3_JTAG_TMS K5 R_CTL10 FX3_CTL10
GND TMS PIU100E8 CTL10 PIU100K5 PIR7702 PIR7701
22 ohms
CYUSB3014-BZXC B11 FX3_JTAG_TRST_N J5 COR78
R_CTL11 R78 FX3_CTL11
TRST_N PIU100B11 CTL11 PIU100J5 PIR7802 PIR7801
22 ohms
GND H5 R_CTL12 COR79
R79
FX3_CTL12
CTL12 PIU100H5 PIR7902 PIR7901
22 ohms
CYUSB3014-BZXC
B i Net Class ClassName: USB_R_Control 1.8V_USB B
G4
L9
COL9 PMODE0 PIU100G4
AVDD I2C boot mode PMODE[2:0]=
1.2V_USB PIL901 PIL902
PIC16802 PIC16901 COC169
MPZ2012S601A C169 H4
PMODE1 PIU100H4 1.8V_USB Z1Z , on failure, USB boot is
600 Ohms C168
COC168 Cap enabled (AN70707 Pag.14) PIR80 1
PIC16801 Cap PIC16902 2.2uF L4 COR80
R80
0.1uF PMODE2 PIU100L4
PIR80 2100k
L8 FX3_INT_CTL
INT_N_CTL15 PIU100L8
FX3_INT_CTL
POFX30INT0CTL S2 COS2
GND
COL10
L10
U3RXVDDQ C5 FX3_RESET 1 3
1.2V_USB PIL1001 PIL1002 RESET_N PIU100C5 PIS201 PIS203
MPZ2012S601A PIC170 2 PIC17 01 COC171
C171 2PIS202 4
PIS204

600 Ohms C170


COC170 Cap TL3301AF160QJ
PIC170 1 Cap
0.1uF
PIC17 02 22uF
JTAG CYUSB3014-BZXC
PIC17202
C172
COC172
PIC17201 Cap
GND

GND U10B 0.1uF


L11
COL11
1.2V_USB U3TXVDDQ S0 - PORT
PIL1101 PIL1102
MPZ2012S601A PIC17302 PIC17401 C174
COC174 GND
600 Ohms COC173
C173 Cap SEC 2/7
Cap i Net Class ClassName: USB_R_DATA
PIC17301 PIC17402 22uF
COR81
R81
0.1uF COP10
P10 K2 R_DQ16
DQ16 PIU100K2 PIR8102 PIR8101
FX3_DQ16
FX3_JTAG_TRST_NPIP1001 22 ohms
1 2 PIP1002 R82
COR82
FX3_JTAG_TCK J4 R_DQ17 FX3_DQ17
3 4 PIP1004 DQ17
GND FX3_JTAG_TMS PIP1003 PIU100J4 PIR8202 PIR8201
22 ohms
PIP1005 5 6 PIP1006 GND R83
COR83
FX3_JTAG_TDI PIP1007 7 8 PIP1008 DQ18 K1 R_DQ18 FX3_DQ18
COL12
L12
CVDDQ FX3_JTAG_TDO
PIU100K1 PIR8302 PIR8301
22 ohms
1.8V_USB PIL1201 PIL1202 PIP1009 9 10 PIP10010 R84
COR84
MPZ2012S601A PIC17502 PIC17602 J2 R_DQ19 FX3_DQ19
1.8V_USB PIP10011 11 12 PIP10012 DQ19 PIU100J2 PIR8402 PIR8401

600 Ohms C175


COC175 C176
COC176 22 ohms
Cap 0.01uF Header 6X2 J3 R_DQ20 COR85
R85 FX3_DQ20
PIC17501 0.1uF
PIC17601 DQ20 PIU100J3 PIR8502 PIR8501
22 ohms
COR86
R86

VIO2
J1 R_DQ21 FX3_DQ21
DQ21 PIU100J1 PIR8602 PIR8601
22 ohms
H2 R_DQ22 R87
COR87 FX3_DQ22
GND DQ22 PIU100H2 PIR8702 PIR8701
22 ohms
H3 R_DQ23 R88
COR88 FX3_DQ23
DQ23 PIU100H3 PIR8802 PIR8801
22 ohms
F4 R_DQ24 R89
COR89 FX3_DQ24
DQ24 PIU100F4 PIR8902 PIR8901
22 ohms
G2 R_DQ25 R90
COR90 FX3_DQ25
DQ25 PIU100G2 PIR9002 PIR9001
22 ohms
G3 R_DQ26 R91
COR91 FX3_DQ26
DQ26 PIU100G3 PIR9102 PIR9101
22 ohms
F3 R_DQ27 COR92
R92 FX3_DQ27
DQ27 PIU100F3 PIR9202 PIR9201
22 ohms
F2
GPIO45 PIU100F2

C CYUSB3014-BZXC C

Interface U10C
S1 - PORT
i Net Class ClassName: USB_R_DATA
SEC 3/7
R93
COR93
F5 R_DQ28 FX3_DQ28
DQ28 PIU100F5 PIR9302 PIR9301
22 ohms
GND E1 R_DQ29 R94
COR94 FX3_DQ29
PCB!!!!! DQ29 PIU100E1 PIR9402 PIR9401

VIO3
22 ohms
Modelos de protector ESD sacados (INFO sacada de: EZ-USB® FX3™/FX3S™ Hardware Design Guidelines and R95
COR95
de la placa SuperSpeed Explorer DQ30 E5 R_DQ30 FX3_DQ30
Schematic Checklist AN70707) PIU100E5 PIR9502 PIR9501
PIC180 2 C180 Kit. R96
COR96
22 ohms
COC180 DQ31
E4 R_DQ31 FX3_DQ31
U10D Cap •The polarity can be swapped on the USB 3.0 differential pair PIU100E4 PIR9602
22 ohms
PIR9601
PIC180 1 •Keep the crystal trace as short as possible. Place the crystal within 2 cm from
U - PORT 0.1uF J6
COJ6 D1 FX3_GPIO50
L13
COL13 FX3. I2S-CLK PIU100D1
VBUS 1 FX3_SPI_SSN
VBUS PIL1301 PIL1302 PIJ601 VBUS • Keep the power traces away from Hi-Speed data and clock lines. SPI_SSN
POSPI0SSN
SEC 4/7 C177
COC177 BLM21PG221SN1D D_N 2 D2 i Net Class ClassName: USB_FPGA_Confing
E11 VBUS CapTX_P EsdSSTX_P EsdSSRX_N D4
1 COD4 10 DIFF_90 SSRX_N D_P
PIJ602 D- •Keep power traces as short as possible. Use larger vias (at least 30-mil pad, I2S-SD PIU100D2

VBUS PIU100E11 220 Ohms 3 D+


PIC17702 PIC17701 DIFF_90 PID401 PID4010
OTG_ID PIJ603 15-mil hole) on power traces. D3 FX3_GPIO52
4
VBUS/ C9 OTG_ID 0.1uF PIJ604 ID •Use split planes on the powerlayer for different power domains. I2S-WS PIU100D3
OTG_ID PIU100C9 EsdSSRX_P 2 9 DIFF_90 SSRX_P 5 FX3_GPIO52
GND GND •The number of layers on the PCB should at least be four. To maintain 90 Ω GPIO52/INTB
Micro USB 3.0 Type B

VBAT
C178
COC178 PID402 PID409
SSTX_N PIJ605
6 POGPIO520INTB
PIJ606 MicB_SSTX- differential impedance, use a solid
CapTX_N EsdSSTX_N 3 8 SSTX_P 7 D4 FX3_SPI_CLOCK
A4 DIFF_90 EsdSSRX_P PIC17802 PIC17801
DIFF_90 GND PID403 PID408 GND PIJ607 MicB_SSTX+ reference power plane. UART-RTS_SPI-SCK PIU100D4

SSRXP PIU100A4 8
A3 DIFF_90 EsdSSRX_N GND PIJ608 GND_DRAIN •At least one immediate plane underneath these AC coupling capacitors should

VIO4
SSRXM PIU100A3 0.1uF EsdSSTX_P 4 7 DIFF_90 SSTX_P SSRX_P 9
MicB_SSRX- UART-CTS_SPI-SSN C1 FX3_SPI_SSN FX3_SPI_CLOCK
PID404 PID407 SSRX_N PIJ609
10
have a cut out in the shape of these capacitors to avoid extra capacitance on the PIU100C1 SPI_CLOCK
POSPI0CLOCK
VBUS A5 DIFF_90 CapTX_P EsdSSTX_N 5 6 SSTX_N
PIJ6010 MicB_SSRX+ lines because of the capacitor pads C2 FX3_SPI_MISO
SSTXP PIU100A5 Para PCB ver pag.17 de DIFF_90 Shield UART-TX_SPI-MISO
A6 DIFF_90 CapTX_N PID405 PID406 PIJ60Shell PIU100C2
SSTXM PIU100A6 AN70707 82401444 Routing:
692622030100 D5 FX3_SPI_MOSI FX3_SPI_MOSI
UART-RX_SPI-MOSI PIU100D5 SPI_MOSI
POSPI0MOSI
C179
COC179
A9 DIFF_90 D_P •Power trace widths should be ≥25 mils to reduce inductance. C4
DP PIU100A9
A10 DIFF_90 D_N i Net Class PIC17902 PIC17901 •Keep the USB signal line impedance at 90 Ω differential (±7%). I2S-MCLK PIU100C4
DM PIU100A10 Swap Rx+ and Rx- to avoid crossing 0.1uF
ClassName: USB 3.0 lines if necesary •Minimize the trace length of USB lines as much as possible (<3 inches).
L14 FX3_GPIO50
VBUS/ COL14 •All data lines, command, and clock lines should be length-matched. GPIO50/DONE
POGPIO500DONE
VBAT PIL1401 PIL1402 •The maximum frequency of the GPIF II interface is 100 MHz. It is recommended
BLM21PG221SN1D that all lines on the GPIF II bus could be length matched within 500 mils
A11
NC PIU100A11 220 Ohms CYUSB3014-BZXC
R98
COR98 Conexiones para bootear FPGA desde FX3_SPI_MISO
GND SPI_MISO
POSPI0MISO
PIR9802 PIR9801
USB 3.0 (documento AN84868 )
C8
R_USB2 PIU100C8 FX3_R_USB2
6.04K
B3 FX3_R_USB3
R_USB3 PIU100B3 R99
COR99 Shield pins on the USB 3.0 receptacle
PIR9902 PIR9901 to ground through an LC circuit for
CYUSB3014-BZXC AC isolation. (AN70707 Pag.23)
200 Ohm
GND

D D

USB2 and USB3 Reference


Resistors (AN70707 Pag.16)

Title
USB 3.0
Size Number Revision
D 1
Date: 05/12/2018 Sheet of 7
File: D:\Tesis\..\USB3.0.SchDoc Drawn By: Omar Lopez

1 2 3 4 5 6 7 8
1 2 3 4 5 6

1V_F
VCCINT
Powe&Decoupling Los datos para las conexiones fueron sacados de UG483
Xilinx(Table 2-2 y Table 2-5) y "7 Series Schematic Review
Recommendations" PIC2301 COC23
C23 PIC1301 C13
COC13 PIC1401 COC14
C14 PIC1501 COC15
C15 PIC1601 COC16
C16 PIC1701 COC17
C17 PIC1801 COC18
C18 PIC1901 COC19
C19 PIC20 1 COC20
C20 PIC210 COC21
C21 PIC2 01 COC22
C22
Config&Boot M[2:0]: Configuration Mode 111=Slave Serial
1V_F Cap Pol3 Cap Cap Cap Cap Cap Cap Cap Cap Cap Cap configuration.
The Xilinx Power Estimator (XPE) tool is used to estimate
PIC2302 330uF PIC1302 4.7uF PIC1402 4.7uF PIC1502 4.7uF PIC1602 4.7uF PIC1702 0.47uF PIC1802 0.47uF PIC1902 0.47uF PIC20 2 0.47uF PIC2102 0.47uF PIC2 02 0.47uF CCLK: Configuration Clock, in Slave Serial
U2G
the current on each power rail. configuration:CCLK must be driven from an
F7 G8
PIU20F7 VCCINT VCCADC_0 PIU20G8
1V_F 1.8V_F 1.8V_F external clock source, which also provides data. U2E
F9 Net Class i
PIU20F9 VCCINT GND VCCBRAM VCCAUX 1.8V_F FPGA_JTAG_TDIPIU20N7
N7
G6 G10 TDI_0
PIU20G6 VCCINT VCCAUX PIU20G10 1.8V_F FPGA_JTAG_TDO N8
H9
PIU20H9 J10 PIU20N8 TDO_0
VCCINT VCCAUX PIU20J10 PIC2401 COC24
C24 PIC2501 COC25
C25 PIC2601 C26
COC26 PIC2701 COC27
C27 COC28 PIC2901
PIC2801 C28 COC29
C29 PIC30 1 COC30 PIC3101 COC31
C30 C31 PIC3201 COC32
C32 PIC3 01 COC33
C33 FPGA_JTAG_TCK L7
J6
PIU20J6 K11 PIU20L7 TCK_0
VCCINT VCCAUX PIU20K11 Cap Cap Cap Cap Cap Cap Cap Cap Cap Cap 1.8V_F 1.8V_F FPGA_JTAG_TMS M7
K9
PIU20K9 VCCINT
L10
VCCAUX PIU20L10 PIC2402 100uF PIC2502 0.47uFPIC2602 0.47uF PIC2702 4.7uF PIC2802 4.7uF PIC2902 4.7uF PIC30 2 0.47uF PIC3102 0.47uF PIC3202 0.47uF PIC3 02 0.47uF
PIR802 PIR902 FPGA_PUDC_B
PIU20M7 TMS_0
L8 COR8
R8
PIU20L8 VCCINT COR9
R9 FPGA_CCLK E8
E10
PIU20E10 1% PIU20E8 CCLK_0
A U2H VCCBRAM 1V_F 1% M0 M9 A
F8 F11 PIR801 200 PIU20M9
M0_0
A1
PIU20A1 J9
PIU20J9
GND PIU20F8
VCCBATT_0 VCCBRAM PIU20F11