Proceeding of 2018 IEEE International Conference on Current Trends toward Converging Technologies, Coimbatore, India

Performance of Three Phase T-Type Multilevel

Inverter with Reduced Switch Count
Chirag L. Solanki
Department of Power Electronics
Lukhdhrji Engineering College
Morbi, Gujarat, India.
solankichirag2@gmail.com
M. H. Ayalani
Department of Power Electronics
Lukhdhrji Engineering College
Morbi, Gujarat, India.
mhayalani@rediffmail.com
S. N. Gohil
Department of Power Electronics
Lukhdhrji Engineering College
Morbi, Gujarat, India.
shaktipower1210@gmail.com

Abstract—This paper propose a three-level T-type
multilevel inverter with the reduced switch count
concept. It is also known as solar inverter. T-type MLI
is use in various applications like solar inverter, motor
drive application, fuel cell converter and etc. The
importance of the Reduced Device Count (RDC)
concept is to reduce the hardware and output is same
as the original one model. Also RDC important in
aspect of the loss regulation as well as the cost
beneficial. The performance of T-type multi-level
inverter (MLI) is studied under different modulation
frequency with resistive (R) load as well as inductive
(RL) load. The different topologies of conventional
inverters are compared.
RDC is the concept in which is number of switches or
diode should be decrease or settle with each other. The
main concept is to manage the number of switch in any
converter topology to ensure that output of voltage and/or
current must be same as in original topology. In this
paper, by implementation of RDC concept, the diodes are
replaced by bidirectional switch(s). Moreover, the same
output is obtained as in the case of T-type MLI[2].
T type MLI offers benefits like reduction in
Electromagnetic interference noise (EMI) and reduction in
switching as well as conduction losses [3]. It has found its
application in various fields like grid connected solar farm
and/or wind farm, motor drive application.

Keywords— Cost Reduces, Efficiency,Multilevel
Inverter, Reduced Device Count, SPWM, Switching
Loss, T-type MLI
I.INTRODUCTION
Conventionally, the two level voltage source inverter is
used in industry and its output voltage is not pure
sinusoidal. When the output of the signal is not sinusoidal
than the affect in perform the operation like Total
Harmonic Distortion (THD). THD is getting low as well
as the output near about to the sinusoidal.With the advent
of technology, the multilevel inverter was developed
which provide benefit of more steps in the output voltage
and thus reaching close to sinusoidal output. With more
advancement in technology of multi-level inverter
topologies, the performance index like Total Harmonic
Distortion(THD), Distortion factor (DF) and lower order
harmonics etc. and hence power quality is improved
significantly[1].
The multi-level inverter topologies included Diode
clamped inverter, flying capacitor inverter and cascaded
H-bridged inverter. But due to some shortcomings of each
individual topologies, the notion of hybrid type multi-
level was evolved[1]. The T-type MLI shows significant
improvement & superior behavior over all individual
inverter topologies.
In the Section II, the conventional T-type MLI
configuration is discussed and RDC concept is proposed
in the same. In the Section III the switching topologies
like pulsed width modulation (PWM), sinusoidal pulsed
width modulation (SPWM), phase disposition pulsed
width modulation (PDPWM) and phase opposition pulsed
width modulation are discussed (POPWM). Section IV
discuss the simulation results for different loading (R and
RL) conditions. Section V provides the conclusion of the
different aspects of proposed topology.
II.T-TYPE MULTI-LEVEL INVERTER
The T type MLI consist of conventional three leg
topology with addition of other three legs clamped
neutrally from each conventional leg as shown in Fig 1.
The switches connected in between clamped neutral &
load is bidirectional switches. The voltage rating of all
switches present between the two phase of source side is
selected same as the voltage rating of source side.
However the voltage rating of switches connected in
between neutral point & load side is taken as half of that
of source voltage.
Basically the three types of the operation which is the
main part of this inverter. When the talking about for
particular one of the leg of the inverter than switch T1
which is used for supply output take positive. When
required negative operation the switch T4 is ON. Switch
T2 and switch T3 which are used with two anti-parallel

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 Proceeding of 2018 IEEE International Conference on Current Trends toward Converging Technologies, Coimbatore, India
diodes are used for the neutral operation in the inverter.
Fig.1 Conventional model of the T-type three phase MLI
Conduction loss and switching loss are the important
factors when the bulk energy is required to be utilized.
Considering the low voltage application, the conduction
loss may be more in the other inverter topologies [4][5].
The equivalent model of the configuration of leg placed
between the clamped neutral & load is as shown in Fig.2.
The switch is replaced with the similar function having
another switch. Two antiparallel switches is replaced by
only one switch and the four anti-parallel diodes are used
for them in modified model.
Fig.2 Equivalent functionable Bi-directional switch
The bi-directional switch, which is replace with its
equivalent functional switch is show like in Fig.2. The
output of functionable Bi-directional switch is as same as
switch using two anti-parallel switches[6][2].
Fig.3 Proposed T-type Multi level inverter
Proposed the T-type MLI is shown in Fig.3 by using the
concept of reduced device count (RDC). Here the one leg
of the inverter has only three switches and four anti-
parallel diodes are needed. Total nine switches and
sixteen anti-parallel diodes are required for the three-
phase. After applying proposed T-type MLI it is noticed
that number of diodes are increasing but the losses in
diodes are less and the cost of diodes are lesser than IGBT
switches [7]. Like loss another important factor is
temperature. The junction temperature is also considered
at industrial level and ever try to make it low for better
convenient operation of the inverters[8][9].
TABLE I: Switching states of 3 level T-type multilevel
inverter for one phase
Basics of switching to One phase output
level T1 T2 T3
+Vdc/2 1 0 0
0 0 1 0
-Vdc/2 0 0 1
III.SWITCHING MODULATION
Switching topology used for triggered the switches by
applying the proper gate signal. It can be done by either
fundamental frequency based switching or high frequency
based switching. As we know that fundamental switching
is also known as lower frequency switching. Here we have
taken time as 2 ms for the On-Off operation for
Fundamental switching operations. Also, sinusoidal pulse
width modulation (SPWM) is used with different
modulation index and some of the relevant methods like
phase disposition and phase opposition pulse width
modulations are used. Simulation performed on SPWM
with carrier frequency as fC= 1000 Hz and the reference is
taken 50 Hz.
Fig.4 POPWM Switching Method
By the use of proposed T-type MLI, represent Phase
Opposition Pulse Width Modulation (POPWM) and
Phase-Disposition Pulse Width Modulation (PDPWM) are
respectively in Fig.4 and Fig.5 respectively. In POPWM,
as shown in Fig.4 that two 1800 phase shifted carrier
(triangular) waves are compared with sinusoidal wave. In
the PDPWM shown in Fig.5 that two carrier waves are in
phase means the phase difference is 00, compared with the
sine wave.
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 Proceeding of 2018 IEEE International Conference on Current Trends toward Converging Technologies, Coimbatore, India

The T-type MLI performed with loads like R and RL,

taken R value as 50 Ω, Fig.6 shows output for line voltage
VRY and phase voltage VR for R load and Fig.7 represents
FFT analysis for R load in fundamental switching method.
With SPWM for the case of R load, the line voltage and
phase voltage is displayed in Fig.8. Fig.9 represents FFT
analysis for SPWM switching. For RL load, R taken as 50
Ω and L as 500 mH. The phase voltage and phase current
are shown in Fig.10.

Fig.5 PDPWM Switching Method

IV.SIMULATIONS AND RESULTS

The T-type inverter is simulated in MATLAB Simulink

Environment to observe line voltage and phase voltage of
load and parameters for inverter are mentioned in TABLE
II.

TABLE II: PARAMETERS FOR INVERTER:

Parameter Name Parameter Value
Input DC Voltage 100 V Fig.6 Waveform with Fundamental switching
Frequency 50 Hz
R – Load 50 Ω
RL – Load 50 Ω , 500 mH
Load or Grid side L 1 mH
Capacitor 2x470 µF
Switching frequency 1 kHz
Source side L 0.05 H
Filter Capacitance C 22 µF

TABLE III represents the output of switching pattern for

Phase-R and Phase-Y. Where the Phase R and Phase Y
rows representing dark colored cell for ON and 0 for OFF
state. Also last row mentioned output of Line Voltage
(VDC), inside that, color cell represent ON and 0 represent
OFF, also dark color cell represent full VDC and light color
cell represent half VDC. Like +VDC represented by dark Fig.7 FFT analysis when the Fundamental switching
color with + sign.

TABLE III: Switching table for the three-phase Condition

in between Phase-R and Phase-Y.

Fig.8 Wave from with SPWM switching

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 Proceeding of 2018 IEEE International Conference on Current Trends toward Converging Technologies, Coimbatore, India
Fig.9 FFT analysis with SPWM switching
Inside Fig.10 we show that the phase current has been
changed mainly in RL load due to the effect of the
inductance.
Fig.10 Phase voltage and current at R=50 Ω & L=500 mH.
While applying the high frequency switching modulation
schemes in the inverter the harmonic orders are move on
the upper side and that’s why it’s required less filter size
and it will eliminate some of the harmonics from the
output. With the help of simple LCL filter, can able to
eliminate the harmonic and result is shown in Fig.11.
Fig.11 waveform using LCL Filter
Fig.12 FFT analysis when LCL filter used
As we noticed that proposed T-type MLI reduces the
number of switches as we have discussed in section II in
Fig.2, that it was reduce switches from six to three.
Proposed T-type MLI compared with three level diode
clamped inverter and show that there are no major
differences in results for output voltages (phase, line),
phase current and FFT analysis. As number of switches are
reduced then the conduction loss as well as switching loss
are also getting reduced.
Performance parameter of the inverter is find with the
quality check like total harmonic distortion, harmonic
factor, and lower order harmonic number percentage and
distortion factor. THD which find with following equation
based solution:
1 ∞ 1 2
𝑇𝐻𝐷 = 𝑉 2 𝑅𝑀𝑆
𝑛 =2,3,... 𝑜𝑛
(1)
𝑉 𝑓 𝑅𝑀𝑆
1
= 𝑉22 + 𝑉32 + 𝑉42 +. . . 1 2
(2)
𝑉 𝑓 𝑅𝑀𝑆
Von RMS = rms value of nth harmonic of output voltage
Vf RMS = rms value of fundamental component.
For good results is mention as well as the THD is possible
low value. As per IEEE standards the THD is under 5%
acceptable.
Harmonic factor is measure of contribution of individual
harmonics. It is defined as the rms voltage of a particular
harmonic component to the rms value of fundamental
component.
𝑉 𝑅𝑀𝑆
𝐻𝐹𝑛 = 𝑛 (3)
𝑉 𝑓 𝑅𝑀𝑆
The lowest order harmonic is defined as the harmonic
component whose frequency is nearest to the
fundamental frequency and its amplitude is greater than or
equal to 3 % of the fundamental component[10].
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 Proceeding of 2018 IEEE International Conference on Current Trends toward Converging Technologies, Coimbatore, India

The distortion factor shows the amount of harmonic TABLE V. represents results for T-type MLI, with filter
distortion that remains in a particular waveform after the and without filter for different modulation index for
harmonic of that waveform have been subjected to a different parameters. All over the performance of T-type
second order attenuation[10]. MLI is better than conventional inverter and also better
than three level diode clamped inverter with respect to the
∞ 1 2 THD and other parameters. Overall performance of T-type
1 𝑉𝑛 𝑅𝑀𝑆 2
𝐷𝐹 = (4) MLI is good and another benefit is that switching loss and
𝑉 𝑓 𝑅𝑀𝑆 𝑛=2,3,... 𝑛2
conduction loss are low.
1 2
1 𝑉2 2 𝑉3 2 𝑉4 2 V.CONCLUSION
𝐷𝐹 = + + +. . . (5)
𝑉 𝑓 𝑅𝑀𝑆 22 32 42

Reduced device count concept make T-Type inverter

Different performance parameters are represented for more compatible with economical cost structure and there
different inverters in TABLE IV. is no effect of reduced device count on output of T-Type
converter. The performance parameter like % low order
TABLE IV: Performance parameter of the Inverters. harmonics and distortion factor are better than that of
Lower diode clamped inverter. Lesser the lower order harmonic,
Line Harmo Order Distorti filter design is easy and convenient.
Types TH
Voltage nic Harmon on
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