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5 4 3 2 1

SYSTEM DC/DC
Project code: 91.4Z901.001 TPS51125 50
PCB P/N : 48.4Z901.011 INPUTS OUTPUTS

Four Peaks (15") Block Diagram


REVISION : -1M 5V_S5(7A)
3D3V_S5(7A)
DCBATOUT
5V_AUX_S5
Crystal 3D3V_AUX_S5
14.318MHz
SYSTEM DC/DC
D
Mobile CPU SMSC TPS51124 51 D
CLK GEN. EMC2102
ICS 9LPRS365 Penryn 37 ezDockII/II+ INPUTS OUTPUTS
3 1D05V_M(16A)
DCBATOUT
1D5V_S3(12A)
4, 5 LCD USB/Express
15 Card/MediaBay/1394*2port RT9026 52
HOST BUS 667/800/1066MHz@1.05V
CRT RJ45/RJ11/PS2*2/Serial
1.5V_S3
DDR_VREF_S3
17 (1.2A)
DDR3 Cantiga SWITCH CRT Port/Parallel
800/1033 12,13
MHz PI5C3257QE Port/CRT/TV/DVI-D/SPDIF/MIC G9131 52
AGTL+ CPU I/F DVI in/Line in/Line out/AC Jack
DDR Memory I/F SWITCH 18 3D3V_S0 2D5V_S0
DVI (300mA)
PS8122QFN48G
DDR3 INTEGRATED GRAHPICS
LVDS, CRT I/F PCIex16 TPS51117 54
800/1033 12,13
MHz 6,7,8,9,10,11 VGA Borad 44,45
DCBATOUT 1D8V_S0
X4 DMI (MXM Connector) (9.4A)
C-Link0 46
400MHz 2nd CHARGER
MS/MS Pro/xD BQ24750 55
Battery
PCI CardBus /MMC/SD 31
5 in 1 INPUTS OUTPUTS
Crystal OZ711MZ030,31
Int MIC 32.768MHz
C PCMCIA CHG_PWR C

40 SLOT 35 DCBATOUT
18V 6.0A

Codec AZALIA ICH9M SPI BIOS


6 PCIe ports (4MB) Crystal SMART CPU DC/DC
ALC268 42 24.576MHz ISL6266A
38 PCI/PCI BRIDGE CARD 35 49
MIC In ACPI 2.0
IEEE1394 INPUTS OUTPUTS
4 SATA 1394x2
40 12 USB 2.0/1.1 ports TSB43AB22A
DCBATOUT
VCC_CORE
ETHERNET (10/100/1000MbE)
25 0~1.3V
Crystal
High Definition Audio 25MHz 38A
LAN TXFM RJ45
OP AMP LPC I/F Giga LAN SWITCH 33 33 GFX DC/DC
40 LAN
APL2057 Serial Peripheral I/F Intel 82567 32 PI3L500ZFEX ISL6263
Matrix Storage Technology(DO)
53
39
INT.SPKR Active Managemnet Technology(DO) New Card PWR SW INPUTS OUTPUTS
1.5W TPS2231 34
34
DCBATOUT
VCC_GFXCORE
40 0~1.3V
19,20,21,22
PCIe 6.5A
Line Out Mini Card 36
(Robson2/3G)
(No-SPDIF)
MODEM Mini Card (WLAN)
C Link1 Kedron a/b/g/n 36
B RJ11 MDC Card B

27 PCB STACKUP
LPC BUS
Parallel-port TOP
Crystal Seria-port
USB
32.768MHz SPI BIOS LPC SuperIO VCC
SATA Mini USB KBC (1MB) PC87383MG
Winbond 42 44 S
HDD SATA Blue Tooth Camera DEBUG
26 WPCE773LA0DG CONN.42 S
24 41
Launch GND
SATA Finger USB Buttom
ODD SATA
16 TPM FIR BOTTOM
Printer 29 4 Port 28 Touch INT. SLB9635TT1D1 44
(Module Bay)
23 Pad 41 KB 41 42 Crystal
32.768MHz
PSx2
USB
MIC in/Line-out/Line-in

A A

Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM
Size Document Number Rev
A2
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 1 of 57
5 4 3 2 1
A B C D E
ICH9M Integrated Pull-up Cantiga chipset and ICH9M I/O controller
ICH9M Functional Strap Definitions page 92 Hub strapping configuration
ICH9 EDS 642879 Rev.1.5 and Pull-down Resistors Montevina Platform Design guide 22339
page 218
0.5
Signal Usage/When Sampled Comment ICH9 EDS 642879 Rev.1.5
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge SIGNAL Resistor Type/Value
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency 000 = FSB1067
offset 224h). This signal has weak internal pull-down Select 011 = FSB667
CL_DATA[1:0] PULL-UP 20K 010 = FSB800
others = Reserved
4 HDA_SYNC PCIE config1 bit0,
Rising Edge of PWROK.
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
CL_RST0# PULL-UP 20K
CFG[4:3] Reserved
4
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG[15:14]
GPIO53 Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) ENERGY_DETECT PULL-UP 20K CFG[18:17]
GPIO20 Reserved This signal should not be pulled high. HDA_BIT_CLK PULL-DOWN 20K
CFG5 DMI x2 Select 0 = DMI x2
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_DOCK_EN#/GPIO33 PULL-UP 20K 1 = DMI x4 (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop CFG6 iTPM Host 0= The iTPM Host Interface is enabled(Note2)
and mobile. HDA_RST# PULL-DOWN 20K Interface 1=The iTPM Host Interface is disalbed(default)
HDA_SDIN[3:0] PULL-DOWN 20K 0 = Transport Layer Security (TLS) cipher
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for CFG7 Intel Management suite with no confidentiality
GNT3#/ Swap Override. all cycles targeting FWH BIOS space). HDA_SDOUT PULL-DOWN 20K engine Crypto strap 1 = TLS cipher suite with
GPIO55 Rising Edge of PWROK. Note: Software will not be able to clear the confidentiality (default)
Top-Swap bit until the system is rebooted HDA_SYNC PULL-DOWN 20K
0 = Reverse Lanes,15->0,14->1 ect..
without GNT3# being pulled down. GLAN_DOCK# The pull-up or pull-down active when configured for native CFG9 PCIE Graphics Lane 1= Normal operation(Default):Lane
GLAN_DOCK# functionality and determined by LAN controller Numbered in order
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K
SPI_CS1#/ Selection 0:1. (Config Registers:Offset 3410h:bit 11:10). 0 = Enable (Note 3)
GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. GPIO[20] PULL-DOWN 20K CFG10 PCIE Loopback enable 1= Disabled (default)
Integrated TPM Enable, Sample low: the Integrated TPM will be disabled. GPIO[49] PULL-UP 20K 00 = Reserve
Rising Edge of CLPWROK Sample high: the MCH TPM enable strap is sampled CFG[13:12] XOR/ALL 10 = XOR mode Enabled
SPI_MOSI low and the TPM Disable bit is clear, the LDA[3:0]#/FHW[3:0]# PULL-UP 20K 01 = ALLZ mode Enabled (Note 3)
Integrated TPM will be enable. 11 = Disabled (default)
LAN_RXD[2:0] PULL-UP 20K
3 DMI Termination Voltage, The signal is required to be low for desktop LDRQ[0] PULL-UP 20K
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default) 3
Rising Edge of PWROK. applications and required to be high for
GPIO49 mobile applications. LDRQ[1]/GPIO23 PULL-UP 20K 0 = Normal operation(Default):
CFG19 DMI Lane Reversal Lane Numbered in Order
PME# PULL-UP 20K
1 = Reverse Lanes
PCI Express Lane Signal has weak internal pull-up. Sets bit 27 PWRBTN# PULL-UP 20K DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) DMI x2 mode[MCH -> ICH]:(3->0,2->1)
of PWROK. SATALED# PULL-UP 15K
SPKR No Reboot. If sampled high, the system is strapped to the SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K Digital Display Port 0 = Only Digital Display Port
Rising Edge of PWROK. "No Reboot" mode(ICH9 will disable the TCO Timer (SDVO/DP/iHDMI) or PCIE is operational (Default)
system reboot feature). The status is readable SPI_MOSI PULL-DOWN 20K CFG20 Concurrent with PCIe 1 =Digital display Port and PCIe are
via the NO REBOOT bit. operting simulataneously via the PEG port
SPI_MISO PULL-UP 20K
0 =No SDVO Card Present (Default)
TP3 XOR Chain Entrance. This signal should not be pull low unless using SPKR PULL-DOWN 20K SDVO_CTRLDATA SDVO Present
Rising Edge of PWROK. XOR Chain testing. 1 = SDVO Card Present
TACH_[3:0] PULL-UP 20K
0 = LFP Disabled (Default)
GPIO33/ Flash Descriptor Sampled low:the Flash Descriptor Security will be TP[3] PULL-UP 20K Local Flat Panel
HDA_DOCK Security Override Strap overridden. If high,the security measures will be L_DDC_DATA (LFP) Present 1= LFP Card Present; PCIE disabled
_EN# Rising Edge of PWROK in effect.This should only be enabled in manufacturing USB[11:0][P,N] PULL-DOWN 15K
environments using an external pull-up resister. NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
2 Flash-decriptor section of the Firmware. This 'Soft-Strap' is 2
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

SMBus
SMBC_G792 Thermal

MXM
KBC
BAT_SCL
BATTERY
page 17
USB Table
PCI Routing USB
IDSEL INT REQ GNT Pair Device
G:CARDBUS 0 0 0 NC
TI7412 AD22 B:1394
F:Flash Media 1 NC
G:SD Host 2 USB2
SMB_CLK
3 USB4 LAN
1 ICH9M
Four Peaks
1
4 USB3
PCIE Routing 5 BLUETOOTH Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LANE1 LAN BCM5787M 6 WEBCAM Taipei Hsien 221, Taiwan, R.O.C.

LANE2 MiniCard WLAN 7 FT Title


SMBC_ICH CK505
LANE3 NewCard WLAN 8 MINICARD Reference
Size Document Number Rev
9 NEW1 DDR A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 2 of 57
A B C D E

1D05V_M -1
1 R293 2 3D3V_M -1 3D3V_M
3D3V_M 0R0603-PAD
-1 3D3V_CLKGEN_S0 1 R294 2
1 R240 2 3D3V_48MPWR_S0 3D3V_CLKPLL_S0 2 R295 1 0R0603-PAD

1
SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
0R0603-PAD 0R3-0-U-GP C310 C294 C278 C279 C309 C288

1
SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C271 C272 C303 C285 C301 C304 C308 C295 C297 DY

SC4D7U6D3V3KX-GP

SC1U16V3ZY-GP
DY

2
2

2
4 4

3D3V_48MPWR_S0
3D3V_CLKGEN_S0 3D3V_CLKPLL_S0

16

46
62
23

19
27
43
52
33
56
4

9
U29

VDDPCI
VDDREF
VDD48

VDDPLL3

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDSRC
VDDCPU
CL=20pF±0.2pF CPUT0 61 CLK_CPU_BCLK 4
C276 60 CLK_CPU_BCLK# 4
SC27P50V2JN-2-GP CPUC0
1 2 GEN_XTAL_IN R270 2 DY 1 10MR2J-L-GP GEN_XTAL_OUT 3 58 CLK_MCH_BCLK 6
X1 CPUT1_F
1 R263 2 2 X2 CPUC1_F 57 CLK_MCH_BCLK# 6

1
X5 0R0402-PAD-1(5/9)
CPUT2_ITP/SRCT8 54
X-14D31818M-44GP 53
C275 R274 2 CPUC2_ITP/SRCC8
2 20 CLK48_ICH 1 33R2J-2-GP CLK48 17 USB_48MHZ/FSLA
1 2 GEN_XTAL_OUT_R 4,7 CPU_SEL0 R273 2 1 2K2R2J-2-GP
SRCT7/CR#_F 51 CLK_PCIE_NEW 34
SC27P50V2JN-2-GP 50 CLK_PCIE_NEW# 34
3D3V_M SRCC7/CR#_E
20 PM_STPPCI# 45 PCI_STOP#
20 PM_STPCPU# 44 CPU_STOP# SRCT6 48 CLK_PCIE_ICH 20
SRCC6 47 CLK_PCIE_ICH# 20
2

SC22P50V2JN-4GP
CLK_PCIE_PEG_1 2 RN23

SC20P50V2JN-1GP
DY DY DY SRCT10 41 3 CLK_PCIE_PEG 46
3
12,13,22 SMBC_ICH 7 42 CLK_PCIE_PEG_1# 1 4 SRN0J-6-GP CLK_PCIE_PEG# 46
3
R607 R606 R248 R605 SCLK SRCC10
DY 12,13,22 SMBD_ICH 6 SDATA DIS
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP -1M(6/25) 3D3V_M SRCT11/CR#_H 40 CLK_PCIE_DOCK 44
20 CLK_PWRGD 63 39 CLK_PCIE_DOCK# 44
1

CK_PWRGD/PD# SRCC11/CR#_G

C679
PCLKCLK2 C678 10KR2J-3-GP 2 DY 1 37 CLK_PCIE_MINI2 36
PCLKCLK3 R278 SRCT9
38 CLK_PCIE_MINI2# 36
2

1
PCLKCLK4 R267 2 SRCC9
44 PCLK_SIO 1 22R2J-2-GP PCLKCLK0 8 PCI0/CR#_A
PCLKCLK5 31 PCLK_O2 R250 2 1 22R2J-2-GP PCLKCLK1 10 34 CLK_PCIE_MINI1 36
PCLKCLK2 PCI1/CR#_B SRCT4
11 PCI2/TME SRCC4 35 CLK_PCIE_MINI1# 36
-1M(6/25) PCLKCLK3 12 PCI3
2

DY 41 PCLK_KBC R247 2 1 22R2J-2-GP PCLKCLK4 13 31 CLK_MCH_3GPLL 7


PCI4/27_SELECT SRCT3/CR#_C
1

R266 20 PCLK_ICH R246 2 1 33R2J-2-GP PCLKCLK5 14 32 CLK_MCH_3GPLL# 7


1 PCI_F5/ITP_EN SRCC3/CR#_D
SC22P50V2JN-4GP

C680

C681
R264 R265 R610
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP DY SC20P50V2JN-1GP
2

SC20P50V2JN-1GP DY 28 CLK_PCIE_SATA 19
1

SRCT2/SATAT
SRCC2/SATAC 29 CLK_PCIE_SATA# 19
4,7 CPU_SEL1 64 FSLB/TEST_MODE
4,7 CPU_SEL2 R2682 1 10KR2J-3-GP CPU_SEL2_R 5 UMA
RN47 REF0/FSLC/TEST_SEL DREFSSCLK_1 2
27MHZ_NONSS/SRCT1/SE1 24 3 RN21 DREFSSCLK 7
25 PCLK_PCM_TI 2 1 20 CLK_ICH14 2 3 55 25 DREFSSCLK_1# 1 4 SRN0J-6-GP DREFSSCLK# 7
NC#55 27MHZ_SS/SRCC1/SE2
1

1 4
C676 R249 33R2J-2-GP 20 DREFCLK_1 4 1 RN20

GNDSRC
GNDSRC
GNDSRC
GNDCPU
44 PCLK_SIO_1 DREFCLK 7

GNDREF
SRCT0/DOTT_96

GNDPCI
DY PCLKCLK2 SRN33J-5-GP-U 21 DREFCLK_1# 3 2 SRN0J-6-GP

GND48
DREFCLK# 7
2

SRCC0/DOTC_96
-1 UMA

GND

GND

GND
SC20P50V2JN-1GP
1

C683
SC20P50V2JN-1GP

30 PCLK_PCM_O2 2 1
1

SC18P50V2JN-1-GP
C682

ICS9LPRS365BKLFT-GP-U 3D3V_S0

18
15
1

22
30
36
49
59
26

65
C677 R424 22R2J-2-GP DY DY 71.09365.A03
2

2 2
DY -1M(6/25)
2

4
3
2
1
SC20P50V2JN-1GP
2nd = 71.00875.C03 RN93
SRN10KJ-6-GP
ICS9LPRS365YGLFT setting table
PIN NAME DESCRIPTION -1(5/14)
R238

5
6
7
8
42 PCLK_TPM 2 1 PCLKCLK3 RN94
Byte 5, bit 7 22R2J-2-GP 20 SATACLKREQ# 1 8 PCLKCLK0
1

0 = PCI0 enabled (default) C675 PCLKCLK1


SC20P50V2JN-1GP

7 CLK_MCH_OE# 2 7
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair TPAD30 TP198 3 6 CLK_PCIE_DOCK
PCI0/CR#_A Byte 5, bit 6 4 5 CLK_PCIE_DOCK#
46 MXM_CLKREQ# SEL2 SEL1 SEL0
2

0 = CR#_A controls SRC0 pair (default),


1= CR#_A controls SRC2 pair SRN470J-3-GP CPU FSB
FSC FSB FSA
Byte 5, bit 5
0 = PCI1 enabled (default) PIN NAME DESCRIPTION 100M X
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair 1 0 1
PCI1/CR#_B Byte 5, bit 4 Byte 5, bit 1
133M 533M
0 = CR#_B controls SRC1 pair (default) 0 = SRC3 enabled (default) 0 0 1
1= CR#_B controls SRC4 pair 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
SRCC3/CR#_D Byte 5, bit 0 0 1 1 166M 667M
0 = Overclocking of CPU and SRC Allowed 0 = CR#_D controls SRC1 pair (default)
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed 1= CR#_D controls SRC4 pair 0 1 0 200M 800M
Byte 6, bit 7 0 0 0 266M 1067M
PCI3 0 = SRC7# enabled (default)
SRCC7/CR#_E 1= CR#_F controls SRC6
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1
PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# Byte 6, bit 6
Four Peaks 1

0 = SRC7 enabled (default)


0 =SRC8/SRC8# SRCT7/CR#_F
PCI_F5/ITP_EN 1 = ITP/ITP#
1= CR#_F controls SRC8
Wistron Corporation
Byte 6, bit 5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Byte 5, bit 3 0 = SRC11# enabled (default) Taipei Hsien 221, Taiwan, R.O.C.
0 = SRC3 enabled (default) SRCC11/CR#_G 1= CR#_G controls SRC9
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Title
SRCT3/CR#_C Byte 5, bit 2 Byte 6, bit 4
Clock Generator
0 = CR#_C controls SRC0 pair (default), 0 = SRC11 enabled (default)
1= CR#_C controls SRC2 pair SRCT11/CR#_H 1= CR#_H controls SRC10 Size Document Number Rev
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 3 of 57
A B C D E
A B C D E

H_A#[35..3]
6 H_A#[35..3]
H_DINV#[3..0]
H_DINV#[3..0] 6
CPU1A 1 OF 4 TP53 TPAD30 H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
H_A#3 J4 H1 1D05V_S0 H_DSTBP#[3..0]
A3# ADS# H_ADS# 6 H_DSTBP#[3..0] 6
H_A#4 L5 E2 H_BNR# 6
H_A#5 A4# BNR# H_D#[63..0]
4 L4 A5# BPRI# G5 H_BPRI# 6 H_D#[63..0] 6 4

ADDR GROUP 0
H_A#6 K5 A6#

1
H_A#7 M3 H5 H_DEFER# 6
H_A#8 A7# DEFER# R127 Place testpoint on
N2 F21

CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 56R2J-4-GP H_IERR# with a GND
A9# DBSY# H_DBSY# 6
H_A#10 N3 0.1" away
H_A#11 A10#
P5 F1 H_BREQ#0 6

2
H_A#12 A11# BR0#
P2 A12#
H_A#13 L2 D20 H_IERR#
H_A#14 A13# IERR#
P4 A14# INIT# B3 H_INIT# 19
H_A#15 P1
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 CPU1B 2 OF 4
6 H_ADSTB#0 ADSTB0# H_CPURST# 6
6 H_REQ#[4..0] RESET# C1 H_RS#[2..0] 6
H_REQ#0 K3 F3 H_RS#0 H_D#0 E22 Y22 H_D#32
H_REQ#1 H2 REQ0# RS0# H_RS#1 H_D#1 D0# D32# H_D#33
REQ1# RS1# F4 F24 D1# D33# AB24
H_REQ#2 K2 G3 H_RS#2 H_D#2 E26 V24 H_D#34
H_REQ#3 J3 REQ2# RS2# H_D#3 D2# D34# H_D#35
REQ3# TRDY# G2 H_TRDY# 6 G22 D3# D35# V26
H_REQ#4 L1 H_D#4 F23 V23 H_D#36
REQ4# D4# D36#

DATA GRP0
DATA GRP2
G6 H_HIT# 6 H_THERMDA H_D#5 G25 T22 H_D#37
H_A#17 HIT# H_D#6 D5# D37# H_D#38
Y2 A17# HITM# E4 H_HITM# 6 E25 D6# D38# U25

1
H_A#18 U5 H_D#7 E23 U23 H_D#39
H_A#19 A18# XDP_BPM#0 TP19 TPAD30 C494 H_D#8 D7# D39# H_D#40
R3 A19# BPM0# AD4 K24 D8# D40# Y25
H_A#20 W6 XDP/ITP SIGNALS AD3 XDP_BPM#1 TP24 TPAD30 SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41

2
A20# BPM1# D9# D41#
ADDR GROUP 1

H_A#21 U4 AD1 XDP_BPM#2 TP16 TPAD30 H_THERMDC DY H_D#10 J24 Y23 H_D#42
H_A#22 A21# BPM2# XDP_BPM#3 TP25 TPAD30 H_D#11 D10# D42# H_D#43
Y5 A22# BPM3# AC4 J23 D11# D43# W24
H_A#23 U1 AC2 XDP_BPM#4 TP23 TPAD30 H_D#12 H22 W25 H_D#44
H_A#24 A23# PRDY# XDP_BPM#5 TP22 TPAD30 H_D#13 D12# D44# H_D#45
R4 A24# PREQ# AC1 F26 D13# D45# AA23
H_A#25 T5 AC5 XDP_TCK TP26 TPAD30 H_D#14 K22 AA24 H_D#46
3 H_A#26 A25# TCK XDP_TDI TP32 TPAD30 1D05V_S0 H_D#15 D14# D46# H_D#47 3
T3 A26# TDI AA6 H23 D15# D47# AB25
H_A#27 W2 AB3 XDP_TDO TP29 TPAD30 J26 Y26 H_DSTBN#2 6
A27# TDO 6 H_DSTBN#0 DSTBN0# DSTBN2#
H_A#28 W5 AB5 XDP_TMS TP30 TPAD30 H26 AA26 H_DSTBP#2 6
A28# TMS 6 H_DSTBP#0 DSTBP0# DSTBP2#
H_A#29 Y4 AB6 XDP_TRST# TP31 TPAD30 H25 U22 H_DINV#2 6
A29# TRST# 6 H_DINV#0 DINV0# DINV2#

1
H_A#30 U2 C20 XDP_DBRESET# TP72 TPAD30
H_A#31 A30# DBR# R121
V4 A31#
H_A#32 W3 68R2-GP H_D#16 N22 AE24 H_D#48
H_A#33 A32# H_D#17 K25 D16# D48# H_D#49
AA4 A33# THERMAL D17# D49# AD24
H_A#34 AB2 H_D#18 P26 AA21 H_D#50

2
H_A#35 A34# CPU_PROCHOT#_1 D18# D50#
AA3 A35# PROCHOT# D21 1 R28 2 CPU_PROCHOT#_R 49 H_D#19 R23
D19# D51# AB22 H_D#51
V1 A24 H_THERMDA 37 0R2J-2-GP H_D#20 L23 AB21 H_D#52
6 H_ADSTB#1 ADSTB1# THRMDA D20# D52#
B25 H_THERMDC 37 H_D#21 M24 AC26 H_D#53
THRMDC DY D21# D53#

DATA GRP1
DATA GRP3
H_D#22 L22 H_D#54
19 H_A20M# A6
A5
A20M#
C7 1 R495 2
-1 H_D#23 M23 D22# D54# AD20
AE22 H_D#55
19 H_FERR# FERR# THERMTRIP# PM_THRMTRIP-A# 7,19,47 D23# D55#
ICH

0R0402-PAD H_D#24 P25 H_D#56


19 H_IGNNE# -1 C4 IGNNE# PM_THRMTRIP# should connect to H_D#25 P23 D24# D56# AF23
AC25 H_D#57
ICH9 and MCH without T-ing D25# D57#
19 H_STPCLK# 1 R128 2H_STPCLK#_RD5 STPCLK#
H_D#26 P22
D26# D58# AE21 H_D#58
0R0402-PAD C6 HCLK A22 PH @ page48 H_D#27 T24 AD21 H_D#59
19 H_INTR LINT0 BCLK0 CLK_CPU_BCLK 3 D27# D59#
19 H_NMI B4 A21 CLK_CPU_BCLK# 3 H_D#28 R24 AC22 H_D#60
LINT1 BCLK1 H_D#29 L25 D28# D60# H_D#61
19 H_SMI# A3 SMI# D29# D61# AD23
1D05V_S0 H_D#30 T25 AF22 H_D#62
H_D#31 N25 D30# D62# H_D#63
M4 RSVD#M4 D31# D63# AC23

2
N5 RSVD#N5 6 H_DSTBN#1 L26 DSTBN1# DSTBN3# AE25 H_DSTBN#3 6
T2 M26 AF24 H_DSTBP#3 6
RESERVED

RSVD#T2 Layout Note: 6 H_DSTBP#1 DSTBP1# DSTBP3#


V3 1KR2F-3-GP N24 AC20 H_DINV#3 6
RSVD#V3 "CPU_GTLREF0" 6 H_DINV#1 DINV1# DINV3#
B2 R100
RSVD#B2 0.5" max length. CPU_GTLREF0 COMP0 R4671 27D4R2F-L1-GP
C3 AD26 R26 2

1 1
RSVD#C3 TEST1 GTLREF COMP0 COMP1 R4611 54D9R2F-L1-GP
D2 RSVD#D2 C23 TEST1 MISC COMP1 U26 2

1
SC1KP50V2KX-1GP
D22 DY TEST2 D25 AA1 COMP2 R96 1 2 27D4R2F-L1-GP
2 RSVD#D22 R90 C82 TPAD30 TP69 RSVD_CPU_12 C24 TEST2 COMP2 COMP3 R97 1 54D9R2F-L1-GP 2
D3 RSVD#D3 TEST3 COMP3 Y1 2
F6 2KR2F-3-GP TEST4 AF26

2
RSVD#F6 TPAD30 TP9 RSVD_CPU_13 AF1 TEST4
TEST5 DPRSTP# E5 H_DPRSTP# 7,19,49
TPAD30 TP74 RSVD_CPU_11 B1 TPAD30 TP79 RSVD_CPU_14 A26 B5 H_DPSLP# 19

2
KEY_NC TEST6 DPSLP#
DPWR# D24 H_DPWR# 6
BGA479-SKT6-GPU7 3,7 CPU_SEL0 B22 D6 H_PWRGD 19,47
BSEL0 PWRGOOD
62.10079.001 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 PSI# 49
2nd: 62.10053.401
-1(5/14) BGA479-SKT6-GPU7
1D05V_S0

Layout Note:
RN96 1 DY 2 TEST1 Comp0, 2 connect with Zo=27.4 ohm, make
XDP_TDI 1 4 R129 1KR2J-1-GP trace length shorter than 0.5" .
XDP_TMS 2 3 Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
1 DY 2 TEST2 trace length shorter than 0.5" .
SRN56J-4-GP R130 1KR2J-1-GP make sure "TEST4" routing is
C443
XDP_BPM#5 R89 1 DY 2 54D9R2F-L1-GP reference to GND and away other
2DY 1 TEST4
SCD1U10V2KX-4GP noisy signals

1
H_DPRSTP# TP66 TPAD30 Four Peaks 1
H_DPSLP# TP76 TPAD30
H_DPWR# TP94 TPAD30
RN95 -1(5/9) H_PWRGD TP105 TPAD30
XDP_TCK 1 4 H_CPUSLP# TP92 TPAD30 Wistron Corporation
XDP_TRST# 2 3 H_INIT# TP187 TPAD30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
H_CPURST# TP71 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
SRN56J-4-GP
All place within 2" to CPU Place these TP on button-side, Title

easy to measure. CPU (1 of 2)


Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 4 of 57
A B C D E
A B C D E

VCC_CORE
CPU1D 4 OF 4
VCC_CORE VCC_CORE
4 A4 VSS VSS P6 4
CPU1C 3 OF 4 A8 P21
VSS VSS
A11 VSS VSS P24

1
A7 AB20 C481 C477 C476 C482 A14 R2
VCC VCC VSS VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
A9 VCC VCC AB7 DY A16 VSS VSS R5
A10 AC7 A19 R22

2
VCC VCC TP10 VSS VSS
A12 VCC VCC AC9 A23 VSS VSS R25
A13 VCC VCC AC12 AF2 VSS VSS T1
A15 AC13 TPAD30 B6 T4
VCC VCC VSS VSS
A17 VCC VCC AC15 B8 VSS VSS T23
A18 VCC VCC AC17 B11 VSS VSS T26
A20 VCC VCC AC18 B13 VSS VSS U3
B7 VCC VCC AD7 B16 VSS VSS U6
B9 VCC VCC AD9 B19 VSS VSS U21
B10 VCC VCC AD10 B21 VSS VSS U24
B12 VCC VCC AD12 B24 VSS VSS V2
B14 VCC VCC AD14 C5 VSS VSS V5
B15 AD15 VCC_CORE C8 V22
VCC VCC VSS VSS
B17 VCC VCC AD17 C11 VSS VSS V25
B18 VCC VCC AD18 C14 VSS VSS W1
B20 VCC VCC AE9 DY DY DY DY DY C16 VSS VSS W4

1
C9 AE10 C480 C123 C125 C479 C67 C76 C77 C70 C473 C124 C472 C485 C484 C102 C101 C19 W23
VCC VCC VSS VSS
C10 VCC VCC AE12 C2 VSS VSS W26

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
C12 AE13 C22 Y3

2
VCC VCC VSS VSS
C13 VCC VCC AE15 C25 VSS VSS Y6
C15 VCC VCC AE17 D1 VSS VSS Y21
C17 VCC VCC AE18 D4 VSS VSS Y24
C18 VCC VCC AE20 D8 VSS VSS AA2
D9 VCC VCC AF9 D11 VSS VSS AA5
3 D10 AF10 D13 AA8 3
VCC VCC VSS VSS
D12 VCC VCC AF12 D16 VSS VSS AA11
D14 VCC VCC AF14 D19 VSS VSS AA14
D15 AF15 G26 D23 AA16
VCC VCC VSS VSS
D17 VCC VCC AF17 1 2 D26 VSS VSS AA19
D18 VCC VCC AF18 E3 VSS VSS AA22
E7 AF20 GAP-CLOSE-PWR 1D05V_S0 E6 AA25
VCC VCC G22 VSS VSS
E9 VCC E8 VSS VSS AB1
E10 VCC VCCP G21 1 2 E11 VSS VSS AB4
E12 VCC VCCP V6 E14 VSS VSS AB8
E13 J6 GAP-CLOSE-PWR E16 AB11
VCC VCCP VSS VSS
1

E15 K6 TC11 E19 AB13


VCC VCCP ST220U6D3VDM-20GP VSS VSS
E17 VCC VCCP M6 E21 VSS VSS AB16
E18 J21 C117 C94 2nd = 80.22715.39L E24 AB19
2

VCC VCCP VSS VSS


1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

E20 VCC VCCP K21 F5 VSS VSS AB23


F7 VCC VCCP M21 F8 VSS VSS AB26
F9 N21 1D05V_S0 F11 AC3
2

VCC VCCP VSS VSS


F10 VCC VCCP N6 layout note: "1D5V_VCCA_S0" F13 VSS VSS AC6
F12 VCC VCCP R21 as short as possible F16 VSS VSS AC8
F14 VCC VCCP R6 F19 VSS VSS AC11
F15 VCC VCCP T21 DY DY F2 VSS VSS AC14
F17 VCC VCCP T6 F22 VSS VSS AC16

1
F18 V21 1D5V_S0 C115 C107 C98 C108 C99 C104 F25 AC19
VCC VCCP 1D5V_VCCA_S0 VSS VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
F20 VCC VCCP W21 L5 G4 VSS VSS AC21
AA7 G1 AC24

2
VCC VSS VSS
AA9 VCC VCCA B26 1 2 G23 VSS VSS AD2
AA10 C26 HCB1608KF121T30-GP G26 AD5
VCC VCCA VSS VSS
1

AA12 H_VID[6..0] 49 C121 C12668.00230.041 H3 AD8


VCC VSS VSS
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP

AA13 AD6 H_VID0 H6 AD11


2 VCC VID0 H_VID1 VCC_CORE VSS VSS 2
AA15 AF5 H21 AD13
2

VCC VID1 H_VID2 VSS VSS


AA17 VCC VID2 AE5 H24 VSS VSS AD16
AA18 AF4 H_VID3 J2 AD19
VCC VID3 VSS VSS
1

AA20 AE3 H_VID4 J5 AD22


VCC VID4 H_VID5 R79 VSS VSS
AB9 VCC VID5 AF3 J22 VSS VSS AD25
AC10 AE2 H_VID6 100R2F-L1-GP-U J25 AE1 TP15
VCC VID6 VSS VSS TPAD30
AB10 VCC K1 VSS VSS AE4
AB12 K4 AE8
2

VCC VSS VSS


AB14 VCC VCCSENSE AF7 VCC_SENSE 49 K23 VSS VSS AE11
AB15 VCC K26 VSS VSS AE14
AB17 VCC L3 VSS VSS AE16
AB18 VCC VSSSENSE AE7 VSS_SENSE 49 L6 VSS VSS AE19
L21 AE23 TPAD30
VSS VSS
1

Layout Note: L24 AE26 TP17


R73 VSS VSS
M2 VSS VSS A2
BGA479-SKT6-GPU7 100R2F-L1-GP-U VCCSENSE and VSSSENSE lines M5 AF6 TP75
should be of equal length. VSS VSS TPAD30
M22 VSS VSS AF8
M25 AF11
2

VSS VSS
N1 VSS VSS AF13
Layout Note: N4 AF16
Provide a test point (with VSS VSS
N23 VSS VSS AF19
no stub) to connect a N26 AF21 TP78
differential probe VSS VSS TPAD30
P3 VSS VSS A25
between VCCSENSE and AF25 TP13
VSSSENSE at the location VSS TPAD30
where the two 54.9ohm
resistors terminate the BGA479-SKT6-GPU7
55 ohm transmission line.
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (2 of 2)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 5 of 57
A B C D E
5 4 3 2 1

NB1A 1 OF 10
H_A#[35..3]
H_A#[35..3] 4
H_D#[63..0] A14 H_A#3
4 H_D#[63..0] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G8 H_D#_1 H_A#_5 F16
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
H_D#4 G2 M16 H_A#8
1D05V_S0 H_D#5 H_D#_4 H_A#_8 H_A#9
D H_SWING routing Trace width and H6 H_D#_5 H_A#_9 J13 D
H_D#6 H2 P16 H_A#10
Spacing use 10 / 20 mil H_D#_6 H_A#_10

1
H_D#7 F6 R16 H_A#11
R153 H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
221R2F-2-GP H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
H_SWING Resistors and M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15

2
Capacitors close MCH H_D#12 J1
H_D#_11 H_A#_15
F17 H_A#16
H_SWING H_D#13 H_D#_12 H_A#_16 H_A#17
500 mil ( MAX ) J2 H_D#_13 H_A#_17 G20
H_D#14 N12 B19 H_A#18
H_D#_14 H_A#_18

1
SCD1U10V2KX-4GP
H_D#15 J6 J16 H_A#19
H_D#_15 H_A#_19
1

C158
R147 H_D#16 P2 E20 H_A#20
100R2F-L1-GP-U H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H_D#_17 H_A#_21 H16
H_D#18 R2 J20 H_A#22
2

H_D#19 H_D#_18 H_A#_22 H_A#23


N9 L17

2
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3 H_D#_32
H_D#33 AD14 H12 H_ADS# 4
C H_D#34 H_D#_33 H_ADS# C
Y6 H_D#_34 H_ADSTB#_0 B16 H_ADSTB#0 4
H_D#35 Y10 G17 H_ADSTB#1 4
H_D#36 H_D#_35 H_ADSTB#_1
Y12 H_D#_36 H_BNR# A9 H_BNR# 4
H_D#37 Y14 F11 H_BPRI# 4
H_D#38 H_D#_37 H_BPRI#
Y7 G12

HOST
H_D#_38 H_BREQ# H_BREQ#0 4
H_D#39 W2 E9 H_DEFER# 4
H_D#40 H_D#_39 H_DEFER#
AA8 H_D#_40 H_DBSY# B10 H_DBSY# 4
H_D#41 Y9 AH7 CLK_MCH_BCLK 3
H_D#42 H_D#_41 HPLL_CLK
AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# 3
H_D#43 AA9 J11 H_DPWR# 4
H_D#44 H_D#_43 H_DPWR#
AA11 H_D#_44 H_DRDY# F9 H_DRDY# 4
H_RCOMP routing Trace width and H_D#45 AD11 H9 H_HIT# 4
H_D#46 H_D#_45 H_HIT#
AD10 E12 H_HITM# 4
Spacing use 10 / 20 mil H_D#47 AD13
H_D#_46 H_HITM#
H11 H_LOCK# 4
H_D#48 H_D#_47 H_LOCK#
AE12 H_D#_48 H_TRDY# C9 H_TRDY# 4
H_D#49 AE9 H_D#_49
1 2 H_RCOMP H_D#50 AA2 H_D#_50
R144 24D9R2F-L-GP H_D#51 AD8
H_D#52 H_D#_51 H_DINV#[3..0]
AA3 H_D#_52 H_DINV#[3..0] 4
H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 H_D#_54 H_DINV#_1 L3
H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#57
AF3
AC1
H_D#_56 H_DINV#_3 Y1
H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0] 4
H_D#58 AE3 L10 H_DSTBN#0
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
H_D#60 AE11 AA5 H_DSTBN#2
H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 H_D#_61 H_DSTBN#_3 AE6
H_D#62 AG2 H_DSTBP#[3..0]
B H_D#_62 H_DSTBP#[3..0] 4 B
H_D#63 AD6 L9 H_DSTBP#0
H_D#_63 H_DSTBP#_0 H_DSTBP#1
H_DSTBP#_1 M8
AA6 H_DSTBP#2
H_DSTBP#_2 H_DSTBP#3
H_DSTBP#_3 AE5
H_REQ#[4..0] 4
1D05V_S0 B15 H_REQ#0
H_SWING H_REQ#_0 H_REQ#1
C5 H_SWING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2
2

B13 H_REQ#3
R152 H_REQ#_3 H_REQ#4
4 H_CPURST# C12 H_CPURST# H_REQ#_4 B14
1KR2F-3-GP E11
4 H_CPUSLP# H_CPUSLP# H_RS#[2..0] 4
B6 H_RS#0
H_RS#_0 H_RS#1
F12
1

H_AVREF H_RS#_1 H_RS#2


A11 H_AVREF H_RS#_2 C8
B11 H_DVREF
SCD1U16V2ZY-2GP
1

C161 CANTIGA-GM-GP-U-NF
R150 71.CNTIG.00U
2KR2F-3-GP
2
2

A Four Peaks A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (1 of 6)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 6 of 57
5 4 3 2 1
5 4 3 2 1

Strap Pin Table


CFG[2:0] FSB Freq select 000 = FSB 1067MHz 011 = FSB 667MHz
010 = FSB 800MHz Others = Reserved NB1B 2 OF 10
NB1C 3 OF 10 1D05V_S0
CFG4:3; 8; 11; 14:15; 17; 18 Reserved M36

DDR CLK/ CONTROL/COMPENSATION


RESERVED#M36
CFG5 (DMI select) Low = DMI x 2
N36
R33
RESERVED#N36
RESERVED#R33
SA_CK_0
SA_CK_1
AP24
AT21
M_CLK_DDR0 12
M_CLK_DDR1 12
15
41
L_BKLTCTL
GMCH_BL_ON
L32
G32
L_BKLT_CTRL
L_BKLT_EN PEG_COMPI T37 PEG_CMP 2 1
Close to GMCH as 500 mils.
High = DMI x 4 * T33 AV24 M_CLK_DDR2 13 LCTLA_CLK M32 T36 R204 49D9R2F-GP
RESERVED#T33 SB_CK_0 L_CTRL_CLK PEG_COMPO
AH9 RESERVED#AH9 SB_CK_1 AU20 M_CLK_DDR3 13
CFG6 (ITPM Host Interface) High = The ITPM Host Interface is disabled AH10 LCTLB_DATA M33 PEG_RXN[15..0] 46
RESERVED#AH10 CLK_DDC_EDID L_CTRL_DATA PEG_RXN0
Low = The ITPM Host Interface is enabled * AH12 RESERVED#AH12 SA_CK#_0 AR24 M_CLK_DDR#0 12 15 CLK_DDC_EDID K33 L_DDC_CLK PEG_RX#_0 H44
AH13 AR21 M_CLK_DDR#1 12 15 DAT_DDC_EDID DAT_DDC_EDID J33 J46 PEG_RXN1
RESERVED#AH13 SA_CK#_1 L_DDC_DATA PEG_RX#_1 PEG_RXN2
CFG7 (Intel Management Engine Low = Intel Management Engine Crypto Transport K12 RESERVED#K12 SB_CK#_0 AU24 M_CLK_DDR#2 13 PEG_RX#_2 L44
TP102 TPAD30 ME_TCKAL34 AV20 L40 PEG_RXN3
Crypto Strap) Layer Security (TLS) cipher site with TP103 TPAD30 ME_TDIAK34 RESERVED#AL34 SB_CK#_1 M_CLK_DDR#3 13
GMCH_LCDVDD_ON M29 PEG_RX#_3
N41 PEG_RXN4
RESERVED#AK34 15 GMCH_LCDVDD_ON L_VDD_EN PEG_RX#_4
no confidentiality TP104 TPAD30 ME_TDO
AN35 RESERVED#AN35 SA_CKE_0 BC28 M_CKE0 12 LIBG C44 LVDS_IBG PEG_RX#_5 P48 PEG_RXN5
High = Intel Management Engine Crypto TLS Cipher TP106 TPAD30 ME_TMS
AM35 AY28 M_CKE1 12 R208 TPAD30 TP110 L_LVBG B43 N44 PEG_RXN6
RESERVED#AM35 SA_CKE_1 LVDS_VBG PEG_RX#_6 PEG_RXN7
suite with confidentiality * T24 RESERVED#T24 SB_CKE_0 AY36 M_CKE2 13 2 1 E37 LVDS_VREFH PEG_RX#_7 T43
D BB36 0R2J-2-GP E38 U43 PEG_RXN8 D
SB_CKE_1 M_CKE3 13 LVDS_VREFL PEG_RX#_8

RSVD
CFG9 (PCIE Graphics Lane) Low = Reverse Lanes, 15->0, 14->1 etc... B31 UMA 15 GMCH_TXACLK- C41 Y43 PEG_RXN9
RESERVED#B31 LVDSA_CLK# PEG_RX#_9 PEG_RXN10
High = Normal operation:Lane Numbered in Order * B2 RESERVED#B2 SA_CS#_0 BA17 M_CS0# 12 15 GMCH_TXACLK+ C40 LVDSA_CLK PEG_RX#_10 Y48
M1 AY16 M_CS1# 12 15 GMCH_TXBCLK- B37 Y36 PEG_RXN11
RESERVED#M1 SA_CS#_1 LVDSB_CLK# PEG_RX#_11 PEG_RXN12
CFG10 (PCIE Loopback enable) Low = Enabled SB_CS#_0 AV16 M_CS2# 13 15 GMCH_TXBCLK+ A37 LVDSB_CLK PEG_RX#_12 AA43

LVDS
High = Disabled * AR13 M_CS3# 13 AD37 PEG_RXN13
SB_CS#_1 PEG_RX#_13 PEG_RXN14
AY21 RESERVED#AY21 15 GMCH_TXAOUT0- H47 LVDSA_DATA#_0 PEG_RX#_14 AC47
CFG12 (ALLZ) Low = ALLZ mode Enabled BD17 M_ODT0 12 15 GMCH_TXAOUT1- E46 AD39 PEG_RXN15
SA_ODT_0 LVDSA_DATA#_1 PEG_RX#_15
High = Disabled * SA_ODT_1 AY17 M_ODT1 12 15 GMCH_TXAOUT2- G40 LVDSA_DATA#_2 PEG_RXP[15..0] 46
BF15 M_ODT2 13 A40 H43 PEG_RXP0
SB_ODT_0 LVDSA_DATA#_3 PEG_RX_0

GRAPHICS
CFG13 (XOR) Low = XOR mode Enabled BG23 AY13 M_ODT3 13 J44 PEG_RXP1
RESERVED#BG23 SB_ODT_1 PEG_RX_1 PEG_RXP2
High = Disabled * BF23 RESERVED#BF23 15 GMCH_TXAOUT0+ H48 LVDSA_DATA_0 PEG_RX_2 L43
BH18 BG22 M_RCOMPP 15 GMCH_TXAOUT1+ D45 L41 PEG_RXP3
RESERVED#BH18 SM_RCOMP M_RCOMPN LVDSA_DATA_1 PEG_RX_3 PEG_RXP4
CFG16 (FSB Dynamic ODT) Low = Dynamic ODT Disabled BF18 RESERVED#BF18 SM_RCOMP# BH21 SM_PWROK 47 15 GMCH_TXAOUT2+ F40 LVDSA_DATA_2 PEG_RX_4 N40
High = Dynamic ODT Enabled * B40 P47 PEG_RXP5
SM_RCOMP_VOH LVDSA_DATA_3 PEG_RX_5 PEG_RXP6
SM_RCOMP_VOH BF28 PEG_RX_6 N43
SM_RCOMP_VOL DDR_VREF_S3 PEG_RXP7
CFG19 (DMI Lane Reversal) Low = Noraml operation: Lane Numbered in Order * SM_RCOMP_VOL BH28 15 GMCH_TXBOUT0- A41 LVDSB_DATA#_0 PEG_RX_7 T42
High = Reverse Lanes 0.75V 15 GMCH_TXBOUT1- H38 U42 PEG_RXP8
LVDSB_DATA#_1 PEG_RX_8 PEG_RXP9
DMI x 4 mode[MCH->ICH]: (0->3, 2->1, 1->2 and 0->3) SM_VREF AV42 15 GMCH_TXBOUT2- G37 LVDSB_DATA#_2 PEG_RX_9 Y42
DMI x 2 mode[MCH->ICH]: (3->0, 2->1) AR36 J37 W47 PEG_RXP10
SM_PWROK SM_REXT R1641 499R2F-2-GP LVDSB_DATA#_3 PEG_RX_10 PEG_RXP11
SM_REXT BF17 2 PEG_RX_11 Y37

1
CFG20 (Digital Display Port (SDVO/DP Low = Only Digital Display Port (SDVO/iHDMI) BC36 C221 15 GMCH_TXBOUT0+ B42 AA42 PEG_RXP12
SM_DRAMRST# LVDSB_DATA_0 PEG_RX_12

SCD1U10V2KX-4GP
PEG_RXP13
/iHDMI) Concurrent with PCIE) or PCIE is operational * B38
DDR3_DRAMRST# 12,13 15 GMCH_TXBOUT1+ G38
F37
LVDSB_DATA_1 PEG_RX_13 AD36
AC48 PEG_RXP14
15 GMCH_TXBOUT2+

2
DPLL_REF_CLK DREFCLK 3 LVDSB_DATA_2 PEG_RX_14 PEG_RXP15

PCI-EXPRESS
High = Digital Display Port (SDVO/DP/iHDMI) DPLL_REF_CLK# A38 DREFCLK# 3 K37 LVDSB_DATA_3 PEG_RX_15 AD40
E41
and PCIE are operating simulatneously DPLL_REF_SSCLK
F41
DREFSSCLK 3
J41 GTXN0 1 2 C243 SCD1U10V2KX-5GP PEG_TXN0
PEG_TXN[15..0] 18,46
via the PEG port DPLL_REF_SSCLK# DREFSSCLK# 3 PEG_TX#_0
PEG_TX#_1 M46 GTXN1 1 2 C619 SCD1U10V2KX-5GP PEG_TXN1
F43 TV_DACA F25 M47 GTXN2 1 2 C617 SCD1U10V2KX-5GP PEG_TXN2

CLK
PEG_CLK CLK_MCH_3GPLL 3 TVA_DAC PEG_TX#_2
SDVO_CTRLDATA Low = No SDVO Card Present * E43 CLK_MCH_3GPLL# 3 TV_DACB H25 M40 GTXN3 1 2 C245 SCD1U10V2KX-5GP PEG_TXN3
PEG_CLK# TV_DACC TVB_DAC PEG_TX#_3
High = SDVO Card Present K25 M42 GTXN4 DIS
1 2 C250 SCD1U10V2KX-5GP PEG_TXN4
(SDVO Present) TVC_DAC PEG_TX#_4
R48 GTXN5 DIS
1 2 C616 SCD1U10V2KX-5GP PEG_TXN5
PEG_TX#_5
L_DDC_DATA (Local Flat Panel Low = LFP Disabled * H24 TV_RTN PEG_TX#_6 N38 GTXN6 DIS
1 2 C253 SCD1U10V2KX-5GP PEG_TXN6

TV
High = LFP Card Present; PCIE disabled AE41 T40 GTXN7 DIS
1 2 C241 SCD1U10V2KX-5GP PEG_TXN7
(LFP) Present) DMI_RXN_0
AE37
DMI_TXN0 20 PEG_TX#_7
U37 GTXN8 DIS
1 2 C229 SCD1U10V2KX-5GP PEG_TXN8
DMI_RXN_1 DMI_TXN1 20 PEG_TX#_8
DDPC_CTRLDATA Low = DisplayPort Disabled * DMI_RXN_2 AE47 DMI_TXN2 20 PEG_TX#_9 U40 GTXN9 DIS
1 2 C231 SCD1U10V2KX-5GP PEG_TXN9
High = DisplayPort Device Present AH39 C31 Y40 GTXN10 DIS
1 2 C232 SCD1U10V2KX-5GP PEG_TXN10
(Digital Display Present) DMI_RXN_3 DMI_TXN3 20
E32
TV_DCONSEL_0 PEG_TX#_10
AA46 GTXN11 DIS
1 2 C613 SCD1U10V2KX-5GP PEG_TXN11
TV_DCONSEL_1 PEG_TX#_11
DMI_RXP_0 AE40 DMI_TXP0 20 PEG_TX#_12 AA37 GTXN12 DIS
1 2 C235 SCD1U10V2KX-5GP PEG_TXN12
3,4 CPU_SEL0 T25 CFG_0 DMI_RXP_1 AE38 DMI_TXP1 20 PEG_TX#_13 AA40 GTXN13 DIS
1 2 C237 SCD1U10V2KX-5GP PEG_TXN13
3,4 CPU_SEL1 R25 CFG_1 DMI_RXP_2 AE48 DMI_TXP2 20 PEG_TX#_14 AD43 GTXN14 DIS
1 2 C238 SCD1U10V2KX-5GP PEG_TXN14
C 3,4 CPU_SEL2 P25 CFG_2 DMI_RXP_3 AH40 DMI_TXP3 20 PEG_TX#_15 AC46 GTXN15 DIS
1 2 C612 SCD1U10V2KX-5GP PEG_TXN15 C
CFG3 P20 PEG_TXP[15..0] 18,46
CFG4 CFG_3 GMCH_BLUE
P24 CFG_4 DMI_TXN_0 AE35 DMI_RXN0 20 44 GMCH_BLUE E28 CRT_BLUE PEG_TX_0 J42 GTXP0 1 2 C244 SCD1U10V2KX-5GP PEG_TXP0

DMI
CFG5 C25 AE43 L46 GTXP1 1 2 C620 SCD1U10V2KX-5GP PEG_TXP1
CFG6 CFG_5 DMI_TXN_1 DMI_RXN1 20 GMCH_GREEN PEG_TX_1
N24 CFG_6 DMI_TXN_2 AE46 DMI_RXN2 20 44 GMCH_GREEN G28 CRT_GREEN PEG_TX_2 M48 GTXP2 1 2 C618 SCD1U10V2KX-5GP PEG_TXP2
1D5V_S3 CFG7 M24 AH42 M39 GTXP3 1 2 C246 SCD1U10V2KX-5GP PEG_TXP3
CFG_7 DMI_TXN_3 DMI_RXN3 20 PEG_TX_3

CFG
CFG8 E21 44 GMCH_RED GMCH_RED J28 M43 GTXP4 DIS
1 2 C251 SCD1U10V2KX-5GP PEG_TXP4
CFG9 CFG_8 CRT_RED PEG_TX_4
C23 CFG_9 DMI_TXP_0 AD35 DMI_RXP0 20 PEG_TX_5 R47 GTXP5 DIS
1 2 C615 SCD1U10V2KX-5GP PEG_TXP5

VGA
3D3V_S0 CFG10 C24 AE44 G29 N37 GTXP6 DIS
1 2 C252 SCD1U10V2KX-5GP PEG_TXP6
CFG_10 DMI_TXP_1 DMI_RXP1 20 CRT_IRTN PEG_TX_6
1

CFG11 N21 AF46 T39 GTXP7 DIS


1 2 C242 SCD1U10V2KX-5GP PEG_TXP7
CFG_11 DMI_TXP_2 DMI_RXP2 20 PEG_TX_7
R187 1 DY 2 2K21R2F-GP CFG18 R186 CFG12 P21 CFG_12 DMI_TXP_3 AH43 DMI_RXP3 20 17 GMCH_DDCCLK GMCH_DDCCLK H32 CRT_DDC_CLK PEG_TX_8 U36 GTXP8 DIS
1 2 C228 SCD1U10V2KX-5GP PEG_TXP8
80D6R2F-L-GP CFG13 T21 17 GMCH_DDCDATA GMCH_DDCDATA J32 U39 GTXP9 DIS
1 2 C230 SCD1U10V2KX-5GP PEG_TXP9
CFG_13 CRT_DDC_DATA PEG_TX_9
R185 1 DY 2 4K02R2F-GP CFG19 CFG14 R20 CFG_14 17 GMCH_HSYNC 1 UMA 2 GMCH_HS J29 CRT_HSYNC PEG_TX_10 Y39 GTXP10 DIS
1 2 C233 SCD1U10V2KX-5GP PEG_TXP10
CFG15 M20 R199 33R2F-3-GP E29 Y46 GTXP11 DIS
1 2 C614 SCD1U10V2KX-5GP PEG_TXP11
2

CFG_15 CRT_TVO_IREF PEG_TX_11


R193 1 DY 2 4K02R2F-GP CFG20 M_RCOMPP CFG16 L21 CFG_16 17 GMCH_VSYNC 1 UMA 2 GMCH_VS L29 CRT_VSYNC PEG_TX_12 AA36 GTXP12 DIS
1 2 C234 SCD1U10V2KX-5GP PEG_TXP12

GRAPHICS VID
CFG17 H21 R194 33R2F-3-GP AA39 GTXP13 DIS
1 2 C236 SCD1U10V2KX-5GP PEG_TXP13
CFG_17 PEG_TX_13
R159 1 DY 2 2K21R2F-GP CFG3 CFG18 P29 CFG_18 GFX_VID[4..0] 53 PEG_TX_14 AD42 GTXP14 DIS
1 2 C239 SCD1U10V2KX-5GP PEG_TXP14
M_RCOMPN CFG19 R28 1 UMA 2 CRT_IREF AD46 GTXP15 DIS
1 2 C611 SCD1U10V2KX-5GP PEG_TXP15
CFG_19 PEG_TX_15
R174 1 DY 2 2K21R2F-GP CFG4 CFG20 T28 CFG_20 GFX_VID_0 B33 GFX_VID0 R192 1K02R2F-1-GP
1

B32 GFX_VID1
GFX_VID_1
R547 1 DY 2 2K21R2F-GP CFG5 R182
GFX_VID_2 G33 GFX_VID2 CANTIGA-GM-GP-U-NF
80D6R2F-L-GP F33 GFX_VID3 71.CNTIG.00U
GFX_VID_3
R180 1 DY 2 2K21R2F-GP CFG6 20 PM_SYNC# R29 PM_SYNC# GFX_VID_4 E33 GFX_VID4 FOR Cantiga: 1.02k_1% ohm
4,19,49 H_DPRSTP# B7 Teenah: 1.3k ohm
2

PM_DPRSTP#
R168 1 DY 2 2K21R2F-GP CFG7 12,13 PM_EXTTS#0 N33 PM_EXT_TS#_0
PM_EXTTS#1 P32 CRT_IREF routing Trace
PM_EXT_TS#_1
PM

R166 1 DY 2 2K21R2F-GP CFG8 -1 PWROK_GD AT40 C34 GFXVR_EN


1 R215 2 RSTIN# AT11
PWROK GFX_VR_EN 1D05V_M width use 20 mil
20,47 PWROK RSTIN#
R176 1 DY 2 2K21R2F-GP CFG9 0R0402-PAD NB_THERMTRIP# T20 THERMTRIP#

2
20,34,36,41,42,44,46 PLT_RST1# 2 1 R32 DPRSLPVR
R173 1 DY 2 2K21R2F-GP CFG10 100R2J-2-GP R149 R203
AH37 1KR2F-3-GP PEG_RXP3 1 2
CL_CLK CL_CLK0 20
1

DVI_DETECT# 18
R171 1 DY 2 2K21R2F-GP CFG11 C159
CL_DATA AH36 CL_DATA0 20
0R2J-2-GP UMA
SC100P50V2JN-3GP BG48 AN36 CLPWROK_R 1 R211 2 R210
ME

M_PWROK 20,47

1
NC#BG48 CL_PWROK
R170 1 DY 2 2K21R2F-GP CFG12 DY BF48 AJ35 0R2J-2-GP
CL_RST#0 20
2

NC#BF48 CL_RST#
BD48 NC#BD48 CL_VREF AH34 MCH_CLVREF UMA
R175 1 DY 2 2K21R2F-GP CFG13 BC48 NC#BC48
GMCH_BL_ON 1 R200 2

1
100KR2J-1-GP
-1 BH47 NC#BH47

1
R165 1 DY 2 2K21R2F-GP CFG14 4,19,47 PM_THRMTRIP-A# 1 R172 2 BG47 NC#BG47 for HDMI port C C215 R212 UMA
499R2F-2-GP

SCD1U10V2KX-4GP
20,49 PM_DPRSLPVR 0R0402-PAD BE47 N28 GMCH_LCDVDD_ON 1 R201 2
NC#BE47 DDPC_CTRLCLK
R162 1 DY 2 2K21R2F-GP CFG15 BH46 M28 100KR2J-1-GP

2
B NC#BH46 DDPC_CTRLDATA B
BF46 G36 GMCH_HDMI_CLK 18 UMA

2
NC#BF46 SDVO_CTRLCLK
NC

R167 1 DY 2 2K21R2F-GP CFG16 BG45 NC#BG45 SDVO_CTRLDATA E36 GMCH_HDMI_DATA 18


LIBG 1 R216 2
MISC

BH44 K36 CLK_MCH_OE# 3 2K37R2F-GP


NC#BH44 CLKREQ#
R169 1 DY 2 2K21R2F-GP CFG17 BH43 NC#BH43 ICH_SYNC# H36 MCH_ICH_SYNC# 20 DIS
BH6 FOR Cantiga:500 ohm CRT_IREF 1 R195 2
NC#BH6 0R2J-2-GP
BH5 NC#BH5 -1 Teenah: 392 ohm
BG4 B12 MCH_TSATN#
NC#BG4 TSATN# GMCH_VS
BH3 NC#BH3 1 R198 2
BF3 0R2J-2-GP DIS
NC#BF3
-1 BH2
BG2
NC#BH2
B28 GMCH_HS 1 R202 2
NC#BG2 HDA_BCLK
0425 BE2 NC#BE2 HDA_RST# B30 0R2J-2-GP DIS
BG1 NC#BG1 HDA_SDI B29
BF1 NC#BF1 HDA_SDO C29
3D3V_M 1D05V_M BD1 A28
NC#BD1 HDA_SYNC
HDA

U66 BC1 NC#BC1 R189 UMA


DY F1 NC#F1
1 8 TPAD30 TP123 A47 150R2F-1-GP
CS# VCC NC#A47 GMCH_BLUE
2 SO HOLD# 7 1 2
3 WP# SCLK 6
4 5 CANTIGA-GM-GP-U-NF R190 UMA
GND SI 150R2F-1-GP
71.CNTIG.00U GMCH_GREEN 1 2
MX25L2005MC-15G-GP
R191 UMA
1D5V_S3 -1 150R2F-1-GP
1D05V_S0 R196 1KR2F-3-GP GMCH_RED 1 2
2 1
SRN0J-6-GP
1

SM_RCOMP_VOH DREFCLK 1 4
R155 DREFCLK# 2 3
1

56R2J-4-GP C203 C205 FOR Discrete,change to 0 ohm


R188 RN49
3K01R2F-3-GP SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP DIS 63.R0034.1DL
2

MCH_TSATN# MCH_TSATN# 41
R177
2

SM_RCOMP_VOL UMA 1 75R2J-1-GP


2 TV_DACA
SRN0J-6-GP
-1
2

C197 C201 DREFSSCLK 1 4 R178


R184 DREFSSCLK# 2 3 UMA 1 75R2J-1-GP
2 TV_DACB
3D3V_S0 1KR2F-3-GP SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP
2

A GFXVR_EN RN50 R179 A


R197 GFXVR_EN 53
DY DIS UMA 1 75R2J-1-GP
2 TV_DACC
1

CLK_MCH_OE# 1 2
2

10KR2J-3-GP R553
100KR2F-L1-GP
layout take note
3D3V_S0
1

RN17 UMA Wistron Corporation


LCTLA_CLK 4 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LCTLB_DATA 3 2 Taipei Hsien 221, Taiwan, R.O.C.

SRN10KJ-5-GP Title
RN18
PM_EXTTS#0 4 1 Cantiga (2 of 6)
PM_EXTTS#1 3 2 Size Document Number Rev

Four Peaks -1M


SRN10KJ-5-GP
Date: Friday, November 21, 2008 Sheet 7 of 57
5 4 3 2 1
5 4 3 2 1

NB1D 4 OF 10 NB1E 5 OF 10
M_A_DQ[63..0] M_B_DQ[63..0]
12 M_A_DQ[63..0] 13 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_A_BS#0 12 M_B_DQ0 AK47 BC16 M_B_BS#0 13
M_A_DQ1 SA_DQ_0 SA_BS_0 M_B_DQ1 SB_DQ_0 SB_BS_0
AJ41 SA_DQ_1 SA_BS_1 BG18 M_A_BS#1 12 AH46 SB_DQ_1 SB_BS_1 BB17 M_B_BS#1 13
M_A_DQ2 AN38 AT25 M_A_BS#2 12 M_B_DQ2 AP47 BB33 M_B_BS#2 13
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# 12 M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# 12 AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS# 13
M_A_DQ6 AM44 AY20 M_A_WE# 12 M_B_DQ6 AM48 BG16 M_B_CAS# 13
M_A_DQ7 SA_DQ_6 SA_WE# M_B_DQ7 SB_DQ_6 SB_CAS#
AM42 SA_DQ_7 AP48 SB_DQ_7 SB_WE# BF14 M_B_WE# 13
D M_A_DQ8 AN43 M_B_DQ8 AU47 D
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_A_DM[7..0] M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7..0] 12 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0] 13
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ15 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
M_A_DQ17 SA_DQ_16 SA_DM_5 M_A_DM6 M_B_DQ17 SB_DQ_16 SB_DM_4 M_B_DM5
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3

A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6

B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7..0] 12 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45 M_B_DQS[7..0]
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7..0] 13
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 BA43 BF40 AV48

MEMORY
M_A_DQ23 SA_DQ_22 SA_DQS_2 M_A_DQS3 M_B_DQ23 SB_DQ_22 SB_DQS_1 M_B_DQS2

MEMORY
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
M_A_DQ25 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7..0] 12 BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0] 13
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
M_A_DQ32 SA_DQ_31 SA_DQS#_3 M_A_DQS#4 M_B_DQ32 SB_DQ_31 SB_DQS#_2 M_B_DQS#3
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

SYSTEM
AU13 SA_DQ_36 M_A_A[14..0] 12 BH12 SB_DQ_36 SB_DQS#_7 AN5
C M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11 M_B_A[14..0] C
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14..0] 13
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ41 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
M_A_DQ43 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
M_A_DQ45 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ47 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR

AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16

DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW33 M_B_A11
M_A_DQ50 SA_DQ_49 SA_MA_12 M_A_A13 M_B_DQ50 SB_DQ_49 SB_MA_11 M_B_A12
AT9 SA_DQ_50 SA_MA_13 BH17 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 SA_DQ_52 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ53 AU6 M_B_DQ53 AV1
M_A_DQ54 SA_DQ_53 M_B_DQ54 SB_DQ_53
AT5 SA_DQ_54 AP3 SB_DQ_54
M_A_DQ55 AN10 M_B_DQ55 AR1
M_A_DQ56 SA_DQ_55 M_B_DQ56 SB_DQ_55
AM11 SA_DQ_56 AL1 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
M_A_DQ58 SA_DQ_57 M_B_DQ58 SB_DQ_57
AJ9 SA_DQ_58 AJ1 SB_DQ_58
M_A_DQ59 AJ8 M_B_DQ59 AH1
M_A_DQ60 SA_DQ_59 M_B_DQ60 SB_DQ_59
AN12 SA_DQ_60 AM2 SB_DQ_60
M_A_DQ61 AM13 M_B_DQ61 AM3
M_A_DQ62 SA_DQ_61 M_B_DQ62 SB_DQ_61
AJ11 SA_DQ_62 AH3 SB_DQ_62
M_A_DQ63 AJ12 M_B_DQ63 AJ3
SA_DQ_63 SB_DQ_63

B CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF B

71.CNTIG.00U 71.CNTIG.00U

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (3 of 6)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 8 of 57
5 4 3 2 1
5 4 3 2 1

VCC_GFXCORE
7 OF 10
1D5V_S3 NB1G

AP33 VCC_SM VCC_AXG_NCTF W28


AN33 VCC_SM VCC_AXG_NCTF V28

2
BH32 W26 1D05V_M NB1F 6 OF 10
BG32
VCC_SM VCC_AXG_NCTF
V26 R158
FOR VCC CORE
VCC_SM VCC_AXG_NCTF
BF32 VCC_SM VCC_AXG_NCTF W25 0R5J-5-GP
BD32 VCC_SM VCC_AXG_NCTF V25 DIS AG34 VCC
BC32 W24 AC34

1
VCC_SM VCC_AXG_NCTF VCC
BB32 VCC_SM VCC_AXG_NCTF V24 AB34 VCC
BA32 VCC_SM VCC_AXG_NCTF W23 AA34 VCC

1
AY32 V23 C211 C199 C195 C208 C186 Y34
VCC_SM VCC_AXG_NCTF VCC
AW32 VCC_SM VCC_AXG_NCTF AM21 V34 VCC

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SCD22U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AV32 AL21 U34

2
VCC_SM VCC_AXG_NCTF VCC
AU32 VCC_SM VCC_AXG_NCTF AK21 DY AM33 VCC
D AT32 VCC_SM VCC_AXG_NCTF W21 AK33 VCC D
AR32 VCC_SM VCC_AXG_NCTF V21 AJ33 VCC

POWER
AP32 VCC_SM VCC_AXG_NCTF U21 AG33 VCC
AN32 AM20 VCC_GFXCORE AF33
VCC_SM VCC_AXG_NCTF VCC
BH31 VCC_SM VCC_AXG_NCTF AK20
BG31 VCC_SM VCC_AXG_NCTF W20 Coupling CAP 370 mils from the Edge AE33 VCC

VCC CORE
BF31 VCC_SM VCC_AXG_NCTF U20 AC33 VCC
BG30 VCC_SM VCC_AXG_NCTF AM19 AA33 VCC
BH29 VCC_SM VCC_AXG_NCTF AL19 Y33 VCC

1
BG29 AK19 TC13 C167 C179 C178 C190 C188 C191 C175 C189 W33
VCC_SM VCC_AXG_NCTF VCC

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SC1U10V3ZY-6GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
BF29 VCC_SM VCC_AXG_NCTF AJ19 V33 VCC

ST220U2D5VBM-2GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
BD29 AH19 U33

2
VCC_SM VCC_AXG_NCTF VCC

VCC SM
BC29 VCC_SM VCC_AXG_NCTF AG19 AH28 VCC
BB29 VCC_SM VCC_AXG_NCTF AF19 AF28 VCC
BA29 AE19 C212 C202 AC28
VCC_SM VCC_AXG_NCTF VCC

1
SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP
AY29 VCC_SM VCC_AXG_NCTF AB19 DY UMA UMA UMA UMA UMA UMA UMA UMA AA28 VCC
AW29 VCC_SM VCC_AXG_NCTF AA19 AJ26 VCC
AV29 Y19 AG26

2
VCC_SM VCC_AXG_NCTF VCC
AU29 VCC_SM VCC_AXG_NCTF W19 DY AE26 VCC
AT29 VCC_SM VCC_AXG_NCTF V19 Place on the Edge Coupling CAP AC26 VCC
AR29 VCC_SM VCC_AXG_NCTF U19 AH25 VCC
AP29 VCC_SM VCC_AXG_NCTF AM17 AG25 VCC
VCC_AXG_NCTF AK17 AF25 VCC
BA36 VCC_SM/NC VCC_AXG_NCTF AH17 AG24 VCC

POWER
BB24 VCC_SM/NC VCC_AXG_NCTF AG17 Coupling CAP AJ23 VCC
BD16 AF17 AH23 1D05V_M
VCC GFX NCTF

VCC_SM/NC VCC_AXG_NCTF VCC


BB21 VCC_SM/NC VCC_AXG_NCTF AE17 AF23 VCC
AW16 AC17 G32 AM32
VCC_SM/NC VCC_AXG_NCTF VCC_GMCH_35 VCC_NCTF
AW13 VCC_SM/NC VCC_AXG_NCTF AB17 1 2 T32 VCC VCC_NCTF AL32
AT13 VCC_SM/NC VCC_AXG_NCTF Y17 VCC_NCTF AK32
W17 GAP-CLOSE-PWR AJ32
VCC_GFXCORE VCC_AXG_NCTF VCC_NCTF
VCC_AXG_NCTF V17 VCC_NCTF AH32
VCC_AXG_NCTF AM16 VCC_NCTF AG32
Y26 VCC_AXG VCC_AXG_NCTF AL16 VCC_NCTF AE32
AE25 VCC_AXG VCC_AXG_NCTF AK16 VCC_NCTF AC32
AB25 VCC_AXG VCC_AXG_NCTF AJ16 VCC_NCTF AA32
AA25 VCC_AXG VCC_AXG_NCTF AH16 VCC_NCTF Y32
AE24 VCC_AXG VCC_AXG_NCTF AG16 VCC_NCTF W32
AC24 VCC_AXG VCC_AXG_NCTF AF16 VCC_NCTF U32
AA24 VCC_AXG VCC_AXG_NCTF AE16 VCC_NCTF AM30
Y24 VCC_AXG VCC_AXG_NCTF AC16 VCC_NCTF AL30
C AE23 VCC_AXG VCC_AXG_NCTF AB16 VCC_NCTF AK30 C
AC23 VCC_AXG VCC_AXG_NCTF AA16 VCC_NCTF AH30
AB23 VCC_AXG VCC_AXG_NCTF Y16 VCC_NCTF AG30
AA23 VCC_AXG VCC_AXG_NCTF W16 VCC_NCTF AF30
AJ21 VCC_AXG VCC_AXG_NCTF V16 VCC_NCTF AE30
AG21 VCC_AXG VCC_AXG_NCTF U16 VCC_NCTF AC30
AE21 VCC_AXG VCC_NCTF AB30
AC21 VCC_AXG VCC_NCTF AA30
AA21 VCC_AXG VCC_NCTF Y30
Y21 VCC_AXG -1 04/25 VCC_NCTF W30

VCC NCTF
AH20 VCC_AXG FOR VCC SM VCC_NCTF V30
AF20 VCC_AXG VCC_NCTF U30
AE20 1D5V_S3 AL29
VCC_AXG VCC_NCTF
AC20 VCC_AXG VCC_NCTF AK29
AB20 VCC_AXG VCC_NCTF AJ29

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
AA20 C206 C210 C207 C204 C171 AH29
VCC_AXG VCC_NCTF

1
T17 VCC_AXG VCC_NCTF AG29
T16 VCC_AXG VCC_NCTF AE29
AM15 AC29

2
VCC_AXG VCC_NCTF
AL15 VCC_AXG DY DY VCC_NCTF AA29
AE15 VCC_AXG VCC_NCTF Y29
AJ15 VCC_AXG VCC_NCTF W29
AH15 VCC_AXG VCC_NCTF V29
AG15 VCC_AXG VCC_NCTF AL28
AF15 VCC_AXG VCC_NCTF AK28
AB15 VCC_AXG
Place on the Edge VCC_NCTF AL26
AA15 VCC_AXG VCC_NCTF AK26
VCC GFX

Y15 VCC_AXG VCC_NCTF AK25


V15 VCC_AXG VCC_NCTF AK24
U15 VCC_AXG VCC_NCTF AK23
AN14 VCC_AXG
AM14 VCC_AXG
U14 VCC_AXG VCC_SM_LF AV44 SM_LF1_GMCH CANTIGA-GM-GP-U-NF
VCC SM LF

T14 VCC_AXG VCC_SM_LF BA37 SM_LF2_GMCH 71.CNTIG.00U


VCC_SM_LF AM40 SM_LF3_GMCH
VCC_SM_LF AV21 SM_LF4_GMCH
VCC_SM_LF AY5 SM_LF5_GMCH
VCC_SM_LF AM10 SM_LF6_GMCH
VCC_SM_LF BB13 SM_LF7_GMCH
SCD47U16V3ZY-3GP
C218

C216

C227
SC1U10V3KX-3GP

SC1U10V3KX-3GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

1
C180

C162

C153 C185
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

B AJ14 B
53 VCC_AXG_SENSE VCC_AXG_SENSE
AH14
2

53 VSS_AXG_SENSE VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF
71.CNTIG.00U
U60(ISL6263ACRZ-T-GP) place near Cantiga

place near Cantiga

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (4 of 6)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 9 of 57
5 4 3 2 1
5 4 3 2 1

5V_S0 Imax = 300 mA


3D3V_S0_DAC 3D3V_S0_DAC 1D05V_S0
U57
73mA 852mA

SC2D2U6D3V3MX-1-GP
2 R540 3D3V_CRTDAC_S0 NB1H 8 OF 10
UMA UMA 1

1
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

ST220U6D3VDM-20GP

SCD1U10V2KX-4GP
0R3-0-U-GP C572 C568

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD47U6D3V2KX-GP
1 VIN VOUT 5

1
TC12
C169

C138

C174

C132

C165

C152
2 C549 R543 U13 1
GND UMA VTT

1
SC22U6D3V5MX-2GP
3 EN/EN# NC#4 4 UMA UMA 0R2J-2-GP VTT T13
BC6 B27 U12 2
DIS

2
VCCA_CRT_DAC VTT
SC1U16V3ZY-GP

SC1U16V3ZY-GP
A26 T12 DY

2
VCCA_CRT_DAC VTT
1

1
RT9198-33PBR-GP SC U11
BC5 74.09198.G7F VTT
VTT T11
UMA 2nd = 74.09091.J3F UMA M_VCCA_DAC_BG A25 U10

CRT
2

2
3D3V_S0_DAC VCCA_DAC_BG VTT
D B25 VSSA_DAC_BG VTT T10 D
R539 U9 2nd = 80.22715.39L
5mA VTT

SC2D2U10V3KX-1GP
1 2 VTT T9
BLM18HG102SN-1GP U8
VTT

1
UMA C567 R542 M_VCCA_DPLLA F47 T8
0R2J-2-GP VCCA_DPLLA VTT
68.00084.A01 UMA U7

VTT
M_VCCA_DPLLB VTT
DIS L48 T7

2
VCCA_DPLLB VTT 1D05V_S0
VTT U6
1D05V_M M_VCCA_HPLL AD1 T6 D40

PLL
2
VCCA_HPLL VTT 3D3V_S0 3D3V_HV_S0
VTT U5 1

SCD1U10V2KX-4GP
M_VCCA_MPLL
2 R595 65mA
1 M_VCCA_DPLLA 1D8V_TXLVDS_S0
AE1 VCCA_MPLL VTT T5
V3 2 1D05V_HV_S0 2 1 1 R558 2
-1
VTT BAT54-7-F-GP R559 0R0402-PAD
VTT U3
1

1
SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

C588
0R3-0-U-GP C630 C625 R589 UMA J48 V2 3 10R2J-2-GP
0R2J-2-GP C225 13.2mA VCCA_LVDS VTT
U2

A LVDS
UMA SC1KP50V2KX-1GP VTT
DIS J47 T2
2

2
VSSA_LVDS VTT
UMA UMA VTT V1 2nd = 83.BAT54.D81
1D5V_S0 U1
2

VTT
1 R590 2
-1 VCCA_PEG_BG AD48
0R0402-PAD VCCA_PEG_BG
65mA

1
2 R593 1 M_VCCA_DPLLB C624
SCD1U10V2KX-4GP 1D05V_M

A PEG
1

1
SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

0R3-0-U-GP C631 C629 R592


50mAAA48 322mA

2
0R2J-2-GP 1D05V_RUN_PEGPLL
UMA 1D05V_M VCCA_PEG_PLL
DIS
2

UMA UMA

1
1D05V_M

SC1U10V3KX-3GP

SC10U6D3V5MX-3GP
AR20 C84 C85
2

VCCA_SM
AP20 VCCA_SM
C C200 C559 C193 C
-1 480mA AN20
POWER

2
VCCA_SM
2

1
SC10U6D3V5MX-3GP

SC4D7U6D3V3KX-GP

SC1U10V3KX-3GP
R502 AR17
0R0603-PAD VCCA_SM
AP17 VCCA_SM
AN17
2

2
1D05V_SUS_MCH_PLL2 VCCA_SM
DY DY DY AT16 VCCA_SM
AR16

A SM
1

VCCA_SM
AP16 VCCA_SM
FCM1608KF-1-GP 24mA
1 2 M_VCCA_HPLL
1D05V_M
SC4D7U6D3V3KX-GP

L23
1

120ohm 100MHz C510 C515


SCD1U10V2KX-4GP 1D5V_S3
AP28
200mA
2

VCCA_SM_CK
1

1
SC10U6D3V5MX-3GP

SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP
C628 C626 C621 AN28 B22
24mA AP25
VCCA_SM_CK VCC_AXF
B21

AXF
VCCA_SM_CK VCC_AXF C177

SCD1U10V2KX-4GP
FCM1608KF-1-GP AN25 A21 R160
139.2mA
2

2
VCCA_SM_CK VCC_AXF

1
C181
1 2 M_VCCA_MPLL DY AN24 1 2 1D5V_SUS_SM_CK_RC 1 2
VCCA_SM_CK
SC10U6D3V5MX-3GP

L22 AM28 1R2F-GP


VCCA_SM_CK_NCTF
1

120ohm 100MHz C502 C514 AM26 SC10U6D3V5MX-3GP

A CK

2
SCD1U10V2KX-4GP VCCA_SM_CK_NCTF
AM25 VCCA_SM_CK_NCTF
AL25 BF21
2

VCCA_SM_CK_NCTF VCC_SM_CK
AM24 BH20

SM CK
VCCA_SM_CK_NCTF VCC_SM_CK
AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
3D3V_S0_DAC AM23 BF20 1D8V_TXLVDS_S0 R594 1D8V_S0
VCCA_SM_CK_NCTF VCC_SM_CK 0R3-0-U-GP
AL23
1D05V_M 1 R534 2
VCCA_SM_CK_NCTF 119mA 2 UMA 1
0R2J-2-GP UMA

1
3D3V_HV_S0

C226
SC1KP50V2KX-1GP

C622
SC1U10V3KX-3GP
K47 R585
B L9 VCC_TX_LVDS B
2 R538 1 B24 UMA UMA 0R2J-2-GP
1 2 1D05V_RUN_PEGPLL 0R2J-2-GP DIS A24
VCCA_TV_DAC
C35 106mA DIS

TV

2
BLM18BB221SN1D-GP VCCA_TV_DAC VCC_HV
B35

HV
VCC_HV
220ohm 100MHz A35

2
VCC_HV
1

C249
SCD1U10V2KX-4GP VCC_HDA A32 1D05V_M
VCC_HDA

HDA
V48
1782mA
2

VCC_PEG
2

VCC_PEG U48

SC4D7U6D3V3KX-GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
R205 V47

PEG
VCC_PEG

1
0R2J-2-GP U47 C176 C196 C184 C173

D TV/CRT
1D5VRUN_TVDAC VCC_PEG
M25 VCCD_TVDAC VCC_PEG U46
1

2
1D05V_SUS_MCH_PLL2 1D5VRUN_QDAC L28 VCCD_QDAC
VCC_DMI AH48
AF1 AF48 1D05V_M

DMI
VCCD_HPLL VCC_DMI
SCD1U10V2KX-4GP

AH47
1D5V_S0 157.2mA 1D05V_RUN_PEGPLL AA47 VCCD_PEG_PLL
VCC_DMI
VCC_DMI AG47 456mA
1

C516
-1 58.7mA
1

1
SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
1 R181 2 1D5VRUN_TVDAC C247 C623 C562 C627
SCD1U10V2KX-4GP

0R0402-PAD M38
50mA
VTTLF
2

VCCD_LVDS
1

LVDS

C192 C187 L37 A8 VTTLF1


2

2
VCCD_LVDS VTTLF
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

L1 VTTLF2
VTTLF VTTLF3
AB2
2

VTTLF

CANTIGA-GM-GP-U-NF

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP
1D8V_S0

C146

C149

C160
1 1 1
L7
71.CNTIG.00U
UMA
A 1 2 1D5VRUN_QDAC 1 R220 2 1D8V_SUS_DLVDS 2 2 2 A
HCB1608K-181T20GP 0R2J-2-GP
1

180ohm 100MHz C217 C240 R209


60.3mA UMA
1

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

C198 C194 R183 UMA UMA 0R2J-2-GP


Wistron Corporation
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

0R2J-2-GP

UMA UMA DIS DIS


2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2

Taipei Hsien 221, Taiwan, R.O.C.


2

Title

Cantiga (5 of 6)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 10 of 57
5 4 3 2 1
5 4 3 2 1

NB1I 9 OF 10 NB1J 10 OF 10
BG21 VSS VSS AH8
AU48 VSS VSS AM36 L12 VSS VSS Y8
AR48 VSS VSS AE36 AW21 VSS VSS L8
AL48 VSS VSS P36 AU21 VSS VSS E8
BB47 VSS VSS L36 AP21 VSS VSS B8
AW47 VSS VSS J36 AN21 VSS VSS AY7
AN47 VSS VSS F36 AH21 VSS VSS AU7
AJ47 VSS VSS B36 AF21 VSS VSS AN7
AF47 VSS VSS AH35 AB21 VSS VSS AJ7
AD47 VSS VSS AA35 R21 VSS VSS AE7
AB47 VSS VSS Y35 M21 VSS VSS AA7
D Y47 VSS VSS U35 J21 VSS VSS N7 D
T47 VSS VSS T35 G21 VSS VSS J7
N47 VSS VSS BF34 BC20 VSS VSS BG6
L47 VSS VSS AM34 BA20 VSS VSS BD6
G47 VSS VSS AJ34 AW20 VSS VSS AV6
BD46 VSS VSS AF34 AT20 VSS VSS AT6
BA46 VSS VSS AE34 AJ20 VSS VSS AM6
AY46 VSS VSS W34 AG20 VSS VSS M6
AV46 VSS VSS B34 Y20 VSS VSS C6
AR46 VSS VSS A34 N20 VSS VSS BA5
AM46 VSS VSS BG33 K20 VSS VSS AH5
V46 VSS VSS BC33 F20 VSS VSS AD5
R46 VSS VSS BA33 C20 VSS VSS Y5
P46 VSS VSS AV33 A20 VSS VSS L5
H46 VSS VSS AR33 BG19 VSS VSS J5
F46 VSS VSS AL33 A18 VSS VSS H5
BF44 VSS VSS AH33 BG17 VSS VSS F5
AH44 VSS VSS AB33 BC17 VSS VSS BE4
AD44 VSS VSS P33 AW17 VSS
AA44 L33 AT17 BC3
Y44
U44
VSS
VSS
VSS
VSS
VSS
VSS
H33
N32
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
BC43 VSS VSS A31 BA16 VSS VSS BA2
AV43 VSS VSS AN29 VSS AW2
AU43 VSS VSS T29 AU16 VSS VSS AU2
AM43 VSS VSS N29 AN16 VSS VSS AR2
C J43 K29 N16 AP2 C
VSS VSS VSS VSS
C43 VSS VSS H29 K16 VSS VSS AJ2
BG42 VSS VSS F29 G16 VSS VSS AH2
AY42 VSS VSS A29 E16 VSS VSS AF2
AT42 VSS VSS BG28 BG15 VSS VSS AE2
AN42 VSS VSS BD28 AC15 VSS VSS AD2
AJ42 VSS VSS BA28 W15 VSS VSS AC2
AE42 VSS VSS AV28 A15 VSS VSS Y2
N42 VSS VSS AT28 BG14 VSS VSS M2
L42 VSS VSS AR28 AA14 VSS VSS K2
BD41 VSS VSS AJ28 C14 VSS VSS AM1
AU41 VSS VSS AG28 BG13 VSS VSS AA1
AM41 VSS VSS AE28 BC13 VSS VSS P1
AH41 VSS VSS AB28 BA13 VSS VSS H1
AD41 VSS VSS Y28
AA41 VSS VSS P28 VSS U24
Y41 VSS VSS K28 AN13 VSS VSS U28
U41 VSS VSS H28 AJ13 VSS VSS U25
T41 VSS VSS F28 AE13 VSS VSS U29
M41 VSS VSS C28 N13 VSS
G41 VSS VSS BF26 L13 VSS
B41 VSS VSS AH26 G13 VSS VSS_NCTF AF32
BG40 VSS VSS AF26 E13 VSS VSS_NCTF AB32
BB40 VSS VSS AB26 BF12 VSS VSS_NCTF V32
AV40 VSS VSS AA26 AV12 VSS VSS_NCTF AJ30
AN40 VSS VSS C26 AT12 VSS VSS_NCTF AM29
H40 VSS VSS B26 AM12 VSS VSS_NCTF AF29
E40 BH25 AA12 AB29

VSS NCTF
VSS VSS VSS VSS_NCTF
AT39 VSS VSS BD25 J12 VSS VSS_NCTF U26
B B
AM39 VSS VSS BB25 A12 VSS VSS_NCTF U23
AJ39 VSS VSS AV25 BD11 VSS VSS_NCTF AL20
AE39 VSS VSS AR25 BB11 VSS VSS_NCTF V20
N39 VSS VSS AJ25 AY11 VSS VSS_NCTF AC19
L39 VSS VSS AC25 AN11 VSS VSS_NCTF AL17
B39 VSS VSS Y25 AH11 VSS VSS_NCTF AJ17
BH38 VSS VSS N25 VSS_NCTF AA17
BC38 VSS VSS L25 Y11 VSS VSS_NCTF U17
BA38 VSS VSS J25 N11 VSS
AU38 G25 G11

A3,C1,A48,BH1,BH48
VSS VSS VSS
AH38 VSS VSS E25 C11 VSS NCTF_VSS_SCB#BH48 BH48
AD38 BF24 BG10 BH1

NCTF TEST PIN:


VSS SCB
VSS VSS VSS NCTF_VSS_SCB#BH1
AA38 VSS VSS AD12 AV10 VSS NCTF_VSS_SCB#A48 A48
Y38 VSS VSS AY24 AT10 VSS NCTF_VSS_SCB#C1 C1
U38 AT24 AJ10 A3 TP178 TPAD30
VSS VSS VSS NCTF_VSS_SCB#A3
T38 VSS VSS AJ24 AE10 VSS
J38 VSS VSS AH24 AA10 VSS NC#E1 E1
F38 VSS VSS AF24 M10 VSS NC#D2 D2
C38 VSS VSS AB24 BF9 VSS NC#C3 C3
BF37 VSS VSS R24 BC9 VSS NC#B4 B4
BB37 VSS VSS L24 AN9 VSS NC#A5 A5
AW37 VSS VSS K24 AM9 VSS NC#A6 A6
AT37 VSS VSS J24 AD9 VSS NC#A43 A43
AN37 VSS VSS G24 G9 VSS NC#A44 A44
AJ37 F24 B9 B45

NC
VSS VSS VSS NC#B45
H37 VSS VSS E24 BH8 VSS NC#C46 C46
C37 VSS VSS BH23 BB8 VSS NC#D47 D47
BG36 VSS VSS AG23 AV8 VSS NC#B47 B47
A BD36 VSS VSS Y23 AT8 VSS NC#A46 A46 A
AK15 VSS VSS B23 NC#F48 F48
AU36 VSS VSS A23 NC#E48 E48
VSS AJ6 NC#C48
NC#B48
C48
B48 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CANTIGA-GM-GP-U-NF Taipei Hsien 221, Taiwan, R.O.C.
71.CNTIG.00U CANTIGA-GM-GP-U-NF
Title
71.CNTIG.00U
Cantiga (6 of 6)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 11 of 57
5 4 3 2 1
A B C D E

DDR3 SOCKET_1
4 4

DM1
8 M_A_A[14..0]
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 A1 NP2 NP2
M_A_A2 96
M_A_A3 A2
95 A3 RAS# 110 M_A_RAS# 8
M_A_A4 92 113 M_A_WE# 8
M_A_A5 A4 WE#
91 A5 CAS# 115 M_A_CAS# 8
M_A_A6 90
M_A_A7 A6
86 A7 CS0# 114 M_CS0# 7
M_A_A8 89 121 M_CS1# 7
M_A_A9 A8 CS1#
85 A9
M_A_A10 107 73 M_CKE0 7
M_A_A11 A10/AP CKE0
84 A11 CKE1 74 M_CKE1 7
M_A_A12 83
M_A_A13 A12
119 A13 CK0 101 M_CLK_DDR0 7
M_A_A14 80 103 M_CLK_DDR#0 7
M_A_A15 78 A14 CK0#
TP96 A15
8 M_A_BS#2 79 A16/BA2 CK1 102 M_CLK_DDR1 7
CK1# 104 M_CLK_DDR#1 7
8 M_A_BS#0 109 BA0 M_A_DM[7..0] 8
8 M_A_BS#1 108 11 M_A_DM0
BA1 DM0 M_A_DM1
DM1 28
M_A_DQ0 5 46 M_A_DM2
M_A_DQ1 DQ0 DM2 M_A_DM3
8 M_A_DQ[63..0] 7 DQ1 DM3 63
M_A_DQ2 15 136 M_A_DM4
M_A_DQ3 DQ2 DM4 M_A_DM5
17 DQ3 DM5 153
M_A_DQ4 4 170 M_A_DM6
M_A_DQ5 DQ4 DM6 M_A_DM7
6 DQ5 DM7 187
M_A_DQ6 16
M_A_DQ7 DQ6 SMBD_ICH
18 DQ7 SDA 200 SMBD_ICH 3,13,22
M_A_DQ8 21 202 SMBC_ICH SMBC_ICH 3,13,22
M_A_DQ9 DQ8 SCL
23 DQ9
M_A_DQ10 33 198 PM_EXTTS#0 7,13
M_A_DQ11 DQ10 EVENT#
35 DQ11
3 M_A_DQ12 22 199 3D3V_M 3
M_A_DQ13 DQ12 VDDSPD RN71
24 DQ13
M_A_DQ14 34 197 DDRA_SA0 2 3
DQ14 SA0

1
M_A_DQ15 36 201 DDRA_SA1 1 4 C93
DQ15 SA1

SC2D2U6D3V2MX-GP
M_A_DQ16 39 C95
DQ16

SCD1U16V2ZY-2GP
M_A_DQ17 41 77 SRN10KJ-5-GP

2
M_A_DQ18 DQ17 NC#1
51 DQ18 NC#2 122
1D5V_S3
-1(5/9) DY
M_A_DQ19 53 125
M_A_DQ20 DQ19 NC#/TEST
40 DQ20
M_A_DQ21 42 75
M_A_DQ22 DQ21 VDD1
50 DQ22 VDD2 76
M_A_DQ23 52 81
M_A_DQ24 DQ23 VDD3
57 DQ24 VDD4 82 -1
M_A_DQ25 59 87
DQ25 VDD5
M_A_DQ26
M_A_DQ27
67 DQ26 VDD6 88
1D5V_S3
04/25
69 DQ27 VDD7 93
M_A_DQ28 56 94
M_A_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
M_A_DQ30 68 100
DQ30 VDD10

1
M_A_DQ31 70 105 C507 C565 C172 C527 C154 C150
DQ31 VDD11

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
M_A_DQ32 129 106
M_A_DQ33 DQ32 VDD12
131 111 DY DY

2
M_A_DQ34 DQ33 VDD13
141 DQ34 VDD14 112
M_A_DQ35 143 117
M_A_DQ36 DQ35 VDD15
130 DQ36 VDD16 118
M_A_DQ37 132 123
M_A_DQ38 DQ37 VDD17
140 DQ38 VDD18 124
M_A_DQ39 142
M_A_DQ40 DQ39
147 DQ40 VSS 2
M_A_DQ41 149 3
M_A_DQ42 DQ41 VSS
157 DQ42 VSS 8
M_A_DQ43 159 9
M_A_DQ44 DQ43 VSS C168
146 DQ44 VSS 13

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
M_A_DQ45 148 14 C156 C151 C166
M_A_DQ46 DQ45 VSS
158 DQ46 VSS 19
M_A_DQ47 160 20 DY

2
M_A_DQ48 DQ47 VSS
163 DQ48 VSS 25
M_A_DQ49 165 26
M_A_DQ50 DQ49 VSS
175 DQ50 VSS 31
M_A_DQ51 177 32
M_A_DQ52 DQ51 VSS
164 DQ52 VSS 37
2 M_A_DQ53 166 38 2
M_A_DQ54 DQ53 VSS
174 DQ54 VSS 43
M_A_DQ55
Layout Note:Near Pin 126 M_A_DQ56
176
181
DQ55 VSS 44
48
M_A_DQ57 DQ56 VSS
183 DQ57 VSS 49
M_A_DQ58 191 54
DDR_VREF_S3 M_A_DQ59 DQ58 VSS
193 DQ59 VSS 55
M_A_DQ60 180 60
M_A_DQ61 DQ60 VSS
182 DQ61 VSS 61
M_A_DQ62 192 65
M_A_DQ63 DQ62 VSS
194 DQ63 VSS 66
1

C143 71
VSS
SC2D2U6D3V3MX-1-GP

C140 M_A_DQS#0 10 72
SCD1U16V2ZY-2GP M_A_DQS#1 DQS0# VSS
8 M_A_DQS#[7..0] 27 127
2

M_A_DQS#2 DQS1# VSS


45 DQS2# VSS 128
M_A_DQS#3 62 133
M_A_DQS#4 DQS3# VSS
135 DQS4# VSS 134
M_A_DQS#5 152 138
M_A_DQS#6 DQS5# VSS
169 DQS6# VSS 139
M_A_DQS#7 186 144
DQS7# VSS
VSS 145
M_A_DQS0 12 150
M_A_DQS1 DQS0 VSS
8 M_A_DQS[7..0] 29 DQS1 VSS 151
M_A_DQS2
Layout Note:Near Pin 1 M_A_DQS3
47
64
DQS2 VSS 155
156
M_A_DQS4 DQS3 VSS
137 DQS4 VSS 161
M_A_DQS5 154 162
DDR_VREF_S3 M_A_DQS6 DQS5 VSS
171 DQS6 VSS 167
M_A_DQS7 188 168
DQS7 VSS
VSS 172
7 M_ODT0 116 ODT0 VSS 173
7 M_ODT1 120 ODT1 VSS 178
1

C220 179
VSS
SC2D2U6D3V3MX-1-GP

C224 DDR_VREF_S3 126 184


SCD1U16V2ZY-2GP DDR_VREF_S3 VREF_CA VSS
1 185
2

VREF_DQ VSS
VSS 189
7,13 DDR3_DRAMRST# 30 RESET# VSS 190
VSS 195
VSS 196
DDR_VREF_S3 203 VTT1 VSS 205
204 VTT2 VSS 206
1

1 C96 C100 1
SC1U10V3ZY-6GP

SC10U6D3V5MX-3GP

DDR3-204P-9-GP
2

62.10017.G11

High 5.2mm
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 Socket
Size Document Number Rev
-1M
Four Peaks
Date: Friday, November 21, 2008 Sheet 12 of 57
A B C D E
A B C D E

4
DDR3 SOCKET_2 4

DM2
8 M_B_A[14..0]
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 A1 NP2 NP2
M_B_A2 96
M_B_A3 A2
95 A3 RAS# 110 M_B_RAS# 8
M_B_A4 92 113 M_B_WE# 8
M_B_A5 A4 WE#
91 A5 CAS# 115 M_B_CAS# 8
M_B_A6 90
M_B_A7 A6
86 A7 CS0# 114 M_CS2# 7
M_B_A8 89 121 M_CS3# 7
M_B_A9 A8 CS1#
85 A9
M_B_A10 107 73 M_CKE2 7
M_B_A11 A10/AP CKE0
84 A11 CKE1 74 M_CKE3 7
M_B_A12 83
M_B_A13 A12
119 A13 CK0 101 M_CLK_DDR2 7
M_B_A14 80 103 M_CLK_DDR#2 7
M_B_A15 A14 CK0#
TP95
78 A15
8 M_B_BS#2 79 A16/BA2 CK1 102 M_CLK_DDR3 7
CK1# 104 M_CLK_DDR#3 7
8 M_B_BS#0 109 BA0 M_B_DM[7..0] 8
8 M_B_BS#1 108 11 M_B_DM0
BA1 DM0 M_B_DM1
DM1 28
M_B_DQ0 5 46 M_B_DM2
M_B_DQ1 DQ0 DM2 M_B_DM3
8 M_B_DQ[63..0] 7 DQ1 DM3 63
M_B_DQ2 15 136 M_B_DM4
M_B_DQ3 DQ2 DM4 M_B_DM5
17 DQ3 DM5 153
M_B_DQ4 4 170 M_B_DM6
M_B_DQ5 DQ4 DM6 M_B_DM7
6 DQ5 DM7 187
M_B_DQ6 16
M_B_DQ7 DQ6
18 DQ7 SDA 200 SMBD_ICH 3,12,22
M_B_DQ8 21 202 SMBC_ICH 3,12,22
M_B_DQ9 DQ8 SCL
23 DQ9
M_B_DQ10 33 198 3D3V_M
DQ10 EVENT# PM_EXTTS#0 7,12
M_B_DQ11 35
M_B_DQ12 DQ11
22 DQ12 VDDSPD 199
3 M_B_DQ13 24 10KR2J-3-GP 3
M_B_DQ14 DQ13 DDRB_SA0 R113 1
34 DQ14 SA0 197 2 DY

1
M_B_DQ15 36 201 DDRB_SA1 2 1 C105
DQ15 SA1

SC2D2U6D3V2MX-GP
M_B_DQ16 39 R103 C111
DQ16

SCD1U16V2ZY-2GP
M_B_DQ17 41 77 10KR2J-3-GP

2
M_B_DQ18 DQ17 NC#1
51 DQ18 NC#2 122
M_B_DQ19 53 125 1D5V_S3
M_B_DQ20 DQ19 NC#/TEST
40 DQ20
M_B_DQ21 42 75
M_B_DQ22 DQ21 VDD1
50 DQ22 VDD2 76
M_B_DQ23 52 81
M_B_DQ24 DQ23 VDD3
57 DQ24 VDD4 82
M_B_DQ25 59 87
M_B_DQ26 DQ25 VDD5
67 DQ26 VDD6 88
M_B_DQ27 69 93
M_B_DQ28 DQ27 VDD7
56 DQ28 VDD8 94
M_B_DQ29 58 99
M_B_DQ30 DQ29 VDD9
68 DQ30 VDD10 100
M_B_DQ31 70 105 1D5V_S3
M_B_DQ32 DQ31 VDD11
129 DQ32 VDD12 106
M_B_DQ33 131 111
M_B_DQ34 DQ33 VDD13
141 112 DY
NORMAL TYPE

DQ34 VDD14

1
M_B_DQ35 143 117 C164 C147 C163 C142 C139 C155 TC22
DQ35 VDD15

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
M_B_DQ36 130 118
DQ36 VDD16

ST330U6VDM-2-GP
M_B_DQ37 132 123

2
M_B_DQ38 DQ37 VDD17
140 DQ38 VDD18 124
M_B_DQ39 142
M_B_DQ40 DQ39
147 DQ40 VSS 2
M_B_DQ41 149 3
M_B_DQ42 DQ41 VSS
157 DQ42 VSS 8
M_B_DQ43 159 9
M_B_DQ44 DQ43 VSS
146 DQ44 VSS 13
M_B_DQ45 148 14
M_B_DQ46 DQ45 VSS
158 DQ46 VSS 19
M_B_DQ47 160 20 DY C170
DQ47 VSS

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
M_B_DQ48 163 25 C137 C148 C157
M_B_DQ49 DQ48 VSS
165 DQ49 VSS 26
M_B_DQ50 175 31

2
M_B_DQ51 DQ50 VSS
Layout Note:Near Pin 126 M_B_DQ52
177
164
DQ51 VSS 32
37
M_B_DQ53 DQ52 VSS
166 DQ53 VSS 38
2 M_B_DQ54 174 43 2
DDR_VREF_S3 M_B_DQ55 DQ54 VSS
176 DQ55 VSS 44
M_B_DQ56 181 48
M_B_DQ57 DQ56 VSS
183 DQ57 VSS 49
M_B_DQ58 191 54
M_B_DQ59 DQ58 VSS
193 DQ59 VSS 55
1

C500 M_B_DQ60 180 60


DQ60 VSS
SC2D2U6D3V3MX-1-GP

C496 M_B_DQ61 182 61


SCD1U16V2ZY-2GP M_B_DQ62 DQ61 VSS
192 65
2

M_B_DQ63 DQ62 VSS


194 DQ63 VSS 66
VSS 71
M_B_DQS#0 10 72
M_B_DQS#1 DQS0# VSS
8 M_B_DQS#[7..0] 27 DQS1# VSS 127
M_B_DQS#2 45 128
M_B_DQS#3 DQS2# VSS
62 DQS3# VSS 133
M_B_DQS#4 135 134
M_B_DQS#5 DQS4# VSS
152 DQS5# VSS 138
M_B_DQS#6 169 139
M_B_DQS#7 DQS6# VSS
Layout Note:Near Pin 1 186 DQS7# VSS 144
145
M_B_DQS0 VSS
12 DQS0 VSS 150
DDR_VREF_S3 M_B_DQS1 29 151
8 M_B_DQS[7..0] DQS1 VSS
M_B_DQS2 47 155
M_B_DQS3 DQS2 VSS
64 DQS3 VSS 156
M_B_DQS4 137 161
M_B_DQS5 DQS4 VSS
154 DQS5 VSS 162
1

C219 M_B_DQS6 171 167


DQS6 VSS
SC2D2U6D3V3MX-1-GP

C223 M_B_DQS7 188 168


SCD1U16V2ZY-2GP DQS7 VSS
172
2

VSS
7 M_ODT2 116 ODT0 VSS 173
7 M_ODT3 120 ODT1 VSS 178
VSS 179
DDR_VREF_S3 126 184
DDR_VREF_S3 VREF_CA VSS
1 VREF_DQ VSS 185
VSS 189
7,12 DDR3_DRAMRST# 30 RESET# VSS 190
VSS 195
VSS 196
DDR_VREF_S3 203 VTT1 VSS 205
204 VTT2 VSS 206
1

C87 C90
SC1U10V3ZY-6GP

SC10U6D3V5MX-3GP

1 1
DDR3-204P-8-GP
2

62.10017.G21

High 9.2 mm

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 Termination Resistor


Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 13 of 57
A B C D E
5 4 3 2 1

D D

C C

LEFT_BTN1 RIGHT_BTN1
TP_LEFT 29,41 TP_RIGHT 29,41

1 3 1 3

5 5

2 4 2 4

SW-TACT-122-GP SW-TACT-122-GP
62.40009.681 62.40009.681
62.40009.671 62.40009.671

Wireless ON/OFF
BlueTooth ON/OFF Check Wireless Button left or right
WLAN_BTN1
WIRELESS_BTN#_1
B B

62.40018.401 62.40018.411
BT_BTN1
1

2
3

SW-SLIDE68-GP

A
B
4

NP1
NP2
C
D
SW-SS3-CMSC-V-T-GP
62.40066.001 3G_BTN#_1
62.40068.001 BLT_BTN#_1

3D3V_S0

RN42 RN43
1 8 BLT_BTN#_1 1 8
41 BT_BTN# 2 7 WIRELESS_BTN#_1 2 7
41 WIRELESS_BTN# 3 6 3G_BTN#_1 3 6
41 3G_BTN# 4 5 4 5
A Four Peaks A
1

EC87 EC86 EC90


SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY DY DY
SRN470J-3-GP SRN10KJ-6-GP
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

SWITCH / Button
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 14 of 57
5 4 3 2 1
LCD/INVERTER/CCD CONN LCDVDD
Inverter Pin

SCD1U16V2ZY-2GP
RN11 Pin Symbol
G72_TXACLK- 1 8 GMCH_TXACLK- 7

1
LCD1 C8 G72_TXACLK+ 2 7 GMCH_TXACLK+ 7 1 Vin
41 DY G72_TXAOUT2- 3 6 GMCH_TXAOUT2- 7
-1 20 USBPN8 2 1USBPN8_R 2 1 G72_TXAOUT2+ 4 5 GMCH_TXAOUT2+ 7 2 Vin

2
R2 0R2J-2-GP
-1
04/23 20 USBPP8 2
R1
1USBPP8_R
0R2J-2-GP
4 3 DY UMASRN0J-7-GP 3 PWM
6 5 2R9 0R2J-2-GP
1 RN10
CCD1 8 7 2R10 DY0R2J-2-GP
1 G72_TXAOUT0- 1 8 GMCH_TXAOUT0- 7 4 BLON
41 LCD_CB_SEL 3D3V_S0 TXBCLK+
5 10 9 1R13 0R0402-PAD
2 G72_TXBCLK+ 46 G72_TXAOUT0+ 2 7 GMCH_TXAOUT0+ 7
12 11 TXBCLK- 1R14 0R0402-PAD
2 G72_TXBCLK- 46 G72_TXAOUT1- 3 6 GMCH_TXAOUT1- 7 5 GND
1 CCD_PWR 14 13 G72_TXBOUT2+ G72_TXBOUT2+ 46 G72_TXAOUT1+ 4 5 GMCH_TXAOUT1+ 7
LCD_EDID_CLK 16 15 G72_TXBOUT2- G72_TXBOUT2- 46 6 GND
2 USBPN8 LCD_EDID_DAT 18 17 G72_TXBOUT1+ G72_TXBOUT1+ 46 UMASRN0J-7-GP
3 USBPP8 20 19 G72_TXBOUT1- G72_TXBOUT1- 46
4 CCD_PWR 22 21 G72_TXBOUT0+ G72_TXBOUT0+ 46 RN5 CCD Pin
24 23 G72_TXBOUT0- G72_TXBOUT0- 46 G72_TXBCLK- 1 8 GMCH_TXBCLK- 7
6 BRIGHTNESS_CN_L 26 25 TXACLK+ 1R15 0R0402-PAD
2 G72_TXACLK+ 46 G72_TXBCLK+ 2 7 GMCH_TXBCLK+ 7 Pin Symbol
BLON_OUT_L 28 27 TXACLK- 1R16 0R0402-PAD
2 G72_TXACLK- 46 G72_TXBOUT2- 3 6 GMCH_TXBOUT2- 7
ACES-CON4-GP-U1 30 29 G72_TXAOUT2+ G72_TXAOUT2+ 46 G72_TXBOUT2+ 4 5 GMCH_TXBOUT2+ 7 1 GND
20.F0714.004 32 31 G72_TXAOUT2- -1(5/9) G72_TXAOUT2- 46
20.F1000.004 34 33 G72_TXAOUT1+ G72_TXAOUT1+ 46 UMASRN0J-7-GP 2 GND
DCBATOUT 36 35 G72_TXAOUT1- G72_TXAOUT1- 46
F2 38 37 G72_TXAOUT0+ G72_TXAOUT0+ 46 RN6 3 5V
1 2 40 39 G72_TXAOUT0- G72_TXAOUT0- 46 G72_TXBOUT0- 1 8 GMCH_TXBOUT0- 7
C379 42 DY G72_TXBOUT0+ 2 7 GMCH_TXBOUT0+ 7 4 USB-

1
POLYSW-1D1A24V-GP 2R11 0R2J-2-GP
1 G72_TXBOUT1- 3 6 GMCH_TXBOUT1- 7

SC10U35V0ZY-GP
69.50007.A31 2R12 0R2J-2-GP
1 G72_TXBOUT1+ 4 5 GMCH_TXBOUT1+ 7 5 USB+
ACES-CONN40A-2GP DY

2
20.F0993.040 SRN0J-7-GP
20.F1048.040 Place near LCD conn. UMA

CCD1 Conn. Test Point


R7 2 DY 1 L_BKLTCTL 7
RN46 0R2J-2-GP
CCD_PWR 1 TP225 AFTE30-GP BRIGHTNESS_CN_L 2 3 BRIGHTNESS_CN R8 2 1 BRIGHTNESS 41
BLON_OUT_L 1 4 0R2J-2-GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
USBPN8 1 TP227 AFTE30-GP BLON_OUT BLON_OUT 41

1
SRN33J-5-GP-U

1
USBPP8 1 TP228 AFTE30-GP C10 C7 R4

10KR2J-3-GP
2

2
-1M(5/27)
3D3V_S0

3D3V_S0

1
2
UMA LCDVDD
U1 SRN2K2J-1-GP
7 GMCH_LCDVDD_ON 1 2
R5 0R2J-2-GP RN26
Layout 40 mil 1 9

4
3
IN#1 GND
2 OUT IN#8 8
46 LCDVDD_ON 3 7 LCD_EDID_CLK
3D3V_S0 EN IN#7 46 LCD_EDID_CLK
DY DY
4 GND IN#6 6
5
-1 LCD_EDID_DAT
IN#5 46 LCD_EDID_DAT
2

1
SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP
1 2 2 1 C6 C5 C4

SC4D7U10V5ZY-3GP
DIS R3 DY SRN0J-6-GP
1

R251 R599 10KR2J-3-GP G5281RC1U-GP 7 CLK_DDC_EDID 1 4


2

R348 330R2J-3-GP 100R2F-L1-GP-U 2 7 DAT_DDC_EDID 2 3

2
100KR2J-1-GP

DY
1

U67 RN51
UMA
2

1 PGOOD GND 8
LCDVDD_ON 2 7
EN ADJ
5V_S0 3 VIN VOUT 6 LCDVDD
4 5
GND

VDD NC#5
DY DY
1

C672 C464
SC10U10V5KX-2GP

SC10U10V5KX-2GP

DY RT9025-25PSP-GP
9

74.09025.03D
2

Vout = 0.8 x (R1+R2)/R2


= 3.44V F1
1 2 3D3V_S0
FUSE-1A6V-2-GP

CCD_PWR
1

C377 C378
SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

Four Peaks
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD CONN
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 15 of 57
5 4 3 2 1

-1
1 2 FRONT_PWRLED#_E 31
R81

R80
FRONT_PWRLED#_Q
1
75R2J-1-GP

2
LED 1
R629
-1
2 BLT_LED#_1_R
1K13R2F-1-GP
SB
K
BT_LED1

A
5V_S0

100R2J-2-GP LED-B-77-GP-U2

C
E
83.01221.I70

C
E
Q47
Q4 DDTC143ZUA-7-F-GP Blue-tooth LED

R2
DDTC143ZUA-7-F-GP

R2

R1
3D3V_S5

R1
D D

B
B
41 BT_LED
41 FRONT_PWRLED PWR_LED1
-1(05/14)
FRONT_PWRLED#_R3 3D3V_S0
2 -1
R628
R75 WLAN_LED1 LED-Y-70-GP
STDBY_LED#_Q 1 2STDBY_LED#_R 4 1 WLAN_LED# 1 2 1 2 WLAN_LED#_R
K A
100R2J-2-GP 36 WLAN_LED# R627 820R2J-GP 83.01221.Q70
SC

C
R647

E
LED-YG-50-GP 33R2J-2-GP 3G_LED1
Q2 83.19223.B70 1 2 3G_LED#_L 1 2 3G_LED#_R
K A
36 3G_LED# R630 430R2J-GP
DDTC143ZUA-7-F-GP -1 Power LED 33R2J-2-GP LED-G-147-GP

R2

D
83.01221.N70

R1
1 2 STDBY_LED#_E 31

D
R76 75R2J-1-GP Q44
2N7002-11-GP Q48

B
G 2N7002-11-GP
3D3V_AUX_S5 41 WLAN_TEST_LED WLAN_TEST_LED
41 STDBY_LED CHARGER_LED1
G 2nd = 84.27002.N31
-1(05/14) 2nd = 84.27002.N31

S
R625

S
1 2DC_BATFULL#_R 3 2
100R2J-2-GP
R626
C
E

1 2CHARGE_LED#_R 4 1
Q45 100R2J-2-GP
C DDTC143ZUA-7-F-GP C
LED-YG-50-GP R126
R2

83.19223.B70 NUM_LED#_R 2 NUM_LED#


R1

1
100R2J-2-GP
Charger LED

C
E
B

Q10
41 DC_BATFULL
DDTC143ZUA-7-F-GP

R2

R1
C
E

Q46

B
DDTC143ZUA-7-F-GP
R2

C113 41 NUM_LED
R1

LEDCN1 1 2
7
B

SC1U16V3ZY-GP
1 3D3V_S0 R118
41 CHARGE_LED CAP_LED#_R 1 2 CAP_LED#
NUM_LED# 100R2J-2-GP
2
3 CAP_LED#
-1

C
E
4 MEDIA_LED#_1 1 R123 2
0R0402-PAD MEDIA_LED# 19 Q9
5
6 DDTC143ZUA-7-F-GP

R2

R1
8
Power CN Test Point
EC15

EC13

EC16
-1(5/9)

B
B ACES-CON6-8GP B
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

3D3V_S0 TP240 AFTE30-GP SC1KP50V2KX-1GP


1 20.K0228.006 41 CAP_LED
NUM_LED# TP41 AFTE30-GP
20.K0286.006
1

CAP_LED# 1 TP37 AFTE30-GP


3D3V_AUX_S5
MEDIA_LED# 1 TP38 AFTE30-GP -1M(5/27)

1
3D3V_AUX_S5
R616
10KR2J-3-GP
D17

2
KBC_PWRBTN#_CN 2 1 KBC_PWRBTN# 41 2
31,44 KBC_PWRBTN#_CN

1
R614 3 DY
G97 470R2J-2-GP

1
GAP-OPEN 1
C649
SCD1U16V2ZY-2GP

2
BAV99PT-GP-U

A Four Peaks A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED&POWERBD CONN
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 16 of 57
5 4 3 2 1
A B C D E

Layout Note:
Place these resistors
close to the CRT-out
connector
Ferrite bead impedance: 10 ohm@100MHz
Hsync & Vsync level shift
L26
5V_S0 5V_S0
1 2 CRT_R
44 CRT_R_SYS FCB1608CF-GP

1
68.00230.021
R513 C501
L24 SCD1U16V2ZY-2GP
4 100KR2J-1-GP 4

2
1 2 CRT_G
44 CRT_G_SYS FCB1608CF-GP

1
68.00230.021 DOCK_IN# SYS_CRT_ON#
U54A

14
L21

1
1 2 CRT_B For System CRT

D
44 CRT_B_SYS FCB1608CF-GP CRT_HSYNC1_1

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP
2 3
1

1
R511 R499 R488 C522 C504 C492 68.00230.021 C523 C505 C493 Q41 RN54
R519
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
TSAHCT125PW-GP CRT_HSYNC1

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP

SC6D8P50V2DN-GP
2N7002-11-GP 2 3
2DOCK_ON_3# G U54B CRT_VSYNC1

14
1 1 4

7
4
DY DY DY SRN0J-6-GP

S
2

10KR2J-3-GP CRT_VSYNC1_1
5 6
TSAHCT125PW-GP

7
5V_S0

2ND = 84.27002.N31 -1(5/9)


-1 DOCK_IN# 18,38,41,44,45

14

13
DIS U54D
Layout Note: RN55
HSYNC_4 CRT_HSYNC2
* Must be a ground return path between this ground and the ground on 46 CRT_HSYNC 2
1
3
4
12 11
RN53 For Dock CRT
46 CRT_VSYNC
3
the VGA connector. SRN0J-6-GP TSAHCT125PW-GP
1 4 DOCK_HSYNC 44
3

14

10
2 3 DOCK_VSYNC 44

7
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT RN52 U54C
SRN33J-5-GP-U
7 GMCH_HSYNC 1 4
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. 7 GMCH_VSYNC 2 3 VSYNC_4 9 8 CRT_VSYNC2

SRN0J-6-GP
UMA TSAHCT125PW-GP

7
Function DOCK_CRT_SEL#
SYSTEM H
DOCK L

CRT I/F & CONNECTOR


DDC_CLK & DATA level shift 5V_S0
3D3V_S0

A
2 3D3V_S0 5V_CRT_S0 2
D37

CRT1
SC RB551V30-GP
83.R5003.H8H
17

K
MH1 F3 500mA
6 5V_CRT_S0 1 2 5V_CRT_DDC

4
3
11

8
7
6
5
CRT_R 1 RN32 FUSE-1D1A6V-4GP-U
7 SRN2K2J-1-GP RN33
SRN10KJ-6-GP
DAT_DDC1_5
SC100P50V2JN-3GP

12
2 CRT_G
U56

1
2
1

1
2
3
4
C533 CRT_HSYNC1 CRT_IN#_R
CRT_B 3
13 -1 4 3 DAT_DDC1_5 44
2

9 5V_CRT_S0
SCD01U16V2KX-3GP

CRT_VSYNC1 14 UMA 5 2
1

C499 C497 RN56


SC18P50V2JN-1-GP

4
1

10 2 3 DAT_DDC1_5_Q 6 1
7 GMCH_DDCDATA
C498 CLK_DDC1_5
SC18P50V2JN-1-GP

15 7 GMCH_DDCCLK 1 4
2
SC100P50V2JN-3GP

5
2

MH2 C491 SRN0J-6-GP


2N7002DW-1-GP
16
6
2

SRN0J-6-GP
1 VIDEO-15-79-GP-U
46 CRT_DDCDATA 1 4 2nd = 84.27002.C3F CLK_DDC1_5 44
20.20722.015 2 3 CLK_DDC1_5_Q
46 CRT_DDCCLK
1 7 R474 20.20717.015 Four Peaks 1
RN57
2 2 1CRT_IN#_R DIS
41,44 CRT_DEC#
8 BAV99PT-GP-U Wistron Corporation
1

470R2J-2-GP C488 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


3 SC100P50V2JN-3GP 2 Taipei Hsien 221, Taiwan, R.O.C.
3D3V_S0
9
2

3 DY Title
4
D6 1 CRT CONN
10 Size Document Number Rev

5 Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 17 of 57
A B C D E
5 4 3 2 1

-1(05/14)
DVI1
-1
30 5V_S0
28
NP1

A
9 TMDS_TX1-_MB 5V_S0_DVI
TMDS_TX0-_MB 17 1 TMDS_TX2-_MB D23
10 TMDS_TX1+_MB RB551V30-GP
TMDS_TX0+_MB 18 2 TMDS_TX2+_MB
83.R5003.H8H
26 11

K
4
3
19 3 5V_S0
12 RN25
20 4 5V_S0_DVI
D SRN4K7J-8-GP D
13

1
21 5
5V_S0_DVI D31 3D3V_S0
14 DY

1
2
22 6 DVI_TMDS_SCL BAV99-5-GP
15
TMDS_TXC+_MB 23 7 DVI_TMDS_SDA
16 DVI_A_HPD_1

4
3
TMDS_TXC-_MB 24 8
25 RN3

1
NP2 EC62 DY DY UMA
27 EC61 SRN4K7J-8-GP

SC220P50V2JN-3GP

SC220P50V2JN-3GP
29

2
EC64 2 DY 1SCD1U10V2KX-4GP

1
2
TYCO-CONN24-3R-6-GP-U
C376 2 1SC1U16V3ZY-GP 5V_S0_DVI UMA RN4
7 GMCH_HDMI_CLK 2 3 NV_DVI_CLK NV_DVI_CLK 46
7 GMCH_HDMI_DATA 1 4 NV_DVI_DAT NV_DVI_DAT 46
SRN0J-6-GP

3D3V_S0
From MXM
DIS RN13
46 TMDS_A_TX2- 4 5
46 TMDS_A_TX2+ 3 6

2
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2 7 C9 C12 C14 C11
46 TMDS_A_TX1-
46 TMDS_A_TX1+ 1 8
1

1
SRN0J-7-GP
DIS RN9
46 TMDS_A_TX0- 4 5

1
C C

2
3 6 C13
46 TMDS_A_TX0+ SC2D2U10V3KX-1GP
46 TMDS_A_TXC- 2 7
1 8 VBIAS 3D3V_S0
46 TMDS_A_TXC+
SRN0J-7-GP

UMA RN12

36
35
34
33
32
31
30
29
28
27
26
25
1 8 U2
7,46 PEG_TXN0
2 7

IN1P
VBIAS

OUT2D1P

OUT2D2P

OUT2D3P
IN1N

CEXT

OUT2D1N
GND

OUT2D2N
VCC

OUT2D3N
7,46 PEG_TXP0 TMDS_TXC+_DOCK 44
7,46 PEG_TXN1 3 6 TMDS_TXC-_DOCK 44
7,46 PEG_TXP1 4 5 TMDS_TX0+_DOCK 44
TMDS_TX0-_DOCK 44
SRN0J-7-GP TMDS_TX1+_DOCK 44
UMA RN7 37 IN2P OUT2D4P 24 TMDS_TX1-_DOCK 44
1 8 DVI_TX_R_0- 38 23 TMDS_TX2+_DOCK 44
7,46 PEG_TXN2 DVI_TX_R_0+ IN2N OUT2D4N
7,46 PEG_TXP2 2 7 39 VCC GND 22 TMDS_TX2-_DOCK 44
3 6 DVI_TX_R_CLK- 40 21 TMDS_SCL 44
7,46 PEG_TXN3 DVI_TX_R_CLK+ IN3P SCL2_AUX2P
7,46 PEG_TXP3 4 5 41 IN3N SDA2_AUX2N 20 TMDS_SDA 44
SRN0J-7-GP
42 GND HPD2 19
I2C_ADDR
TMDS_HPD_DOCK 44 TO DOCK CONN
From NB 43 IN4P MODE/I2C_ADDR 18
DVI_TX_R_1- 44 17 TO SYSTEM CONN
DVI_TX_R_1+ NV_DVI_CLK IN4N OUT1D1P
45 SCL_SRC OUT1D1N 16
NV_DVI_DAT 46 15 3D3V_S0 TMDS_TXC+_MB
DVI_TX_R_2- HPD_SRC SDA_SRC VCC TMDS_TXC-_MB
47 HPD_SRC OUT1D2P 14
DVI_TX_R_2+ 48 13 TMDS_TX0+_MB
REXT OUT1D2N TMDS_TX0-_MB
49

OE#/SCL_CTL

SDA1_AUX1N
GND

SW/SDA_CTL
2

SCL1_AUX1P
TMDS_TX1+_MB

I2C_CTL_EN
R23 TMDS_TX1-_MB

OUT1D4N

OUT1D3N
OUT1D4P

OUT1D3P
499R2F-2-GP TMDS_TX2+_MB

HPD1
TMDS_TX2-_MB

GND
VCC
1

PS8122QFN48G-GP
CH1 CH2
1
2
3
4
5
6
7
8
9
10
11
12
B B

71.08122.A03
SDA_CTL
SCL_CTL

DVI DOCK -1(5/9)


37,41,46 SMBD_Therm 1R439 2
37,41,46 SMBC_Therm 10R0402-PAD
2
L H R648 0R0402-PAD
3D3V_S0

3D3V_S0 1 R17 2
4K7R2F-GP 3D3V_S0
DVI_A_HPD_1
3D3V_S0
DVI_TMDS_SDA

1
DVI_TMDS_SCL
R85
2

10KR2F-2-GP
R19
0R2J-2-GP 3D3V_S0

2
DIS
DOCK_IN
SB
1

VBIAS 3D3V_S0
UMA
1

D
2

R637 I2C_ADDR 1 2
R18 20KR2J-L2-GP DY R6 4K7R2F-GP Q5
0R2J-2-GP DOCK_IN 1 R87 2SDA_CTL 1 2DY BSS138-7F-GP
UMA 0R2J-2-GP R86 1KR2J-1-GP G DOCK_IN# 17,38,41,44,45
2

DVI_DETECT# 7 20 ISO_PREP# 1 2SCL_CTL 1 2DY


1

4K7R2J-2-GP R135 1KR2J-1-GP

S
DY R134
1
D

A A
R638
Q49 7K5R2F-1-GP UMA Four Peaks
2N7002-11-GP UMA DVI_DETECT_R 1 2 HPD_SRC
DVI_DETECT_R G R21 1KR2J-1-GP
2

UMA 2ND = 84.27002.N31 1 2


46 DVI_A_HPD
Wistron Corporation
1

R22 1KR2J-1-GP
S

R636 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


20KR2J-L2-GP DIS Taipei Hsien 221, Taiwan, R.O.C.
UMA
Title
2

DVI CONNECTOR
Size Document Number Rev
Custom
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 18 of 57
5 4 3 2 1
5 4 3 2 1

C128 SC10P50V2JN-4GP
RTC1 CN Test Point 1 2 RTC_X1

RTC_BAT 1 TP280 AFTE30-GP

4
X2

1
3D3V_AUX_S5 D34 X-32D768KHZ-38GPU R138
2 RTC_AUX_S5 10MR2J-L-GP

SC1U16V3ZY-GP
3

2
1
D D
1 C518

RTC_BAT_R

2
C129 SC10P50V2JN-4GP SB1A 1 OF 6 LPC_LAD[0..3]
LPC_LAD[0..3] 41,42,44
RTC1 BAS40CW-GP 1 2
5 C23 K5 LPC_LAD0
RTC_X2 RTCX1 FWH0/LAD0 LPC_LAD1
C24 RTCX2 FWH1/LAD1 K4
L6 LPC_LAD2
RTC_BAT 1 R496 1 FWH2/LAD2
1 2 2 20KR2J-L2-GP RTC_RST# A25 RTCRST# FWH3/LAD3 K2 LPC_LAD3

RTC
LPC
R221 1KR2J-1-GP R524 1 2 20KR2J-L2-GP SRTC_RST# F20
INTRUDER# SRTCRST#
2 1 2 C22 INTRUDER# FWH4/LFRAME# K3 LPC_LFRAME# 41,42,44
1

3 DY C248 R522 1MR2J-1-GP

2
SCD1U16V2ZY-2GP

C542 C495 G31 INTVRMEN B22 J3 LDRQ0# LDRQ0# 44


INTVRMEN LDRQ0#

SC1U16V3ZY-GP

SC1U16V3ZY-GP
LAN100_SLP A22 J1 3D3V_LDRQ1_S0
2

LAN100_SLP LDRQ1#/GPIO23 1D05V_S0

GAP-OPEN
4 TP183 TPAD30

2
32 GLANCLK E25 GLAN_CLK A20GATE N7 KA20GATE 41

1
MLX-CON3-6-GP-U AJ27 H_A20M# 4

1
A20M#
20.F0700.003 32 LAN_RSTSYNC C13 LAN_RSTSYNC
AJ25 H_DPRSTP# R571
DPRSTP# H_DPRSTP# 4,7,49

LAN / GLAN
20.F0735.003 F14 AE23 H_DPSLP# 4 56R2J-4-GP
32 LAN_RXD0 LAN_RXD0 DPSLP#
G13

2
32 LAN_RXD1 LAN_RXD1 H_FERR#_R
32 LAN_RXD2 D14 LAN_RXD2 FERR# AJ26 1 2 H_FERR# 4
R566 56R2J-4-GP
32 LAN_TXD0 D13 LAN_TXD0 CPUPWRGD AD22 H_PWRGD 4,47
3D3V_AUX_S5 RTC_AUX_S5 GLAN_COMP place D12
32 LAN_TXD1 LAN_TXD1
within 500 mil of ICH9M 32 LAN_TXD2 E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 4

CPU
1D5V_S0 GLAN_DOCK# B10 AE22
GLAN_DOCK#/GPIO56 INIT# H_INIT# 4
1

EC74 EC75
-1 INTR AG25 H_INTR 4

1
SC1U25V5KX-1GP

SC1U25V5KX-1GP

EC22
C SC20P50V2JN-1GP 1 2 GLAN_COMP B28 GLAN_COMPI RCIN# L3 KBRCIN# 41
C
R525 24D9R2F-L-GP B27
2

GLAN_COMPO
27 ACZ_BTCLK_MDC DYR570 1
2 2 33R2J-2-GP NMI AF23 H_NMI 4 1D05V_S0
38 ACZ_BITCLK R569 1 2 33R2J-2-GP ACZ_BIT_CLK_R AF6 AF24 H_SMI# 4 R561
R564 1 HDA_BIT_CLK SMI#
27,38 ACZ_SYNC 2 33R2J-2-GP ACZ_SYNC_R AH4 HDA_SYNC 1 2
AH27 H_STPCLK# 4 56R2J-4-GP
R581 1 STPCLK#
27,38 ACZ_RST# 2 33R2J-2-GP ACZ_RST#_R AE7 HDA_RST#
AG26 H_THERMTRIP_R 1 2 PM_THRMTRIP-A# 4,7,47
THRMTRIP# R562 54D9R2F-L1-GP
38 ACZ_SDATAIN0 AF4 HDA_SDIN0
AG4 AG27 ICH_TP8 TP191 TPAD30 DY Layout note: R373 needs to placed
27 ACZ_SDATAIN1 HDA_SDIN1 PECI
TPAD30 TP120 ACZ_SDATAIN2 within 2" of ICH9, R379 must be

IHDA
AH3 HDA_SDIN2
TPAD30 TP189 ACZ_SDATAIN3 AE5 placed within 2" of R373 w/o stub
3D3V_S0 HDA_SDIN3
SATA4RXN AH11
27,38 ACZ_SDATAOUT R576 1 2 33R2J-2-GP ACZ_SDATAOUT_R AG5 AJ11
HDA_SDOUT SATA4RXP
SATA4TXN AG12
1 DY 2 HDA_DOCK_EN# AG7 AF12
TPAD30 TP188 HDA_DOCK_RST# R567 8K2R2J-3-GP HDA_DOCK_EN#/GPIO33 SATA4TXP
AE8 HDA_DOCK_RST#/GPIO34
SATA5RXN AH9
41 HDA_DOCK_EN# HDA_DOCK_EN# 16 MEDIA_LED# AG8 AJ9
SATALED# SATA5RXP
SATA5TXN AE10
24 SATA_RXN0 C609 1 2 SCD01U50V2KX-1GP SATA_RXN0_C AJ16 AF10
C610 SCD01U50V2KX-1GP SATA_RXP0_C SATA0RXN SATA5TXP
1 2 AH16

SATA
24 SATA_RXP0
HDD 24
24
SATA_TXN0
SATA_TXP0
C600
C601
1
1
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_TXN0_C
SATA_TXP0_C
AF17
AG17
SATA0RXP
SATA0TXN
SATA0TXP
SATA_CLKN
SATA_CLKP
AH18
AJ18
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3

23 SATA_RXN1 C605 1 2 SCD01U50V2KX-1GP SATA_RXN1_C AH13 AJ7 SATARBIAS


C606 SCD01U50V2KX-1GP SATA_RXP1_C SATA1RXN SATARBIAS#
23 SATA_RXP1 1 2 AJ13 AH7 2 1

B
BAY 23
23
SATA_TXN1
SATA_TXP1
C607
C608
1
1
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_TXN1_C
SATA_TXP1_C
AG14
AF14
SATA1RXP
SATA1TXN
SATA1TXP
SATARBIAS 24D9R2F-L-GP R565
B
Place within 500 mils of
1D05V_S0 3D3V_S0
ICH9 ball
ICH9M-GP-NF
71.ICH9M.00U

2
1
RN35
SRN10KJ-5-GP

3D3V_S5 RTC_AUX_S5 RTC_AUX_S5

3
4
R520
1

1 2 GLAN_DOCK# H_INIT#_G
10KR2J-3-GP R497 R498
330KR2F-L-GP 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5

B
2

3D3V_S0 INTVRMEN LAN100_SLP INTVRMEN Q43


R572 High=Enable Low=Disable
H_INIT# E C FWH_INIT#
FWH_INIT# 42
1

1 2 MEDIA_LED# integrated VccLan1_05VccCL1_05


10KR2J-3-GP DY R492 DY R493
0R2J-2-GP 0R2J-2-GP LAN100_SLP MMBT3904-3-GP
High=Enable Low=Disable
2nd = 84.03904.L06
2

Four Peaks
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (1 of 4)
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 19 of 57

5 4 3 2 1
5 4 3 2 1
SB1C 3 OF 6
SRN10KJ-6-GP
SB1B 2 OF 6 G16 AH23 SATA0GP 5 4
25,30 PCI_AD[31..0] 22,34,36 SMB_CLK SMBCLK SATA0GP/GPIO21
A13 AF19 SATA1GP 6 3
22,34,36 SMB_DATA SMBDATA SATA1GP/GPIO19
PCI_AD0 D11 F1 PCI_REQ#0 30 RN31 SMB_LINK_ALERT# E17 AE21 ICH_GPIO36 7 2

SATA
AD0 REQ0# LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36

GPIO
SMB
PCI_AD1 SMLINK0 ICH_GPIO37
PCI_AD2
C8
D9
AD1 PCI GNT0# G4
B6 PCI_REQ#1
PCI_GNT#0 30 4
3
1
2
C17
SMLINK1 B18 SMLINK0 SATA5GP/GPIO37 AD20 8 1
AD2 REQ1#/GPIO50 PCI_REQ#1 25 3D3V_S5 SMLINK1
PCI_AD3 E12 A7 PCI_GNT#1 PCI_GNT#1 25 H1 CLK_ICH14 3 RN36
PCI_AD4 AD3 GNT1#/GPIO51 PCI_REQ#2 SRN10KJ-5-GP PM_RI# CLK14
E9 F13 F19 AF3 CLK48_ICH 3

Clocks
PCI_AD5 AD4 REQ2#/GPIO52 PCI_GNT#2 RI# CLK48
C9 AD5 GNT2#/GPIO53 F12 TP181 TPAD30
PCI_AD6 E10 E6 PCI_REQ#3 42,44 PM_SUS_STAT# R4 P1 PM_SUS_CLK 37,42
PCI_AD7 AD6 REQ3#/GPIO54 PCI_GNT#3 DBRESET# SUS_STAT#/LPCPD# SUSCLK
B7 AD7 GNT3#/GPIO55 F6 G19 SYS_RESET#
PCI_AD8 C7 C16 PM_SLP_S3# 34,41,46,47,53
PCI_AD9 AD8 SLP_S3#
C5 AD9 C/BE0# D8 PCI_C/BE#0 25,30 7 PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 PM_SLP_S4# 34,41,47,51,52
PCI_AD10 G11 B4 PCI_C/BE#1 25,30 G17 PM_SLP_S5#
D PCI_AD11 AD10 C/BE1# SMB_ALERT# SLP_S5# TP180 TPAD30 D
F8 AD11 C/BE2# D6 PCI_C/BE#2 25,30 A17 SMBALERT#/GPIO11
PCI_AD12 F11 A5 PCI_C/BE#3 25,30 C10 S4_STATE#
PCI_AD13 AD12 C/BE3# S4_STATE#/GPIO26 TP175 TPAD30
E7 AD13 3 PM_STPPCI# A14 STP_PCI#
PCI_AD14

SYS GPIO
A3 AD14 IRDY# D3 PCI_IRDY# 25,30 3 PM_STPCPU# E19 STP_CPU# PWROK G20 PWROK 7,47
PCI_AD15 D2 E3 PCI_PAR 25,30
PCI_AD16 AD15 PAR PCIRST#1 R546
F10 AD16 PCIRST# R1 2 PCIRST1# 25,30,31 25,31,41,42,44 PM_CLKRUN# L4 CLKRUN# DPRSLPVR/GPIO16 M2 PM_DPRSLPVR 7,49
PCI_AD17 D5 C6 56R2J-4-GP PCI_DEVSEL# 25,30 R535 1 2DY
AD17 DEVSEL#

Power MGT
PCI_AD18 D10 E4 PCI_PERR# 25,31 34 PCIE_WAKE# E20 B13 PM_BATLOW#_R 100KR2J-1-GP
PCI_AD19 AD18 PERR# PCI_LOCK# WAKE# BATLOW#
B3 C2 30,41,42,44 INT_SERIRQ M5 D38
PCI_AD20 AD19 PLOCK# SERIRQ PWRBTN#_ICH BAS16-1-GP
F7 AD20 SERR# J4 PCI_SERR# 25,31 37 THRM# AJ23 THRM# PWRBTN# R3 1 PM_PWRBTN# 41
PCI_AD21 C3 A4 3D3V_S0
AD21 STOP# PCI_STOP# 25,30
PCI_AD22 F3 F5 PCI_TRDY# 25,30 37,49 VGATE_PWRGD D21 D20 3
PM_LAN_ENABLE 32,41
PCI_AD23 AD22 TRDY# VRMPWRGD LAN_RST#
F4 AD23 FRAME# D7 PCI_FRAME# 25,30
PCI_AD24 C1 PLT_RST#_R
1 R523 2 PLT_RST1# 7,34,36,41,42,44,46 UMA RTL 1 DY 2 ICH_TP7 A20 D22 RSMRST#_SB 2 2nd = 83.00016.F11
AD24 SST RSMRST#

2
PCI_AD25 G7 C14 0R0402-PAD 1 2 R500 0R2J-2-GP
PCI_AD26 AD25 PLTRST# C519 DYSC100P50V2JN-3GP R560 R532 R584
H7 AD26 PCICLK D4 -1 29 FP_DETECT# AG19 TACH1/GPIO1 CK_PWRGD R5 CLK_PWRGD 3 3D3V_M

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
PCI_AD27 D1 R2 PCLK_ICH 3 CLK_SEL AH21
PCI_AD28 AD27 PME# ICH_PME# TACH2/GPIO6
G5 AD28 ICH_PME# 30 41 ECSCI#_1 AG21 TACH3/GPIO7 CLPWROK R6 M_PWROK 7,47
PCI_AD29 H6 41 ECSWI# A21

1
PCI_AD30 AD29 GPIO8
G1 AD30 32 LAN_PHYPC C12 LAN_PHY_PWR_CTRL/GPIO12 SLP_M# B16 PM_SLP_M# 41,47

1
PCI_AD31 H3 18 ISO_PREP# C21
AD31 PSW_CLR# ENERGY_DETECT/GPIO13 R504
AE18 TACH0/GPIO17 CL_CLK0 F24 CL_CLK0 7
UMA_DIS_SEL 3K24R2F-GP
INT_PIRQA# J5
Interrupt I/F H4 INT_PIRQE# ICH9_GPIO20
K1
AF8
GPIO18 CL_CLK1 B19 CL_CLK1 36
INT_PIRQB# PIRQA# PIRQE#/GPIO2 INT_PIRQF# TPAD30 TP192 SCLOCK GPIO20
E1 K6 AJ22 F22 CL_DATA0 7

2
PIRQB# PIRQF#/GPIO3 SCLOCK/GPIO22 CL_DATA0

Controller Link
INT_PIRQC# J6 F2 INT_PIRQG# G80 DIS ICS ICH9_GPIO27 A9 C19

GPIO
PIRQC# PIRQG#/GPIO4 INT_PIRQG# 31 GPIO27 CL_DATA1 CL_DATA1 36

2
INT_PIRQD# C4 G2 INT_PIRQH# INT_PIRQH# 25 TPAD30 TP85 ICH9_GPIO28 D19
PIRQD# PIRQH#/GPIO5 R529 R583 GPIO28 CL_VREF0_ICH
3 TPAD30 TP179
SATACLKREQ# L1 SATACLKREQ#/GPIO35 CL_VREF0 C25

GAP-OPEN

10KR2J-3-GP

10KR2J-3-GP
PCB_VER0 AE19 A19 CL_VREF1_ICH
SLOAD/GPIO38 CL_VREF1

1
ICH9M-GP-NF PCB_VER1 AG22

1
C SDATAOUT1 SDATAOUT0/GPIO39 3D3V_S5 R507 C
71.ICH9M.00U AF21 F21 CL_RST#0 7

1
TPAD30 TP190 ICH9_GPIO49 AH24 SDATAOUT1/GPIO48 CL_RST0# 453R2F-1-GP

SCD1U10V2KX-4GP
RP4 RP5 D18 CL_RST#1 36
GPIO49 CL_RST1#

C513
PCI_PERR# 1 10 PCI_REQ#3 1 10 TPAD30 TP116 iTPM_PRESENCE A8
3D3V_S0 3D3V_S0 GPIO57/CLGPIO5

1
INT_PIRQE# 2 9 INT_PIRQH# INT_PIRQF# 2 9 INT_PIRQD# A16 ICH_GPIO24 TP174 TPAD30

2
PCI_LOCK# PCI_REQ#0 INT_PIRQG# PCI_IRDY# GPIO24/MEM_LED R509
3 8 3 8 38 ACZ_SPKR M7 C18 SUSPWRACK 41

2
INT_PIRQA# INT_PIRQC# PCI_SERR# PCI_TRDY# SPKR GPIO10/SUS_PWR_ACK
4 7 4 7 GPIO49 should be pulled down to 7 MCH_ICH_SYNC# AJ24 MCH_SYNC# GPIO14/AC_PRESENT C11 AC_PRESENT 41 3K24R2F-GP
5 6 INT_PIRQB# 5 6 ECSCI#_1 GND only when using Teenah. When ICH_TP3 B21 C20 LAN_WOL_EN 47
3D3V_S0 3D3V_S0 TP3 GPIO9/WOL_EN

MISC
using Cantiga, this ball should TPAD30 TP177 AH20

2
PWM0

100KR2J-1-GP
SRN8K2J-2-GP-U SRN8K2J-2-GP-U AJ20 R510
be left as No Connect. PWM1
AJ21 PWM2

1
SCD1U10V2KX-4GP
RP3

1
3D3V_S5 3D3V_S5

C517
PCI_REQ#2 1 10 R508
3D3V_S0 453R2F-1-GP
PCI_REQ#1 2 9 INT_SERIRQ ICH9M-GP-NF

2
3 8 PCI_DEVSEL# 71.ICH9M.00U

2
1

1
PM_CLKRUN# 4 7 PCI_STOP# R503 R526

2
10KR2J-3-GP

20KR2J-L2-GP
5 6 PCI_FRAME# 3D3V_S5
3D3V_S0 4 OF 6
SB1D DY DY
SRN8K2J-2-GP-U RP2 3D3V_S5
3D3V_S5
N29 V27 DMI_RXN0 7 USB_OC#1 1 10 RN34

2
PERN1 DMI0RXN iTPM_PRESENCE SPI_ICH_SI_R PM_BATLOW#_R USB_OC#5
Direct Media Interface

N28 PERP1 DMI0RXP V26 DMI_RXP0 7 2 9


P27 U29 DMI_TXN0 7 ECSWI# 3 8 SMB_LINK_ALERT# USB_OC#11 8 1
PETN1 DMI0TXN

1
P26 U28 DMI_TXP0 7 R505 USB_OC#0 4 7 SUSPWRACK USB_OC#10 7 2
PETP1 DMI0TXP

100KR2J-1-GP
5 6 SMB_ALERT# USB_OC#8 6 3
3D3V_S5
36 PCIE_RXN2 L29 Y27 DMI_RXN1 7 USB_OC#9 5 4
PERN2 DMI1RXN
36 PCIE_RXP2 L28 Y26 DMI_RXP1 7 For iTPM Enable SRN10KJ-L3-GP
C183 SCD1U10V2KX-5GP 2 TXN2 PERP2 DMI1RXP
36 PCIE_TXN2 1 M27 W29 DMI_TXN1 7

2
C182 SCD1U10V2KX-5GP 2 TXP2 PETN2 DMI1TXN SRN10KJ-6-GP
36 PCIE_TXP2 1 M26 W28 DMI_TXP1 7 RP6 3D3V_S5
PETP2 DMI1TXP USB_OC#2
MINICARD1 J29 AB27 USB_OC#7
1
2
10
9 USB_OC#4
36 PCIE_RXN3 PERN3 DMI2RXN DMI_RXN2 7
J28 AB26 No Reboot Strap PM_RI# 3 8 DBRESET#
PCI-Express

B
36 PCIE_RXP3 PERP3 DMI2RXP DMI_RXP2 7 B
36 PCIE_TXN3 C557 SCD1U10V2KX-5GP 2 1 TXN3 K27 AA29 DMI_TXN2 7 SPKR LOW = Defaule PCIE_WAKE# 4 7 USB_OC#3
C558 SCD1U10V2KX-5GP 2 TXP3 PETN3 DMI2TXN USB_OC#6
36 PCIE_TXP3 1 K26 PETP3 DMI2TXP AA28 DMI_TXP2 7 High=No Reboot 3D3V_S5 5 6
MINICARD2 G29 AD27 SRN10KJ-L3-GP
44 PCIE_RXN4 PERN4 DMI3RXN DMI_RXN3 7 1D5V_S0 3D3V_S0
44 PCIE_RXP4 G28 PERP4 DMI3RXP AD26 DMI_RXP3 7
44 PCIE_TXN4 C539 SCD1U10V2KX-5GP 2 1 TXN4 H27 AC29 DMI_TXN3 7
C543 SCD1U10V2KX-5GP 2 TXP4 PETN4 DMI3TXN 3D3V_S0
44 PCIE_TXP4 1 H26 PETP4 DMI3TXP AC28 DMI_TXP3 7
1

1
10KR2J-3-GP

10KR2J-3-GP
DOCK -1(5/9)
R207 ACZ_SPKR R588 R580
34 PCIE_RXN5 E29
E28
PERN5 DMI_CLKN T26
T25
CLK_PCIE_ICH# 3
24D9R2F-L-GP
1
R537
2
DY 1KR2J-1-GP
PlanarID
34 PCIE_RXP5 PERP5 DMI_CLKP CLK_PCIE_ICH 3
34 PCIE_TXN5 C534 SCD1U10V2KX-5GP 2
C538 SCD1U10V2KX-5GP 2
1
1
TXN5
TXP5
F27
F26
PETN5
AF29 SCLOCK 1 2
(1,1)
34 PCIE_TXP5
2

2
PETP5 DMI_ZCOMP
NEW CARD DMI_IRCOMP AF28 DMI_IRCOMP_R R582 10KR2J-3-GP PCB_VER0
PCB_VER1
SA: 0,0 3D3V_S5
32 GLAN_RXN C29
32 GLAN_RXP C28
PERN6/GLAN_RXN
PERP6/GLAN_RXP USBP0N AC5 USBPN0 44 USB PWROK 1 2 SB: 0,1

1
10KR2J-3-GP

10KR2J-3-GP
32 GLAN_TXN C526 SCD1U16V2KX-3GP
2 1 GLAN_TXN_C D27 AC4 R533 10KR2J-3-GP
PETN6/GLAN_TXN USBP0P USBPP0 44 SC: 1,0

1
32 GLAN_TXP C525 SCD1U16V2KX-3GP
2 1 GLAN_TXP_C D26 AD3 Pair Device R587 R577 1 R481 2 R486
PETP6/GLAN_TXP USBP1N USBPN1 31

10KR2J-3-GP
DY DY 0R2J-2-GP
Intel GLAN 1 R506 2100R2F-L1-GP-U
SPI_ICH_CLK_R D23 USBP1P AD2
AC1
USBPP1 31
0 USB1 -1: 1,1
42 SPI_ICH_CLK SPI_CLK USBP2N USBPN2 28
42 SPI_ICH_CS0# 1 R512 215R2J-GP SPI_ICH_CS0#_R D24 AC2 USBPP2 28

2
SPI_CS0# USBP2P
1 R521 215R2J-GP SPI_ICH_CS1#_R F23 AA5 USBPN3 28 1 USB4 D33

2
SPI_ICH_CS1# SPI_CS1#/GPIO58/CLGPIO6 USBP3N RSMRST#_SB
USBP3P AA4 USBPP3 28 1
42 SPI_ICH_SI 1 R501 SPI_ICH_SI_R
2100R2F-L1-GP-U D25 AB2 2 USB2
SPI_MOSI USBP4N USBPN4 31
SPI

42 SPI_ICH_SO E23 SPI_MISO USBP4P AB3 USBPP4 31 41 RSMRST#_KBC 2 DY

1
3 DOCK BOOT BIOS Strap R487
-1 USB_OC#0 N4
USBP5N AA1
AA2
USBPN5 26
3
28 USB_OC#0 OC0#/GPIO59 USBP5P USBPP5 26

100KR2J-1-GP
USB_OC#1 N5 W5 USBPN6 29 4 USB3 PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
USB_OC#2 OC1#/GPIO40 USBP6N BAT54-7-F-GP
USB_OC#3
N6 OC2#/GPIO41 USB USBP6P W4 USBPP6 29
44 USB_OC#3 P6 Y3 USBPN7 36 5 Bluetooth 0 1 SPI 2nd = 83.BAT54.D81

2
USB_OC#4 OC3#/GPIO42 USBP7N
A
31 USB_OC#4 M1 OC4#/GPIO43 USBP7P Y2 USBPP7 36 1 0 PCI A
USB_OC#5 N2 W1 USBPN8 15 6 FingerPrint 1 1 LPC(Default)
OC5#/GPIO29 USBP8N Four Peaks
USB_OC#6 M4 W2 USBPP8 15 A16 swap override strap
USB_OC#7 OC6#/GPIO30 USBP8P
These R need close SB M3 OC7#/GPIO31 USBP9N V2 USBPN9 34 7 MINIC1
USB_OC#8 N3 V3 low = A16 swap override enable
within 600 mils
USB_OC#9 N1
OC8#/GPIO44
OC9#/GPIO45
USBP9P
USBP10N U5
USBPP9 34
USBPN10 36 8 WEBCAM PCI_GNT#3 high = default Wistron Corporation
USB_OC#10 P5 U4 USBPP10 36 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
USB_OC#11 OC10#/GPIO46 USBP10P Taipei Hsien 221, Taiwan, R.O.C.
P3 OC11#/GPIO47 USBP11N U1 9 NEW1 SB
U2 PCI_GNT#0 1 1KR2J-1-GP
2
USB_RBIAS_PN AG2 USBP11P R531 Title
10 MINIC2 PCI_GNT#0 and SPI_CS1#
USBRBIAS SPI_ICH_CS1# 1 1KR2J-1-GP
2 1 AG1 have weak internal Pull up 2
R563 22D6R2F-L1-GP USBRBIAS#
11 NC R514 DY ICH9-M (2 of 4)
PCI_GNT#3 1 1KR2J-1-GP
2 Size Document Number Rev
ICH9M-GP-NF R530 DY -1M
71.ICH9M.00U Four Peaks
Date: Friday, November 21, 2008 Sheet 20 of 57
5 4 3 2 1
5 4 3 2 1
SB1F 6 OF 6
RTC_AUX_S5
6uA in G3 A23 VCCRTC VCC1_05 A15 Layout Note: Place near ICH9M
B15 1D05V_S0
V5REF_S0 A6 V5REF
VCC1_05
VCC1_05 C15 1.16A

1
C134 C136 D15
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V5REF_S5 AE1 E15
V5REF_SUS VCC1_05

1
F15 C554 C571 C576 C566

2
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP
AA24 VCC1_5_B VCC1_05 L11 DY
AA25 L12

2
VCC1_5_B VCC1_05
AB24 VCC1_5_B VCC1_05 L14
AB25 VCC1_5_B VCC1_05 L16
1D5V_S0 AC24 L17
VCC1_5_B VCC1_05
AC25 L18
646mA AD24
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05 M11
D TC24 AD25 M18 D
VCC1_5_B VCC1_05 23mA

1
C561 C593 C579 C575 AE25 P11
VCC1_5_B VCC1_05 1D5V_S0

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC2D2U10V3KX-1GP
2nd = 80.22715.39L
ST220U6D3VDM-20GP
AE26 P18 L27
VCC1_5_B VCC1_05 1D5V_DMIPLL_ICH_S0
AE27 T11 2 1

2
VCC1_5_B VCC1_05 IND-1D2UH-10-GP
AE28 VCC1_5_B VCC1_05 T18

1
AE29 U11 C569
VCC1_5_B VCC1_05 C570
F25 U18

CORE
VCC1_5_B VCC1_05 SCD01U16V2KX-3GP SC10U6D3V5MX-3GP
G25 V11

2
VCC1_5_B VCC1_05
H24 VCC1_5_B VCC1_05 V12
H25 VCC1_5_B VCC1_05 V14
J24 V16 1D05V_S0
VCC1_5_B VCC1_05 1D05V_DMI_ICH_S0
J25 VCC1_5_B VCC1_05 V17 1 R554 2

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP
K24 V18 0R0603-PAD
K25
VCC1_5_B
VCC1_5_B
VCC1_05 41mA

1
L23 R29 C584 C586 -1(5/9)
VCC1_5_B VCCDMIPLL
*Within a given well, 5VREF needs to be up before the L24 VCC1_5_B DY
corresponding 3.3V rail L25 W23

2
VCC1_5_B VCCDMI 1D05V_S0
M24 VCC1_5_B VCCDMI Y23
M25
N23
VCC1_5_B
AB23 2mA
47mA N24
VCC1_5_B
VCC1_5_B
V_CPU_IO
V_CPU_IO AC23
3D3V_S0 5V_S0 1D5V_S0 1D5V_APLL_S0 N25 3D3V_S0
VCC1_5_B

1
L8 P24 AG29 C589 C553 C578
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP
1 2 P25 C594 C599
VCC1_5_B
2

VCCA3GP
IND-1D2UH-10-GP R24 AJ6 SCD1U10V2KX-4GP

2
VCC1_5_B VCC3_3

1
R139 R25 SCD1U10V2KX-4GP

2
CH751H-40PT 100R2J-2-GP C222 C602 VCC1_5_B
R26 AC10
2mA VCC1_5_B VCC3_3

SC10U6D3V5MX-3GP

SC1U16V3ZY-GP
D8 R27 3D3V_S0

2
VCC1_5_B
2nd = 83.R2004.B8F T24 AD19
VCC3_3=308mA
1

V5REF_S0 VCC1_5_B VCC3_3


T27 VCC1_5_B VCC3_3 AF20

1
C T28 AG24 C585 C
VCC1_5_B VCC3_3
1

C130 T29 AC20 3D3V_S0


SCD1U16V2ZY-2GP VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
U24

VCCP_CORE

2
VCC1_5_B
U25 B9 -1
2

VCC1_5_B VCC3_3

1
V24 F9 C524 C551 C550
VCC1_5_B VCC3_3 32mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V25 VCC1_5_B VCC3_3 G3 1 R579 2 3D3V_S0

1
Layout Note: U23 G6 C603 0R0402-PAD

2
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP
Place near ICH9 3D3V_S5 5V_S5 W24 J2 1R574 0R2J-2-GP
2
VCC1_5_B VCC3_3 1D5V_S0
W25 J7 DY

2
VCC1_5_B VCC3_3
K23 VCC1_5_B VCC3_3 K7
2

Y24

PCI
R206 VCC1_5_B VCCHDA_ICH
CH751H-40PT 100R2J-2-GP
Y25 VCC1_5_B VCCHDA AJ4 -1
2mA D15 1D5V_S0 AJ19 AJ3 VCCSUSHDA_ICH 32mA 1 R575 2
1.64A VCCSATAPLL VCCSUSHDA 3D3V_S5

1
2nd = 83.R2004.B8F C604 0R0402-PAD
1

SCD1U10V2KX-4GP
V5REF_S5 AC16 AC8 TP_VCCSUS1D05V_ICH_1 TP185 TPAD28 1R578 0R2J-2-GP
2 1D5V_S5
VCC1_5_A VCCSUS1_05
DY AD15 F17 TP_VCCSUS1D05V_ICH_2 TP182 TPAD28 DY

2
VCC1_5_A VCCSUS1_05
1

C213 AD16 VCC1_5_A

ARX
SCD1U16V2ZY-2GP C591 C596 C590 AE15 AD8 TP_VCCSUS1D5V_ICH_1 TP186 TPAD28
VCC1_5_A VCCSUS1_5
SC1U16V3ZY-GP

SC1U16V3ZY-GP

SC1U16V3ZY-GP

AF15
2

VCC1_5_A VCCSUS1D5V_INT_ICH
-1(5/9) AG15 VCC1_5_A VCCSUS1_5 F18

1
AH15 C545
VCC1_5_A SCD1U10V2KX-4GP
AJ15 VCC1_5_A
A18 3D3V_S5

2
VCCSUS3_3
AC11 VCC1_5_A VCCSUS3_3 D16
AD11 VCC1_5_A VCCSUS3_3 D17

SCD1U10V2KX-4GP
VCCPSUS
AE11 VCC1_5_A VCCSUS3_3 E22

1
3D3V_S5
ATX
AF11 C509
VCC1_5_A 1D5V_S5
AG10 U64
VCC1_5_A
AG11 AF1

2
VCC1_5_A VCCSUS3_3
B AH10 VCC1_5_A 1 VIN VOUT 5 B
AJ10 VCC1_5_A VCCSUS3_3 T1 2 GND DY

SC1U16V3ZY-GP
VCCSUS3_3 T2
212mA3D3V_S5 3 EN/EN# NC#4 4 DY

1
AC9 VCC1_5_A VCCSUS3_3 T3
T4 DY BC8 C674
VCCSUS3_3

SC22U6D3V6KX-1GP
SC1U16V3ZY-GP
AC18 T5 RT9198-15PBR-GP

2
VCC1_5_A VCCSUS3_3

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AC19 VCC1_5_A VCCSUS3_3 T6

1
U6 C540 C535 C536 DY BC7
VCCSUS3_3
AC21 U7

2
VCC1_5_A VCCSUS3_3
V6

2
VCCSUS3_3
G10 V7
VCCPUSB

VCC1_5_A VCCSUS3_3
G9 VCC1_5_A VCCSUS3_3 W6
VCCSUS3_3 W7
AC12 VCC1_5_A VCCSUS3_3 Y6
AC13 VCC1_5_A VCCSUS3_3 Y7
1D5V_S0 AC14 T7
VCC1_5_A VCCSUS3_3
USBPLL=11mA

SCD1U10V2KX-4GP
AJ5 G22 VCCCL1D05V_INT_ICH
VCCUSBPLL VCCCL1_05

1
C544
1

C597 C583 C592 AA7 G23 VCCCL1D5V_INT_ICH


VCC1_5_A VCCCL1_5
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

USB CORE

AB6

2
VCC1_5_A

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY AB7 A24
2

VCC1_5_A VCCCL3_3

1
AC6 B24 C555 C556
3D3V_M_WOL VCC1_5_A VCCCL3_3 3D3V_M_WOL
AC7 VCC1_5_A DY DY
19mA in S0;78mA in S3/S4/S5 19mA

2
VCCLAN_1D05V_INT_ICHA10
VCCLAN1_05
1

C520 A11 3D3V_ICH_CL_S5 1 R141 2


VCCLAN1_05
1

C512 SCD1U10V2KX-4GP 0R0402-PAD


SCD1U10V2KX-4GP

A12
2

1D5V_S0 VCCLAN3_3
B12 -1(5/9)
2

L6 VCCLAN3_3
A
2 1 23mA 1D5VGLANPLL_ICH A27 VCCGLANPLL
A

IND-1D2UH-10-GP
1

1
SC10U6D3V5MX-3GP

GLAN POWER

C135 C133 D28 VCCGLAN1_5


SC1U16V3ZY-GP

D29
E26
VCCGLAN1_5 Wistron Corporation
2

1D5V_S0 VCCGLAN1_5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


E27 VCCGLAN1_5 Taipei Hsien 221, Taiwan, R.O.C.
SCD1U10V2KX-4GP

80mA 3D3V_S0 A26 VCCGLAN3_3


C547 Title
1

C563
DY 1mA ICH9M-GP-NF ICH9-M (3 of 4)
SC4D7U6D3V3KX-GP 71.ICH9M.00U Size Document Number Rev
2

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 21 of 57
5 4 3 2 1
A B C D E

SB1E 5 OF 6

AA26 VSS VSS H5


AA27 VSS VSS J23
AA3 VSS VSS J26
AA6 VSS VSS J27
AB1 VSS VSS AC22
AA23 VSS VSS K28
AB28 VSS VSS K29
AB29 VSS VSS L13
AB4 VSS VSS L15
AB5 VSS VSS L2
AC17 VSS VSS L26
4 AC26 VSS VSS L27 4
AC27 VSS VSS L5
AC3 VSS VSS L7
AD1 VSS VSS M12
AD10 VSS VSS M13
AD12 VSS VSS M14
AD13 VSS VSS M15
AD14 VSS VSS M16
AD17 VSS VSS M17
AD18 VSS VSS M23
AD21 VSS VSS M28
AD28 VSS VSS M29
AD29 VSS VSS N11
AD4 VSS VSS N12
AD5 VSS VSS N13
AD6 VSS VSS N14
AD7 VSS VSS N15
AD9 VSS VSS N16
AE12 VSS VSS N17
AE13 VSS VSS N18
AE14 VSS VSS N26
AE16 VSS VSS N27
AE17 VSS VSS P12
AE2 VSS VSS P13
AE20 VSS VSS P14
AE24 VSS VSS P15
AE3 VSS VSS P16
AE4 VSS VSS P17
AE6 VSS VSS P2
3 AE9 P23 3
VSS VSS
AF13 VSS VSS P28
AF16 P29 3D3V_S5 3D3V_M
VSS VSS
AF18 VSS VSS P4
AF22 VSS VSS P7
AH26 VSS VSS R11
AF26 VSS VSS R12
AF27 VSS VSS R13

8
7
6
5
SRN4K7J-10-GP
AF5 VSS VSS R14
AF7 R15 RN29
VSS VSS
AF9 VSS VSS R16
AG13 VSS VSS R17
AG16 VSS VSS R18
AG18 R28

1
2
3
4
VSS VSS
AG20 VSS VSS T12
AG23 VSS VSS T13
AG3 VSS VSS T14
AG6 VSS VSS T15
AG9 T16 3D3V_M
VSS VSS
AH12 VSS VSS T17
AH14 VSS VSS T23
AH17 VSS VSS B26
AH19 VSS VSS U12
AH2 VSS VSS U13 Q39
AH22 VSS VSS U14
AH25 VSS VSS U15
AH28 VSS VSS U16 20,34,36 SMB_CLK 3 4 SMBC_ICH 3,12,13
AH5 VSS VSS U17
AH8 VSS VSS AD23 2 5
2 2
AJ12 VSS VSS U26
AJ14 VSS VSS U27 1 6 2N7002DW-1-GP
AJ17 VSS VSS U3
AJ8 VSS VSS V1
B11 VSS VSS V13 20,34,36 SMB_DATA
B14 VSS VSS V15 SMBD_ICH 3,12,13
B17 VSS VSS V23 2nd = 84.27002.C3F
B2 VSS VSS V28
B20 V29
B23
VSS
VSS
VSS
VSS V4 SMBUS
B5 VSS VSS V5
B8 VSS VSS W26
C26 VSS VSS W27
C27 VSS VSS W3
E11 VSS VSS Y1
E14 VSS VSS Y28
E18 VSS VSS Y29
E2 VSS VSS Y4
E21 VSS VSS Y5
E24 VSS VSS AG28
E5 VSS VSS AH6
E8 VSS VSS AF2
F16 VSS VSS B25
F28
AH1,AJ1,AJ2,AH29,AJ28,AJ29

VSS TP81 TPAD30


F29 VSS NCTF_VSS#A1 A1
G12 A2 TP82 TPAD30
VSS NCTF_VSS#A2 TP176 TPAD30
G14 B1
A1,A2,B1,A28,A29,B29

VSS NCTF_VSS#B1 TP89 TPAD30


G18 VSS NCTF_VSS#A29 A29
G21 A28 TP88 TPAD30
NCTF TEST PIN:

1 VSS NCTF_VSS#A28 1
G24 B29 TP90 TPAD30
VSS NCTF_VSS#B29 TP117 TPAD30
G26 VSS NCTF_VSS#AJ1 AJ1
TP119 TPAD30
G27
G8
VSS
VSS
NCTF_VSS#AJ2
NCTF_VSS#AH1
AJ2
AH1 TP108 TPAD30 Wistron Corporation
H2 AJ28 TP112 TPAD30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS NCTF_VSS#AJ28 TP114 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
H23 VSS NCTF_VSS#AJ29 AJ29
H28 AH29 TP107 TPAD30
VSS NCTF_VSS#AH29 Title
H29 VSS
ICH9-M (4 of 4)
ICH9M-GP-NF Size Document Number Rev
71.ICH9M.00U
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 22 of 57
A B C D E
5 4 3 2 1

D
ODD Connector D

ODD Conn. Test Point


BAY1
SATA_TXP1 TP125 TPAD30 52 54
19 SATA_TXP1 25 50 SATA_RXP1 19
SATA_TXN1 TP124 TPAD30 19 SATA_TXN1 24 49 SATA_RXN1 19
NP2
SATA_RXP1 TP127 TPAD30 23 48
22 47
SATA_RXN1 TP126 TPAD30 21 46
20 45
BAY_ID0 TP194 TPAD30 19 44
18 43
BAY_ID1 TP195 TPAD30 3D3V_S0 17 42
16 41
C BAY_INS# TP193 TPAD30 15 40 C
14 39

2
1
3D3V_S0 TP277 TPAD30 RN48 13 38

SRN10KJ-5-GP
12 37
5V_S0 TP278 TPAD30 11 36
10 35
9 34
8 33

3
4
7 32
5V_S0 6 31
41 BAY_ID0
41 BAY_ID1 5 30
4 29 BAY_INS#
NP1
DY DY 3 28 3D3V_S0
K

1 -1M(6/25) 2 27
D41 C634 TC26
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
SSM24PT-GP

1 26
2

DY 51 53
A

FOX-CONN50-3R-GP-U
B B

BAY_ID0 BAY_ID1
SATA ODD
0 0
SATA HDD
1 1
Four Peaks

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ODD
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 23 of 57
5 4 3 2 1
SATA Connector
HDD Conn. Test Point

SATA_TXP0 TP132 TPAD30

SATA_TXN0 TP131 TPAD30

SATA_RXN0 TP130 TPAD30

SATA_RXP0 TP128 TPAD30

SATA1 5V_S0 TP99 TPAD30


24
NP2
22
19 SATA_TXP0 21
19 SATA_TXN0 20
19
19 SATA_RXN0 18
19 SATA_RXP0 17
16

15
14
13
12
5V_S0 11
PWR TRACE 100mil 10
9
8
7
K

1
6
D18 TC16 C388 5
SC10U10V5ZY-1GP

SCD1U25V3ZY-1GP
SSM24PT-GP

DY 4
2

3
2
A

1
NP1
23

SKT-SATA22P-8-GP
62.10065.151
20.F0754.022

Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD CONN
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 24 of 57
5 4 3 2 1

3D3V_S0 3D3V_S0

DY DY DY DY DY
1

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C503 C595 C511 C598 C573 C560 C580 C581

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
2

2
D D

3D3V_S0
1394_AVDD -1
RN60 SRN4K7J-8-GP
3 2 1394_CYCLEN
4 1 1394_CYCLEOUT

DY 1R552 4K7R2J-2-GP
2
1

C528 C529 C531 C552 C521 3 2 3D3V_S0


SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

4 1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
2

RN61 SRN4K7J-8-GP
PCI_AD[31..0] 20,30

11
10
96
86

87

78
62
48
35
20
U19
3D3V_S0

TEST16
TEST17
TEST7
CYCLEOUT

CYCLEN

VDDP
VDDP
VDDP
VDDP
VDDP
15 22 PCI_AD31
DVDD PCI_AD31 PCI_AD30
27 DVDD PCI_AD30 24
39 25 PCI_AD29
DVDD PCI_AD29 PCI_AD28
51 DVDD PCI_AD28 26
59 28 PCI_AD27
3D3V_S0 1394_AVDD DVDD PCI_AD27 PCI_AD26
72 DVDD PCI_AD26 29
88 31 PCI_AD25
L25 DVDD PCI_AD25
100 32 PCI_AD24
DVDD PCI_AD24 PCI_AD23
1 2 7 PLLVDD PCI_AD23 37
MLB-160808-4-GP 1 38 PCI_AD22
AVDD PCI_AD22 PCI_AD21
2ND = 68.00217.161 2 AVDD PCI_AD21 40
PCI_AD20
107 AVDD PCI_AD20 41
108 42 PCI_AD19
AVDD PCI_AD19 PCI_AD18
120 AVDD PCI_AD18 43
45 PCI_AD17
PCI_AD17
1 2 1394_PWR_1 106 CPS PCI_AD16 46 PCI_AD16
C R541 1KR2J-1-GP 61 PCI_AD15 C
1394_TPBIAS2 125 PCI_AD15 PCI_AD14
TPB1AS1 PCI_AD14 63
124 65 PCI_AD13
44 1394_TPA2P TPA1+ PCI_AD13
123 66 PCI_AD12
44 1394_TPA2N TPA1- PCI_AD12
122 67 PCI_AD11
44 1394_TPB2P TPB1+ PCI_AD11
121 69 PCI_AD10
44 1394_TPB2N TPB1- PCI_AD10
70 PCI_AD9
PCI_AD9
C144 HOSONIC 1R154 2 1394_R0 118 RO PCI_AD8 71 PCI_AD8
R145
R146
R148
R151

6K34R2F-GP 74 PCI_AD7
PCI_AD7
1
1
1
1

1 2 SC12P50V2JN-3GP 1394_R1 119 76 PCI_AD6


R1 PCI_AD6 PCI_AD5
1394_XO
IDSEL=AD25 PCI_AD5 77
PCI_AD4
56R2F-1-GP
56R2F-1-GP
56R2F-1-GP
56R2F-1-GP

2 6 X0 PCI_AD4 79
GROM_SDA 80 PCI_AD3
GROM_SCL X3 1394_XI PCI_AD3 PCI_AD2
5 81
2
2
2
2

1394_TPBIAS2 C530 SCD1U10V2MX-3GP X1 PCI_AD2 PCI_AD1


X-24D576MHZ-62GP PCI_AD1 82
-1 C145 1 21394_FILTER0 3 84 PCI_AD0
1

FILTER0 PCI_AD0
4
3
SC1U16V3ZY-GP

1394_TPB2 1394_FILTER1 4 34 PCI_C/BE#3 20,30


RN58 FILTER1 PCI_C/BE3
1 2 PCI_C/BE2 47 PCI_C/BE#2 20,30
1

C541 SRN220J-1-GP GROM_SDA 92 60 PCI_C/BE#1 20,30


SDA PCI_C/BE1
1

R528 SC12P50V2JN-3GP 73 PCI_C/BE#0 20,30 3D3V_S0 3D3V_S0


C537 4K99R2F-L-GP GROM_SCL PCI_C/BE0
91 SCL PCI_CLK 16 PCLK_PCM_TI 3
18 PCI_GNT#1 20
2

1
2

PCI_GNT#

1
99 19 PCI_REQ#1 20
2

PCO PCI_REQ# TSB4322_IDSEL1 R527 R518 R515


98 PC1 PCI_IDSEL 36 2 PCI_AD25 20,30

4K7R2J-2-GP

10KR2F-2-GP
SC220P50V3JN-GP 97 49 100R2J-2-GP PCI_FRAME# 20,30 DY
PC2 PCI_FRAME#
PCI_IRDY# 50 PCI_IRDY# 20,30
1394_TPBIAS1 116 52 PCI_TRDY# 20,30

2
TPB1AS0 PCI_TRDY# 1394_PME#
44 1394_TPA1P 115 TPA0+ PCI_DEVSEL 53 PCI_DEVSEL# 20,30
44 1394_TPA1N 114 TPA0- PCI_STOP# 54 PCI_STOP# 20,30
44 1394_TPB1P 113 TPB0+ PCI_PERR# 56 PCI_PERR# 20,31
112 13 INT_PIRQH# 20 G_RST
44 1394_TPB1N TPB0- PCI_INTA#
21 1394_PME#
PCI_PME#
94 TEST9 PCI_SERR 57 PCI_SERR# 20,31
R156
R157
R161
R163

95 TEST8 PCI_PAR 58 PCI_PAR 20,30


1
1
1
1

12 PM_CLKRUN#_TSB4323 2 R516 1 PM_CLKRUN# 20,31,41,42,44


PCI_CLKRUN# 0R2J-2-GP
101 TEST3 PCI_RST# 85

1
56R2F-1-GP
56R2F-1-GP
56R2F-1-GP
56R2F-1-GP

102 TEST2 G_RST 2 R544 R517


RN62 SRN220J-1-GP

RN63 SRN220J-1-GP

SRN220J-1-GP

104 TEST1 G_RST# 14 1


105 0R0402-PAD 1KR2J-1-GP
2
2
2
2

1394_TPBIAS1 TEST0 1394_GPIO3 DY

PLLGND2
PLLGND1
GPIO3 89
3
4

4
3

3
4

90 1394_GPIO2

REG18
REG18

2
GPIO2

DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
SC1U16V3ZY-GP

B 1394_TPB1 B
-1
-1
1

C564 1 R545 2 PCIRST1# 20,30,31


1

RN64

R536 TSB43AB22APDT-GP SRN220J-1-GP 0R0402-PAD


103
83
75
68
64
55
44
33
23
17
128
127
126
117
111
110
109
9
8
30
93

1
C546 4K99R2F-L-GP 71.04322.C0E 1394_GPIO2
-1 2 3
2
1

1
2

2
1

1394_GPIO3 1 4 C574 SC47P50V2JN-3GP


2

2
C587 1 2 RN59
SC220P50V3JN-GP
SCD1U10V2KX-4GP

C532 1 2

SCD1U10V2KX-4GP
Layout Note :C389 , C779
close to U112 Pin 30 , 93

A A

Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TSB43AB22A
Size Document Number Rev
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 25 of 57
5 4 3 2 1
5 4 3 2 1

BT Conn. Test Point


D USBPN5 1 TP207 AFTE30-GP D

USBPP5 1 TO205 AFTE30-GP

3D3V_BT_S0 1 TP136 AFTE30-GP

BLUETOOTH MODULE -1M(5/27)

3D3V_BT_S0
U63 3D3V_S0 C267
SC4D7U10V5ZY-3GP
3D3V_BT_S0 1 5 1 2 DY
OUT IN
2 GND
C 3 NC#3 EN 4 C
1

EC58 DY BLUETOOTH_EN 41
SCD1U16V2ZY-2GP
G5240B1T1U-GP 2nd = 74.09711.A7F
2

(G5240B1T1U-GP)
EC20 put near
6
D42
BLUE1 / all 3D3V_BT_S0 PRTR5V0U2X-GP
USB put one 4 USBPN5 20 4 1
3 USBPP5 20
choke near
20.D0174.104 2
connector by 20.D0197.104 DY
1 3D3V_BT_S0
EMI request ACES-CON4-1-GP-U2
BT1
USBPP5 3 2 USBPN5
5

B 83.5V0U2.0A3 B

Need check conn.

Four Peaks

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BLUETOOTH
Size Document Number Rev

Four Peaks
Date: Friday, November 21, 2008 Sheet
-1M
26 of 57
5 4 3 2 1
MDC 1.5 CONN 0R3-0-U-GP2 DY 1 R67 1D5V_S5
MDC1 0R0603-PAD
1 2 R66 3D3V_S5
13
NP1
15
14 C59
-1
1 2 1 2

19,38 ACZ_SDATAOUT ACZ_SDATAOUT 3 4 SCD1U10V2KX-4GP


5 6 3D3V_S5
19,38 ACZ_SYNC 1 2 ACZ_SYNC_A 7 8
19 ACZ_SDATAIN1 R70 1 39R2J-L-GP
2 ACZ_SDATAIN1_A 9 10
19,38 ACZ_RST# R58 39R2J-L-GP ACZ_RST# 11 12 2 1 ACZ_BTCLK_MDC 19
NP2 17
1

C53 16 18 R124 33R2J-2-GP

1
SC22P50V2JN-4GP

C56
-1

1
R416 C434
2

TYCO-CONN12A-2-GP-U1

SC4D7U10V5ZY-3GP
2

100KR2J-1-GP

DUMMY-C2
20.F0917.012
1 11
20.F0604.012

2
13 16
14 17
15 18
2 12

Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MDC
Size Document Number Rev

Four Peaks
Date: Friday, November 21, 2008 Sheet
-1M
27 of 57
5 4 3 2 1

5V_USB1_S0
5V_USB1_S0
5V_S5
5V_USB1_S0
U59 100 mil
USB1 3 8
IN#3 OUT#8
6 2 IN#2 OUT#7 7

1
C636 DY EC79 DY EC80
-1 1 OUT#6 6

1
SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SC1000P50V3JN-GP
TC25
D R568 1 2 0R0402-PAD USB_3- 2 5 ST150U6D3VDM-17GP D
20 USBPN3

2
R573 1 OC#
20 USBPP3 2 0R0402-PAD USB_3+ 3 USB_PWR_EN# 4 1

2
EN/EN# GND
4
5 G545A2P8U-GP
74.00545.A79
SKT-1394-4P-27-GP-U
22.10218.T51
2nd = 74.09711.079
22.10218.W51 31,41 USB_PWR_EN#
(RT9711-BPQW-GP)
20 USB_OC#0

1
DY EC81

SCD1U16V2ZY-2GP
2
5V_USB1_S0

USB2
6
-1 1
R596 1 2 0R0402-PAD USB_2- 2
20 USBPN2
R597 1 2 0R0402-PAD USB_2+ 3
20 USBPP2
4
5

SKT-1394-4P-27-GP-U
C 22.10218.T51 C

22.10218.W51

USB Conn. Test Point


5V_USB1_S0 1 TP118 AFTE30-GP

USB_3- 1 TP109 AFTE30-GP

USB_3+ 1 TP115 AFTE30-GP

USB_2- 1 TP121 AFTE30-GP

USB_2+ 1 TP122 AFTE30-GP -1M(5/27)


B B

Four Peaks
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB
Size Document Number Rev
-1M
Four Peaks
Date: Friday, November 21, 2008 Sheet 28 of 57
5 4 3 2 1
5 4 3 2 1

Finger printer FP Conn. Test Point


3D3V_FP_S0 1 T101 AFTE30-GP

D USBPP6 1 T100 AFTE30-GP D

USBPN6 1 TP91 AFTE30-GP

FP_DETECT# 1 TP93 AFTE30-GP

FP_ID 1 TP84 AFTE30-GP

TP_LEFT 1 TP83 AFTE30-GP -1M(5/27)


TP_RIGHT 1 TP87 AFTE30-GP

3D3V_S0 3D3V_S0

-1

2
C R142 R143 C
10KR2J-3-GP 0R0603-PAD FPCN1
3D3V_FP_S0
13

SCD1U16V3ZY-GP
1

1
3D3V_FP_S0 2
20 USBPP6 3 C141 DY
20 USBPN6 4

2
20 FP_DETECT# FP_DETECT# 5
6
FP_ID 7
14,41 TP_LEFT 8
14,41 TP_RIGHT 9
10
11
12
14 For EMI
B ACES-CON12-4-GP-U B
20.K0228.012
20.K0227.012
D12
3D3V_FP_S0 PRTR5V0U2X-GP
4 1

DY

USBPP6 3 2 USBPN6

83.5V0U2.0A3 Four Peaks

Wistron Corporation
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Printer
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 29 of 57
5 4 3 2 1
5 4 3 2 1

-1
2R119 0R2J-2-GP
1 ICH_PME# 20
35 CBB_REG# DY
35 CBB_A12 EPSI_R 1 2 EPSI 31
35 CBB_A8 R598 33R2J-2-GP
35
20,25
CBB_CE1#
PCI_C/BE#0
INT_SERIRQ 20,41,42,44 -1
CBB_A19 35
20,25 PCI_C/BE#1 CBB_WP 35 0423
20,25 PCI_C/BE#2 DY
20,25 PCI_C/BE#3 CBB_A16_R 1 2 PCLK_PCM_O2 2 1 PCLK_FWH 42
1D8V_O2 CBB_A16 35
R222 33R2J-2-GP R120 0R2J-2-GP
1 2
C577 SC22P50V2JN-4GP

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
D PCIRST1# 20,25,31 D

1
C633
PCI_REQ#0 20
1R586 0R0402-PAD
2 PCLK_PCM_O2 3
C635

PCLK_PCM_O2_L
-1

2
PCI_GNT#0 20
PCI_PAR 20,25
CARD_IDSEL2 R591 1 PCI_AD22
100R2F-L1-GP-U
3D3V_S0
PCI_IRDY# 20,25
SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
1 PCI_TRDY# 20,25

1
C637 CBB_D[15..0]
PCI_FRAME# 20,25 CBB_D[15..0] 35
PCI_DEVSEL# 20,25 CBB_A[25..0]
C632
PCI_STOP# 20,25 CBB_A[25..0] 35
2

111
123

101

106
26
56

97
11

16
82

28
38
46
55

86
95

17
45
18

44
66
40
41
39
42
43
7
8
6

5
U58

EPSI

CCLKRUN#/WP

PCI_CLK
C/BE3#
C/BE2#
C/BE1#
C/BE0#

PCI_RST#
PCI_REQ#

IDSEL
IRDY#
TRDY#
FRAME#
DEVSEL#
STOP#
PCI_VCC
PCI_VCC

3_3VCC
3_3VCC

1_8VCC
1_8VCC

CCBE0#/CE1#
CCBE1#/CA8
CCBE2#/A12
CCBE3#/REG#

PME#

CBLOCK#/A19

PCI_GNT#
IRQSER

CCLK/A16

PAR
20,25 PCI_AD[31..0]
PCI_AD0 64 76 CBB_D3 35
PCI_AD1 AD0 CAD0/D3
63 AD1 CAD1/D4 77 CBB_D4 35
PCI_AD2 62 78 CBB_D11 35
C PCI_AD3 AD2 CAD2/D11 C
61 AD3 CAD3/D5 79 CBB_D5 35
PCI_AD4 60 80 CBB_D12 35
PCI_AD5 AD4 CAD4/D12
59 AD5 CAD5/D6 81 CBB_D6 35
PCI_AD6 58 83 CBB_D13 35
PCI_AD7 AD6 CAD6/D13
57 AD7 CAD7/D7 84 CBB_D7 35
PCI_AD8 54 87 CBB_D15 35
PCI_AD9 AD8 CAD8/D15
53 AD9 CAD9/CA10 88 CBB_A10 35
PCI_AD10 52 89 CBB_CE2# 35
PCI_AD11 AD10 CAD10/CE2#
51 AD11 CAD11/OE# 90 CBB_OE# 35
PCI_AD12 50 91 CBB_A11 35
PCI_AD13 AD12 CAD12/A11
49 AD13 CAD13/IOR# 92 CBB_IORD# 35
PCI_AD14 48 93 CBB_A9 35
PCI_AD15 AD14 CAD14/A9
-1 PCI_AD16
47
37
AD15 CAD15/IOW# 94
96
CBB_IOWR# 35
AD16 CAD16/A17 CBB_A17 35
04/23 PCI_AD17
PCI_AD18
36 AD17 CAD17/A24 112 CBB_A24 35
35 AD18 CAD18/A7 113 CBB_A7 35
PCI_AD19 34 114 CBB_A25 35
PCI_AD20 AD19 CAD19/A25
32 AD20 CAD20/A6 115 CBB_A6 35
PCI_AD21 31 116 CBB_A5 35
PCI_AD22 AD21 CAD21/A5
30 AD22 CAD22/A4 118 CBB_A4 35
PCI_AD23 29 120 CBB_A3 35
PCI_AD24 AD23 CAD23/A3
27 AD24 CAD24/A2 122 CBB_A2 35
PCI_AD25 25 124 CBB_A1 35
PCI_AD26 AD25 CAD25/A1
24 AD26 CAD26/A0 125 CBB_A0 35
PCI_AD27 23 126 CBB_D0 35
AD27 CAD27/D0
MMI_CMD/BS/XD_ALE

PCI_AD28 22 127 CBB_D8 35


PCI_AD29 AD28 CAD28/D8
21 128 CBB_D1 35
MMI_CLK/XD_CLE
CINT#/RDY/IREQ#

PCI_AD30 AD29 CAD29/D1


CREQ#/INPACK#

20 1 CBB_D9 35
CSERR#/WAIT#

AD30 CAD30/D9
CDEVSEL#/A21

PCI_AD31
CRST#/RESET

CFRAME#/A23

19 AD31 CAD31/D10 3 CBB_D10 35


CPERR#/A14

B B
CTRDY#/A22
CSTOP#/A20

CGNT#/WE#
CIRDY#/A15

MMI_DATA0
MMI_DATA1
MMI_DATA2
MMI_DATA3
CPAR/A13

XD_WPO
RFU/D14
RFU/A18

XD_WE#
XD_CD#
XD_RB#

XD_RE#

XD_CE#
MMI_D4
MMI_D5
MMI_D6
MMI_D7
RFU/D2

GND
GND
OZ711MZ0TN-1-GP
99
85
2

107
103
119
117
121
100
98
109
104
102
110
105

9
10
12
13

75
74
73
72

14

15

68
65

67
69
70
71

108
33
71.00711.B1G
35 CBB_A18
35 CBB_D14
35 CBB_D2
35 CBB_A22
35 CBB_A20
35 CBB_WAIT# XD_ALE 31
35 CBB_RESET
35 CBB_INPACK# XD_CLE 31
35 CBB_A14
35 CBB_A13 XD_RE# 31
35 CBB_A15
35 CBB_RDY XD_WPO# 31
35 CBB_WE# XD_CD# 31
35 CBB_A23 XD_RB# 31
35 CBB_A21
31 MMI_D0 MMI_CLK/CE# 31
31 MMI_D1
31 MMI_D2 MMI_CMD/BS/WE# 31
31 MMI_D3
MMI_D7 31
A MMI_D6 31 Four Peaks A
MMI_D5 31
MMI_D4 31
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Card Reader - OZ711MZ0


Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 30 of 57
5 4 3 2 1
5 4 3 2 1

USB_CN1 & CR_CN1 Conn. Test Point


USB_OC#4 1 TP21 AFTE30-GP MMI_D0 1 TP97 AFTE30-GP SD_CD# 1 TP219 AFTE30-GP

USBPN1 1 TP86 AFTE30-GP MMI_D1 1 TP129 AFTE30-GP SD_WP 1 TP220 AFTE30-GP

USBPP1 1 TP80 AFTE30-GP MMI_D2 1 TP142 AFTE30-GP STDBY_LED#_E 1 TP221 AFTE30-GP

USBPN4 1 TP28 AFTE30-GP MMI_D3 1 TP145 AFTE30-GP 3D3V_S0 1 TP222 AFTE30-GP

USBPP4 1 TP27 AFTE30-GP MMI_D4 1 TP146 AFTE30-GP FRONT_PWRLED#_E 1 TP223 AFTE30-GP


D D
USB_PWR_EN# 1 TP18 AFTE30-GP MMI_D5 1 TP147 AFTE30-GP 3D3V_S5 1 TP224 AFTE30-GP

5V_S5 1 TP205 AFTE30-GP MMI_D6 1 TP148 AFTE30-GP KBC_PWRBTN#_CN 1 TP226 AFTE30-GP 5V_S0 3D3V_S0

MMI_D7 1 TP149 AFTE30-GP


DY DY

1
3D3V_CR_S0 1 TP170 AFTE30-GP

1
-1M(5/30) C318 C319 C306 C307

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
XD_RB# 1 TP199 AFTE30-GP

2
2

2
XD_RE# 1 TP202 AFTE30-GP

XD_CLE 1 TP203 AFTE30-GP

XD_ALE 1 TP213 AFTE30-GP

XD_WPO# 1 TP214 AFTE30-GP

XD_CD# 1 TP215 AFTE30-GP 5V_COMBO_S0

MMI_CMD/BS/WE# TP217 AFTE30-GP VCC_ASKT_S0


1
MS_CD# 1 TP216 AFTE30-GP

MMI_CLK/CE# TP218 AFTE30-GP U34

30
27

25

26
28

29
31

23
24
1

VCC/VPP
VCC/VPP

SC_VCC

5VIN
5VIN

3_3VIN
3_3VIN

NC#23
NC#24
C C

35 CBB_CD1# 4 CD1# CLKRUN# 17 PM_CLKRUN# 20,25,41,42,44


35 CBB_CD2# 3 CD2# PCI_CLK 10 PCLK_O2 3

SC_CLK 20 SC_CLK 34
MS_CD#
SC SD_CD#
2
6
MS_CD#
21
SD_CD# SC_RST SC_RST 34
1

DY EC14DY C106 34 SC_CD# 5 22


SC_CD# SC_IO SC_IO 34
SCD1U16V2ZY-2GP

SC1U16V3ZY-GP
2

35 CBB_VS1# 8 VS1 CSTSCHG/BVD1 18 CBB_BVD1# 35


35 CBB_VS2# 9 VS2 EPSI 11 EPSI 30
CR_CN1 C3141 2SC100P50V2JN-3GP
20,25 PCI_SERR# 15 SERR# RESET# 12 DY PCIRST1# 20,25,30
USB_CN1 3D3V_CR_S0 30 20,25 PCI_PERR# 14 13
PERR# INTA# INT_PIRQG# 20

MMI_VCC3#
MMI_WPI#
16 28

1_8VOUT
CAUDIO
20 USB_OC#4 14 30 MMI_D0 27
13 26

GND
GND
30 MMI_D1
20 USBPN1 12 30 MMI_D2 25
20 USBPP1 11 30 MMI_D3 24
10 30 MMI_D4 23

19
7

32
16

33
1
9 30 MMI_D5 22 OZ2544LN-GP-U
20 USBPN4
20 USBPP4 8 30 MMI_D6 21
7 30 MMI_D7 20
6 19
B 1D8V_O2 B
28,41 USB_PWR_EN# 5 18
4 30 XD_RB# 17
5V_S5 3 30 XD_RE# 16 SD_WP
2 30 XD_CLE 15
SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

30 XD_ALE 14 CARD_EN#
1

EC9 C66 1 30 XD_WPO# 13


DY DY 15 30 XD_CD# 12
30 MMI_CMD/BS/WE# 11
2

ACES-CON14-1-GP MS_CD# 10
20.K0276.014 30 MMI_CLK/CE# 9
20.K0227.014 SD_CD# 8
SD_WP 7 3D3V_CR_S0 U65 3D3V_S0

16 STDBY_LED#_E 6
3D3V_S0 5 1 OUT IN 5
16 FRONT_PWRLED#_E 4 2 GND
3D3V_S5 3 3 4 CARD_EN#
NC#3 EN#

1
2 C667
16,44 KBC_PWRBTN#_CN

1
1 SCD1U16V2ZY-2GP G5240B2T1U-GP-U C666

2
29 SC1U16V3ZY-GP

PTWO-CON28-GP

KBC_PWRBTN#_CN 20.K0275.028
FRONT_PWRLED#_E
STDBY_LED#_E

Four Peaks
A A

DY DY DY
Wistron Corporation
1

EC11 EC12 EC10


SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
2

Title

Card Reader Connector


Size Document Number Rev
-1M
Four Peaks
Date: Friday, November 21, 2008 Sheet 31 of 57
5 4 3 2 1
5 4 3 2 1

1D8V_LAN_M
20 mils
1 2 R64
3D3V_M_WOL 0R5J-5-GP C44 C51 C424 C48 C448 C439 C430

1
3D3V_LAN_M

SC470P50V2KX-3GP
SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
S D

2
DY 40 mils

1
C438

1
R431 AO3413-GP

SC1000P50V3JN-GP
DY

G
DY 1MR2J-1-GP Q35 C433
D SC4D7U6D3V3KX-GP D

2
DY

2
LAN_PHYPC_EN# 1 2 LAN_PY1
R430 1V_LAN_M
100KR2J-1-GP
20 mils

D
Q36 C437 C435 C431 C432

1
BSS138-7F-GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
20 LAN_PHYPC G
DY

2
-1M(6/30)

S
3D3V_LAN_M
1D8V_LAN_M

Q1
3 2

C385 C383 2SB772PT-1-GP C384 C429

1
SCD1U16V2ZY-2GP
R44

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

1
1
C450 SCD1U16V2KX-3GP U12

2
5K1R2-GP
20 GLAN_RXP 1 2 GLAN_RXP_R 52 GLAN_TXP MDI_N_0 26 LAN_MDI0N 45
C 1 2 GLAN_RXN_R 53 27 C

GLCI
20 GLAN_RXN GLAN_TXN MDI_P_0 LAN_MDI0P 45
C449 SCD1U16V2KX-3GP

2
20 GLAN_TXP GLAN_TXP 55 22
GLAN_RXP MDI_N_1 LAN_MDI1N 45
GLAN_TXN 56 23

MDI
20 GLAN_TXN GLAN_RXN MDI_P_1 LAN_MDI1P 45
20 LAN_CTRL_18
MDI_N_2 LAN_MDI2N 45
19 GLANCLK 33R2J-2-GP1 R435 2 GLAN_CLK_R 45 21
JKCLK MDI_P_2 LAN_MDI2P 45
19 LAN_RSTSYNC 50 JRSTSYNC
1

C296 16
MDI_N_3 LAN_MDI3N 45
SC22P50V2JN-4GP

19 LAN_TXD0 42 17 LAN_MDI3P 45

LCI
JTXD_0 MDI_P_3
-1M(5/30) 19 LAN_TXD1 43
2

JTXD_1
19 LAN_TXD2 44 JTXD_2 VDDO_33_3 3

1
SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

SC10U6D3V5MX-3GP
46 C441 3D3V_LAN_M
VDDO_33_46 C444 C440
19 LAN_RXD0 47 JRXD_0 AVDD_33_28 28
19 LAN_RXD1 48

2
JRXD_1
19 LAN_RXD2 49 JRXD_2 DVDD_10_5 5
Pull-up, configured to use external DVDD_10_8 8
regulator for 1.0 V supply. DVDD_10_33 33
Pull-down, the internal regulator DVDD_10_38 38 1V_LAN_M
will be used for 1.0V supply 45 LAN_ACT_LED# 4 LED_0
45 LAN_LINK_LED# 2 LED_1 AVDD_18_11 11
2R649 1LAN_LINK_LED#_R
1 LED_2 AVDD_18_14 14
3D3V_LAN_M 0R2J-2-GP 19
AVDD_18_19
AVDD_18_18 18
2 R411 1 RES_COMP 15 24
RSET AVDD_18_24
1

4K99R2F-L-GP 25
AVDD_18_25
AVDD_18_41 41
DY R425 IEEE_TEST_P 12 54 1D8V_LAN_M
1KR2J-1-GP IEEE_TEST_P AVDD_18_54
B
1 DY 2 IEEE_TEST_N 13 IEEE_TEST_N AVDD_18_32 32
B
R49 0R2J-2-GP 30
2

DIS_REG1P0 AVDD_18_30
34 DIS_REG10
20,41 PM_LAN_ENABLE R62 2 DY 1 0R2J-2-GP 29 LAN_CTRL_18
CTRL18
1

20 LAN_PHYPC R423 2 1 0R2J-2-GP LAN_DIS 37 31 LAN_CTRL_10R 1 TP162


R61 LAN_DISABLE_N CTRL10
-1M(6/30) DY
1KR2J-1-GP 1 2 LAN_TEST_EN 36 JTAG 51
R418 10KR2J-3-GP TEST_EN RESERVED_NC
JTAG_TRST

JTAG_TDO
JTAG_TMS
JTAG_TCK

XTAL2
JTAG_TDI

9
2

XTAL2
10 XTAL1 GND_PAD 57
X1 XTAL1
1 2
XTAL-25MHZ-68GP WG82567LM-GP
35
40
39
7
6
1

C54 C50 KI.BZM01.LM1


SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

MTAG0
MTAG1
MTAG2
MTAG3
MTAG4
2

Layout Note
Keep this R94 on top side TP163
1
and route differentially 1 TP164
1 TP5
1 TP7
1 TP165

A A
Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Intel 82567
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 32 of 57
5 4 3 2 1
A B C D E

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
LAN Connector LAN Connector
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
RJ45_1
4 9 4
A1
CONN_PWR A2
45 10M/100M/1G_LED#_SYS A3
RJ45_1 1
GIGA Lan Transformer RJ45_2 2
RJ45_3 3
RJ45_4 4
XF1 RJ45_5 5
3 RJ45_6 6
1 24 RJ45_1 RJ45_7 7
45 MDI0+_SYS RJ45_8 8
CONN_PWR2 B1
22 MCT1
1D8V_LAN_M B2
45 LAN_ACT_LED#_SYS
10
2 23 RJ45_2
45 MDI0-_SYS RJ45-124-GP-U2
4
5 20 RJ45_3
45 MDI1+_SYS

1
C380 C381 21 MCT2
1

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C670 C669
SC1KP50V2KX-1GP

SC10U10V5KX-2GP

2
6 19 RJ45_6
2

45 MDI1-_SYS
9
3 7 18 RJ45_4 3
45 MDI2+_SYS

16 MCT3

8 17 RJ45_5
45 MDI2-_SYS
10
11 14 RJ45_7
45 MDI3+_SYS

15 MCT4
1

C2 C3 12 13 RJ45_8
45 MDI3-_SYS
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2

XFORM-309-GP -1
68.IH080.30A RN65
3D3V_LAN_M 1 4 CONN_PWR2
2 3 CONN_PWR

20081121 SA SRN470J-4-GP-U

2
EC63 EC59
change to 68.IH080.30A

1
SC100P50V2JN-3GP

SC100P50V2JN-3GP
2
DY DY 2

MCT1
MCT2
MCT3
MCT4

8
7
6
5
RN1
SRN75J-1-GP

LAN_ACT_LED#_SYS

1
2
3
4
10M/100M/1G_LED#_SYS MCT_R

2
C1
SC1KP2KV8KX-GP

1
C375 C373
SC1KP50V2KX-1GP SC1KP50V2KX-1GP
1 Four Peaks 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN CONN
Size Document Number Rev
A3
-1M
Date: Friday, November 21, 2008 Sheet 33 of 57
A B C D E
A B C D E

COMBO1

10 35 TPS2231_PERST#
5V_COMBO_S0 VCC PERST#
36 PCIE_WAKE#_NEW 1 R602 2 PCIE_WAKE# 20
WAKE# CPUTSB#
1D5V_NEW_S0 40 +1_5V CPUSB# 15 DY 0R2J-2-GP
39 31 CPPE#
+1_5V CPPE# NEW_PIN16 TP201 RN37
4
CLKREQ# 32 4
33 1 DY 4 SMB_CLK_NEW
3D3V_NEW_S0 +3_3V 20,22,36 SMB_CLK
34 2 3 SMB_DATA_NEW
+3_3V 20,22,36 SMB_DATA
11 SMB_DATA_NEW
SMBDATA SRN33J-5-GP-U
3D3V_NEW_LAN_S5 1 +3_3VAUX RST 8 SC_RST 31
I/O 5 SC_IO 31
7 VPP SW 2 SC_CD# 31
TP212 6 SC_CLK 31
CLK SMB_CLK_NEW
SMBCLK 12
20 PCIE_RXN5 26 PERN0
20 PCIE_RXP5 25 PERP0
REFCLK- 29 CLK_PCIE_NEW# 3
20 PCIE_TXN5 23 PETN0 REFCLK+ 28 CLK_PCIE_NEW 3
20 PCIE_TXP5 22 PETP0

20 USBPN9 18 3
20 USBPP9 USBD- RES#3
17 USBD+ RES#4 4
PC2
38 NC#38 3
37 NC#37 GND 9
20 NC#20 GND 16
GND 19 1
CONN_TP2 14 21
TP196 CONN_TP1 RESERVED#14 GND
13 RESERVED#13 GND 24
TP197 27 2
GND
GND 30 4
NP1 NP1 GND 41
3 NP2 42 CARDBUS4P-SKT-GP 3
NP2 GND

FOX-CONN40A-4GP-U1 21.H0180.001
20.F0908.040

3D3V_S5
RN41
CPUTSB# 2 3
CPPE# 1 DY 4
TPS2231_PERST#
20,41,47,51,52 PM_SLP_S4# SRN100KJ-6-GP -1(5/9)
1 2 PLT_RST1# 7,20,36,41,42,44,46
R624 0R0402-PAD
C660
U62 1 DY 2

20

10
8
9

6
SC100P50V2JN-3GP

SHDN#
PERST#
CPUSB#
CPPE#
SYSRST#
2 2

20,41,46,47,53 PM_SLP_S3# 1 STBY# 3_3VIN 2 3D3V_S0


18 RCLKEN 3_3VOUT 3 3D3V_NEW_S0
19 OC# 1_5VIN 12 1D5V_S0
21 GND 1_5VOUT 11 1D5V_NEW_S0
AUXIN 17 3D3V_S5
AUXOUT 15 3D3V_NEW_LAN_S5
7 1_5VOUT
3_3VOUT
GND
1_5VIN

3_3VIN
NC#16
16
14
13
5
4

G577BR91U-GP
74.00577.A73
1D5V_S0 3D3V_S0 2nd = 74.83351.073
1D5V_NEW_S0 3D3V_NEW_S0

Place them Near to Chip Place them Near to Connector

3D3V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5


Four Peaks
1 1

C659
Wistron Corporation
1

1
SCD1U16V2ZY-2GP

C645 C647 C638 C641 C642


SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

2
Title

NEW CARD
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 34 of 57

A B C D E
5 4 3 2 1

PCMCIA Socket
Cardbus I/F
D CBB_D[15..0] D
CBB_D[15..0] 30
CBB_A[25..0]
CBB_A[25..0] 30
PCM1 CBB_IORD# 30
NP1 CBB_IOWR# 30
1 CBB_OE# 30
35 CBB_WE# 30
CBB_D3 2 CBB_REG# 30
CBB_CD1# 36
CBB_D4 CBB_RDY 30
3 CBB_WP 30
CBB_D11 37 CBB_RESET 30
CBB_D5 4
CBB_D12 CBB_WAIT# 30
38 CBB_INPACK# 30
CBB_D6 5
CBB_D13 39
CBB_D7 6 CBB_CE1# 30
CBB_D14 40 CBB_CE2# 30
CBB_CE1# 7
CBB_D15 41
CBB_A10 8
CBB_CE2# 42
CBB_OE# CBB_CD1# 31
9 CBB_CD2# 31
VCC_ASKT_S0 CBB_VS1# 43
CBB_A11 CBB_VS1# 31
10 CBB_VS2# 31
CBB_IORD# 44
CBB_A9 CBB_BVD1# 31
11
CBB_IOWR# 45
DY CBB_A8 12
C C292 C298 C293 CBB_A17 46 C
1

1
SC4D7U10V5ZY-3GP

SC1KP50V2KX-1GP

SCD1U25V3ZY-1GP

CBB_A13 13
CBB_A18 47
CBB_A14 14
2

CBB_A19 48
CBB_WE# 15
CBB_A20 49
CBB_RDY 16
CBB_A21 50
17
PCMCIA-T/R, Frame
51
18
52
CBB_A16 19
CBB_A22 53 PC1
CBB_A15 20 1 2
CBB_A23 54
CBB_A12 21
CBB_A24 55 3 4
CBB_A7 22
CBB_A25 56
CBB_A6 23
CBB_VS2# 57 CARD-SKT24-GP
CBB_A5 24 21.H0145.001
CBB_A16 CBB_RESET 58
CBB_A4 25
CBB_WAIT# 59
CBB_A3 26
CBB_INPACK# 60
B CBB_A2 B
27
CBB_REG# 61
CBB_A1 28
Place close to pin 19. 62
1

CBB_A0 29
C300 CBB_BVD1# 63
DUMMY-C2 CBB_D0 30
CBB_D8 64
CBB_D1 31
CBB_D9 65
2

CBB_D2 32
CBB_D10 66
CBB_WP 33
CBB_CD2# 67
Clock AC termination 34
33MHz clock for 32-bit 68
NP2
Cardbus card I/F
CARDBUS68P-26GP
62.10024.951

A Four Peaks A
1

C317
SCD01U16V2KX-3GP
Wistron Corporation
2

DY
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCMCIA
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 35 of 57
5 4 3 2 1
5 4 3 2 1

Mini Card Connector(Robson2 and 3G)


Support debug-card Close to SKT1(SIM socket).

Mini Card Connector(WLAN)


-1M(5/27)

1
3D3V_S0

FTZ6D8E-GP
D 3D3V_S0 D
3D3V_S5 3D3V_S5
DY DY DY
1D5V_S0 R63 R448

1
R60

R446
0R2J-2-GP

0R2J-2-GP

0R2J-2-GP
0R3-0-U-GP
MINI1 D5
53

5
NP1

2
1D5V_S0 3D3V_S0 3D3V_S5 3D3V_S0 3D3V_S5 1
DY DY 2
3

1
R471

R470

R458

R455
0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP
5 4
MINI2 7 6
53 9 8 SIM_CCVCC
NP1 11 10 SIM_CCIO_1
3 CLK_PCIE_MINI2# SIM_CCCLK_1
1 13 12

2
3 CLK_PCIE_MINI2 SIM_CCRST_1
2 15 14
3 16 SIM_CCVPP
5 4
7 6 17 1 R68 2
9 8 19 18 DY
11 10 21 20 10KR2J-3-GP
3 CLK_PCIE_MINI1# 3G_EN 41
3 CLK_PCIE_MINI1 13 12 20 PCIE_RXN3 23 22 1 R69 2 PLT_RST1# 7,20,34,41,42,44,46
0R0402-PAD
15 14
16
20 PCIE_RXP3 25
27
24
26
-1
10KR2J-3-GP 29 28
41 E51_RxD 17 1 DY 2 20 PCIE_TXN3 31 30 1 DY 2 SMB_CLK 20,22,34
19 18 R473 20 PCIE_TXP3 33 32 R55 1 DY 2 0R2J-2-GP
41 E51_TxD SMB_DATA 20,22,34
C 21 20 35 34 R52 0R2J-2-GP C
WIRELESS_EN 41
20 PCIE_RXN2 23 22 1 R472 2 PLT_RST1# 7,20,34,41,42,44,46 37 36 USBPN10 20
0R0402-PAD
20 PCIE_RXP2 25
27
24
26
-1 39
41
38
40
USBPP10 20
29 28 43 42 3G_LED# 16
20 PCIE_TXN2 31 30 1 DY 2 SMB_CLK 20,22,34 DY 45 44
20 PCIE_TXP2 33 32 R469 1 DY 2 0R2J-2-GP 47 46
SMB_DATA 20,22,34
35 34 R468 0R2J-2-GP 49 48
37 36 USBPN7 20 5V_S5 1 R401 2 51 50
0R2J-2-GP
-1(5/9)
39
41
38
40
USBPP7 20 -1 52
NP2
43 42 LED_WWAN# 1 TPAD28 TP35 54
20 CL_CLK1 1 2 45 44 WLAN_LED# 16
20 CL_DATA1 1R116 0R0402-PAD
2 47 46 SKT-MINI52P-22-GP-U
20 CL_RST#1 1R114 0R0402-PAD
2 49 48 62.10043.591
5V_S5 1R108 0R0402-PAD
2 51 50
R112 0R2J-2-GP 52 62.10043.611
NP2
54

SKT-MINI52P-22-GP-U
62.10043.591
62.10043.611

B B

SIM_CCVCC

C68
Place near MINIC2 1 2
DY
SC4D7U6D3V3KX-GP
3D3V_S0 1D5V_S0 3D3V_S5 C49
1 2
DY -1
SCD01U25V2KX-3GP
1 C57 C460 C72 C47 C55 SIM1 0423

1
SIM_CCVCC

SC1U10V3ZY-6GP

SC1U10V3ZY-6GP
C1

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SIM_CCVPP VCC
C6 VPP
7
2

2
SIM_CCRST_1 1 SIM_CCRST C2 GND
2 RST DY GND 8
Place near MINIC1 SIM_CCCLK_1 1R631 0R0402-PAD
2 SIM_CCCLK C3 9
SIM_CCIO_1 1R632 0R0402-PAD SIM_CCIO CLK GND
2 C7 I/O GND C5
R633 0R0402-PAD
3D3V_S0 1D5V_S0 3D3V_S5 CARDBUS6P-GP-U
-1 62.10024.841
20.I0085.001
TC10 C470 C89 C486 C490 C58
1

1
ST330U6D3VDM-17GP

SC1U10V3ZY-6GP

SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

A Four Peaks A
DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 36 of 57
5 4 3 2 1
FAN1 Conn. Test Point
5V_S0

EMC2102_FAN_DRIVE 1 TP151 AFTE30-GP

1
EMC2102_FAN_TACH_1 1 TP150 AFTE30-GP
R369
10KR2J-3-GP

3D3V_S0 FAN1 -1M(5/27)

2
R370
D25 5
3 1
5V_S0 1 2 EMC2102_FAN_TACH A K EMC2102_FAN_TACH_1 3
2
SSM14PT-GP-U
10KR2J-3-GP EMC2102_FAN_DRIVE 1
*Layout* 15 mil 4

K
1

1
C92 C91 C382 D24 ACES-CON3-GP-U1
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SC22U6D3V5MX-2GP SSM14PT-GP-U

2
20.F0714.003

A
3D3V_S0
SMBC_Therm 18,41,46 20.F1000.003
SMBD_Therm 18,41,46
1 2 EMC2102_VDD_3D3

R109
49D9R2F-GP

29

28

27

26

25

24

23

22
2
C88 U17

SMCLK

SMDATA
FANa

FANb
GND

TACH

VDD_5Va

VDD_5Vb
SCD1U16V2KX-3GP 3D3V_S0

1
4 H_THERMDC
1

1
Layout notice :
C86 Both H_THERMDA and THERMDC routing 1 21 R98
SC470P50V3JN-2GP 10 mil trace width and 10 mil spacing VDD_3V NC#21 8K2R2J-3-GP
2

4 H_THERMDA 2 DN1 GND 20

2
1.For CPU Sensor 3 19 ALERT# 2 R99 1 THRM# 20
DP1 ALERT# 0R2J-2-GP DY
EMC2102_DN2 4
EMC2102 18 CLK_32K 3D3V_S0
DN2 CLK_IN R92
Layout notice : Both DN2 and DP2 routing EMC2102_DP2 5 17 EMC2102_CLK_SEL 1 2
10 mil trace width and 10 mil spacing DP2 CLK_SEL
C374 must be near Q7 GND = Internal Oscillator Selected
EMC2102_DN3 6 16
DN3 RESET# 10KR2J-3-GP +3.3V = External 32.768kHz Clock Selected
2

EMC2102_DP3 7 15
E

C508 C83 DP3 NC#15


PWROK_EMC 47

THERMTRIP#

POWER_OK#
SYS_SHDN#
B DY SC470P50V3JN-2GP SC470P50V3JN-2GP

FAN_MODE
SHDN_SEL
1

MMBT3904-3-GP

TRIP_SET
Q40 C373 must be near EMC2102
C

NC#8
2.System Sensor, Put between CPU and NB. GND = Channel 1
2nd = 84.03904.L06 OPEN = Channel 3

10

11

12

13

14
C375 must be near Q8 +3.3V = Disabled EMC2102-DZK-GP
74.02102.A73
Layout notice : Both DN3 and DP3 routing R84
E

10 mil trace width and 10 mil spacing 2 DY 1 EMC2102_SHDN


2

B C79
MMBT3904-3-GP DY SC470P50V3JN-2GP C110
Q8 10KR2J-3-GP
SC470P50V3JN-2GP
1
C

C372 must be near EMC2102 3D3V_S0 3D3V_S0


2nd = 84.03904.L06 R78
VGATE_PWRGD 20,49

3.HW T8 sensor 2 DY 1 EMC2102_FAN_mode

10KR2J-3-GP

SCD1U16V2ZY-2GP

1
1
R83 R77
2 1 C71 10KR2F-2-GP

2
10KR2J-3-GP PURE_HW_SHUTDOWN#

2
GND = Fan is OFF
OPEN = Fan is at 60% full-scale TRIP_SET Pin Voltage
V_DEGREE
RUN_POWER_ON +3.3V = Fan is at 75% full-scale V_DEGREE

SCD1U16V2ZY-2GP
=(((Degree-75)/21)

1
1
R82
C74 2K7R2J-GP
G

Q42 R95

2
10R2J-2-GP
-1

2
20,42 PM_SUS_CLK D S CLK_32K_R 1 2 CLK_32K
-1
1

2N7002-11-GP
DY R94
240KR3-GP

2ND = 84.27002.N31 3D3V_AUX_S5


2

32K suspend clock output


2
1

R551 D39
3D3V_S0 10KR2J-3-GP BAT54-7-F-GP
3D3V_S0 DY 2nd = 83.BAT54.D81
Four Peaks
1

R88 Q6 RSMRST# 41,47


Wistron Corporation
G

10KR2J-3-GP
(dummy, KBC already delay) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

PURE_HW_SHUTDOWN# S D RSMRST# Taipei Hsien 221, Taiwan, R.O.C.


1

C582 DY
SCD1U16V2ZY-2GP Title

Thermal/Fan Controllor
2

2N7002-11-GP
Size Document Number Rev
2ND = 84.27002.N31
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 37 of 57
5 4 3 2 1

3D3V_S0 5VA_S0

RN24
C311 4 5

1
39 AMP_BEEP 1 2 AMP_BEEP_1 3 6 C326 C361

1
SCD47U16V3ZY-3GP KBC_BEEP_1 2 7 AUDIO_BEEP 1 2AUDIP_PC_BEEP C337 SC10U10V5ZY-1GP C358
D 1 8 C333 SC10U10V5ZY-1GP SCD1U10V2KX-4GP D

2
SC1U10V3KX-3GP

2
C312 SRN47KJ-1-GP C325

1
41 KBC_BEEP 1 2 1 2
SCD47U16V3ZY-3GP R300 C321 SCD1U10V2KX-4GP SC12P50V2JN-3GP
C313 10KR2J-3-GP SC100P50V2JN-3GP

2
20 ACZ_SPKR 1 2 SPKR_SB_1 RESET# 1R304 0R0402-PAD
2 ACZ_RST# 19,27
SCD47U16V3ZY-3GP -1(5/9) ACZ_SYNC 19,27

2
BCLK 2R313 0R2J-2-GP
1 ACZ_BITCLK 19 1 2 LINEOUT_JD# 40
R366
39K2R2F-L-GP
-1 1
C332
2

3D3V_S0 R305
1 0R0402-PAD
2 SC22P50V2JN-4GP ALC268_SENSE 1 R36 2 LINEIN_JD# 40
10KR2F-2-GP
1D5V_S0 1 2
R306 DY 0R2J-2-GP

25
38

12
11
10

33

44
43

34
13
1 2

1
9

6
U39 1 R361 2 MIC_JD# 40
C329 SC18P50V2JN-1-GP 20KR2F-L-GP

PCBEEP

BCLK

SENSE_B
SENSE_A
DVDD-IO
AVDD1
AVDD2

RESET#
DVDD

SYNC

NC#33

NC#44
NC#43
3D3V_S0
-1M(6/25)

1
R325
SC4D7U10V5ZY-3GP 1 2C348 ALC861_LINE_IN_L 23 5 ACZ_SDATAOUT 19,27 10KR2J-3-GP
40 LINE_IN_L SC4D7U10V5ZY-3GP LINE1-L_PORT-C SDATA-OUT
40 LINE_IN_R 1 2C353 ALC861_LINE_IN_R 24 LINE1-R_PORT-C SDATA-IN 8 AC97_DATIN 1 2 ACZ_SDATAIN0 19 DY AMP_SHUTDOWN# 39,41
14 R312 39R2J-L-GP

2
NC#14
15 NC#15
SB Pull High: EMIC 29
SPDIFO 48
47 ALC_EAPD
DOCK_SPDIF 44
LINE1-VREFO EAPD

1
Pull Low: Analog Mic 1 2 31 GPIO1

1
C R634 1KR2J-1-GP D22 C
45 R327
-1 BAW56-7-F-GP
NC#45

2
40 AUD_MICIN_L SC2D2U10V3KX-1GP 1 2 C362 MIC1-L_PORT-B 21 46 10KR2J-3-GP
SC2D2U10V3KX-1GP MIC1-L_PORT-B DMIC-CLK DY
40 AUD_MICIN_R 1 2 C363 MIC1-R_PORT-B 22 MIC1-R_PORT-B DY
R332

0R0402-PAD
40 INT_MIC1 2 R330 1 SC1U16V3ZY-GP 1 2C344 MIC2-L_PORT-F 16 2ND = 83.00056.G11

3
1KR2J-1-GP SC1U16V3ZY-GP MIC2-L_PORT-F
1 2C345 MIC2-R_PORT-F 17 MIC2-R_PORT-F HP-OUT-L_PORT-A 39 HPOUT_L 39
41 HPOUT_R 39 R334

1
RN66 SRN2K2J-1-GP HP-OUT-R_PORT-A
4 1 MIC1V_R 32 39 ALC268_EAPD 1 2 3D3V_S0
MIC1V_L MIC1-VREFO-R
3 2 28 MIC1-VREFO-L LINE-OUT-L_PORT-D 35 LINEOUT_L 39

DMIC-12/GPIO0
DMIC-34/GPIO3
R333 1 2 MIC2-VREFO 30 36 LINEOUT_R 39 DY 10KR2J-3-GP
2K2R2J-2-GP MIC2-VREFO LINE-OUT-R_PORT-D

MONO-OUT
1

C368 C367 C369 3D3V_S0


-1

JDREF
AVSS1
AVSS2
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

DVSS
DVSS

VREF

CD-G
CD-R
CD-L

1
2

R303
ALC268-VB1-GR-GP 26 10KR2J-3-GP
42
4
7

27

40
37

2
3

18
20
19
71.00268.A0G
D20

2
11/30
A K DOCK_IN# 17,18,41,44,45

JDREF
ALC_GPIO0
RB551V30-GP

1
MONO-OUT
VREF 1 DY R315 83.R5003.H8H

10KR2J-3-GP
TP206
1

C364 R338 TPAD30


1

SCD47U16V3ZY-3GP

C366 20KR2F-L-GP
DY

2
B B
SC10U10V5ZY-1GP

2
2

5V_S0

4.75V / 300mA
U40

1 5 5VA_S0
EN NC#5
2 GND
3 VIN VOUT 4
1

RT9198-4GPBG-GP
1

C356 74.09198.A7F C351


SC10U10V5ZY-1GP
SC1U10V3KX-3GP

A Four Peaks A
2

2nd:74.00923.C3F Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
(G923-475T1UF-GP)
Title
Azalia codec ALC268
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 38 of 57
5 4 3 2 1
A B C D E

AUDIO OP AMPLIFIER

4 4

C365 SC1U10V3ZY-6GP
1 2 2 1 INR_A
38 LINEOUT_R R352 0R2J-2-GP

C370 SC1U10V3ZY-6GP
1 2 2 1 INL_A
38 LINEOUT_L
R356 0R2J-2-GP

R337 40K2R2F-GP
1 2 1 2 INR_H
38 HPOUT_R
3 C349 SC3D3U10V5KX-2GP 3
R342 40K2R2F-GP
-1C330 SCD47U16V3ZY-3GP
1 2 1 2 INL_H U37 2 R314 1 1 2 AMP_BEEP 38 Layout Note:
38 HPOUT_L 5V_S0 0R0402-PAD
C357 SC3D3U10V5KX-2GP 29 C218,C219,C220 near U110
C342 SC2D2U6D3V3MX-1-GP GND
-1M(6/25) 1 2
1
2
VDD BEEP 28
27 SPK_EN#
INR_A GND AMP_EN# SET 5V_S0 3D3V_S0
3 INR_A SET 26
BIAS INR_H 4 25 BIAS
C343 SCD1U16V2ZY-2GP INL_A INR_H BIAS HP_EN
5 INL_A HP_EN 24
1 2 INL_H 6 23
INL_H PGND SPKR_R+
7 PGND ROUT+ 22 SPKR_R+ 40

2
40 SPKR_L+ SPKR_L+ 8 21 SPKR_R- SPKR_R- 40 C346 C336 C347
LOUT+ ROUT-

SCD1U16V2ZY-2GP

SC10U6D3V5MX-3GP

SC1U10V3ZY-6GP
40 SPKR_L- SPKR_L- 9 20 5V_S0
LOUT- PVDD
10 19 3D3V_S0

1
PVDD HVDD
11 CVDD HP_L 18 HP_L 40
12 CP+ HP_R 17 HP_R 40
13 CGND HVSS 16
2

14 CP- CVSS 15
C352
SC1U10V3ZY-6GP
1

2
APA2057ARI-TRL-GP
74.02057.01G C354

SC1U10V3ZY-6GP
1
2 2

5V_S0 5V_S0 5V_S0


1

2
R301 R329 R308
10KR2J-3-GP 10KR2J-3-GP 2K2R2J-2-GP
-1(5/9) DY
2

SPK_EN# 2 DY 1 1 R650 2
0R0402-PAD HP_EN SET
Q23 R302 0R2J-2-GP
D

2N7002-11-GP
由KBC control
E

Q24
38,41 AMP_SHUTDOWN# G 38 ALC268_EAPD B R321
DY 4K7R2J-2-GP
2nd = 84.27002.N31 MMBT3906-3-GP
S

2nd = 84.03906.P11
2

1 Four Peaks 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO AMP
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 39 of 57
A B C D E
5 4 3 2 1

INTMIC1 Conn. Test Point


Internal Microphone
LINE IN INT_MIC1 1 TP2 AFTE30-GP

G10
-1M(5/27)
D 38 LINEIN_JD# 1 2 INTMIC1 D
DOCK_JD_LINEIN# 44 5
GAP-CLOSE
-1 1
SRN1KJ-7-GP 2
DOCK_LINEIN_R 44 38 INT_MIC1
38 LINE_IN_R 2 3 1 2 3
1 4 C427
1 2SC1U10V3KX-3GP DOCK_LINEIN_L 44 4
38 LINE_IN_L C426 SC1U10V3KX-3GP EC8

1
RN67 6
1
1

SC1KP50V2KX-1GP
R412
R415
-1M(6/09) DY

2
EC143 EC142 ACES-CON4-GP-U1
SC1KP50V2KX-1GP
10KR2J-3-GP
10KR2J-3-GP

DYDY SC1KP50V2KX-1GP 20.F0714.004

2
DY DY 20.F1000.004
2
2

C MIC IN 1
RN68 SRN33J-5-GP-U
4
LINE OUT C
44 DOCK_LINEOUT_R
44 DOCK_LINEOUT_L 2 3
G51
-1(5/9)
44 DOCK_JD_MIC# 2 1 LOUT1
44 DOCK_MICIN_L 10R2J-2-GP 2 R358 EC140
44 DOCK_MICIN_R 10R2J-2-GP 2 R360 GAP-CLOSE SC680P50V2KX-2GP PHONE-JK235-GP-U2
38 MIC_JD#

1
MICIN1 RN69 1
2 3 HP_L_1 2
39 HP_L
2 NP2 1 4 6
NP1 HP_R_1 3
39 HP_R SRN56J-4-GP
5 4
4 38 LINEOUT_JD# 5

R354 1KR2J-1-GP
R355 1KR2J-1-GP
2 R359 1 AUD_MIC_R 3 NP1
38 AUD_MICIN_R

1
1

1
1KR2J-1-GP 6 NP2

1
2 R357 1 AUD_MIC_L 2 C371 C372 G50
38 AUD_MICIN_L

SC680P50V2KX-2GP

SC680P50V2KX-2GP
1KR2J-1-GP 1 GAP-CLOSE
1
1

1
R350
R351

-1(5/9) EC141 22.10133.B21

2
1

SC680P50V2KX-2GP
EC56 EC57 PHONE-JK233-GP-U3

2
2

2
SC680P50V3JN-GP

SC680P50V3JN-GP

22.10133.B01 22.10251.511

2
10KR2J-3-GP
10KR2J-3-GP

22.10251.491 44 DOCK_JD_HP#
2

-1(5/9)
2
2

DYDY

B B

Internal Speaker
5

SPKR1 SPKR1 Conn. Test Point


1 ACES-CON4-1-GP-U2
39 SPKR_L- SPKR_L- 20.D0197.104
39 SPKR_L+ SPKR_L+ 2 20.D0174.104 SPKR_L- 1 TP208 AFTE30-GP
39 SPKR_R- SPKR_R- 3
39 SPKR_R+ SPKR_R+ 4 SPKR_L+ 1 TP209 AFTE30-GP

SPKR_R- 1 TP210 AFTE30-GP


6
1
1
1
1

SPKR_R+ 1 TP211 AFTE30-GP


2
2
2
2

DY DY DY DY
-1M(5/27) Four Peaks
A A
EC84
EC85
EC89
EC88

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO JACK
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 40 of 57

5 4 3 2 1
A

3D3V_AUX_S5 3D3V_S0 3D3V_AUX_S5

5V_S0

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
1

1
EC82 C305 C283 C256 C653 C654 C640 C646

SCD1U16V2ZY-2GP
4
3

2
1
RN38 RN44 3D3V_S5 3D3V_M_WOL

8
7
6
5
SRN4K7J-8-GP

SRN10KJ-5-GP

2
DY RN39
SC SRN10KJ-6-GP

1
3D3V_AUX_S5
-1
1
2

3
4
C555,C556 colse to Pin VDD R292 R223

1
2
3
4
1 R289 2 10KR2J-3-GP 10KR2J-3-GP
BAT_SDA 0R0603-PAD
THER_SCL 56
BAT_SCL TPDATA_DOCK2

SCD1U16V2ZY-2GP
THER_SDA 56

2
SC1U16V3ZY-GP
TPCLK_DOCK2

1
4
C655 EC54 TPDATA_DOCK1 4

C299 DY TPCLK_DOCK1 DOCK_IN#

SCD1U16V2ZY-2GP
PM_LAN_ENABLE

2
3D3V_S0
R611
7,20,34,36,42,44,46 PLT_RST1# 1 2PLT_RST1#_1
100R2J-2-GP
3D3V_S0

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
56 BAT_A_IN#

SC27P50V2JN-2-GP
1
C648

RESO-32D768KHZ-GP
102

115
DY U26A

80

19
46
76
88
4

1
1 OF 2

2
R284 C270 C269

GPIO41

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
10KR2J-3-GP 1 2 E51_RxD

1KBC_XO_R2

2
DY X4

4
43 PROGRAM# 124 GPIO10/LPCPD# VREF 104 2 R601 1 10KR2J-3-GP
10KR2J-3-GP 1 R287 2 E51_TxD 7 2 1
LRESET#
DY 3 PCLK_KBC
2 LCLK A/D GPI90/AD0 97 AD_IA 55 DY
19,42,44 LPC_LFRAME# 3 98 MAIL# 43 82.10026.021

3
LFRAME# GPI91/AD1

33KR2J-3-GP
126 99 U26B 2 OF 2
19,42,44 LPC_LAD0 LAD0 GPI92/AD2 INTERNET# 43
2 19,42,44 LPC_LAD1 127 LAD1 GPI93/AD3 100 SYNC# 43 R245
R258 R244
10KR2J-3-GP 1 R288 2 E51_TxD R612 128 108 EPRESENTATION# 43
19,42,44 LPC_LAD2 LAD2 GPIO05
DY 1 KBC_XI KCOL1 TP113 TPAD28
0R2J-2-GP 19,42,44 LPC_LAD3 LPC 96 SYS_CHARGE# 44 1 2 1 2 77 53

2
LAD3 GPIO04 32KX1/32KCLKIN KBSOUT0/JENK# KCOL2
20,30,42,44 INT_SERIRQ 125 SERIRQ KBSOUT1/TCK 52
SC4D7P50V2CN-1GP 20,25,31,42,44 PM_CLKRUN# 8 10MR2J-L-GP 10MR2J-L-GP 51 KCOL3
1

GPIO11/CLKRUN# KBSOUT2/TMS KCOL4


C652 19 KBRCIN# 122 KBRST# KBSOUT3/TDI 50
19 KA20GATE 121 101 KBC_XO 79 49 KCOL5
GA20 GPI94 KBC_THERMALTRIP# 47 32KX2 KBSOUT4/JEN0#
1 2PCLK_KBC_RC ECSCI#_KBC 29 ECSCI#/GPIO54 GPI95 105 HIGH_LOAD 44 38,39 AMP_SHUTDOWN# 30 GPIO55/CLKOUT KBSOUT5/TDO 48 KCOL6
DY 9 KCOL7
46 BLON_IN
ECSWI#_KBC 123 GPIO65/SMI# D/A GPI96 106
107
DOCK_IN# 17,18,38,44,45
63
KBSOUT6/RDY# 47
43 KCOL8
GPIO67/PWUREQ# GPI97 CRT_DEC# 17,44 20,32 PM_LAN_ENABLE GPIO14/TB1 KBSOUT7
117 KCOL9
20 PM_PWRBTN#
31
GPIO20/TA2 KBC
KBSOUT8 42
41 KCOL10
FOR KBC DEBUG 55 CHG_ON#
32
GPIO56/TA1 KBSOUT9
40 KCOL11
THER_SDA 38 KBC_BEEP GPIO15/A_PWM KBSOUT10 KCOL12
THERMAL-----> THER_SCL
68
67
GPIO74/SDA2 GPIO01/TB2 64 PM_SLP_S3# 20,34,46,47,53 56 BAT_SEL_A/B# 118 GPIO21/B_PWM KBSOUT11 39
KCOL13
5V_AUX_S5 69
GPIO73/SCL2 SMB GPIO03 95
93
KBC_PWRBTN# 16 15 BRIGHTNESS 62 GPIO13/C_PWM KBSOUT12/GPIO64 38
37 KCOL14
55,56 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 55,56 KBSOUT13/GPIO63
70 94 COVER_SW# 36 KCOL15
BATTERY-----> 55,56 BAT_SCL GPIO17/SCL1 GPIO07
119
KBSOUT14/GPIO62
35 KCOL16
TPAD28 TP134 GPIO23 ELOCK# 43 KBSOUT15/GPIO61/XOR_OUT
GPIO24 6 PM_SLP_M# 20,47 -1 44 TPDATA_DOCK2 13 GPIO12/PSDAT3 GPIO60/KBSOUT16 34 BAY_ID0 23
GPIO30 109 DC_BATFULL 16 44 TPCLK_DOCK2 12 GPIO25/PSCLK3 GPIO57/KBSOUT17 33 BAY_ID1 23
NUM_LED 81 LCD_CB_SEL
3

16 NUM_LED GPIO66/G_PWM SP GPIO31 120


65
LCD_CB_SEL 15 44 TPDATA_DOCK1 11
10
GPIO27/PSDAT2
3

GPIO32/D_PWM FRONT_PWRLED 16 44 TPCLK_DOCK1 GPIO26/PSCLK2


66 TPDATA 71 54 KROW1
GPIO33/H_PWM STDBY_LED 16 TPCLK GPIO35/PSDAT1 KBSIN0 KROW2
GPIO40/F_PWM 16 CAP_LED 16 72 GPIO37/PSCLK1 PS/2 KBSIN1 55
26 BLUETOOTH_EN 84 17 AD_OFF 56 56 KROW3
GPIO77 GPIO42/TCK KBSIN2 KROW4
36 3G_EN 83 GPIO76/SHBM SPI GPIO43/TMS 20 RSMRST#_KBC 20 KBSIN3 57
82 21 58 KROW5
36 WIRELESS_EN
91
GPIO75 GPIO GPIO44/TDI
22
PM_SLP_S4# 20,34,47,51,52
86
KBSIN4
59 KROW6
16 WLAN_TEST_LED GPIO81 GPIO45/E_PWM CHARGE_LED 16 42 SPIDI F_SDI KBSIN5
23 3G_BTN# 14 42 SPIDO 87 60 KROW7
GPIO46/TRST# F_SDO KBSIN6 KROW8
GPIO47 24 BT_BTN# 14 42 SPICS# 90 F_CS0# FIU KBSIN7 61
GPIO50/TDO 25 E-BUTTON# 43 42 SPICLK 92 F_SCK
E51_TxD 111 26 BT_LED 16
36 E51_TxD E51_RxD 113 GPO83/SOUT_CR/BADDR1 GPIO51 ECRST#
36 E51_RxD GPIO87/SIN_CR GPIO52/RDY# 27 BLON_OUT 15 VCC_POR# 85
112 GPO84/BADDR0 GPIO53 28 WIRELESS_BTN# 14
GPIO70 73 SUSPWRACK 20
56 BAT_B_IN# 114 GPIO16 GPIO71 74 1R285 2 AC_PRESENT 20
MCH_TSATN#_KBC 14 75 0R0402-PAD WOL_EN 2 1 HDA_DOCK_EN# 19 WPCE773LA0DG-GP
GPIO34 GPIO72 0R2J-2-GP R349
50 S5_ENABLE
15 GPIO36 GPO82/TRIS# 110 USB_PWR_EN# 28,31
SER/IR

1
RN8 -1(5/9) -2(10/13) RN40
R603

10KR2J-3-GP
5 4 VCORF 44 DY 3D3V_AUX_S5 5 4 ECRST#
S5_ENABLE VCORF KBC_THERMALTRIP#
6 3 6 3
1

7 2 KA20GATE C274
-1 7 2

1
THER_SCL AGND 3D3V_S0 KBRCIN#
8 1 8 1

GND
GND
GND
GND
GND
GND
3D3V_S0 3D3V_S0

SC1U10V3KX-3GP
C639
2

SCD1U16V2ZY-2GP

2
SRN10KJ-6-GP WPCE773LA0DG-GP D16 R125 10KR2J-3-GP SRN10KJ-6-GP Q16
Q7
103

5
18
45
78
89
116
71.00773.00G LCD_CB_SEL 2 1 37,47 RSMRST# B

4 3 6 1 ECSCI#_KBC MMBT3906-3-GP

C
20 ECSCI#_1 UMA
BLON_IN
2nd = 84.03906.P11
5 2 1 2
5 2 R256 0R2J-2-GP GMCH_BL_ON 7
SMBC_Therm 18,37,46
THER_SDA 6 1 SMBD_Therm 18,37,46

20 ECSWI# 4 3 ECSWI#_KBC
2N7002DW-1-GP 3D3V_S0
HIGH_LOAD 1 R639 2
3D3V_AUX_S5 100KR2J-1-GP
2nd = 84.27002.C3F SDM03MT40A-7-F-GP
3D3V_S0
BLON_IN 1 R609 2
2

TPOINTCN1 Conn. Test Point 100KR2J-1-GP


2

Internal KeyBoard Connector

4
3
DY
TPOINTDATA 1 TP254 AFTE30-GP BAT_A_IN# 1 R604 2 AD_OFF 2 R608 1 RN19
100KR2J-1-GP 1KR2J-1-GP SRN1K5J-GP
TPOINTCLK 1 TP255 AFTE30-GP
BAT_B_IN# 1 R615
SB 2
Cover Up Switch 5V_S0 1 TP257 AFTE30-GP 100KR2J-1-GP

1
2
TPOINTCN1
TP_LEFT 1 TP256 AFTE30-GP 9 MCH_TSATN#_KBC
1 5V_S0

C
TP_RIGHT 1 TP259 AFTE30-GP DY
3D3V_AUX_S5 2 1 2 B Q15
3 DY R131 0R2J-2-GP MMBT3904-3-GP
4 TPOINTDATA DY R226

E
2

3D3V_AUX_S5 5 TPOINTCLK DY
R20 6 TP_LEFT 7 MCH_TSATN# 1 2 B Q14 2nd = 84.03904.L06
2K2R2J-2-GP COVER_SW# 7 MMBT3904-3-GP
BAV99PT-GP-U 8 TP_RIGHT

E
330R2J-3-GP
26

25

2 10
TOUCH
1

KB1 5V_S0
2nd = 84.03904.L06
43 COVER_SW# 3 DY
ACES-CON24-3-GP ACES-CON8-5-GP

20.K0246.024
1 20.K0228.008
20.K0185.008 5V_S0 PAD 5V_S0
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

20.K0321.024 D2 RN45 DY

1
2
TP_DATA
KB1 CN Test Point

1
TP_CLK

SRN10KJ-5-GP
KROW1
KROW2
KROW3

KROW4

KROW5

KROW6
KROW7

KROW8

RN15 EC18 EC17 TP_LEFT


1
2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY TP_RIGHT

2
KROW1 TP241 AFTE30-GP KCOL5 TP244 AFTE30-GP
SRN10KJ-5-GP

1 1 DY
KCOL10

KCOL11
KCOL12

KCOL13
KCOL14
KCOL15

KCOL16

4
3

2
KCOL1
KCOL2
KCOL3

KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

KROW2 1 TP229 AFTE30-GP KCOL6 1 TP238 AFTE30-GP 5V_S0


-1(5/9) TPCN1 EC45 EC46 EC43 EC44
KROW3 1 TP230 AFTE30-GP KCOL7 1 TP239 AFTE30-GP 13
For EMI
4
3

1
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
2 1 DY DY DY DY
KROW4 1 TP231 AFTE30-GP KCOL8 1 TP245 AFTE30-GP TPOINTDATA R2861 0R0402-PAD
2
DY 3 TPDATA TPOINTCLK R2901 0R0402-PAD
2 TPOINTDATA1 2
KROW5 1 TP242 AFTE30-GP KCOL9 1 TP246 AFTE30-GP TPOINTCLK1 3
1 TPDATA 1 4 TP_DATA 4
KROW6 1 TP232 AFTE30-GP KCOL10 1 TP247 AFTE30-GP TPCLK 2 3 TP_CLK 5
D35 SRN33J-5-GP-U 6
1

KROW7 1 TP233 AFTE30-GP KCOL11 1 TP248 AFTE30-GP BAV99PT-GP-U RN14 14,29 TP_RIGHT TP_RIGHT 7
1

8
KROW8 1 TP234 AFTE30-GP KCOL12 1 TP249 AFTE30-GP 5V_S0 TOUCH PAD Conn. Test Point 9
10
MB PIN DEFINE 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 KCOL1 1 TP243 AFTE30-GP KCOL13 1 TP251 AFTE30-GP TP_DATA 1 TP77 AFTE30-GP 11
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 2 14,29 TP_LEFT TP_LEFT 12 Four Peaks
KCOL2 1 TP235 AFTE30-GP KCOL14 1 TP250 AFTE30-GP TP_CLK 1 TP73 AFTE30-GP 14
DY 3 TPCLK
KCOL3 TP236 AFTE30-GP KCOL15 TP252 AFTE30-GP TP_LEFT TP67 AFTE30-GP
1 1
1
1
ACES-CON12-4-GP-U Wistron Corporation
KCOL4 1 TP237 AFTE30-GP KCOL16 1 TP253 AFTE30-GP TP_RIGHT 1 TP68 AFTE30-GP 20.K0228.012 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

K/B -1M(5/27)
D36
BAV99PT-GP-U 5V_S0 1 TP3 AFTE30-GP
20.K0227.012
Title
Taipei Hsien 221, Taiwan, R.O.C.

24 1 TPOINTDATA1 1 TP258 AFTE30-GP


1 12 KBC WPC775
TPOINTCLK1 1 TP8 AFTE30-GP T/P Size
A2
Document Number Rev
-1M
Four Peaks
Date: Friday, November 21, 2008 Sheet 41 of 57
A
A B C D E

3D3V_SPI
3D3V_AUX_S5

4M Bits

SCD1U16V2ZY-2GP
SPI FLASH ROM

4
3
EC55

5
6
7
8
DY RN30
SRN10KJ-5-GP For SB

2
3D3V_AUX_S5 3D3V_M_WOL 3D3V_AUX_S5
SRN10KJ-6-GP
RN22

1
2
-1 -1

4
3
2
1

2
4 SPI_ICH_HOLD# 4
SPI_HOLD# ER4 R59 R74
0R0603-PAD 0R0603-PAD 0R3-0-U-GP
U55 DY
U30

1
20 SPI_ICH_CS0# 1 8 3D3V_SPI
SPI_3D3V_VCC SPI_ICH_SO_R CS# VCC SPI_ICH_HOLD#
41 SPICS# 1 CS# VCC 8 20 SPI_ICH_SO 1 2 2 DO HOLD# 7
41 SPIDI ER1 1 2 SPI_DO 2 7 SPI_HOLD# ER5 SPI_ICH_WP# 3 6 SPI_ICH_CLK 20
150R2J-L1-GP-U SPI_WP# DO HOLD# SPI_CLK 100R2J-2-GP WP# CLK
3 WP# CLK 6 1 2 SPICLK 41 -1 4 GND DIO 5 SPI_ICH_SI 20

SC4D7P50V2CN-1GP
4 5 SPI_DIO ER3 1 2 150R2J-L1-GP-U SPIDO 41
GND DIO

1
ER2 150R2J-L1-GP-U EC78 DY
1

EC83 DY W25X32VSSIG-GP

1
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
DY W25X80AVSSIG-GP EC76 EC77

2
1

1
SC4D7P50V2CN-1GP

72.25X80.A01 EC53 EC52 DY


2

DY DY

2
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
1M Bits Close to ICH9M

2
SPI FLASH ROM
For KBC

3 GOLDEN FINGER FOR DEBUG BOARD 3

LPC_LAD[0..3]
19,41,44 LPC_LAD[0..3]

20.K0227.014 5V_S0
20.K0276.014
32K suspend clock output 5V_S0
ACES-CON14-1-GP
RUN_POWER_ON 15 PLT_RST1# TP144 TPAD28
7,20,34,36,41,44,46 PLT_RST1#
1

2 PLT_RST1# FWH_INIT# TP141 TPAD28


LPC_LFRAME# 19 FWH_INIT#
-1(0509) 3 LPC_LFRAME# 19,41,44
G

Q29 R340 4 PCLK_FWH PCLK_FWH 30 3D3V_S0


DY 10R2J-2-GP 5 FWH_INIT#
20,37 PM_SUS_CLK D S 1 DY 2 TPM_XTALI 6 LPC_LAD3
7 LPC_LAD2
1

DY LPC_LAD1
2N7002-11-GP R341
8
9 LPC_LAD0
-1M(5/30)
DY 240KR3-GP 10 3D3V_S0
2nd = 84.27002.N31 11
12
2

13
14
16

GF1
3D3V_S0
2 3D3V_S0 R343 2
TPM_PP 1 DY 2
TPM 1.2 TOP VIEW
4K7R2J-2-GP
C334 C662 C335 3D3V_S5
-1
1

2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R344
0R0402-PAD A15 (B1)
2

DY
A14 (B2)
1
1

C359 C350
SCD1U16V2ZY-2GP

SC22P50V2JN-4GP
3D3V_S0

....
....
2

1 2 TPM_XTALI
1

U38 A2 (B14)
-1M(7/04) R347
9636GPIO 1 TP204 4K7R2J-2-GP
5 VSB GPIO 6 A1 (B15)
1

X6 X-32D768KHZ-40GPU 10 2 9636GPIO21 TP135


VDD GPIO2
19 -1
2

VDD TPM_TESTB1
24 VDD TESTBI/BADD 9
1

8 TPM_TEST1
1 R346 2
TESTI
1

R345 0R0402-PAD
10MR2J-L-GP TPM_XTALI 13 7 TPM_PP R353
(BOTTOM VIEW)
4

TPM_XTALO XTALI/32K_IN PP 4K7R2J-2-GP


14 XTALO CLKRUN# 15 DY
PM_CLKRUN# 20,25,31,41,44
27
2

SERIRQ INT_SERIRQ 20,30,41,44


2

1 2 TPM_XTALO 21 1
C360 3 PCLK_TPM LCLK NC#1
1 20,44 PM_SUS_STAT# 28 LPCPD# NC#3 3 Four Peaks 1
SC22P50V2JN-4GP 22 12
19,41,44 LPC_LFRAME# LFRAME# NC#12
7,20,34,36,41,44,46 PLT_RST1# 16 LRESET#

19,41,44 LPC_LAD0 26 LAD0 GND 4 Wistron Corporation


23 11 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
19,41,44 LPC_LAD1 LAD1 GND Taipei Hsien 221, Taiwan, R.O.C.
19,41,44 LPC_LAD2 20 LAD2 GND 18
19,41,44 LPC_LAD3 17 LAD3 GND 25
Title

SLB9635TT1D2-1-GP
BIOS & TPM
Size Document Number Rev
71.09635.A0W
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 42 of 57
A B C D E
5 4 3 2 1

D D

SCD1U16V2ZY-2GP
3D3V_AUX_S5
RP1 3D3V_S0
INTERNET# 1 10

SC1U16V3ZY-GP
EPRESENTATION# 2 9 E-BUTTON# SB
ELOCK# 3 8 PROGRAM#

1
SYNC# 4 7 MAIL# EC60 C374 20.K0227.012
3D3V_S0 5 6 20.K0228.012
DY DY

2
SRN10KJ-L3-GP ACES-CON12-4-GP-U
13
1

41 COVER_SW# 2
3
4
5
C
41 EPRESENTATION# 6 C
SYNC# EC7 DY
1 2 7
ELOCK# EC6 SC220P50V2JN-3GP 41 ELOCK#
DY
1 2 41 SYNC# 8
EPRESENTATION# EC5 DY
1 SC220P50V2JN-3GP
2 9
INTERNET# EC4 SC220P50V2JN-3GP 41 INTERNET#
DY
1 2 41 E-BUTTON# 10
E-BUTTON# EC3 DY
1 SC220P50V2JN-3GP
2 11
PROGRAM# EC1 SC220P50V2JN-3GP 41 PROGRAM#
DY
1 2 41 MAIL# 12
MAIL# EC2 DY
1 SC220P50V2JN-3GP
2 14
SC220P50V2JN-3GP

LAUNCN1

Power CN Test Point


B B

3D3V_AUX_S5 1 TP267 AFTE30-GP

COVER_SW# 1 TP266 AFTE30-GP

EPRESENTATION# 1 TP268 AFTE30-GP -1M(5/27)


ELOCK# 1 TP269 AFTE30-GP

SYNC# 1 TP272 AFTE30-GP

INTERNET# 1 TP270 AFTE30-GP

E-BUTTON# 1 TP273 AFTE30-GP

PROGRAM# 1 TP271 AFTE30-GP Four Peaks

MAIL# 1 TP274 AFTE30-GP

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAUNCH
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 43 of 57
5 4 3 2 1
A B C D E

5V_S0 DOCKRING1
3
Power CN Test Point L1 BK1608HM102-T-GP CRT_R_DOCK 1 2 R_DOCK_R
-1(5/9) 1 DOCK_TIP_1 1 2 DOCK_TIP FCB1608CF-GP
CRT_G_DOCK 1 2 R_DOCK_G

4
3
DOCK1 DOCK_TIP_1 1 TP276 AFTE30-GP 2 DOCK_RING_1
1 2 DOCK_RING FCB1608CF-GP
RN27 159 CRT_B_DOCK 1 2 R_DOCK_B
SRN2K2J-1-GP 155 156 DOCK_RING_1 1 TP275 AFTE30-GP 4 L2 BK1608HM102-T-GP -1(5/9) FCB1608CF-GP

1
DOCK_AD_JK NP1 EC70 EC71 EC72 DY DY DY
ETY-CON2-10-GP R407 C421 C422 C423

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP
R408

SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP
P1 G1 20.F0984.002
1
2

2
P2 G2 -1M(5/27) 20.F0070.002 R409
-1(5/9)
TMDS_SDA 1 78 DOCK_IN#_R
TMDS_SCL
25 1394_TPA1P 2 79
4 25 1394_TPA1N 3 80 1394_TPA2P 25 4
4 81 1394_TPA2N 25
25 1394_TPB1P 5 82
25 1394_TPB1N 6 83 1394_TPB2P 25
7 84 1394_TPB2N 25
20 PCIE_TXP4 8 85
9 86 DOCK_PCIE_SMB_DT TP155 TPAD28
20 PCIE_TXN4 DOCK_PCIE_SMB_CLK TP152 TPAD28
10 87 -1
20 PCIE_RXP4
20 PCIE_RXN4
SRN0J-6-GP
-1
11
12
13
88
89
90
DOCK_PCIE_RST#
DOCK_PCIE_CLKREQ#
DOCK_PCIE_COPP# 1
TP156
DY 2R377
TPAD28
-1
0R2J-2-GP
USB_OC#3 20
1 R376 2
0R0402-PAD
PLT_RST1# 7,20,34,36,41,42,46
5V_S0
CRT SWITCH

1
1 4 CLK_PCIE_DOCK_R 14 91 C390
3 CLK_PCIE_DOCK CLK_PCIE_DOCK_R# SYS_CHARGE# 41 C78
2 3 15 92 U16 2 1
3 CLK_PCIE_DOCK# HIGH_LOAD 41 SC100P50V2JN-3GP SCD1U10V2KX-4GP 2 0R2J-2-GP R104 CRT_GREEN 46
16 93 1 16 DIS

2
RN70 VCC CRT_G_1
17 94 TMDS_TX2+_DOCK 18 17,18,38,41,45 DOCK_IN# 1 S 1A 4 2 1 GMCH_GREEN 7
18 95 CRT_G_DOCK 2 0R2J-2-GP R105 UMA
18 TMDS_SDA TMDS_TX2-_DOCK 18 1B1 CRT_B_1
18 TMDS_SCL 19 96 17 CRT_G_SYS 3 1B2 2A 7 2 1 CRT_BLUE 46
18 TMDS_HPD_DOCK 20 97 TMDS_TXC+_DOCK 18 CRT_B_DOCK 5 0R2J-2-GP R101 DIS
2B1
21 98 TMDS_TXC-_DOCK 18 17 CRT_B_SYS 6 2B2 3A 9 2 1 GMCH_BLUE 7
22 99 CRT_R_DOCK 11 0R2J-2-GP R102 UMA
18 TMDS_TX0+_DOCK LAN_ACT_LED#_DOCK 3B1 CRT_R_1
18 TMDS_TX0-_DOCK 23 100 LAN_ACT_LED#_DOCK 45 17 CRT_R_SYS 10 3B2 4A 12 2 1 CRT_RED 46
24 101 10M/100M/1G_LED#_DOCK 14 0R2J-2-GP R110 DIS
10M/100M/1G_LED#_DOCK 45 4B1
18 TMDS_TX1+_DOCK 25 102 13 4B2 OE# 15 2 1 GMCH_RED 7
18 TMDS_TX1-_DOCK 26 103 MDI2+_DOCK Function CRT 8 0R2J-2-GP R111 UMA
MDI2+_DOCK 45 GND
27 104 MDI2-_DOCK
MDI2-_DOCK 45
MDI0+_DOCK 28 105 0R2J-2-GP SYSTEM H PI5C3257QE-GP
45 MDI0+_DOCK
MDI0-_DOCK 29 106 MDI3+_DOCK DOCK_IN# 1 2R380 73.53257.B0C
45 MDI0-_DOCK MDI3+_DOCK 45
30 107 MDI3-_DOCK DY DOCK L
MDI3-_DOCK 45
MDI1+_DOCK 31 108
45 MDI1+_DOCK

1
MDI1-_DOCK 32 109
45 MDI1-_DOCK
33 110 3D3V_LAN_M DY C386
34 111 TPDATA_DOCK2 41 SCD1U16V2ZY-2GP

2
35 112 TPCLK_DOCK2 41
41 TPDATA_DOCK1 36 113
37 114 COM_RTS1#
41 TPCLK_DOCK1
COM_SIN1 38 115 COM_CTS1#

B
COM_SOUT1 39 116 COM_DTR1#
3 COM_DSR1# 40 117 COM_RI_232# Q31 3

R1
PRN_PE 41 118 COM_DCD1# PDTA143ET-GP

R2
PRN_BUSY 42 119 PRN_INIT# DY
PRN_ACK# 43 120 PRN_SLCTIN#
PRN_ERROR# 44 121 PRN_D0
PRN_AUTOFD# 45 122 PRN_D1

C
PRN_STROB# 46 123 PRN_D2
PRN_D3 KBC_PWRBTN#_CN_DOCK R422

2 SCD1U16V2ZY-2GP
2 SCD1U16V2ZY-2GP
2 SCD1U16V2ZY-2GP

2 SCD1U16V2ZY-2GP
47 124
R_DOCK_R 48 125 PRN_D4 16,31 KBC_PWRBTN#_CN SIO_14M 2 1 PCLK_SIO_1 3
49 126 PRN_D5

1
R_DOCK_G 50 127 PRN_D6 10R2J-2-GP
51 128 PRN_D7
R_DOCK_B 52 129 PRN_SLCT 0R2J-2-GP 3D3V_S0 R419
53 130 1 2R381 DUMMY-R2
54 131 TV_COMP_DOCK TP154 TPAD28
17 DOCK_HSYNC
17 DOCK_VSYNC 55 132

1 2
56 133 TV_CRMA_DOCK TP157 TPAD28
17 DAT_DDC1_5
17 CLK_DDC1_5 57 134
17,41 CRT_DEC# 2 R652 1CRT_DEC#_R 58 135 TV_LUMA_DOCK TP153 TPAD28

C453 1
C46 1
C447 1

1
CRT_DEC# PIN SHARE WITH MB CRT33R2J-2-GP
DEC PIN SC 59 136 C436

C45
60 137 DUMMY-C2
40 DOCK_LINEIN_L DOCK_SPDIF 38
40 DOCK_LINEIN_R 61 138 DOCK_JD_HP# 40

45
32
11

13

17
18
47
48
49
64

58
62 139 DOCK_JD_LINEIN# 40

2
1
2
63 140 U13
40 DOCK_LINEOUT_L
64 141

VCORF

NC#1
NC#2
VDD
VDD
VDD

NC#17
NC#18
NC#47
NC#48
NC#49
NC#64

CLKIN
40 DOCK_LINEOUT_R USBPP0 20
-1 65
66
142
143
USBPN0 20
40 DOCK_MICIN_L
67 144 KBC_PWRBTN#_CN_DOCK
40 DOCK_MICIN_R
68 145 15 52 PRN_D0
40 DOCK_JD_MIC# GPIO0 PD0
69 146 G5 GAP-CLOSE-PWR 16 50 PRN_D1
GPIO1 PD1
17,18,38,41,45 DOCK_IN# 2 R651 1 DOCK_IN#_R 70 147 5V_DOCK_S0 1 2 5V_S0 19 GPIO2 PD2 43 PRN_D2
33R2J-2-GP 20 6 PRN_D3
C391 GPIO3 PD3
21 39 PRN_D4
GPIO4 PD4 PRN_D5
SC DOCK_TIP
76
77
153
154 DOCK_RING
1 2 40
7
GPIO5 PD5 37
34 PRN_D6
TP20 TPAD30 GPIO6 PD6 PRN_D7
SCD1U10V2KX-5GP 41 GPIO7 GPIO23/PD7 30
NP2
2 157 158 COM_RI_232# 5 25 PRN_PE 2
COM_CTS1# RI1#/GPIO10 PE PRN_INIT#
160 3 CTS1#/GPIO11 INIT# 56
COM_SOUT1 63 54 PRN_ERROR#
DOCK_AGND FOX-CONN154-1-GP COM_RTS1# SOUT1/GPO12/TEST# ERR# PRN_BUSY
62 RTS1#/GPO13/TRIS# BUSY_WAIT# 26
20.F1202.154 COM_SIN1 61 57 PRN_AUTOFD#
COM_DSR1# SIN1/GPIO14 AFD#_DSTRB#
60 DSR1#/GPIO15
COM_DCD1# 59 24 PRN_SLCT
IRSL0 DCD1#GPIO16 SLCT PRN_STROB#
10 IRRX2_IRSL0/GPIO17 STB#_WRITE# 14
23 55 PRN_SLCTIN#
GPIO20 SLIN#_ASTRB#
29 GPIO21/LPCPD#
PRN_ACK# 28 GPIO24/ACK#

LDRQ#/XOR_OUT

GPO22/CLKRUN#
COM_DTR1# 4 8 IRRX1
DTR1#_BOUT1/BADDR IRRX1 IRTX
IRTX 9

1
R417

LFRAME#
LRESET#
SERIRQ
G106 10KR2J-3-GP

LCLK
LAD0
LAD1
LAD2
LAD3
1 2

VSS
VSS
VSS
R426 3D3V_S0
R427

2
GAP-CLOSE-PWR
20,42 PM_SUS_STAT# 2 1 LPCPD# 2 1 PC87383MG-GP

42
46
51
53

33
22
38
35
36
27

44
31
12
DOCK_AGND 10KR2J-3-GP
DUMMY-R2
19,41,42 LPC_LAD0
19,41,42 LPC_LAD1
19,41,42 LPC_LAD2
19,41,42 LPC_LAD3

3 PCLK_SIO
SB 19 LDRQ0#

1
19,41,42 LPC_LFRAME#
R429 7,20,34,36,41,42,46 PLT_RST1#
DUMMY-R2
20,30,41,42 INT_SERIRQ
20,25,31,41,42 PM_CLKRUN#
1 2

-1(5/9)
1 1
3D3V_S0 FIR1 C445
DUMMY-C2
Place C? /C? near Pin1 and Pin6 30mil
1 VCC2/IRED_ANODE
DY DY DY DY 2 IRED_CATHODE
Four Peaks
1

C663 TC29 C664 C665 10mil IRTX 3


2

TXD
SC10U10V5ZY-1GP

ST47U6D3VCM

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

10mil IRRX1 4 RXD


10mil IRSL0 5
DY Wistron Corporation
2

SD
6 VCC1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7 MODE Taipei Hsien 221, Taiwan, R.O.C.
8 GND
Title
FIR-TFDU6103-GP
56.15001.131
EASY PORT4 (1/2) SIO
Size Document Number Rev
Custom
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 44 of 57
A B C D E
C392 SC10U10V5KX-2GP
1 2 LAN switch
3D3V_LAN_M 1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
C31 SCD1U10V2KX-5GP
R410
DOCK_IN_LAN 2 1 3D3V_LAN_M
10KR2J-3-GP

D
1

1
Q34
DY 2N7002-11-GP 2nd = 84.27002.N31
2

2
C26 C21 C27 C39 C38 C387 G DOCK_IN# 17,18,38,41,44

27

10
18
38
56
50

17
U3

S
SEL

NC#5
VDD
VDD
VDD
VDD
VDD
VDD
VDD
32 LAN_MDI0P 2 A0 0B1 48 MDI0+_SYS 33
32 LAN_MDI0N 3 A1 0B2 46 MDI0+_DOCK 44
32 LAN_MDI1P 7 A2 1B1 47 MDI0-_SYS 33
32 LAN_MDI1N 8 A3 1B2 45 MDI0-_DOCK 44
32 LAN_MDI2P 11 A4 2B1 43 MDI1+_SYS 33
32 LAN_MDI2N 12 A5 2B2 41 MDI1+_DOCK 44
32 LAN_MDI3P 14 A6 3B1 42 MDI1-_SYS 33
32 LAN_MDI3N 15 A7 3B2 40 MDI1-_DOCK 44
4B1 37 MDI2+_SYS 33
32 LAN_ACT_LED# 19 LED0 4B2 35 MDI2+_DOCK 44
32 LAN_LINK_LED# 20 LED1 5B1 36 MDI2-_SYS 33
54 LED2 5B2 34 MDI2-_DOCK 44
6B1 32 MDI3+_SYS 33
33 LAN_ACT_LED#_SYS 22 0LED1 6B2 30 MDI3+_DOCK 44
44 LAN_ACT_LED#_DOCK 25 0LED2 7B1 31 MDI3-_SYS 33
33 10M/100M/1G_LED#_SYS 23 1LED1 7B2 29 MDI3-_DOCK 44
44 10M/100M/1G_LED#_DOCK 26 1LED2
52

THERMAL_PAD
2LED1
51 2LED2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PI3L500-AZFEX-GP
21
24
28
1
6
9
13
16
44
39
33
55
53
49
57

73.3L500.003

Function SEL
to An L DOCK
to Bn H SYSTEM
Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
EASY PORT4 (2/2)
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 45 of 57
5 4 3 2 1

NV SMBus
A(pin143&145) : VGA(CRT) / DOCK
B(pin218&220) : DVI
C(pin208&210) : HDMI / TPI / LVDS

G72_TXACLK- 15
15 G72_TXBOUT0+ G72_TXACLK+ 15
Put near graphic connector 15 G72_TXBOUT0- G72_TXAOUT2- 15
7,18 PEG_TXP[15..0] 15 G72_TXBOUT1+ G72_TXAOUT2+ 15
15 G72_TXBOUT1- G72_TXAOUT1- 15
D 7,18 PEG_TXN[15..0] 15 G72_TXBOUT2+ G72_TXAOUT1+ 15 D
15 G72_TXBOUT2- G72_TXAOUT0- 15
G72_TXAOUT0+ 15
7 PEG_RXP[15..0]
15 G72_TXBCLK+ LCD_EDID_DAT 15
7 PEG_RXN[15..0] 15 G72_TXBCLK-
LCD_EDID_CLK 15
5V_S0 44 CRT_BLUE
44 CRT_GREEN LCDVDD_ON 15
44 CRT_RED BLON_IN 41
-1

TPAD30TP33
TPAD30TP33
DY NV_DVI_DAT 18
47,49,53 CPUCORE_ON 2 1 NV_DVI_CLK 18
R463 0R2J-2-GP
20,34,41,47,53 PM_SLP_S3# 2 1 SCD1U25V3KX-GP 2D5V_S0
1

TP36
R464 0R2J-2-GP C103
-1

2
-1 DIS
DY R122
2
1D8V_S0

TPAD30

TPAD30
SC 0R0603-PAD

TP39
PEG_TXN15 DIS

PEG_TXN14

PEG_TXN13

PEG_TXN12

PEG_TXN11

PEG_TXN10
PEG_TXP15

PEG_TXP14

PEG_TXP13

PEG_TXP12

PEG_TXP11

PEG_TXP10

PEG_TXN9

PEG_TXN8

PEG_TXN7

PEG_TXN6

PEG_TXN5

PEG_TXN4

PEG_TXN3

PEG_TXN2

PEG_TXN1

PEG_TXN0
PEG_TXP9

PEG_TXP8

PEG_TXP7

PEG_TXP6

PEG_TXP5

PEG_TXP4

PEG_TXP3

PEG_TXP2

PEG_TXP1

PEG_TXP0

1
DY DY 3D3V_S0
1

1
C471 C475

1
C109 C97

SC10U10V5ZY-1GP

SCD1U25V3KX-GP
DIS DY
2

2
SCD1U25V3KX-GP

SCD1U25V3KX-GP

2
C C
MH1

MH2
231

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230

232
10
12
14
16
18
20
22
24

26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
2

4
6
8

MXM1
DIS:20.F1031.230 TYCO-CONN230A-GP-U3

20.F0871.230
1

3
5
7
9
11
13
15
17
19
21
23

25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
PEG_RXN15

PEG_RXN14

PEG_RXN13

PEG_RXN12

PEG_RXN11

PEG_RXN10
PEG_RXP15

PEG_RXP14

PEG_RXP13

PEG_RXP12

PEG_RXP11

PEG_RXP10
1

PEG_RXN9

PEG_RXN8

PEG_RXN7

PEG_RXN6

PEG_RXN5

PEG_RXN4

PEG_RXN3

PEG_RXN2

PEG_RXN1

PEG_RXN0
PEG_RXP9

PEG_RXP8

PEG_RXP7

PEG_RXP6

PEG_RXP5

PEG_RXP4

PEG_RXP3

PEG_RXP2

PEG_RXP1

PEG_RXP0
C118 C119
DCBATOUT
DY DY TMDS_A_TX0+ 18
2

2
SCD1U25V3KX-GP

SCD1U25V3KX-GP

TMDS_A_TX0- 18

1
SC4D7U25V6KX-1GP

SC4D7U25V6KX-1GP

SC4D7U25V6KX-1GP

2K2R2J-2-GP
TMDS_A_TX1+ 18
1

2 R480
C112 C114 C116 TMDS_A_TX1- 18
DY DY DY 3 CLK_PCIE_PEG#
3 CLK_PCIE_PEG TMDS_A_TX2+ 18
2

DIS DIS TMDS_A_TX2- 18


-1 3 MXM_CLKREQ#
TMDS_A_TXC+ 18
7,20,34,36,41,42,44 PLT_RST1# 1 R475 2 -1 PLT_RST1#_MXM TMDS_A_TXC- 18
0R0402-PAD
-1HDMI_CEC
1

B C489 SB TPAD30 TP169 B

DIS 18,37,41 SMBD_Therm 1 R106 2 SMBD_MXM


SC100P50V2JN-3GP 0R0402-PADDIS DVI_A_HPD 18
2

18,37,41 SMBC_Therm 1 R107 2 SMBC_MXM


0R0402-PADDIS
50 MXM_THER

-1 17 CRT_HSYNC
17 CRT_VSYNC
17 CRT_DDCCLK
17 CRT_DDCDATA
TPAD30 TP64 SPDIF_HDMI
TPAD30 TP70 GPU_BUFRST#
TPAD30 TP173 MP_INT
TPAD30 TP171 GPU_PRGM#

3D3V_S0
TPAD30 TP172 IGP_UTX2#
TPAD30 TP166 IGP_UTX2
TPAD30 TP168 TMDS_GPIO6_SW
TPAD30 TP167

A Four Peaks A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Graphic MXM CONN


Size Document Number Rev
A3 -1M
Four Peaks
Date: Friday, November 21, 2008 Sheet 46 of 57
5 4 3 2 1
Aux Power 3D3V_AUX_S5
5V_AUX_S5 5V_AUX_S5 I min = 300 mA
3D3V_AUX_S5
Run Power
U35
DCBATOUT DCBATOUT 3D3V_S5 3D3V_M_WOL
-1 1 VIN VOUT 5
5V_S5
DY
2 5V_S0
3D3V_AUX_EN GND
1 R310 2 3 EN/EN# NC#4 4 D S

1
0R0402-PAD U61 DY

1
DY 1 S D 8 R137 R133 Q12
1

1
DY C327 BC1 RT9198-33PBR-GP BC2 C323 2 S D 7 DY 100KR2J-1-GP DY 100KR2J-1-GP C120 AO3400-1-GP-U

G
SCD1U10V2KX-4GP

SC1U16V3ZY-GP

SC1U16V3ZY-GP
S D SC10U10V5ZY-1GP C131 C127
2nd = 84.00610.D31 1 2 3 6

2
4 G D 5 DY DY
74.09198.G7F
2

2
DCBATOUT Q20 SCD1U25V3KX-GP U18
NDS0610-NL-GP RUN_POWER_ON AO4468-GP 2N7002DW-7F-GP 3VM_WOL_EN SC10U10V5ZY-1GP
2nd = 74.09091.J3F 84.04468.037

1
1 2 Z_12V S D SCD1U16V2ZY-2GP
R618 10KR2J-3-GP SLP_M_WOL_EN 6 1 R132

K
1

1
3D3V_S0 470R2J-2-GP
DY
R620 1 C322 R311 D21 5 2 PM_SLP_M_1#

G
3D3V_S0

10KR2J-3-GP

SCD22U25V3KX-GP

330KR2J-L1-GP
PDZ9D1B-GP 3D3V_S5

2
1
DY 2 83.9R103.C3F U60 4 3
R291 2 1 Z_12V_G3 1 S D 8

1
100R5J-3-GP R617 330KR2J-L1-GP 2 S D 7 DY

1
3 S D 6 DY C122
R619 4 G D 5 SCD01U25V2KX-3GP

3D3V_runpwr 2

2
100KR2J-1-GP
AO4468-GP

D
Z_12V_D4 84.04468.037

2
Q11
2N7002-11-GP
U33
1D5V_S3
DY G LAN_WOL_EN 20

Z_12V_D3
Q19 1D5V_S0
4 3 2nd = 84.27002.N31

S
DY 2N7002-11-GP U20
2nd = 84.27002.N31 5 2 PM_SLP_S3# 20,34,41,46,53
1 S
S
D
D
8
3D3V_S5
2 7
G Z_12V_D3 6 1 3 S D 6
4 G D 5
DCBATOUT DCBATOUT

S
AO4468-GP 1 C254
2N7002DW-1-GP

SC4D7U10V3KX-GP
84.04468.037

1
84.27002.D3F 2
R140 R237
1D05V_M 100KR2J-1-GP 100KR2J-1-GP SC 0229

D
1D05V_S0
2nd = 84.27002.C3F
U15 Q13

2
1 S D 8 U28 AO3404-1-GP
2 S D 7 SC 0229 2N7002DW-7F-GP 3D3V_M_EN G
3 S D 6

1
4 G D 5

S
6 1 R635 3D3V_M
AO4468-GP 470R2J-2-GP
84.04468.037 5 2 PM_SLP_M_1#

2
4 3 1 C255
SC4D7U10V3KX-GP

1
2
C668
SCD01U25V2KX-3GP

2
1D05V_S0 1D05V_S0

-1
2

-1 R621
R622 2K2R2J-2-GP
56R2J-4-GP DY R219
1

PM_THRMTRIP-A# 4,7,19 1 2 7,20 M_PWROK 1 2 PWROK 7,20


C656 SCD1U16V2ZY-2GP 0R2J-2-GP
B

DY DY
DY
R623 E C
E

KBC_THERMALTRIP# 41
DY R224
1 2H_PWRGD# B MMBT2222A-3-GP Q22 PM_SLP_M_1# 1 2
4,19 H_PWRGD Q21 51 PM_SLP_M_1# PM_SLP_S3# 20,34,41,46,53
0R2J-2-GP
1KR2J-1-GP MMBT3904-3-GP
-1
C
1

1 R225 2 PM_SLP_M# 20,41


C657 2nd = 84.03904.L06 0R0402-PAD
SCD1U16V2ZY-2GP
2

2
D19 3D3V_S5
BAS16-1-GP
-1 04/25 3 RSMRST# 37,41

14
50 3V/5V_EN 1

2nd = 83.00016.F11 1 M_PWROK 7,20


46,49,53 CPUCORE_ON 3
2 PM_SLP_S3# 20,34,41,46,53
TSLCX08MTCX-GP

7
U32A

3D3V_S5

14
4 PWROK_EMC 37
7,20 PWROK 6
5 PM_SLP_S3# 20,34,41,46,53 3D3V_S5 3D3V_M_WOL
TSLCX08MTCX-GP

7
U32B

G28
1 2

GAP-CLOSE-PWR
3D3V_S5 G27
1 2
14

SC GAP-CLOSE-PWR
G30
9 1D05V_M_PWROK 51
1 2
7,20 M_PWROK 8
10 GAP-CLOSE-PWR
1D5V_S3_PWROK 51
G29
TSLCX08MTCX-GP 1 2
7

U32C
GAP-CLOSE-PWR

3D3V_S5
14

12 1D5V_S3_PWROK 51
7 SM_PWROK 1 2 11
13 PM_SLP_S4# 20,34,41,51,52
2

R279 12K1R2F-L1-GP
R280 TSLCX08MTCX-GP Four Peaks
7

10KR2J-3-GP U32D

Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
RUN POWER and 3D3V_AUX_S5
Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 47 of 57
5 4 3 2 1

D D

C C

B B

Adapter

Selector MAX1773 Input Signal Output Signal


Charger BQ24745 AD_OFF DC_IN+
(I) (O)
Input Signal Output Signal
Input Signal Output Signal BAT_SEL_A/B#
BQ24745_CHG_ON BATSEL
CE BT+SENSE Input Power Output Power
VFB BATA_IN# AC_IN#
BAT_SCL THMA ACOK AD_JK AD+
SCL VCC(I) VCC(O)
AD_IA BATB_IN#
BAT_SDA VICM THMB 5V_AUX_S5
SDA VCC(I)
AD+
ACDET
Four Peaks
Input Power Output Power
Input Power Output Power
A BATA+ A
AD+ CHG_PWR CHG_PWR VOUT (O) Wistron Corporation
ACIN VOUT (O) VCC(I) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BATB+ Taipei Hsien 221, Taiwan, R.O.C.
VOUT (O)
DCBATOUT Title
VOUT (O) DCBATOUT
VOUT (O) Power Block Diagram
Size Document Number Rev
B
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 48 of 57
5 4 3 2 1
5 4 3 2 1

4,7,19 H_DPRSTP# PM_DPRSLPVR 7,20 DCBATOUT_6266B


DCBATOUT DCBATOUT_6266A DCBATOUT DCBATOUT_6266B

G2 20071001 G6 3D3V_S0 CPUCORE_ON 46,47,53


1 2 1 2

2
10R3F-GP
GAP-CLOSE-PWR GAP-CLOSE-PWR H_VID[6..0] 5 C16 C17 C15 C400

5
6
7
8

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
G7 G8

1
D
D
D
D
1 2 TC18 1 2 U44 Id=35A

H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

H_VID0
DY ST15U25VDM-1-GP BSC120N03MS-G-GP DY DY

2
Qg=17~26nC

499R2F-2-GP
GAP-CLOSE-PWR GAP-CLOSE-PWR

R389

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD
G4 G3 Rdson=11~14mohm

2
1 2 1 2
D
Vcc_core D

G
S
S
S
GAP-CLOSE-PWR GAP-CLOSE-PWR
-1
Iomax=38A

4
3
2
1
2

2
SCD1U10V2KX-4GP
G9 G1 Cyntec 10*10*4

1
C396 6266A_UGATE1
SC 1 2
1
1 2 SC DCR=1.05+-5%mohm, Irating=30A
GAP-CLOSE-PWR TC17 GAP-CLOSE-PWR Isat=60A

6266A_DPRSLPVR
SE100U25VM-L1-GP VCC_CORE
2007.5.9

6266A_DPRSTP#
2

2
6266A_VR_ON 1

1
R375

R388

R374

R387

R386

R373

R372

R385

R371

R384
-1(5/9) L16
6266A_PHASE1 1 2

6266A_3V3
3D3V_S0 IND-D36UH-9-GP

6266A_D6

6266A_D5

6266A_D4

6266A_D3

6266A_D2

6266A_D1

6266A_D0
TC7 TC2 TC1

5
6
7
8

5
6
7
8

1
D
D
D

D
D
D
D

D
U42 U6
Id=19.5A BSC057N03MSG-GP BSC057N03MSG-GP

2
1

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
U4
R24 Qg=21.5~33nC,

49

48

47

46

45

44

43

42

41

40

39

38

37

2
1K91R2F-1-GP Rdson=5.5~6.7mohm
1D05V_S0

G
S
S
S

G
S
S
S
G12

3V3

DPRSTP#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
GND

CLK_EN#

DPRSLPVR

VR_ON
GAP-CLOSE G14

4
3
2
1

4
3
2
1
R27
6266A_ LGATE1 6266A_ LGATE1 GAP-CLOSE

1
-1(5/9) 1 36 6266A_BOOT1 1 2
20,37 VGATE_PWRGD PGOOD BOOT1
1

1R2J-GP 6266A_BOOT1_R
R30 1R25 26266A_PSI# 2 35 6266A_UGATE1 1
4 PSI# PSI# UGATE1
68R2-GP 0R0402-PAD
C22 1 6266A_PMON_R 1
2 R26
2 6266A_PMON3 34 6266A_PHASE1 2 C23
4K99R2F-L-GP PMON PHASE1 SCD22U25V3KX-GP
2

SCD1U25V3KX-GP 1 26266A_RBIAS4 33
C 20071005 R29 147KR2F-GP RBIAS PGND1 C
5 32 6266A_ LGATE1 6266A_VSUM 1 R48 2 3K65R2F-1-GP 6266A_ISEN1_P1_VCORE
4 CPU_PROCHOT#_R VR_TT# LGATE1
1 R33 2 6266A_NTC_R 1 R31 2 6266A_NTC 6
NTC PVCC 31 5V_S0 1 2C25 6266A_ISEN1 1 R51 2 10KR2F-2-GP
NTC-470K-1-GP 4K02R2F-GP
C24 C28 1 26266A_SOFT 7 30 6266A_LGATE2 SC2D2U16V3KX-GP
1 2 SCD015U50V3KX-GP SOFT LGATE2 6266A_VO 1 R57 2 1R2F-GP 6266A_ISEN2_P1_VCORE
6266A_VO 1 26266A_OCSET8 OCSET 29
SCD01U25V2KX-3GP 10K5R3F-GP R32 PGND2 6266A_ISEN2 1 R54 2 10KR2F-2-GP
C30 1 2SC1000P50V3JN-GP 6266A_VW 9 28 6266A_PHASE2 DCBATOUT_6266A
VW PHASE2 2
C29
1 R34 2
2/27 6266A_COMP
10 27 6266A_UGATE2 SCD22U25V3KX-GP
COMP UGATE2 R35 1
10K5R2F-GP
C32
6266A_FB 11 26 6266A_BOOT2 2 16266A_BOOT2_R
FB BOOT2 1R2J-GP
1 2

2
6266A_FB2 12 25
FB2 NC#25

5
6
7
8
SC100P50V2JN-3GP C19 C18 C20 C397
C34

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
D
D
D
D

SCD1U50V3KX-GP
DROOP

U45

1
1

VDIFF

VSUM

ISEN2

ISEN1
VSEN

1 R39 2 6266A_COMP_R 1 2 BSC120N03MS-G-GP Id=35A

GND

VDD
RTN

DFB

VIN
97K6R2F-GP R38
VO

SC270P50V2KX-1GP 1KR2F-3-GP Qg=17~26nC DY DY


ISL6266AHRZ-GP Rdson=11~14mohm
16266A_DROOP
13

14

6266A_RTN 15

16

6266A_DFB 17

18

6266A_VSUM 19

6266A_VIN 20

21

6266A_VDD 22

23

24

G
S
S
S
6266A_VDIFF

6266A_ISEN2
74.06266.073
6266A_VSEN

C35
2

4
3
2
1
1 R40 2 6266A_FB2_R 1 2 6266A_ISEN1 C4141 26266A_VO
100R2F-L1-GP-U R406 Cyntec 10*10*4
6266A_VO
1

SC2200P50V2KX-2GP SCD22U10V2KX-1GP
DCR=1.05+-5%mohm, Irating=30A
R402

1KR2F-3-GP

C4191 2
DCBATOUT_6266A 6266A_UGATE2 Isat=60A
B R37 B
SCD22U10V2KX-1GP VCC_CORE
L17
3K4R2F-GP

1 2 5V_S0
2

1
10R3F-GP

1KR2F-3-GP 6266A_PHASE2 1 2
R42 IND-D36UH-9-GP
2
SC330P50V2KX-3GP

1 R400 2 TC4 TC8

5
6
7
8

5
6
7
8

1
10R2F-L-GP
1

D
D
D

D
D
D
D

D
C428 U43 U5
2
SC180P50V2JN-1GP

C417 BSC057N03MSG-GP BSC057N03MSG-GP

2
1

SE330U2VDM-L-GP

SE330U2VDM-L-GP
C412 C418
2/27
2

SCD01U25V2KX-3GP

SC1U25V0KX-GP
-1
2

2
G
S
S
S

G
S
S
S
Id=19.5A
1

C425 G11

4
3
2
1

4
3
2
1
Qg=21.5~33nC,
SCD33U10V3KX-3GP

5 VCC_SENSE 1 R404 2 GAP-CLOSE


0R0402-PAD Rdson=5.5~6.7mohm 6266A_LGATE2 6266A_LGATE2 G13
2
1

GAP-CLOSE

1
C420
SC330P50V2KX-3GP
2007/9/10
2

5 VSS_SENSE 1 R403 2
0R0402-PAD
1 2
1

R398 0R0402-PAD
C416 6266A_VSUM 1 R47 2 3K65R2F-1-GP
SCD01U25V2KX-3GP 6266A_ISEN2_P2_VCORE
2

6266A_ISEN2 1 R50 2 10KR2F-2-GP


6266A_VSUM
6266A_VO 1 R56 2 1R2F-GP 6266A_ISEN1_P2_VCORE
1

A Four Peaks A
R45 6266A_ISEN1 1 R53 2 10KR2F-2-GP
1

C37 2K61R2F-1-GP
C42 R46
SCD22U50V3ZY-1GP

Wistron Corporation
SCD068U16V3KX-GP

11KR2F-L-GP
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


6266A_VSUM_R_VO Taipei Hsien 221, Taiwan, R.O.C.
2

R405 Title
NTC-10K-9-GP
2/27 ISL6266A_CPU_CORE
Size Document Number Rev
2007/9/10
2

6266A_VO A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 49 of 57
5 4 3 2 1
5 4 3 2 1

R555
3V/5V_EN
DCBATOUT DCBATOUT_51125 41 S5_ENABLE 1 2 -1 04/25
G88 3D3V_PWR 3D3V_S5 2KR2F-3-GP
1 2
G87
GAP-CLOSE-PWR 1 2
G89 5V_AUX_S5 5V_AUX_S5 5V_PWR 5V_S5
1 2 GAP-CLOSE-PWR 51125_ENTIP2 51125_ENTIP1 G104

1
G86 1 2
GAP-CLOSE-PWR 1 2 R331 R339

D
1

1
G90 100KR2J-1-GP Q26 C341 C331 Q25 100KR2J-1-GP GAP-CLOSE-PWR

1
2N7002-11-GP

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

2N7002-11-GP
1 2 GAP-CLOSE-PWR R328 R309 DY G103
D G85 DY 160KR2F-GP 1 2 D

2
GAP-CLOSE-PWR 1 2 137KR2F-1-GP G

2
SC G91 G GAP-CLOSE-PWR

2
1 2 GAP-CLOSE-PWR 2nd = 84.27002.N31 G102

D
S
G84 1 2

S
1

GAP-CLOSE-PWR Q28
TC3 G92
SC 1 2
Q27 4/22 2N7002-11-GP
-1 04/25 GAP-CLOSE-PWR
DY ST15U25VDM-1-GP 1 2 GAP-CLOSE-PWR
-1 04/25 2N7002-11-GP G G101
3V/5V_EN 47
2

G83 47 3V/5V_EN G SC 1 2
GAP-CLOSE-PWR 1 2 2nd = 84.27002.N31 R335

S
G93 R336 2 DY 1 GAP-CLOSE-PWR

S
GAP-CLOSE-PWR DY MXM_THER 46 G100
1 2
G82 46 MXM_THER
1 2 20071126 20071126 0R2J-2-GP 1 2
GAP-CLOSE-PWR 1 2 0R2J-2-GP 2nd = 84.27002.N31
G95 GAP-CLOSE-PWR
1 2 GAP-CLOSE-PWR 2nd = 84.27002.N31 G99
G81 1 2
1

GAP-CLOSE-PWR 1 2
TC32 TC30 GAP-CLOSE-PWR
SE100U25VM-L1-GP SE100U25VM-L1-GP GAP-CLOSE-PWR G98
2

1 2
4/21 DCBATOUT_51125 DCBATOUT_51125
GAP-CLOSE-PWR

DCBATOUT_51125
C316

SCD01U50V2KX-1GP
C644 C643 C260

1
C315 C650 C651
1

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
C C
SCD01U50V2KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

2
D Id=7A D DY
4/21
2

8
7
6
5

5
6
7
8
DY Id=7A Qg=8.7~13nC
D
D
D
D

Iomax=7A U23 U27

D
D
D
D
Qg=8.7~13nC Rdson=23~30mohm

16
SI4800BDY-T1 SI4800BDY-T1
OCP min = 10A Rdson=23~30mohm U36
84.08884.037

VIN
Cyntec 7*7*3 84.08884.037 Cyntec 7*7*3
SCD1U25V3KX-GP Iomax=6A
S
S
S
G

G
S
S
S
DCR=30mohm, Irating=6A C324 C320 DCR=18mohm, Irating=8A
GD S
1
2
3
4

4
3
2
1
Isat=13.5A 51125_VBST2 51125_VBST1 Isat=14A OCP min = 10A
S G 2 1 9 VBST2 VBST1 22 1 2
3D3V_PWR
L28
SCD1U25V3KX-GP 51125_DRVH2 10 DRVH2 DRVH1 21 51125_DRVH1
L29
20071126 5V_PWR

1 2 51125_LL2 11 20 51125_LL1 1 2
IND-3D3UH-57GP LL2 LL1 IND-3D3UH-57GP
51125_DRVL2 51125_DRVL1 U31
D 12 DRVL2 DRVL1 19
1

SI4812BDY-T1-E3-GP
C661 U21
8
7
6
5

5
6
7
8

GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP

SCD1U10V2KX-4GP
DY TC27
ST220U6D3VDM-15GP
SCD1U10V2KX-4GP

C658
D
D
D
D

51125_VO2 51125_VO1

D
D
D
D
7 24
2

VO2 VO1

1
G105
SI4812BDY-T1-E3-GP

84.06690.E37 51125_FB2 51125_FB1


84.08878.037 TC28
5 VFB2 VFB1 2 DY
ST220U6D3VDM-15GP

2
1

G108

2
1
0R3-0-U-GP

R299 1 2 51125_EN 13 23 51125_PGOOD


S
S
S
G

G
S
S
S
R298 820KR2F-GP EN0 PGOOD
G S
1
2
3
4

4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2

51125_VREF ENTRIP2 ENTRIP1


B 2/27 3 15
SC B
2

VREF GND
2/27
1
SCD22U6D3V2KX-1GP

51125_DRVL2_MOS C340 51125_TONSEL 4 25


TONSEL GND
Id=7.7A

1
Id=7.7A
2

Qg=8.5~13nC
1

14 18 51125_VCLK 3D3V_PWR R317


Qg=8.5~13nC SKIPSEL VCLK
1

1
51125_SKIPSEL Rdson=16.5~21mohm 0R2J-2-GP DY

100KR2J-1-GP
DYR316 Rdson=16.5~21mohm R318
VREG3

VREG5

TPAD28

1
R320 0R2J-2-GP R307 30KR2F-GP

1 2
6K65R2F-GP TPS51125RGER-GP 51125_FB1_R
1 2

51125_FB2_R 74.51125.073
2

2
C338 C339 DY
3D3V_AUX_S5_5_51125 8

17

DYSC18P50V2JN-1-GP SC18P50V2JN-1-GP

2
3D3V_AUX_S5 5V_AUX_S5
G49
2

5V_AUX_S5_51125

G107

1
1 2 1 2
1

R326
-1 GAP-OPEN-PWR GAP-CLOSE-PWR-3-GP R322
10KR2F-2-GP 1 R319 2 phoenix tsai 09/13/07 20KR2F-L-GP
51125_VREF
0R0402-PAD Close to VFB Pin (pin2)

2
2

3D3V_AUX_S5 2 1
0R2J-2-GP DY R324
1

SC10U10V5KX-2GP

C328 C355
DY
SC10U10V5KX-2GP

51125_VREF 2 1
2

0R2J-2-GP R323
Four Peaks
A A

Close to VFB Pin (pin5)


-1
3D3V_AUX_S5 1 R297 2 Wistron Corporation
0R0402-PAD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2 DY 1 Title
0R2J-2-GP R296
DCDC 5V/3D3V (TPS51125)
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 50 of 57

5 4 3 2 1
5 4 3 2 1

1D5V_PWR 1D5V_S3
G66
DCBATOUT DCBATOUT_51124 1 2

G24 Vtrip(mV)=Rtrip(Kohm)*10(uA) GAP-CLOSE-PWR


1 2 G65
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 1 2
GAP-CLOSE-PWR
G23 I/P cap: 10U 25V K1206 X5R/ 78.10622.52L GAP-CLOSE-PWR
1 2 G64
1 2
1

GAP-CLOSE-PWR DCBATOUT_51124
D TC6
ST15U25VDM-1-GP
G19 4/21 GAP-CLOSE-PWR D
DY 1 2 G63
2

1 2
4/21

1
GAP-CLOSE-PWR

2
G18 C466 GAP-CLOSE-PWR
SC SC

5
6
7
8
1 2 C467 SC4D7U25V5MX-1GP G62

2
D
D
D
D
SCD1U50V3KX-GP U51 1 2

1
GAP-CLOSE-PWR
G21 GAP-CLOSE-PWR
FDS8880-NL-GP Cyntec 10*10*4 G67
1 2 1D5V Iomax=12A
84.04686.037 DCR=3mohm, Irating=1A 1 2

G
S
S
S
GAP-CLOSE-PWR
3D3V_S5
Id=11.6A OCP>20A
G20 Isat=40A GAP-CLOSE-PWR

4
3
2
1
Qg=12~16nC, G69
1 2 20071005

1
3D3V_M Rdson=9.6~12mohm 1D5V_PWR 1 2
L20
GAP-CLOSE-PWR TC31 Vout(cal)=1.5134V
SE100U25VM-L1-GP 1 2 GAP-CLOSE-PWR

SCD1U10V2KX-4GP
SC18P50V2JN-1-GP
G68
4/21

1
5V_S5 R466 R442 COIL-1UH-33-GP 1 2

1
TC20

C469

C506
10KR2J-3-GP 10KR2J-3-GP 68.1R01B.10A R459

5
6
7
8

ST330U2VDM-3GP
30K9R2F-GP DY GAP-CLOSE-PWR

D
D
D
D
U50 G61

2
FDS8896-NL-GP 1 2

51124RGER_PG1
51124RGER_PG2

2
1
51124_VFB1
R452
-1 GAP-CLOSE-PWR
1

1
3D3R3J-L-GP 1D05V_PWR 1 R460 2 Id=14A G60
1D5V_S3_PWROK 47

G
S
S
S
C60 1D5V_PWR 0R0402-PAD R457
SC4D7U10V5KX-1GP 51124_VFB2 1 R445 2 Qg=28~36nC, 20071005 1 2
2

4
3
2
1
51124_VFB1 0R0402-PAD 1D05V_M_PWROK 47 30K9R2F-GP
Rdson=5.8~7.3mohm Panasonic 330uF, 2V GAP-CLOSE-PWR
C G59 C

2
1
C465
FDS8896 ESR=15mohm 1 2

24
SC1U10V3KX-3GPU49

2
5

1
6

7
2 84.08896.037 GAP-CLOSE-PWR
1R465 0R0402-PAD
2 2/27 G58

VFB1
VFB2

VO1
VO2

PGOOD1
PGOOD2
20,34,41,47,52 PM_SLP_S4#
1 2
1
DY BC4 21 51124_DRVH1
DRVH1 51124_LL1
SCD47U6D3V2KX-GP 20 GAP-CLOSE-PWR
2 51124_V5FILT LL1 51124_DRVL1
15 V5FILT DRVL1 19
16
51124_EN1
V5IN 4/21
-1(5/9) 23 EN1 DCBATOUT_51124 SB
51124_EN2 8 EN2 4/21 1D05V_PWR 1D05V_M
3 GND
25 10 51124_DRVH2 C75 G78
GND DRVH2

2
SC4D7U25V5MX-1GP
13 11 51124_LL2 1 2
PGND2 LL2

TONSEL
1R444 0R0402-PAD
2 18 12 51124_DRVL2 C81 C73

VBST1
VBST2
47 PM_SLP_M_1# PGND1 DRVL2

5
6
7
8
TRIP1
TRIP2
U48 SCD1U50V3KX-GP GAP-CLOSE-PWR

1
D
D
D
D
SC4D7U25V5MX-1GP G77

84.08880.037
SI4686DY-T1-E3-GP
TPS51124RGER-GPU1
1D05V Iomax=10A 1 2
DY
17
14

22
9

4
1 BC3
51124_TRIP1
74.51124.073 Id=14.5A Cyntec 10*10*4 OCP>15A GAP-CLOSE-PWR
DY SCD47U6D3V2KX-GP Qg=9.2~14nC, DCR=1.05+-5%mohm,Irating=30A
G76

G
S
S
S
51124_TRIP2
51124_TONSEL
2 1 2
1

SB Rdson=11~14mohm Isat=60A

4
3
2
1
1

R456 GAP-CLOSE-PWR
10K5R3F-GP R450 1D05V_PWR G75
7K15R3F-L-GP
L19 20071005 1 2
B B
1 2
2

SCD1U10V2KX-4GP
IND-D56UH-12-GP

SC18P50V2JN-1-GP
GAP-CLOSE-PWR
2

1
-1 G74

1
TC19 TC9

C463

C548
U47 1 2

ST330U2VDM-3GP

ST330U2VDM-3GP
C474 5 R449 DY
2

2
51124_LL1 1 R462 2 51124_LL1_1 2 1 51124_VBST1 6 10K5R2F-GP DY GAP-CLOSE-PWR

2
0R0603-PAD DY R453 7 G73

2
SCD1U16V2KX-3GP DY R454 0R2J-2-GP 8 51124_VFB2 1 2

1
C458 10KR2J-3-GP 4 GAP-CLOSE-PWR
1

51124_LL2 1 R447 2 51124_LL2_1 2 1 51124_VBST2 Id=13A R451 G72


0R0603-PAD 1 30KR2F-GP 1 2
SCD1U16V2KX-3GP Qg=21.5~33nC, 2
Rdson=5.5~6.7mohm 3 Panasonic 330uF, 2V GAP-CLOSE-PWR

2
51124_V5FILT G71
Si4634DY SI4634DY-T1-E3-GP ESR=15mohm 1 2
SC
84.04634.037 GAP-CLOSE-PWR
G70
20071005 1 2

GND OPEN V5FILT GAP-CLOSE-PWR


G79
1 2

TONSEL 240k/CH1 300k/CH1 360k/CH1 GAP-CLOSE-PWR


300k/CH2 360k/CH2 420k/CH2
Four Peaks
A A

Vout=0.758V*(R1+R2)/R2 --> PWM mode Wistron Corporation


Vout=0.764V*(R1+R2)/R2 --> Skip Mode 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51124_1D5V_1D05V
Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 51 of 57

5 4 3 2 1
5 4 3 2 1

D D

2D5V_S0
Iomax=0.3A
2D5V/300mA
2D5V_S0
3D3V_S0 2D5V_LDO

U53

VOUT 2 1 2
3 G25
VIN

1
1 GAP-OPEN-PWR
GND

2
C487
C483 SC4D7U6D3V5KX-3GP

2
SCD1U10V2KX-4GP G9131-25T73UF-GP DY

1
DY DY

C C

B B
Iomax=1.2A
5V_S5 1D5V_S3 OCP>2A

20071126
1

DDR_VREF_PWR DDR_VREF_S3
1

C461 DY C462 G55


C459 SC10U10V5ZY-1GP SCD1U10V2KX-4GP 1 2
2

SC1U10V2KX-1GP
2

GAP-CLOSE-PWR
G57
U46 1 2
GAP-CLOSE-PWR
-1 1R443 0R0402-PAD
2 9026_S5
10
9
VIN VDDQSNS 1
2 G56
20,34,41,47,51 PM_SLP_S4# S5 VLDOIN
8 GND VTT 3 1 2
1R440 0R0402-PAD
2 9026_S3 7 S3 PGND 4
DDR_VREF_S3_1 6 5 GAP-CLOSE-PWR
VTTREF VTTSNS
GND
1

C452
SC1U10V2KX-1GP RT9026PFP-GP C456 C451
2

11

SC10U10V5KX-2GP SC10U10V5KX-2GP
2

2nd = 74.02997.079
20071126
20071126 20071126
A Four Peaks A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

0D75V & 2D5V


Size Document Number Rev
A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 52 of 57
5 4 3 2 1
5 4 3 2 1

C266
1 2 POWER_MONITOR
DCBATOUT_6263A DCBATOUT
SCD01U50V2KX-1GP

1
UMA GFX_VID[4..0] 7
G41
R236 1 2
DY R243 10KR2J-3-GP
7 GFXVR_EN 1 2 GAP-CLOSE-PWR
D D
0R2J-2-GP G42

2
PH & PL on P.7 -1 1 2

UMA R234 UMA 0R0402-PAD GAP-CLOSE-PWR


6236A_VID4 1 2 GFX_VID4 G39
R232 UMA 0R0402-PAD 1 2
R239 6236A_VID3 1 2 GFX_VID3
R229 UMA 0R0402-PAD GAP-CLOSE-PWR
20,34,41,46,47 PM_SLP_S3# 1
0R2J-2-GP
2
6236A_VID2 1 2 GFX_VID2
SC G40

1
UMA R230 UMA 0R0402-PAD 1 2
6236A_VID1 1 2 GFX_VID1 TC15
R253 R231 0R0402-PAD GAP-CLOSE-PWR DY ST15U25VDM-1-GP
UMA

2
1 DY 2 6236A_VID0 1 2 GFX_VID0 G43
0R2J-2-GP 1 2

GAP-CLOSE-PWR
1 R257 2 G44
3D3V_S0
10KR2F-2-GP 1 2
UMA GAP-CLOSE-PWR
3D3V_S0 1 R259 2
1K91R2F-1-GP

R262 UMA
46,47,49 CPUCORE_ON 1 DY 2

6236A_VR_ON
6236A_AF_EN
6236A_GOOD

6236A_PMON
0R2J-2-GP

VGFXCORE VCC_GFXCORE
DCBATOUT_6263A
SC G38

2
C262 C263

33

32

31

30

29

28

27

26

25
1 2
U24 C257

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SCD1U50V3KX-GP GAP-CLOSE-PWR

FDE
GND_T

VID4

VID3

VID2
PGOOD

AF_EN

VR_ON

PMON

1
5
6
7
8
150KR2F-L-GPUMA G37
U22 UMA

D
D
D
D
5V_S0 1 2
C R2691 2 6236A_RBIAS 1 24 SI4800BDY-T1 UMA C
RBIAS VID1
GAP-CLOSE-PWR
4/22 R275
C2811 2UMA 6236A_SOFT 2 SOFT VID0 23 84.08884.037 VGFXCORE G36
8K06R2F-GP SCD01U50V2KX-1GP C258 SC2D2U10V3KX-1GP Id=7A Cyntec 7*7*3 1 2
6263A_VCC_PRM 1 2 6236A_OCSET 3 22
Qg=8.7~13nC DCR=8mohm, Irating=13A Iomax=6.5A

G
S
S
S
OCSET PVCC

2
C290 UMA GAP-CLOSE-PWR

4
3
2
1
C280 1 2 SC1KP50V2JN-2GP 6236A_VW 4
VW LGATE 21 6236A_LGATE Rdson=23~30mohm Isat=24A OCP>12A G35
1 2 UMA UMA 1 2
UMA 6236A_COMP 5 20
COMP PGND L10
SC68P-GP UMA 1 R276 2 GAP-CLOSE-PWR
C289 6K98R3F-GP 6 19 6236A_PHASE 1 2 VGFXCORE G33
6236A_COMP_R FB PHASE
1 R283 2 1 2 UMA 6236A_FB COIL-D82UH-2-GP 1 2
374KR3-GP 7 18 6236A_UGATE
SC180P50V2JN-1GP VDIFF UGATE
UMA GAP-CLOSE-PWR
UMA
DROOP

UMA 8 17 6236A_BOOT
1 2 1 2 G34
VSEN BOOT
VSUM

R227

6236A_BOOT_R
1 2

VDD
RTN

DFB

VSS
VIN

2D2R3J-2-GP C259
VO

5
6
7
8
R2771 22K21R3F-L-GP 6236A_VDIFF SCD22U16V3KX-2-GP GAP-CLOSE-PWR
UMA U25
UMA

D
D
D
D
UMA
9

6236A_DROOP 10

11

12

13

14

15

16

C291 ISL6263ACRZ-T-GP SI4812BDY-T1-E3-GP Id=7.7A


1 R282
2 6236A_FB_R 6236A_VSEN 74.06263.073 84.08878.037 Qg=8.5~13nC

1
1

4K99R2F-L-GP
2

6236A_VSUM

UMA
6263A_VCC_PRM

6236A_VDD
6236A_DFB

SC560P50V2KX-2GP Rdson=16.5~21mohm G46 G45


6236A_VIN

UMA 6236A_RTN GAP-CLOSE-PWR GAP-CLOSE-PWR

G
S
S
S
R26 for Intel GPU/With Load line

4
3
2
1

2
R27 for ATI GPU/Without Load UMA
line
R228
C261
C282 1 2 1 2 5V_S0
UMA UMA UMA
1 2 SC1U16V3KX-2GP 10R2F-L-GP
1
R255
1

C286 C287
SC1KP50V2JN-2GP

SC1KP50V2JN-2GP

UMA R233 UMA


SC1KP50V2JN-2GP
2K67R2F-2-GP

1 2 DCBATOUT
2

C273
2
1

B B
SC330P50V2KX-3GP

10R2F-L-GP
UMA UMA
1

1 2
2

1
C264 UMA R613 0R0402-PAD TC14

ST220U2VDM-5-GP
SCD01U25V2KX-3GP
2

2
1

UMA 2/27 UMA


G94 GAP-CLOSE-PWR UMA R261 UMA
2 UMA

9 VCC_AXG_SENSE 1 2 1KR3F-GP

R235
G96 GAP-CLOSE-PWR UMA C268 UMA
9 VSS_AXG_SENSE 1 2 1 2 1 2 6236A_VSUM_R
1

C277 SCD068U16V3KX-GP
7K68R2F-GP
UMA

C265
SCD1U25V3KX-GP

1 2 DY
2
1

1
R272 R271 SCD1U50V3KX-GP UMA G47 G48
10R3F-GP 10R3F-GP GAP-OPEN-PWR GAP-OPEN-PWR
1 R241 2UMA
2/27

2
2

4K53R2F-1-GP 6236A_VSUM_R_VCC_PRM
Panasonic UMA
UMA UMA 1 R254 2 1 R242 2
ERT-J1VR103J 3K57R2F-GP
NTC-10K-9-GP
UMA
2007/9/10
Parallel
VSS_AXG_SENSE_OUTCAP

VCC_AXG_SENSE_OUTCAP

A A

Place close to L1 Four Peaks

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6263A_GFX CORE
Size Document Number Rev
C
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 53 of 57
5 4 3 2 1
5 4 3 2 1

D D

U52

VIN 3 3D3V_S0
VOUT 2 1D8V_S0
GND 1

2
G1117-18T63UF-GP C478 C468

SC1U10V2ZY-GP

SC1U10V2ZY-GP
74.G1117.B3C

1
C C

3D3V_S0
1D8V_S0

2
C80 C69

SC1U10V2ZY-GP

SC1U10V2ZY-GP
DY DY

1
B B

Four Peaks

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA_CORE_S0 (UMA)
Size Document Number Rev
A4
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 54 of 57
5 4 3 2 1
5 4 3 2 1

MAX1773_PDS 56
AD+

DCBATOUT
1 2
AO4433-GP
5 4 R41 DUMMY-R2 R43
D G
D 6 3 AD+_TO_SYS 1 2 D
D S
7 D S 2
8 D S 1 D01R2512F-4-GP

U7

GAP-CLOSE-PWR

GAP-CLOSE-PWR
AD+
4/17

2
C43

G53

G52
D28 SCD1U50V3KX-GP

1
CH521G-30PT-GP

K
AD+
SC

1
Cherry Modify 0425

C405
DCBATOUT

SC1U25V5KX-1GP
2
SCD1U50V3KX-GP SCD1U50V3KX-GP

309KR3F-GP
2 1 BQ24745_CSSP 2 1 2 1

1 C408 C413 C671

SCD1U25V2ZY-1GP
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
R399

CHG_AGND SCD1U50V3KX-GP CHG_AGND

C415

C36

C33

C454
1

1
2

C C

ICREF
BQ24745_DCIN 22 28

2
DCIN CSSP

5
6
7
8
DY DY DY

D
D
D
D
BQ24745_ACIN 2 ACIN BQ24745_CSSN U11
CSSN 27 -1
SCD01U50V2KX-1GP

3D3V_AUX_S5 11 26 TP161 D30 C410


VDDSMB ICOUT
49K9R2F-L-GP

FDS8884-GP
-1 K A 1 2

G
S
S
S
BQ24745_BST 1 R397 2BQ24745_BST1 CH521G-30PT-GP SC1U10V3ZY-6GP
-1 BOOT 25
1
R395

C411

21 BQ24745_VDDP 0R0603-PAD

4
3
2
1
AC_OK VDDP
1 R378 2BQ24745_ACOK 13 ACOK
1

0R0402-PAD 84.04800.D37
1

C395 24 24745_HIGH_G CHG_PWR


SC1U10V3KX-3GP UGATE
10 L18
2

41,56 BAT_SCL SCL


1 2
2

23 BQ24745_LX1 C409 1 2 BATT+_R 1 2


PHASE SCD1U50V3KX-GP R432
9 D01R2512F-4-GP
41,56 BAT_SDA SDA IND-5D6UH-32-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
20 24745_LOW_G DY DY
LGATE

5
6
7
8

SCD1U50V3KX-GP
CHG_AGND

D
D
D
D

C63

C61

C64

C62

C65
GAP-CLOSE-PWR

GAP-CLOSE-PWR
2

1
phoenix tsai 09/28/07 14 19
CHG_AGND NC#14 PGND U10
18

2
CSOP

G17

G16
FDS8884-GP
-1 C398

1
G
S
S
S
CHG_AGND 17
CSON
1 R379 2 BQ24745_IINP 8 2 1

4
3
2
1
41 AD_IA 0R0402-PAD SC150P50V2JN-3GP VICM
C399 4K7R2J-2-GP
84.04800.D37
B BQ24745_FBO_RC R390 1 SCD1U50V3KX-GP B
1 2 2BQ24745_FBO
SC220P50V2KX-3GP

1 R391 2 6 FBO
200KR2F-L-GP BQ24745_EAI 5 16
EAI NC#16
1

BQ24745_EAO 4 EAO
C394

C404 R394 BQ24745_VREF 3


SC2200P50V2KX-2GP 7K5R2F-1-GP BQ24745_CHG_ON 7 VREF
2

CE
1BQ24745_EAO_RC2 BATT_SENSE BATT_SENSE
2 1 12 15
Cherry Modify 0425
GND

GND VFB BATT_SENSE 56


1

C407 BQ24745_CSOP
SC1U10V3KX-3GP

SCD1U25V2ZY-1GP
1 2 U41 BQ24745_CSON
2

29

C393
C402 BQ24745RHDR-GP 1
SC56P50V2JN-2GP
2

3D3V_AUX_S5
CHG_AGND

1 R396
2
1

3D3V_AUX_S5
Jeff MOdify 1129
CHG_AGND 0R0402-PAD
R281
100KR2J-1-GP
AC_IN# to KBC
1

BQ24745_VREF
100KR2J-1-GP CHG_AGND
2

AC_IN# R382
41,56 AC_IN#
1

3D3V_AUX_S5
100KR2J-1-GP
2
1

C284 R260 BQ24745_CHG_ON Four Peaks


D

A A
SC1U10V3ZY-6GP
1
2

Q17 R383
Wistron Corporation
D

2N7002-11-GP AC_OK 100KR2J-1-GP C389


SC1U10V3ZY-6GP

G
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Q30 Taipei Hsien 221, Taiwan, R.O.C.
2nd = 84.27002.N31
S

G 2N7002-11-GP DY
41 CHG_ON# Title
2nd = 84.27002.N31 BQ24745 Charger
S

Size Document Number Rev


A3
Four Peaks -1M
Date: Friday, November 21, 2008 Sheet 55 of 57
5 4 3 2 1
A B C D E

1Pin=1A
SC 0229 DCIN_CN1 G15 CHG_PWR
12 Adaptor in to generate DCBATOUT AD+ GAP-CLOSE-PWR

2
1 AD_JK
D4 AD_JK+ 1 2
55 BATT_SENSE

SCD1U50V3ZY-GP
2 S10P40PT-GP-U U8
3 3 1 S D 8 CHGA CHGB

1
4 2 S D 7

SCD1U50V3ZY-GP
C52 S D
5 -1M(6/09) 3 6

K
SCD1U50V3ZY-GP

G1

S1

G2

S2
6 AD+_2 4 G D 5

1
C41 C40 D1

SC1U50V5ZY-1-GP
7

1
8 P6SBMJ24APT-GP AO4433-GP

1
4 9 R393 4

C403
200KR2J-L1-GP
10

1
11 AO4813-1-GP DCBATOUT
13 4/17 Q37

2
R2
MLX-CON11-1-GP E

8
DOCK_AD_JK
20.F0070.011 B

D1

D1

D2

D2
R1
AD_OFF#_JK C
DOCK_AD_JK

1
PDTA124EU-1-GP R392
2

BATA+ AO4813-1-GP AO4813-1-GP

100KR2J-1-GP
D3 Q32
S10P40PT-GP-U
2nd = 84.00124.E1K COMA 4 5 CHG_PWRA 5 4 DISA
G1 D1 D1 G1
3

2
S1 3 6 D1 D1 6 3 S1
SB Q33
C BATB+
B R1 DCN1 Conn. Test Point COMB 2 7 CHG_PWRB 7 2 DISB
1

G2 D2 D2 G2
E
R2 AD_JK 1 TP11 AFTE30-GP 1 8 8 1
S2 D2 D2 S2
PDTC124EU-1-GP
AD_JK 1 TP4 AFTE30-GP -1M(5/30)
Q38 Q3
41 AD_OFF 2nd = 84.00124.M1K -1

1
C457 C446

1
SC4D7U25V5MX-1GP

SC10U25V6KX-1GP
0425
BAT1 Conn. Test Point

2
MAIN BATTERY CONNECTOR BATA_SCL_1 1 TP158 AFTE30-GP Cherry Modify 0425
3 3
3D3V_AUX_S5 BATA_SDA_1 1 TP159 AFTE30-GP

BAT_A_IN#_1 1 TP160 AFTE30-GP


-1M(5/30)
BAV99PT-GP-U

BATA+ 1 TP260 AFTE30-GP


BATTERY SWITCH
1

D26 D27 BATA+ 1 TP262 AFTE30-GP


BAV99PT-GP-U DY DY DY D29
BAV99PT-GP-U BAT1
SC 0229 BATA+ Cherry Modify 0425
BATB+
8
1 CHG_PWR
-1 CHG_PWR
3

SRN33J-5-GP-U
RN28
C401 0425 C214
SC 1 4BATA_SCL_1
2
3
1 2 1 2
Adaptor IN Detection
41,55 BAT_SCL
41,55 BAT_SDA 2 3BATA_SDA_1 4 SC4D7U25V5MX-1GP SC10U25V6KX-1GP
41 BAT_A_IN# 1 R653 2 BAT_A_IN#_1 5 C406 C209

1
33R2J-2-GP 6 R437 1 2 1 2 R421
1

10KR2J-3-GP

10KR2J-3-GP
BATA+ 7
L13 9 SC10U25V6KX-1GP SC4D7U25V5MX-1GP
EC66 EC65
1

1
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY DY DY SYN-CON7-32-GP-U1 U14

2
1

DY DY 20.81021.007
MLVS0603M04-1-GP

EC67 EC68 EC69


SC 1 20
2

BATA BATB
SC1000P50V3JN-GP

SCD1U50V3ZY-GP SCD1U50V3ZY-GP BAT_A_IN# BAT_B_IN# 3D3V_AUX_S5


20.81049.007 2 19
2

CHGA THMA THMB CHGB


3 18
2

DISA CHGA CHGB DISB


4 17
K

AD+ COMA DISA DISB COMB


5 COMA COMB 16
D43
2 BZG05C3V3-GP-U1 AC_IN# 2
DY 41 BAT_SEL_A/B# 13 BATSEL ACPRES# 12 AC_IN# 41,55
1 2 MAX1773_ACDET 10 ACDET BATSTAT 11 BATA_STAT 1 2
R438 3K3R2F-2-GP R65
A

MAX1773_TCOMP 14 6 100KR2J-1-GP
TCOMP GND

1
8 EXTLD

1
R441 C455 M1773_EXTLD MAX1773_PDS 9 15
PDS VDD MAX1773_VDD

SCD1U50V3KX-GP
100KR2J-1-GP 7 MINV

1
BATB_SCL_1 1 TP98 AFTE30-GP R436 C442
2D BATTERY CONNECTOR

10KR2J-3-GP
MAX1773AEUP-GP SC1U10V3ZY-6GP
3D3V_AUX_S5 BATB_SDA_1 1 TP184 AFTE30-GP

2
BAT_B_IN#_1 TP101 AFTE30-GP MAX1773_PDS 55
1

2
-1M(5/30)
BAV99PT-GP-U

BATB+ TP265 AFTE30-GP BATB+ 1 TP264 AFTE30-GP


1 -1
1

M1773_EXTLD
R434
D14
BAV99PT-GP-U
D13
D11 BAT2
MAX1773_VDD
R433 0425
DY DY DY 1 2 1 2
BAV99PT-GP-U 8

2
1 10KR2F-2-GP 15KR2F-GP
G54
K
3

MAX1773_VDD
CH521G-30PT-GP
SRN33J-5-GP-U 2 GAP-CLOSE-PWR
SC RN16 3 1 2

1
41 THER_SCL 1 4BATB_SCL_1 4 R428
41 THER_SDA 2 3BATB_SDA_1 5 D32 1 10KR2J-3-GP
41 BAT_B_IN# 1 R654 2 BAT_B_IN#_1 6
A

33R2J-2-GP 7 R420 DCBATOUT


BATB+ 9 100KR2J-1-GP
1 Four Peaks 1
2

SYN-CON7-29-GP-U
SC
1

DY DY DY DY DY DY 20.81001.007
EC50 EC51 EC73 EC49 EC48 EC47
Wistron Corporation
SC1000P50V3JN-GP

SC1000P50V3JN-GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SCD1U50V3ZY-GP SCD1U50V3ZY-GP
20.81038.007
K

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


D44 Taipei Hsien 221, Taiwan, R.O.C.
BZG05C3V3-GP-U1 DY
Title

AD&BTY CONNECTER & BTY SWITCH


A

Size Document Number Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 56 of 57
A B C D E
5 4 3 2 1

5V_S0 DCBATOUT 1D05V_M VCC_CORE 3D3V_S5 VCC_GFXCORE 5V_S5

SB
1

1
DY EC92 DY EC93 DY EC94 DY EC95 DY EC91 DY EC121 EC100 DY EC102 DY EC101 EC126 DY EC127 DY EC125 DY EC103 DY EC104 DY EC129 DY EC128 DY EC107 DY EC108 DY EC109 DY EC110 DY EC123 DY EC124 DY EC122 DY EC136
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
2

2
D D

3D3V_S0 1D5V_S0 1D05V_PWR BATB+ BATA+


1

1
DY EC96 DY EC97 DY EC98 DY EC99 DY EC111 DY EC112 DY EC113 DY EC114 DY EC115 DY EC116 DY EC117 DY EC118 DY EC119 DY EC120 DY EC105 DY EC106 DY EC130 DY EC131 DY EC132 DY EC133 DY EC134 DY EC135
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
2

2
Stand off Location SC

DCBATOUT

H1 H3 H4 H5 H6 H7 H8 H9 H10 H17 H11


HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE315X315R91-S1-GP
EC137 EC138 EC139

2
SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP
C C
1

1
DY DY DY

1
H2 H13 H15 H19 H20 H21 H22 H23 H24 H26
ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX

ZZ.0HOLE.XXX
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE

ZZ.0HOLE.XXX
DIS:34.4Z401.001

DIS:34.4Z401.001
DOCK_AD_JK DCBATOUT_51124 DCBATOUT DCBATOUT_6263A
1

1
34.4T901.001
34.4Z901.001
34.42Y01.011

34.42Y01.011

34.42Y01.011

34.42Y01.011

34.42Y01.011

34.42Y01.011
EC29 EC30 EC31 EC23 EC24 EC25 EC26 EC28

2
SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP
DY DY DY DY

1
SC SPR6
SPRING-52-GP
SPR1 SPR2 SPR7 SPR8 SPR9 SPR10 SPR11
SPRING-14 SPRING-14 SPRING-14 SPRING-14 SPRING-14 SPRING-14 SPRING-14
34.4T025.001

B B
34.41V01.001

34.41V01.001

34.41V01.001

34.41V01.001

34.41V01.001

34.41V01.001

34.41V01.001

1D5V_S0 VGFXCORE VCC_GFXCORE


1

1
EC145 EC146 EC147 EC148 EC149 EC150 EC151 EC152

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
2

2
SPR3 SPR5 SPR12 SPR13 SPR14
SPRING-62-GP SPRING-62-GP SPRING-37-GP-U SPRING-37-GP-U SPRING-37-GP-U
SPR4
34.39S07.003

34.39S07.003

SPRING-14
34.15F09.001

34.15F09.001

34.15F09.001
34.41V01.001
1

-1 DIS DIS DIS


-1

-1

A SPR17 SPR18 Four Peaks A


SPR15 SPR16
SPRING-14 SPRING-14 SPRING-52-GP SPRING-52-GP
Wistron Corporation
34.4T025.001

34.4T025.001
34.41V01.001

34.41V01.001

DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


1

Taipei Hsien 221, Taiwan, R.O.C.

Title

-1(5/14)
Size Document Number
EMI/Spring/Boss Rev

Four Peaks -1M


Date: Friday, November 21, 2008 Sheet 57 of 57
5 4 3 2 1

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