1.

Consider an example of instruction storing in the memory. At location

200 in memory, an instruction is to be stored .The instruction is having
address field at location 201. 201 memory location is storing the value
500. The system is also using a processor register R1 that is having the
value 350. Calculate Effective address if the following addressing
modes is used in the instruction.
(i) Direct (ii) Immediate (iii) Relative (iv) Register indirect (v) Index
with R1 as the index register.

ANS-

The description given in the assignment can be represented

like this:
Location _ Contents
200 _ opcode ;the instruction operation code
201 _ 500 ;address field of the above instruction

(a) direct addressing

Direct addressing means that the address field contains the
address of memory location the instruction is supposed to
work with (where an operand "resides").
- Effective address would therefore be 500.

(b) immediate addressing

Immediate addressing means that the address field contains
the operand itself.
- Effective address would therefore be 201.

(c) relative addressing

Relative addressing means that the address field contains
offset to be added to the program counter to address a
memory location of the operand.
- Effective address would therefore be 201 + 500 = 701.

(d) register indirect addressing

Register indirect addressing means that the address of an
operand is in the register. The address field in this case
contains just another operand.
Effective address would therefore be in R1 = 350.

(e) indexed addressing with R1 as index register

There are several possible indexed addressing modes but in
this case (there is an address field) it is co called "indexed
absolute" addressing.
In indexed absolute addressing the effective address is
calculated by taking the contents of the address field and
adding the contents of the index register.
- Effective address would therefore be 500 + R1 = 500 + 350 =
850.
2.
The following memory units are specified by the number of word times
the number of bits per word. How many address lines and input-output
data lines are needed in each case? (A) 4K X 16; B) 32K X 8 ; C) 32M
X 64 ; d) 8G X 64.

ANS-

1.
a) 4Kx16

 Number of words = 4

 Number of bits per word= 16

 So, in 4Kx16, the number of address lines is an obtained

number of words, that is,

 4K= 2^2*2^10

 Therefore, it requires 2 address lines.

 The input-output lines are calculated as, the sum of address

lines and the number of bits, that is,

 = 12+ 16

 = 28

 Therefore, it requires 28 I/0 lines.

b) 32kx8

 Number of words=32K
  Number of bits per word= 8

 So, in 32K x 8, the number of address lines is an obtained

number of words, that is,

 32K= 2^5x 2^10

 =2^15

 Therefore, it requires 15 address lines.

 The input-output lines are calculated as, the sum of address

lines and the number of bits(data lines), that is,

 = 15 + 8

 = 21

 Therefore, it requires 39 I/0 lines.

c) 32M x 64

 Number of words= 32M

 Number of bids per word= 64

 So, in 16M x 64, the number of address lines is an obtained

number of words, that is,

 32M =2^5 x 2^20

 =2^25

 Therefore, it requires 25 address lines.

 The input-output lines are calculated as. the sum of address

lines and the number of bits(data lines), that is,

 = 25 + 64
  = 89

 Therefore, it requires 89 I/0 lines.

d) 8Gx 64

 Number of words= 8G

 Number of bits per word= 64

 So, in 8G x 64, the number of address lines is an obtained

number of words, that is,

 8G = 2^3 x 2^30

 = 2^33

 Therefore, it requires 18 address lines.

 The input-output lines are calculated as, the sum of address

lines and the number of bits(data lines), that is,

 = 33 + 64

 = 97

Therefore, it requires 97 I/0 lines.

3.
ANS-

Instruction Cycle:- The execution of instruction

through different phases is called the instruction
cycle. the instruction cycle is divided into four
phases:-
1. Fetch the instruction from memory

2. Decode the fetched instruction

3. Read the address from the memory if the

instruction has an indirect address

4. Execute the instruction

The flowchart of the instruction cycle for the

basic computer is shown below:-
Memory Reference Instruction
• It uses 12 bits to specify the address , 3 bits for opcode
and 1 bit to specify the addressing mode (I). I is equal
to 0 for direct address and 1 for indirect address.

Register Reference Instruction

• These instructions are recognized by the
opcode 111 with a 0 in the left most bit of instruction.
The other 12 bits specify the operation to be executed.