Arithmetic Operations and Circuits 2

Arithmetic Operations and Circuits 2
1. Signed binary numbers have one bit that represents the sign, with the remaining bits
representing the magnitude.
A. True
B. False
Answer: Option A
Explanation:
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2. The operands in a subtraction operation are the subend and the minuend.
A. True
B. False
Answer: Option B
Explanation:
3. A technique to speed parallel addition by eliminating the delay caused by the carry bit
propagation is called fast carry, or look-ahead carry.
A. True
B. False
Answer: Option A
Explanation:
4. End around carry is an operation in 1's complement subtraction where a 1 is added to the sum of
the 1's complement of both numbers.
A. True
B. False
Answer: Option B
Explanation:
5. The operands in an addition operation consist of the augend and the addend.
A. True
B. False
Answer: Option A
Explanation:
6. A full adder adds three bits, a half adder adds 1-1/2 bits.
A. True
B. False
Answer: Option B
Explanation:
7. Using the two's complement number system we can add numbers with like signs and obtain the
correct result.
A. True
B. False
Answer: Option B
Explanation:
8. Two half adders can be combined to form a full adder with no additional gates.
A. True
B. False
Answer: Option B
Explanation:
9. If you borrow from a position that contains a 0, you must borrow from the more significant bit that
contains a 1. All 0s up to that point become 1s, and the digit last borrowed from becomes a 0.
A. True
B. False
Answer: Option A
Explanation:
1. One advantage of using the 2's complement system to represent signed numbers is that you
___________.
A. can perform subtraction by performing addition
B. can perform addition by performing subtraction
C. can perform division through repeated subtraction
D. none of the above

Answer: Option A
Explanation:
2. The 1's complement of 1010102 is _________.

A. 0101102
B. 0101012
C. 1101112
D. 1010112
Answer: Option B
Explanation:
3. All digital systems that perform arithmetic operations must indicate _______ and ________ for
numbers.
A. size, base
B. sign, magnitude
C. sign, base
D. magnitude, base
Answer: Option B
Explanation:
4. The carry propagation delay in 4-bit full-adder circuits ____________.

A. is normally not a consideration because the delays are usually in the nanosecond range
is cumulative for each stage and limits the speed at which arithmetic operations are
B.
performed
C. decreases in direct ratio to the total number of full-adder stages
increases in direct ratio to the total number of full-adder stages, but is not a factor in
D.
limiting the speed of arithmetic operations
Answer: Option B
Explanation:
5. The 2's complement of 1101102 is _________.

A. 1101002
B. 1010102
C. 0010112
D. 0010102
Answer: Option D
Explanation:
6. A full adder adds ____.

A. two 2-bit binary numbers
B. two 4-bit binary numbers
C. two single bits and one carry bit
D. two 2-bit numbers and one carry bit

Answer: Option C
Explanation:
7. The bits of a number that tell how large the number is are called ____________________.
A. carry bits
B. magnitude bits
C. sign bits
D. most significant bits

Answer: Option B
Explanation:
8. Two 4-bit adders could be cascaded to form a(n) ___________.
A. 16-bit parallel-adder circuit
B. 8-bit parallel-adder circuit
C. full-adder circuit
D. arithmetic-logic unit
Answer: Option B
Explanation:
9. An input to the mode pin of an arithmetic-logic unit (ALU) determines if the function will be
_________.
A. one's complemented
B. positive or negative
C. with or without carry
D. arithmetic or logic
Answer: Option D
Explanation:
10. In binary number systems the sign of a number is indicated by _________.

A. using a 0 (zero) bit in front of negative numbers
B. inverting the bits if the number is negative
C. including a sign bit along with the magnitude bits
D. placing a negative sign in front of the number

Answer: Option C
Explanation:

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Arithmetic Operations and Circuits 2

B. can perform addition by performing subtraction

C. can perform division through repeated subtraction

D. none of the above

2. The 1's complement of 1010102 is _________.

4. The carry propagation delay in 4-bit full-adder circuits ____________.

5. The 2's complement of 1101102 is _________.

6. A full adder adds ____.

B. two 4-bit binary numbers

C. two single bits and one carry bit

D. two 2-bit numbers and one carry bit

D. most significant bits

B. 8-bit parallel-adder circuit

C. with or without carry

10. In binary number systems the sign of a number is indicated by _________.

B. inverting the bits if the number is negative

C. including a sign bit along with the magnitude bits

D. placing a negative sign in front of the number

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