LIC+COM Lab Manual - 17ECL48

LICs & Communication Lab 17ECL48
No. 22/1, Govindpura Main Road, Arabic College Post, Nagawara,

Bangalore-45
Prepared By: Scrutinized By:

Prof .Surendra K.V Dr. Suraiya Taranum
Associate Professor, Prof. & PG Coordinator,
Dept of ECE Dept of ECE
Lab Incharge: Prof .Surendra K.V

Lab Instructor: Mr. Sathyanarayana M
H.K.B.K College of Engineering 1 Dept of E&CE
LICs & Communication Lab

List of experiments
Sl. No Experiment Name
Design an instrumentation amplifier of a differential mode gain of A

1.
using 3 amplifiers.
Design of RC phase shift and Wein’s bridge oscillators using Op-

2.
amp.
Design active second order Butterworth Low Pass and High Pass
3.
Filters.
Design 4 bit R-2R Op-Amp Digital to Analog Converter
4. (i) using 4 bit binary input from toggle switches and
(ii) By generating digital inputs using mod-16 counter.
5. Design Adder, Integrator and Differentiator using Op-Amp.
6. Design of Monostable and Astable Multivibrators using 555 Timer.
7. Demonstrate Pulse sampling, Flat top sampling and reconstruction.

Amplitude Modulation using Transistor/FET (generation and
8.
detection).
9. Frequency modulation using IC 8038/2206 and demodulation.
10. Design BJT/FET Mixer.
11. DSBSC generation using Balanced Modulator IC 1496/1596.
12. Frequency synthesis using PLL.

LICs & Communication Lab

Cycle-1
Design an instrumentation amplifier of a differential mode gain of A

1.
using 3 amplifiers.
Design of RC phase shift and Wein’s bridge oscillators using Op-
2.
amp.
Design active second order Butterworth Low Pass and High Pass
3.
Filters.
Design 4 bit R-2R Op-Amp Digital to Analog Converter
4. (iii)using 4 bit binary input from toggle switches and
(iv) By generating digital inputs using mod-16 counter.
Cycle-2
5. Design Adder, Integrator and Differentiator using Op-Amp.
6. Design of Monostable and Astable Multivibrators using 555 Timer.
7. Demonstrate Pulse sampling, Flat top sampling and reconstruction.

Amplitude Modulation using Transistor/FET (generation and
8.
detection).
Cycle-3
9. Frequency Modulation using IC 8038/2206 and demodulation.
10. Design BJT/FET Mixer.
11. DSBSC generation using Balanced Modulator IC 1496/1596.
12. Frequency synthesis using PLL.

CYCLE - I
EXPERIMENT NO. 1
Instrumentation Amplifier
Aim: Design an Instrumentation Amplifier for a given Gain = ---------- Perform the
Experiment to verify your design.
Components required: op-amp µA 741, Dual power supply, Resistors
Theory:
Instrumentation Amplifier using opamp:
An instrumentation amplifier is a differential amplifier optimized for high CMRR. An
Instrumentation amplifier is typically used in applications in which a small differential
voltage and a large common mode voltage are the inputs
A practical Instrumentation amplifier circuit designed based on µA741 op-ampsis
shown above. The amplifier operates from +/- 12V DC and has a gain 10.If you need a
voltage gain, then replaceRG with a potentiometer (POT).
Instead of using µA 741 you can use any op-amp but the power supply voltage must be
changed according to the op-amp. A single LM324 op-amp IC is a good Choice. Out
of the four op-amp inside the LM 324, three can be used for IC1,IC2,IC3 and the
remaining one can be left alone This reduces the PCB size a lot and makes the circuit
compact. Supply Voltage for LM324 can be up to +/-16VDC
Advantages of instrumentation Amplifier
1. The gain of the instrumentation amplifier can be varied by just varying resistors in
input circuit without affecting the resistors in difference amplifier circuit
2. High CMRR
3. High Input Impedance
Applications of an instrumentation amplifier

Instrumentation Amplifiers are used where there is a need of high differential gain
accuracy, stability must be maintained within a noisy environment, and where large
common mode signals (usually at the ac power line frequency) are present
Some of the applications in which instrumentation amplifiers are used are:
1. In data acquisition from low output transducers such as strain gauges,
Thermocouples, Wheatstone bridges measurements etc.
2. In medical instrumentation, Navigation, Radar instrumentation etc.

3. In audio application involving low amplitude audio signals in noisy environments

to improve the signal to noise ratio
4. High speed signal conditioning for video data acquisition and imaging
5. High frequency signal amplification in cable RF systems
Circuit diagram:
Design:
The overall gain of the Instrumentation depends on the value of Rg. Let us assume the value
of Rg=10K
Let R1=R2= 100K
Rf1=Rf2=Rf
Rg=10K
Rf=10K
The gain of the amplifier could be easily adjusted using the Rg Pot in order to get better
Quality Waveform
Procedure:
1. Connections are made as per the circuit diagram

2. The output values are taken for different configuration of input voltages
3. Input is varied and corresponding output values are noted down. Differential mode
gain is calculated each case
4. The two input terminals of the 2 op-amps are shorted. This is the circuit for
common mode operation
5. Input is varied and the corresponding output values are noted down. Common
mode gain calculated at each case
6. CMRR of the amplifier is calculated
Differential Mode:
Si.No Vin (Volts) Vout Differential Gain (Ad) Differential Gain
V1 V2 (Volts) (Theoretical) (Ad) (Practical)
1.
2.
Result:

EXPERIMENT NO. 2
Oscillators
Aim:
a) To design and test the Wein Bridge Oscillator circuit for frequency of oscillations = 10
KHz.
b) To design and test the RC Phase Shift Oscillator circuit for frequency of oscillations = 1
KHz.
Components required: IC 741, Resistors (2.2K, 390KΩ, 7.5KΩ, 1KΩ, 220Ω, 680Ω),
Capacitors (0.1µF), CRO (100MHz), Dual Regulated Power Supply (0-30V, 1 A)
Theory:
An oscillator consists of an amplifier and a feedback network.
1)'Active device' i.e. Op Amp is used as an amplifier.
2) Passive components such as R-C or L-C combinations are used as feedback
network.
To start the oscillation with the constant amplitude, positive feedback is not the only
sufficient condition. Oscillator circuit must satisfy the following two conditions known
as Barkhausen’s criteria for sustained oscillations.
i. The first condition is that the magnitude of the loop gain (Aβ) = 1, where
A = Amplifier gain and β= Feedback gain.
ii. The phase shift around the loop must be 360° or 0°.
WEIN BRIDGE OSCILLATOR:

Wien bridge oscillator is an audio frequency sine wave oscillator of high stability. It is
a low frequency oscillator. The op-amp used in this oscillator circuit is working as
non-inverting amplifier mode. Here the feedback network need not provide any phase
shift. The circuit can be viewed as a Wien bridge with a series RC network in one arm
and parallel RC network in the adjoining arm. Resistors Ri and Rf are connected in the
remaining two arms.
RC PHASE SHIFT OCSILLATOR: (20 Hz to 100 KHz)

RC phase shift oscillator is a sinusoidal oscillator used to produce sustained well
shaped sine wave oscillations. It is used for different applications such as local
oscillator for synchronous receivers, musical instruments, study purposes etc. The
main part of an RC phase shift oscillator is an op amp inverting amplifier with its

output fed back into its input using a regenerative feedback RC filter network, hence
the name RC phase shift oscillator.
By varying the capacitor, the frequency of oscillations can be varied. The feedback RC
network has a phase shift of 60 degrees each, hence total phase shift provided by the
three RC network is 180 degrees. The op amp is connected as inverting amplifier
hence the total phase shift around the loop will be 360 degrees. Attenuation offered by
the feedback RC network is 1/29, so the gain of inverting amplifier should be 29.
 Frequency is sustained Oscillations is given by
 At this Frequency gain 29 to satisfy A =1

 Gain is an opamp is 29  Rf 29R1
Circuit Diagram:
RC PHASE SHIFT OSCILLATOR:

Design:

Frequency of oscillations is given by
Assume C = 0.1µF,
Therefore, for f =10 KHz, R = 220Ω
To find Rf:
For a Non-Inverting Amplifier
Rf = 2R1
Let R1 = 1KΩ
Therefore Rf = 2KΩ (Choose a standard Value 2.2KΩ)
RC PHASE SHIFT OSCILLATOR:
Design for R1 and Rf

Let Vcc = +12V. ; Let IBmax = 50nA
V0sat = I2 – 1 = 11V
I1 = 100 IBmax = 100 x 50 x10-9 = 50 µA.  Current through Rf
Rf = Vosat/ I1 = 220KΩ (choose 390KΩ for better output)
We know that
A = Rf/R1 >= 29
Therefore, R1 = 7.5KΩ
Design for the tank circuit

Frequency of oscillations is given as f = 1/2π√6RC

Assume C = 0.1µF,
Therefore, for f = 1KHz, R = 750Ω (choose 680Ω for better output)
OR
R = R1 / 10 = 7.5K/10 = 750K Ω
C = 1/2π√6Rf = 1/2π√6x1x103x750x103
Procedure:
1. Test the components before rigging up the circuit.

2. Rig up the circuit as per the circuit diagram.
3. Set the power supplies (+12V and -12V) and feed to the circuit.
4. Check the output (sine wave) in the CRO, Note down the amplitude and frequency
of oscillations.
5. Calculate the phase shift using Lissaginous Figures.
Result:
EXPERIMENT NO. 3
a) SECOND ORDER BUTTERWORTH ACTIVE LOW PASS FILTER
Aim: To design a second order Active Low Pass Filter for a given cutoff frequency and plot
the frequency response [Cutoff frequency, fH = 2 kHz] and to verify the roll-off factor.
Components Required: Op-Amp μA 741, Resistor 5.6 KΩ (1), 8.2 KΩ (2), 10 KΩ (1),
Capacitor 0.01μf (2), Fixed Power Supply +12V, 0,-12V, CRO, Signal Generator.
Circuit Diagram:

Figure1. Second order active low pass filter.
Design:
Cutoff frequency, fH = 1/2πRC
R = 1/2π fHC
Given fH = 2000 Hz
Let C = 0.01μf
R = {1/[2π x 2000 x 0.01 x 10-6 ]} Ω
R = 7.96 kΩ
Choose R =R1=R2=8.2 kΩ
For second order Butterworth frequency response, the filter gain A vo, that is required to
produce a damping factor of 1.414, is given by
Avo = 3 - damping factor

= 3 - 1.414
= 1.586 Let Ri = 10 kΩ, Avo = 1.586
Avo = [1 + (Rf/Ri)]
or Rf/Ri = 0.59
Then Rf = 5.86KΩ
Or choose Rf = 5.6 kΩ
(We can also Choose Rf = (1 kΩ resistor + 10 kΩ potentiometer) for better gain)

Procedure:
1. The circuit is connected as shown in figure1.
2. Apply a sinusoidal signal of voltage amplitude 1 volt (peak-to-peak) to the input of
the circuit Vi with the help of a signal generator. Connect the CRO probes and
display both input (Vi) and the output (Vo) on the CRO.
3. The frequency of the input signal is varied in steps as shown in the tabular column
and in each step the corresponding output voltage is measured for fixed input
amplitude of 1 volt peak to peak.
4. The readings are tabulated and the gain (G = 20 log (Vo/Vi) db) is calculated.
5. Frequency response curve is plotted in the graph sheet (Gain versus frequency) and
cutoff frequency is noted as shown below
Tabular Column:
Input voltage, Vi = 1 volts peak to peak
Frequency Vo volts G = 20 log (Vo/Vi) db Frequency Vo volts G = 20 log (Vo/Vi)
(f) (f)
100 Hz 2 kHz
200 Hz 3 kHz
300 Hz 4 kHz
400 Hz 5 kHz
500 Hz 6 kHz
600 Hz 7 kHz
700 Hz 8 kHz
800 Hz 9 kHz
900 Hz 10 kHz
1 kHz
Calculation of roll-off factor

1) 1 decade = ratio of 2 frequencies should be “10”.
2) Calculate the difference in gain (dB) over that decade.
Note: Choose the “decade” to fall in the linear region, preferably in the stop band.
Graph: Frequency Response for Low Pass Filter

b) SECOND ORDER BUTTERWORTH ACTIVE HIGH PASS FILTER
Aim: To design a second order Active High Pass Filter for a given cutoff frequency and plot
the frequency response. [Cutoff frequency, fL =2 KHz] and to verify the roll-off factor.
Components Required: Op-Amp μA 741, Resistor 5.6 KΩ (1), 8.2 KΩ (2), Capacitor
0.01μf (2), Fixed Power Supply +12V,0,-12V, CRO, Signal Generator.

Circuit Diagram:
Figure2. Second order active High pass filter.
Design:
Cutoff frequency, fL = 1/2πRC
R = 1/2πfLC
Given fL = 2000 Hz
Let C = C1=C2=0.01μf
R = {1/[2π x 2000 x 0.01 x 10-6 ]} Ω
R = 7.96 kΩ
Choose R =R1=R2=8.2 kΩ
For second order Butterworth frequency response, the filter gain A vo, that is required to
produce a damping factor of 1.414, is given by
Avo = 3 - damping factor
= 3 - 1.414
= 1.586 Let Ri = 10 kΩ, Avo = 1.586
Avo = [1 + (Rf/Ri)]
or Rf/Ri = 0.59

Then Rf = 5.86KΩ
Or choose Rf = 5.6 kΩ
(We can also Choose Rf = (1 kΩ resistor + 10 kΩ potentiometer) for better gain)
Procedure:
1. The circuit is connected as shown in figure 2.
2. Apply a sinusoidal signal of voltage amplitude 1 volt (peak-to-peak) to the input of
the circuit Vi with the help of a signal generator. Connect the CRO probes and
display both input (Vi) and the output (Vo) on the CRO.
3. The frequency of the input signal is varied in steps as shown in the tabular column
and in each step the corresponding output voltage is measured for fixed input
amplitude of 1 volt peak to peak.
4. The readings are tabulated and the gain (G = 20 log (Vo/Vi) db) is calculated.
5. Frequency response curve is plotted in the graph sheet (Gain versus frequency) and
cutoff frequency is noted as shown below.
Tabular Column:
Input voltage, Vi = 1 volts peak to peak
Frequency Vo volts G = 20 log (Vo/Vi) Frequency Vo volts G = 20 log
f db f (Vo/Vi)
100 Hz 2 kHz
200 Hz 3 kHz
300 Hz 4 kHz
400 Hz 5 kHz
500 Hz 6 kHz
600 Hz 7 kHz
700 Hz 8 kHz
800 Hz 9 kHz
900 Hz 10 kHz
1 kHz
Calculation of roll-off factor

1) 1 decade = ratio of 2 frequencies should be “10”.
2) Calculate the difference in gain (dB) over that decade.
Note: Choose the “decade” to fall in the linear region, preferably in the stop band.

Graph: Frequency Response for High Pass Filter
Result:
EXPERIMENT NO. 4
R-2R LADDER NETWORK
Aim: To test a 4-bit DAC using R-2R ladder network.

Components Required: Op-Amp μA 741, Resistor 1 KΩ (3), 2 KΩ (6), Fixed Power

Supply +12V, 0,-12V, CRO, Digital Volt Meter.
Circuit Diagram:
Figure 1. R-2R Ladder Network
Procedure:
1. Rig up the circuit as shown in the circuit diagram.
2. To measure the minimum output voltage Vo(min)
a) Set all the digital inputs to zero ie. A=B=C=D=0; Measure the output voltage

Vo across the resistor 2R. This will give Vo (min)

b) Vo(min) = (8A+4B+2C+1D) Vref/24
3. To Measure the resolution of DAC
a) Set C=B=A= 0(low) and D = 1(high). Measure the analog output voltage
Vo using Digital Volt Meter (DVM).
Vo = (0+0+0+1)5 / 24 = 0.3125V
4. To measure the full scale/Maximum output voltage Vo (max).
a) Set all the digital inputs to high ie. A=B=C=D=1; Measure the output Voltage
Vo across the resistor 2R. This will give Vo (max).
Vo (Max)=[(8+4+2+1)0.5]/24=0.3125V
5. Vary the digital inputs A, B, C, D from 0000 to 1111 and note down various
analog output Vo.
6. Also give digital inputs using mod-16 counter and note down the various analog
output Vo.Mod-16 counters using IC 7493 is as shown below.


Decimal Digital I/Ps Analog output voltage

Eqvt.
D C B A Theoretical value (V) Practical value(V)
0 0 0 0 0 0V
1
2
3
4
5
6
Tabular Column:

7
8
9
10
11
12
13
14
15 1 1 1 1 0.3125 V
Result:
CYCLE – II
EXPERIMENT NO. 5
ASTABLE & MONOSTABLE MULTIVIBRATOR USING 555 TIMER
Aim: Design and study of Astable & Monostable Multivibrator circuits Using 555 Timer.
Components Required: IC 555, Resistor 3.3KΩ (1), 1.6KΩ (1) Capacitor 0.22μf (1),
0.01μf (1), Fixed Power Supply +12V, 0, CRO.
a) Astable Multivibrator (free running square wave oscillator or a clock circuit)

Circuit Diagram:
Pin Details of IC 555
Design:
Output time period of oscillations = T=Ton + Toff
Charging time Ton = 0.693 (RA+RB) C1
Discharge time Toff = 0.693 RB.C1
Ton Ton
Duty cycle D =  =0.75
Ton  Toff T
1
Let T =  1msce,
f
Toff = 0.693 RB.C1
0.25x10-3 =0.693 RB x0.22x10-6
RB = 1.6 K choose as 1.6 K
Ton = 0.693 (RA+RB) C1
0.75x10-3 =0.693 (RA +1.6 K) x0.22x10-6
RA=3.3 K choose as 3.3 K
Here VLT = Lower threshold voltage = Vcc/3 = 1.66V
2 2
VUT = Upper threshold voltage = Vcc   5 = 3.33V
3 3

Note: -
1. To generate output waveform with duty cycle d = 50%, connect diode 4148 across RB
as shown. In that case, Ton = 0.693, RA.C & Toff = 0.693 RB.C.
2. To generate output waveform with duty cycle D < 50% connects 10K  pot in series
with RB and vary the pot or 3.3K resistor.
Procedure:
1. Connect the Astable Multivibrator circuit using IC 555.
2. Switch on the DC power supply unit Vcc = +5V.
3. Observe the output waveforms at pin 3 on CRO measure Ton & Toff.
4. Observe the waveforms across C1 (Vc) & measure the max & min voltage levels &
verify VUT & VLT.
5. Compare the capacitor voltage Vc with the output waveform Vo & note that capacitor
charges & Vc rises exponentially when output is high, the capacitor C1 discharges
through RB & the discharge transistor & Vc falls exponentially when output is low.
6. Calculate the duty cycle & the output frequency f & verify with the designed values.
7. Connect the diode for 50% duty cycle between pin no 7 and 2 (Ton=Toff).
Waveform:
T1=Ton and T2=Toff

b) Monostable Multivibrator (Time Delay Circuit)
Components required: IC 555, Resistor 4.7 KΩ (1), 10 KΩ (2), Capacitor 0.01μf (2), Fixed
Power Supply +12V,0,-12V, CRO, Signal Generator.
Circuit Diagram:
Design:
Let output pulse width = Delay time t d 0.5 msec
Output delay time Td = 1.1 RA.C
Let RA = 10 K 
Td 0.5  103
C=  0.045F , Choose C = 0.047 F
1.1  R A =
1.1  10  103
2
Here VUT = Upper threshold voltage = V cc , Choose RT CT << Td
3
Select RT .CT < (Td /10)
Output duty cycle d = Td/T
f = 1/T = Input trigger pulse frequency
Adjust input frequency ‘f’ from the pulse generator to f=1 KHz i.e.,

T = 1 msec (i.e. twice the output delay time Td)
Procedure:
1. Connections are made as shown in circuit diagram.
2. Switch on the power supply and observe the output waveforms on CRO at pin no 3
and measure the output delay time Td and verify with the designed values and also
observe the waveforms at pin no 2 – trigger input terminal & at pin no 7, also measure
the voltage levels.
Waveform:

Result:
EXPERIMENT NO. 6
APPLICATIONS OF OP AMP

Aim: To design op amp as summer, integrator, and differentiator.
Components required: OP AMP (µA741), Resistors (10KΩ, 2.2KΩ, 100KΩ),

Capacitors (0.1µF), Signal Generators, DC Source (VRPS)
I. OP AMP AS SUMMER:
Circuit Diagram:
Design:
Design a summing amplifier to obtain output of -6V.
Since inputs are given to inverting terminal, output is given by,
VO = -{(Rf/R1)V1 + (Rf/R2)V2 + (Rf/R3)V3}
Let V1 =V2= 0.5 , V3= 1V (DC voltages from VRPS)
Select Rf=10KΩ, R1=R2=2.2KΩ, R3=10KΩ to obtain output of 6V
Procedure:
1. Circuit is wired up as shown above.
2. With the chosen values of Rf, R1 ,R2 and R3 , provide V1,V2 and V3 from VRPS.
3. Measure the output voltage and compare it with the designed value
4. Repeat the above procedure providing ac sinusoidal signal of frequency 1KHz for
V1,V2 and V3 and observe the output waveform.
Theory:
The Summing Amplifier is a type of operational amplifier circuit configuration that is
used to add the voltages present on two or more inputs with required amplification into
a single output voltage. There are two basic varieties of op-amp summer circuits: none
inverting Summing Amplifier and inverting Summing Amplifier. In inverting
summing amplifier, the inputs are connected to inverting terminal and non inverting
terminal is grounded. Thus the output is inverted amplified sum of input volategs.
Similarly, non inverting amplifier amplifies the sum of input voltages without a phase
shift.

Waveforms:
II. OP AMP AS INTEGRATOR:
Circuit Diagram:
Design:
To design an op amp integrator for different values of R and C.
Since input is given to inverting terminal, VO = -

Requirement for integration is RC>> T, where T is the time period of input signal.
Consider input square wave of frequency 1KHz.
T= 1/f = 1ms
RC=T
Let RC =10T=10ms
Let C=0.1µF
Then, R = = 100KΩ
Choose R=100KΩ and C= 0.1µF.
Procedure:
2. Square wave of 1KHz frequency with suitable amplitude is applied at input.
3. R and C values are chosen according to the design.
4. Output waveform is observed on CRO. The output is triangular wave is out of phase
with respect to input
5. Repeat the above procedure for different values of R& C say (RC=10T, RC=T,
RC=0.1T). Observe and plot the waveforms.
Theory:
The operational amplifier integrator performs the mathematical operation
of integration with respect to time; that is, its output voltage is proportional to the input
voltage integrated over time. The integrator circuit is mostly used in analog
computers, analog-to-digital converters and wave-shaping circuits. The integrator
circuit is mostly used in analog computers, analog-to-digital converters and wave-
shaping circuits.
Waveforms:
Input t
Output t

III. OP AMP AS DIFFERENTIATOR:
Circuit Diagram:
Design:
To design an op amp differentiator for different values of R and C.
The output of differentiator is given by, V = -RC .
Requirement for differentiator is RC<<T, where T is the time period of input signal.
Consider input square wave of frequency 1 KHz.
T= 1/f = 1ms
RC<<T, Let RC= T;
RC=0.1T
Let C=0.1µF

Then, R = = 1KΩ
Choose R=1KΩ and C= 0.1µF.
Procedure:
2. Square wave of 1 KHz frequency with suitable amplitude is applied at input.
3. R and C values are chosen according to the design.
4. Output waveform is observed on CRO. The output will be a series of spikes.
5. Repeat the above procedure for triangular wave input.
6. Observe and plot the waveforms for different values of R& C say (RC=10T,
RC=0.1T).
Theory:
Op-amp differentiator circuit performs the mathematical operation of Differentiation
that is it “produces a voltage output which is directly proportional to the input
voltage’s rate-of-change with respect to time. An op-amp differentiator is an inverting
amplifier. The input signal to the differentiator is applied to the capacitor. The
capacitor blocks any DC content so there is no current flow to the amplifier summing
point. The capacitor only allows AC type input voltage changes to pass through and
whose frequency is dependent on the rate of change of the input signal Differentiating
circuits are usually designed to respond for triangular and rectangular input
waveforms. For a sine wave input, the output of a differentiator is also a sine wave,
which is out of phase by 180 o with respect to the input (cosine wave).
Waveforms:
Figure: Input and output waveforms of a differentiator

Result:

EXPERIMENT NO. 7
PULSE SAMPLING & FLAT TOP SAMPLING
Aim: To demonstrate Pulse sampling, Flat top sampling and reconstruction
Components Required: IC LF398, 47KΩ resistor, 0.01µF capacitor, Power supply,

Signal generator, CRO Probes and CRO.
Theory:
There are two types of signal exist, continuous time signal and discrete time signals. In
spite of having large number of continuous time signal we prefer processing of discrete
signal. Thus conversion of continuous to discrete time signal is required. This
phenomenon is obtained by fundamental mathematical fool known as Sampling
Theorem. Here in this post, we emphases the concept of Sampling, Sampling
theorem, Sampling techniques and its effects in details.
Sampling is the process of converting analog signal into a discrete signal or making an
analog or continuous signal to occur at a particular interval of time, this phenomena is
known as sampling.
Sampling Theorem:-Sampling theorem states that a band limited signal having no

frequency components higher than fm hertz can be sampled if its sampling freq is
equal to or greater than Nyquist rate.
Sampling Techniques:
There are basically three types of Sampling techniques, namely:

1. Natural Sampling
2. Flat top Sampling
3. Ideal Sampling
1. Natural Sampling:
Natural Sampling is a practical method of sampling in which pulse have finite width
equal to τ. Sampling is done in accordance with the carrier signal which is digital in
nature.
2. Flat Top Sampling:

Flat top sampling is like natural sampling i.e: practical in nature. In comparison to
natural sampling flat top sampling can be easily obtained. In this sampling techniques,
the top of the samples remains constant and is equal to the instantaneous value of the

message signal x(t) at the start of sampling process. Sample and hold circuit are used
in this type of sampling.
Procedure:
1. Build the circuit as shown below. Use a signal generator to generate analog input
and sampling (square wave signal). The analog input will be set to 1 kHz Sine wave
(or triangular wave) and sampling signal will be 15-20 kHz Square-wave of 80% duty
cycle.
2. Turn on the supply of the circuit and enable signal generator that is feeding signal to
the circuit. Connect the DSO probe – CH1 at analog input (pin # 3 of LF398IC), CH2
at sampling signal input (pin # 8 of LF398 IC) and CH3 at output (pin # 5 of the
LF398 IC), Perform Auto set on DSO and capture the output signal.
3•Configure PEAK-to-PEAK measurement on the input and output signal. Record the
measurement and Observe – input, output on DSO.
Flat top Sampling

1. Now modify the circuit as shown in fig 2 (to get flat-top sampled signals)
2. Use a signal generator to generate analog input and sampling (square wave signal).
The analog input will be set to 1 kHz Sine wave(or triangular wave) and sampling
signal will be 15-20 kHz Square-wave of 20% duty cycle.
3. Turn of the supply of the circuit and enable signal generator that is feeding signal to
the circuit.
4. Connect the DSO probe – CH1 at analog input (pin # 3 of LF398IC), CH2 at
sampling signal input (pin # 8 of LF398 IC) and CH3 at output (pin # 5 of the LF398
IC).
5. Perform Auto set on DSO and capture the output signal. Configure PEAK-to-PEAK
measurement on the input and output Signal
7. Record the measurement and Observe – input and output on DSO and record the signal

Circuit diagram for Pulse Sampling ( Natural Sampling)
Circuit diagram for Flat top Sampling
Figure2: The circuit used to generate ‘flat top sampled’ waveform

Expected waveform for Natural Sampling
Expected waveform for flat top Sampling

Result:
EXPERIMENT NO. 8
(a) AMPLITUDE MODULATION
Aim: a) To design and construct the Collector Amplitude Modulation circuit for a given
carrier frequency (say 455 kHz) and modulation frequency (say 1 kHz).
b) To study the variation in modulation index as a function of modulating voltage
amplitude.
Components Required: Audio Frequency Transformer (AFT), Radio Frequency

Transformer (IFT), Capacitor 0.01µF (2), Transistor (BF-194), Resistors (120Ω, 470 KΩ),
Fixed Power Supply + 5 V, CRO, Signal Generator.
Circuit Diagram:

Figure 1: Amplitude Modulation circuit
Pin diagram of BF194
Design:
Biasing circuit for class C operation

RC>> 1/fc, where fc is the carrier frequency.
Let C = 0.01μf
Let RC = 1000/fc
Then R = 1000 / (455x1000x0.01x10 -6) = 470kΩ
Procedure:
1. The circuit is connected as shown in figure 1.

2. The output and gain of the circuit tuned to carrier is checked without the
modulating signal.
3. The modulating signal is switched on and the amplitude is adjusted to about two
volts and frequency to less than or equal to 1 kHz to obtain an undistorted AM
wave.
4. Keeping the carrier amplitude constant, the modulating signal amplitude is varied
in appropriate steps and the Modulation index, m is calculated as shown below.
%m= [(Emax – Emin)/ (Emax + Emin)] x100
Also the modulated power with and without modulation is calculated.
Tabular Column:
Modulating Emax Emin Modulation Total power

Signal volts volts Index, %m Pt = Pc(1 + m2/2)
Amplitude watts
volts

Calculation:
Total power, Pt = Pc(1 + m2/2) where Pc is the carrier power . RL= 1K

Pc = (Emax + Emin)2/8RL
Unmodulated power, Pt = Pc and m = 0, E max = Emin = Ec

 Pt = Ec2/8RL
Waveforms:

Result:
(b).ENVELOPE DETECTOR

Aim: To construct an envelope detector circuit for an input AM signal and obtain the
detector characteristics
Components Required: Diode 0A79, capacitor 0.01µF (1), Resistor 10K (1).
Circuit Diagram:
Design:
Consider Fc=50kHz, Fm=10kHz (Fc>>Fm)
1/fc≤ RL C ≤1/W (W=message BW=Fm)
Let C=0.01μF
When RL C =1/Fm
RL =10k
When RL C=1/Fc
RL =2k
Hence Choose RL between 2k to 10k
Procedure:
1. The circuit is connected as shown.
2. AM input is applied from the function generator
3. The modulation index is varied in steps and Emax , Emin are noted from the Modulated
input signal. Also the corresponding AF (Audio frequency output) is noted at each step
Tabular Column:
Emax Emin AF Modulation

volts volts output Index, %m
volts
Calculations:
%m= [(Emax – Emin)/ (Emax + Emin)] x100
Waveform:
Trapezoidal Pattern:
E MAX EMIN
Result:

CYCLE – III
EXPERIMENT NO. 9
FREQUENCY MODULATION
Aim: To obtain frequency modulator using IC 2206.
Components Required: IC-2206, Resistor 100KΩ (1), 150Ω (1), 47KΩ (2), 4.7KΩ (1),
22KΩ, Capacitor 0.1μf (1), 10nf (2), 10μf (1), Fixed Power Supply +12V,0,-12V, CRO,
Signal Generator.
Circuit Diagram:

Design:
Let the frequency of oscillation fo = 1KHZ
fo = 1 / R7C
Select R7 = 100KΩ
To get C = 10nF
Let the output sine wave amplitude be 0.75V p-p

Therefore R3 = 4.7KΩ
(Since for each KΩ value of R3 , the output will be approximately 160mV) For sinusoidal FM
generation the switch between 13 & 14 is to be closed with a small resistance.
Let R = 150Ω
Let the FM output be switched between two frequencies f1=1 kHz and f2 = 2 kHz
Therefore f1 = 1 / R7C &
f2 = 1 / R8C
Using f1, f2 and C values in above equations,
R7 = 100KΩ
R8 = 47KΩ
Procedure:
1. Rig up the circuit as shown in the circuit diagram.
2. Without giving the modulating signal m (t) to the input of the frequency modulator,
observe the undistorted sinusoidal carrier wave output generated at the output point
(pin no.2) and measure the frequency of the carrier signal fc .
3. Apply a modulating signal m (t) of maximum voltage amplitude Vm of 5 volt (peak-to
peak) and frequency fm of 1 kHz at the modulation input of the frequency modulator.
4. From the FM signal waveform displayed on the CRO, measure the maximum
frequency fmax and minimum frequency, fmin present in the FM wave
5. Calculate the maximum frequency deviation fmax and fmin from the center carrier
frequency fc according to the formula:

Δf = (f max – fc) = (fc – f min)

6. Calculate the frequency modulation index from the formula:
β = Δf / f m ; where fm is frequency of modulating signal.
7. Calculate the bandwidth of operation BT from the formula:
 BT = 2 ( Δf + fm ).
Waveforms:
Result:

EXPERIMENT NO. 10
Transistor Mixer
Aim: To design, construct and demonstrate the mixing action (up & down) of a transistor
mixer circuit for an intermediate frequency (IF) of 455 KHz.
Components Required: IFT (455 KHz), Power Supply, Transistor (BF194/BF195)
Resistors (1k Ω, 10k Ω, 220Ω), Capacitors (22nf & 10nf).
Theory:
The mixer is a nonlinear device having two sets of input terminals and one set of
output terminals. Mixer will have several frequencies present in its output, including
the difference between the two input frequencies and other harmonic components.

Circuit Diagram:
+12V
220Ω IFT
Vo
--
Vx
C1
22nf
Vy
R2
C7
R1 10k
10nf
1k
Design:
fx= 600KHz & fy= 1055KHz

Therefore fif= fy-fx
=1055-600
= 455 KHz
f0 = 1/2πsqrt (LC) = 455 KHz

C= 470pf
L= 1/4π2f02c
L=250µH
Vx= 1v P-P
Vy = 10*Vx= 10v
fx=600KHz, fy=1055KHz(down conversion)

fx=1600KHz, fy=1145KHz(down conversion)
fx=400KHz, fy=55KHz(up conversion)
Procedure:
1. Rig up the circuit as shown in the circuir diagram.
2. Switch on Signal Source Vx and the Local Oscillator source Vy.
Adjust Vy amplitude to be about 10 times Vx.
3. Switch off Vy and adjust the frequency of Vx until the output Vo becomes
maximum and an undistorted sinusoidal waveform is obtained. Notedown
the frequency fx and verify f0=fx= 455KHz.
Use a frequency counter to make this Measurement.
4. a) set the Vx frequency to about 600 KHz , 800KHz and 1000KHz and
vary the Vy frequency(in each case) to get an undistorted sinusoidal
waveform of frequency 455KHz. Note down the corresponding Vy
frequency and calculate the difference(fx-fy). Tabulate the results. Observe
that fx-fy=f0 in each case. This demonstrate down conversion.
5. b) set the Vx frequency to about 100 KHz , 200KHz and 300KHz and vary
frequency (in each case) to get an undistorted sinusoidal waveform of
frequency 455KHz. Note down the corresponding Vy frequency and
calculate the sum(fx+fy). Tabulate the results. Observe that fx=fy=f0 in
each case. This demonstrates up conversion.
Tabular Column:
Down Conversion:
fx, KHz fy, KHz (fx-fy),KHz f0, KHz
600
800
1000
Up Conversion:
fx, KHz fy, KHz (fx+fy),KHz f0, KHz
100
200
300
Result:
Down Conversion frequency f0=

Up conversion frequency f0=
EXPERIMENT NO. 11
Balanced Modulator
Aim:
To generate AM-Double Side Band Suppressed Carrier (DSB-SC) signal.
Components Required:
IC 1496, Resistors (6.8KΩ, 10 KΩ, 3.9KΩ, 1KΩ, 51 KΩ), Capacitor (0.1 μF), Variable
Resistor/Linear Pot (0-50KΩ), CRO, Function Generator, Regulated Power Supply
Theory:
Balanced modulator is used for generating DSB-SC signal. A balanced modulator
Consists of two standard amplitude modulators arranged in a balanced configuration so
as to suppress the carrier wave. The two modulators are identical except the reversal of
sign of the modulating signal applied to them.
Circuit Diagram:

Fig.1. Balanced Modulator Circuit
Procedure:
1. Connect the circuit diagram as shown in Fig.1.
2. A Carrier signal of 1Vp-p amplitude and frequency of 83 KHz is applied as carrier
to pin no.10.
3. An AF signal of 0.5Vp-p amplitude and frequency of 5 KHz is given as message
Signal to pin no.1.
4. Observe the DSB-SC waveform at pin no.12.
5. Observe Phase reversal in DSB-SC Signal occurring at the zero crossing of
Modulating signal.
Sample readings:
Signal AMPLITUDE (Volts) Frequency (Hz)

Message signal 0.5V 5 KHz
Carrier signal 1V 83.3KHz
DSB-SC Signal 1.92V p-p ---------
Waveforms:

Result:
EXPERIMENT NO. 12
FREQUENCY SYNTHESIS USING PLL
Aim: To design a FM demodulator to demodulate the FM signals using IC 565.
Components Required: LM 565, Resistor 600Ω (2), 68KΩ (1), Capacitor 150μf (1), 1nf
(1), 4.7nf (1), 10μf (1), Fixed Power Supply +12V,0,-12V, CRO, Signal Generator.
Circuit Diagram:

Design:

Procedure:
(1) Connections are made as per circuit diagram.
(2) Check the working of PLL by giving square wave as input to the circuit.
(3) Vary the frequency of input square wave till input and output are locked.
(4) Now frequency modulated signal is fed as input and demodulated sinusoidal signal
is observed on CRO and plotted on graph sheet.
(5) Vary the amplitude and frequency of the modulating signal input to the frequency
modulator and observe the corresponding changes in the amplitude and frequency
of the demodulated output.

Waveforms:
Understanding of Lock and Capture Ranges
Result:

QUESTION BANK
1. Design an Instrumentation Amplifier for a given gain=------.perform an experiment to
verify the design.
2. (a) Design and test the Wein bridge Oscillator circuit for frequency of oscillations=10
KHz.
2. (b) Design and test the RC Phase shift Oscillator circuit for frequency of
oscillations=1KHz.
3. (a) Design a second order Active Low Pass Filter for a cut off frequency fc=2KHz
and plot the frequency response and verify the Roll Off factor.
3. (b) Design a second order Active High Pass Filter for a cut off frequency fc=2KHz
and plot the frequency response and verify the Roll Off factor.
4. Demonstrate working of 4-bit R-2R ladder DAC using OP-AMP. Draw the input-
output Staircase waveform and compare with the typical characteristics. determine the
following:
(i) V0(max) (ii) V0(min) (iii) V0(FS) (iv) Step Size

(V) Resolution
Compare with the theoretical values.

OR
4. Test a 4-Bit R-2R DAC. Provide digital inputs using a Mod-16 counter(IC 7493).
5. Design and test an op-amp as a summer and Integrator.
OR
5. Design and test an op-amp as a summer and Differentiator.
6. Design and conduct an experiment on a Free Running Multivibrator to generate a
Symmetrical wave of frequency f=........, using 555 Timer.
OR
6. Design and conduct an experiment on a Free Running Multivibrator (Unsymmetrical)
for a

given frequency and Duty Cycle,D=75% using 555 Timer.

OR
6. Design and conduct an experiment on a Free Running Multivibrator (Unsymmetrical)
for a
Given frequency and Duty Cycle, D=25% using 555 Timer.
OR
6. Design and conduct an experiment on a Monostable Multivibrator to generate a pulse
of
Pulse- Width of ------ms using a 555 timer.
7. Conduct an experiment to obtain the Naturally sampled signal and Flat Top sampled
signal Using LF398.
8. Design and conduct an experiment to generate an AM signal using Collector
modulation for a
Carrier Frequency fc=-----KHz and a modulating frequency fm=-----KHz. Design and
conduct an experiment to demodulate the AM wave.
9. Design and conduct an experiment to generate FM wave using IC
2206/IC8038.determine the
Modulation Index and Transmission Bandwidth using Carson’s Rule.
10. Design and conduct an experiment to test a Mixer circuit using BJT.
11. Design and conduct an experiment to generate a DSBSC-AM signal using an IC 1496.
12. Design an FM Demodulator to demodulate the FM signal using the PLL IC
565.Display and plot the waveforms of the input FM signal and the demodulated
output sinusoidal signal.

VIVA QUESTIONS
1. What are the applications of an Instrumentation Amplifier?
2. Define CMRR.
3. Define Differential Mode gain.
4. Define Common Mode gain.
5. Explain virtual ground concept WRT an Op-Amp.
6. Define an Offset Voltage.
7. What are the applications of an Integrator?
8. What are the applications of a Differentiator?
9. How do you obtain an Averager from a Summer .
10. Define an Oscillator.
11. Where a wein bridge Oscillator is used?
12. What are the applications of an RC Phase Shift Oscillator?
13. Explain Barkhausen criterion for sustained Oscillations?
14. What is a filter?
15. Define Cut Off Frequency?
16. Define a Roll Off factor.
17. Draw the Frequency response Curve Of a LPF and HPF.
18. Explain the features of a Butterworth filter.
19. What do you mean by a 3-dB gain?
20. What do you mean by R-2R DAC?
21. What are the applications of a DAC?
22. What is Resolution and Step sizeWRT a DAC?.
23. How do you calculate the full scale output voltage of a DAC?
24. What is a multivibrator?
25. Explain an Astable multivibrator.
26. Explain Monostable multivibrator.
27. Define Duty Cycle.
28. Define Amplitude modulation.
29. Write a time domain equation of an AM Wave.

30. Sketch the waveform of an AM wave.
31. Differentiate Single tone and Multitone modulation.
32. Define Amplitude Modulation Index.
33. How to calculate the total power associated with an AM wave.
34. Define frequency Modulation.
35. Draw the waveforms representing FM.
36. Differentiate NBFM and WBFM.
37. Define Frequency Modulation Index.
38. How much is the Bandwidth required to transmit the FM signal?
39. Which IC is used to test a Balanced Modulator Circuit.
40. Define DSB-SC AM. Write a mathematical equation.
41. Draw the waveform of DSBSC-AM.
42. Draw the frequency domain spectrum of DSBSC-AM.
43. What for the mixer circuit is used?
44. Explain Up Conversion and Down Conversion.
45. What is an IFT?
46. Explain the functionality of a PLL Circuit.
47. Define Lock range.
48. Define Capture range.
49. Define VCO.
50. State sampling theorem.
51. Define Natural Sampling.
52. Define flat Top sampling.
53. Draw the Waveforms of naturally sampled signal and Flat Top sampled signal.
54. What does a Sample and Hold circuit do?
55. Draw the Pin Configurations of LF398,1496,7493,µA741,8038,2206,565,555 ICs

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LICs & Communication Lab 17ECL48

No. 22/1, Govindpura Main Road, Arabic College Post, Nagawara,

Prepared By: Scrutinized By:

Lab Incharge: Prof .Surendra K.V

LICs & Communication Lab

Sl. No Experiment Name

Design an instrumentation amplifier of a differential mode gain of A

Design of RC phase shift and Wein’s bridge oscillators using Op-

6. Design of Monostable and Astable Multivibrators using 555 Timer.

7. Demonstrate Pulse sampling, Flat top sampling and reconstruction.

10. Design BJT/FET Mixer.

11. DSBSC generation using Balanced Modulator IC 1496/1596.

12. Frequency synthesis using PLL.

H.K.B.K College of Engineering 2 Dept of E&CE

LICs & Communication Lab

Design an instrumentation amplifier of a differential mode gain of A

5. Design Adder, Integrator and Differentiator using Op-Amp.

6. Design of Monostable and Astable Multivibrators using 555 Timer.

7. Demonstrate Pulse sampling, Flat top sampling and reconstruction.

9. Frequency Modulation using IC 8038/2206 and demodulation.

10. Design BJT/FET Mixer.

11. DSBSC generation using Balanced Modulator IC 1496/1596.

12. Frequency synthesis using PLL.

H.K.B.K College of Engineering 3 Dept of E&CE

Components required: op-amp µA 741, Dual power supply, Resistors

Applications of an instrumentation amplifier

H.K.B.K College of Engineering 4 Dept of E&CE

3. In audio application involving low amplitude audio signals in noisy environments

H.K.B.K College of Engineering 5 Dept of E&CE

H.K.B.K College of Engineering 6 Dept of E&CE

WEIN BRIDGE OSCILLATOR:

RC PHASE SHIFT OCSILLATOR: (20 Hz to 100 KHz)

H.K.B.K College of Engineering 7 Dept of E&CE

 Frequency is sustained Oscillations is given by

 At this Frequency gain 29 to satisfy A =1

WEIN BRIDGE OSCILLATOR:

RC PHASE SHIFT OSCILLATOR:

H.K.B.K College of Engineering 8 Dept of E&CE

WEIN BRIDGE OSCILLATOR:

RC PHASE SHIFT OSCILLATOR:

Design for R1 and Rf

Design for the tank circuit

H.K.B.K College of Engineering 9 Dept of E&CE

1. Test the components before rigging up the circuit.

H.K.B.K College of Engineering 10 Dept of E&CE

Figure1. Second order active low pass filter.

Avo = 3 - damping factor

H.K.B.K College of Engineering 11 Dept of E&CE

Calculation of roll-off factor

Graph: Frequency Response for Low Pass Filter

H.K.B.K College of Engineering 12 Dept of E&CE

b) SECOND ORDER BUTTERWORTH ACTIVE HIGH PASS FILTER

H.K.B.K College of Engineering 13 Dept of E&CE

Figure2. Second order active High pass filter.

H.K.B.K College of Engineering 14 Dept of E&CE

Calculation of roll-off factor

H.K.B.K College of Engineering 15 Dept of E&CE

Graph: Frequency Response for High Pass Filter

Aim: To test a 4-bit DAC using R-2R ladder network.

H.K.B.K College of Engineering 16 Dept of E&CE

Components Required: Op-Amp μA 741, Resistor 1 KΩ (3), 2 KΩ (6), Fixed Power

Figure 1. R-2R Ladder Network

H.K.B.K College of Engineering 17 Dept of E&CE