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Notation Summary
Two Port Device and Hybrid Model
The quantities h11, h12, h21, h22 are called the h, or hybrid
parameters. As they are not all alike dimensionally.
Two Port Device and Hybrid Model
• i = 11 = input
• o = 22 = output
• f = 21 = forward transfer
• r = 12 = reverse transfer
As the Device Described by the Equations (1) and (2) is having no Reactive Elements,
all four h-parameters h11, h12, h21 and h22 are real numbers and the voltages and
currents v1, v2 and i1, i2 are functions of time.
For Reactive Elements included in Device, h parameters will be complex numbers,
and voltages and currents will be functions of frequency, represented as phasors V1,
V2 and I1, I2.
Two Port Device and Hybrid Model
The Model :
Fig. (1): Hybrid Model for Two Port Network
(4)
(5)
(6)
(5)
(6)
The Quantities ΔvB , ΔvC , ΔiB and ΔiC represent the small signal
(incremental) base and collector voltages and currents. As per the
Notations we can rewrite the Eqn.(5) and (6) as
(7)
(8)
Transistor Hybrid Model :
(7)
(8)
Where,
(9)
and,
(10)
Partial Derivatives of the Eqn. (9) and (10) are taken keeping
VC=Constant or IB=Constant. For Constant Parameter its
incremental change is zero, so
VC=Constant is Equal to vc=0 and IB=Constant is Equal to ib=0
With this notation, Eqn. (9) and (10) will be represented as,
The Circuit Models and equations are valid for either n-p-n or
p-n-p transistor and are independent of the type of load or
method of biasing.
h Parameters
From h parameters
for CE Config.
From Model
of transistor.
QUANTITIES OF INTEREST
From Figure,
3. Voltage Gain AV
The Ratio of Output Voltage V2 to input voltage V1 gives the
voltage gain of the transistor, or
Place
Analysis of Transistor Amplifier Circuit using h Parameters
Voltage Gain AVS Taking into account the Resistance Rs of the Source
Note that for Rs=0 , AVS=AV, so AV is the voltage gain for the ideal voltage source
( One with zero internal resistance) .
Analysis of Transistor Amplifier Circuit using h Parameters
Current Gain AIS Taking into account the Resistance Rs of the Source
Note that if Rs=∞, then AIS=AI, so AI is the current gain for an ideal
current source (one with infinite resistance) .
Voltage and Current gains with Source resistance taken
into account are related by :
Analysis of Transistor Amplifier Circuit using h Parameters
4. Output Impedance Zo
Output Impedance Zo=1/Yo is obtained by setting,
From,
(a)
(b)
Thevenin’s and Norton’s Theorems and Corollaries
Corollaries:
For V= Open Circuit Voltage, I= Short Circuit Current ,
Z=Impedance and Y = Admittance :
As per the characteristics of Emitter Follower, Input Resistance Ri is very high and
output resistance Ro is very low is shown with the help of h parameters.
Comparison of Transistor Amplifier Configurations
Comparison of Transistor Amplifier Configurations
Comparison of Transistor Amplifier Configurations
Miller’s Theorem and its Dual
• Some of the configurations can be analyzed more simply by using miller’s
theorem.
• A circuit configuration with N distinct nodes 1, 2, 3,…, N.
• Node Voltages be V1, V2, V3, …, VN, Where VN=0.
• Nodes 1 and 2 Connected by Impedance Z’
• V2/V1 = K
• In Sinusoidal Analysis, it will be a complex number, or
• In Laplace transform, a function of transform variable s.
Miller’s Theorem and its Dual
• Current I1 drawn from Node-1 (N1) through Z’ can be obtained by disconnecting
terminal 1 from Z’ and bridging Impedance Z’/(1-K) from N1 to ground.
V2/V1 = K
Then Current I1 is
given by
With the Value of K known or found by independent means, and Z’ is given, a Network can
be replaced with its Miller Equivalent Network
Miller’s Theorem and its Dual
Also first the current gain is computed as it is used to find other quantities.
Example: Continued….
Example: Continued….
1. Current Gain
2. Input Impedance
As
And Again if, hoeRL < 0.1
3. Voltage Gain
So Approximate or Simplified
Analysis give more O/P Resistance,
but not more than 10 Percent.
Quantities for Simplified Analysis – CC Configuration
Fig. Shows Simplified CC Hybrid Model
with Collector Grounded and RL
Connected between Emitter and Ground.
1. Current Gain
From fig.
2. Input Resistance
From fig.
3. Voltage Gain
4. Output Impedance
And
Summary of Simplified Analysis
Transistor at High Frequency
• High Frequency Analysis is necessary to examine diffusion
mechanism in more detail.
Increase in minority carriers in the Change in effective base width causes emitter and
base results in increased thus collector current to change because the slope of
recombination base current. This minority carrier distribution in the base changes. This
effect taken into account by feedback effect is taken in to account by connecting
inserting conductance gb’e gce between Collector and Emitter. (Early Effect)
Hybrid – π Model for CE Configuration : Circuit Components
So,
The dynamic resistance of the forward biased diode.
Ƞ is taken as unity
in calculation of gm
Where,
As, VT=T/11600 gm is directly
proportional to current and inversely
So, proportional to temperature.
Similarly for NPN device also it will lead to gm as (at room temp.)
positive , since |IC| >> |ICO|, gm is
Hybrid-π Conductances
Or,
Or,
Place,
And , as rb’c>>rb’e
Summary
Hybrid-π Model for a CE Transistor shown
Hybrid-π Capacitances in Fig. has two capacitances.
Where,
The CE Short Circuit Current Gain
Ai at ω=0 is -hfe a
low frequency short
circuit current gain.
The CE Short Circuit Current Gain
Frequency at which Short Circuit Current Gain of Common
The Parameter fT Emitter drops to unity.
As, hfe>>1, from Equation of Current Gain Ai and fβ, fT is given by,
As Ce>> Cc
The Parameter fT
fT represents short circuit low frequency Current Gain-Bandwidth Product. Bandwidth is
defined as fβ, which is also called upper 3-dB frequency.
For Two transistor with equal value of fT, the transistor with lower hfe will have larger
value of bandwidth.
• Ai = 0 dB at f=fT
• Ai = -hfe For f<<fβ
• for f>>fβ
|Ai |≈ hfe fB/f=fT/f,
So Ai (dB) =20 log fT-20 log f
The Current Gain with Resistive Load
For finite value of RL, the parallel combination of gb’c and Cc , using Miller’s
Theorem, is replaced as shown in fig.
• Identify Vb’e as V1 and Vce as V2 – Equivalent to Hybrid
Network Voltages.
• Then, V2/V1=Vce/Vb’e=K.
• K is used as the gain for Miller Equivalent Ckt.
• Ckt. Has two Time Constants – One in Input Ckt. & One in
Output Ckt.
The Current Gain with Resistive Load
• In Practical Situation, Output Time Constant is negligible therefore;
Delete output capacitance Cc(K-1)/K.
As K=Vce/Vb’e, and for CE , |K|>>0, so, gb’c(K-1)/K ≈ gb’c
As gb’c<<gce, omit gb’c.
gce can be neglected compared to 1/RL
From output circuit Vce/Vb’e=-gm.Vb’e.RL/Vb’e = - gm.RL=K
Place K= -gm.RL in Cc.
For, gm=50mA/V, and RL=2000 ohms, K=-100. so gb’c(1-K)≈0.025 mA/V
As gb’e=1 mA/V, gb’c(1-K) can be neglected.
Reduced ckt. is shown in Fig.b.
The Current Gain with Resistive Load
• So, Bandpass of the amplifier will be determined by input ckt. Time constant.
Whereas Cc will not have much impact on output ckt. for a range of frequency.
• Output Capacitance Cc will have impact only for highly capacitive load.
Comparison with Short Circuit CE Configuration
Load RL is included.
Cc is augmented with Cc.gm. RL
And,
Single Stage CE Transistor Amplifier Response
Magnitude and
Phase response for
T.F. is as shown.
The Gain Bandwidth Product