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Transistor at Low Frequencies

Important Notations for Analysis

• Instantaneous Values of Quantities which vary with time are


represented by lower case letters
i for Current, v for Voltage and p for Power
• Maximum, average (dc) and effective, or root-mean-square (rms)
values are represented by upper case letters of the proper symbol
(I, V, or P)
• Average (dc) values and instantaneous total values are indicated by
the upper case subscript of the proper electrode symbol
B (base), E(emitter) C(Collector)
• Varying components from some quiescent value are indicated by the
lower subscript of the proper electrode symbol.
b(base), e(emitter), c(collector)
Important Notations for Analysis

Instantaneous Value Instantaneous Total Quiescent Value of


of varying Collector Value of Collector Collector Current
Current toward Current toward toward electrode
electrode from electrode from from external
external circuit external circuit circuit

Notation Summary
Two Port Device and Hybrid Model

• Terminal Behavior of a Large Class of Two Port Devices is specified by


two voltages and two currents.

• We can select two of four quantities as the independent variables


and express remaining two in terms of the chosen independent
variables.

• We are not free to select Independent variables arbitrarily. For


transformer, two voltages v1 and v2 can not be picked up as
independent variables as their ratio is a constant equal to
transformer turns ratio.
Two Port Device and Hybrid Model

If Current i1 and voltage v2 are independent and if the two port


network is linear, we may write;
v1= h11i1 + h12v2 (1)
i2= h21i1 + h22v2 (2)

The quantities h11, h12, h21, h22 are called the h, or hybrid
parameters. As they are not all alike dimensionally.
Two Port Device and Hybrid Model

Assume there are no reactive elements in two port network.


Then from Eqn. (1) and (2), the h-parameters are defined as,

V1 Input Resistance with Output Short Circuit (Ohms)


h11 =
I1 V2 = 0
Fraction of output voltage at input with input open-
circuited,
V1 Also called Reverse Open Circuit Voltage Amplification
h12 =
V2 I1 = 0 (Dimensionless)

Negative of the Current Transfer ratio ( or current gain)


I2 with output short circuited. (Here, Current into a load
h21 =
I1 across the o/p port would be negative of i2.
V2 = 0
Also called short circuit current gain (Dimensionless)

I2 Output conductance with input open-circuited (mhos)


h22 =
V2 I1 = 0
Two Port Device and Hybrid Model

Notation: Subscript Notations for h-parameters as per recommended by IEEE


Standards

• i = 11 = input
• o = 22 = output
• f = 21 = forward transfer
• r = 12 = reverse transfer

In case of Transistor, another subscript ( b, e or c ) is added to designate the type of


configuration

hib = h11b = input resistance in common base configuration


hfe = h21e = short circuit forward current gain in common emitter circuit.

 As the Device Described by the Equations (1) and (2) is having no Reactive Elements,
all four h-parameters h11, h12, h21 and h22 are real numbers and the voltages and
currents v1, v2 and i1, i2 are functions of time.
 For Reactive Elements included in Device, h parameters will be complex numbers,
and voltages and currents will be functions of frequency, represented as phasors V1,
V2 and I1, I2.
Two Port Device and Hybrid Model

The Model :
Fig. (1): Hybrid Model for Two Port Network

Hybrid Circuit for the Device has a Model that satisfies


Eqn. (1) and (2).
Here, Input Circuit has Dependent Voltage generator and
Output Circuit has a Dependent Current Source.
Transistor Hybrid Model :

To obtain Linear Model of Transistor – The First Assumption is


variation about the Q Point are small. So, Transistor
Parameters can be considered Constant over the Signal
excursion.

Transistor Model in terms of h parameters, which are real


numbers at audio frequencies.

h Parameters can be obtained from Transistor Characteristics


Curves.

Set of h Parameters is also supplied by many transistor


manufacturers.
Transistor Hybrid Model :

To obtain h Parameters for Common


Emitter Configuration.
Variables:
iB , iC , vBE = vB and vCE = vC represents total
instantaneous currents and voltages.

Out of these variables, we can select


current iB and voltage vC as
independent variables.
Fig. 2. CE Transistor Configuration
Variables Selected on the basis of
Input and Output Characteristics of
Transistor. (3)
Since vB is some function f1 of iB and
vC and since iC is another function f2 of (4)
iB and vC , we may write,
Transistor Hybrid Model : (3)

(4)

Making Taylor’s Series Expansion of Eqn. (3) and (4) around


Quiescent Point IB, VC and neglecting higher order terms, we get

(5)

(6)

Partial Derivatives taken keeping Collector Voltage or Base Current


Constant, as indicated by subscript attached to the derivative.
Transistor Hybrid Model :

(5)

(6)

The Quantities ΔvB , ΔvC , ΔiB and ΔiC represent the small signal
(incremental) base and collector voltages and currents. As per the
Notations we can rewrite the Eqn.(5) and (6) as

(7)

(8)
Transistor Hybrid Model :
(7)

(8)
Where,

(9)

and,
(10)

Eqn. (9) and (10) define the h parameters for common-emitter


connection. Here the Approach is Mathematical, But the same can
be achieved graphically.
Transistor Hybrid Model :
Eqn. (7) and (8) are same as that for the two port network
equations (1) and (2). So Equivalent Circuit for Common Emitter
Transistor Hybrid Parameters can be drawn.

Partial Derivatives of the Eqn. (9) and (10) are taken keeping
VC=Constant or IB=Constant. For Constant Parameter its
incremental change is zero, so
VC=Constant is Equal to vc=0 and IB=Constant is Equal to ib=0
With this notation, Eqn. (9) and (10) will be represented as,

Valid for Sinusoidal (Phasor)


Voltages and currents )
Transistor Hybrid Model :

Fig. (3): Hybrid Small Signal Model for Common Emitter


Configuration
Transistor Hybrid Model :

Fig. (4): Hybrid Small Signal Model for Common Collector


Configuration
Transistor Hybrid Model :

For Each Configuration, from Kirchhoff's Current Law,

The Circuit Models and equations are valid for either n-p-n or
p-n-p transistor and are independent of the type of load or
method of biasing.
h Parameters

As discussed four variables used in the h-parameters represents


the input and output characteristics respectively for different
configurations of transistor.

Input Characteristics : Input Voltage and Input Current w.r.t


Output Voltage

Output Characteristics : Output Current and Output Voltage


w.r.t. Input Current.

These Characteristics Curves used to find h-parameters


graphically.
h Parameters Graphical Determination

Common Emitter Short Circuit Forward Current Gain


hfe Increments in Current are
taken around the Quiescent
Point Q
iB=IB, vCE=VC

hfe is the most important small


signal parameter of the
transistor.

This Common emitter Current


Transfer Ratio, or CE alpha, is
α
also written as e or β’, and
called small signal beta of the
transistor.
h Parameters Graphical Determination

Common Emitter output conductance


hoe
The value of hoe at Q Point is
the Slope of the Output
Characteristic Curve at that
point.

This slope can be evaluated by


drawing the line AB tangent to
characteristic curve at point Q.

Similarly other two h


h h
parameters ie and re can
be obtained from input
characteristics curve.
Hybrid Parameter Variations
Hybrid Parameter Variations
Typical h Parameter Values for transistor at IE = 1.3 mA
Conversion Formulas
Some transistor manufacturers provide only CE configuration h-
parameters, where as other provides hfe, hib, hob and hrb.
In this case, to use transistor for various configurations,
conversion of the parameters is necessary.

Find hre in terms of Common base h parameters


Vce
hre is common emitter
h-parameter defined by

From h parameters
for CE Config.

From Model
of transistor.

Common Base hybrid model


Find hre in terms of Common base h parameters

Common Base hybrid model

If Ib=0, then Ic=-Ie and the current I in hob in CB hybrid Model is


I =(1+hfb ) I e
Since hob represents conductance,
I = hobVbc= =(1+hfb)Ie
Find hre in terms of Common base h parameters
Applying KVL in path EBCE
Approximate Conversion Formulas for three transistor
configurations
Analysis of Transistor Amplifier Circuit using h Parameters
Two Port Transistor Network with External Load and Signal Source Connected
to bias the transistor forms a Transistor Amplifier.

Transistor Replaced by its Small Signal Hybrid Model


Analysis of Transistor Amplifier Circuit using h Parameters

QUANTITIES OF INTEREST

1. Current Gain or Current Amplification, AI


2. Input Impedance Zi
3. Voltage Gain AV
4. Output Impedance Zo
Analysis of Transistor Amplifier Circuit using h Parameters
1. Current Gain or Current Amplification, AI
Ratio of Output to Input Currents,

From the Above Circuit,


Substitute V2 = -I2ZL in above equation
Analysis of Transistor Amplifier Circuit using h Parameters

2. Input Impedance Zi The Resistance Rs in Figure


represents signal – source
resistance. The Impedance we
see looking into the amplifier
input terminals (1, 1’) is the
amplifier input impedance Zi

From Figure,

Here Value of Current Gain is


Substituted and Load
Admittance is
YL = 1/ZL
Analysis of Transistor Amplifier Circuit using h Parameters

3. Voltage Gain AV
The Ratio of Output Voltage V2 to input voltage V1 gives the
voltage gain of the transistor, or

Place
Analysis of Transistor Amplifier Circuit using h Parameters

Voltage Gain AVS Taking into account the Resistance Rs of the Source

Overall Voltage Gain is

Fig. Shows the Thevenin’s Equivalent of the


Input or Source Circuit ,
As per the Thevenin’s Theorem, the Voltage
across the Load is Thevenin’s Voltage

Note that for Rs=0 , AVS=AV, so AV is the voltage gain for the ideal voltage source
( One with zero internal resistance) .
Analysis of Transistor Amplifier Circuit using h Parameters

Current Gain AIS Taking into account the Resistance Rs of the Source

Fig. Shows the Norton’s equivalent Circuit


for the Source. Where, a Norton’s Equivalent
Current Source Is and a Norton’s Equivalent
Resistance Rs are shown.

From Fig. we can obtain Hence

Note that if Rs=∞, then AIS=AI, so AI is the current gain for an ideal
current source (one with infinite resistance) .
Voltage and Current gains with Source resistance taken
into account are related by :
Analysis of Transistor Amplifier Circuit using h Parameters
4. Output Impedance Zo
Output Impedance Zo=1/Yo is obtained by setting,

From,

From Fig. with Vs=0


Output admittance is a function
of the source resistance.

If Source Impedance is Resistive,


Yo will be real.
Example: For a given Transistor as a CE Amplifier, and its
h-parameters given in table, with RL=10 K and Rs=1K find various
gains and input and output impedances.

It is convenient first to calculate, AI, then obtain Ri from AI, and AV


from both these quantities.
Example : Continued……
Thevenin’s and Norton’s Theorems and Corollaries

The Input Source of an amplifier may be represented either by a


series circuit, as Fig. (a) or by a parallel network circuit as in Fig.(b)
V = Open Circuit Voltage
Z = Impedance between 1 and 2
with all Independent voltage
sources open circuited and all
independent current sources
are short circuited

(a)

I = Short Circuit Current


Z = Impedance between 1 and 2

I = V/Z in parallel with Z

(b)
Thevenin’s and Norton’s Theorems and Corollaries

Corollaries:
For V= Open Circuit Voltage, I= Short Circuit Current ,
Z=Impedance and Y = Admittance :

Z = V/I I=V/Z=VY V=IZ=I/Y


First Relation states that Impedance between two nodes equals the
open circuit voltage divided by short circuit current. Simplest way to
find Output Impedance Zo.

The last relationship is the quickest way to calculate the voltage


between two points in a network. “Voltage Equals the Short-Circuit
Current divided by the admittance”
Emitter Follower
Common Collector or
Emitter Follower ( As its
Voltage gain is close to unity)
, So any Input Voltage
Change in Base Voltage,
appears in equal change
across the load at emitter.
Emitter Follows the Input
Signal.

As per the characteristics of Emitter Follower, Input Resistance Ri is very high and
output resistance Ro is very low is shown with the help of h parameters.
Comparison of Transistor Amplifier Configurations
Comparison of Transistor Amplifier Configurations
Comparison of Transistor Amplifier Configurations
Miller’s Theorem and its Dual
• Some of the configurations can be analyzed more simply by using miller’s
theorem.
• A circuit configuration with N distinct nodes 1, 2, 3,…, N.
• Node Voltages be V1, V2, V3, …, VN, Where VN=0.
• Nodes 1 and 2 Connected by Impedance Z’
• V2/V1 = K
• In Sinusoidal Analysis, it will be a complex number, or
• In Laplace transform, a function of transform variable s.
Miller’s Theorem and its Dual
• Current I1 drawn from Node-1 (N1) through Z’ can be obtained by disconnecting
terminal 1 from Z’ and bridging Impedance Z’/(1-K) from N1 to ground.

V2/V1 = K
Then Current I1 is
given by

With the Value of K known or found by independent means, and Z’ is given, a Network can
be replaced with its Miller Equivalent Network
Miller’s Theorem and its Dual

Example: For the Amplifier shown in Fig.1


calculate Ri, Ri’, AV, AVS and AI = - I2/I1

Miller’s Theorem is applied


to 200 K Resistor R’.
K or Here AV= Transistor
Voltage Gain from base to
collector for CE
Configuration, can be
assumed to be ,

Then, Z2 as per miller’s theorem

Effective Load resistance would be,


Example Continued…………..
Using h-parameters from table, following quantities can be found

Voltage gain assumption is thus verified.


Now, Z1 as per the miller’s theorem, here it is Ri .
Dual of Miller’s Theorem

• A Network with arbitrary active or passive linear elements between


nodes 1, 2 and 3 and with impedance Z’ between node 3 and ground
N.
• Two loops coupled by common element Z’.
• Now, Current Ratio is Given AI= - I2/I1
• Dual of Miller’s Theorem is shown with the common Impedance Z’ is
now placed in two loops Z1 in loop 1 and Z2 in loop 2.
Dual of Miller’s Theorem

• Here I1Z1=(I1+I2)Z’ gives,


Cascading Transistor Amplifier

• When Amplification of a single transistor is not


sufficient, or
• when input or output impedance is not of the
correct magnitude for the intended application,

Two or more stages may be connected in cascade.


Output of the First Stage Connected to Input of the
Next Stage.
Cascading Transistor Amplifier

As Collector Resistance of First Stage is Shunted with Input impedance of the


next stage, it is advantageous to start analysis from last stage.

Also first the current gain is computed as it is used to find other quantities.
Example: Continued….
Example: Continued….

Voltage Gain for Common Collector Second Stage,

Value justifies the CC Configuration


Example: Continued….
Example: Continued….
Example: Continued….
Example: Continued….
Choice of Transistor Configuration in Cascade

• Common Emitter (CE) Configuration is having Larger Voltage


Gain, So if further Amplification of Voltage Gain is required
then, CE Configurations should be used in intermediate
stages.

• Common Collector (CC) Configuration should be avoided in


intermediate stages, as it has a Unity Gain.

• Common Base or Common Collector Configuration are used


at input stage because for impedance considerations, even at
expense of voltage or current gain.

• Output Stage if required to drive a low impedance load,


Common Collector Configuration should be used.
Simplified Common Emitter Hybrid Model

• Approximate Hybrid Model for All three Configurations


shown in Fig.1
• Two of four parameters hie and hfe are sufficient for
approximate analysis of low frequency transistor circuits,
provided that load resistance is small enough to satisfy
Fig. 1
the condition of hoeRL<0.1.
• As shown in Fig. 2, Approximate Model of CE Signal is connected between input terminal
and ground, and the load is placed between output node and ground.
• For RL not larger than 0.1/hoe, error in AI, Ri, AV or Ro’ is less than 10 percent.

Fig. 2 Approximate CE Configuration


Quantities for Simplified Analysis – CE Configuration

1. Current Gain

For hoeRL < 0.1

2. Input Impedance
As
And Again if, hoeRL < 0.1

So, maximum error in Current


From the Table for the h parameters, gain will be 10 percent, and in
Input Resistance it will be 5
percent for approximate
analysis.
Quantities for Simplified Analysis – CE Configuration

3. Voltage Gain

Taking Logarithm of the Equation, and then differential, we get

From earlier discussion, For hoeRL < 0.1

So, maximum error in voltage gain will be 5 percent, for


approximate analysis.
Quantities for Simplified Analysis – CE Configuration
4. Output Impedance

The Circuit with Vs=0, gives Ib=0,


And thus Ic=0.

But Actual Value of O/P Impedance


depends on source resistance Rs.
Typically its value is 40 K.

For RL=4 K , If simplified model is


used, Output Resistance will be
equal to RL.
If Exact solution is used then it will
be 4 II 40 = 3.63 K.

So Approximate or Simplified
Analysis give more O/P Resistance,
but not more than 10 Percent.
Quantities for Simplified Analysis – CC Configuration
Fig. Shows Simplified CC Hybrid Model
with Collector Grounded and RL
Connected between Emitter and Ground.

1. Current Gain

From fig.

From Exact Analysis of CC or Emitter Follower,

It shows, for Common Collector Configuration, in Simplified


Analysis, Current Gain is overestimated by less than 10 percent
hoeRL < 0.1.
Quantities for Simplified Analysis – CC Configuration

2. Input Resistance

From fig.

For Ri>> hie≈ 1 K even if RL is as small as 0.5 K, as hfe >> 1.


For exact analysis,

Placing AI as obtained for simplified analysis, in this equation, we


get above equation of Ri .
It is also overestimated by less than 10 percent.
Quantities for Simplified Analysis – CC Configuration

3. Voltage Gain

Using the same argument, as used in CE, it can be concluded


for CC also AV will have very little error in Approximate
analysis.
Quantities for Simplified Analysis – CC Configuration

4. Output Impedance

From fig. the open circuit output


voltage is Vs and the short circuit
output current is,

Second term will be very large for


Rs=100K than first term, thus,
Exact Expression for output impedance approximate analysis will give
value 5 percent less for
admittance.

And
Summary of Simplified Analysis
Transistor at High Frequency
• High Frequency Analysis is necessary to examine diffusion
mechanism in more detail.

• High frequency Model of transistor takes into account the


material behavior at high frequency.

• Lumped Parameters are placed in the model, which are


attributing the circuit resistances and capacitances.

Transistor Internal Capacitance :


• Junction Capacitance
• Diffusion Capacitance
Transistor Internal Resistances
• Base Spreading Resistance
• Conductance due to Recombination.
Hybrid – π Model for CE Configuration

• Resistive Components of the model can be derived from the low


frequency h-parameters.

• All parameters in the model are assumed to be independent of


frequency. They may vary with the Q Point, but under given bias
condition are reasonably constant for small signal swings.
Hybrid – π Model for CE Configuration : Circuit Components

Change in effective base width causes


Ohmic Base Spreading Resistance emitter and thus collector current to
rbb’ is represented as lumped change because the slope of minority
parameter between External Base carrier distribution in the base changes.
This feedback effect is taken in to
and internal node B’ (Physically
account by connecting gb’c between
Inaccessible) internal base node and collector.

Increase in minority carriers in the Change in effective base width causes emitter and
base results in increased thus collector current to change because the slope of
recombination base current. This minority carrier distribution in the base changes. This
effect taken into account by feedback effect is taken in to account by connecting
inserting conductance gb’e gce between Collector and Emitter. (Early Effect)
Hybrid – π Model for CE Configuration : Circuit Components

Change in effective base width causes


emitter and thus collector current to
Collector Junction Barrier change because the slope of minority
Capacitance carrier distribution in the base changes.
This feedback effect is taken in to
account by connecting gb’e between
internal base node and Emitter.

Excess Minority Carriers Storage in


the base is accounted for by the
diffusion capacitance Ce connected
between B’ and E
Typical Hybrid-π Parameter Values at Ic=1.3 mA at room temperature
Hybrid-π Conductances Resistive components of Hybrid – π
Model can be obtained from
1. Transistor Transconductance gm h – Parameters of CE Configuration.

For PNP transistor in CE Configuration


with the collector shorted to the emitter
for time varying signals. (model)
Collector Current for active region is
given by

As short circuit current shown in model


is gmVb’e . The Transconductance gm is
defined by change in collector current
for change in base-emitter voltage.
With collector-emitter voltage constant
Hybrid-π Conductances 1. Transistor Transconductance gm

Here we have assumed αN=αO is independent of VE ( for PNP VE=-VB’E )


If the emitter diode resistance is re, then,

So,
The dynamic resistance of the forward biased diode.

Ƞ is taken as unity
in calculation of gm

Where,
As, VT=T/11600 gm is directly
proportional to current and inversely
So, proportional to temperature.

Similarly for NPN device also it will lead to gm as (at room temp.)
positive , since |IC| >> |ICO|, gm is
Hybrid-π Conductances

2. Input Conductance gb’e


For low frequencies hybrid-π model
will have all capacitances negligible as
shown in Fig. a. Fig. b. shows its
equivalent h-parameter model.
From component values, rb’c>>rb’e

From Fig. a. Current Ib takes low


resistance path and flows into rb’e
The short circuit collector current Ic
can be given by,
or

The Short Circuit Current Gain hfe is defined by,


or
Hybrid-π Conductances

3. Feedback Conductance gb’c

With Input Open Circuited, hre is


defined as the reverse voltage gain,
or from Fig. a with Ib=0,

Or,

Since hre<<1, we get,

Or,

As hre ≈ 10-4, rb’c>>rb’e is verified.


Hybrid-π Conductances

4. Base Spreading Resistance rbb’

The input resistance with the output


shorted is hie. Under these conditions,
rb’e ||rb’c≈ rb’e (As, rb’c>>rb’e)

It shows input impedance hie varies with current and


temperature.
Hybrid-π Conductances

5. Output Conductance gce

With input open circuited, the


output conductance is defined as, hoe
For Ib=0,

Place,
And , as rb’c>>rb’e

If, hfe>>1, then,


Hybrid-π Conductances

Summary
Hybrid-π Model for a CE Transistor shown
Hybrid-π Capacitances in Fig. has two capacitances.

1. Collector Junction Capacitance or Transition Capacitance Cc=Cb’c


It Is the measured CB output capacitance with the input open
circuited (IE=0) and is specified by manufacturers as Cob.
Since in the active region collector-base junction is reverse biased
then Cc is a transition capacitance and varies as VCB-n, where n is
1/2 or 1/3 for an abrupt or graded junction, respectively.
Hybrid-π Capacitances
2. Emitter Capacitance Ce

Capacitance Ce is the sum of emitter diffusion capacitance CDe and


the emitter junction capacitance Cte. For forward biased junction
CDe is much larger than CTe .
Hybrid-π Capacitances
CDe is proportional to the emitter bias current IE and is almost independent
of temperature.

• Fig. shows, injected hole concentration V/s


Distance in the base region of p-n-p transistor.
• Base width W is assumed small compared with
diffusion length LB of the Minority Carriers.
• Since Collector Junction is Reverse Biased,
injected charge concentration p’ at collector
junction is zero.
• If W<<LB, then p’ varies almost linearly, from
the value p’(0) at emitter to zero at collector.
• The stored base charge QB is the average
concentration p’(0)/2 times the volume of the
base WA ( A is Cross Section Area of Base) times
the electronic charge q.
Hybrid-π Capacitances

The Diffusion Current is,

Where, DB is Diffusion Constant for Base Minority Carriers.


dp’/dx is the rate of change of charge concentration in x direction, a line with
negative slope. Combining two Equations,

Emitter Diffusion Capacitance CDe is given by rate of change


of QB with respect to emitter voltage V, or
Hybrid-π Capacitances

Where, re is emitter junction internal resistance

It shows, Diffusion Capacitance is proportional to Emitter Bias Current IE

fT = Frequency at which Short Circuit Current


Gain of Common Emitter drops to unity.
The CE Short Circuit Current Gain
Hybrid-π Circuit for
CE Transistor with
Load RL

Here Load is in Collector Circuit, So Rc=RL, Also RL=0 ( Short Circuit).


• Current Source furnishes sinusoidal current
Ii and load current is IL.
• gb’c is neglected as for High Frequency Cc is
short.
• gb’c<<gb’e ( Reverse and forward junction)
• gce disappears as output is short.
• Current delivered directly to output
Approximate Equivalent Circuit.
through gb’c is neglected.
The CE Short Circuit Current Gain
Load Current, where,

Using the Summary of the parameters for CE Configuration, we get,

Where,
The CE Short Circuit Current Gain

At f = fβ Current gain is 0.707 of its low frequency value hfe


Frequency range up to f = fβ is called Bandwidth of the Circuit.

Ai at ω=0 is -hfe a
low frequency short
circuit current gain.
The CE Short Circuit Current Gain
Frequency at which Short Circuit Current Gain of Common
The Parameter fT Emitter drops to unity.
As, hfe>>1, from Equation of Current Gain Ai and fβ, fT is given by,

As Ce>> Cc

Placing value of fβ in the Equation of current gain

fT is an important parameter, and


its value depends on the operating
conditions of the device.

fT dependence on Collector current


is shown here.
The CE Short Circuit Current Gain

The Parameter fT
fT represents short circuit low frequency Current Gain-Bandwidth Product. Bandwidth is
defined as fβ, which is also called upper 3-dB frequency.

For Two transistor with equal value of fT, the transistor with lower hfe will have larger
value of bandwidth.

• Ai = 0 dB at f=fT
• Ai = -hfe For f<<fβ
• for f>>fβ
|Ai |≈ hfe fB/f=fT/f,
So Ai (dB) =20 log fT-20 log f
The Current Gain with Resistive Load
For finite value of RL, the parallel combination of gb’c and Cc , using Miller’s
Theorem, is replaced as shown in fig.
• Identify Vb’e as V1 and Vce as V2 – Equivalent to Hybrid
Network Voltages.
• Then, V2/V1=Vce/Vb’e=K.
• K is used as the gain for Miller Equivalent Ckt.
• Ckt. Has two Time Constants – One in Input Ckt. & One in
Output Ckt.
The Current Gain with Resistive Load
• In Practical Situation, Output Time Constant is negligible therefore;
 Delete output capacitance Cc(K-1)/K.
 As K=Vce/Vb’e, and for CE , |K|>>0, so, gb’c(K-1)/K ≈ gb’c
 As gb’c<<gce, omit gb’c.
 gce can be neglected compared to 1/RL
 From output circuit Vce/Vb’e=-gm.Vb’e.RL/Vb’e = - gm.RL=K
 Place K= -gm.RL in Cc.
 For, gm=50mA/V, and RL=2000 ohms, K=-100. so gb’c(1-K)≈0.025 mA/V
 As gb’e=1 mA/V, gb’c(1-K) can be neglected.
 Reduced ckt. is shown in Fig.b.
The Current Gain with Resistive Load

• RL is restricted to 2000 Ohms, as for RL much above 2000 Ohms,


Capacitance Cc(1+gmRL) becomes very large, and thus Band Pass
correspondingly Small.
• Again, reconsider the neglected Cc(K-1)/K ≈ Cc.
• For RL=2000 ohms , The Output Time Constant is,

• So, Bandpass of the amplifier will be determined by input ckt. Time constant.
Whereas Cc will not have much impact on output ckt. for a range of frequency.
• Output Capacitance Cc will have impact only for highly capacitive load.
Comparison with Short Circuit CE Configuration

CE with Short Circuit O/P. CE with Load RL in O/P.

Load RL is included.
Cc is augmented with Cc.gm. RL

And,
Single Stage CE Transistor Amplifier Response

• Remove the Assumption of transistor driven by Ideal Current Source with


infinite internal resistance.
• Consider, Source Vs has Finite Internal Resistance Rs.
• In the Circuit of CE Short Circuit Current Gain, Rs is added in series with Vs
Source.
• Also, rce=1/gce and rb’c=1/gb’c are omitted as they are much greater than RL
Single Stage CE Transistor Amplifier Response
Vb’e
The Transfer Function:

• Ratio of Output Voltage Vo to


input Voltage Vs is the Transfer
function : Vo/Vs
• T.F. represented in Laplace
Transform variable s.
• Introduce Rs’= Rs + rbb’ = 1/Gs’
• Note Capacitor C in S-domain as sC
• Apply KCL at nodes B’ and C. we get ;

Solving these nodal equations


Single Stage CE Transistor Amplifier Response
The Transfer Function:

Equation can be written in the form,

• Transfer Function has one zero s0 = gm/Cc, and two


poles s1 and s2. Poles can be calculated by finding the
roots of the denominator of T.F.
• Also, the gain K1 from equation is,
Single Stage CE Transistor Amplifier Response
From the Numerical Values of the Network Elements, and with gm=50 mA/V, we find

Magnitude and
Phase response for
T.F. is as shown.
The Gain Bandwidth Product

Both these values


depends on value of Rs
and RL
For Rs is infinity, Voltage
gain is zero for all value
of RL

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