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POWER TECHNOLOGIES MEDIUM VOLTAGE PRODUCTS

Modbus® Protocol Implementation for the


ABB PCD/SCD

PCD Software Version 3.64


SCD Software Version 3.70

Part Number: 1VTB300016

May 19, 2008

ABB Inc.
Power Products Medium Voltage
655 Century Point
Lake Mary, Florida 32746-2137
Telephone: (407)-732-2000
Fax: (407)-732-2132
Technical Support: (800)-929-7947

ABB CONFIDENTIAL – NOT TO BE COPIED WITHOUT PERMISSION


PCD MODBUS® Protocol Implementation Details
ABB Inc.

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

ABB Power Technologies Medium Voltage Products Technical Report


Power Technologies Medium Voltage Products

Dept. Date Pages


PTMV May 19, 2008 184
Title: Modbus® Protocol Implementation for the ABB PCD/SCD

Author(s) Reviewed by Approved by


V. Gharpure Jay Vellore Harsh Karandikar
Summary

The purpose of this document is to describe the specific implementation of the Modbus Protocol on
the ABB Power Control Device (PCD) and the Switch Control Device (SCD) This document, in
conjunction with the Modicon Modbus Protocol Reference Guide (PI-MBUS-300), published by
Modicon, Inc., provides complete information on how to communicate with the PCD/SCD via the
Modbus Protocol.

Rev. Revision Date Author Reviewed Approved


1.0 Initial Release 4/6/98 D. Uy M. Egolf D. Hart
L. Park
1.1 PCD2000 Firmware V1.14 Support 8/24/98 M. Egolf D. Uy D. Hart
1.2 PCD2000 Firmware V1.15 Support 1/12/98 M. Egolf D. Uy D. Hart
1.3 PCD2000 Firmware V1.16 Support 4/19/99 M. Egolf D. Uy D. Hart
1.4 PCD2000 Firmware V1.20 Support 8/17/99 M. Egolf D. Uy D. Hart
1.5 PCD2000 Firmware V2.00 Support. Also support for the 4/20/2000 M. Egolf D. Uy D. Hart
SCD2000 V1.00 Firmware has been added.
1.6 PCD2000 Firmware V2.20 Support.(Loop control module 6/08/2001 V. Gharpure D. Uy K. Scherrer
functions) and MAV-3 Firmware V1.00 added.
1.7 PCD2000 Firmware v2.30 – v2.60 support. 11/25/2002 V. Gharpure J. Vellore K. Scherrer
1.8 PCD2000 Firmware v2.70 support. 07/17/2003 V. Gharpure J. Vellore V.R.V.
T. Fahey Ramanan
1.9 PCD Firmware v2.82 support 02/23/2004 V. Gharpure J. Vellore V.R.V.
T. Fahey Ramanan
1.10 PCD Firmware v2.90 support 06/30/2004 V. Gharpure J. Vellore V.R.V.
T. Fahey Ramanan
1.11 PCD Firmware v3.00 and SCD v1.00 support 08/31/2004 V. Gharpure J. Vellore V.R.V.
T. Fahey Ramanan
1.12 PCD Firmware v3.64 and SCD v3.70 support 05/19/2008 V. Gharpure J. Vellore Harsh
Karandikar

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

Revision History

REVISION SECTION DESCRIPTION


1.1 3.1.1 Added registers 00107 through 00114 (27A, 27B, 27C, LOAC, and associated seal-ins)
3.1.3 Added registers 00725 through 00732 (27A, 27B, 27C, LOAC, and associated seal-ins)
4.1.1 Replaced UDI designation with RBI (register 10040)
4.1.3 Added registers 10589 through 10590 (RBI)
5.1.8 Added 27A, 27B, 27C, LOAC to register long word at 40903
5.1.8 Added RBI to register long word at 40907
5.1.8 Added register 40929 (Front Panel Status)
5.2.1 Added definition to bits 2 and 3 of register 41158
5.2.1 Added 27A*, 27B*, 27C*, and LOAC* to the SET/RESET Mask table
5.2.1 Added registers 41209 through 41214 (Block/Unblock control points)
5.2.1 Added registers 41215 through 41220 (Alternate Settings Pulse On / Pulse Off control points)
5.3.2 Added table of Operation Record Indices (Note: 27A, 27B, 27V, ACF, ACR and all the ALTx Pulse On/Off
entries are new operations)
6.1 Added Logical Input Indices ALT1Pon, ALTPoff, ALT2Pon, and ALT2Poff
6.1 Added Logical Output Indices 27A, 27B, 27C, LOAC, and associated seal-ins
6.1.8.1 Added registers 61110 through 61116 (Time-Curve Adders for Primary settings)
6.1.8.1 Added registers 61117 through 61119 (Minimum Response for 46, 67P, & 67N)
6.1.8.1 Added registers 61120 through 61121 (50P-3 & 50N-3 Time Delay)
6.1.8.1 Modified registers 61095 through 61098 (Units changed from 0-60 cycles)
6.1.8.2 Added registers 61238 through 61244 (Time-Curve Adders for ALT1 settings)
6.1.8.2 Added registers 61245 through 61247 (Minimum Response for 46, 67P, & 67N)
6.1.8.2 Added registers 61248 through 61249 (50P-3 & 50N-3 Time Delay)
6.1.8.2 Modified registers 61223 through 61226 (Units changed from 0-60 cycles)
6.1.8.3 Added registers 61366 through 61372 (Time-Curve Adders for ALT2 settings)
6.1.8.3 Added registers 61373 through 61375 (Minimum Response for 46, 67P, & 67N)
6.1.8.3 Added registers 61376 through 61377 (50P-3 & 50N-3 Time Delay)
6.1.8.3 Modified registers 61351 through 61354 (Units changed from 0-60 cycles)
6.1.9 Added Bit 15 definition to register 61426 (Breaker Fail Mode)
1.2 3.1.1 Added registers 00115 and 00116 (TAGOPN and TAGCLS)
3.1.3 Added registers 00741 through 00744 (TAGOPN and TAGCLS)
4.1.1 Added registers 10041 through 10043 (OPNBLK, CLSBLK and TAGMSG)
4.1.3 Added registers 10591 through 10596 (OPNBLK, CLSBLK and TAGMSG)
5.1.2 Change definition of register 40144 from DSP version number to CT/PT calibrator version number
5.1.8 Added TAGOPN and TAGCLS to register long word at 40903
5.1.8 Added OPNBLK, CLSBLK and TAGMSG to register long word at 40907
5.2.1 Added registers 41221 through 41226 (Tag / Untag control points)
5.3.2 Added Operation Indices 238 through 243
5.3.10 Added Power Quality Records
5.3.11 Added Power Quality Statistics
5.3.12 Added Power Quality RMS Records
5.3.13 Added Power Quality Control & Status
5.3.14 Added Power Quality Informational Block
6.1.8 Added more definitions to the Configuration Long Word table (2 new Phase and Neutral tap ranges). Also
updated the Tap Range tables to reflect changes in the SEF pickup settings mechanism.
6.1.9 Added register 61445 (Close Delay Time)
6.1.20 Added some PQ trigger definitions to register 63211
6.1.27 Added Power Quality Settings

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REVISION SECTION DESCRIPTION


1.3 3.1.1 Added registers 00117 through 00124 (59A, 59B, 59C, 59-3P, 59A*, 59B*, 59C*, and 59-3P*)
3.1.2 Added registers 00745 through 00760 (Status and Momentary versions of 3.1.1 above)
4.1.1 Redefined registers 10040 through 10043 and added 10044 through 10046 (error correction)
4.1.3 Redefined registers 10591 through 10596 and added 10597 through 10604 (error correction)
5.1.8 Added 27C*, LOAC*, TAGOPN, TAGCLS, 59A, 59B, 59C, 59-3P, 59A, 59B, 59C, and 59-3P to register long
word at 40903
5.1.8 Added ALT1Pon, ALT1Poff, ALT2Pon, ALT2Poff, OPNBLK, CLSBLK, and TAGMSG to register long word
at 40907
5.2.1 Added items for bits 16 through 19 for registers 41196, 41197, 41200, and 41201
5.2.1 Correction: registers 41209 through 41226 were off by one count (changed to 41210 through 41227)
5.3.2 Added alarm indices 108 through 111, 210 through 213, and 222 through 227
6.1 Added Logical Input Index after BFI (at index 38), shifted the other up one position
6.1 Added Logical Input Indices OPNBLK, CLSBLK, and TAGMSG
6.1 Added Logical Output Indices TAGOPN, TAGCLS, 59A, 59B, 59C, 59-3P, and associated seal-ins
6.1.9 Curve Family (reg. 61424) was moved to 61444. Other moved up accordingly.
6.1.8.1 Change range for registers 61110 to 61116 form 0.00 - 0.40 to 0.00 – 2.00
6.1.8.2 Change range for registers 61238 to 61244 form 0.00 - 0.40 to 0.00 – 2.00
6.1.8.3 Change range for registers 61366 to 61372 form 0.00 - 0.40 to 0.00 – 2.00
1.4 3.1.1 Added registers 00125 and 00126 (PTA and NTA)
3.1.3 Added registers 00761 through 00764 (Status and Momentary versions of 3.1.1 above)
5.1.8 Added long word register at 40931 (Target Alarms).
5.2 (Page 35) Changed register number from 41409 to 41153 -- Security mask register, paragraph 3.
5.3.1 Modified Lockout value fields on register 41411.
5.3.1 Added table of Fault Type indices to document register 41410.
6.1 Added PTA and NTA to table of Logical Output indices.
1.5 3.1.1 Added logical output points 127 through 193.
3.1.3 Added logical output points 765 through 898.
4.1.1 Added logical input points 10047 through 10082.
4.1.3 Added logical input points 10605 through 10676.
5.1.2 Modified register definition (40169).
5.1.7 Added counter registers 40782 to 40811.
5.1.8 Added Registers 40933 through 40950.
5.1.8 Added bit definitions in register pairs 40903-904 and 40907-908.
5.2.1 Added Per Phase Trip / Close Control (Registers 41228-41233).
5.2.1 Added Switch Open / Close Control (Registers 41234-41239),
5.2.1 Added Source Transfer / Restoration Control (Registers 41240-41245).
5.2.1 Added more Set / Reset Control Registers (Registers 41246-41257).
5.3.1 Modified register 41410: Removed redundant Fault Type table and added "Fault Detected" element type.
5.3.2 Added numerous operation indices. Also added table of value codes for per phase and switch operations.
5.3.3 Added oscillographic Trigger Source bits definitions (register 41673).
5.3.6 Reversed bits 0 and 1 of register 42051 (was incorrectly documented).
6.1 Added logical input indices (46 through 81).
6.1 Added logical output indices (126 through 188).
6.1.8 Added Ext. Inverse and Very Inverse curve indices to ANSI Curve Type III catagory.
6.1.8 Updated configuration table.
6.1.8.1 Block is no longer supported (see sections 6.1.28 and 6.1.29).
6.1.8.2 Block is no longer supported (see sections 6.1.28 and 6.1.29).
6.1.8.3 Block is no longer supported (see sections 6.1.28 and 6.1.29).
6.1.9 Added register 61446 (Recloser Mode).
6.1.10 Added Counter registers 61556 through 61581.
6.1.11 Added Alarm registers 61683 through 61687.
6.1.20 Added oscillographic Trigger Source bits definitions (register 63211).
6.1.24 Added note concerning obsolescence of the block at version V2.00.
6.1.25 Added note concerning obsolescence of the block at version V2.00.
6.1.28 Added Protection Settings.
6.1.29 Added Recloser Settings (PCD2000 only).
6.1.30 Added Fault Indicator / Sectionalizer / Source Transfer Settings (SCD2000 only).
7.1 Added new IO mapping table for Single Phase PCD2000 support.

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REVISION SECTION DESCRIPTION


1.6 3.1.1 Added LCM Trip logical output points 194 – 195
3.1.3 Added LCM Trip logical output points 899 – 902
5.1.3 Added LCM voltage metering values 40342 – 40359
5.1.8 Added LCM Trip logical outputs 40939 bits 29 – 30
5.1.8 Added LCM Status output 40951 – 40952
5.2.1 Added LCM control inputs 41153 bit 12 and 41258 – 41263
5.3.2 Added LCM Trip / Close operation record points 244 – 245
6.1.9 Added Switch control points 61447 - 61451
6.1.10 Added / modified Fault indication / switch operation counters 61577 - 61585
6.1.11 Added MAV option to points 61683 – 61687
6.1.31 Removed unused “Programmable Alarm Names” block 64864 – 65030
6.1.31 Added LCM settings block 64864 – 64885
1.7 3.1.1 Added LCM Close output logicals (single bit data) 196 – 197
Added TAGBTN output logical (single bit data) for Hot tag button status 198 (Catalog numbers XR3X-XXXX-
XX-XXXX)
Added LCM Midpoint operation output logical (single bit data) 199 - 200
3.1.3 Added LCM Close output logicals (two bit data) 903 – 906
Added TAGBTN output logical (two bit data) for Hot tag button status 907 - 908 (Catalog numbers XR3X-
XXXX-XX-XXXX)
Added LCM Midpoint operation output logicals (two bit data) 909 – 912
5.1.2 Changed scaling factor for register 40146
5.1.7 Corrected register definitions 40808 - 40815
Added Sectionalizer step count register 40819
5.1.8 Added LCM close, Tag button status and LCM midpoint operation outputs to register 40939 (bits 24 – 28)
5.3.2 Added Front Panel Tag enabled/disabled operation record indices 214 – 215 (Catalog numbers XR3X-XXXX-
XX-XXXX)
Added LCM Midpoint / Reboot / FIFO operation record points 246 – 249
6.1.8 Added new recloser curves type V and VI (tables 6.1.8.3.1 and 6.1.8.3.2). Types I – IV curves are now obsolete.
Corrected catalog number errors in table 6.1.8.4 Tap Settings.
67P high tap range entry corrected in first table of table 6.1.8.4 Tap Settings.
6.1.8.1 Corrected definitions for options 5/6 for SEF model register 61075
6.1.8.2 Corrected definitions for options 5/6 for SEF model register 61203
6.1.8.3 Corrected definitions for options 5/6 for SEF model register 61331
6.1.9 Corrected definition of register 61425, bit 8.
Bit15, Original State not available to users.
Added zero sequence (SEF) CT ratio register to document (61429)
6.1.28 Added note to describe group selection (Primary, Alt1 and Alt2).
Replaced recloser types in registers 64487, 64492, 64505, 64510, 64515, 64531, 64538
6.1.29 Added registers 64645 – 64646 for 79C functions.
6.1.31 Changed lower limits for registers 64882 - 64884
Added register 64886
6.1.32 Added registers 64992 – 65048, DNP Binary Inputs Assignable Class Settings (PCD Rev. 2.40 and above)
6.1.33 Added registers 65120 – 65161, DNP Analog Inputs Assignable Class Settings (PCD Rev. 2.40 and above)
6.1.34 Added registers 65248 – 65356, DNP Binary Inputs Assignable Point Index Settings
6.1.35 Added registers 65376 – 65454, DNP Analog Inputs Assignable Point Index Settings
1.8 3.1.1 Added logical outputs 201 – 209
3.1.3 Added logical outputs (two bit data) 913 – 930
4.1 Correction in description for registers 10015, 10016
5.1.2 Added register (40190) for UPS firmware, and a comment for catalog number (register 40133 – 40142)
5.1.3 Added registers 40360 – 40362, correction in description for register 40340
5.1.8 Added logical outputs bits 15 – 23, register 40939
5.3.2 Added operations log #122, 195-198, 250, 251. Correction in description for log # 39, 248, 249
6.1 Added / updated several logical outputs (189 – 208). Most (189 – 199) should have been updated during
previous version releases.
6.1.7 Added range, step and scaling factors (already implemented) to the document
6.1.8.4 Tap settings table errors fixed
6.1.9 Added register # 61452
6.1.16 Added registers (62468 – 62470). Added ranges for all registers.
6.1.31 Condition added for register 64885 (register not used for Tie point operation any more)

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PCD MODBUS® Protocol Implementation Details
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REVISION SECTION DESCRIPTION


1.9 5.3.1 Fault records registers # 41443 onwards, definitions corrected to match firmware
5.3.2 Operations records (#252 – 255) added.
6.1.9 Note added for register 61429
1.10 4.1.1 Logical inputs RST_TA and RST_SA added
4.1.3 Logical inputs RST_TA and RST_SA added
5.1.8 Logical inputs RST_TA and RST_SA added
5.2.1 “Note 1” added to long word descriptions for registers 41190 - 41201
5.3.2 Operations records (#256 – 259) added for LCM S1/S2 ON/OFF
5.3.7 Load profile data header attribute list updated. Note for attribute definition exceptions / table added.
6.1 Logical inputs RST_TA and RST_SA added
6.1.8.4 New catalog numbers added for Voltage divider sensor option
6.1.9 Voltage ratio upper limit changed to 32000
New settings added (register # 61453 – 61456).
6.1.16 IEC protocol added to register 62440
Setting range changed for registers 62441, 42, 49, 50, 57, 59, 60, 64
1.11 3.1.1 Settings banks 1,2 added (210-211)
3.1.3 Settings banks 1,2 added (931–934)
5.1.2 Settings banks 1,2 added (Register 40129, bits 11-12)
Communications error #15 added to register 40175
New registers added (40191, 40192)
5.1.8 Settings banks 1,2 added (Register 40929-30, bits 14,15; Register 40939-40, bits 13-14)
5.2.1 Settings banks 1,2 added (Register 41220, bits 4-5)
5.3.2 New operations records added (375–386)
5.3.2 New editor access codes description added
6.1 Settings banks 1,2 added (209-210)
6.1.9 New registers added to config settings (61457-61459)
6.1.8.3.1 IEC curves added to recloser curve group
6.1.8.3.2 IEC curves added to recloser curve group
6.1.28 Settings bank2 added to protection groups, one typo corrected
6.1.31 New LCM setting added (Register 64887)
6.1.32 New registers added (65049-50), 65048 modified
6.1.34 New registers added (65357-9), 65356 modified
1.12 MAV reference removed from title, company address changed to Lake Mary, Florida.
5.1.3 Comment added for metering values’ dependence on protection setting (RMS / Fundamental)
5.2.1 Added one shot disable/enable, sectionalizer block/unblock functions, SCD only (41214)
5.3.1 Added SCD fault type (41411)
5.3.2 New operations records added (387 – 399).
6.1.9 Added new functions (2, 3) to prog 2 button (61458)
Added prog1 button function selection (61460)
6.1.30 Corrected permitted range values (64736 and 64750)
New setting added for volt drop percent (64762)

The following are trademarks of AEG Schneider Automation, Inc.: Modicon® and Modbus®

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Table of Contents
1 INTRODUCTION........................................................................................................................................ 11

2 CONFIGURATION ...................................................................................................................................... 13
2.1 END-USER CONFIGURATION ................................................................................................................... 13
3 0X REGISTERS........................................................................................................................................... 15
3.1 FUNCTION CODE 1 (READ COIL STATUS) ............................................................................................... 15
3.1.1 Logical Output Block (Single Bit Data) ............................................................................................ 17
3.1.2 Physical Output Block (Single Bit Data)........................................................................................... 22
3.1.3 Logical Output Block (Two Bit Data with Momentary Change Detection) ...................................... 23
3.1.4 Physical Output Block (Two Bit Data with Momentary Change Detection) .................................... 32
4 1X REGISTERS........................................................................................................................................... 35
4.1 FUNCTION CODE 2 (READ INPUT STATUS)................................................................................................ 35
4.1.1 Logical Input Block (Single Bit Data) .............................................................................................. 35
4.1.2 Physical Input Block (Single Bit Data)............................................................................................. 37
4.1.3 Logical Input Block (Two Bit Data with Momentary Change Detection) ........................................ 38
4.1.4 Physical Input Block (Two Bit Data with Momentary Change Detection)....................................... 42
5 4X REGISTERS........................................................................................................................................... 45
5.1 FUNCTION CODE 3 (READ HOLDING REGISTER) .................................................................................... 45
5.1.1 User Programmable Register Block (Defaults)................................................................................ 46
5.1.2 System Status/Configuration Block ................................................................................................... 48
5.1.3 RMS Load Current/Angular Values Block/Other Primary Analog Quantities.................................. 50
5.1.4 RMS Demand Current/Real and Reactive Power Values Block........................................................ 52
5.1.5 RMS Peak Demand Current/Real, Reactive Power Values and Time Stamps Block ....................... 53
5.1.6 RMS Minimum Demand Current/Real, Reactive Power Values and Time Stamps Block ................. 55
5.1.7 Counters Block .................................................................................................................................. 57
5.1.8 Physical and Logical Input/Output State Block ................................................................................ 58
5.2 FUNCTION CODE 16 (PRESET MULTIPLE REGISTER) ............................................................................. 63
5.2.1 Control Mask Block (Read and Write) .............................................................................................. 64
5.3 FUNCTION CODE 23 (READ/WRITE 4X REGISTERS) .............................................................................. 71
5.3.1 Fault Record...................................................................................................................................... 71
5.3.2 Operation Record .............................................................................................................................. 73
5.3.3 Oscillographic Record Data Headers Block ..................................................................................... 81
5.3.4 Oscillographic Digital Records Block............................................................................................... 83
5.3.5 Oscillographic Analog Records Block .............................................................................................. 84
5.3.6 Oscillographic Control and Status Block.......................................................................................... 85
5.3.7 Load Profile Data Header................................................................................................................. 86
5.3.8 Load Profile Data Block.................................................................................................................... 87
5.3.9 Load Profile Control Block ............................................................................................................... 89
5.3.10 Power Quality Records...................................................................................................................... 90
5.3.11 Power Quality Statistics .................................................................................................................... 92
5.3.12 Power Quality RMS Records............................................................................................................. 93
5.3.13 Power Quality Control and Status Block .......................................................................................... 94
5.3.14 Power Quality Informational Block .................................................................................................. 95
6 6X REGISTERS........................................................................................................................................... 97

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6.1 FUNCTION CODE 20 (READ GENERAL REFERENCE) FUNCTION CODE 21 (WRITE GENERAL
REFERENCE).........................................................................................................................................................97
6.1.1 Programmable Input Select, Index, and Feedback Masks...............................................................107
6.1.2 Programmable Input Input Invert, AND/OR Select, & Output Invert Mask....................................109
6.1.3 Programmable User Defined Input Names .....................................................................................111
6.1.4 Programmable Output Select and Index..........................................................................................112
6.1.5 Programmable Output Input Invert, AND/OR Select, & Output Invert Mask .................................114
6.1.6 Programmable Output User Defined Strings ..................................................................................116
6.1.7 Programmable Output Delays.........................................................................................................117
6.1.8 Relay Settings...................................................................................................................................118
6.1.8.1. Primary Settings Group................................................................................................................122
6.1.8.2. Alternate 1 Settings Group ...........................................................................................................124
6.1.8.3. Alternate 2 Settings Group ...........................................................................................................126
6.1.9 Configuration Settings .....................................................................................................................128
6.1.10 Counter Settings...............................................................................................................................130
6.1.11 Alarm Settings..................................................................................................................................131
6.1.12 Real Time Clock...............................................................................................................................132
6.1.13 ULO Connection Settings and User Names.....................................................................................133
6.1.14 ULI User Names ..............................................................................................................................134
6.1.15 FLI User Names and Indices ...........................................................................................................135
6.1.16 Communications Settings.................................................................................................................137
6.1.17 Modbus Global Register Mapping Block.........................................................................................139
6.1.18 User Definable Register Configuration Block.................................................................................140
6.1.19 Miscellaneous Settings.....................................................................................................................145
6.1.20 Oscillographics Data Capture Settings ...........................................................................................146
6.1.21 Programmable Curve Parameters...................................................................................................147
6.1.22 Programmable Curve Data Settings................................................................................................148
6.1.23 Programmable Curve Pointer Table Settings..................................................................................150
6.1.24 Breaker Failure Unit Settings..........................................................................................................152
6.1.25 Master Trip Output Assignment.......................................................................................................153
6.1.26 Load Profile Attribute Assignment (Future) ....................................................................................154
6.1.27 Power Quality Settings......................................................................................................................155
6.1.28 Protection Settings (PCD2000 Revision V2.00 and above, also SCD where applicable).....................157
6.1.29 Recloser Settings (PCD Revision V2.00 and above)...........................................................................160
6.1.30 Fault Indicator / Sectionalizer Settings (SCD only.).........................................................................162
6.1.31 Loop Control Module Settings.........................................................................................................163
6.1.32 DNP Binary Inputs Assignable Class Settings (PCD Rev. 2.40 and above) ...................................164
6.1.33 DNP Analog Inputs Assignable Class Settings (PCD Rev. 2.40 and above)...................................168
6.1.34 DNP Binary Inputs Assignable Point Index Settings.......................................................................171
6.1.35 DNP Analog Inputs Assignable Point Index Settings ......................................................................178
7 CATALOG DEPENDENCIES..................................................................................................................183
7.1 I/O MAPPING WITH RESPECT TO DIFFERENT CATALOG TYPES ...........................................................183
7.1.1 SCD and PCD Catalogued for Three Phase Operation (xxxx-xxxx-xx-x0xx)..................................183
7.1.2 PCD Catalogued for Single Phase Operation (xxxx-xxxx-x1-x1xx) ................................................184

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

1 Introduction

The purpose of this document is to describe the specific implementation of the Modicon Modbus
protocol on the ABB Power Control Device (PCD) and the Switch Control Device (SCD). This
document, in conjunction with the Modicon Modbus Protocol Reference Guide (PI-MBUS-300),
published by Modicon, Inc., provides complete information on how to communicate with the
PCD/SCD via the Modbus Protocol.

Historically, the PCD/SCD product family is a descendent of the ABB DPU-2000R. The PCD
software is based on the DPU-2000R software version 1.81 and includes the basic point set of the
DPU up to that point. In the field, this means that replacing a DPU-2000R with a PCD should require
minimal configuration changes or application changes to the master computer.

The SCD is based on the same platform and firmware application as the PCD with enhancements
supporting load break switch control. Most of the registers are common between the PCD and SCD
and, where different, are appropriately designated.

The PCD supports serial Modbus ASCII and Modbus RTU. The front panel optical port always
communicates in Modbus ASCII mode. The rear panel RS232, RS485 or fiber optic ports can be
switched to either Modbus mode or DNP 3.0 (through a catalog option) through the front panel or
through configuration software.

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2 Configuration
2.1 End-User Configuration
Through the front panel interface of the PCD, various operating parameters may be changed by the
end-user. The parameters that directly or indirectly configure the operation of the Modbus driver are
listed in the table below and described in subsequent sections. The parameters are stored in non-
volatile memory and are therefore preserved even when the PCD is powered-down. The front panel
of the PCD has a UNICOM II™ port and is always communicating in the Modbus ASCII protocol.

Label Description Range Units Default


Unit Address network address 0-FFF (hex) address 1
FP Baud serial baud rate 300, 1200, baud 9600
2400, 4800,
9600
FP Frame parity, data bits, stop bits N,8,1 N,8,2 parity,bits, bits N,8,1
RP Baud serial baud rate 300, 1200, 2400, baud 9600
4800, 9600,
19200
RB Frame parity, data bits, stop bits N, 8, 1 E, 8, 1 parity,bits, N, 8, 1
O, 8, 1 bits
N, 8, 2, E, 7, 1
O, 7, 1
N, 7, 2.
RP Protocol protocol selection ASCII (Modbus) RTU
RTU (Modbus)
DNP3.0*
Table 1: Front Panel End-User Configuration Options

*DNP 3.0 is available as a catalog option on the PCD

Unit Address – This parameter specifies the “network” address of the PCD with respect to all other
devices communicating on the same physical network as the PCD. The value is specified in
hexadecimal on the front panel, and may range from between 0 and hex FFF, inclusive. Changing
this value will cause a “warm” restart of the DNP 3.0 communication process.
RP Baud – The serial baud rate for DNP communications. It can be set to one of: 300, 1200, 2400,
4800, 9600, or 19200. Changing this value will cause a “warm” restart of the DNP 3.0 communication
process.

RP Frame – The description of the parity, number of data bits, and number of stop bits. The possible
values are “N, 8, 1,” “E, 8, 1,” “O, 8, 1.” “N, 8, 2,” “E, 7, 1,” “O, 7, 1,” and “N, 7, 2.” Typically, most
DNP 3.0 devices use “N, 8, 1” - no parity, 8 data bits, and 1 stop bit. Changing this value will cause a
“warm” restart of the DNP 3.0 communication process.

RP Protocol – This parameter specifies the communication protocol selection for Rear Port 1. It has
three possible values: ASCII (for ASCII mode Modbus), RTU (for RTU mode Modbus), and DNP 3.0.

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

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PCD MODBUS® Protocol Implementation Details
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3 0x Registers

3.1 FUNCTION CODE 1 (READ COIL STATUS)

The output and input data blocks are split into two data types single bit data and two bit data. The
single bit data allows the master to poll the present state of an input or output. The two bit data type
assigns two bits of data for each input or output. The first bit is the present state of the input or output
and the second bit is a momentary change status bit. The momentary change status bit contains
information in that the input or output transitioned between two state from the last time that data was
polled. This allows the master to detect if it missed any change in state of the input or output
between polling sequences.
Single bit data is packed in consecutive order from the start register and one bit per I/O contains the
present state.

The following example is for a master poll of Register 00009 collecting 16 Coils. The slave device’s
logic is such that the 50N2 and 67P are the only outputs that are turned on. The following 16 bit
register response will be generated from the slave PCD.

high byte 16 15 14 13 12 11 10 9 low 24 23 22 21 20 19 18 17


Coil byte
bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
position
Binary 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0
data

Now if the read coil status used the two bit register, the master would poll for Register 00529
collecting 32 Coils. If the slave device’s logic is such that the 50N2 and 67P are the only outputs that
are turned on and since the last poll, the state of the 67P transitioned from On to Off back to On
again. The following two 16 bit register response will be generated.

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

First register
High byte Coil 536 535 534 533 532 531 530 529

Bit position 7 6 5 4 3 2 1 0

Binary data 0 0 0 0 0 0 0 1

Low byte Coil 544 543 542 541 540 539 538 537

Bit position 7 6 5 4 3 2 1 0

Binary data 0 0 1 1 0 0 0 0

Second register
High byte Coil 552 551 550 549 548 547 546 545

Bit position 7 6 5 4 3 2 1 0

Binary data 0 0 0 0 0 0 0 0

Low byte Coil 560 559 558 557 556 555 554 553

Bit position 7 6 5 4 3 2 1 0

Binary data 0 0 1 1 0 0 0 0

In the example above, bit positions 5 and 4 in the low byte of the first register are both set. Bit
position 4 indicates the present state of the 67P output, a one indicates it is on. Bit position 5 is the
momentary change detect for 67P, it is also set indicating that the output transitioned through multiple
changes since the last polling sequence of that register. Once a coil is read using the two bit data
register method the momentary change bit is cleared within the slave device. Furthermore, the
momentary bit cannot be read without its respective logical bit being read at the same time and vice-
versa.

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

3.1.1 Logical Output Block (Single Bit Data)


(Note: * means Sealed In output)

REGISTER NMEMONIC DESCRIPTION PRODUCT


00001 TRIP Main Trip Output PCD
00002 CLOSE Main Close Output PCD
00003 ALARM Self Test Alarm Output PCD
00004 27 Undervoltage Alarm (any phase) ALL
00005 46 Negative Sequence Overcurrent Alarm ALL
00006 50P1 50P-1 Trip Alarm PCD
00007 50N1 50N-1 Trip Alarm PCD
00008 50P2 50P-2 Trip Alarm PCD
00009 50N2 50N-2 Trip Alarm PCD
00010 50P3 50P-3 Trip Alarm PCD
00011 50N3 50N-3 Trip Alarm PCD
00012 51P 51P Trip Alarm PCD
00013 51N 51N Trip Alarm PCD
00014 59 Overvoltage Alarm (any phase) ALL
00015 67P 67P Trip Alarm PCD
00016 67N 67N Trip Alarm PCD
00017 81S-1 First Step Underfrequency Shed Alarm ALL
00018 81R-1 First Step Underfrequency Restore Alarm ALL
00019 PATA Phase A Target Alarm ALL
00020 PBTA Phase B Target Alarm ALL
00021 PCTA Phase C Target Alarm ALL
00022 TCFA Trip Circuit Failure Alarm ALL
00023 TCC Tap Change Cutout Contact PCD
00024 79DA Recloser Disabled Alarm PCD
00025 PUA Pickup Alarm ALL
00026 79LOA Lockout Alarm (Three phase mode) PCD
00027 BFA Breaker Fail Alarm (Three phase mode) PCD
00028 PDA Phase Demand Alarm ALL
00029 NDA Neutral Demand Alarm ALL
00030 BFUA Blown Fuse Alarm PCD
00031 KSI KSI Summation Alarm ALL
00032 79CA1 Reclose Counter 1 Alarm PCD
00033 HPFA High Power Factor Alarm ALL
00034 LPFA Low Power Factor Alarm ALL
00035 OCTC Overcurrent Trip Counter Alarm ALL
00036 50-1D 50-1 Disable Alarm PCD
00037 50-2D 50-2 Disable Alarm PCD
00038 STC Settings Table Changed Alarm PCD
00039 ZSC Zone Sequence Coordination Enabled Alarm PCD
00040 PH3-D Phase Units Disabled Alarm PCD
00041 GRD-D Neutral Units Disabled Alarm PCD
00042 32PA 67P Zone Pickup Alarm PCD
00043 32NA 67N Zone Pickup Alarm PCD
00044 27-3P Undervoltage Alarm (Any phase) ALL
00045 VARDA VAR Demand Alarm ALL
00046 79CA2 Reclose Counter 1 Alarm PCD
00047 TRIPA Phase A Trip Output PCD
00048 TRIPB Phase B Trip Output PCD
00049 TRIPC Phase C Trip Output PCD
00050 27* Undervoltage Alarm (any phase) (Seal-in) ALL

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION PRODUCT


00051 46* 46 Trip Alarm (Seal-in) ALL
00052 50P1* 50P-1 Trip Alarm (Seal-in) PCD
00053 50N1* 50N-1 Trip Alarm (Seal-in) PCD
00054 50P2* 50P-2 Trip Alarm (Seal-in) PCD
00055 50N2* 50N-2 Trip Alarm (Seal-in) PCD
00056 50P3* 50P-3 Trip Alarm (Seal-in) PCD
00057 50N3* 50N-3 Trip Alarm (Seal-in) PCD
00058 51P* 51P Trip Alarm (Seal-in) PCD
00059 51N* 51N Trip Alarm (Seal-in) PCD
00060 59* Overvoltage Alarm (any phase) (Seal-in) ALL
00061 67P* 67P Trip Alarm (Seal-in) PCD
00062 67N* 67N Trip Alarm (Seal-in) PCD
00063 81S-1* First Step Underfreq. Shed Alarm (Seal-in) ALL
00064 81R-1* First Step Overfreq. Restore Alarm (Seal-in) ALL
00065 81O-1* First Step Overfrequency Alarm (Seal-in) ALL
00066 27-3P* Undervoltage Alarm (Any phase) (Seal-in) ALL
00067 TRIPA* Phase A Trip Output (Seal-in) PCD
00068 TRIPB* Phase B Trip Output (Seal-in) PCD
00069 TRIPC* Phase C Trip Output (Seal-in) PCD
00070 ULO1 User Logical Output 1 ALL
00071 ULO2 User Logical Output 2 ALL
00072 ULO3 User Logical Output 3 ALL
00073 ULO4 User Logical Output 4 ALL
00074 ULO5 User Logical Output 5 ALL
00075 ULO6 User Logical Output 6 ALL
00076 ULO7 User Logical Output 7 ALL
00077 ULO8 User Logical Output 8 ALL
00078 ULO9 User Logical Output 9 ALL
00079 PVARA Positive VAR Alarm ALL
00080 NVARA Negative VAR Alarm ALL
00081 LOADA Load Current Alarm ALL
00082 81O-1 First Step Overfrequency Alarm ALL
00083 81O-2 Second Step Overfrequency Alarm ALL
00084 81S-2 Second Step Underfrequency Shed Alarm ALL
00085 81R-2 Second Step Overfrequency Restore Alarm ALL
00086 81O-2* Second Step Underfrequency Shed Alarm (Seal-in) ALL
00087 81S-2* Second Step Underfrequency Shed Alarm (Seal-in) ALL
00088 81R-2* Second Step Overfrequency Restore Alarm (Seal-in) ALL
00089 CLTA Cold Load Timer Active Alarm PCD
00090 Watt1 Positive Watt Alarm 1 ALL
00091 Watt2 Positive Watt Alarm 2 ALL
00092 79CA1* Reclose Counter 1 Alarm (Seal-in) PCD
00093 79CA2* Reclose Counter 2 Alarm (Seal-in) PCD
00094 SEF* Sensitive Earth Fault Trip Output (Seal-in) PCD
00095 SEF Sensitive Earth Fault Trip Output PCD
00096 BZONE Bus Zone Pickup Alarm ALL
00097 BF Trip Breaker Failure Module: Trip Output PCD
00098 BF ReTrip Breaker Failure Module: Retrip Output PCD
00099 BF Trip* Breaker Failure Module: Trip Output (Seal-in) PCD
00100 BF ReTrip* Breaker Failure Module: Retrip Output (Seal-in) PCD
00101 32P Phase Directional Alarm PCD
00102 32N Neutral Directional Alarm PCD

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION PRODUCT


00103 32P* Phase Directional Alarm (Seal-in) PCD
00104 32N* Neutral Directional Alarm (Seal-in) PCD
00105 BFA* Breaker Fail Alarm (Three phase mode) (Seal-in) PCD
00106 RBA Remote Blocked Alarm ALL
00107 27A Phase A Undervoltage Alarm ALL
00108 27B Phase B Undervoltage Alarm ALL
00109 27C Phase C Undervoltage Alarm ALL
00110 LOAC Loss Of AC Alarm ALL
00111 27A* Phase A Undervoltage Alarm (Seal-in) ALL
00112 27B* Phase B Undervoltage Alarm (Seal-in) ALL
00113 27C* Phase C Undervoltage Alarm (Seal-in) ALL
00114 LOAC* Loss Of AC Alarm (Seal-in) ALL
00115 TAGOPN Tag Open Output ALL
00116 TAGCLS Tag Close Output ALL
00117 59A Phase A Overvoltage Alarm ALL
00118 59B Phase B Overvoltage Alarm ALL
00119 59C Phase C Overvoltage Alarm ALL
00120 59-3P Overvoltage Alarm (Three phase) ALL
00121 59A* Phase A Overvoltage Alarm (Seal-in) ALL
00122 59B* Phase B Overvoltage Alarm (Seal-in) ALL
00123 59C* Phase C Overvoltage Alarm (Seal-in) ALL
00124 59-3P* Overvoltage Alarm (Three phase) (Seal-in) ALL
00125 PTA Phase Target Alarm ALL
00126 NTA Neutral Target Alarm ALL
00127 CLOSEA Phase A Close (Single phase mode only) PCD
00128 CLOSEB Phase B Close (Single phase mode only) PCD
00129 CLOSEC Phase C Close (Single phase mode only) PCD
00130 FAILA Phase A Pole Failure (Single phase mode only) PCD
00131 FAILB Phase B Pole Failure (Single phase mode only) PCD
00132 FAILC Phase C Pole Failure (Single phase mode only) PCD
00133 50-1A Phase A 50P-1 Trip Alarm PCD
00134 50-1B Phase B 50P-1 Trip Alarm PCD
00135 50-1C Phase C 50P-1 Trip Alarm PCD
00136 50-1A* Phase A 50P-1 Trip Alarm (Seal-in) PCD
00137 50-1B* Phase B 50P-1 Trip Alarm (Seal-in) PCD
00138 50-1C* Phase C 50P-1 Trip Alarm (Seal-in) PCD
00139 50-2A Phase A 50P-2 Trip Alarm PCD
00140 50-2B Phase B 50P-2 Trip Alarm PCD
00141 50-2C Phase C 50P-2 Trip Alarm PCD
00142 50-2A* Phase A 50P-2 Trip Alarm (Seal-in) PCD
00143 50-2B* Phase B 50P-2 Trip Alarm (Seal-in) PCD
00144 50-2C* Phase C 50P-2 Trip Alarm (Seal-in) PCD
00145 50-3A Phase A 50P-3 Trip Alarm PCD
00146 50-3B Phase B 50P-3 Trip Alarm PCD
00147 50-3C Phase C 50P-3 Trip Alarm PCD
00148 50-3A* Phase A 50P-3 Trip Alarm (Seal-in) PCD
00149 50-3B* Phase B 50P-3 Trip Alarm (Seal-in) PCD
00150 50-3C* Phase C 50P-3 Trip Alarm (Seal-in) PCD
00151 51A Phase A 51P Trip Alarm PCD
00152 51B Phase B 51P Trip Alarm PCD
00153 51C Phase C 51P Trip Alarm PCD
00154 51A* Phase A 51P Trip Alarm (Seal-in) PCD

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION PRODUCT


00155 51B* Phase B 51P Trip Alarm (Seal-in) PCD
00156 51C* Phase C 51P Trip Alarm (Seal-in) PCD
00157 67A Phase A 67P Trip Alarm PCD
00158 67B Phase B 67P Trip Alarm PCD
00159 67C Phase C 67P Trip Alarm PCD
00160 67A* Phase A 67P Trip Alarm (Seal-in) PCD
00161 67B* Phase B 67P Trip Alarm (Seal-in) PCD
00162 67C* Phase C 67P Trip Alarm (Seal-in) PCD
00163 LOCKA Phase A Lockout (Single Phase Only) PCD
00164 LOCKB Phase B Lockout (Single Phase Only) PCD
00165 LOCKC Phase B Lockout (Single Phase Only) PCD
00166 SW1 Trip Switch 1 Open SCD
00167 SW1 Close Switch 1 Close SCD
00168 SW1 Fail Switch 1 Failure SCD
00169 SW2 Trip Switch 2 Open SCD
00170 SW2 Close Switch 2 Close SCD
00171 SW2 Fail Switch 2 Failure SCD
00172 SW3 Trip Switch 3 Open SCD
00173 SW3 Close Switch 3 Close SCD
00174 SW3 Fail Switch 3 Failure SCD
00175 SW4 Trip Switch 4 Open SCD
00176 SW4 Close Switch 4 Close SCD
00177 SW4 Fail Switch 4 Failure SCD
00178 FLTDET Fault detected SCD
00179 FLTDET* Fault Detected (seal-in) SCD
00180 SW1A Switch 1 Operations Alarm SCD
00181 SW2A Switch 2 Operations Alarm SCD
00182 SW3A Switch 3 Operations Alarm SCD
00183 SW4A Switch 4 Operations Alarm SCD
00184 SW1A* Switch 1 Operations Alarm (seal-in) SCD
00185 SW2A* Switch 2 Operations Alarm (seal-in) SCD
00186 SW3A* Switch 3 Operations Alarm (seal-in) SCD
00187 SW4A* Switch 4 Operations Alarm (seal-in) SCD
00188 SECALM Sectionalizer Blocked Alarm SCD
00189 OSALRM Sectionalizer One-Shot Enabled Alarm SCD
00190 PSXFER Pri to Sec Source Xfer in progress SCD
00191 SPXFER Sec to Pri Source Xfer in progress SCD
00192 PSXFER* Sealin for PSXFER SCD
00193 SPXFER* Sealin for SPXFER SCD
00194 LCMTRIP Trip due to LCM PCD
00195 LCMTRIP* Sealin for LCMTRIP PCD
00196 LCMCLOSE Close due to LCM PCD
00197 LCMCLOSE* Sealin for LCMCLOSE PCD
00198 TAGBTN Hot tag button status PCD
00199 LCMMIDPOINT LCM Midpoint operation PCD
00200 LCMMIDPOINT* Sealin for LCM Midpoint operation PCD
00201 ISD_TRIPA Trip phase A signal to ISD PCD
00202 ISD_TRIPB Trip phase B signal to ISD PCD
00203 ISD_TRIPC Trip phase C signal to ISD PCD
00204 ISD_TRIG Trigger signal to ISD PCD
00205 CPU_BATT_FAIL Replace CPU Battery PCD
00206 BATT_FAIL Battery failure PCD

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION PRODUCT


00207 PRIM_ACTIVE Primary protection settings group active PCD
00208 ALT1_ACTIVE Alt1 protection settings group active PCD
00209 ALT2_ACTIVE Alt2 protection settings group active PCD
00210 BANK_1 Bank1 settings active PCD
00211 BANK_2 Bank2 settings active PCD

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

3.1.2 Physical Output Block (Single Bit Data)

REGISTER NMEMONIC DESCRIPTION PRODUCT


00257 OUT32 Physical Output 32 ALL
00258 OUT31 Physical Output 31 ALL
00259 OUT30 Physical Output 30 ALL
00260 OUT29 Physical Output 29 ALL
00261 OUT28 Physical Output 28 ALL
00262 OUT27 Physical Output 27 ALL
00263 OUT26 Physical Output 26 ALL
00264 OUT25 Physical Output 25 ALL
00265 OUT24 Physical Output 24 ALL
00266 OUT23 Physical Output 23 ALL
00267 OUT22 Physical Output 22 ALL
00268 OUT21 Physical Output 21 ALL
00269 OUT20 Physical Output 20 ALL
00270 OUT19 Physical Output 19 ALL
00271 OUT18 Physical Output 18 ALL
00272 OUT17 Physical Output 17 ALL
00273 OUT16 Physical Output 16 ALL
00274 OUT15 Physical Output 15 ALL
00275 OUT14 Physical Output 14 ALL
00276 OUT13 Physical Output 13 ALL
00277 OUT12 Physical Output 12 ALL
00278 OUT11 Physical Output 11 ALL
00279 OUT10 Physical Output 10 ALL
00280 OUT9 Physical Output 9 ALL
00281 OUT8 Physical Output 8 ALL
00282 OUT7 Physical Output 7 ALL
00283 OUT6 Physical Output 6 ALL
00284 OUT5 Physical Output 5 ALL
00285 OUT4 Physical Output 4 ALL
00286 OUT3 Physical Output 3 ALL
00287 OUT2 Physical Output 2 ALL
00288 OUT1 Physical Output 1 ALL

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

3.1.3 Logical Output Block (Two Bit Data with Momentary Change Detection)
Note: The momentary bit cannot be read without its respective logical bit being read at the same time
and vice-versa.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00513 TRIP Main Trip Output Status PCD
00514 Momentary PCD
00515 CLOSE Main Close Output Status PCD
00516 Momentary PCD
00517 ALARM Self Test Alarm Output Status PCD
00518 Momentary PCD
00519 27 Undervoltage Alarm (any phase) Status ALL
00520 Momentary ALL
00521 46 Negative Sequence Overcurrent Alarm Status ALL
00522 Momentary ALL
00523 50P1 50P-1 Trip Alarm Status PCD
00524 Momentary PCD
00525 50N1 50N-1 Trip Alarm Status PCD
00526 Momentary PCD
00527 50P2 50P-2 Trip Alarm Status PCD
00528 Momentary PCD
00529 50N2 50N-2 Trip Alarm Status PCD
00530 Momentary PCD
00531 50P3 50P-3 Trip Alarm Status PCD
00532 Momentary PCD
00533 50N3 50N-3 Trip Alarm Status PCD
00534 Momentary PCD
00535 51P 51P Trip Alarm Status PCD
00536 Momentary PCD
00537 51N 51N Trip Alarm Status PCD
00538 Momentary PCD
00539 59 Overvoltage Alarm (any phase) Status PCD
00540 Momentary PCD
00541 67P 67P Trip Alarm Status PCD
00542 Momentary PCD
00543 67N 67N Trip Alarm Status PCD
00544 Momentary PCD
00545 81S-1 First Step Underfrequency Shed Alarm Status ALL
00546 Momentary ALL
00547 81R-1 First Step Underfrequency Restore Alarm Status ALL
00548 Momentary ALL
00549 PATA Phase A Target Alarm Status ALL
00550 Momentary ALL
00551 PBTA Phase B Target Alarm Status ALL
00552 Momentary ALL
00553 PCTA Phase C Target Alarm Status ALL
00554 Momentary ALL
00555 TCFA Trip Circuit Failure Alarm Status ALL
00556 Momentary ALL
00557 TCC Tap Change Cutout Contact Status PCD
00558 Momentary PCD
00559 79DA Recloser Disabled Alarm Status PCD
00560 Momentary PCD

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00561 PUA Pickup Alarm Status ALL
00562 Momentary ALL
00563 79LOA Lockout Alarm (Three phase mode) Status PCD
00564 Momentary PCD
00565 BFA Breaker Fail Alarm (Three phase mode) Status PCD
00566 Momentary PCD
00567 PDA Phase Demand Alarm Status ALL
00568 Momentary ALL
00569 NDA Neutral Demand Alarm Status ALL
00570 Momentary ALL
00571 BFUA Blown Fuse Alarm Status PCD
00572 Momentary PCD
00573 KSI KSI Summation Alarm Status ALL
00574 Momentary ALL
00575 79CA1 Reclose Counter 1 Alarm Status PCD
00576 Momentary PCD
00577 HPFA High Power Factor Alarm Status ALL
00578 Momentary ALL
00579 LPFA Low Power Factor Alarm Status ALL
00580 Momentary ALL
00581 OCTC Overcurrent Trip Counter Alarm Status ALL
00582 Momentary ALL
00583 50-1D 50-1 Disable Alarm Status PCD
00584 Momentary PCD
00585 50-2D 50-2 Disable Alarm Status PCD
00586 Momentary PCD
00587 STC Settings Table Changed Alarm Status PCD
00588 Momentary PCD
00589 ZSC Zone Sequence Coordination Enabled Alarm Status PCD
00590 Momentary PCD
00591 PH3-D Phase Units Disabled Alarm Status PCD
00592 Momentary PCD
00593 GRD-D Neutral Units Disabled Alarm Status PCD
00594 Momentary PCD
00595 32PA 67P Zone Pickup Alarm Status PCD
00596 Momentary PCD
00597 32NA 67N Zone Pickup Alarm Status PCD
00598 Momentary PCD
00599 27-3P Undervoltage Alarm (Any phase) Status ALL
00600 Momentary ALL
00601 VARDA VAR Demand Alarm Status ALL
00602 Momentary ALL
00603 79CA2 Reclose Counter 1 Alarm Status PCD
00604 Momentary PCD
00605 TRIPA Phase A Trip Output Status PCD
00606 Momentary PCD
00607 TRIPB Phase B Trip Output Status PCD
00608 Momentary PCD
00609 TRIPC Phase C Trip Output Status PCD
00610 Momentary PCD
00611 27* Undervoltage Alarm (any phase) (Seal-in) Status ALL
00612 Momentary ALL

24
PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00613 46* 46 Trip Alarm (Seal-in) Status ALL
00614 Momentary ALL
00615 50P1* 50P-1 Trip Alarm (Seal-in) Status PCD
00616 Momentary PCD
00617 50N1* 50N-1 Trip Alarm (Seal-in) Status PCD
00618 Momentary PCD
00619 50P2* 50P-2 Trip Alarm (Seal-in) Status PCD
00620 Momentary PCD
00621 50N2* 50N-2 Trip Alarm (Seal-in) Status PCD
00622 Momentary PCD
00623 50P3* 50P-3 Trip Alarm (Seal-in) Status PCD
00624 Momentary PCD
00625 50N3* 50N-3 Trip Alarm (Seal-in) Status PCD
00626 Momentary PCD
00627 51P* 51P Trip Alarm (Seal-in) Status PCD
00628 Momentary PCD
00629 51N* 51N Trip Alarm (Seal-in) Status PCD
00630 Momentary PCD
00631 59* Overvoltage Alarm (any phase) (Seal-in) Status ALL
00632 Momentary ALL
00633 67P* 67P Trip Alarm (Seal-in) Status PCD
00634 Momentary PCD
00635 67N* 67N Trip Alarm (Seal-in) Status PCD
00636 Momentary PCD
00637 81S-1* First Step Underfreq. Shed Alarm (Seal-in) Status ALL
00638 Momentary ALL
00639 81R-1* First Step Overfreq. Restore Alarm (Seal-in) Status ALL
00640 Momentary ALL
00641 81O-1* First Step Overfrequency Alarm (Seal-in) Status ALL
00642 Momentary ALL
00643 27-3P* Undervoltage Alarm (Any phase) (Seal-in) Status ALL
00644 Momentary ALL
00645 TRIPA* Phase A Trip Output (Seal-in) Status PCD
00646 Momentary PCD
00647 TRIPB* Phase B Trip Output (Seal-in) Status PCD
00648 Momentary PCD
00649 TRIPC* Phase C Trip Output (Seal-in) Status PCD
00650 Momentary PCD
00651 ULO1 User Logical Output 1 Status ALL
00652 Momentary ALL
00653 ULO2 User Logical Output 2 Status ALL
00654 Momentary ALL
00655 ULO3 User Logical Output 3 Status ALL
00656 Momentary ALL
00657 ULO4 User Logical Output 4 Status ALL
00658 Momentary ALL
00659 ULO5 User Logical Output 5 Status ALL
00660 Momentary ALL
00661 ULO6 User Logical Output 6 Status ALL
00662 Momentary ALL
00663 ULO7 User Logical Output 7 Status ALL
00664 Momentary ALL

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PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00665 ULO8 User Logical Output 8 Status ALL
00666 Momentary ALL
00667 ULO9 User Logical Output 9 Status ALL
00668 Momentary ALL
00669 PVARA Positive VAR Alarm Status ALL
00670 Momentary ALL
00671 NVARA Negative VAR Alarm Status ALL
00672 Momentary ALL
00673 LOADA Load Current Alarm Status ALL
00674 Momentary ALL
00675 81O-1 First Step Overfrequency Alarm Status ALL
00676 Momentary ALL
00677 81O-2 Second Step Overfrequency Alarm Status ALL
00678 Momentary ALL
00679 81S-2 Second Step Underfrequency Shed Alarm Status ALL
00680 Momentary ALL
00681 81R-2 Second Step Overfrequency Restore Alarm Status ALL
00682 Momentary ALL
00683 81O-2* Second Step Underfrequency Shed Alarm Status ALL
00684 (Seal-in) Momentary ALL
00685 81S-2* Second Step Underfrequency Shed Alarm Status ALL
00686 (Seal-in) Momentary ALL
00687 81R-2* Second Step Overfrequency Restore Alarm Status ALL
00688 (Seal-in) Momentary ALL
00689 CLTA Cold Load Timer Active Alarm Status PCD
00690 Momentary PCD
00691 Watt1 Positive Watt Alarm 1 Status ALL
00692 Momentary ALL
00693 Watt2 Positive Watt Alarm 2 Status ALL
00694 Momentary ALL
00695 79CA1* Reclose Counter 1 Alarm (Seal-in) Status PCD
00696 Momentary PCD
00697 79CA2* Reclose Counter 2 Alarm (Seal-in) Status PCD
00698 Momentary PCD
00699 SEF* Sensitive Earth Fault Trip Output (Seal-in) Status PCD
00700 Momentary PCD
00701 SEF Sensitive Earth Fault Trip Output Status PCD
00702 Momentary PCD
00703 BZONE Bus Zone Pickup Alarm Status ALL
00704 Momentary ALL
00705 BF Trip Breaker Failure Module: Trip Output Status PCD
00706 Momentary PCD
00707 BF ReTrip Breaker Failure Module: Retrip Output Status PCD
00708 Momentary PCD
00709 BF Trip* Breaker Failure Module: Trip Output (Seal-in) Status PCD
00710 Momentary PCD
00711 BF ReTrip* Breaker Failure Module: Retrip Output (Seal-in) Status PCD
00712 Momentary PCD
00713 32P Phase Directional Alarm Status PCD
00714 Momentary PCD
00715 32N Neutral Directional Alarm Status PCD
00716 Momentary PCD

26
PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00717 32P* Phase Directional Alarm (Seal-in) Status PCD
00718 Momentary PCD
00719 32N* Neutral Directional Alarm (Seal-in) Status PCD
00720 Momentary PCD
00721 BFA* Breaker Fail Alarm (Three phase mode) (Seal- Status PCD
00722 in) Momentary PCD
00723 RBA Remote Blocked Alarm Status ALL
00724 Momentary ALL
00725 27A Phase A Undervoltage Alarm Status ALL
00726 Momentary ALL
00727 27B Phase B Undervoltage Alarm Status ALL
00728 Momentary ALL
00729 27C Phase C Undervoltage Alarm Status ALL
00730 Momentary ALL
00731 LOAC Loss Of AC Alarm Status ALL
00732 Momentary ALL
00733 27A* Phase A Undervoltage Alarm (Seal-in) Status ALL
00734 Momentary ALL
00735 27B* Phase B Undervoltage Alarm (Seal-in) Status ALL
00736 Momentary ALL
00737 27C* Phase C Undervoltage Alarm (Seal-in) Status ALL
00738 Momentary ALL
00739 LOAC* Loss Of AC Alarm (Seal-in) Status ALL
00740 Momentary ALL
00741 TAGOPN Tag Open Output Status ALL
00742 Momentary ALL
00743 TAGCLS Tag Close Output Status ALL
00744 Momentary ALL
00745 59A Phase A Overvoltage Alarm Status ALL
00746 Momentary ALL
00747 59B Phase B Overvoltage Alarm Status ALL
00748 Momentary ALL
00749 59C Phase C Overvoltage Alarm Status ALL
00750 Momentary ALL
00751 59-3P Overvoltage Alarm (Three phase) Status ALL
00752 Momentary ALL
00753 59A* Phase A Overvoltage Alarm (Seal-in) Status ALL
00754 Momentary ALL
00755 59B* Phase B Overvoltage Alarm (Seal-in) Status ALL
00756 Momentary ALL
00757 59C* Phase C Overvoltage Alarm (Seal-in) Status ALL
00758 Momentary ALL
00759 59-3P* Overvoltage Alarm (Three phase) (Seal-in) Status ALL
00760 Momentary ALL
00761 PTA Phase Target Alarm Status ALL
00762 Momentary ALL
00763 NTA Neutral Target Alarm Status ALL
00764 Momentary ALL
00765 CLOSEA Phase A Close (Single phase mode only) Status PCD
00766 Momentary PCD
00767 CLOSEB Phase B Close (Single phase mode only) Status PCD
00768 Momentary PCD

27
PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00769 CLOSEC Phase C Close (Single phase mode only) Status PCD
00770 Momentary PCD
00771 FAILA Phase A Pole Failure (Single phase mode only) Status PCD
00772 Momentary PCD
00773 FAILB Phase B Pole Failure (Single phase mode only) Status PCD
00774 Momentary PCD
00775 FAILC Phase C Pole Failure (Single phase mode only) Status PCD
00776 Momentary PCD
00777 50-1A Phase A 50P-1 Trip Alarm Status PCD
00778 Momentary PCD
00779 50-1B Phase B 50P-1 Trip Alarm Status PCD
00780 Momentary PCD
00781 50-1C Phase C 50P-1 Trip Alarm Status PCD
00782 Momentary PCD
00783 50-1A* Phase A 50P-1 Trip Alarm (Seal-in) Status PCD
00784 Momentary PCD
00785 50-1B* Phase B 50P-1 Trip Alarm (Seal-in) Status PCD
00786 Momentary PCD
00787 50-1C* Phase C 50P-1 Trip Alarm (Seal-in) Status PCD
00788 Momentary PCD
00789 50-2A Phase A 50P-2 Trip Alarm Status PCD
00790 Momentary PCD
00791 50-2B Phase B 50P-2 Trip Alarm Status PCD
00792 Momentary PCD
00793 50-2C Phase C 50P-2 Trip Alarm Status PCD
00794 Momentary PCD
00795 50-2A* Phase A 50P-2 Trip Alarm (Seal-in) Status PCD
00796 Momentary PCD
00797 50-2B* Phase B 50P-2 Trip Alarm (Seal-in) Status PCD
00798 Momentary PCD
00799 50-2C* Phase C 50P-2 Trip Alarm (Seal-in) Status PCD
00800 Momentary PCD
00801 50-3A Phase A 50P-3 Trip Alarm Status PCD
00802 Momentary PCD
00803 50-3B Phase B 50P-3 Trip Alarm Status PCD
00804 Momentary PCD
00805 50-3C Phase C 50P-3 Trip Alarm Status PCD
00806 Momentary PCD
00807 50-3A* Phase A 50P-3 Trip Alarm (Seal-in) Status PCD
00808 Momentary PCD
00809 50-3B* Phase B 50P-3 Trip Alarm (Seal-in) Status PCD
00810 Momentary PCD
00811 50-3C* Phase C 50P-3 Trip Alarm (Seal-in) Status PCD
00812 Momentary PCD
00813 51A Phase A 51P Trip Alarm Status PCD
00814 Momentary PCD
00815 51B Phase B 51P Trip Alarm Status PCD
00816 Momentary PCD
00817 51C Phase C 51P Trip Alarm Status PCD
00818 Momentary PCD
00819 51A* Phase A 51P Trip Alarm (Seal-in) Status PCD
00820 Momentary PCD

28
PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00821 51B* Phase B 51P Trip Alarm (Seal-in) Status PCD
00822 Momentary PCD
00823 51C* Phase C 51P Trip Alarm (Seal-in) Status PCD
00824 Momentary PCD
00825 67A Phase A 67P Trip Alarm Status PCD
00826 Momentary PCD
00827 67B Phase B 67P Trip Alarm Status PCD
00828 Momentary PCD
00829 67C Phase C 67P Trip Alarm Status PCD
00830 Momentary PCD
00831 67A* Phase A 67P Trip Alarm (Seal-in) Status PCD
00832 Momentary PCD
00833 67B* Phase B 67P Trip Alarm (Seal-in) Status PCD
00834 Momentary PCD
00835 67C* Phase C 67P Trip Alarm (Seal-in) Status PCD
00836 Momentary PCD
00837 LOCKA Phase A Lockout (Single Phase Only) Status PCD
00838 Momentary PCD
00839 LOCKB Phase B Lockout (Single Phase Only) Status PCD
00840 Momentary PCD
00841 LOCKC Phase C Lockout (Single Phase Only) Status PCD
00842 Momentary PCD
00843 SW1 Trip Switch 1 Open Status SCD
00844 Momentary SCD
00845 SW1 Close Switch 1 Close Status SCD
00846 Momentary SCD
00847 SW1 Fail Switch 1 Failure Status SCD
00848 Momentary SCD
00849 SW2 Trip Switch 2 Open Status SCD
00850 Momentary SCD
00851 SW2 Close Switch 2 Close Status SCD
00852 Momentary SCD
00853 SW2 Fail Switch 2 Failure Status SCD
00854 Momentary SCD
00855 SW3 Trip Switch 3 Open Status SCD
00856 Momentary SCD
00857 SW3 Close Switch 3 Close Status SCD
00858 Momentary SCD
00859 SW3 Fail Switch 3 Failure Status SCD
00860 Momentary SCD
00861 SW4 Trip Switch 4 Open Status SCD
00862 Momentary SCD
00863 SW4 Close Switch 4 Close Status SCD
00864 Momentary SCD
00865 SW4 Fail Switch 4 Failure Status SCD
00866 Momentary SCD
00867 FLTDET Fault detected Status SCD
00868 Momentary SCD
00869 FLTDET* Fault detected (Seal-in) Status SCD
00870 Momentary SCD
00871 SW1A Switch 1 Operations Alarm Status SCD
00872 Momentary SCD

29
PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00873 SW2A Switch 2 Operations Alarm Status SCD
00874 Momentary SCD
00875 SW3A Switch 3 Operations Alarm Status SCD
00876 Momentary SCD
00877 SW4A Switch 4 Operations Alarm Status SCD
00878 Momentary SCD
00879 SW1A* Switch 1 Operations Alarm (seal-in) Status SCD
00880 Momentary SCD
00881 SW2A* Switch 2 Operations Alarm (seal-in) Status SCD
00882 Momentary SCD
00883 SW3A* Switch 3 Operations Alarm (seal-in) Status SCD
00884 Momentary SCD
00885 SW4A* Switch 4 Operations Alarm (seal-in) Status SCD
00886 Momentary SCD
00887 SECALM Sectionalizer Blocked Alarm Status SCD
00888 Momentary SCD
00889 OSALRM Sectionalizer One-Shot Enabled Alarm Status SCD
00890 Momentary SCD
00891 PSXFER Pri to Sec Source Xfer in progress Status SCD
00892 Momentary SCD
00893 SPXFER Sec to Pri Source Xfer in progress Status SCD
00894 Momentary SCD
00895 PSXFER* Sealin for PSXFER Status SCD
00896 Momentary SCD
00897 SPXFER* Sealin for SPXFER Status SCD
00898 Momentary SCD
00899 LCMTRIP Trip due to LCM Status PCD
00900 Momentary PCD
00901 LCMTRIP* Sealin for LCMTRIP Status PCD
00902 Momentary PCD
00903 LCMCLOSE Close due to LCM Status PCD
00904 Momentary PCD
00905 LCMCLOSE* Sealin for LCMCLOSE Status PCD
00906 Momentary PCD
1
00907 TAGBTN Hot tag button status Status PCD
1
00908 Momentary PCD
00909 LCMMIDPOINT LCM Midpoint operation Status PCD
00910 Momentary PCD
00911 LCMMIDPOINT* Sealin for LCM Midpoint operation Status PCD
00912 Momentary PCD
00913 ISD_TRIPA Trip phase A signal to ISD Status PCD
00914 Momentary PCD
00915 ISD_TRIPB Trip phase B signal to ISD Status PCD
00916 Momentary PCD
00917 ISD_TRIPC Trip phase C signal to ISD Status PCD
00918 Momentary PCD
00919 ISD_TRIG Trigger signal to ISD Status PCD
00920 Momentary PCD
00921 CPU_BATT_FAIL Replace CPU Battery Status PCD
00922 Momentary PCD
00923 BATT_FAIL Battery failure Status PCD
00924 Momentary PCD

30
PCD MODBUS® Protocol Implementation Details
ABB Inc.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


00925 PRIM_ACTIVE Primary protection settings group active Status PCD
00926 Momentary PCD
00927 ALT1_ACTIVE Alt1 protection settings group active Status PCD
00928 Momentary PCD
00929 ALT2_ACTIVE Alt2 protection settings group active Status PCD
00930 Momentary PCD
00931 BANK1_ACTIVE Bank1 protection settings active Status PCD
00932 Momentary PCD
00933 BANK2_ACTIVE Bank2 protection settings active Status PCD
00934 Momentary PCD

Notes:
1. These are available only on PCDs with style chart numbers XR3X-XXXX-XX-XXXX.

31
PCD MODBUS® Protocol Implementation Details
ABB Inc.

3.1.4 Physical Output Block (Two Bit Data with Momentary Change Detection)

Note: The momentary bit cannot be read without its respective logical bit being read at the same time
and vice-versa.

REGISTER NMEMONIC DESCRIPTION PRODUCT


01025 OUT32 Physical Output 32, Status ALL
01026 OUT32 Physical Output 32, Momentary ALL
01027 OUT31 Physical Output 31, Status ALL
01028 OUT31 Physical Output 31, Momentary ALL
01029 OUT30 Physical Output 30, Status ALL
01030 OUT30 Physical Output 30, Momentary ALL
01031 OUT29 Physical Output 29, Status ALL
01032 OUT29 Physical Output 29, Momentary ALL
01033 OUT28 Physical Output 28, Status ALL
01034 OUT28 Physical Output 28, Momentary ALL
01035 OUT27 Physical Output 27, Status ALL
01036 OUT27 Physical Output 27, Momentary ALL
01037 OUT26 Physical Output 26, Status ALL
01038 OUT26 Physical Output 26, Momentary ALL
01039 OUT25 Physical Output 25, Status ALL
01040 OUT25 Physical Output 25, Momentary ALL
01041 OUT24 Physical Output 24, Status ALL
01042 OUT24 Physical Output 24, Momentary ALL
01043 OUT23 Physical Output 23, Status ALL
01044 OUT23 Physical Output 23, Momentary ALL
01045 OUT22 Physical Output 22, Status ALL
01046 OUT22 Physical Output 22, Momentary ALL
01047 OUT21 Physical Output 21, Status ALL
01048 OUT21 Physical Output 21, Momentary ALL
01049 OUT20 Physical Output 20, Status ALL
01050 OUT20 Physical Output 20, Momentary ALL
01051 OUT19 Physical Output 19, Status ALL
01052 OUT19 Physical Output 19, Momentary ALL
01053 OUT18 Physical Output 18, Status ALL
01054 OUT18 Physical Output 18, Momentary ALL
01055 OUT17 Physical Output 17, Status ALL
01056 OUT17 Physical Output 17, Momentary ALL
01057 OUT16 Physical Output 16, Status ALL
01058 OUT16 Physical Output 16, Momentary ALL
01059 OUT15 Physical Output 15, Status ALL
01060 OUT15 Physical Output 15, Momentary ALL
01061 OUT14 Physical Output 14, Status ALL
01062 OUT14 Physical Output 14, Momentary ALL
01063 OUT13 Physical Output 13, Status ALL
01064 OUT13 Physical Output 13, Momentary ALL
01065 OUT12 Physical Output 12, Status ALL
01066 OUT12 Physical Output 12, Momentary ALL
01067 OUT11 Physical Output 11, Status ALL
01068 OUT11 Physical Output 11, Momentary ALL

32
PCD MODBUS® Protocol Implementation Details
ABB Inc.

01069 OUT10 Physical Output 10, Status ALL


01070 OUT10 Physical Output 10, Momentary ALL
01071 OUT9 Physical Output 9, Status ALL
01072 OUT9 Physical Output 9, Momentary ALL
01073 OUT8 Physical Output 8, Status ALL
01074 OUT8 Physical Output 8, Momentary ALL
01075 OUT7 Physical Output 7, Status ALL
01076 OUT7 Physical Output 7, Momentary ALL
01077 OUT6 Physical Output 6, Status ALL
01078 OUT6 Physical Output 6, Momentary ALL
01079 OUT5 Physical Output 5, Status ALL
01080 OUT5 Physical Output 5, Momentary ALL
01081 OUT4 Physical Output 4, Status ALL
01082 OUT4 Physical Output 4, Momentary ALL
01083 OUT3 Physical Output 3, Status ALL
01084 OUT Physical Output 3, Momentary ALL
01085 OUT2 Physical Output 2, Status ALL
01086 OUT2 Physical Output 2, Momentary ALL
01087 OUT1 Physical Output 1, Status ALL
01088 OUT1 Physical Output 1, Momentary ALL

33
PCD MODBUS® Protocol Implementation Details
ABB Inc.

(This page is intentionally blank.)

34
PCD MODBUS® Protocol Implementation Details
ABB Inc.

4 1X REGISTERS

4.1 FUNCTION CODE 2 (READ INPUT STATUS)

4.1.1 Logical Input Block (Single Bit Data)

REGISTER NMEMONIC DESCRIPTION PRODUCT


10001 52a 52a Contact Input PCD
10002 52b 52b Contact Input PCD
10003 43a 43a Contact Input (Recloser Disable) PCD
10004 PH3 Phase Torque Control PCD
10005 GRD Neutral Torque Control PCD
10006 SCC Springs Charged Contact Input PCD
10007 79S Single Shot Reclose Initiate Input PCD
10008 79M Mult-shot Reclose Initiate Input PCD
10009 TCM Trip Coil Monitor Input PCD
10010 50-1 50-1 Torque Control (Phase and Neutral) PCD
10011 50-2 50-2 Torque Control (Phase and Neutral) PCD
10012 50-3 50-3 Torque Control (Phase and Neutral) PCD
10013 ALT1 Alternate Setting Group 1 Enable ALL
10014 ALT2 Alternate Setting Group 2 Enable ALL
10015 ECI1 Event Capture Initiate 1 ALL
10016 ECI2 Event Capture Initiate 2 ALL
10017 WCI Waveform Capture Initiate ALL
10018 ZSC Zone Sequence Control Enable PCD
10019 OPEN Open Breaker Initiate PCD
10020 CLOSE Close Breaker Initiate PCD
10021 46 46 Torque Control ALL
10022 67P 67P Torque Control PCD
10023 67N 67N Torque Control PCD
10024 ULI1 User Logical Input 1 ALL
10025 ULI2 User Logical Input 2 ALL
10026 ULI3 User Logical Input 3 ALL
10027 ULI4 User Logical Input 4 ALL
10028 ULI5 User Logical Input 5 ALL
10029 ULI6 User Logical Input 6 ALL
10030 ULI7 User Logical Input 7 ALL
10031 ULI8 User Logical Input 8 ALL
10032 ULI9 User Logical Input 9 ALL
10033 CRI Clear Reclose and Overcurrent Counters ALL
10034 ARCI Automatic Reclose Inhibit PCD
10035 TARC Trip and Reclose Initiate PCD
10036 SEFTC Sensitive Earth Torque Control ALL
10037 ExtBFI External Breaker Failure Initiate PCD
10038 BFI Breaker Failure Initiate PCD
10039 RBI Remote Block Input ALL

35
PCD MODBUS® Protocol Implementation Details
ABB Inc.

10040 ALT1Pon ALT1 Pulse On Input ALL


10041 ALT1Poff ALT1 Pulse Off Input ALL
10042 ALT2Pon ALT2 Pulse On Input ALL
10043 ALT2Poff ALT2 Pulse Off Input ALL
10044 OPNBLK Open Control Block Input ALL
10045 CLSBLK Close Control Block Input ALL
10046 TAGMSG Tag Message Enable Input ALL
10047 52aA Phase A 52a Contact (Single Phase Only) PCD
10048 52aB Phase B 52a Contact (Single Phase Only) PCD
10049 52aC Phase C 52a Contact (Single Phase Only) PCD
10050 52bA Phase A 52b Contact (Single Phase Only) PCD
10051 52bB Phase B 52b Contact (Single Phase Only) PCD
10052 52bC Phase C 52b Contact (Single Phase Only) PCD
10053 TRIPA Phase A Trip Initiate (Single Phase Only) PCD
10054 TRIPB Phase B Trip Initiate (Single Phase Only) PCD
10055 TRIPC Phase C Trip Initiate (Single Phase Only) PCD
10056 CLOSEA Phase A Close Initiate (Single Phase Only) PCD
10057 CLOSEB Phase B Close Initiate (Single Phase Only) PCD
10058 CLOSEC Phase C Close Initiate (Single Phase Only) PCD
10059 SW1-52a Switch 1 52a Contact SCD
10060 SW1-52b Switch 1 52b Contact SCD
10061 SW2-52a Switch 2 52a Contact SCD
10062 SW2-52b Switch 2 52b Contact SCD
10063 SW3-52a Switch 3 52a Contact SCD
10064 SW3-52b Switch 3 52b Contact SCD
10065 SW4-52a Switch 4 52a Contact SCD
10066 SW4-52b Switch 4 52b Contact SCD
10067 OPEN1 Switch 1 Open Initiate SCD
10068 CLOSE1 Switch 1 Close Initiate SCD
10069 OPEN2 Switch 2 Open Initiate SCD
10070 CLOSE2 Switch 2 Close Initiate SCD
10071 OPEN3 Switch 3 Open Initiate SCD
10072 CLOSE3 Switch 3 Close Initiate SCD
10073 OPEN4 Switch 4 Open Initiate SCD
10074 CLOSE4 Switch 4 Close Initiate SCD
10075 SECBLK Sectionalize Block SCD
10076 OSLIM Sectionalize One-Shot Limit SCD
10077 FLTDET Fault Detector Block SCD
10078 XFERBLK Source Transfer Block SCD
10079 XFERPS Source Transfer P→S Initiate SCD
10080 XFERSP Source Transfer S→P Initiate SCD
10081 RSTRPS Restoration P→S Initiate SCD
10082 RSTRSP Restoration S→P Initiate SCD
10083 RST_TA Reset target alarms ALL
10084 RST_SA Reset seal in alarms ALL

36
PCD MODBUS® Protocol Implementation Details
ABB Inc.

4.1.2 Physical Input Block (Single Bit Data)

REGISTER NMEMONIC DESCRIPTION PRODUCT


10257 IN32 Physical Input 32 ALL
10258 IN31 Physical Input 31 ALL
10259 IN30 Physical Input 30 ALL
10260 IN29 Physical Input 29 ALL
10261 IN28 Physical Input 28 ALL
10262 IN27 Physical Input 27 ALL
10263 IN26 Physical Input 26 ALL
10264 IN25 Physical Input 25 ALL
10265 IN24 Physical Input 24 ALL
10266 IN23 Physical Input 23 ALL
10267 IN22 Physical Input 22 ALL
10268 IN21 Physical Input 21 ALL
10269 IN20 Physical Input 20 ALL
10270 IN19 Physical Input 19 ALL
10271 IN18 Physical Input 18 ALL
10272 IN17 Physical Input 17 ALL
10273 IN16 Physical Input 16 ALL
10274 IN15 Physical Input 15 ALL
10275 IN14 Physical Input 14 ALL
10276 IN13 Physical Input 13 ALL
10277 IN12 Physical Input 12 ALL
10278 IN11 Physical Input 11 ALL
10279 IN10 Physical Input 10 ALL
10280 IN9 Physical Input 9 ALL
10281 IN8 Physical Input 8 ALL
10282 IN7 Physical Input 7 ALL
10283 IN6 Physical Input 6 ALL
10284 IN5 Physical Input 5 ALL
10285 IN4 Physical Input 4 ALL
10286 IN3 Physical Input 3 ALL
10287 IN2 Physical Input 2 ALL
10288 IN1 Physical Input 1 ALL

37
PCD MODBUS® Protocol Implementation Details
ABB Inc.

4.1.3 Logical Input Block (Two Bit Data with Momentary Change Detection)

Note: The momentary bit cannot be read without its respective logical bit being read at the
same time and vice-versa.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


10513 52a 52a Contact Input Status PCD
10514 Momentary PCD
10515 52b 52b Contact Input Status PCD
10516 Momentary PCD
10517 43a 43a Contact Input (Recloser Disable) Status PCD
10518 Momentary PCD
10519 PH3 Phase Torque Control Status PCD
10520 Momentary PCD
10521 GRD Neutral Torque Control Status PCD
10522 Momentary PCD
10523 SCC Springs Charged Contact Input Status PCD
10524 Momentary PCD
10525 79S Single Shot Reclose Initiate Input Status PCD
10526 Momentary PCD
10527 79M Mult-shot Reclose Initiate Input Status PCD
10528 Momentary PCD
10529 TCM Trip Coil Monitor Input Status PCD
10530 Momentary PCD
10531 50-1 50-1 Torque Control (Phase and Neutral) Status PCD
10532 Momentary PCD
10533 50-2 50-2 Torque Control (Phase and Neutral) Status PCD
10534 Momentary PCD
10535 50-3 50-3 Torque Control (Phase and Neutral) Status PCD
10536 Momentary PCD
10537 ALT1 Alternate Setting Group 1 Enable Status ALL
10538 Momentary ALL
10539 ALT2 Alternate Setting Group 2 Enable Status ALL
10540 Momentary ALL
10541 ECI1 Event Contact Initiate 1 Status ALL
10542 Momentary ALL
10543 ECI2 Event Contact Initiate 1 Status ALL
10544 Momentary ALL
10545 WCI Waveform Capture Initiate Status ALL
10546 Momentary ALL
10547 ZSC Zone Sequence Control Enable Status PCD
10548 Momentary PCD
10549 OPEN Open Breaker Initiate Status PCD
10550 Momentary PCD
10551 CLOSE Close Breaker Initiate Status PCD
10552 Momentary PCD
10553 46 46 Torque Control Status ALL
10554 Momentary ALL
10555 67P 67P Torque Control Status PCD
10556 Momentary PCD

38
PCD MODBUS® Protocol Implementation Details
ABB Inc.

10557 67N 67N Torque Control Status PCD


10558 Momentary PCD
10559 ULI1 User Logical Input 1 Status ALL
10560 Momentary ALL
10561 ULI2 User Logical Input 2 Status ALL
10562 Momentary ALL
10563 ULI3 User Logical Input 3 Status ALL
10564 Momentary ALL
10565 ULI4 User Logical Input 4 Status ALL
10566 Momentary ALL
10567 ULI5 User Logical Input 5 Status ALL
10568 Momentary ALL
10569 ULI6 User Logical Input 6 Status ALL
10570 Momentary ALL
10571 ULI7 User Logical Input 7 Status ALL
10572 Momentary ALL
10573 ULI8 User Logical Input 8 Status ALL
10574 Momentary ALL
10575 ULI9 User Logical Input 9 Status ALL
10576 Momentary ALL
10577 CRI Clear Reclose and Overcurrent Counters Status ALL
10578 Momentary ALL
10579 ARCI Automatic Reclose Inhibit Status PCD
10580 Momentary PCD
10581 TARC Trip and Reclose Initiate Status PCD
10582 Momentary PCD
10583 SEFTC Sensitive Earth Torque Control Status ALL
10584 Momentary ALL
10585 ExtBFI External Breaker Failure Initiate Status PCD
10586 Momentary PCD
10587 BFI Breaker Failure Initiate Status PCD
10588 Momentary PCD
10589 RBI Remote Block Input Status ALL
10590 Momentary ALL
10591 ALT1Pon ALT1 Pulse On Input Status ALL
10592 Momentary ALL
10593 ALT1Poff ALT1 Pulse Off Input Status ALL
10594 Momentary ALL
10595 ALT2Pon ALT2 Pulse On Input Status ALL
10596 Momentary ALL
10597 ALT2Poff ALT2 Pulse Off Input Status ALL
10598 Momentary ALL
10599 OPNBLK Open Control Block Input Status ALL
10600 Momentary ALL
10601 CLSBLK Close Control Block Input Status ALL
10602 Momentary ALL
10603 TAGMSG Tag Message Enable Input Status ALL
10604 Momentary ALL
10605 52aA Phase A 52a Contact (Single Phase Only) Status PCD

39
PCD MODBUS® Protocol Implementation Details
ABB Inc.

10606 Momentary PCD


10607 52aB Phase B 52a Contact (Single Phase Only) Status PCD
10608 Momentary PCD
10609 52aC Phase C 52a Contact (Single Phase Only) Status PCD
10610 Momentary PCD
10611 52bA Phase A 52b Contact (Single Phase Only) Status PCD
10612 Momentary PCD
10613 52bB Phase B 52b Contact (Single Phase Only) Status PCD
10614 Momentary PCD
10615 52bC Phase C 52b Contact (Single Phase Only) Status PCD
10616 Momentary PCD
10617 TRIPA Phase A Trip Initiate (Single Phase Only) Status PCD
10618 Momentary PCD
10619 TRIPB Phase B Trip Initiate (Single Phase Only) Status PCD
10620 Momentary PCD
10621 TRIPC Phase C Trip Initiate (Single Phase Only) Status PCD
10622 Momentary PCD
10623 CLOSEA Phase A Close Initiate (Single Phase Only) Status PCD
10624 Momentary PCD
10625 CLOSEB Phase B Close Initiate (Single Phase Only) Status PCD
10626 Momentary PCD
10627 CLOSEC Phase C Close Initiate (Single Phase Only) Status PCD
10628 Momentary PCD
10629 SW1-52a Switch 1 52a Contact Input Status SCD
10630 Momentary SCD
10631 SW1-52b Switch 1 52b Contact Input Status SCD
10632 Momentary SCD
10633 SW2-52a Switch 2 52a Contact Input Status SCD
10634 Momentary SCD
10635 SW2-52b Switch 2 52b Contact Input Status SCD
10636 Momentary SCD
10637 SW3-52a Switch 3 52a Contact Input Status SCD
10638 Momentary SCD
10639 SW3-52b Switch 3 52b Contact Input Status SCD
10640 Momentary SCD
10641 SW4-52a Switch 4 52a Contact Input Status SCD
10642 Momentary SCD
10643 SW4-52b Switch 4 52b Contact Input Status SCD
10644 Momentary SCD
10645 OPEN1 Switch 1 Open Initiate Status SCD
10646 Momentary SCD
10647 CLOSE1 Switch 1 Close Initiate Status SCD
10648 Momentary SCD
10649 OPEN2 Switch 2 Open Initiate Status SCD
10650 Momentary SCD
10651 CLOSE2 Switch 2 Close Initiate Status SCD
10652 Momentary SCD
10653 OPEN3 Switch 3 Open Initiate Status SCD
10654 Momentary SCD

40
PCD MODBUS® Protocol Implementation Details
ABB Inc.

10655 CLOSE3 Switch 3 Close Initiate Status SCD


10656 Momentary SCD
10657 OPEN4 Switch 4 Open Initiate Status SCD
10658 Momentary SCD
10659 CLOSE4 Switch 4 Close Initiate Status SCD
10660 Momentary SCD
10661 SECBLK Sectionalize Block Status SCD
10662 Momentary SCD
10663 OSLIM Sectionalize One-Shot Limit Status SCD
10664 Momentary SCD
10665 FLTDET Fault Detector Block Status SCD
10666 Momentary SCD
10667 XFERBLK Source Transfer Block Status SCD
10668 Momentary SCD
10669 XFERPS Source Transfer P→S Initiate Status SCD
10670 Momentary SCD
10671 XFERSP Source Transfer S→P Initiate Status SCD
10672 Momentary SCD
10673 RSTRPS Restoration P→S Initiate Status SCD
10674 Momentary SCD
10675 RSTRSP Restoration S→P Initiate Status SCD
10676 Momentary SCD
10677 RST_TA Reset target alarns Status ALL
10678 Momentary ALL
10679 RST_SA Reset seal-in alarms Status ALL
10680 Momentary ALL

41
PCD MODBUS® Protocol Implementation Details
ABB Inc.

4.1.4 Physical Input Block (Two Bit Data with Momentary Change Detection)

Note: The momentary bit cannot be read without its respective logical bit being read at the
same time and vice-versa.

REGISTER NMEMONIC DESCRIPTION ATTRIBUTE PRODUCT


01025 IN32 Physical Input 32 Status ALL
01026 Momentary ALL
01027 IN31 Physical Input 31 Status ALL
01028 Momentary ALL
01029 IN30 Physical Input 30 Status ALL
01030 Momentary ALL
01031 IN29 Physical Input 29 Status ALL
01032 Momentary ALL
01033 IN28 Physical Input 28 Status ALL
01034 Momentary ALL
01035 IN27 Physical Input 27 Status ALL
01036 Momentary ALL
01037 IN26 Physical Input 26 Status ALL
01038 Momentary ALL
01039 IN25 Physical Input 25 Status ALL
01040 Momentary ALL
01041 IN24 Physical Input 24 Status ALL
01042 Momentary ALL
01043 IN23 Physical Input 23 Status ALL
01044 Momentary ALL
01045 IN22 Physical Input 22 Status ALL
01046 Momentary ALL
01047 IN21 Physical Input 21 Status ALL
01048 Momentary ALL
01049 IN20 Physical Input 20 Status ALL
01050 Momentary ALL
01051 IN19 Physical Input 19 Status ALL
01052 Momentary ALL
01053 IN18 Physical Input 18 Status ALL
01054 Momentary ALL
01055 IN17 Physical Input 17 Status ALL
01056 Momentary ALL
01057 IN16 Physical Input 16 Status ALL
01058 Momentary ALL
01059 IN15 Physical Input 15 Status ALL
01060 Momentary ALL
01061 IN14 Physical Input 14 Status ALL
01062 Momentary ALL
01063 IN13 Physical Input 13 Status ALL
01064 Momentary ALL
01065 IN12 Physical Input 12 Status ALL
01066 Momentary ALL
01067 IN11 Physical Input 11 Status ALL
01068 Momentary ALL
01069 IN10 Physical Input 10 Status ALL
01070 Momentary ALL
01071 IN9 Physical Input 9 Status ALL
01072 Momentary ALL

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PCD MODBUS® Protocol Implementation Details
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01073 IN8 Physical Input 8 Status ALL


01074 Momentary ALL
01075 IN7 Physical Input 7 Status ALL
01076 Momentary ALL
01077 IN6 Physical Input 6 Status ALL
01078 Momentary ALL
01079 IN5 Physical Input 5 Status ALL
01080 Momentary ALL
01081 IN4 Physical Input 4 Status ALL
01082 Momentary ALL
01083 IN3 Physical Input 3 Status ALL
01084 Momentary ALL
01085 IN2 Physical Input 2 Status ALL
01086 Momentary ALL
01087 IN1 Physical Input 1 Status ALL
01088 Momentary ALL

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5 4X REGISTERS
5.1 FUNCTION CODE 3 (READ HOLDING REGISTER)
MODBUS Data Type Definitions
Byte 3 Byte 2 Byte 1 Byte 0
0 1 2 3
Register Offsets of Signed/Unsigned Long

Byte 1 Byte 0
0 1
Register Offsets of Signed/Unsigned Short

Data Type Definitions Number of 8-bit bytes Value Ranges


Unsigned Byte 1 (0 to +255)
Signed Byte 1 (-128 to +127)
Unsigned Short 2 (0 to +65535)
Signed Short 2 (-32,768 to +32767)
Unsigned Long 4 (0 to +4,294,967,295)
Signed Long 4 (-2,147,483,648 to
+2,147,483,647)

Note: Data Byte Order follows the Low Address-High Byte, High Address -Low Byte Convention.

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5.1.1 User Programmable Register Block (Defaults)

A User programmable registers may contain any valid Modbus register addressed value in the
following data formats. For example, register 40002 contains secondary phase A Amperes scaled
into 12 bits using the Offset Binary Data type. To set up the 40002 register, the user configures the
data type (Offset Bipolar), the number of bits using from the 16 bit register (12 bits), the source
register (40257 which is a 16 bit unsigned value), the number of bits to use starting from the source
register base (16 bits), the Full Scale or Scale factor to apply to the source register (10) and the type
of scaling to be performed on the source register (Current).
As per defaults, when the 40002 register contains a value of 2047, the secondary current is ZERO
and when the register contains a value of 4097, the secondary current is 10 Amps.
40002: Offset Bipolar(12) 40257(16) 10 (Current) Load Current-A

Data Type Number of 8-bit bytes Value Ranges


Definitions
N N-1 N
Offset Bipolar 2 only using N Bits (0 to +2 -1) where 0 = -FS, 2 -1 = 0 and 2 -1 = +FS
N-1 N-1 N-1 N-1
Bipolar 2 only using N Bits (-2 to + 2 -1)where -2 = -FS, 0 = 0 and 2 -1 =
+FS
N N
Unipolar 2 only using N Bits (0 to 2 -1) where 0 = 0 and 2 -1 = +FS
N N
Negative Unipolar 2 only using N Bits (0 to 2 -1) where 0 = 0 and 2 -1 = -FS

Register Type: Unipolar, Negative Unipolar, Bipolar, Offset Bipolar


Register Justification: LSB, MSB.
Register Size: 16, 12, 8, 4, 2 bits
Source Register: Any valid 0/1/4xxxxx Register
Source Size/Type: 16, 32 bits/Signed, Unsigned
Full Scale/Scale Range: 1 to 65535
Scale Type: Current, Voltage, Power, Normal, Remainder where
Offset Bipolar Current: Register Value = (2N-1*Source Value / [FS*CT Ratio])+2N-1-1
Offset Bipolar Voltage: Register Value = (2N-1*Source Value / [FS*PT Ratio])+2N-1-1
Offset Bipolar Power: Register Value = (2N-1*Source Value / [FS*CT Ratio*PT Ratio])+2N-1-1
Uni/Neg Uni/Bipolar Normal: Register Value = Source Value / Scale
Uni/Neg Uni/Bipolar Remainder: Register Value = Remainder of [Source Value / Scale]

Note : The values at saturation will be 2N -1 where N is the register size in bits.

PROGRAMM- REGISTER TYPE START REGISTER FS OR SCALE DESCRIPTION


ABLE (BITS) (BITS/TYPE) (TYPE)
REGISTER
40001: Unipolar(16,LSB) 40129(16/Unsigned) 1 (Normal) Relay Status
40002: Offset Bipolar (12,LSB) 40257(16/Unsigned) 10 (Current) Load Current A
40003: Offset Bipolar (12,LSB) 40259(16/Unsigned) 10 (Current) Load Current B
40004: Offset Bipolar 12,LSB) 40261(16/Unsigned) 10 (Current) Load Current C
40005: Offset Bipolar (12,LSB) 40265(32/Unsigned) 150 (Voltage) Voltage VAN
40006: Offset Bipolar (12,LSB) 40268(32/Unsigned) 150 (Voltage) Voltage VBN
40007: Offset Bipolar (12,LSB) 40271(32/Unsigned) 150 (Voltage) Voltage VCN
40008: Offset Bipolar (12,LSB) 40289(32/Signed) 3000 (Power) 3 Phase Watts
40009: Offset Bipolar (12,LSB) 40297(32/Signed) 3000 (Power) 3 Phase VARs
40010: Offset Bipolar (12,LSB) 40283(32/Signed) 1000 (Power) Phase A Watts
40011: Offset Bipolar (12,LSB) 40285(32/Signed) 1000 (Power) Phase B Watts
40012: Offset Bipolar (12,LSB) 40287(32/Signed) 1000 (Power) Phase C Watts
40013: Offset Bipolar (12,LSB) 40291(32/Signed) 1000 (Power) Phase A VARs
40014: Offset Bipolar (12,LSB) 40293(32/Signed) 1000 (Power) Phase B VARs
40015: Offset Bipolar (12,LSB) 40295(32/Signed) 1000 (Power) Phase C VARs
40016: Unipolar (16,LSB) 40158(16/Unsigned) 1 (Normal) Phase CT Ratio
40017: Unipolar (16,LSB) 40160(16/Unsigned) 1 (Normal) PT Ratio
40018: Offset Bipolar (12,LSB) 40261(16/Unsigned) 10 (Current) Load Current N
40019: Unipolar (16,LSB) 40305(32/Signed) 10000 (Normal) +3 Phase kWatthours (high)

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40020: Unipolar (16,LSB) 40305(32/Signed) 10000 (Remainder) +3 Phase kWatthours (Low)


40021: Neg Unipolar (16,LSB) 40305(32/Signed) 10000 (Normal) -3 Phase kWatthours (High)
40022: Neg Unipolar (16,LSB) 40305(32/Signed) 10000 (Remainder) -3 Phase kWatthours (Low)
40023: Unipolar (16,LSB) 40313(32/Signed) 10000 (Normal) +3 Phase kVARhours (High)
40024: Unipolar (16,LSB) 40313(32/Signed) 10000 (Remainder) +3 Phase kVARhours (Low)
40025: Neg Unipolar (16,LSB) 40313(32/Signed) 10000 (Normal) -3 Phase kVARhours (High)
40026: Neg Unipolar (16,LSB) 40313(32/Signed) 10000 (Remainder) -3 Phase kVARhours (Low)
40027: Unipolar (16,LSB) 40327(16/Unsigned) 1 (Normal) System Frequency
40028-32 Spares

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5.1.2 System Status/Configuration Block

REGISTER DATA SIZE SCALE DESCRIPTION


40129 Unsigned Short Relay Status
Bit 15-13: Spare
Bit 12: Settings Bank2 active
Bit 11: Settings Bank1 active
Bit 10: New Minimum Demand Value
Bit 9: New Peak Demand Value
Bit 8: New Operation Recorded
Bit 7: Control Power Cycled
Bit 6: New Fault Recorded
Bit 5: Alternate 2 Settings Active
Bit 4: Alternate 1 Settings Active
Bit 3: Remote Edit Disable
Bit 2: Local Settings Changed
Bit 1: Contact Input Changed
Bit 0: Selftest Status
40130-131: Unsigned Long Diagnostic Status Flag
Bit 31-16: Spare
Bit 15: DSP COP FAILURE
Bit 14: DSP +5V FAILURE
Bit 13: DSP +/-15V FAILURE
Bit 12: SPARE
Bit 11: DSP ADC FAILURE
Bit 10: DSP EXT RAM FAILURE
Bit 9: DSP INT RAM FAILURE
Bit 8: DSP ROM FAILURE
Bit 7: Spare
Bit 6: Spare
Bit 5: Spare
Bit 4: Spare
Bit 3: CPU EEPROM FAILURE
Bit 2: CPU NVRAM FAILURE
Bit 1: CPU EPROM FAILURE
Bit 0: CPU RAM FAILURE
40132 Unsigned Short Relay Configuration
Bit 15-2: Spare
Bit 1: 0=kWhr/kVARhr,1=MWhr/MVARhr
Bit 0: 0= Wye PT, 1=Delta PT
20 Char String (NULL Term) 1
40133-142 Catalog Number
40143 Unsigned Short 100 CPU Software Version Number
40144 Unsigned Short 10 CT/PT Calibration Software Version Number
40145 Unsigned Short 10 Front Panel Controller Software Version Number
40146 Unsigned Short 100 Auxiliary Communication Software Version Num
40147-148 Unsigned Long 1 Serial Number
40149-157 18 Char String(NULL Term) Unit Name
40158 Unsigned Short Phase CT Ratio
40159 Unsigned Short Neutral CT Ratio
40160 Unsigned Short PT Ratio
40161 Unsigned Short 1 Last Power Fail Timestamp Year
40162 Unsigned Short 1 Last Power Fail Timestamp Month
40163 Unsigned Short 1 Last Power Fail Timestamp Day
40164 Unsigned Short 1 Last Power Fail Timestamp Hours
40165 Unsigned Short 1 Last Power Fail Timestamp Minutes
40166 Unsigned Short 1 Last Power Fail Timestamp Seconds
40167 Unsigned Short 1 Last Power Fail Timestamp Milliseconds
40168 Unsigned Short 1 Last Power Fail Type
40169 Unsigned Short 1 Last Power Fail State Machine Current State
Bits 0 to 4 : Phase A Recloser State
0 Pole Closed State
1 Pole Opening State
2 Pole Fail to Open State
3 Open Synchronizing State
4 Pole Open State
5 Pole Locked Out State

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REGISTER DATA SIZE SCALE DESCRIPTION


6 Pole Closing State
7 Pole Failed to Close State
8 Pole Indeterminate State
9 Control Switch Failure State
10 Pole Failed in Closed State
11 Original Mode Fail Closing State
12 Original Mode Fail to Close State
13 Original Mode Indeterm. State
14 Diagnostics Failure State
Bits 5 to 9 : Phase B Recloser (same state list as above)
Bits 10 to 14 : Phase C Recloser (same state list as above)
Bit 15 : 0 = Three Phase Mode, 1 = Single Phase Mode
40170-171 Unsigned Long 1 Fast Status Response
Bit 31-23: Spare
Bit 22: 1= One or More Unreported Operations
Records
Bit 21-16: Division Code = 00101 binary
Bit 15-10: Product Code = 001110 binary
Bit 9-8: Spare
Bit 7-6: Reserved for Corporate Status
Bit 5: Reserved for Local Operator Action
Bit 4-0: Spare
40172 Unsigned Short 1 Last Communications Error Comm Port Type
2=RS232,3=RS485
40173 Unsigned Short 1 Last Communications Error Command
(MODBUS Function Code)
40174 Unsigned Short 1 Last Communications Error Register Register
40175 Unsigned Short 1 Last Communications Error Type
1 Invalid password
2 Checksum Error
3 The block/register or range are invalid
4 Block/Register attempted to be accessed invalid
5 Range of data attempted to be accessed invalid
6 Invalid Data
7 Settings being edited elsewhere in unit or remote
edit disabled
8 A write to one settings group attempted while
actively editing another
9 Breaker state invalid
10 Data entered is below minimum
11 Data entered is above maximum allowed
12 Data entered is out of step
13 Local input block
14 Data not available
15 Destination address out or bound / not suported
32 Reference Type or File Number invalid
33 Too many registers for modbus protocol
34 Invalid Function code
35 Invalid Record control
40176-177 Unsigned Long 1 Editor Write Mask 1
40178-179 Unsigned Long 1 Editor Write Mask 2
40180-181 Unsigned Long 1 Physical Input Availability Mask
40182-183 Unsigned Long 1 Physical Output Availability Mask
40184-185 Unsigned Long 1 Physical Input Lock Mask*
40186-187 Unsigned Long 1 Physical Output Lock Mask*
40188-189 Unsigned Long 1 Feedback Allocation Mask
40190 Unsigned Short 100 UPS Firmware version number
40191 Unsigned Short 1 CT board ID number
40192 Unsigned Short 1 VD board ID number

Note: * is Currently not Supported

1. Refer to the PCD instruction manual for allowable catalog numbers

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5.1.3 RMS Load Current/Angular Values Block/Other Primary Analog Quantities


(The metered current / voltage will be RMS or Fundamental values, depending on the configuration setting, register
61425, bit 0)

REGISTER DATA SIZE SCALE DESCRIPTION


40257 Unsigned Short 1 Load Current-A
40258: Unsigned Short 1 Load Current-A Angle
40259 Unsigned Short 1 Load Current-B
40260 Unsigned Short 1 Load Current-B Angle
40261 Unsigned Short 1 Load Current-C
40262 Unsigned Short 1 Load Current-C Angle
40263 Unsigned Short 1 Load Current-N
40264 Unsigned Short 1 Load Current-N Angle
40265-266 Unsigned Long 1 Voltage VAN
40267 Unsigned Short 1 Voltage VAN Angle
40268-269 Unsigned Long 1 Voltage VBN
40270 Unsigned Short 1 Voltage VBN Angle
40271-272 Unsigned Long 1 Voltage VCN
40273 Unsigned Short 1 Voltage VCN Angle
40274-275 Unsigned Long 1 Voltage VAB
40276 Unsigned Short 1 Voltage VAB Angle
40277-278 Unsigned Long 1 Voltage VBC
40279 Unsigned Short 1 Voltage VBC Angle
40280-281 Unsigned Long 1 Voltage VCA
40282 Unsigned Short 1 Voltage VCA Angle
40283-284 Signed Long 1 kWatts A
40285-286 Signed Long 1 kWatts B
40287-288 Signed Long 1 kWatts C
40289-290 Signed Long 1 3 Phase kWatts
40291-292 Signed Long 1 kVARs A
40293-294 Signed Long 1 kVARs B
40295-296 Signed Long 1 kVARs C
40297-298 Signed Long 1 3 Phase kVARs
40299-300 Signed Long 1 kWatt Hours A
40301-302 Signed Long 1 kWatt Hours B
40303-304 Signed Long 1 kWatt Hours C
40305-306 Signed Long 1 kWatt Hours 3 Phase
40307-308 Signed Long 1 kVAR Hours A
40309-310 Signed Long 1 kVAR Hours B
40311-312 Signed Long 1 kVAR Hours C
40313-314 Signed Long 1 kVAR Hours 3 Phase
40315 Unsigned Short 1 Zero Sequence Current (computed)
40316 Unsigned Short 1 Zero Sequence Current Angle (computed)
40317 Unsigned Short 1 Positive Sequence Current
40318 Unsigned Short 1 Positive Sequence Current Ang1e
40319 Unsigned Short 1 Negative Sequence Current
40320 Unsigned Short 1 Negative Sequence Current Angle
40321-322 Unsigned Long 1 Positive Sequence Voltage Magnitude
40323 Unsigned Short 1 Positive Sequence Voltage Angle
40324-325 Unsigned Long 1 Negative Sequence Voltage Magnitude
40326 Unsigned Short 1 Negative Sequence Voltage Angle
40327 Unsigned Short 100 System Frequency
40328 Unsigned Short Power Factor
Bit 15-9: Not used
Bit 8: 0=Positive, 1=Negative
Bit 7: 0=Leading, 1=Lagging
Bit 6-0: Power Factor Value (x100)
40329-330 Unsigned Long 1 Zero Sequence Current Mag (measured)
40331 Unsigned Short 1 Zero Sequence Current Angle (measured)
40332-333 Unsigned Long 1 Zero Sequence Voltage Mag (measured)
40334 Unsigned Short 1 Zero Sequence Voltage Angle (measured)
40335 Signed Short 100 Power Factor
40336 Unsigned Short Power Factor Status
Bit 0: 0=Leading, 1=Lagging

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40337 Unsigned Short 10 Fault Distance


40338 Unsigned Short 100 UPS: Battery Charging Voltage (Volts * 100)
40339 Unsigned Short 100 UPS: Battery Charging Current (Amps * 100)
40340 Signed Short 100 UPS: Cabinet Temperature (deg. C * 100)
40341 Unsigned Short 100 UPS: Battery Test Delta Voltage (Volts * 100)*
40342-3 Unsigned Long 1.0 Voltage Source 1, Phase A magnitude
3
40344 Unsigned Short 1.0 Voltage Source 1, Phase A angle
40345-6 Unsigned Long 1.0 Voltage Source 1, Phase B magnitude
3
40347 Unsigned Short 1.0 Voltage Source 1, Phase B angle
40348-9 Unsigned Long 1.0 Voltage Source 1, Phase C magnitude
3
40350 Unsigned Short 1.0 Voltage Source 1, Phase C angle
40351-2 Unsigned Long 1.0 Voltage Source 2, Phase A magnitude
3
40353 Unsigned Short 1.0 Voltage Source 2, Phase A angle
40354-5 Unsigned Long 1.0 Voltage Source 2, Phase B magnitude
3
40356 Unsigned Short 1.0 Voltage Source 2, Phase B angle
40357-58 Unsigned Long 1.0 Voltage Source 2, Phase C magnitude
3
40359 Unsigned Short 1.0 Voltage Source 2, Phase C angle
4
40360 Unsigned Short 100 UPS: Input voltage (Volts * 100)
4
40361 Unsigned Short 100 UPS: External capacitor voltage (volts * 100)
4
40362 Unsigned Short 100 UPS: Board ambient temperature (°C * 100)
* A delta voltage of 9900 (99.00 V) indicates a bad battery or no battery connected.

Note: A battery test sequence is initiated as follows:

1) Issue a write to Bit 7 in registers 41158/41159 to start the test (function 16 command).
2) Read register 40341; if the value is 65535 the test is not yet complete.
If a test not complete response continues for more than 5 seconds then reissue the
battery test (step 1 above). Do Not initiate the test sequence at a rate of more then once
per minute since battery damage may occur.
3) These registers are not supported as yet, and will return a value of zero.
4) These registers are valid only when register 40190 returns a value of 200 or greater.

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5.1.4 RMS Demand Current/Real and Reactive Power Values Block

REGISTER DATA SIZE SCALE DESCRIPTION


40385 Unsigned Short 1 Demand Current-A
40386 Unsigned Short 1 Demand Current-B
40387 Unsigned Short 1 Demand Current-C
40388 Unsigned Short 1 Demand Current-N
40389-390 Signed Long 1 Demand kWatts-A
40391-392 Signed Long 1 Demand kWatts-B
40393-394 Signed Long 1 Demand kWatts-C
40395-396 Signed Long 1 3 Phase Demand kWatts
40397-398 Signed Long 1 Demand kVARs-A
40399-400 Signed Long 1 Demand kVARs-B
40401-402 Signed Long 1 Demand kVARs-C
40403-404 Signed Long 1 3 Phase Demand kVARs

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5.1.5 RMS Peak Demand Current/Real, Reactive Power Values and Time Stamps Block

REGISTER DATA SIZE SCALE DESCRIPTION


40513-516 Unsigned Short 1 Peak Demand Current-A
Unsigned Byte Peak Demand Current-A Year
Unsigned Byte Peak Demand Current-A Month
Unsigned Byte Peak Demand Current-A Day
Unsigned Byte Peak Demand Current-A Hour
Unsigned Byte Peak Demand Current-A Minute
Unsigned Byte Spare
40517-520 Unsigned Short 1 Peak Demand Current-B
Unsigned Byte Peak Demand Current-B Year
Unsigned Byte Peak Demand Current-B Month
Unsigned Byte Peak Demand Current-B Day
Unsigned Byte Peak Demand Current-B Hour
Unsigned Byte Peak Demand Current-B Minute
Unsigned Byte Spare
40521-524 Unsigned Short 1 Peak Demand Current-C
Unsigned Byte Peak Demand Current-C Year
Unsigned Byte Peak Demand Current-C Month
Unsigned Byte Peak Demand Current-C Day
Unsigned Byte Peak Demand Current-C Hour
Unsigned Byte Peak Demand Current-C Minute
Unsigned Byte Spare
40525-528 Unsigned Short 1 Peak Demand Current-N
Unsigned Byte Peak Demand Current-C Year
Unsigned Byte Peak Demand Current-C Month
Unsigned Byte Peak Demand Current-N Day
Unsigned Byte Peak Demand Current-N Hour
Unsigned Byte Peak Demand Current-N Minute
Unsigned Byte Spare
40529-533 Signed Long 1 Peak Demand KWatts-A
Unsigned Byte Peak Demand KWatts-A Year
Unsigned Byte Peak Demand KWatts-A Month
Unsigned Byte Peak Demand KWatts-A Day
Unsigned Byte Peak Demand KWatts-A Hour
Unsigned Byte Peak Demand KWatts-A Minute
Unsigned Byte Spare
40534-538 Signed Long 1 Peak Demand KWatts-B
Unsigned Byte Peak Demand KWatts-B Year
Unsigned Byte Peak Demand KWatts-B Month
Unsigned Byte Peak Demand KWatts-B Day
Unsigned Byte Peak Demand KWatts-B Hour
Unsigned Byte Peak Demand KWatts-B Minute
Unsigned Byte Spare
40539-543 Signed Long 1 Peak Demand KWatts-C
Unsigned Byte Peak Demand KWatts-C Year
Unsigned Byte Peak Demand KWatts-C Month
Unsigned Byte Peak Demand KWatts-C Day
Unsigned Byte Peak Demand KWatts-C Hour
Unsigned Byte Peak Demand KWatts-C Minute
Unsigned Byte Spare
40544-548 Signed Long 1 3 Phase Peak Demand KWatts
Unsigned Byte 3 Phase Peak Demand KWatts Year
Unsigned Byte 3 Phase Peak Demand KWatts Month
Unsigned Byte 3 Phase Peak Demand KWatts Day
Unsigned Byte 3 Phase Peak Demand KWatts Hour
Unsigned Byte 3 Phase Peak Demand KWatts Minute
Unsigned Byte Spare
40549-553 Signed Long 1 Peak Demand KVARs-A
Unsigned Byte Peak Demand KVARs-A Year
Unsigned Byte Peak Demand KVARs-A Month
Unsigned Byte Peak Demand KVARs-A Day
Unsigned Byte Peak Demand KVARs-A Hour
Unsigned Byte Peak Demand KVARs-A Minute
Unsigned Byte Spare
40554-558: Signed Long 1 Peak Demand KVARs-B
Unsigned Byte Peak Demand KVARs-B Year

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REGISTER DATA SIZE SCALE DESCRIPTION


Unsigned Byte Peak Demand KVARs-B Month
Unsigned Byte Peak Demand KVARs-B Day
Unsigned Byte Peak Demand KVARs-B Hour
Unsigned Byte Peak Demand KVARs-B Minute
Unsigned Byte Spare
40559-563: Signed Long 1 Peak Demand KVARs-C
Unsigned Byte Peak Demand KVARs-C Year
Unsigned Byte Peak Demand KVARs-C Month
Unsigned Byte Peak Demand KVARs-C Day
Unsigned Byte Peak Demand KVARs-C Hour
Unsigned Byte Peak Demand KVARs-C Minute
Unsigned Byte Spare
40564-568 Signed Long 1 3 Phase Peak Demand KWatts
Unsigned Byte 3 Phase Peak Demand KVARs Year
Unsigned Byte 3 Phase Peak Demand KVARs Month
Unsigned Byte 3 Phase Peak Demand KVARs Day
Unsigned Byte 3 Phase Peak Demand KVARs Hour
Unsigned Byte 3 Phase Peak Demand KVARs Minute
Unsigned Byte Spare

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5.1.6 RMS Minimum Demand Current/Real, Reactive Power Values and Time Stamps Block

REGISTER DATA SIZE SCALE DESCRIPTION


40641-644: Unsigned Short 1 Minimum Demand Current-A
Unsigned Byte Minimum Demand Current-A Year
Unsigned Byte Minimum Demand Current-A Month
Unsigned Byte Minimum Demand Current-A Day
Unsigned Byte Minimum Demand Current-A Hour
Unsigned Byte Minimum Demand Current-A Minute
Unsigned Byte Spare
40641-648: Unsigned Short 1 Minimum Demand Current-B
Unsigned Byte Minimum Demand Current-B Year
Unsigned Byte Minimum Demand Current-B Month
Unsigned Byte Minimum Demand Current-B Day
Unsigned Byte Minimum Demand Current-B Hour
Unsigned Byte Minimum Demand Current-B Minute
Unsigned Byte Spare
40649-652 Unsigned Short 1 Minimum Demand Current-C
Unsigned Byte Minimum Demand Current-C Year
Unsigned Byte Minimum Demand Current-C Month
Unsigned Byte Minimum Demand Current-C Day
Unsigned Byte Minimum Demand Current-C Hour
Unsigned Byte Minimum Demand Current-C Minute
Unsigned Byte Spare
40653-656 Unsigned Short 1 Minimum Demand Current-N
Unsigned Byte Minimum Demand Current-N Year
Unsigned Byte Minimum Demand Current-N Month
Unsigned Byte Minimum Demand Current-N Day
Unsigned Byte Minimum Demand Current-N Hour
Unsigned Byte Minimum Demand Current-N Minute
Unsigned Byte Spare
40657-661 Signed Long 1 Minimum Demand KWatts-A
Unsigned Byte Minimum Demand KWatts-A Year
Unsigned Byte Minimum Demand KWatts-A Month
Unsigned Byte Minimum Demand KWatts-A Day
Unsigned Byte Minimum Demand KWatts-A Hour
Unsigned Byte Minimum Demand KWatts-A Minute
Unsigned Byte Spare
40662-666 Signed Long 1 Minimum Demand KWatts-B
Unsigned Byte Minimum DemaNd KWatts-B Year
Unsigned Byte Minimum Demand KWatts-B Month
Unsigned Byte Minimum Demand KWatts-B Day
Unsigned Byte Minimum Demand KWatts-B Hour
Unsigned Byte Minimum Demand KWatts-B Minute
Unsigned Byte Spare
40667-671 Signed Long 1 Minimum Demand KWatts-C
Unsigned Byte Minimum DemaNd KWatts-C Year
Unsigned Byte Minimum Demand KWatts-C Month
Unsigned Byte Minimum Demand KWatts-C Dy
Unsigned Byte Minimum Demand KWatts-C Hour
Unsigned Byte Minimum Demand KWatts-C Minute
Unsigned Byte Spare
40672-676: Signed Long 1 3 Phase Minimum Demand KWatts
Unsigned Byte 3 Phase Minimum Demand KWatts Year
Unsigned Byte 3 Phase Minimum Demand KWatts Month
Unsigned Byte 3 Phase Minimum Demand KWatts Day
Unsigned Byte 3 Phase Minimum Demand KWatts Hour
Unsigned Byte 3 Phase Minimum Demand KWatts Minute
Unsigned Byte Spare
40677-681 Signed Long 1 Minimum Demand KVARs-A
Unsigned Byte Minimum Demand KVARs-A Year
Unsigned Byte Minimum Demand KVARs-A Month
Unsigned Byte Minimum Demand KVARs-A Day
Unsigned Byte Minimum Demand KVARs-A Hour
Unsigned Byte Minimum Demand KVARs-A Minute
Unsigned Byte Spare
40682-686: Signed Long 1 Minimum Demand KVARs-B
Unsigned Byte Minimum Demand KVARs-B Year

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REGISTER DATA SIZE SCALE DESCRIPTION


Unsigned Byte Minimum Demand KVARs-B Month
Unsigned Byte Minimum Demand KVARs-B Day
Unsigned Byte Minimum Demand KVARs-B Hour
Unsigned Byte Minimum Demand KVARs-B Minute
Unsigned Byte Spare
40687-691 Signed Long 1 Minimum Demand KVARs-C
Unsigned Byte Minimum Demand KVARs-C Year
Unsigned Byte Minimum Demand KVARs-C Month
Unsigned Byte Minimum Demand KVARs-C Day
Unsigned Byte Minimum Demand KVARs-C Hour
Unsigned Byte Minimum Demand KVARs-C Minute
Unsigned Byte Spare
40692-696 Signed Long 1 3 Phase Minimum Demand KVARs
Unsigned Byte 3 Phase Minimum Demand KVARs Year
Unsigned Byte 3 Phase Minimum Demand KVARs Month
Unsigned Byte 3 Phase Minimum Demand KVARs Day
Unsigned Byte 3 Phase Minimum Demand KVARs Hour
Unsigned Byte 3 Phase Minimum Demand KVARs Minute
Unsigned Byte Spare

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5.1.7 Counters Block

REGISTER DATA SIZE SCALE DESCRIPTION DEVICE


40769 Unsigned Short 1 Unreported Operations Counter ALL
40770 Unsigned Short 1 Unreported Fault Counter ALL
40771 Unsigned Short 1 Sum of Fault Currents, A ALL
40772 Unsigned Short 1 Sum of Fault Currents, B ALL
40773 Unsigned Short 1 Sum of Fault Currents, C ALL
40774 Unsigned Short 1 Overcurrent Trip Counter PCD
40775 Unsigned Short 1 Breaker Operations Counter PCD
40776 Unsigned Short 1 Recloser Counter 1 PCD
40777 Unsigned Short 1 Recloser Counter 2 PCD
40778 Unsigned Short 1 Stage 1 Reclose Counter PCD
40779 Unsigned Short 1 Stage 2 Reclose Counter PCD
40780 Unsigned Short 1 Stage 3 Reclose Counter PCD
40781 Unsigned Short 1 Stage 4 Reclose Counter PCD
40782 Unsigned Short 1 Phase A Overcurrent Trip Counter PCD
40783 Unsigned Short 1 Phase B Overcurrent Trip Counter PCD
40784 Unsigned Short 1 Phase C Overcurrent Trip Counter PCD
40785 Unsigned Short 1 Neutral Overcurrent Trip Counter PCD
40786 Unsigned Short 1 Phase A, Total Pole Operations Counter PCD
40787 Unsigned Short 1 Phase A, Total Reclose Counter 1 PCD
40788 Unsigned Short 1 Phase A, Total Reclose Counter 2 PCD
40789 Unsigned Short 1 Phase A, Stage 1 Reclose Counter PCD
40790 Unsigned Short 1 Phase A, Stage 2 Reclose Counter PCD
40791 Unsigned Short 1 Phase A, Stage 3 Reclose Counter PCD
40792 Unsigned Short 1 Phase A, Stage 4 Reclose Counter PCD
40793 Unsigned Short 1 Phase B, Total Pole Operations Counter PCD
40794 Unsigned Short 1 Phase B, Total Reclose Counter 1 PCD
40795 Unsigned Short 1 Phase B, Total Reclose Counter 2 PCD
40796 Unsigned Short 1 Phase B, Stage 1 Reclose Counter PCD
40797 Unsigned Short 1 Phase B, Stage 2 Reclose Counter PCD
40798 Unsigned Short 1 Phase B, Stage 3 Reclose Counter PCD
40799 Unsigned Short 1 Phase B, Stage 4 Reclose Counter PCD
40800 Unsigned Short 1 Phase C, Total Pole Operations Counter PCD
40801 Unsigned Short 1 Phase C, Total Reclose Counter 1 PCD
40802 Unsigned Short 1 Phase C, Total Reclose Counter 2 PCD
40803 Unsigned Short 1 Phase C, Stage 1 Reclose Counter PCD
40804 Unsigned Short 1 Phase C, Stage 2 Reclose Counter PCD
40805 Unsigned Short 1 Phase C, Stage 3 Reclose Counter PCD
40806 Unsigned Short 1 Phase C, Stage 4 Reclose Counter PCD
40807 Unsigned Short 1 Fault Indications Counter SCD
40808 Unsigned Short 1 Ph A Faults detected counter SCD
40809 Unsigned Short 1 Ph B Faults detected counter SCD
40810 Unsigned Short 1 Ph C Faults detected counter SCD
40811 Unsigned Short 1 Ph N Faults detected counter SCD
40812 Unsigned Short 1 Switch 1 Operations Counter SCD
40813 Unsigned Short 1 Switch 2 Operations Counter SCD
40814 Unsigned Short 1 Switch 3 Operations Counter SCD
40815 Unsigned Short 1 Switch 4 Operations Counter SCD
40816 - 8 Reserved
40819 Unsigned short 1 Sectionalizer step count SCD

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5.1.8 Physical and Logical Input/Output State Block

Note: * Indicates Sealed In output.


REGISTER DATA SIZE DESCRIPTION
40897-898 Unsigned Long Logical Output 0-31
Bit 31: TRIP Bit 15: 81S-1
Bit 30: CLOSE Bit 14: 81R-1
Bit 29: ALARM Bit 13: PATA
Bit 28: 27-1P Bit 12: PBTA
Bit 27: 46 Bit 11: PCTA
Bit 26: 50P-1 Bit 10: TCFA
Bit 25: 50N-1 Bit 9: TCC
Bit 24: 50P-2 Bit 8: 79DA
Bit 23: 50N-2 Bit 7: PUA
Bit 22: 50P-3 Bit 6: 79LOA
Bit 21: 50N-3 Bit 5: BFA
Bit 20: 51P Bit 4: PDA
Bit 19: 51N Bit 3: NDA
Bit 18: 59 Bit 2: BFUA
Bit 17: 67P Bit 1: KSI
Bit 16: 67N Bit 0: 79CA1
40899-900 Unsigned Long Logical Output 32-63
Bit 31: HPFA Bit 15: TRIPC
Bit 30: LPFA Bit 14: 27-1P*
Bit 29: OCTC Bit 13: 46*
Bit 28: 50-1D Bit 12: 50P-1*
Bit 27: 50-2D Bit 11: 50N-1*
Bit 26: STC Bit 10: 50P-2*
Bit 25: ZSC Bit 9: 50N-2*
Bit 24: PH3-D Bit 8: 50P-3*
Bit 23: GRD-D Bit 7: 50N-3*
Bit 22: 32PA Bit 6: 51P*
Bit 21: 32NA Bit 5: 51N*
Bit 20: 27-3P Bit 4: 59*
Bit 19: VARDA Bit 3: 67P*
Bit 18: 79CA2 Bit 2: 67N*
Bit 17: TRIPA Bit 1: 81S-1*
Bit 16: TRIPB Bit 0: 81R-1*
40901-902 Unsigned Long Logical Output 64-95
Bit 31: 81O-1* Bit 15: LOADA
Bit 30: 27-3P* Bit 14: 81O-1
Bit 29: TRIPA* Bit 13: 81O-2
Bit 28: TRIPB* Bit 12: 81S-2
Bit 27: TRIPC* Bit 11: 81R-2
Bit 26: ULO1 Bit 10: 81O-2*
Bit 25: ULO2 Bit 9: 81S-2*
Bit 24: ULO3 Bit 8: 81R-2*
Bit 23: ULO4 Bit 7: CLTA
Bit 22: ULO5 Bit 6: Watt1
Bit 21: ULO6 Bit 5: Watt2
Bit 20: ULO7 Bit 4: 79CA1*
Bit 19: ULO8 Bit 3: 79CA2*
Bit 18: ULO9 Bit 2: SEF*
Bit 17: PVARA Bit 1: SEF alarm
Bit 16: NVARA Bit 0: PUA w/out SEF
40903-904 Unsigned Long Logical Output 96-127
Bit 31: BF Trip Bit 15: 27C*
Bit 30: BF Retrip Bit 14: LOAC*
Bit 29: BF Trip* Bit 13: TAGOPN
Bit 28: BF Retrip* Bit 12: TAGCLS
Bit 27: 32P Bit 11: 59A
Bit 26: 32N Bit 10: 59B
Bit 25: 32P* Bit 9: 59C
Bit 24: 32N* Bit 8: 59-3P
Bit 23: BFA* Bit 7: 59A*
Bit 22: RBA Bit 6: 59B*
Bit 21: 27A Bit 5: 59C*
Bit 20: 27B Bit 4: 59-3P*
Bit 19: 27C Bit 3: PTA

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REGISTER DATA SIZE DESCRIPTION


Bit 18: LOAC Bit 2: NTA
Bit 17: 27A* Bit 1: CLOSEA
Bit 16: 27B* Bit 0: CLOSEB
40905-906 Unsigned Long Logical Input 0-31
Bit 31: 52a Bit 15: WCI
Bit 30: 52b Bit 14: ZSC
Bit 29: 43a Bit 13: OPEN
Bit 28: PH3 Bit 12: CLOSE
Bit 27: GRD Bit 11: 46
Bit 26: SCC Bit 10: 67P
Bit 25: 79s Bit 9: 67N
Bit 24: 79m Bit 8: ULI1
Bit 23: TCM Bit 7: ULI2
Bit 22: 50-1 Bit 6: ULI3
Bit 21: 50-2 Bit 5: ULI4
Bit 20: 50-3 Bit 4: ULI5
Bit 19: ALT1 Bit 3: ULI6
Bit 18: ALT2 Bit 2: ULI7
Bit 17: ECI1 Bit 1: ULI8
Bit 16: ECI2 Bit 0: ULI9
40907-908 Unsigned Long Logical Input 32-63
Bit 31: CRI Bit 15: 52aC
Bit 30: ARCI Bit 14: 52bA
Bit 29: TARC Bit 13: 52bB
Bit 28: SEF TC Bit 12: 52bC
Bit 27: Ext BFI Bit 11: TRIPA
Bit 26: BFI Bit 10: TRIPB
Bit 25: RBI Bit 9: TRIPC
Bit 24: ALT1Pon Bit 8: CLOSEA
Bit 23: ALT1Poff Bit 7: CLOSEB
Bit 22: ALT2Pon Bit 6: CLOSEC
Bit 21: ALT2Poff Bit 5: SW1-52a
Bit 20: OPNBLK Bit 4: SW1-52B
Bit 19: CLSBLK Bit 3: SW2-52a
Bit 18: TAGMSG Bit 2: SW2-52b
Bit 17: 52aA Bit 1: SW3-52a
Bit 16: 52aB Bit 0: SW3-52b
40909-910 Unsigned Long Logical Input 64-95
Bit 31: SW4-52a Bit 15: RSTRPS
Bit 30: SW4-52b Bit 14: RSTRSP
Bit 29: OPEN1 Bit 13: RST_TA
Bit 28: CLOSE1 Bit 12: RST_SA
Bit 27: OPEN2 Bit 11: Reserved
Bit 26: CLOSE2 Bit 10: Reserved
Bit 25: OPEN3 Bit 9: Reserved
Bit 24: CLOSE3 Bit 8: Reserved
Bit 23: OPEN4 Bit 7: Reserved
Bit 22: CLOSE4 Bit 6: Reserved
Bit 21: SECBLK Bit 5: Reserved
Bit 20: OSLIM Bit 4: Reserved
Bit 19: FLTDET Bit 3: Reserved
Bit 18: XFERBLK Bit 2: Reserved
Bit 17: XFERPS Bit 1: Reserved
Bit 16: XFERSP Bit 0: Reserved
40911-912 Unsigned Long Logical Input 96-127 (Reserved)
40913 Unsigned Long Physical Output
Bit 31: OUT32 Bit 15: OUT16
Bit 30: OUT31 Bit 14: OUT15
Bit 29: OUT30 Bit 13: OUT14
Bit 28: OUT29 Bit 12: OUT13
Bit 27: OUT28 Bit 11: OUT12
Bit 26: OUT27 Bit 10: OUT11
Bit 25: OUT26 Bit 9: OUT10
Bit 24: OUT25 Bit 8: OUT9
Bit 23: OUT24 Bit 7: OUT8
Bit 22: OUT23 Bit 6: OUT7
Bit 21: OUT22 Bit 5: OUT6
Bit 20: OUT21 Bit 4: OUT5

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REGISTER DATA SIZE DESCRIPTION


Bit 19: OUT20 Bit 3: OUT4
Bit 18: OUT19 Bit 2: OUT3
Bit 17: OUT18 Bit 1: OUT2
Bit 16: OUT17 Bit 0: OUT1
40915 Unsigned Long Physical Input
Bit 31: IN32 Bit 15: IN16
Bit 30: IN31 Bit 14: IN15
Bit 29: IN30 Bit 13: IN14
Bit 28: IN29 Bit 12: IN13
Bit 27: IN28 Bit 11: IN12
Bit 26: IN27 Bit 10: IN11
Bit 25: IN26 Bit 9: IN10
Bit 24: IN25 Bit 8: IN9
Bit 23: IN24 Bit 7: IN8
Bit 22: IN23 Bit 6: IN7
Bit 21: IN22 Bit 5: IN6
Bit 20: IN21 Bit 4: IN5
Bit 19: IN20 Bit 3: IN4
Bit 18: IN19 Bit 2: IN3
Bit 17: IN18 Bit 1: IN2
Bit 16: IN17 Bit 0: IN1
40917 Unsigned Long Force Physical Input Select Status (Bit State: 0=Normal, 1=Forced)
40919 Unsigned Long Force Physical Input Select Status (Bit State: 0=Open, 1=Closed)
Bit 31: IN32 Bit 15: IN16
Bit 30: IN31 Bit 14: IN15
Bit 29: IN30 Bit 13: IN14
Bit 28: IN29 Bit 12: IN13
Bit 27: IN28 Bit 11: IN12
Bit 26: IN27 Bit 10: IN11
Bit 25: IN26 Bit 9: IN10
Bit 24: IN25 Bit 8: IN9
Bit 23: IN24 Bit 7: IN8
Bit 22: IN23 Bit 6: IN7
Bit 21: IN22 Bit 5: IN6
Bit 20: IN21 Bit 4: IN5
Bit 19: IN20 Bit 3: IN4
Bit 18: IN19 Bit 2: IN3
Bit 17: IN18 Bit 1: IN2
Bit 16: IN17 Bit 0: IN1

40921 Unsigned Long Force Physical Output Select Status (Bit State: 0=Normal, 1=Forced)
40923: Unsigned Long Force Physical Output Select Status (Bit State: 0=Deasserted, 1=Asserted)
Bit 31: OUT32 Bit 15: OUT16
Bit 30: OUT31 Bit 14: OUT15
Bit 29: OUT30 Bit 13: OUT14
Bit 28: OUT29 Bit 12: OUT13
Bit 27: OUT28 Bit 11: OUT12
Bit 26: OUT27 Bit 10: OUT11
Bit 25: OUT26 Bit 9: OUT10
Bit 24: OUT25 Bit 8: OUT9
Bit 23: OUT24 Bit 7: OUT8
Bit 22: OUT23 Bit 6: OUT7
Bit 21: OUT22 Bit 5: OUT6
Bit 20: OUT21 Bit 4: OUT5
Bit 19: OUT20 Bit 3: OUT4
Bit 18: OUT19 Bit 2: OUT3
Bit 17: OUT18 Bit 1: OUT2
Bit 16: OUT17 Bit 0: OUT1
40925 Unsigned Long Force Logical Input Select Status (Bit State: 0=Normal, 1=Forced)
40927 Unsigned Long Force Logical Input Select Status (Bit State: 0=On, 1=Off)
Bit 31: FLI32 Bit 15: FLI16
Bit 30: FLI31 Bit 14: FLI15
Bit 29: FLI30 Bit 13: FLI14
Bit 28: FLI29 Bit 12: FLI13
Bit 27: FLI28 Bit 11: FLI12
Bit 26: FLI27 Bit 10: FLI11
Bit 25: FLI26 Bit 09: FLI10
Bit 24: FLI25 Bit 08: FLI09

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REGISTER DATA SIZE DESCRIPTION


Bit 23: FLI24 Bit 07: FLI08
Bit 22: FLI23 Bit 06: FLI07
Bit 21: FLI22 Bit 05: FLI06
Bit 20: FLI21 Bit 04: FLI05
Bit 19: FLI20 Bit 03: FLI04
Bit 18: FLI19 Bit 02: FLI03
Bit 17: FLI18 Bit 01: FLI02
Bit 16: FLI17 Bit 00: FLI01
40929 Unsigned Long Front Panel Function Status (Bit State: 0=On, 1=Off)
Bit 31: Spare Bit 15: Bank2 Active
Bit 30: Spare Bit 14: Bank1 Active
Bit 29: Spare Bit 13: Spare
Bit 28: Spare Bit 12: Spare
Bit 27: Spare Bit 11: Spare
Bit 26: ALT2 Pending Bit 10: Spare
Bit 25: ALT1 Pending Bit 09: Spare
Bit 24: Primary Pending Bit 08: Spare
Bit 23: Spare Bit 07: Spare
Bit 22: Spare Bit 06: Spare
Bit 21: Spare Bit 05: Spare
Bit 20: Spare Bit 04: Spare
Bit 19: Spare Bit 03: Reclose Block
Bit 18: ALT2 Active Bit 02: SEF Block
Bit 17: ALT1 Active Bit 01: Ground Block
Bit 16: Primary Active Bit 00: Remote Block
40931 Unsigned Long Target Status (Bit State: 0=On, 1=Off)
Bit 31: Spare Bit 15: Spare
Bit 30: Spare Bit 14: Spare
Bit 29: Spare Bit 13: Spare
Bit 28: Spare Bit 12: Spare
Bit 27: Spare Bit 11: Spare
Bit 26: Frequency Bit 10: Spare
Bit 25: SEF Bit 09: Spare
Bit 24: Directional Bit 08: Spare
Bit 23: Neg. Seq. Bit 07: Spare
Bit 22: Inst. Trip Bit 06: Spare
Bit 21: Time Trip Bit 05: Spare
Bit 20: PTA Bit 04: Spare
Bit 19: NTA Bit 03: PUTN
Bit 18: PCTA Bit 02: PUTC
Bit 17: PBTA Bit 01: PUTB
Bit 16: PATA Bit 00: PUTA
40933 Unsigned Long Breaker Status
Bit 31: Spare Bit 15: Spare
Bit 30: Spare Bit 14: Spare
Bit 29: Spare Bit 13: Spare
Bit 28: Spare Bit 12: Spare
Bit 27: Spare Bit 11: Spare
Bit 26: Spare Bit 10: Spare
Bit 25: Spare Bit 09: Spare
Bit 24: Spare Bit 08: ΦC: 1=Lockout
Bit 23: Spare Bit 07: ΦB: 1=Lockout
Bit 22: Spare Bit 06: ΦA: 1=Lockout
Bit 21: Spare Bit 05: ΦC: 1=Failed
Bit 20: Spare Bit 04: ΦB: 1=Failed
Bit 19: Spare Bit 03: ΦA: 1=Failed
Bit 18: Spare Bit 02: ΦC: 1=Open
Bit 17: Spare Bit 01: ΦB: 1=Open
Bit 16: Spare Bit 00: ΦA: 1=Open
40935 Unsigned Long Logical Output 128-159
Bit 31: CLOSEC Bit 15: 50-3A
Bit 30: FAILA Bit 14: 50-3B
Bit 29: FAILB Bit 13: 50-3C
Bit 28: FAILC Bit 12: 50-3A*
Bit 27: 50-1A Bit 11: 50-3B*
Bit 26: 50-1B Bit 10: 50-3C*
Bit 25: 50-1C Bit 9: 51A

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REGISTER DATA SIZE DESCRIPTION


Bit 24: 50-1A* Bit 8: 51B
Bit 23: 50-1B* Bit 7: 51C
Bit 22: 50-1C* Bit 6: 51A*
Bit 21: 50-2A Bit 5: 51B*
Bit 20: 50-2B Bit 4: 51C*
Bit 19: 50-2C Bit 3: 67A
Bit 18: 50-2A* Bit 2: 67B
Bit 17: 50-2B* Bit 1: 67C
Bit 16: 50-2C* Bit 0: 67A*
40937 Unsigned Long Logical Output 160-191
Bit 31: 67B* Bit 15: SW4FAIL
Bit 30: 67C* Bit 14: FLTDET
Bit 29: LOCKA Bit 13: FLTDET*
Bit 28: LOCKB Bit 12: SW1ALM
Bit 27: LOCKC Bit 11: SW2ALM
Bit 26: SW1OPEN Bit 10: SW3ALM
Bit 25: SW1CLOSE Bit 9: SW4ALM
Bit 24: SW1FAIL Bit 8: SW1ALM*
Bit 23: SW2OPEN Bit 7: SW2ALM*
Bit 22: SW2CLOSE Bit 6: SW3ALM*
Bit 21: SW2FAIL Bit 5: SW4ALM*
Bit 20: SW3OPEN Bit 4: SECALM
Bit 19: SW3CLOSE Bit 3: OSALM
Bit 18: SW3FAIL Bit 2: PSXFER
Bit 17: SW4OPEN Bit 1: SPXFER
Bit 16: SW4CLOSE Bit 0: PSXFER*
40939 Unsigned Long Logical Output 192-223
Bit 31: SPXFER* Bit 15: ALT2_ACTIVE
Bit 30: LCMTRIP Bit 14: Bank1 active
Bit 29: LCMTRIP* Bit 13: Bank2 active
Bit 28: LCMCLOSE Bit 12: Reserved
Bit 27: LCMCLOSE* Bit 11: Reserved
Bit 26: TAGBTN Bit 10: Reserved
Bit 25: LCMMIDPOINT Bit 9: Reserved
Bit 24: LCMMIDPOINT* Bit 8: Reserved
Bit 23: ISD_TRIPA Bit 7: Reserved
Bit 22: ISD_TRIPB Bit 6: Reserved
Bit 21: ISD_TRIPC Bit 5: Reserved
Bit 20: ISD_TRIG Bit 4: Reserved
Bit 19: CPU_BATT_FAIL Bit 3: Reserved
Bit 18: BATT_FAIL Bit 2: Reserved
Bit 17: PRIM_ACTIVE Bit 1: Reserved
Bit 16: ALT1_ACTIVE Bit 0: Reserved
40941 Unsigned Long Logical Output 224-255 (Reserved)
40943 Unsigned Long Logical Input 128-159 (Reserved)
40945 Unsigned Long Logical Input 160-191 (Reserved)
40947 Unsigned Long Logical Input 192-223 (Reserved)
40949 Unsigned Long Logical Input 224-255 (Reserved)
40951-2 Unsigned Long LCM Status
Bit 31: LCM Reset: 0 = Yes, 1 = No
Bit 30: Source 1 Phase A: 0 = De-energized, 1 = Energized
Bit 29: Source 1 Phase B: 0 = De-energized, 1 = Energized
Bit 28: Source 1 Phase C: 0 = De-energized, 1 = Energized
Bit 27: Source 2 Phase A: 0 = De-energized, 1 = Energized
Bit 26: Source 2 Phase B: 0 = De-energized, 1 = Energized
Bit 25: Source 2 Phase C: 0 = De-energized, 1 = Energized
Bit 24: Source I: 0 = Disabled, 1 = Enabled
Bit 23: Source II: 0 = Disabled, 1 = Enabled
Bit 22: LCM Test Mode: 0 = Off, 1 = On
Bits 21 - 00: Spare

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ABB Inc.

5.2 FUNCTION CODE 16 (PRESET MULTIPLE REGISTER)

The control mask block allows a master device to write data to the Modbus interface to perform the
desired control function. The block is a set of bit masks and an execute register that allows the
master different levels of security for device control. This allows the master to verify the integrity of
the data transmission by reading (function code 3) the register confirming that the correct data was
written. The functions designated by * are sealed in alarms and can only be cleared, an attempt to set
these alarms will have no impact on their state.
There are six control blocks that a user can write to currently. We will take the example where a user
needs to Initiate Trip in the Initiate Input block. The block on which the user wants to operate has to
be unprotected before it is written into. There are two ways to unprotect the control blocks and initiate
the command on the control block.

1) Through setting the Security Mask:


The security mask (register 41153) is a read only register and the user cannot write to it. To set the
Security Mask, the user has to write to the register 62598. So, the first step in our case of initiating a
Trip is to set bit 0 on the security mask. Thus writing a hex 0001 into register 62598 will give the user
access to the Initiate Input control block. With this bit set, the user does not have to enter a password
into registers 41411 and 41412.

register 41158 hex 0001 selects the trip initiate input


register 41159 hex 0001 confirms Trip Initiate
register 41154 hex 0001 allows slave to Execute on the data if the block is

Through writing password into registers 41155 and 41156:


This method is straight forward and the access to the block is obtained by writing the relay password
into the block. Now with the block available to operate on, the master writes the following data to
registers:

register 41155 hex xxxx password (high) to the block (Relay or Test password)
register 41156 hex xxxx password (low) to the block (Relay or Test password)
register 41158 hex 0001 selects the trip initiate input
register 41159 hex 0001 confirms Trip Initiate
register 41154 hex 0001 allows slave to Execute on the data if the block is

Note that Execute is the last write to the block. The above data may be sent all in one command or
it may be written in three different commands.

An example of how set/reset logical outputs is shown below. The master writes the following data to
registers

register 41189 hex 8010 selects the 27-3P seal in alarm and the ULO8 user logical
register 41193 hex 0010 resets 27-3P seal in alarm and sets ULO8 user logical

Now, the master can confirm the data written above by issuing a read holding register command to
registers 41444 and 41448 prior to sending the execute data register for that block. The following
write to register 41440 will allow the slave to carry out the actions set up in the above registers.

register 41184 hex 0001 allows the data from registers 41189 & 41193 to be executed
by the slave device.

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5.2.1 Control Mask Block (Read and Write)

REGISTER DATA SIZE DESCRIPTION


41153 Unsigned Short Security Mask (Read Only, See Register 62598 for setup)
(bit state:0=Block Password Required, 1=Block Unprotected)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Pulse Outputs
Bit 12: LCM Control Inputs Bit 4: Set Reset Outputs
Bit 11: Spare Bit 3: Force logical Input
Bit 10: Spare Bit 2: Force Physical Output
Bit 9: Spare Bit 1: Force Physical Input
Bit 8: Spare Bit 0: Initiate Input
41154 Unsigned Short Execute on Initiate Input Registers (0=No Action,1=Execute)
41155 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41156 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41157 Unsigned Short Spare
41158 Unsigned Short Change Initiate Input Mask (bit state:0=No change, 1=Change)
Bit 15: Spare Bit 7: UPS Bat. Test
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Close Initiate
(Independent of 43A)
Bit 12: Reset Energy Meters Bit 4: Spare
Bit 11: Reset Relay Status Bit 3: Reclose Unblock
Bit 10: Reset Min/Max Demands Bit 2: Reclose Block
Bit 9: Reset Alarms Bit 1: Close Initiate
(Based on State of 43A)
Bit 8: Reset LED Targets Bit 0: Trip Initiate
41159 Unsigned Short Confirmation Initiate Input Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this register.

REGISTER DATA SIZE DESCRIPTION


41160 Unsigned Short Execute on Force Physical Input Registers (0=No Action, 1=Execute)
41161 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41162 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41163 Unsigned Short Spare
41164 Unsigned Long Force Physical Input Change Mask (bit state:0=No change, 1=Change)
41166 Unsigned Long Force Physical Input Normal State Mask
(bit state:0=Normal State, 1=Normal State Override)
41168 Unsigned Long Force Physical Input Forcing State Mask
(bit state:0=Force Reset State, 1=Force Set State)
Bit 31: IN32 Bit 15: IN16
Bit 30: IN31 Bit 14: IN15
Bit 29: IN30 Bit 13: IN14
Bit 28: IN29 Bit 12: IN13
Bit 27: IN28 Bit 11: IN12
Bit 26: IN27 Bit 10: IN11
Bit 25: IN26 Bit 9: IN10
Bit 24: IN25 Bit 8: IN9
Bit 23: IN24 Bit 7: IN8
Bit 22: IN23 Bit 6: IN7
Bit 21: IN22 Bit 5: IN6
Bit 20: IN21 Bit 4: IN5
Bit 19: IN20 Bit 3: IN4
Bit 18: IN19 Bit 2: IN3
Bit 17: IN18 Bit 1: IN2
Bit 16: IN17 Bit 0: IN1

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REGISTER DATA SIZE DESCRIPTION


41170 Unsigned Short Execute on Force Physical Output Registers (0=No Action, 1=Execute)

41171 high byte Relay or Test Password Character 1


low byte Relay or Test Password Character 2
41172 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41173 Unsigned Short Spare
41174 Unsigned Long Force Physical Output Change Mask
(bit state:0=No change, 1=Change)
41176 Unsigned Long Force Physical Output Normal State Mask
(bit state:0=Normal State, 1=Normal State Override)
41178 Unsigned Long Force Physical Output Forcing State Mask
(bit state:0=Force Reset State, 1=Force Set State)
Bit 31: OUT32 Bit 23: OUT24 Bit 15: OUT16 Bit 7: OUT8
Bit 30: OUT31 Bit 22: OUT23 Bit 14: OUT15 Bit 6: OUT7
Bit 29: OUT30 Bit 21: OUT22 Bit 13: OUT14 Bit 5: OUT6
Bit 28: OUT29 Bit 20: OUT21 Bit 12: OUT13 Bit 4: OUT5
Bit 27: OUT28 Bit 19: OUT20 Bit 11: OUT12 Bit 3: OUT4
Bit 26: OUT27 Bit 18: OUT19 Bit 10: OUT11 Bit 2: OUT3
Bit 25: OUT26 Bit 17: OUT18 Bit 09: OUT10 Bit 1: OUT2
Bit 24: OUT25 Bit 16: OUT17 Bit 08: OUT9 Bit 0: OUT1

REGISTER DATA SIZE DESCRIPTION


41180 Unsigned Short Execute on Force Logical Input Registers (0=No Action, 1=Execute)
41181 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41182 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41183 Unsigned Short Spare
41184 Unsigned Short Force Logical Input Change Mask (Bit 31-16)
(bit state:0=No change, 1=Change)
41185 Unsigned Short Force Logical Input Change Mask (Bit 15-0)
(bit state:0=No change, 1=Change)
41186 Unsigned Short Force Logical Input Normal State Mask (Bit 31-16)
(bit state:0=Normal State, 1=Normal State Override)
41187 Unsigned Short Force Logical Input Normal State Mask (Bit 15-0)
(bit state:0=Normal State, 1=Normal State Override)
41188 Unsigned Short Force Logical Input Forcing State Mask (Bit 31-16)
(bit state:0=Force Reset State, 1=Force Set State)
41189 Unsigned Short Force Logical Input Forcing State Mask (Bit 15-0)
(bit state:0=Force Reset State, 1=Force Set State)
Bit 31: FLI32 Bit 23: FLI24 Bit 15: FLI16 Bit 07: FLI08
Bit 30: FLI31 Bit 22: FLI23 Bit 14: FLI15 Bit 06: FLI07
Bit 29: FLI30 Bit 21: FLI22 Bit 13: FLI14 Bit 05: FLI06
Bit 28: FLI29 Bit 20: FLI21 Bit 12: FLI13 Bit 04: FLI05
Bit 27: FLI28 Bit 19: FLI20 Bit 11: FLI12 Bit 03: FLI04
Bit 26: FLI27 Bit 18: FLI19 Bit 10: FLI11 Bit 02: FLI03
Bit 25: FLI26 Bit 17: FLI18 Bit 09: FLI10 Bit 01: FLI02
Bit 24: FLI25 Bit 16: FLI17 Bit 08: FLI09 Bit 00: FLI01

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REGISTER DATA SIZE DESCRIPTION


41190 Unsigned Short Execute on Set/Reset Masks Word 1 and Word 2 Registers
41191 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41192 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41193 Unsigned Short Spare
41194 Unsigned Short Set/Reset Change Mask Long Word 1(Bit 31-16)
41195 Unsigned Short Set/Reset Change Mask Long Word 1(Bit 15-0)
(bit state:0=No change, 1=Change)
41196 Unsigned Short Set/Reset Change Mask Long Word 2(Bit 31-16)
41197 Unsigned Short Set/Reset Change Mask Long Word 2(Bit 15-0)
(bit state:0=No change, 1=Change)
41198 Unsigned Short Set/Reset State Mask Long Word 1(Bit 31-16)
41199 Unsigned Short Set/Reset State Mask Long Word 1(Bit 15-0)
(bit state:0=Reset, 1=Set)
41200 Unsigned Short Set/Reset State Mask Long Word 2(Bit 31-16)
41201 Unsigned Short Set/Reset State Mask Long Word 2(Bit 15-0)
(bit state:0=Reset, 1=Set)

SET/RESET MASK LONG WORD 1 SET/RESET MASK LONG WORD 2


Bit 31: 27* Bit 15: 27-3P* Bit 31: 79CA1* Bit 15: 50-1A*
Bit 30: 46* Bit 14: TRIPA* Bit 30: 79CA2* Bit 14: 50-1B*
1
Bit 29: 50P1* Bit 13: TRIPB* Bit 29: SEF* Bit 13: 50-1C*
Bit 28: 50N1* Bit 12: TRIPC* Bit 28: BF Trip* Bit 12: 50-2A*
1
Bit 27: 50P2* Bit 11: ULO1 Bit 27: BF Retrip* Bit 11: 50-2B*
Bit 26: 50N2* Bit 10: ULO2 Bit 26: 32P* Bit 10: 50-2C*
1
Bit 25: 50P3* Bit 09: ULO3 Bit 25: 32N* Bit 09: 50-3A*
Bit 24: 50N3* Bit 08: ULO4 Bit 24: BFA* Bit 08: 50-3B*
1
Bit 23: 51P* Bit 07: ULO5 Bit 23: 27A* Bit 07: 50-3C*
Bit 22: 51N* Bit 06: ULO6 Bit 22: 27B* Bit 06: 51A*
Bit 21: 59* Bit 05: ULO7 Bit 21: 27C* Bit 05: 51B*
1
Bit 20: 67P* Bit 04: ULO8 Bit 20: LOAC* Bit 04: 51C*
Bit 19: 67N* Bit 03: ULO9 Bit 19: 59A* Bit 03: 67A*
Bit 18: 81S-1* Bit 02: 81O-2* Bit 18: 59B* Bit 02: 67B*
Bit 17: 81R-1* Bit 01: 81S-2* Bit 17: 59C* Bit 01: 67C*
Bit 16: 81O-1* Bit 00: 81R-2* Bit 16: 59-3P* Bit 00:

Note: * You can only Reset "*" outputs. Trying to set these will have no affect on the state of the
sealed in alarms.

Note: 1 (50P1*, 50P2*, 50P3*, 51P*, 67P*) are “read only” bits. They can not be reset independently.
They are derived from the respective three-phase seal-in signals (bits 1 – 15 of long word 2). They
will be reset when the individual three-phase bits are set

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REGISTER DATA SIZE DESCRIPTION


41202 Unsigned Short Execute on Momentary Output Contact Registers (0=No Action,1=Execute)
41203 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41204 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41205 Unsigned Short Spare
41206 Unsigned Long Momentary Output Contact State Mask
(bit state:0=No change, 1=Pulse Contact)
41208 Unsigned Long Confirmation Momentary Output Contact State Mask
(bit state:0=No change, 1=Pulse Contact)
Momentary Output Contact State Mask
Bit 31: OUT32 Bit 15: OUT16
Bit 30: OUT31 Bit 14: OUT15
Bit 29: OUT30 Bit 13: OUT14
Bit 28: OUT29 Bit 12: OUT13
Bit 27: OUT28 Bit 11: OUT12
Bit 26: OUT27 Bit 10: OUT11
Bit 25: OUT26 Bit 9: OUT10
Bit 24: OUT25 Bit 8: OUT9
Bit 23: OUT24 Bit 7: OUT8
Bit 22: OUT23 Bit 6: OUT7
Bit 21: OUT22 Bit 5: OUT6
Bit 20: OUT21 Bit 4: OUT5
Bit 19: OUT20 Bit 3: OUT4
Bit 18: OUT19 Bit 2: OUT3
Bit 17: OUT18 Bit 1: OUT2
Bit 16: OUT17 Bit 0: OUT1

Note: This register group sets the appropriate physical output contact momentarily for the
configured breaker failed to trip time.

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REGISTER DATA SIZE DESCRIPTION


41210 Unsigned Short Execute on Function Block Control Registers (0=No Action,1=Execute)
41211 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41212 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41213 Unsigned Short Spare
41214 Unsigned Short Block / Unblock Initiate State Mask (bit state:0=No change, 1=Change)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: SEF Unblock
Bit 12: Spare Bit 4: SEF Block
Bit 11: One shot disable* Bit 3: Ground Unblock
Bit 10: One shot enable* Bit 2: Ground Block
Bit 9: Sect. unblock* Bit 1: Reclose Unblock
Bit 8: Sect. block* Bit 0: Reclose Block
41215 Unsigned Short Confirmation Block / Unblock Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this register.

Note: * - For SCD only

REGISTER DATA SIZE DESCRIPTION


41216 Unsigned Short Execute on Function Block Control Registers (0=No Action,1=Execute)
41217 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41218 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41219 Unsigned Short Spare
41220 Unsigned Short Set / Clear Alternate Settings Initiate Mask (bit state:0=No change, 1=Change)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Select Settings Bank2
Bit 12: Spare Bit 4: Select Settings Bank1
Bit 11: Spare Bit 3: ALT2 Pulse Off
Bit 10: Spare Bit 2: ALT2 Pulse On
Bit 9: Spare Bit 1: ALT1 Pulse Off
Bit 8: Spare Bit 0: ALT1 Pulse On
41221 Unsigned Short Confirmation Set / Clear Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this register.

REGISTER DATA SIZE DESCRIPTION


41222 Unsigned Short Execute on Function Block Control Registers (0=No Action,1=Execute)
41223 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41224 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41225 Unsigned Short Spare
41226 Unsigned Short Tag / Untag Initiate Mask (bit state:0=No change, 1=Change)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Spare
Bit 12: Spare Bit 4: Spare
Bit 11: Spare Bit 3: Close Untag
Bit 10: Spare Bit 2: Close Tag
Bit 9: Spare Bit 1: Open Untag
Bit 8: Spare Bit 0: Open Tag
41227 Unsigned Short Confirmation Set / Clear Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this
register.

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REGISTER DATA SIZE DESCRIPTION


41228 Unsigned Short Execute Trip / Close Control (0=No Action,1=Execute)
41229 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41230 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41231 Unsigned Short Spare
41232 Unsigned Short Trip / Close Initiate Mask (bit state:0=No change, 1=Change)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Close Phase C
Bit 12: Spare Bit 4: Close Phase B
Bit 11: Spare Bit 3: Close Phase A
Bit 10: Spare Bit 2: Trip Phase C
Bit 9: Spare Bit 1: Trip Phase B
Bit 8: Spare Bit 0: Trip Phase A
41233 Unsigned Short Confirmation Set / Clear Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this
register.

REGISTER DATA SIZE DESCRIPTION

41234 Unsigned Short Execute Open / Close Control (0=No Action,1=Execute)


41235 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41236 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41237 Unsigned Short Spare
41238 Unsigned Short Open / Close Initiate Mask (bit state:0=No change, 1=Change)
Bit 15: Reserved Bit 7: Reserved
Bit 14: Reserved Bit 6: Reserved
Bit 13: Reserved Bit 5: Reserved
Bit 12: Reserved Bit 4: Reserved
Bit 11: Close Switch 4 Bit 3: Open Switch 4
Bit 10: Close Switch 3 Bit 2: Open Switch 3
Bit 9: Close Switch 2 Bit 1: Open Switch 2
Bit 8: Close Switch 1 Bit 0: Open Switch 1
41239 Unsigned Short Confirmation Set / Clear Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this
register.

REGISTER DATA SIZE DESCRIPTION

41240 Unsigned Short Execute Source Transfer / Restoration Control (0=No Action,1=Execute)
41241 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41242 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41243 Unsigned Short Spare
41244 Unsigned Short Transfer / Restore Initiate Mask (bit state:0=No change, 1=Change)
Bit 15: Reserved Bit 7: Reserved
Bit 14: Reserved Bit 6: Reserved
Bit 13: Reserved Bit 5: Reserved
Bit 12: Reserved Bit 4: Reserved
Bit 11: Reserved Bit 3: Restore S→P
Bit 10: Reserved Bit 2: Restore P→S
Bit 9: Reserved Bit 1: Transfer S→P
Bit 8: Reserved Bit 0: Transfer P→S
41245 Unsigned Short Confirmation Set / Clear Initiate Mask (bit state:0=No change, 1=Change)
Confirm change initiate input mask by sending an duplicate copy to this
register.

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REGISTER DATA SIZE DESCRIPTION


41246 Unsigned Short Execute on Set/Reset Masks Word 3 and Word 4 Registers
41247 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41248 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41249 Unsigned Short Spare
41250 Unsigned Short Set/Reset Change Mask Long Word 3 (Bit 31-16)
41251 Unsigned Short Set/Reset Change Mask Long Word 3 (Bit 15-0) (0=No change, 1=Change)
41252 Unsigned Short Set/Reset Change Mask Long Word 4 (Bit 31-16)
41253 Unsigned Short Set/Reset Change Mask Long Word 4 (Bit 15-0) (0=No change, 1=Change)
41254 Unsigned Short Set/Reset State Mask Long Word 3 (Bit 31-16)
41255 Unsigned Short Set/Reset State Mask Long Word 3 (Bit 15-0) (0=Reset, 1=Set)
41256 Unsigned Short Set/Reset State Mask Long Word 4 (Bit 31-16)
41257 Unsigned Short Set/Reset State Mask Long Word 4 (Bit 15-0) (0=Reset, 1=Set)

SET/RESET MASK LONG WORD 3 SET/RESET MASK LONG WORD 4


Bit 31: FLTDET* Bit 15: Reserved Bit 31: Reserved Bit 15: Reserved
Bit 30: SW1* Bit 14: Reserved Bit 30: Reserved Bit 14: Reserved
Bit 29: SW2* Bit 13: Reserved Bit 29: Reserved Bit 13: Reserved
Bit 28: SW3* Bit 12: Reserved Bit 28: Reserved Bit 12: Reserved
Bit 27: SW4* Bit 11: Reserved Bit 27: Reserved Bit 11: Reserved
Bit 26: Reserved Bit 10: Reserved Bit 26: Reserved Bit 10: Reserved
Bit 25: Reserved Bit 9: Reserved Bit 25: Reserved Bit 9: Reserved
Bit 24: Reserved Bit 8: Reserved Bit 24: Reserved Bit 8: Reserved
Bit 23: Reserved Bit 7: Reserved Bit 23: Reserved Bit 7: Reserved
Bit 22: Reserved Bit 6: Reserved Bit 22: Reserved Bit 6: Reserved
Bit 21: Reserved Bit 5: Reserved Bit 21: Reserved Bit 5: Reserved
Bit 20: Reserved Bit 4: Reserved Bit 20: Reserved Bit 4: Reserved
Bit 19: Reserved Bit 3: Reserved Bit 19: Reserved Bit 3: Reserved
Bit 18: Reserved Bit 2: Reserved Bit 18: Reserved Bit 2: Reserved
Bit 17: Reserved Bit 1: Reserved Bit 17: Reserved Bit 1: Reserved
Bit 16: Reserved Bit 0: Reserved Bit 16: Reserved Bit 0: Reserved

Note: You can only Reset "*" outputs. Trying to set these will have no affect on the state of the
sealed in alarms.

REGISTER DATA SIZE DESCRIPTION


41258 Unsigned Short Execute
41259 high byte Relay or Test Password Character 1
low byte Relay or Test Password Character 2
41260 high byte Relay or Test Password Character 3
low byte Relay or Test Password Character 4
41261 Unsigned Short Spare
41262 Unsigned Short LcmControl Initiate Mask
41263 Unsigned Short LcmControl duplicate mask
Bit 15: Source I 0 = No action, 1 = Enabled
Bit 14: Source I 0 = No action, 1 = Disabled
Bit 13: Source II 0 = No action, 1 = Enabled
Bit 12: Source II 0 = No action, 1 = Disabled
Bit 11: LCM Test Mode 0 = No action, 1 = Enabled
Bit 10: LCM Test Mode 0 = No action, 1 = Disabled
Bit 09: LCM Reset 0 = No action, 1 = Reset
Bit 08 - 00: Spare

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5.3 FUNCTION CODE 23 (READ/WRITE 4X REGISTERS)

5.3.1 Fault Record

REGISTER DATA SIZE SCALE DESCRIPTION


41409 Unsigned Word 1 Data Control
1=First record
2=Next record
3=Oldest Unreported record
41410 Unsigned Word 1 High Byte (Phase Mask)
Bit 0 : Phase A Fault
Bit 1 : Phase B Fault
Bit 2 : Phase C Fault
Bits 3-7 : Spares
Low Byte (Fault Type Element)
0 : 51P Fault
1 : 51N Fault
2 : 50P-1 Fault
3 : 50N-1 Fault
4 : 50P-2 Fault
5 : 50N-2 Fault
6 : 50P-3 Fault
7 : 50N-3 Fault
8 : 67P Fault
9 : 67N Fault
10 : 46 Fault
11 : 81 Fault
12 : Zone Sequence Step
13 : ECI1 Event
14 : ECI2 Event
15 : SEF Fault
16 : Fault Detected
41411 Unsigned Word 1 Active Set and Recl Seq
Value Definition
16 SCD
17 Primary - 1
18 Primary - 2
19 Primary -3
20 Primary - 4
31 Primary - Lockout

33 Alt1 - 1
34 Alt1 - 2
35 Alt1 - 3
36 Alt1 - 4
47 Alt1 - Lockout

65 Alt2 - 1
66 Alt2 - 2
67 Alt2 - 3
68 Alt2 - 4
79 Alt2 – Lockout
41412 Unsigned Word 1 Fault Number
41413 Unsigned Word 1 Year
41414 Unsigned Word 1 Month
41415 Unsigned Word 1 Day
41416 Unsigned Word 1 Hours
41417 Unsigned Word 1 Minutes
41418 Unsigned Word 1 Seconds
41419 Unsigned Word 1 Milliseconds
41420 Unsigned Word x Ia (Scale at register 41424)
41421 Unsigned Word x Ib (Scale at register 41424)
41422 Unsigned Word x Ic (Scale at register 41424)
41423 Unsigned Word x In (Scale at register 41424)
41424 Unsigned Word 1 Current ( I ) Scale x
41425 Unsigned Word 1 Ia Angle
41426 Unsigned Word 1 Ib Angle

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41427 Unsigned Word 1 Ic Angle


41428 Unsigned Word 1 In Angle
41429 Unsigned Word 1 Zero Seq I (Mag)
41430 Unsigned Word 1 Pos Seq I (Mag)
41431 Unsigned Word 1 Neg Seq I (Mag)
41432 Unsigned Word 1 Zero Seq I (Ang)
41433 Unsigned Word 1 Pos Seq I (Ang)
41434 Unsigned Word 1 Neg Seq I (Ang)
41435 Unsigned Word 100 KVab/KVan (Mag)
41436 Unsigned Word 100 KVbc/KVbn (Mag)
41437 Unsigned Word 100 KVca/KVcn (Mag)
41438 Unsigned Word 1 Vab/Van (Ang)
41439 Unsigned Word 1 Vbc/Vbn (Ang)
41440 Unsigned Word 1 Vca/Vcn (Ang)
41441 Unsigned Word 100 Pos Seq KV (Mag)
41442 Unsigned Word 100 Neg Seq KV (Mag)
41443 Unsigned Word 1 Pos Seq V (Ang)
41444 Unsigned Word 1 Neg Seq V (Ang)
41445 Unsigned Word 10 Fault Location
41446-41447 Unsigned Long 1000 Fault Impedance, Real
41448-41449 Unsigned Long 1000 Breaker Operate Time
41450-41451 Unsigned Long 1000 Relay Operate Time
41452 Unsigned Word 1 Record Status
Bit 0: 0=Wye, 1=Delta
Bit 1: 0=Fault, 1=Event
Capture

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5.3.2 Operation Record

REGISTER DATA SIZE SCALE DESCRIPTION


41537 Unsigned Word 1 Data Control
1=First record
2=Next record
3=Oldest Unreported record
41538 Unsigned Word 1 Year
41539 Unsigned Word 1 Month
41540 Unsigned Word 1 Day
41541 Unsigned Word 1 Hours
41542 Unsigned Word 1 Minutes
41543 Unsigned Word 1 Seconds
41544 Unsigned Word 1 Milliseconds
41545 Unsigned Word 1 Message #
41546 Unsigned Word 1 Value
41547 Unsigned Word 1 Operation Number (Index)

Operation Record Indices

INDEX DEFINITION VALUE CODE PRODUCT


00 51P Trip Type 1 PCD
01 51N Trip Undefined PCD
02 50P-1 Trip Type 1 PCD
03 50N-1 Trip Undefined PCD
04 50P-2 Trip Type 1 PCD
05 50N-2 Trip Undefined PCD
06 50P-3 Trip Type 1 PCD
07 50N-3 Trip Undefined PCD
08 67P Trip Type 1 PCD
09 67N Trip Undefined PCD
10 46 Trip Undefined ALL
11 27-1P Alarm Type 2 ALL
12 59 Alarm Type 2 ALL
13 79V Block Type 2 PCD
14 81S-1 Trip Undefined ALL
15 81R-1 Restore Undefined ALL
16 81V Block Type 2 ALL
17 TOC Pickup-No Trip Undefined ALL
18 27-3P Alarm Type 2 ALL
19 SEF Trip Undefined PCD
20 External Trip Type 1 PCD
21 External Close Type 1 PCD
22 Breaker Opened Type 1 PCD
23 Breaker Closed Type 1 PCD
24 Open Trip Contact Type 1 PCD
25 Recloser Lockout Type 1 PCD
26 Direct Trip Type 1 PCD
27 Direct Close Type 1 PCD
28 MDT Close Undefined PCD
29 Ext. Trip and ARC Undefined PCD
30 Reclose Initiated Type 1 PCD
31 CB Failed to Trip Type 1 PCD
32 CB Failed to Close Type 1 PCD
33 CB Pops Open Type 1 PCD
34 CB Pops Close Type 1 PCD
35 CB State Unknown Type 1 PCD
36 CB Stuck Closed Type 1 PCD
37 Ext. Trip CB Stuck Type 1 PCD
38 Springs Discharged Undefined PCD
39 Current detected in breaker Undefined ALL
40 Manual Trip Type 1 PCD

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41 Manual Close Type 1 PCD


42 Ground TC Enabled Undefined PCD
43 Ground TC Disabled Undefined PCD
44 Phase TC Enabled Undefined PCD
45 Phase TC Disabled Undefined PCD
46 Primary Set Active Undefined ALL
47 ALT1 Set Active Undefined ALL
48 ALT2 Set Active Undefined ALL
49 Zone Step Undefined PCD
50 Recloser Enabled Undefined PCD
51 Recloser Disabled Undefined PCD
52 Zone Sequence Enabled Undefined PCD
53 Zone Sequence Disabled Undefined PCD
54 50P/N-1 Disabled Undefined PCD
55 50P/N-2 Disabled Undefined PCD
56 50P/N-3 Disabled Undefined PCD
57 50P/N-1 Enabled Undefined PCD
58 50P/N-2 Enabled Undefined PCD
59 50P/N-3 Enabled Undefined PCD
60 81S-2 Trip Undefined ALL
61 81R-2 Restore Undefined ALL
62 81O-1 Overfrequency Undefined ALL
63 81O-2 Overfrequency Undefined ALL
64 27A Alarm Type 2 ALL
65 27B Alarm Type 2 ALL
66 27C Alarm Type 2 ALL
67 AC Failure Alarm Undefined ALL
68 AC Restoration Alarm Undefined ALL
69 Reserved Undefined ALL
70 Blown Fuze Alarm Undefined ALL
71 Overcurrent Trip Counter Alarm Undefined PCD
72 Accumulated KSI Alarm Undefined ALL
73 79 Counter 1 Alarm Undefined PCD
74 Phase Demand Alarm Undefined ALL
75 Neutral Demand Alarm Undefined ALL
76 Low PF Alarm Undefined ALL
77 High PF Alarm Undefined ALL
78 Trip Coil Failure Alarm Undefined PCD
79 kVAR Demand Alarm Undefined ALL
80 79 Counter 2 Alarm Undefined PCD
81 Positive kVAR Alarm Undefined ALL
82 Negative kVAR Alarm Undefined ALL
83 Load Alarm Undefined ALL
84 Cold Load Alarm Undefined PCD
85 Positive Watt Alarm 1 Undefined ALL
86 Positive Watt Alarm 2 Undefined ALL
87 32P Trip Undefined ALL
88 32N Trip Undefined ALL
89 Reserved Undefined ALL
90 Event Capture #1 Undefined ALL
91 Event Capture #2 Undefined ALL
92 Waveform Capture Undefined ALL
93 BFT Operation Undefined PCD
94 ReTrip Operation Undefined PCD
95 External BFI Enabled Undefined PCD
96 External BFI Disabled Undefined PCD
97 BFI Enabled Undefined PCD
98 BFI Disabled Undefined PCD
99 Reserved Undefined ALL
100 ROM Failure Undefined PCD
101 RAM Failure Undefined PCD
102 Self Test Failed Type 3 ALL
103 EEPROM Failure Undefined ALL

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104 BATRAM Failure Undefined ALL


105 DSP Failure Undefined ALL
106 Control Power Fail Undefined ALL
107 Editor Access Type 4 ALL
108 59A Alarm Type 2 ALL
109 59B Alarm Type 2 ALL
110 59C Alarm Type 2 ALL
111 59-3P Alarm Type 2 ALL
112 Reserved Undefined ALL
113 Reserved Undefined ALL
114 Reserved Undefined ALL
115 Reserved Undefined ALL
116 Reserved Undefined ALL
117 Reserved Undefined ALL
118 Reserved Undefined ALL
119 Reserved Undefined ALL
120 Reserved Undefined ALL
121 Reserved Undefined ALL
122 Battery failure Undefined PCD / SCD
123 Reserved Undefined ALL
124 Reserved Undefined ALL
125 Reserved Undefined ALL
126 Reserved Undefined ALL
127 Reserved Undefined ALL
128 Springs Charged Undefined PCD
129 Springs Discharged Undefined PCD
130 79S Input Enabled Undefined PCD
131 79S Input Disabled Undefined PCD
132 79M Input Enabled Undefined PCD
133 79M Input Disabled Undefined PCD
134 TCM Input Closed Undefined PCD
135 TCM Input Opened Undefined PCD
136 ALT1 Input Enabled Undefined ALL
137 ALT1 Input Disabled Undefined ALL
138 ALT2 Input Enabled Undefined ALL
139 ALT2 Input Disabled Undefined ALL
140 External Trip Enabled Type 1 PCD
141 External Trip Disabled Type 1 PCD
142 Event Capture 1 Initiated Undefined ALL
143 Event Capture 1 Reset Undefined ALL
144 Event Capture 2 Initiated Undefined ALL
145 Event Capture 2 Reset Undefined ALL
146 Waveform Capture Initiated Undefined ALL
147 Waveform Capture Reset Undefined ALL
148 External Close Enabled Type 1 PCD
149 External Close Disabled Type 1 PCD
150 52a Closed Type 1 PCD
151 52a Opened Type 1 PCD
152 52b Closed Type 1 PCD
153 52b Opened Type 1 PCD
154 43a Closed Undefined PCD
155 43a Opened Undefined PCD
156 46 Unit Enabled Undefined ALL
157 46 Unit Disabled Undefined ALL
158 67P Unit Enable Undefined PCD
159 67P Unit Disabled Undefined PCD
160 67N Unit Enabled Undefined PCD
161 67N Unit Disabled Undefined PCD
162 ULI1 Input Closed Undefined ALL
163 ULI1 Input Opened Undefined ALL
164 ULI2 Input Closed Undefined ALL
165 ULI2 Input Opened Undefined ALL
166 ULI3 Input Closed Undefined ALL

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167 ULI3 Input Opened Undefined ALL


168 ULI4 Input Closed Undefined ALL
169 ULI4 Input Opened Undefined ALL
170 ULI5 Input Closed Undefined ALL
171 ULI5 Input Opened Undefined ALL
172 ULI6 Input Closed Undefined ALL
173 ULI6 Input Opened Undefined ALL
174 ULI7 Input Closed Undefined ALL
175 ULI7 Input Opened Undefined ALL
176 ULI8 Input Closed Undefined ALL
177 ULI8 Input Opened Undefined ALL
178 ULI9 Input Closed Undefined ALL
179 ULI9 Input Opened Undefined ALL
180 CRI Input Closed Undefined ALL
181 CRI Input Opened Undefined ALL
182 ARC Blocked Undefined PCD
183 ARC Enabled Undefined PCD
184 TARC Input Opened Undefined PCD
185 SEF Enabled Undefined ALL
186 SEF Disabled Undefined ALL
187 RBI Enabled Undefined ALL
188 RBI Disabled Undefined ALL
189 Ground Functions Suppressed Undefined PCD
190 Ground Functions Unsuppressed Undefined PCD
191 Reserved Undefined ALL
192 Reserved Undefined ALL
193 SCADA Issued Trip Undefined PCD
194 SCADA Issued Close Undefined PCD
195 SCADA recloser block Undefined PCD
196 SCADA recloser unblock Undefined PCD
197 SCADA ground block Undefined PCD
198 SCADA ground unblock Undefined PCD
199 Reserved Undefined ALL
200 Front Panel: Reclose Block On Undefined PCD
201 Front Panel: Reclose Block Off Undefined PCD
202 Front Panel: SEF Block On Undefined ALL
203 Front Panel: SEF Block Off Undefined ALL
204 Front Panel: Remote Block On Undefined ALL
205 Front Panel: Remote Block Off Undefined ALL
206 Front Panel: Ground Block On Undefined PCD
207 Front Panel: Ground Block Off Undefined PCD
208 Front Panel: ALT1 Enabled Undefined ALL
209 Front Panel: ALT1 Disabled Undefined ALL
210 Front Panel: Prog1 Enable Undefined ALL
211 Front Panel: Prog1 Disable Undefined ALL
212 Front Panel: Prog2 Enable Undefined ALL
213 Front Panel: Prog2 Disable Undefined ALL
1
214 Front Panel: Tag Enabled Undefined PCD
1
215 Front Panel: Tag Disabled Undefined PCD
216 Reserved Undefined ALL
217 Reserved Undefined ALL
218 Reserved Undefined ALL
219 Reserved Undefined ALL
220 Trip Reasserted Type 1 PCD
221 Close Reasserted Type 1 PCD
222 Re-Trip Successful Type 1 PCD
223 Re-Close Successful Type 1 PCD
224 Re-Trip Unsuccessful Type 1 PCD
225 Re-Close Unsuccessful Type 1 PCD
226 Protection Enabled Undefined PCD
227 Protection Disabled Undefined PCD
228 Breaker Failure Initiated Trip Type 1 PCD
229 Breaker Failure Initiated Close Type 1 PCD

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230 ALT1 Pulse On Enabled Undefined ALL


231 ALT1 Pulse Off Enabled Undefined ALL
232 ALT2 Pulse On Enabled Undefined ALL
233 ALT2 Pulse Off Enabled Undefined ALL
234 ALT1 Pulse On Disabled Undefined ALL
235 ALT1 Pulse Off Disabled Undefined ALL
236 ALT2 Pulse On Disabled Undefined ALL
237 ALT2 Pulse Off Disabled Undefined ALL
238 Tag Open Block Enable Undefined ALL
239 Tag Open Block Disable Undefined ALL
240 Tag Close Block Enable Undefined ALL
241 Tag Close Block Disable Undefined ALL
242 Tag Message Enable Undefined ALL
243 Tag Message Disable Undefined ALL
244 LCM Trip Undefined PCD
245 LCM Close Undefined PCD
246 LCM Midpoint Operation Undefined PCD
247 LCM Reboot Undefined PCD
248 Loop communication not OK Undefined PCD
249 Loop communication OK Undefined PCD
250 Replace CPU Battery Undefined PCD
251 LCM reset Undefined PCD
252 Fault Test Start Undefined PCD
253 Fault Test End Undefined PCD
254 SCADA SEF Block Undefined ALL
255 SCADA SEF Unblock Undefined ALL
256 LCM active, source 1 ON Undefined ALL
257 LCM active, source 1 OFF Undefined ALL
258 LCM active, source 2 ON Undefined ALL
259 LCM active, source2 OFF Undefined ALL
260 Switch Open Undefined SCD
261 Switch Open Failure Undefined SCD
262 Switch Open After Failure Undefined SCD
263 Switch Close Undefined SCD
264 Switch Close Failure Undefined SCD
265 Switch Close After Failure Undefined SCD
266 Switch OK in Open State Undefined SCD
267 Switch OK in Closed State Undefined SCD
268 Switch State Unknown Undefined SCD
269 Reserved Undefined ALL
270 Reserved Undefined ALL
271 Reserved Undefined ALL
272 Reserved Undefined ALL
273 Reserved Undefined ALL
274 Reserved Undefined ALL
275 Reserved Undefined ALL
276 Reserved Undefined ALL
277 Reserved Undefined ALL
278 Reserved Undefined ALL
279 Reserved Undefined ALL
280 Switch 1 52a Contact Closed Undefined SCD
281 Switch 1 52a Contact Opened Undefined SCD
282 Switch 2 52a Contact Closed Undefined SCD
283 Switch 2 52a Contact Opened Undefined SCD
284 Switch 3 52a Contact Closed Undefined SCD
285 Switch 3 52a Contact Opened Undefined SCD
286 Switch 4 52a Contact Closed Undefined SCD
287 Switch 4 52a Contact Opened Undefined SCD
288 Switch 1 52b Contact Closed Undefined SCD
289 Switch 1 52b Contact Opened Undefined SCD
290 Switch 2 52b Contact Closed Undefined SCD
291 Switch 2 52b Contact Opened Undefined SCD
292 Switch 3 52b Contact Closed Undefined SCD

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293 Switch 3 52b Contact Opened Undefined SCD


294 Switch 4 52b Contact Closed Undefined SCD
295 Switch 4 52b Contact Opened Undefined SCD
296 Reserved Undefined ALL
297 Reserved Undefined ALL
298 Reserved Undefined ALL
299 Reserved Undefined ALL
300 Switch 1 Direct Open Contact Closed Undefined SCD
301 Switch 1 Direct Open Contact Opened Undefined SCD
302 Switch 2 Direct Open Contact Closed Undefined SCD
303 Switch 2 Direct Open Contact Opened Undefined SCD
304 Switch 3 Direct Open Contact Closed Undefined SCD
305 Switch 3 Direct Open Contact Opened Undefined SCD
306 Switch 4 Direct Open Contact Closed Undefined SCD
307 Switch 4 Direct Open Contact Opened Undefined SCD
308 Switch 1 Direct Close Contact Closed Undefined SCD
309 Switch 1 Direct Close Contact Opened Undefined SCD
310 Switch 2 Direct Close Contact Closed Undefined SCD
311 Switch 2 Direct Close Contact Opened Undefined SCD
312 Switch 3 Direct Close Contact Closed Undefined SCD
313 Switch 3 Direct Close Contact Opened Undefined SCD
314 Switch 4 Direct Close Contact Closed Undefined SCD
315 Switch 4 Direct Close Contact Opened Undefined SCD
316 Reserved Undefined ALL
317 Reserved Undefined ALL
318 Reserved Undefined ALL
319 Reserved Undefined ALL
320 Fault Detector Enabled Undefined SCD
321 Fault Detector Disabled Undefined SCD
322 Fault Detected Undefined SCD
323 Sectionalize Step Undefined SCD
324 Sectionalize Open Undefined SCD
325 Sectionalizer Blocked Undefined SCD
326 Sectionalize Unblock Undefined SCD
327 Sectionalizer Reset Undefined SCD
328 Switch 1 Operations Alarm Undefined SCD
329 Switch 2 Operations Alarm Undefined SCD
330 Switch 3 Operations Alarm Undefined SCD
331 Switch 4 Operations Alarm Undefined SCD
332 One Shot Clear Undefined SCD
333 One Shot Set Undefined SCD
334 Reserved Undefined ALL
335 Reserved Undefined ALL
336 Reserved Undefined ALL
337 Reserved Undefined ALL
338 Reserved Undefined ALL
339 Reserved Undefined ALL
340 Front Panel: One Shot Control Cleared Undefined SCD
341 Front Panel: One Shot Control Set Undefined SCD
342 Front Panel: Sectionalizer Block Set Undefined SCD
343 Front Panel: Sectionalizer Block Cleared Undefined SCD
344 Reserved Undefined ALL
345 Reserved Undefined ALL
346 Reserved Undefined ALL
347 Reserved Undefined ALL
348 Reserved Undefined ALL
349 Reserved Undefined ALL
350 Reserved Undefined ALL
351 Reserved Undefined ALL
352 Reserved Undefined ALL
353 Reserved Undefined ALL
354 Reserved Undefined ALL
355 Reserved Undefined ALL

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356 Reserved Undefined ALL


357 Reserved Undefined ALL
358 Reserved Undefined ALL
359 Reserved Undefined ALL
360 Primary to Secondary Source Transfer Initiated Undefined SCD
361 Primary to Secondary Source Transfer Completed Undefined SCD
362 Secondary to Primary Source Transfer Initiated Undefined SCD
363 Secondary to Primary Source Transfer Completed Undefined SCD
364 Primary to Secondary Restoration Initiated Undefined SCD
365 Primary to Secondary Restoration Completed Undefined SCD
366 Secondary to Primary Restoration Initiated Undefined SCD
367 Secondary to Primary Restoration Completed Undefined SCD
368 Source Transfer Failed Undefined SCD
369 Source Transfer Blocked Undefined SCD
370 Source Transfer Unblocked Undefined SCD
371 Source Transfer Armed Undefined SCD
372 Source Transfer Disarmed Undefined SCD
373 Source Transfer Initiated Open Undefined SCD
374 Source Transfer Initiated Close Undefined SCD
375 Transfer block input asserted Undefined SCD
376 Transfer block input deasserted Undefined SCD
377 Transfer primary to secondary input asserted Undefined SCD
378 Transfer primary to secondary input deasserted Undefined SCD
379 Transfer secondary to primary input asserted Undefined SCD
380 Transfer secondary to primary input deasserted Undefined SCD
381 Restore primary to secondary input asserted Undefined SCD
382 Restore primary to secondary input deasserted Undefined SCD
383 Restore secondary to primary input asserted Undefined SCD
384 Restore secondary to primary input deasserted Undefined SCD
385 Settings bank1 active Undefined ALL
386 Settings bank2 active Undefined ALL
387 Diagnostics record Undefined ALL
388 LCM source 1 enabled Undefined PCD
389 LCM source 1 disabled Undefined PCD
390 LCM source 2 enabled Undefined PCD
391 LCM source 2 disabled Undefined PCD
392 PROG1 logical OFF Undefined PCD
393 PROG1 logical ON Undefined PCD
394 PROG2 logical OFF Undefined PCD
395 PROG2 logical ON Undefined PCD
396 PROG2 switch mode OFF Undefined PCD
397 PROG2 switch mode ON Undefined PCD
398 SCADA switch mode OFF Undefined PCD
399 SCADA switch mode ON Undefined PCD

Notes: 1: These are available only on PCDs with catalog numbers XR3X-XXXX-XX-XXXX.

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Value codes types:


Some operation records have a value field with specific 'type' information. The table below shows
currently defined values. Undefined value fields nominally return zero.
Value Type Value Code Description
1 0 Three phase operation
1 Phase A operation
2 Phase B operation
3 Phase C operation
2 - Secondary voltage value (Volts)
3 - Self Test failure code
Bit 15: DSP COP Bit 7: System Boot Failure
Bit 14: DSP Program Runaway Bit 6: Spare
Bit 13: DSP +5V Power Fail Bit 5: Spare
Bit 12: DSP ±15V Power Fail Bit 4: Spare
Bit 11: DSP Spare Bit 3: CPU EEPROM
Bit 10: DSP Ext. RAM Bit 2: CPU NVRAM
Bit 9: DSP Int. RAM Bit 1: CPU Flash
Bit 8: DSP ROM Bit 0: CPU RAM
4 - Editor access code (Firmware versions 2.9 and below)
Bit 15: Comm. Settings Edit Bit7: Clock Settings Edit
Bit 14: Alarm Settings Edit Bit 6: Spare
Bit 13: Counter Settings Edit Bit 5: Edit via Rear Port
Bit 12: Config. Settings Edit Bit 4: Edit via Front Port
Bit 11: ALT2 Settings Edit Bit 3: Edit via Front Panel MMI
Bit 10 ALT1 Settings Edit Bit 2: Local Edit Disabled
Bit 9: Primary Settings Edit Bit 1: Remote Edit Disabled
Bit 8: Programmable IO Edit Bit 0: Not Used

Editor access code (Firmware versions 3.0 and above, and SCD version 1.0)
Bit 15: Not used Bit7: LCM Edit
Bit 14: Not used Bit 6: Programmable curve Edit
Bit 13: General Edit Bit 5: Alarms Edit
Bit 12: Bank2, ALT2 Edit Bit 4: Configuration Edit
Bit 11: Bank2, ALT1 Edit Bit 3: ALT2 Edit
Bit 10 Bank2, Primary Edit Bit 2: ALT1 Edit
Bit 9: Programmable I/O Edit Bit 1: Primary Edit
Bit 8: Communications Edit Bit 0: Front panel MMI used

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5.3.3 Oscillographic Record Data Headers Block

REGISTER DATA SIZE SCALE DESCRIPTION


41665 Unsigned Word 1 Record Number
41666 Unsigned Word 1 Cycles per Record
41667 Unsigned Word 1 Record Size = 0: 1 Record
1: 2 Record
3: 4 Records
4: 8 Records
41668 Unsigned Word 1 Mode
Bit 0 : Single-shot mode (0=off,1=on)
Bit 1 : Append record mode (0=off, 1=on)
41669 Unsigned Word 1 Trigger Position
41670 Unsigned Word 1 Analog Quantity Select
41671 Unsigned Word 1 Spare
41672 Unsigned Word 1 Spare
41673 Unsigned Word 1 Trigger Source
Bit 0 : Trip Issued Signal (PCD)
Bit 1 : Breaker Open (PCD)
Bit 2 : External (WCI) (PCD / SCD)
Bit 3 : 32P (PCD / SCD)
Bit 4 : 32N (PCD / SCD)
Bit 5 : PFLT (SCD)
Bit 6 : NFLT (SCD)
Bit 7 : SFLT (SCD)
Bit 8 : PQ Sags (PCD / SCD)
Bit 9 : PQ Swells (PCD / SCD)
Bit 10 : PQ Interruptions (PCD / SCD)
Bit 11 : PQ Undervoltage (PCD / SCD)
Bit 12 : PQ Overvoltage (PCD / SCD)
Bit 13 : PQ TDD (PCD / SCD)
Bit 14 : PQ THD (PCD / SCD)
Bit 15 : Spare
41674 Unsigned Word 1 Trigger Source (Low Word)
Bit 0 : 50N-1 (PCD)
Bit 1 : 50N-2 (PCD)
Bit 2 : 50N-3 (PCD)
Bit 3 : 51N (PCD)
Bit 4 : 50P-1 (PCD)
Bit 5 : 50P-2 (PCD)
Bit 6 : 50P-3 (PCD)
Bit 7 : 51P (PCD)
Bit 8: 67P (PCD)
Bit 9: 67N (PCD)
Bit 10: 46 (PCD / SCD)
Bit 11: 27 (PCD / SCD)
Bit 12: 59 (PCD / SCD)
Bit 13: 79 (PCD)
Bit 14: 81S (PCD / SCD)
Bit 15: 81R (PCD / SCD)
41675 Unsigned Word 1 Year
41676 Unsigned Word 1 Month
41677 Unsigned Word 1 Day
41678 Unsigned Word 1 Hours
41679 Unsigned Word 1 Minutes
41680 Unsigned Word 1 Seconds
41681 Unsigned Word 1 Milliseconds
41682 Unsigned Word 1 Channel 1 Scale
41683 Unsigned Word 1 Channel 2 Scale
41684 Unsigned Word 1 Channel 3 Scale
41685 Unsigned Word 1 Channel 4 Scale
41686 Unsigned Word 1 Channel 5 Scale
41687 Unsigned Word 1 Channel 6 Scale
41688 Unsigned Word 1 Channel 7 Scale
41689 Unsigned Word 1 Channel 8 Scale

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41690 Unsigned Word Channel 9 Scale


41691 Unsigned Word Channel 10 Scale
41692 Unsigned Word Channel 11 Scale
41693 Unsigned Word Channel 12 Scale
41694 Unsigned Word Channel 13 Scale
41695 Unsigned Word Channel 14 Scale
41696 Unsigned Word Channel 15 Scale
41697 Unsigned Word 1 Channel 16 Scale
Note: Analog Quantity Select Mask is currently not supported. Also, the three trigger word
registers 41671 thru 41672 are currently not supported.

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5.3.4 Oscillographic Digital Records Block

REGISTER DATA SIZE SCALE DESCRIPTION


41793 Unsigned Word 1 Record Number
41794 Unsigned Word 1 Cycle Number
41795 Unsigned Word 1 First Qtr Cycle: Phase Scale 1
41796 Unsigned Word 1 First Qtr Cycle: Phase Scale 2
41797 Unsigned Word 1 First Qtr Cycle: Neutral Scale 1
41798 Unsigned Word 1 First Qtr Cycle: Neutral Scale 2
41799 Unsigned Word 1 First Qtr Cycle: Spare Scale
41800 Unsigned Word 1 First Qtr Cycle: Spare Scale
41801 Unsigned Word 1 First Qtr Cycle: Input Status (High Word)
41802 Unsigned Word 1 First Qtr Cycle: Input Status (Low Word)
41803 Unsigned Word 1 First Qtr Cycle: Output Status (High Word)
41804 Unsigned Word 1 First Qtr Cycle: Output Status (Low Word)
41805 Unsigned Word 1 First Qtr Cycle: Pickup Status (High Word)
41806 Unsigned Word 1 First Qtr Cycle: Pickup Status (Low Word)
41807 Unsigned Word 1 First Qtr Cycle: Fault Status (High Word)
41808 Unsigned Word 1 First Qtr Cycle: Fault Status (Low Word)
41809 Unsigned Word 1 First Qtr Cycle: Reserved
41810-41824 Unsigned Word 1 Second Qtr Cycle (15 words as above)
41825-41839 Unsigned Word 1 Third Qtr Cycle (15 words as above)
41840-41854 Unsigned Word 1 Forth Qtr Cycle (15 words as above)

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5.3.5 Oscillographic Analog Records Block

REGISTER DATA SIZE SCALE DESCRIPTION


41921 Unsigned Word 1 Record Number
41922 Unsigned Word 1 Cycle Number
41923 Unsigned Word 1 Analog Quantity
41924 Signed Word 1 Sample 0
41925 Signed Word 1 Sample 1
41926 Signed Word 1 Sample 2
41927 Signed Word 1 Sample 3
41928 Signed Word 1 Sample 4
41929 Signed Word 1 Sample 5
41930 Signed Word 1 Sample 6
41931 Signed Word 1 Sample 7
41932 Signed Word 1 Sample 8
41933 Signed Word 1 Sample 9
41934 Signed Word 1 Sample 10
41935 Signed Word 1 Sample 11
41936 Signed Word 1 Sample 12
41937 Signed Word 1 Sample 13
41938 Signed Word 1 Sample 14
41939 Signed Word 1 Sample 15
41940 Signed Word 1 Sample 16
41941 Signed Word 1 Sample 17
41942 Signed Word 1 Sample 18
41943 Signed Word 1 Sample 19
41944 Signed Word 1 Sample 20
41945 Signed Word 1 Sample 21
41946 Signed Word 1 Sample 22
41947 Signed Word 1 Sample 23
41948 Signed Word 1 Sample 24
41949 Signed Word 1 Sample 25
41950 Signed Word 1 Sample 26
41951 Signed Word 1 Sample 27
41952 Signed Word 1 Sample 28
41953 Signed Word 1 Sample 29
41954 Signed Word 1 Sample 30
41955 Signed Word 1 Sample 31

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5.3.6 Oscillographic Control and Status Block

REGISTER DATA SIZE SCALE DESCRIPTION


42049 Unsigned Word 1 Start / Stop Accumulation
0 = Stop
1 = Start
42050 Unsigned Word 1 Record Size
0: 1 Record
1: 2 Records
2: 4 Records
3: 8 Records
42051 Unsigned Word 1 Mode
Bit 0 : Single-shot mode (0=off,1=on)
Bit 1 : Append record mode (0=off, 1=on)
42052 Unsigned Word 1 Records Remaining (single-shot mode)
42053 Unsigned Word 1 State of Accumulation
1 = Running
0 = Stopped

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5.3.7 Load Profile Data Header

REGISTER DATA SIZE SCALE DESCRIPTION


42177 Unsigned Word 1 Data Control 1= All Data
2= Last Data
42178 Unsigned Word Year
42179 Unsigned Word Month
42180 Unsigned Word Day
42181 Unsigned Word Hours
42182 Unsigned Word Minutes
42183 Unsigned Word Column 1 Attribute Number
42184 Unsigned Word Column 2 Attribute Number
42185 Unsigned Word Column 3 Attribute Number
42186 Unsigned Word Column 4 Attribute Number
42187 Unsigned Word Column 5 Attribute Number
42188 Unsigned Word Column 6 Attribute Number
42189 Unsigned Word Column 7 Attribute Number
42190 Unsigned Word Column 8 Attribute Number
42191 Unsigned Word Column 9 Attribute Number
42192 Unsigned Word Column 1 Attribute Scale
42193 Unsigned Word Column 2 Attribute Scale
42194 Unsigned Word Column 3 Attribute Scale
42195 Unsigned Word Column 4 Attribute Scale
42196 Unsigned Word Column 5 Attribute Scale
42197 Unsigned Word Column 6 Attribute Scale
42198 Unsigned Word Column 7 Attribute Scale
42199 Unsigned Word Column 8 Attribute Scale
42200 Unsigned Word Column 9 Attribute Scale

Attribute description for firmware versions <= 2.60 and >= 2.90
ATTRIBUTE # DESCRIPTION DYNAMIC SCALE
0 Demand kW-A 122
1 Demand kW-B 122
2 Demand kW-C 122
3 Demand kVAR-A 122
4 Demand kVAR-B 122
5 Demand kVAR-C 122
6 Van 10
7 Vbn 10
8 Vcn 10
9 Demand kW-3P 367
10 Demand kVAR-3P 367
11 Demand Ia 1
12 Demand Ib 1
13 Demand Ic 1
14 Demand In 1
15 Vab 10
16 Vbc 10
17 Vca 10
18 Power factor 1
19 Power factor type 1

Attribute description for firmware versions >= 2.70 and <= 2.82
ATTRIBUTE # DESCRIPTION DYNAMIC SCALE
0 Power factor 1
1 Power factor type 1
2 Demand Ia 1
3 Demand Ib 1
4 Demand Ic 1
5 Demand In 1
6 and over Same as above

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5.3.8 Load Profile Data Block

REGISTER DATA SIZE SCALE DESCRIPTION


42305 Unsigned Word Data Control
1= Next Data
2= Last Data

42306 Unsigned Word Demand Interval (5/15/30/60 Minutes)


42307 Unsigned Word Record Number
42308 Unsigned Word Total Number of Data Bytes (1 through 126)
42309 Unsigned Word Year
42310 Unsigned Word Month
42311 Unsigned Word Day
42312 Unsigned Word Hours
42313 Unsigned Word Minutes
42314 Unsigned Word Data Block 0
42315 Unsigned Word Data Block 1
42316 Unsigned Word Data Block 2
42317 Unsigned Word Data Block 3
42318 Unsigned Word Data Block 4
42319 Unsigned Word Data Block 5
42320 Unsigned Word Data Block 6
42321 Unsigned Word Data Block 7
42322 Unsigned Word Data Block 8
42323 Unsigned Word Data Block 9
42324 Unsigned Word Data Block 10
42325 Unsigned Word Data Block 11
42326 Unsigned Word Data Block 12
42327 Unsigned Word Data Block 13
42328 Unsigned Word Data Block 14
42329 Unsigned Word Data Block 15
42330 Unsigned Word Data Block 16
42331 Unsigned Word Data Block 17
42332 Unsigned Word Data Block 18
42333 Unsigned Word Data Block 19
42334 Unsigned Word Data Block 20
42335 Unsigned Word Data Block 21
42336 Unsigned Word Data Block 22
42337 Unsigned Word Data Block 23
42338 Unsigned Word Data Block 24
42339 Unsigned Word Data Block 25
42340 Unsigned Word Data Block 26
42341 Unsigned Word Data Block 27
42342 Unsigned Word Data Block 28
42343 Unsigned Word Data Block 29
42344 Unsigned Word Data Block 30
42345 Unsigned Word Data Block 31
42346 Unsigned Word Data Block 32
42347 Unsigned Word Data Block 33
42348 Unsigned Word Data Block 34
42349 Unsigned Word Data Block 35
42350 Unsigned Word Data Block 36
42351 Unsigned Word Data Block 37
42352 Unsigned Word Data Block 38
42353 Unsigned Word Data Block 39
42354 Unsigned Word Data Block 40
42355 Unsigned Word Data Block 41
42356 Unsigned Word Data Block 42
42357 Unsigned Word Data Block 43
42358 Unsigned Word Data Block 44
42359 Unsigned Word Data Block 45
42360 Unsigned Word Data Block 46

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REGISTER DATA SIZE SCALE DESCRIPTION


42361 Unsigned Word Data Block 47
42362 Unsigned Word Data Block 48
42363 Unsigned Word Data Block 49
42364 Unsigned Word Data Block 50
42365 Unsigned Word Data Block 51
42366 Unsigned Word Data Block 52
42367 Unsigned Word Data Block 53
42368 Unsigned Word Data Block 54
42369 Unsigned Word Data Block 55
42370 Unsigned Word Data Block 56
42371 Unsigned Word Data Block 57
42372 Unsigned Word Data Block 58
42373 Unsigned Word Data Block 59
42374 Unsigned Word Data Block 60
42375 Unsigned Word Data Block 61
42376 Unsigned Word Data Block 62
42377 Unsigned Word Data Block 63

Each data block is a two byte word formatted as follows:


Bits 0-13 : Data Value
Bit 14 : Sign Bit (1=multiply bits 0-13 by -1)
Bit 15 : Scale Bit (0=multiply bits 0-13 by 1,
1=multiply bits 0-13 by attribute scale)

Example: Report column 1 is profiling attribute #0 (Demand kW-A) and has a dynamic scale = 122
DATA BINARY PATTERN SCALE REPORTED VALUE
WORD
8,000 0001111101000000 1 8,000 kW
24,384 0101111101000000 -1 -8,000 kW
16,776 0100000011000100 122 23,912 kW
49,384 1100000011000100 -122 -23,912 kW

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5.3.9 Load Profile Control Block

REGISTER DATA SIZE SCALE DESCRIPTION


42433 Unsigned Word 1 Start / Stop Accumulation
0 = Stop
1 = Start

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5.3.10 Power Quality Records

REGISTER DATA SIZE SCALE DESCRIPTION


42561 Unsigned Word 1 Record Index (1 = latest record)
42562 Unsigned Word 1 Year (4 digit)
42563 Unsigned Word 1 Month
42564 Unsigned Word 1 Day
42565 Unsigned Word 1 Hour
42566 Unsigned Word 1 Minutes
42567 Unsigned Word 1 Seconds
42568 Unsigned Word 1 Milliseconds
42569 Unsigned Word 1 Duration (Milliseconds, high word)
42570 Unsigned Word 1 Duration (Milliseconds, low word)
42571 Unsigned Word 1 Event Classification Code (see table below)
42572 Unsigned Word 1 Operation Type (see tables below)
Bits 0-3: Event Quantity
Bits 4-5: System Configuration
Bit 14: Early Termination Flag
Bit 15: Test Record Flag
42573 Unsigned Word 1 Operation Number (1~999)
42574 Unsigned Long 1 Pre Event Current (Primary Amps)
Word
42576 Unsigned Word 1 Pre Event Voltage (PU Voltage x10000)
42577 Unsigned Word 1 Post Event Voltage (PU Voltage x10000)
42578 Unsigned Long 1 Status
Word
42580 Unsigned Word 1 RMS Record Sample Count
42581 Unsigned Word 1 RMS Record Available Types
Bit 0: Voltage Record
Bit 1: Current Record
Bit 2: THD Record
Bit 3: TDD Record

CODE # CLASSIFICATION
0 Swell, Instantaneous
1 Swell, Momentary
2 Swell, Temporary
3 Swell, t > t(max)
4 Sag, Instantaneous
5 Sag, Momentary
6 Sag, Temporary
7 Sag, t > t(max)
8 Interruption, Momentary
9 Interruption, Temporary
10 Interruption, Sustained
11 Interruption, t > t(max)
12 Overvoltage
13 Overvoltage, t > t(max)
14 Undervoltage
15 Undervoltage, t > t(max)
16 Current TDD
17 Voltage THD

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CODE # PHASE
0 Van / Vab / Ia
1 Vbn / Vbc / Ib
2 Vcn / Vca / Ic
3 Phase Minimum/Maximum
4-15 Spare

CODE # CONFIGURATION
0 69V Wye
1 120V Wye
2 120V Delta
3 208V Delta

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5.3.11 Power Quality Statistics

REGISTER DATA SIZE SCALE DESCRIPTION


42689 Unsigned Word 1 Data Control (1=Read Only, 2=Read and Reset Counters)
42690 Unsigned Word 1 Counter Last Reset, Year (4 digit)
42691 Unsigned Word 1 Counter Last Reset, Month
42692 Unsigned Word 1 Counter Last Reset, Day
42693 Unsigned Word 1 Counter Last Reset, Hour
42694 Unsigned Word 1 Counter Last Reset, Minutes
42695 Unsigned Word 1 Counter Last Reset, Seconds
42696 Unsigned Word 1 Swell Counter, Instantaneous
42697-42711 Unsigned Word 1 Swell Worst Case Record, Instananeous
42712 Unsigned Word 1 Swell Counter, Momentary
42713-42727 Unsigned Word 1 Swell Worst Case Record, Momentary
42728 Unsigned Word 1 Swell Counter, Temporary
42729-42743 Unsigned Word 1 Swell Worst Case Record, Temporary
42744 Unsigned Word 1 Sag Counter, Instantaneous
42745-42759 Unsigned Word 1 Sag Worst Case Record, Instananeous
42760 Unsigned Word 1 Sag Counter, Momentary
42761-42775 Unsigned Word 1 Sag Worst Case Record, Momentary
42776 Unsigned Word 1 Sag Counter, Temporary
42777-42791 Unsigned Word 1 Sag Worst Case Record, Temporary
42792 Unsigned Word 1 Interruption Counter, Momentary
42793 Unsigned Word 1 Interruption Counter, Temporary
42794 Unsigned Word 1 Interruption Counter, Sustained
42795 Unsigned Word 1 Overvoltage Counter
42796 Unsigned Word 1 Undervoltage Counter

Worst Case Record Format

REGISTER DATA SIZE SCALE DESCRIPTION


Reg + 0 Unsigned Word 1 Year
Reg + 1 Unsigned Word 1 Month
Reg + 2 Unsigned Word 1 Day
Reg + 3 Unsigned Word 1 Hours
Reg + 4 Unsigned Word 1 Minutes
Reg + 5 Unsigned Word 1 Seconds
Reg + 6 Unsigned Word 1 Milliseconds
Reg + 7 Unsigned Word 1 Duration (Milliseconds, high word)
Reg + 8 Unsigned Word 1 Duration (Milliseconds, low word)
Reg + 9 Unsigned Word 1 Event Classification Code (see table in 5.3.10)
Reg + 10 Unsigned Word 1 Operation Type (see tables in 5.3.10)
Bits 0-3: Event Quantity
Bits 4-5: System Configuration
Bit 14: Early Termination Flag
Bit 15: Test Record Flag
Reg + 11 Unsigned Long 1 Pre-event Current (Primary Amps)
Word
Reg + 13 Unsigned Word 1 Pre-event Quantity
Reg + 14 Unsigned Word 1 Post-event Quantity

Quantity defined as: a) Voltage (PU Voltage x10000)


b) Current TDD (Percent x10)
c) Voltage THD (Percent x10)

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5.3.12 Power Quality RMS Records

REGISTER DATA SIZE SCALE DESCRIPTION


42817 Unsigned Word 1 Record Number (Must match an Existing PQ Operation
Number)
42818 Unsigned Word 1 Record Type (0=Vx, 1=Ix, 2=THD, 3=TDD)
42819 Unsigned Word 1 Block Number (0 = First Block, Each Block = 100 Sample
Values)
42820 Unsigned Word 1 Sample 0
42821 Unsigned Word 1 Sample 1
. Unsigned Word 1 .
. Unsigned Word 1 .
. Unsigned Word 1 .
42919 Unsigned Word 1 Sample 99

Sample Value Format

Parameter Bit Field Definition Values


Voltage (Vx) 0 to 12 Magnitude 5200 counts = 1.00 Per Unit
13 to 15 Time Base 0 0.25 Cycles
1 0.50 Cycles
2 1.00 Cycles
3 2.00 Cycles
4 4.00 Cycles
5 8.00 Cycles
6 16.0 Cycles
7 32.0 Cycles
Current (Ix) 0 to 9 Magnitude 400 counts = 1.00 Per Unit
10 to 12 Current Base 0 Primary Settings Group
1 Alternate 1 Settings Group
2 Alternate 2 Settings Group
3 to 7 Reserved
13 to 15 Time Base As defined in voltage above

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5.3.13 Power Quality Control and Status Block

REGISTER DATA SIZE SCALE DESCRIPTION


42945 Unsigned Word 1 Start / Stop PQ Record Accumulation (0=Stop, 1=Start, 2=Start
w/record clear)
42946 Unsigned Word 1 Accumulation Status (0=Stopped, 1=Running)
42947 Unsigned Word 1 Number of Records Logged
42948 Unsigned Word *256 Current Scale : Primary Settings
42949 Unsigned Word *256 Current Scale : Alternate 1 Settings
42950 Unsigned Word *256 Current Scale : Alternate 2 Settings
42951 Unsigned Word *256 Voltage Scale (RMS Record)
42952 Unsigned Word 1 Scale Status (0=OK, 1=Out of Date)

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5.3.14 Power Quality Informational Block

REGISTER DATA SIZE SCALE DESCRIPTION


43073 Unsigned Word 1 Host Product Code: PCD = 1
43074 Unsigned Word 1 PQ Variant Code
43075 Unsigned Word 1 PQ Library Revision Code
43076 Unsigned Long 1 PQ Library Unit Availability Code
Word Bit 0: Sag Unit
Bit 1: Swell Unit
Bit 2: Interruption Unit
Bit 3: Undervoltage Unit
Bit 4: Overvoltage Unit
Bit 5: Voltage THD Unit
Bit 6: Current TDD Unit
Bit 7: RMS Profiling Unit
Bit 8-29: Spares
Bit 30-3: Standard (00=IEEE)
43078 Unsigned Word *100 System Frequency (60 Hz = 6000)
43079 Unsigned Word 1 Acquisition rate in Samples per cycle
43080 Unsigned Word 1 Samples per RMS quantity (Base)

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6 6x Registers
6.1 FUNCTION CODE 20 (READ GENERAL REFERENCE)
FUNCTION CODE 21 (WRITE GENERAL REFERENCE)

Programmable Input Definitions:

Physical Input: The opto-isolated binary input that allows external control by physically wiring the
input terminals of the PCD. Physical inputs are labeled (IN1, IN2, IN3, ..., IN32).
Logical Input: An input equated by the Boolean combination of the physical inputs. These inputs are
used by the PCD's state machine and control subroutines. Logical Inputs are labeled (PH3, GRD,
TCM, ...). See later in this paragraph for additional labels.

Active Open: This defines the type of connection from the physical input or inputs and means the
physical state of the opto-isolator's logic is inverted. Example: if the voltage across IN1's terminals
equals zero, then the Boolean equation will evaluate this term as a logical one. Likewise, when a
voltage is applied to IN1, the Boolean equation will evaluate this term as a logical zero.

Active Closed: This defines the type of connection from the physical input or inputs and means that
the physical state of the opto-isolator's logic is the non-inverted. Example: if a voltage is applied
across IN1's terminals, then the Boolean equation will evaluate this term as a logical one. Likewise,
when no voltage is applied to IN1, the Boolean equation will evaluate this term as a logical zero.

Example of a Boolean input equation:

Logical ORed Physical


50-1 = IN1 + IN2 + IN3

Logical ANDed Physical


GRD = IN1 * IN2 * IN3

Input Select:

The physical inputs are associated with a bit mask to determine which inputs are used when
resolving the logical input's Boolean equation. If the appropriate bit is set, the term will be included as
part of the equation. Likewise, a cleared bit indicates that the physical input term will be ignored.

The bit assignment mask for the physical inputs are as follows:

IN1 Æ Bit 0
… . …
… . …
IN32 Æ Bit 31

Negated AND Input:

This is a bit mask that indicates if a selected input is inverted based on the active open or closed
state. The bit mask uses the same associated physical inputs pattern as in the Input Select data.

AND/OR Select:

The combination of the physical inputs' state used to resolve the Boolean equation allows for the
algebraic ANDing or ORing of all of the selected physical inputs.

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User Definable Names:

Physical inputs, IN1 - IN32, have memory allocated for an eight character (NULL is implied in
character 9) user definable strings.

Four protocol commands are required to view or change the PCD’s programmable input setting
tables. The command order for viewing these tables can be retrieved in any sequence, but when the
settings are sent to the PCD, the commands must be sent in the following sequence:

Receive Programmable Input Select and Index data.


Receive Programmable Negated AND Input data.
Receive Programmable Input AND/OR Select data.
Receive Programmable Input User Defined Name data.

Up to 32 logical inputs may be selected at any one time. The protocol document refers to these
generic logical inputs as INPUT1 - INPUT32.

Example:

We want the PH3 logical input to be the combination of the physical inputs IN4 AND NOT IN3 and
ALT1 logical input to be the combination of the physical inputs IN1 OR IN3 OR NOT IN5.

PH3 = IN4 * !IN3


ALT1 = IN1 + IN3 + !IN5

First, generic inputs must be selected to setup the logic equation and for this case INPUT3 is used for
PH3 and INPUT8 is used for ALT1. Note, any inputs 1-32 could be valid selections. The data values
required for these selections use the INDEX table defined in the protocol document.

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REGISTER HEX DATA COMMENT


60009 0xFFF3 No physicals selected for INPUT3 Input Select high word.
Selects IN3 and IN4 bits for INPUT3 Input Select low word.
60070 0x0300 Assigning PH3 offset to INPUT3 for Input Index high word.
60019 0xFFEA No physicals selected for INPUT8 Input Select high word.
Selects IN1, IN3 and IN5 bit for INPUT8 Input Select low word.
60072 0x000C Assigning ALT1 offset to INPUT8 for Input Index low byte
60133 0xFFFB No physical's logic inverted for INPUT3 Negated AND Input high
word
Inverts IN3's logical state for INPUT3 Negated AND Input low word.
60143 0xFFEF Inverts IN5's logical state for INPUT8 Negated AND Input low word.
No physical's logic inverted for INPUT8 Negated AND Input high
word.
60193 0x0004 Boolean combination of INPUT3 selected physical logic are
ANDed, all others are ORed together.
60195 0x0000 INPUT1,-15 outputs not inverted.

Bit = 0, Physical Input is selected.


Bit = 1, Physical Input is not selected.
Low byte consists of bits 0 through 7.
High byte consists of bits 8 through 15.
Index byte is the offset into the PCD's logical input structure.

Example:
We want the CLOSE logical output to be the combination of the physical inputs IN2 AND NOT IN3.
CLOSE = IN2 * !IN3
First, generic inputs must be selected to setup the logic equation and for this case OUTPUT1 is used
for CLOSE. Note, any outputs 1-32 could be valid selections. The data values required for these
selections use the INDEX table defined in the protocol document.

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REGISTER HEX DATA COMMENT


60517 0xFFF9 No physicals selected for OUTPUT1 Output Select high word.
Selects IN2 and IN3 bits for OUTPUT1 Output Select low word.
60581 0x0100 Assigning CLOSE offset to OUTPUT1 for Output Index high word.
60641 0xFFFB Inverts IN3's logical state for OUTPUT1 Negated AND Input low
byte
60705 0x0001 Boolean combination of OUTPUT1 selected physical logic are
ANDed, all others are ORed together.
60707 0x0000 OUTPUT1 selected physical output logic not inverted.
60768- “ NAME” OUTPUT1 8 ASCII character output strings.
60771
60896 0x01 Programmable OUTPUT1 delay.

Bit = 0, Physical Input is selected.


Bit = 1, Physical Input is not selected.
Low byte consists of bits 0 through 7.
High byte consists of bits 8 through 15.
Index byte is the offset into the PCD's logical output structure.

Logical Input Indices

INDEX INPUT DEFINITION PRODUCT


00 52A Breaker Position - Closed/Opened PCD
01 52B Breaker Position - Opened/Closed PCD
02 43A Reclose Function - Enabled/Disabled PCD
03 PH3 Phase Torque Control PCD
04 GRD Ground Torque Control PCD
05 SCC Spring Charging Contact PCD
06 79S Single Shot Reclosing PCD
07 79M Multi Shot Reclosing PCD
08 TCM Trip Coil Monitoring PCD
09 50-1 Instantaneous 50P-1 50N-1 PCD
10 50-2 Instantaneous 50P-2 50N-2 PCD
11 50-3 Instantaneous 50P-3 50N-3 PCD
12 ALT1 Enables ALT1 settings table ALL
13 ALT2 Enables ALT2 settings table ALL
14 ECI1 Event Capture Initiated data in fault record ALL
15 ECI2 Event Capture Initiated data in fault record ALL
16 WCI Waveform Capture Initiated ALL
17 ZSC Zone Sequence Coordination PCD
18 Open Trip initiated PCD
19 Close Close Initiated PCD
20 46 Enables 46 Function ALL
21 67P Enables 67P Function PCD
22 67N Enables 67N Function PCD
23 ULI1 User Logical Input Asserts ULO1 ALL
24 ULI2 User Logical Input Asserts ULO2 ALL
25 ULI3 User Logical Input Asserts ULO3 ALL
26 ULI4 User Logical Input Asserts ULO4 ALL
27 ULI5 User Logical Input Asserts ULO5 ALL
28 ULI6 User Logical Input Asserts ULO6 ALL
29 ULI7 User Logical Input Asserts ULO7 ALL
30 ULI8 User Logical Input Asserts ULO8 ALL
31 ULI9 User Logical Input Asserts ULO9 ALL
32 CRI Resets Overcurrent Trip And all Recloser Counters PCD
33 ARCI Timed Reclose Block PCD
34 TARC Initiate Trip and Automatic Reclose PCD
35 SEF Sensitive Earth Fault Enable ALL
36 Ext BFI External Started Input PCD
37 BFI Breaker Fail Initiate PCD
38 RBI Remote Block Initiate ALL
39 ALT1Pon Alternate Settings 1 Pulse On ALL

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40 ALT1Poff Alternate Settings 1 Pulse Off ALL


41 ALT2Pon Alternate Settings 2 Pulse On ALL
42 ALT2Poff Alternate Settings 2 Pulse Off ALL
43 OPNBLK Tag Open Block ALL
44 CLSBLK Tag Close Block ALL
45 TAGMSG Tag Message ALL
1
46 52aA Phase A 52a Contact Input PCD
1
47 52aB Phase B 52a Contact Input PCD
1
48 52aC Phase C 52a Contact Input PCD
1
49 52bA Phase A 52b Contact Input PCD
1
50 52bB Phase B 52b Contact Input PCD
1
51 52bC Phase C 52b Contact Input PCD
1
52 TRIPA Phase A Direct Trip Input PCD
1
53 TRIPB Phase B Direct Trip Input PCD
1
54 TRIPC Phase C Direct Trip Input PCD
1
55 CLOSEA Phase A Direct Close Input PCD
1
56 CLOSEB Phase B Direct Close Input PCD
1
57 CLOSEC Phase C Direct Close Input PCD
58 SW1-52a Switch 1 52a Contact Input SCD
59 SW1-52b Switch 1 52b Contact Input SCD
60 SW2-52a Switch 2 52a Contact Input SCD
61 SW2-52b Switch 2 52b Contact Input SCD
62 SW3-52a Switch 3 52a Contact Input SCD
63 SW3-52b Switch 3 52b Contact Input SCD
64 SW4-52a Switch 4 52a Contact Input SCD
65 SW4-52b Switch 4 52b Contact Input SCD
66 OPEN1 Switch 1 Open Initiate SCD
67 CLOSE1 Switch 1 Close Initiate SCD
68 OPEN2 Switch 2 Open Initiate SCD
69 CLOSE2 Switch 2 Close Initiate SCD
70 OPEN3 Switch 3 Open Initiate SCD
71 CLOSE3 Switch 3 Close Initiate SCD
72 OPEN4 Switch 4 Open Initiate SCD
73 CLOSE4 Switch 4 Close Initiate SCD
74 SECBLK Sectionalize Block SCD
75 OSLIM Sectionalize One-shot Limit SCD
76 FLTDET Fault Detector Enable SCD
77 XFERBLK Source Transfer Block SCD
78 XFERPS Source Transfer Initiate P→S SCD
79 XFERSP Source Transfer Initiate S→P SCD
80 RSTRPS Source Restoration Initiate P→S SCD
81 RSTRSP Source Restoration Initiate S→P SCD
82 RST_TA Reset target alarms ALL
83 RST_SA Reset seal-in alarms ALL

1
Notes: Single Phase mode only when available

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Logical Output Indices

INDEX OUTPUT DEFINITION PRODUCT


00 TRIP Fixed Trip PCD
01 CLOSE Fixed Close PCD
02 ALARM Self Check Alarm ALL
03 27-1P Undervoltage (any phase) ALL
04 46 Negative Sequence Overcurrent ALL
05 50P-1 Phase Inst. Overcurrent PCD
06 50N-1 Neutral Inst. Overcurrent PCD
07 50P-2 Phase Inst. Overcurrent PCD
08 50N-2 Neutral Inst. Overcurrent PCD
09 50P-3 Phase Inst. Overcurrent PCD
10 50N-3 Neutral Inst. Overcurrent PCD
11 51P Phase Time Overcurrent PCD
12 51N Neutral Time Overcurrent PCD
13 59 Overvoltage (any phase) ALL
14 67P Directional Overcurrent (positive sequence) PCD
15 67N Directional Overcurrent (negative sequence) PCD
16 81S-1 Frequency Shed (First stage) ALL
17 81R-1 Frequency Restore (First stage) ALL
18 PATA Phase A Target ALL
19 PBTA Phase B Target ALL
20 PCTA Phase C Target ALL
21 TCFA Trip Circuit Fail PCD
22 TCC Tap Changer Cutout PCD
23 79DA Recloser Disable PCD
24 PUA Overcurrent Pickup ALL
25 79LOA Recloser Lockout PCD
26 BFA Breaker Fail PCD
27 PDA Phase Peak Demand ALL
28 NDA Neutral Peak Demand ALL
29 BFUA Blown Fuse ALL
30 KSI KiloAmp Summation ALL
31 79CA-1 Reclose Counter1 PCD
32 HPFA High Power Factor ALL
33 LPFA Low Power Factor ALL
34 OCTC Overcurrent Trip Counter PCD
35 50-1D 50-1 Element Disable PCD
36 50-2D 50-2 Element Disable PCD
37 STC Setting Table Change ALL
38 ZSC Zone Sequence PCD
39 PH3-D Phase Torque Control Disable PCD
40 GRD-D Neutral Torque Control Disable PCD
41 32PA Directional Pickup (pos seq) ALL
42 32NA Directional Pickup (neg seq) ALL
43 27-3P Undervoltage (all phases) ALL
44 VarDA VAR Demand Alarm ALL
45 79CA-2 Reclose Counter 2 PCD
46 TRIPA Single Pole Trip Phase A PCD
47 TRIPB Single Pole Trip Phase B PCD
48 TRIPC Single Pole Trip Phase C PCD
49 27-1P* Undervoltage (any phase) (seal-in) ALL
50 46* Negative Sequence Overcurrent (seal-in) ALL
51 50P-1* Phase Inst. Overcurrent (seal-in) PCD
52 50N-1* Neutral Inst. Overcurrent (seal-in) PCD
53 50P-2* Phase Inst. Overcurrent (seal-in) PCD
54 50N-2* Neutral Inst. Overcurrent (seal-in) PCD
55 50P-3* Phase Inst. Overcurrent (seal-in) PCD
56 50N-3* Neutral Inst. Overcurrent (seal-in) PCD
57 51P* Phase Time Overcurrent (seal-in) PCD
58 51N* Neutral Time Overcurrent (seal-in) PCD

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59 59* Overvoltage (any phase) (seal-in) ALL


60 67P* Directional Overcurrent (positive sequence) PCD
61 67N* Directional Overcurrent (negative sequence) PCD
62 81S-1* Frequency Shed (First stage) ALL
63 81R-1* Frequency Restore (First stage) ALL
64 81O-1* Over Frequency (First stage) ALL
65 27-3P* Undervoltage (all phases) (seal-in) ALL
66 TRIPA* Single Pole Trip Phase A (seal-in) PCD
67 TRIPB* Single Pole Trip Phase B (seal-in) PCD
68 TRIPC* Single Pole Trip Phase C (seal-in) PCD
69 ULO1 User Logical Output 1 ALL
70 ULO2 User Logical Output 2 ALL
71 ULO3 User Logical Output 3 ALL
72 ULO4 User Logical Output 4 ALL
73 ULO5 User Logical Output 5 ALL
74 ULO6 User Logical Output 6 ALL
75 ULO7 User Logical Output 7 ALL
76 ULO8 User Logical Output 8 ALL
77 ULO9 User Logical Output 9 ALL
78 PVArA Positive Var ALL
79 NVArA Negative Var ALL
80 LOADA Load Current ALL
81 81O-1 Over Frequency (First Stage) ALL
82 81O-2 Over Frequency (2nd Stage) ALL
83 81S-2 Frequency Shed (2nd Stage) ALL
84 81R-2 Frequency Restore (2nd Stage) ALL
85 81O-2* Over Frequency (2nd Stage) (seal-in) ALL
86 81S-2* Frequency Shed (2nd Stage) (seal-in) ALL
87 81R-2* Frequency Restore (2nd Stage) (seal-in) ALL
88 CLTA Cold Load Timer PCD
89 PWatt1 Positive Watt Alarm 1 ALL
90 PWatt2 Positive Watt Alarm 2 ALL
91 79CA1* Recloser Counter 1 Alarm (seal-in) PCD
92 79CA2* Recloser Counter 2 Alarm (seal-in) PCD
93 SEF* Sensitive Earth Fault Trip (seal-in) ALL
94 SEF Sensitive Earth Fault Trip ALL
95 BZA Bus Zone Alarm PCD
96 BF Trip Breaker Fail Trip PCD
97 BF Retrip Breaker Fail Re-Trip PCD
98 BF Trip* Breaker Fail Trip (seal-in) PCD
99 BF Retrip* Breaker Fail Re-Trip (seal-in) PCD
100 32P Phase Directionality Alarm ALL
101 32N Neutral Directionality Alarm ALL
102 32P* Phase Directionality Alarm ALL
103 32N* Neutral Directionality Alarm (seal-in) ALL
104 BFA* Breaker Failure Alarm (seal-in) PCD
105 RBA Remote Blocked Alarm ALL
106 27A Phase A Undervoltage Alarm ALL
107 27B Phase B Undervoltage Alarm ALL
108 27C Phase C Undervoltage Alarm ALL
109 LOAC Loss of AC Alarm ALL
110 27A* Phase A Undervoltage Alarm (seal-in) ALL
111 27B* Phase B Undervoltage Alarm (seal-in) ALL
112 27C* Phase C Undervoltage Alarm (seal-in) ALL
113 LOAC* Loss of AC Alarm (seal-in) ALL
114 TAGOPN Tag Open ALL
115 TAGCLS Tag Close ALL
116 59A 59A Phase A Overvoltage Alarm ALL
117 59B 59B Phase B Overvoltage Alarm ALL
118 59C 59C Phase C Overvoltage Alarm ALL
119 59-3P 59-3P 3 Phase Overvoltage Alarm ALL
120 59A* 59A Phase A Overvoltage Alarm (seal-in) ALL
121 59B* 59B Phase B Overvoltage Alarm (seal-in) ALL

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122 59C* 59C Phase C Overvoltage Alarm (seal-in) ALL


123 59-3P* 59-3P 3 Phase Overvoltage Alarm (seal-in) ALL
124 PTA Phase Target Alarm ALL
125 NTA Neutral Target Alarm ALL
1
126 CLOSEA Phase A Close Output PCD
1
127 CLOSEB Phase B Close Output PCD
1
128 CLOSEC Phase C Close Output PCD
1
129 FAILA Phase A Pole Failure Output PCD
1
130 FAILB Phase B Pole Failure Output PCD
1
131 FAILC Phase C Pole Failure Output PCD
1
132 50_1A Phase A 50-1 Trip Output PCD
1
133 50_1B Phase B 50-1 Trip Output PCD
1
134 50_1C Phase C 50-1 Trip Output PCD
1
135 50_1A* Phase A 50-1 Trip Output (seal-in) PCD
1
136 50_1B* Phase B 50-1 Trip Output (seal-in) PCD
1
137 50_1C* Phase C 50-1 Trip Output (seal-in) PCD
1
138 50_2A Phase A 50-2 Trip Output PCD
1
139 50_2B Phase B 50-2 Trip Output PCD
1
140 50_2C Phase C 50-2 Trip Output PCD
1
141 50_2A* Phase A 50-2 Trip Output (seal-in) PCD
1
142 50_2B* Phase B 50-2 Trip Output (seal-in) PCD
1
143 50_2C* Phase C 50-2 Trip Output (seal-in) PCD
1
144 50_3A Phase A 50-3 Trip Output PCD
1
145 50_3B Phase B 50-3 Trip Output PCD
1
146 50_3C Phase C 50-3 Trip Output PCD
1
147 50_3A* Phase A 50-3 Trip Output (seal-in) PCD
1
148 50_3B* Phase B 50-3 Trip Output (seal-in) PCD
1
149 50_3C* Phase C 50-3 Trip Output (seal-in) PCD
1
150 51A Phase A 51 Trip Output PCD
1
151 51B Phase B 51 Trip Output PCD
1
152 51C Phase C 51 Trip Output PCD
1
153 51A* Phase A 51 Trip Output (seal-in) PCD
1
154 51B* Phase B 51 Trip Output (seal-in) PCD
1
155 51C* Phase C 51 Trip Output (seal-in) PCD
1
156 67A Phase A 67 Trip Output PCD
1
157 67B Phase B 67 Trip Output PCD
1
158 67C Phase C 67 Trip Output PCD
1
159 67A* Phase A 67 Trip Output (seal-in) PCD
1
160 67B* Phase B 67 Trip Output (seal-in) PCD
1
161 67C* Phase C 67 Trip Output (seal-in) PCD
1
162 79LOAA Phase A Lockout PCD
1
163 79LOAB Phase B Lockout PCD
1
164 79LOAC Phase C Lockout PCD
165 SW1OPEN Switch 1 Open Output SCD
166 SW1CLOSE Switch 1 Close Output SCD
167 SW1FAIL Switch 1 Failure Output SCD
168 SW2OPEN Switch 2 Open Output SCD
169 SW2CLOSE Switch 2 Close Output SCD
170 SW2FAIL Switch 2 Failure Output SCD
171 SW3OPEN Switch 3 Open Output SCD
172 SW3CLOSE Switch 3 Close Output SCD
173 SW3FAIL Switch 3 Failure Output SCD
174 SW4OPEN Switch 4 Open Output SCD
175 SW4CLOSE Switch 4 Close Output SCD
176 SW4FAIL Switch 4 Failure Output SCD
177 FLTDET Fault Detected Output SCD
178 FLTDET* Fault Detected Output (seal-in) SCD
179 SW1A Switch 1 Operations Alarm SCD
180 SW2A Switch 2 Operations Alarm SCD
181 SW3A Switch 3 Operations Alarm SCD
182 SW4A Switch 4 Operations Alarm SCD
183 SW1A* Switch 1 Operations Alarm (seal-in) SCD
184 SW2A* Switch 2 Operations Alarm (seal-in) SCD

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185 SW3A* Switch 3 Operations Alarm (seal-in) SCD


186 SW4A* Switch 4 Operations Alarm (seal-in) SCD
187 SECALM Sectionalize Block Alarm SCD
188 OSALRM Sectionalize One-shot Active Alarm SCD
189 PSXFER Primary to secondary transfer SCD
190 SPXFER Secondary to primary transfer SCD
191 PSXFER* Primary to secondary transfer (Seal-in) SCD
192 SPXFER* Secondary to primary transfer (Seal-in) SCD
193 LCMTRIP Trip due to LCM PCD
194 LCMTRIP* Trip due to LCM (Seal-in) PCD
195 LCMCLOSE Close due to LCM PCD
196 LCMCLOSE* Close due to LCM (Seal-in) PCD
197 TAGBUTTON Hot tag button status PCD
198 LCMMIDPOINT LCM midpoint operation PCD
199 LCMMIDPOINT* LCM midpoint operation (Seal-in) PCD
200 ISD_TRIPA Trip phase A signal to ISD PCD
201 ISD-TRIPB Trip phase B signal to ISD PCD
202 ISD_TRIPC Trip phase C signal to ISD PCD
203 ISD_TRIG Trigger signal to ISD PCD
204 CPU_BATT_FAIL Replace CPU Battery PCD
205 BATT_FAIL Battery failure PCD
206 PRIM_ACTIVE Primary protection settings group active PCD
207 ALT1_ACTIVE Alt1 protection settings group active PCD
208 ALT2_ACTIVE Alt2 protection settings group active PCD
209 BANK1_ACTIVE Bank1 settings active ALL
210 BANK2_ACTIVE Bank2 settings active ALL

1
Notes: Single Phase mode only when available

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Bit Mapping for the Select and Input Inversion Masks (Programmable Inputs)

Bit Physical Input


0 IN1
1 IN2
. .
. .
30 FB2
31 FB1

Bit Mapping for the Select and Input Inversion Masks (Programmable Outputs)

Bit Logical Output


0 IN1
1 IN2
. ..
. ..
30 FB2
31 FB1

NOTE: All models have same physical output mapping however, the number of physical outputs
available on the unit depends on the IO module population of the unit.

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6.1.1 Programmable Input Select, Index, and Feedback Masks

NOTE: All models have same physical input mapping however, the number of physical inputs
available on the unit depends on the IO module population of the unit.

REGISTER DEFINTION
60000 Spare
60001 Execute Register for Program Inputs (registers 60001-
60511)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
60002 high byte Relay Password Character 1
low byte Relay Password Character 2
60003 high byte Relay Password Character 3
low byte Relay Password Character 4
60004 Spare (Writeable)
60005 INPUT1 Select Mask, High Word
60006 INPUT1 Select Mask, Low Word
60007 INPUT2 Select Mask, High Word
60008 INPUT2 Select Mask, Low Word
60009 INPUT3 Select Mask, High Word
60010 INPUT3 Select Mask, Low Word
60011 INPUT4 Select Mask, High Word
60012 INPUT4 Select Mask, Low Word
60013 INPUT5 Select Mask, High Word
60014 INPUT5 Select Mask, Low Word
60015 INPUT6 Select Mask, High Word
60016 INPUT6 Select Mask, Low Word
60017 INPUT7 Select Mask, High Word
60018 INPUT7 Select Mask, Low Word
60019 INPUT8 Select Mask, High Word
60020 INPUT8 Select Mask, Low Word
60021 INPUT9 Select Mask, High Word
60022 INPUT9 Select Mask, Low Word
60023 INPUT10 Select Mask, High Word
60024 INPUT10 Select Mask, Low Word
60025 INPUT11 Select Mask, High Word
60026 INPUT11 Select Mask, Low Word
60027 INPUT12 Select Mask, High Word
60028 INPUT12 Select Mask, Low Word
60029 INPUT13 Select Mask, High Word
60030 INPUT13 Select Mask, Low Word
60031 INPUT14 Select Mask, High Word
60032 INPUT14 Select Mask, Low Word
60033 INPUT15 Select Mask, High Word
60034 INPUT15 Select Mask, Low Word
60035 INPUT16 Select Mask, High Word
60036 INPUT16 Select Mask, Low Word
60037 INPUT17 Select Mask, High Word
60038 INPUT17 Select Mask, Low Word
60039 INPUT18 Select Mask, High Word
60040 INPUT18 Select Mask, Low Word
60041 INPUT19 Select Mask, High Word
60042 INPUT19 Select Mask, Low Word
60043 INPUT20 Select Mask, High Word
60044 INPUT20 Select Mask, Low Word
60045 INPUT21 Select Mask, High Word
60046 INPUT21 Select Mask, Low Word
60047 INPUT22 Select Mask, High Word
60048 INPUT22 Select Mask, Low Word
60049 INPUT23 Select Mask, High Word
60050 INPUT23 Select Mask, Low Word
60051 INPUT24 Select Mask, High Word

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REGISTER DEFINTION
60052 INPUT24 Select Mask, Low Word
60053 INPUT25 Select Mask, High Word
60054 INPUT25 Select Mask, Low Word
60055 INPUT26 Select Mask, High Word
60056 INPUT26 Select Mask, Low Word
60057 INPUT27 Select Mask, High Word
60058 INPUT27 Select Mask, Low Word
60059 INPUT28 Select Mask, High Word
60060 INPUT28 Select Mask, Low Word
60061 INPUT29 Select Mask, High Word
60062 INPUT29 Select Mask, Low Word
60063 INPUT30 Select Mask, High Word
60064 INPUT30 Select Mask, Low Word
60065 INPUT31 Select Mask, High Word
60066 INPUT31 Select Mask, Low Word
60067 INPUT32 Select Mask, High Word
60068 INPUT32 Select Mask, Low Word
60069 high byte INPUT1 Index byte
low byte INPUT2 Index byte
60070 high byte INPUT3 Index byte
low byte INPUT4 Index byte
60071 high byte INPUT5 Index byte
low byte INPUT6 Index byte
60072 high byte INPUT7 Index byte
low byte INPUT8 Index byte
60073 high byte INPUT9 Index byte
low byte INPUT10 Index byte
60074 high byte INPUT11 Index byte
low byte INPUT12 Index byte
60075 high byte INPUT13 Index byte
low byte INPUT14 Index byte
60076 high byt INPUT15 Index byte
low byte e INPUT16 Index byte
60077 high byte INPUT17 Index byte
low byte INPUT18 Index byte
60078 high byte INPUT19 Index byte
low byte INPUT20 Index byte
60079 high byte INPUT21 Index byte
low byte INPUT22 Index byte
60080 high byte INPUT23 Index byte
low byte INPUT24 Index byte
60081 high byte INPUT25 Index byte
low byte INPUT26 Index byte
60082 high byte INPUT27 Index byte
low byte INPUT28 Index byte
60083 high byte INPUT29 Index byte
low byte INPUT30 Index byte
60084 high byte INPUT31 Index byte
low byte INPUT32 Index byte
60085 Feedback Term Mask, bits 31-16
60086 Feedback Term Mask, bits 15-0
Bit = 0 : Feedback Term
Bit = 1 : Normal Input Term

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6.1.2 Programmable Input Input Invert, AND/OR Select, & Output Invert Mask
Input Inversion: Bit = 0, Input Inverted.
Bit = 1, Input Normal.
AND/OR Selection: Bit = 0, Selected inputs are ORed together.
Bit = 1, Selected inputs are ANDed together.
Output Inversion: Bit = 0, Normal
Bit = 1, Inverted

REGISTER DEFINTION
60128 IN1 Input Inversion Mask, High Word
60129 IN1 Input Inversion Mask, Low Word
60130 IN2 Input Inversion Mask, High Word
60131 IN2 Input Inversion Mask, Low Word
60132 IN3 Input Inversion Mask, High Word
60133 IN3 Input Inversion Mask, Low Word
60134 IN4 Input Inversion Mask, High Word
60135 IN4 Input Inversion Mask, Low Word
60136 IN5 Input Inversion Mask, High Word
60137 IN5 Input Inversion Mask, Low Word
60139 IN6 Input Inversion Mask, High Word
60138 IN6 Input Inversion Mask, Low Word
60140 IN7 Input Inversion Mask, High Word
60141 IN7 Input Inversion Mask, Low Word
60142 IN8 Input Inversion Mask, High Word
60143 IN8 Input Inversion Mask, Low Word
60144 IN9 Input Inversion Mask, High Word
60145 IN9 Input Inversion Mask, Low Word
60146 IN10 Input Inversion Mask, High Word
60147 IN10 Input Inversion Mask, Low Word
60148 IN11 Input Inversion Mask, High Word
60149 IN11 Input Inversion Mask, Low Word
60150 IN12 Input Inversion Mask, High Word
60151 IN12 Input Inversion Mask, Low Word
60152 IN13 Input Inversion Mask, High Word
60153 IN13 Input Inversion Mask, Low Word
60154 IN14 Input Inversion Mask, High Word
60155 IN14 Input Inversion Mask, Low Word
60156 IN15 Input Inversion Mask, High Word
60157 IN15 Input Inversion Mask, Low Word
60158 IN16 Input Inversion Mask, High Word
60159 IN16 Input Inversion Mask, Low Word
60160 IN17 Input Inversion Mask, High Word
60161 IN17 Input Inversion Mask, Low Word
60162 IN18 Input Inversion Mask, High Word
60163 IN18 Input Inversion Mask, Low Word
60164 IN19 Input Inversion Mask, High Word
60165 IN19 Input Inversion Mask, Low Word
60166 IN20 Input Inversion Mask, High Word
60167 IN20 Input Inversion Mask, Low Word
60168 IN21 Input Inversion Mask, High Word
60169 IN21 Input Inversion Mask, Low Word
60170 IN22 Input Inversion Mask, High Word
60171 IN22 Input Inversion Mask, Low Word
60172 IN23 Input Inversion Mask, High Word
60173 IN23 Input Inversion Mask, Low Word
60174 IN24 Input Inversion Mask, High Word
60175 IN24 Input Inversion Mask, Low Word
60176 IN25 Input Inversion Mask, High Word
60177 IN25 Input Inversion Mask, Low Word
60178 IN26 Input Inversion Mask, High Word
60179 IN26 Input Inversion Mask, Low Word
60180 IN27 Input Inversion Mask, High Word
60181 IN27 Input Inversion Mask, Low Word

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REGISTER DEFINTION
60182 IN28 Input Inversion Mask, High Word
60183 IN28 Input Inversion Mask, Low Word
60184 IN29 Input Inversion Mask, High Word
60185 IN29 Input Inversion Mask, Low Word
60186 IN30 Input Inversion Mask, High Word
60187 IN30 Input Inversion Mask, Low Word
60188 IN31 Input Inversion Mask, High Word
60189 IN31 Input Inversion Mask, Low Word
60190 IN32 Input Inversion Mask, High Word
60191 IN32 Input Inversion Mask, Low Word
60192 Programmable Input AND/OR Selection bits 31-16
60193 Programmable Input AND/OR Selection bits 15-0
60194 Programmable Input Output Invert Mask bits 31-16*
60195 Programmable Input Output Invert Mask bits 15-0*
* Currently not supported.

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6.1.3 Programmable User Defined Input Names

User definable 8 ASCII character input strings. Byte 9 is an implied NULL.

REGISTER DEFINTION
60256-60259 IN1 Character String 8 bytes
60260-60263 IN2 Character String 8 bytes
60264-60267 IN3 Character String 8 bytes
60268-60271 IN4 Character String 8 bytes
60272-60275 IN5 Character String 8 bytes
60276-60279 IN6 Character String 8 bytes
60280-60283 IN7 Character String 8 bytes
60284-60287 IN8 Character String 8 bytes
60288-60291 IN9 Character String 8 bytes
60292-60295 IN10 Character String 8 bytes
60296-60299 IN11 Character String 8 bytes
60300-60303 IN12 Character String 8 bytes
60304-60307 IN13 Character String 8 bytes
60308-60311 IN14 Character String 8 bytes
60312-60315 IN15 Character String 8 bytes
60316-60319 IN16 Character String 8 bytes
60320-60323 IN17 Character String 8 bytes
60324-60327 IN18 Character String 8 bytes
60328-60331 IN19 Character String 8 bytes
60332-60335 IN20 Character String 8 bytes
60336-60339 IN21 Character String 8 bytes
60340-60343 IN22 Character String 8 bytes
60344-60347 IN23 Character String 8 bytes
60348-60351 IN24 Character String 8 bytes
60352-60355 IN25 Character String 8 bytes
60356-60359 IN26 Character String 8 bytes
60360-60363 IN27 Character String 8 bytes
60364-60367 IN28 Character String 8 bytes
60368-60371 IN29 Character String 8 bytes
60372-60375 IN30 Character String 8 bytes
60376-60379 IN31 Character String 8 bytes
60380-60383 IN32 Character String 8 bytes

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6.1.4 Programmable Output Select and Index


Bit = 0, Physical Output is selected.
Bit = 1, Physical Output is not selected.

REGISTER DEFINTION
60512 Spare
60513 Execute Register for Program Outputs (registers 60513-
61023)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
60514 high byte Relay Password Character 1
low byte Relay Password Character 2
60515 high byte Relay Password Character 3
low byte Relay Password Character 4
60516 Spare (Writeable)
60517 OUTPUT1 Select Mask bits 31-16
60518 OUTPUT1 Select Mask bits 15-0
60519 OUTPUT2 Select Mask bits 31-16
60520 OUTPUT2 Select Mask bits 15-0
60521 OUTPUT3 Select Mask bits 31-16
60522 OUTPUT3 Select Mask bits 15-0
60523 OUTPUT4 Select Mask bits 31-16
60524 OUTPUT4 Select Mask bits 15-0
60525 OUTPUT5 Select Mask bits 31-16
60526 OUTPUT5 Select Mask bits 15-0
60527 OUTPUT6 Select Mask bits 31-16
60528 OUTPUT6 Select Mask bits 15-0
60529 OUTPUT7 Select Mask bits 31-16
60530 OUTPUT7 Select Mask bits 15-0
60531 OUTPUT8 Select Mask bits 31-16
60532 OUTPUT8 Select Mask bits 15-0
60533 OUTPUT9 Select Mask bits 31-16
60534 OUTPUT9 Select Mask bits 15-0
60535 OUTPUT10 Select Mask bits 31-16
60536 OUTPUT10 Select Mask bits 15-0
60537 OUTPUT11 Select Mask bits 31-16
60538 OUTPUT11 Select Mask bits 15-0
60539 OUTPUT12 Select Mask bits 31-16
60540 OUTPUT12 Select Mask bits 15-0
60541 OUTPUT13 Select Mask bits 31-16
60542 OUTPUT13 Select Mask bits 15-0
60543 OUTPUT14 Select Mask bits 31-16
60544 OUTPUT14 Select Mask bits 15-0
60545 OUTPUT15 Select Mask bits 31-16
60546 OUTPUT15 Select Mask bits 15-0
60547 OUTPUT16 Select Mask bits 31-16
60548 OUTPUT16 Select Mask bits 15-0
60549 OUTPUT17 Select Mask bits 31-16
60550 OUTPUT17 Select Mask bits 15-0
60551 OUTPUT18 Select Mask bits 31-16
60552 OUTPUT18 Select Mask bits 15-0
60553 OUTPUT19 Select Mask bits 31-16
60554 OUTPUT19 Select Mask bits 15-0
60555 OUTPUT20 Select Mask bits 31-16
60556 OUTPUT20 Select Mask bits 15-0
60557 OUTPUT21 Select Mask bits 31-16
60558 OUTPUT21 Select Mask bits 15-0
60559 OUTPUT22 Select Mask bits 31-16
60560 OUTPUT22 Select Mask bits 15-0
60561 OUTPUT23 Select Mask bits 31-16
60562 OUTPUT23 Select Mask bits 15-0
60563 OUTPUT24 Select Mask bits 31-16
60564 OUTPUT24 Select Mask bits 15-0

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REGISTER DEFINTION
60565 OUTPUT25 Select Mask bits 31-16
60566 OUTPUT25 Select Mask bits 15-0
60567 OUTPUT26 Select Mask bits 31-16
60568 OUTPUT26 Select Mask bits 15-0
60569 OUTPUT27 Select Mask bits 31-16
60570 OUTPUT27 Select Mask bits 15-0
60571 OUTPUT28 Select Mask bits 31-16
60572 OUTPUT28 Select Mask bits 15-0
60573 OUTPUT29 Select Mask bits 31-16
60574 OUTPUT29 Select Mask bits 15-0
60575 OUTPUT30 Select Mask bits 31-16
60576 OUTPUT30 Select Mask bits 15-0
60577 OUTPUT31 Select Mask bits 31-16
60578 OUTPUT31 Select Mask bits 15-0
60579 OUTPUT32 Select Mask bits 31-16
60580 OUTPUT32 Select Mask bits 15-0
60581 high byte OUTPUT1 index byte
low byte OUTPUT2 index byte
60582 high byte OUTPUT3 index byte
low byte OUTPUT4 index byte
60583 high byte OUTPUT5 index byte
low byte OUTPUT6 index byte
60584 high byte OUTPUT7 index byte
low byte OUTPUT8 index byte
60585 high byte OUTPUT9 index byte
low byte OUTPUT10 index byte
60586 high byte OUTPUT11 index byte
low byte OUTPUT12 index byte
60587 high byte OUTPUT13 index byte
low byte OUTPUT14 index byte
60588 high byte OUTPUT15 index byte
low byte OUTPUT16 index byte
60589 high byte OUTPUT17 index byte
low byte OUTPUT18 index byte
60590 high byte OUTPUT19 index byte
low byte OUTPUT20 index byte
60591 high byte OUTPUT21 index byte
low byte OUTPUT22 index byte
60592 high byte OUTPUT23 index byte
low byte OUTPUT24 index byte
60593 high byte OUTPUT25 index byte
low byte OUTPUT26 index byte
60594 high byte OUTPUT27 index byte
low byte OUTPUT28 index byte
60595 high byte OUTPUT29 index byte
low byte OUTPUT30 index byte
60596 high byte OUTPUT31 index byte
low byte OUTPUT32 index byte

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6.1.5 Programmable Output Input Invert, AND/OR Select, & Output Invert Mask
Input Inversion: Bit = 0, Input Inverted.
Bit = 1, Input Normal.
AND/OR Selection: Bit = 0, Selected inputs are ORed together.
Bit = 1, Selected inputs are ANDed together.
Output Inversion: Bit = 0, Normal
Bit = 1, Inverted

REGISTER DEFINTION
60640 OUT1 Input Invert Mask, High Word
60641 OUT1 Input Invert Mask, Low Word
60642 OUT2 Input Invert Mask, High Word
60643 OUT2 Input Invert Mask, Low Word
60644 OUT3 Input Invert Mask, High Word
60645 OUT3 Input Invert Mask, Low Word
60646 OUT4 Input Invert Mask, High Word
60647 OUT4 Input Invert Mask, Low Word
60648 OUT5 Input Invert Mask, High Word
60649 OUT5 Input Invert Mask, Low Word
60650 OUT6 Input Invert Mask, High Word
60651 OUT6 Input Invert Mask, Low Word
60652 OUT7 Input Invert Mask, High Word
60653 OUT7 Input Invert Mask, Low Word
60654 OUT8 Input Invert Mask, High Word
60655 OUT8 Input Invert Mask, Low Word
60656 OUT9 Input Invert Mask, High Word
60657 OUT9 Input Invert Mask, Low Word
60658 OUT10 Input Invert Mask, High Word
60659 OUT10 Input Invert Mask, Low Word
60660 OUT11 Input Invert Mask, High Word
60661 OUT11 Input Invert Mask, Low Word
60662 OUT12 Input Invert Mask, High Word
60663 OUT12 Input Invert Mask, Low Word
60664 OUT13 Input Invert Mask, High Word
60665 OUT13 Input Invert Mask, Low Word
60666 OUT14 Input Invert Mask, High Word
60667 OUT14 Input Invert Mask, Low Word
60668 OUT15 Input Invert Mask, High Word
60669 OUT15 Input Invert Mask, Low Word
60670 OUT16 Input Invert Mask, High Word
60671 OUT16 Input Invert Mask, Low Word
60672 OUT17 Input Invert Mask, High Word
60673 OUT17 Input Invert Mask, Low Word
60674 OUT18 Input Invert Mask, High Word
60675 OUT18 Input Invert Mask, Low Word
60676 OUT19 Input Invert Mask, High Word
60677 OUT19 Input Invert Mask, Low Word
60678 OUT20 Input Invert Mask, High Word
60679 OUT20 Input Invert Mask, Low Word
60680 OUT21 Input Invert Mask, High Word
60681 OUT21 Input Invert Mask, Low Word
60682 OUT22 Input Invert Mask, High Word
60683 OUT22 Input Invert Mask, Low Word
60684 OUT23 Input Invert Mask, High Word
60685 OUT23 Input Invert Mask, Low Word
60686 OUT24 Input Invert Mask, High Word
60687 OUT24 Input Invert Mask, Low Word
60688 OUT25 Input Invert Mask, High Word
60689 OUT25 Input Invert Mask, Low Word
60690 OUT26 Input Invert Mask, High Word
60691 OUT26 Input Invert Mask, Low Word
60692 OUT27 Input Invert Mask, High Word

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REGISTER DEFINTION
60693 OUT27 Input Invert Mask, Low Word
60694 OUT28 Input Invert Mask, High Word
60695 OUT28 Input Invert Mask, Low Word
60696 OUT29 Input Invert Mask, High Word
60697 OUT29 Input Invert Mask, Low Word
60698 OUT30 Input Invert Mask, High Word
60699 OUT30 Input Invert Mask, Low Word
60700 OUT31 Input Invert Mask, High Word
60701 OUT31 Input Invert Mask, Low Word
60702 OUT32 Input Invert Mask, High Word
60703 OUT32 Input Invert Mask, Low Word
60704 Programmable Output AND/OR Selection bits 31-16
60705 Programmable Output AND/OR Selection bits 15-0
60706 Programmable Output Output Invert Mask bits 31-16*
60707 Programmable Output Output Invert Mask bits 15-0*

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6.1.6 Programmable Output User Defined Strings


User definable 8 ASCII character output strings. Byte 9 is an implied NULL

REGISTER DEFINTION
60768-60771 OUT1 Character String 8 bytes
60772-60775 OUT2 Character String 8 bytes
60776-60779 OUT3 Character String 8 bytes
60780-60783 OUT4 Character String 8 bytes
60784-60787 OUT5 Character String 8 bytes
60788-60791 OUT6 Character String 8 bytes
60792-60795 OUT7 Character String 8 bytes
60796-60799 OUT8 Character String 8 bytes
60800-60803 OUT9 Character String 8 bytes
60804-60807 OUT10 Character String 8 bytes
60808-60811 OUT11 Character String 8 bytes
60812-60815 OUT12 Character String 8 bytes
60816-60819 OUT13 Character String 8 bytes
60820-60823 OUT14 Character String 8 bytes
60824-60827 OUT15 Character String 8 bytes
60828-60831 OUT16 Character String 8 bytes
60832-60835 OUT17 Character String 8 bytes
60836-60839 OUT18 Character String 8 bytes
60840-60843 OUT19 Character String 8 bytes
60844-60847 OUT20 Character String 8 bytes
60848-60851 OUT21 Character String 8 bytes
60852-60855 OUT22 Character String 8 bytes
60856-60859 OUT23 Character String 8 bytes
60860-60863 OUT24 Character String 8 bytes
60864-60867 OUT25 Character String 8 bytes
60868-60871 OUT26 Character String 8 bytes
60872-60875 OUT27 Character String 8 bytes
60876-60879 OUT28 Character String 8 bytes
60880-60883 OUT29 Character String 8 bytes
60884-60887 OUT30 Character String 8 bytes
60888-60891 OUT31 Character String 8 bytes
60892-60895 OUT32 Character String 8 bytes

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6.1.7 Programmable Output Delays

REGISTER DEFINTION RANGE STEP SCALE


60896 – 7 OUT 1 delay 0 - 25000 1 0.01 seconds
60898 – 9 OUT 2 delay 0 - 25000 1 0.01 seconds
60900 – 1 OUT 3 delay 0 - 25000 1 0.01 seconds
60902 – 3 OUT 4 delay 0 - 25000 1 0.01 seconds
60904 – 5 OUT 5 delay 0 - 25000 1 0.01 seconds
60906 – 7 OUT 6 delay 0 - 25000 1 0.01 seconds
60908 – 9 OUT 7 delay 0 - 25000 1 0.01 seconds
60910 – 1 OUT 8 delay 0 - 25000 1 0.01 seconds
60912 – 3 OUT 9 delay 0 - 25000 1 0.01 seconds
60914 – 5 OUT 10 delay 0 - 25000 1 0.01 seconds
60916 – 7 OUT 11 delay 0 - 25000 1 0.01 seconds
60918 – 9 OUT 12 delay 0 - 25000 1 0.01 seconds
60920 – 1 OUT 13 delay 0 - 25000 1 0.01 seconds
60922 – 3 OUT 14 delay 0 - 25000 1 0.01 seconds
60924 – 5 OUT 15 delay 0 - 25000 1 0.01 seconds
60926 – 7 OUT 16 delay 0 - 25000 1 0.01 seconds
60928 – 9 OUT 17 delay 0 - 25000 1 0.01 seconds
60930 – 1 OUT 18 delay 0 - 25000 1 0.01 seconds
60932 – 3 OUT 19 delay 0 - 25000 1 0.01 seconds
60934 – 5 OUT 20 delay 0 - 25000 1 0.01 seconds
60936 – 7 OUT 21 delay 0 - 25000 1 0.01 seconds
60938 – 9 OUT 22 delay 0 - 25000 1 0.01 seconds
60940 – 1 OUT 23 delay 0 - 25000 1 0.01 seconds
60942 – 3 OUT 24 delay 0 - 25000 1 0.01 seconds
60944 – 5 OUT 25 delay 0 - 25000 1 0.01 seconds
60946 – 7 OUT 26 delay 0 - 25000 1 0.01 seconds
60948 – 9 OUT 27 delay 0 - 25000 1 0.01 seconds
60950 – 1 OUT 28 delay 0 - 25000 1 0.01 seconds
60952 – 3 OUT 29 delay 0 - 25000 1 0.01 seconds
60954 – 5 OUT 30 delay 0 - 25000 1 0.01 seconds
60956 – 7 OUT 31 delay 0 - 25000 1 0.01 seconds
60958 – 9 OUT 32 delay 0 - 25000 1 0.01 seconds

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6.1.8 Relay Settings

Note: High byte consists of bits 15 through 8.


Low byte consists of bits 7 through 0.

All model PCDs support ANSI, IEC, and Recloser curves. However, not all the curves are available
from within the setting groups at the same time. A menu item in Configuration is used to select which
of the three curve groups that can be used (ANSI, IEC, Recloser).

Table 6.1.8.1: ANSI Curves


INDEX ANSI CURVE TYPE I ANSI CURVE TYPE II ANSI CURVE TYPE III
(51P, 67P, 67N) (46, 51N) (50P, 50N)
0 Extremely Inverse Disable Disable
1 Very Inverse Extremely Inverse Standard
2 Inverse Very Inverse Inverse
3 Short Time Inverse Inverse Definite Time
4 Definite Time Short Time Inverse Short Time Inverse
5 Long Time Extremely Definite Time Short Time Extremely
Inverse Inv.
6 Long Time Very Inverse Long Time Extremely Extremely Inverse
Inverse
7 Long Time Inverse Long Time Very Inverse Very Inverse
8 Recloser Curve Long Time Inverse User Curve 1
9 User Curve 1 Recloser Curve User Curve 2
10 User Curve 2 User Curve 1 User Curve 3
11 User Curve 3 User Curve 2 N/A
12 N/A User Curve 3 N/A

Table 6.1.8.2: IEC Curves


INDEX IEC CURVE TYPE I IEC CURVE TYPE II IEC CURVE TYPE III
(51P, 67P, 67N) (46, 51N) (50P, 50N)
0 Extremely Inverse Disabled Disable
1 Very Inverse Extremely Inverse Standard
2 Inverse Very Inverse Definite Time
3 Long Time Inverse Inverse User Curve 1
4 Definite Time Long Time Inverse User Curve 2
5 User Curve 1 Definite Time User Curve 3
6 User Curve 2 User Curve 1 N/A
7 User Curve 3 User Curve 2 N/A
8 N/A User Curve 3 N/A

Table 6.1.8.3: Recloser Curves


Note: These are no longer supported as of PCD2000 revision V2.30. See Tables 6.1.8.3.1
and 6.1.8.3.2 below for description of new type V and type VI recloser curves.
INDEX RECLOSER CURVE RECLOSER CURVE RECLOSER CURVE RECLOSER CURVE
TYPE I TYPE II TYPE III TYPE IV
0 A 2 Disable Disable
1 B 3 A 2
2 C 8 B 3
3 D 8* C 8
4 E 8+ D 8*
5 K 9 E 8+
6 N 11 K 9
7 R User Curve 1 N 11
8 W User Curve 2 R User Curve 1
9 User Curve 1 User Curve 3 W User Curve 2
10 User Curve 2 N/A User Curve 1 User Curve 3
11 User Curve 3 N/A User Curve 2 N/A
12 N/A N/A User Curve 3 N/A

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The tables below show the new recloser curves added to the PCD firmware version 2.30.

Table 6.1.8.3.1: Recloser Curves type V Table 6.1.8.3.2: Recloser Curves type VI
Index Recloser Type V LCD Display Index Recloser Type VI LCD Display
(Protection) (51P, 67P, 67N) (Protection) (50P-1, 46, 51N, 50N-1)
0 RECLOSER_A_IDX A (101) 0 CURVE_DISABLED_IDX Disabled
1 RECLOSER_B_IDX B (117) 1 RECLOSER_A_IDX A (101)
2 RECLOSER_C_IDX C (133) 2 RECLOSER_B_IDX B (117)
3 RECLOSER_D_IDX D (116) 3 RECLOSER_C_IDX C (133)
4 RECLOSER_E_IDX E (132) 4 RECLOSER_D_IDX D (116)
5 RECLOSER_F_IDX F (163) 5 RECLOSER_E_IDX E (132)
6 RECLOSER_G_IDX G (121) 6 RECLOSER_F_IDX F (163)
7 RECLOSER_H_IDX H (122) 7 RECLOSER_G_IDX G (121)
8 RECLOSER_J_IDX J (164) 8 RECLOSER_H_IDX H (122)
9 RECLOSER_K_IDX KP(162) 9 RECLOSER_J_IDX J (164)
10 RECLOSER_L_IDX L (107) 10 RECLOSER_K_IDX KP(162)
11 RECLOSER_M_IDX M (118) 11 RECLOSER_L_IDX L (107)
12 RECLOSER_N_IDX N (104) 12 RECLOSER_M_IDX M (118)
13 RECLOSER_P_IDX P (115) 13 RECLOSER_N_IDX N (104)
14 RECLOSER_R_IDX R (105) 14 RECLOSER_P_IDX P (115)
15 RECLOSER_T_IDX T (161) 15 RECLOSER_R_IDX R (105)
16 RECLOSER_V_IDX V (137) 16 RECLOSER_T_IDX T (161)
17 RECLOSER_W_IDX W (138) 17 RECLOSER_V_IDX V (137)
18 RECLOSER_Y_IDX Y (120) 18 RECLOSER_W_IDX W (138)
19 RECLOSER_Z_IDX Z (134) 19 RECLOSER_Y_IDX Y (120)
20 RECLOSER_1_IDX 1 (102) 20 RECLOSER_Z_IDX Z (134)
21 RECLOSER_2_IDX 2 (135) 21 RECLOSER_1_IDX 1 (102)
22 RECLOSER_3_IDX 3 (140) 22 RECLOSER_2_IDX 2 (135)
23 RECLOSER_4_IDX 4 (106) 23 RECLOSER_3_IDX 3 (140)
24 RECLOSER_5_IDX 5 (114) 24 RECLOSER_4_IDX 4 (106)
25 RECLOSER_6_IDX 6 (136) 25 RECLOSER_5_IDX 5 (114)
26 RECLOSER_7_IDX 7 (152) 26 RECLOSER_6_IDX 6 (136)
27 RECLOSER_8_IDX 8 (113) 27 RECLOSER_7_IDX 7 (152)
28 RECLOSER_8s_IDX 8* 28 RECLOSER_8_IDX 8 (113)
29 RECLOSER_8t_IDX 8+ (111) 29 RECLOSER_8s_IDX 8*
30 RECLOSER_9_IDX 9 (131) 30 RECLOSER_8t_IDX 8+ (111)
31 RECLOSER_11_IDX 11 (141) 31 RECLOSER_9_IDX 9 (131)
32 RECLOSER_13_IDX 13 (142) 32 RECLOSER_11_IDX 11 (141)
33 RECLOSER_14_IDX 14 (119) 33 RECLOSER_13_IDX 13 (142)
34 RECLOSER_15_IDX 15 (112) 34 RECLOSER_14_IDX 14 (119)
35 RECLOSER_16_IDX 16 (139) 35 RECLOSER_15_IDX 15 (112)
36 RECLOSER_17_IDX 17 (103) 36 RECLOSER_16_IDX 16 (139)
37 RECLOSER_18_IDX 18 (151) 37 RECLOSER_17_IDX 17 (103)
38 RECLOSER_KG_IDX KG (165) 38 RECLOSER_18_IDX 18 (151)
39 IEC Inverse IEC Inv (200) 39 RECLOSER_KG_IDX KG (165)
40 IEC Very Inverse IEC V.Inv (201) 40 IEC Inverse IEC Inv (200)
41 IEC Extremely Inverse IEC E.Inv (202) 41 IEC Very Inverse IEC V.Inv (201)
42 USER_CURVE_1_IDX User Curve 1 42 IEC Extremely Inverse IEC E.Inv (202)
43 USER_CURVE_2_IDX User Curve 2 43 USER_CURVE_1_IDX User Curve 1
44 USER_CURVE_3_IDX User Curve 3 44 USER_CURVE_2_IDX User Curve 2
45 USER_CURVE_3_IDX User Curve 3

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Table 6.1.8.4: Tap Settings

Catalog Number: XRX0-XXXX-XX-XXXX: No Protective element support.

Catalog Number: XRX1-XXXX-XX-XXXX: (600:1 Without SEF)


XRX2-XXXX-XX-XXXX: (600:1 With SEF)
XRX3-XXXX-XX-XXXX: (1000:1 Without SEF)
XRX4-XXXX-XX-XXXX: (1000:1 With SEF)

ELEMENT LOW TAP RANGE HIGH TAP RANGE VALUE


46 50-800 Amps, 5 Amp Steps 100-1600 Amps, 10 Amp Steps 10-160, step = 1
50N-2 (SEF: 600:1) 3.0-200.0 Amps, 0.5 A Steps 3.0-200.0 Amps, 0.5 A Steps 6-400, step = 1
50N-2 (SEF 1000:1) 5.0-200 Amps, 0.5 A Steps 5.0-200.0 Amps, 0.5 A Steps 10-400, step = 1
51P 50-800 Amps, 5 Amp Steps 100-1600 Amps, 10 Amp Steps 10-160, step = 1
51N 25-400 Amps, 5 Amp Steps 50-800 Amps, 5 Amp Steps 10-160, step = 1*
67P 50-800 Amps, 5 Amp Steps 100-1600 Amps, 10 Amp Steps 10-160, step = 1
67N 25-400 Amps, 5 Amp Steps 50-800 Amps, 5 Amp Steps 10-160, step = 1*
* Step size = 2 for Low Tap Range

Catalog Number: XRX5-XXXX-XX-XXXX: (Feeder Without SEF, PT sensor)


XRX6-XXXX-XX-XXXX: (Feeder With SEF, PT sensor)
XRXB-XXXX-XX-XXXX: (Feeder Without SEF, Voltage divider sensor)
XRXC-XXXX-XX-XXXX: (Feeder With SEF, Voltage divider sensor)

ELEMENT LOW TAP RANGE HIGH TAP RANGE VALUE


46 0.2-3.2 Amps, 0.02 Amp Steps 1.0-16.0 Amps, 0.1 Amp Steps 10-160, step = 1
50N-2 (SEF) 5.0-200 mAmps, 0.5 mA Steps 5.0-200 mAmps, 0.5 mA Steps 10-400, step = 1
51P 0.2-3.2 Amps, 0.02 Amp Steps 1.0-16.0 Amps, 0.1 Amp Steps 10-160, step = 1
51N 0.2-3.2 Amps, 0.02 Amp Steps 1.0-16.0 Amps, 0.1 Amp Steps 10-160, step = 1
67P 0.2-3.2 Amps, 0.02 Amp Steps 1.0-16.0 Amps, 0.1 Amp Steps 10-160, step = 1
67N 0.2-3.2 Amps, 0.02 Amp Steps 1.0-16.0 Amps, 0.1 Amp Steps 10-160, step = 1

Catalog Number: XRX7-XXXX-XX-XXXX: (600:1 Without SEF, PT sensor)


XRX8-XXXX-XX-XXXX: (600:1 With SEF, PT sensor)
XRX9-XXXX-XX-XXXX: (1000:1 Without SEF, PT sensor)
XRXA-XXXX-XX-XXXX: (1000:1 With SEF, PT sensor)
XRXD-XXXX-XX-XXXX: (600:1 Without SEF, Voltage divider sensor)
XRXE-XXXX-XX-XXXX: (600:1 With SEF, Voltage divider sensor)
XRXF-XXXX-XX-XXXX: (1000:1 Without SEF, Voltage divider sensor)
XRXG-XXXX-XX-XXXX: (1000:1 With SEF, Voltage divider sensor)

ELEMENT LOW TAP RANGE HIGH TAP RANGE VALUE


46 20-320 Amps, 2 Amp Steps 100-1600 Amps, 10 Amp Steps 10-160, step = 1
50N-2 (SEF: 600:1) 3.0-200.0 Amps, 0.5 A Steps 3.0-200.0 Amps, 0.5 A Steps 6-400, step = 1
50N-2 (SEF 1000:1) 5.0-200 Amps, 0.5 A Steps 5.0-200.0 Amps, 0.5 A Steps 10-400, step = 1
51P 20-320 Amps, 2 Amp Steps 100-1600 Amps, 10 Amp Steps 10-160, step = 1
51N 10-160 Amps, 1 Amp Steps 50-800 Amps, 5 Amp Steps 10-160, step = 1
67P 20-320 Amps, 2 Amp Steps 100-1600 Amps, 10 Amp Steps 10-160, step = 1
67N 10-160 Amps, 1 Amp Steps 50-800 Amps, 5 Amp Steps 10-160, step = 1

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Table 6.1.8.5: Configuration Long Word

Bits 0-3: Phase Tap Range Bit 16: Version Select


0 = 25-400 Amps 0 = ANSI Mode
1 = 50-800 Amps 1 = IEC Mode
2 = 100-1600 Amps
3 = 0.2-3.2 Amps
4 = 1.0-16.0 Amps
5 = 10-160 Amps
6 = 20-320 Amps
Bits 4-7 Neutral Tap Range Bit 17: Tap Mode
0 = 25-400 Amps 0 = Pri. Current Mode
1 = 50-800 Amps 1 = Sec. Current Mode
2 = 100-1600 Amps
3 = 0.2-3.2 Amps
4 = 1.0-16.0 Amps
5 = 10-160 Amps
6 = 20-320 Amps
Bits 8-9 SEF Tap Range Bit 18: Breaker Mode
0 = SEF Off 0 = Three Phase
1 = SEF On 1 = Single Phase
2-3 = Reserved
Bits 10-12: Curve Set Bits 19-28 Reserved (returns 0's)
0 = ANSI Curves
1 = IEC Curves
2 = Recloser Curves
3-7 = Reserved
Bit 13: System Frequency
0 = 60 Hz
1 = 50 Hz
Bit 14: Cold Load Timer Mode
0 = Seconds
1 = Minutes
Bit 15: Programmable Curves Bits 29-31 Unit Type
0 = Off 0 = PCD
1 = On 1 = SCD
2-7 = Reserved

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6.1.8.1. Primary Settings Group

Note: This block is no longer supported as of PCD2000 revision V2.00. See sections
6.1.28 and 6.1.29 for description of new method of updating protection and recloser
settings.
REGISTER DEFINTION
61024 Spare
61025 Execute Register for Program Outputs (registers 61025- 61151)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61026 high byte Relay Password Character 1
low byte Relay Password Character 2
61027 high byte Relay Password Character 3
low byte Relay Password Character 4
61028 Spare (Writeable)
61029 Configuration Long Word (high)
61030 Configuration Long Word (low)
61031 51P Curve Select byte (ANSI/IEC/Recloser Type I)
61032 51P Pickup Amps byte (See Tap Setting Tables, above)
61033 51P Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version-51P Time Multiplier (.05-1.00 *200)
61034 50P-1 Curve Select byte (ANSI/IEC/Recloser Type III)
61035 50P-1 Pickup X byte (0.5-20 *10)
61036 50P-1 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-1 Time Multiplier (.05-1.00 *200)
61037 50P-2 Select byte (0=Disable, 1=Enable)
61038 50P-2 Pickup X byte (0.5-20 *10)
61039 50P-2 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-2 Time Multiplier (.05-1.00 *200)
61040 50P-3 Select byte (0=Disable, 1=Enable)
61041 50P-3 Pickup X byte (0.5-20 *10)
61042 46 Curve Select byte (ANSI/IEC Type II, Recloser Type III)
61043 46 Pickup Amps byte (See Tap Setting Tables, above)
61044 46 Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -46 Time Multiplier (.05-1.00 *200)
61045 51N Curve Select byte (ANSI/IEC Type II, Recloser Type IV)
61046 51N Pickup Amps byte (See Tap Setting Tables, above)
61047 51N Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -51N Time Multiplier (.05-1.00 *200)
61048 50N-1 Curve Select byte (ANSI/IEC Type III, Recloser Type IV)
61049 50N-1 Pickup X byte (0.5-20 *10)
61050 50N-1 Timedial/delay (1-10 *10, 0-9.99 *100)
IEC Version -50N-1 Time Multiplier (.05-1.00 *200)
61051 50N-2 Select byte (0 = Disable, 1 = Enable)
Sensitive Earth Model(0=Disable,1=Standard,2=SEF,3=Directional SEF)
61052 50N-2 Pickup X byte (0.5-20 *10)
61053 50N-2 Time delay (0-9.99 *100)
IEC Version -50N-2 Time Multiplier (0.50 to 1.00 *200)
61054 50N-3 Select byte (0=Disable, 1=Enable)
61055 50N-3 Pickup X byte (0.5-20 *10)
61056 79 Reset Time byte (3-200)
61057 79-1 Select high byte (Lockout Type) low byte (Enable Type)
61058 79-1 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61059 79-2 Select high byte (Lockout Type) low byte (Enable Type)
61060 79-2 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61061 79-3 Select high byte (Lockout Type) low byte (Enable Type)
61062 79-3 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61063 79-4 Select high byte (Lockout Type) low byte (Enable Type)
61064 79-4 Open Interval Time high byte (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61065 79-5 Select high byte (Lockout Type) low byte (Enable Type)
61066 79-5 Open Interval Time (always lockout)

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REGISTER DEFINTION
61067 79 Cutout Time byte (1 -201) (201 = Disable)
61068 Cold Load Time byte (1 -254) (255 = Disable)
61069 2 Phase Voting byte (0=Disable, 1=Enable)
61070 67P Select byte (0=Disable, 1=Enable, 2=Lockout)
61071 67P Curve Select byte (ANSI/IEC/Recloser Type I)
61072 67P Pickup Amps byte (See Tap Setting Tables, above)
61073 67P Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67P Time Multiplier (.05-1.00 *200)
61074 67P Torque Angle byte (0-355 /5)
61075 67N Select byte (0=Disable, 1=Enable, 2=Lockout)
Sensitive Earth Model (0=Disable, 1=Enable-Neg Sequence, 2=Lockout-
Neg Sequence, 5=Enable-Zero Sequence, 6=Lockout Zero Sequence)
61076 67N Curve Select byte (ANSI/IEC Type I, Recloser Type II)
61077 67N Pickup Amps byte (See Tap Setting Tables, above)
61078 67N Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67N Time Multiplier (.05-1.00 *200)
61079 67N Torque Angle byte (0-355 /5)
61080 81 Select byte (0=Disable,1=81-1, 2=81-2, 3=Special)
61081 81s-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable, 50hz: 46-54 *100, 5401=Disable)
61082 81s-1 Timedelay (0.08-9.98 *100)
61083 81r-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61084 81r-1 Timedelay (0-999)
61085 81v Voltage Block high byte (40-200)
61086 27 Select byte (0=Disable, 1=Enable)
61087 27 Pickup Voltage (10-200)
61088 27 Timedelay byte (0-60)
61089 79v Select byte (0=Disable, 1=Enable)
61090 79v Pickup Voltage (10-200)
61091 79v Timedelay byte (4-200)
61092 59 Select byte (0=Disable, 1=Enable)
61093 59 Pickup Voltage high byte (70-250)
61094 59 Timedelay byte (0-60)
61095 51 P Minimum Response (0.00 – 2.00 Seconds, *100)
61096 51 N Minimum Response (0.00 – 2.00 Seconds, *100)
61097 50 P-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61098 50 N-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61099 81s-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61100 81s-2 Timedelay (0.08-9.98 *100)
61101 81r-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61102 81r-2 Timedelay (0-999)
61103 Sensitive Earth Model-SEF Torque Angle (0-355 /5)
61104 Sensitive Earth Model-SEF 50N-2 Pickup mA high byte(.005-.060 *2000)
61105 Sensitive Earth Model- Neutral Cold Load (1-254)(255= Disable)
61106 32P Select (0=Disable)
61107 32P Torque Angle (0-355/5)
61108 32N Select (0=Disable)
61109 32N Torque Angle (0-355/5)
61110 51P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61111 50P-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61112 46 Time-Curve Adder (0.00 to =2.00 Seconds * 100)
61113 51N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61114 50N-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61115 67P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61116 67N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61117 46 Minimum Response Time (0.00 – 2.00 Seconds, *100)
61118 67P Minimum response Time (0.00 – 2.00 Seconds, * 100)
61119 67N Minimum response Time (0.00 – 2.00 Seconds, * 100)
61120 50P-3 Time Delay (0.00 – 2.00 Seconds, *100)
61121 50N-3 Time Delay (0.00 – 2.00 Seconds, *100)

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6.1.8.2. Alternate 1 Settings Group

Note: This block is no longer supported as of PCD2000 revision V2.00. See sections
6.1.28 and 6.1.29 for description of new method of updating protection and recloser
settings.
REGISTER DEFINTION
61152 Spare
61153 Execute Register for Alternate 1 Settings (registers 61153- 61279)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61154 high byte Relay Password Character 1
low byte Relay Password Character 2
61155 high byte Relay Password Character 3
low byte Relay Password Character 4
61156 Spare (Writeable)
61157 Configuration Long Word (high)
61158 Configuration Long Word (low)
61159 51P Curve Select byte (Type I or Recloser Type I)
61160 51P Pickup Amps byte (See Tap Setting Tables, above)
61161 51P Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version-51P Time Multiplier (.05-1.00 *200)
61162 50P-1 Curve Select byte (Type III or Recloser Type III)
61163 50P-1 Pickup X byte (0.5-20 *10)
61164 50P-1 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-1 Time Multiplier (.05-1.00 *200)
61165 50P-2 Select byte (0=Disable, 1=Enable)
61166 50P-2 Pickup X byte (0.5-20 *10)
61167 50P-2 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-2 Time Multiplier (.05-1.00 *200)
61168 50P-3 Select byte (0=Disable, 1=Enable)
61169 50P-3 Pickup X byte (0.5-20 *10)
61170 46 Curve Select byte (Type II)
61171 46 Pickup Amps byte (1-12Amp *10, 0.2-2.4Amp *50)
61172 46 Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -46 Time Multiplier (.05-1.00 *200)
61173 51N Curve Select byte (Type II or Recloser Type II)
61174 51N Pickup Amps byte (See Tap Setting Tables, above)
61175 51N Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -51N Time Multiplier (.05-1.00 *200)
61176 50N-1 Curve Select byte (Type III or Recloser Type IV)
61177 50N-1 Pickup X byte (0.5-20 *10)
61178 50N-1 Timedial/delay (1-10 *10, 0-9.99 *100)
IEC Version -50N-1 Time Multiplier (.05-1.00 *200)
61179 50N-2 Select byte (0 = Disable, 1 = Enable)
Sensitive Earth Model(0=Disable,1=Standard,2=SEF,3=Directional SEF)
61180 50N-2 Pickup X byte (0.5-20 *10)
61181 50N-2 Timedelay (0-9.99 *100)
IEC Version -50N-2 Time Multiplier (0.50 to 1.00 *200)
61182 50N-3 Select byte (0=Disable, 1=Enable)
61183 50N-3 Pickup X byte (0.5-20 *10)
61184 79 Reset Time byte (3-200)
61185 79-1 Select high byte (Lockout Type) low byte (Enable Type)
61186 79-1 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61187 79-2 Select high byte (Lockout Type) low byte (Enable Type)
61188 79-2 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61189 79-3 Select high byte (Lockout Type) low byte (Enable Type)
61190 79-3 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61191 79-4 Select high byte (Lockout Type) low byte (Enable Type)
61192 79-4 Open Interval Time high byte (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61193 79-5 Select high byte (Lockout Type) low byte (Enable Type)
61194 79-5 Open Interval Time (always lockout)

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REGISTER DEFINTION
61195 79 Cutout Time byte (1 -201) (201 = Disable)
61196 Cold Load Time byte (1 -254) (255 = Disable)
61197 2 Phase Voting byte (0=Disable, 1=Enable)
61198 67P Select byte (0=Disable, 1=Enable, 2=Lockout)
61199 67P Curve Select byte (Type I)
61200 67P Pickup Amps byte (See Tap Setting Tables, above)
61201 67P Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67P Time Multiplier (.05-1.00 *200)
61202 67P Torque Angle byte (0-355 /5)
67N Select byte (0=Disable, 1=Enable, 2=Lockout)
61203 Sensitive Earth Model (0=Disable, 1=Enable-Neg Sequence, 2=Lockout-
Neg Sequence, 5=Enable-Zero Sequence, 6=Lockout Zero Sequence)
61204 67N Curve Select byte (Type I)
61205 67N Pickup Amps byte (See Tap Setting Tables, above)
61206 67N Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67N Time Multiplier (.05-1.00 *200)
61207 67N Torque Angle byte (0-355 /5)
61208 81 Select byte (0=Disable,1=81-1, 2=81-2, 3=Special)
61209 81s-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable, 50hz: 46-54 *100, 5401=Disable)
61210 81s-1 Timedelay (0.08-9.98 *100)
61211 81r-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61212 81r-1 Timedelay (0-999)
61213 81v Voltage Block high byte (40-200)
61214 27 Select byte (0=Disable, 1=Enable)
61215 27 Pickup Voltage (10-200)
61216 27 Timedelay byte (0-60)
61217 79v Select byte (0=Disable, 1=Enable)
61218 79v Pickup Voltage (10-200)
61219 79v Timedelay byte (4-200)
61220 59 Select byte (0=Disable, 1=Enable)
61221 59 Pickup Voltage high byte (70-250)
61222 59 Timedelay byte (0-60)
61223 51 P Minimum Response (0.00 – 2.00 Seconds, *100)
61224 51 N Minimum Response (0.00 – 2.00 Seconds, *100)
61225 50 P-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61226 50 N-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61227 81s-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61228 81s-2 Timedelay (0.08-9.98 *100)
61229 81r-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61230 81r-2 Timedelay (0-999)
61231 Sensitive Earth Model-SEF Torque Angle (0-355 /5)
61232 Sensitive Earth Model-SEF 50N-2 Pickup mA high byte(.005-.060 *2000)
61233 Sensitive Earth Model- Neutral Cold Load (1-254)(255= Disable)
61234 32P Select (0=Disable)
61235 32P Torque Angle (0-355/5)
61236 32N Select (0=Disable)
61237 32N Torque Angle (0-355/5)
61238 51P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61239 50P-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61240 46 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61241 51N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61242 50N-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61243 67P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61244 67N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61245 46 Minimum Response Time (0.00 – 2.00 Seconds, *100)
61246 67P Minimum response Time (0.00 – 2.00 Seconds, * 100)
61247 67N Minimum response Time (0.00 – 2.00 Seconds, * 100)
61248 50P-3 Time Delay (0.00 – 2.00 Seconds, *100)
61249 50N-3 Time Delay (0.00 – 2.00 Seconds, *100)

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6.1.8.3. Alternate 2 Settings Group

Note: This block is no longer supported as of PCD2000 revision V2.00. See sections
6.1.28 and 6.1.29 for description of new method of updating protection and recloser
settings.
REGISTER DEFINTION
61280 Spare
61281 Execute Register for Alternate 2 Settings (registers 61281- 61407)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61282 high byte Relay Password Character 1
low byte Relay Password Character 2
61283 high byte Relay Password Character 3
low byte Relay Password Character 4
61284 Spare (Writeable)
61285 Configuration Long Word (high)
61286 Configuration Long Word (low)
61287 51P Curve Select byte (Type I or Recloser Type I)
61288 51P Pickup Amps byte (See Tap Setting Tables, above)
61289 51P Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version-51P Time Multiplier (.05-1.00 *200)
61290 50P-1 Curve Select byte (Type III or Recloser Type III)
61291 50P-1 Pickup X byte (0.5-20 *10)
61292 50P-1 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-1 Time Multiplier (.05-1.00 *200)
61293 50P-2 Select byte (0=Disable, 1=Enable)
61294 50P-2 Pickup X byte (0.5-20 *10)
61295 50P-2 Timedial (1-10 *10)/delay(0-9.99 *100)
IEC Version -50P-2 Time Multiplier (.05-1.00 *200)
61296 50P-3 Select byte (0=Disable, 1=Enable)
61297 50P-3 Pickup X byte (0.5-20 *10)
61298 46 Curve Select byte (Type II)
61299 46 Pickup Amps byte (See Tap Setting Tables, above)
61300 46 Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -46 Time Multiplier (.05-1.00 *200)
61301 51N Curve Select byte (Type II or Recloser Type II)
61302 51N Pickup Amps byte (See Tap Setting Tables, above)
61303 51N Time dial(1-10 *20)/delay byte(0-10 * 20)
IEC Version -51N Time Multiplier (.05-1.00 *200)
61304 50N-1 Curve Select byte (Type III or Recloser Type IV)
61305 50N-1 Pickup X byte (0.5-20 *10)
61306 50N-1 Timedial/delay (1-10 *10, 0-9.99 *100)
IEC Version -50N-1 Time Multiplier (.05-1.00 *200)
61307 50N-2 Select byte (0 = Disable, 1 = Enable)
Sensitive Earth Model(0=Disable,1=Standard,2=SEF,3=Directional SEF)
61308 50N-2 Pickup X byte (0.5-20 *10)
61309 50N-2 Timedelay (0-9.99 *100)
IEC Version -50N-2 Time Multiplier (0.50 to 1.00 *200)
61310 50N-3 Select byte (0=Disable, 1=Enable)
61311 50N-3 Pickup X byte (0.5-20 *10)
61312 79 Reset Time byte (3-200)
61313 79-1 Select high byte (Lockout Type) low byte (Enable Type)
61314 79-1 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61315 79-2 Select high byte (Lockout Type) low byte (Enable Type)
61316 79-2 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61317 79-3 Select high byte (Lockout Type) low byte (Enable Type)
61318 79-3 Open Interval Time (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61319 79-4 Select high byte (Lockout Type) low byte (Enable Type)
61320 79-4 Open Interval Time high byte (0.1 - 200 *10, 2001 = Lockout)
Sensitive Earth Model (0.1 to 1800 *10, 18001=Lockout)
61321 79-5 Select high byte (Lockout Type) low byte (Enable Type)
61322 79-5 Open Interval Time (always lockout)

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REGISTER DEFINTION
61323 79 Cutout Time byte (1 -201) (201 = Disable)
61324 Cold Load Time byte (1 –254) (255 = Disable)
61325 2 Phase Voting byte (0=Disable, 1=Enable)
61326 67P Select byte (0=Disable, 1=Enable, 2=Lockout)
61327 67P Curve Select byte (Type I)
61328 67P Pickup Amps byte (See Tap Setting Tables, above)
61329 67P Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67P Time Multiplier (.05-1.00 *200)
61330 67P Torque Angle byte (0-355 /5)
61331 67N Select byte (0=Disable, 1=Enable, 2=Lockout)
Sensitive Earth Model (0=Disable, 1=Enable-Neg Sequence, 2=Lockout-
Neg Sequence, 5=Enable-Zero Sequence, 6=Lockout Zero Sequence)
61332 67N Curve Select byte (Type I)
61333 67N Pickup Amps byte (See Tap Setting Tables, above)
61334 67N Time dial(1-10 *20)/delay(0-10 * 20) byte
IEC Version -67N Time Multiplier (.05-1.00 *200)
61335 67N Torque Angle byte (0-355 /5)
61336 81 Select byte (0=Disable,1=81-1, 2=81-2, 3=Special)
61337 81s-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable, 50hz: 46-54 *100, 5401=Disable)
61338 81s-1 Timedelay (0.08-9.98 *100)
61339 81r-1 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61340 81r-1 Timedelay (0-999)
61341 81v Voltage Block high byte (40-200)
61342 27 Select byte (0=Disable, 1=Enable)
61343 27 Pickup Voltage (10-200)
61344 27 Timedelay byte (0-60)
61345 79v Select byte (0=Disable, 1=Enable)
61346 79v Pickup Voltage (10-200)
61347 79v Timedelay byte (4-200)
61348 59 Select byte (0=Disable, 1=Enable)
61349 59 Pickup Voltage high byte (70-250)
61350 59 Timedelay byte (0-60)
61351 51 P Minimum Response (0.00 – 2.00 Seconds, *100)
61352 51 N Minimum Response (0.00 – 2.00 Seconds, *100)
61353 50 P-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61354 50 N-1 Minimum Response (0.00 – 2.00 Seconds, *100)
61355 81s-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61356 81s-2 Timedelay (0.08-9.98 *100)
61357 81r-2 Pickup Frequency
(60hz: 56-64 *100, 6401=Disable 50hz: 46-54 *100, 5401=Disable)
61358 81r-2 Timedelay (0-999)
61359 Sensitive Earth Model-SEF Torque Angle (0-355 /5)
61360 Sensitive Earth Model-SEF 50N-2 Pickup mA high byte(.005-.060 *2000)
61361 Sensitive Earth Model- Neutral Cold Load (1-254)(255= Disable)
61362 32P Select (0=Disable)
61363 32P Torque Angle (0-355/5)
61364 32N Select (0=Disable)
61365 32N Torque Angle (0-355/5)
61366 51P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61367 50P-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61368 46 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61369 51N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61370 50N-1 Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61371 67P Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61372 67N Time-Curve Adder (0.00 to 2.00 Seconds * 100)
61373 46 Minimum Response Time (0.00 – 2.00 Seconds, *100)
61374 67P Minimum response Time (0.00 – 2.00 Seconds, * 100)
61375 67N Minimum response Time (0.00 – 2.00 Seconds, * 100)
61376 50P-3 Time Delay (0.00 – 2.00 Seconds, *100)
61377 50N-3 Time Delay (0.00 – 2.00 Seconds, *100)

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6.1.9 Configuration Settings


REGISTER DEFINTION PRODUCT
61408 Spare ALL
61409 Execute Register for Configuration Settings (registers 61408- 61535) ALL
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61410 high byte Relay Password Character 1 ALL
low byte Relay Password Character 2
61411 high byte Relay Password Character 3 ALL
low byte Relay Password Character 4
61412 Spare (Writeable) ALL
61413 Phase CT Ratio (1-2000) ALL
61414 Neutral CT Ratio (1-2000) ALL
61415 VT Ratio (1-32000) ALL
61416 VT Connection (0=69V Wye,1=120V Wye, 2=120V Delta, 3=208V Delta) ALL
61417 Positive Sequence Reactance (. 001-4 *1000) PCD
61418 Positive Sequence Resistance (.001-4 *1000) PCD
61419 Zero Sequence Reactance (.001-4 *1000) PCD
61420 Zero Sequence Resistance (.001-4 *1000) PCD
61421 Distance in Miles (0.1-125 *10) PCD
IEC Version (0.1-200 *10) km
61422 Trip Failure Time (5-60) ALL
61423 Close Failure Time (18-999) ALL
61424 Phase Rotation (0=ABC, 1=ACB) ALL
61425 Configuration Flag ALL
bit 0: Protection Mode (0=Fund, 1=RMS)
bit 1: Reset Mode (0=Instant, 1=Delayed)
bit 2: Zone Sequence (0=Disabled, 1=Enabled)
bit 3: Target Display Mode (0=Last, 1=All)
bit 4: Local Edit (0=Disabled, 1=Enabled)
bit 5: Remote Edit (0=Disabled, 1=Enabled)
bit 6: WHr/VarHr Mtr Mode (0=KWHr, 1=MWHr)
bit 7: LCD Light (0=Timer, 1=On)
bit 8: Not used.
bit 9: VCN Special Mode (0=Normal, 1=Inverted)
bit10: Cold Load Timer Mode(0=Seconds, 1=Minutes)
bit11: IEC Mode Bit
bit12: 79V Timer Mode(0=Seconds, 1=Minutes)
bit13: Voltage Display Mode (0=Vln, 1=Vll)
bit14: System Frequency (0=50Hz, 1=60Hz)
bit15: Breaker Fail Mode (0=Open State, 1=Original State)*
*Note: bit15 Original state not available firmware version 2.50 and beyond.
61426 ALT 1 Setting Enable (0=Disable, 1=Enable) ALL
61427 ALT 2 Setting Enable (0=Disable, 1=Enable) ALL
61428 Demand Time Constant (0=5 min, 1=15 min, 2=30 min, 3=60 min) ALL
61429 Zero sequence CT ratio (1 – 2000, step 1) (To be used only with catalog ALL
numbers XXX6-XXXX-XX-XXXX, variable CT ratio, SEF option.)
61430-61437 Unit Name character 1-15,spare ALL
61438 Spare ALL
61439 LCD Contrast Adjustment (0-63) ALL
61440 high byte Relay Password character 1 ALL
low byte Relay Password character 2
61441 high byte Relay Password character 3 ALL
low byte Relay Password character 4
61442 high byte Test Password character 1 ALL
low byte Test Password character 2
61443 high byte Test Password character 3 ALL
low byte Test Password character 4
61444 Curve Family: 0 = ANSI, 1 = IEC, 2 = Recloser ALL
61445 Close Delay Time (0 – 250 *1, Seconds) ALL
61446 Recloser Mode: 0 = Three Phase Only PCD
1 = Single / Three Phase Tripping
61447 Number of switches to be controlled (Maximum 3) SCD / MAV
61448 Source transfer enable (=1) / disable (=0) (2 switches controlled) SCD / MAV
61449 Sectionalizer enable (=1) / disable (=0) (1 switch controlled) SCD / MAV
61450 Select switch to be opened after loss of AC power MAV

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61451 Time delay for LOACSO function. (1 – 999 minutes) MAV


61452 Automatic battery test. 0 = Disabled, 1 = once a day, 2 = once a week ALL
1
61453 Recloser type. 0 = OVR, 1 = VR3 ALL
1
61454 Phase Assignment. Bits 0,1: Xa, Bits 2,3: Yb, 4,5: Zc, 6,7: Unused. ALL
00 = Phase A, 01 = Phase B, 10 = Phase C
1
61455 Bushing polarity. 0 = Normal, 1 = Reversed ALL
61456 Nominal line-ground volts. Range = 1 – 65535. (Used only when catalog ALL
number xxxy-xxxx-xx-xxxx, with y = B, C, D, E, F, G
61457 Protection settings bank selection. 0 = Bank1 only, 1 = Bank1 or Bank2 ALL
61458 Prog2 button function selection. 0 = Disabled, 1 = Phase select, 2 = PCD
Switch mode, 3 = Prog2 logical
61459 Fault targets auto reset. 0 = Disabled, 1 = Enabled PCD
61460 PROG1 button function selection. 0 = Battery test, 1 = SEF, 2 = Prog1 PCD
logical

Note 1: These settings should be “read only” from remote. They should be set only from the front
panel HMI interface.

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6.1.10 Counter Settings

REGISTER DEFINTION PRODUCT


61536 Spare ALL
61537 Execute Register for Counter Settings (registers 61537- ALL
61663)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61538 high byte Relay Password Character 1 ALL
low byte Relay Password Character 2
61539 high byte Relay Password Character 3 ALL
low byte Relay Password Character 4
61540 Spare (Writeable) ALL
61541 KSI Sum A Counter (0-9999) ALL
61542 KSI Sum B Counter (0-9999) ALL
61543 KSI Sum C Counter (0-9999) ALL
61544 Over Current Trip Counter (0-9999) PCD
61545 Breaker Operations Counter (0-9999) PCD
61546 Reclose Counter 1 (0-9999) PCD
61547 1st Reclose Counter (0-9999) PCD
61548 2nd Reclose Counter (0-9999) PCD
61549 3rd Reclose Counter (0-9999) PCD
61550 4th Reclose Counter (0-9999) PCD
61551 Reclose Counter 2 (0-9999) PCD
61552 Overcurrent Trip A Counter (0-9999) PCD
61553 Overcurrent Trip B Counter (0-9999) PCD
61554 Overcurrent Trip C Counter (0-9999) PCD
61555 Overcurrent Trip N Counter (0-9999) PCD
61556 Phase A Pole Operations Counter (0-9999) PCD
61557 Phase A Recloser Counter 1 (0-9999) PCD
61558 Phase A Recloser Counter 2 (0-9999) PCD
61559 Phase A Stage 1 Reclose Counter (0-9999) PCD
61560 Phase A Stage 2 Reclose Counter (0-9999) PCD
61561 Phase A Stage 3 Reclose Counter (0-9999) PCD
61562 Phase A Stage 4 Reclose Counter (0-9999) PCD
61563 Phase B Pole Operations Counter (0-9999) PCD
61564 Phase B Recloser Counter 1 (0-9999) PCD
61565 Phase B Recloser Counter 2 (0-9999) PCD
61566 Phase B Stage 1 Reclose Counter (0-9999) PCD
61567 Phase B Stage 2 Reclose Counter (0-9999) PCD
61568 Phase B Stage 3 Reclose Counter (0-9999) PCD
61569 Phase B Stage 4 Reclose Counter (0-9999) PCD
61570 Phase C Pole Operations Counter (0-9999) PCD
61571 Phase C Recloser Counter 1 (0-9999) PCD
61572 Phase C Recloser Counter 2 (0-9999) PCD
61573 Phase C Stage 1 Reclose Counter (0-9999) PCD
61574 Phase C Stage 2 Reclose Counter (0-9999) PCD
61575 Phase C Stage 3 Reclose Counter (0-9999) PCD
61576 Phase C Stage 4 Reclose Counter (0-9999) PCD
61577 All Fault Indication Counter (0-9999) SCD / MAV
61578 Phase A Fault Indication Counter (0-9999) SCD / MAV
61579 Phase B Fault Indication Counter (0-9999) SCD / MAV
61580 Phase C Fault Indication Counter (0-9999) SCD / MAV
61581 Phase N Fault Indication Counter (0-9999) SCD / MAV
61582 Switch 1 Operations Counter (0-9999) SCD / MAV
61583 Switch 2 Operations Counter (0-9999) SCD / MAV
61584 Switch 3 Operations Counter (0-9999) SCD / MAV
61585 Switch 4 Operations Counter (0-9999) SCD / MAV

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6.1.11 Alarm Settings

Note: Positive Watt Alarm 1 and Positive Watt Alarm 2 units are displayed in either KWhr or MWhr
according to bit 6 of Configuration Flag in the Configuration Settings Group. If bit is set to
one, use MWhr, if bit is zero, use KWhr.

REGISTER DEFINTION PRODUCT


61664 Spare ALL
61665 Execute Register for Alarm Settings (registers 61665- 61791) ALL
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61666 high byte Relay Password Character 1 ALL
low byte Relay Password Character 2
61667 high byte Relay Password Character 3 ALL
low byte Relay Password Character 4
61668 Spare (Writeable) ALL
61669 KSI Summation Alarm Threshold (1-9999,10000=Disables) ALL
61670 Overcurrent Trip Counter Alarm (1-9999,10000=Disables) PCD
61671 Reclosure Counter 1 Alarm (1-9999,10000=Disables) PCD
61672 Phase Demand Alarm (1-9999,10000=Disables) ALL
61673 Neutral Demand Alarm (1-9999,10000=Disables) ALL
61674 Low PF Alarm (0.5-1.0 *100, 101=Disables) ALL
61675 High PF Alarm (0.5-1.0 *100, 101=Disables) ALL
61676 Reclosure Counter 2 Alarm (1-9999,10000=Disables) PCD
61677 3 Phase kVAR Alarm (10-99990 /10,10000=Disables) ALL
61678 Load Current Alarm (1-9999,10000=Disables) ALL
61679 Positive kVAR Alarm (10-99990 /10,10000=Disable) ALL
61680 Negative kVAR Alarm (10-99990 /10,10000=Disable) ALL
61681 Pos Watt Alarm 1 (1-9999, 10000=Disable) ALL
61682 Pos Watt Alarm 2 (1-9999, 10000=Disable) ALL
61683 Fault Indication Alarm (1-9999, 10000=Disable) Reserved
61684 Switch 1 Operations Alarm (1-9999, 10000=Disable) SCD / MAV
61685 Switch 2 Operations Alarm (1-9999, 10000=Disable) SCD / MAV
61686 Switch 3 Operations Alarm (1-9999, 10000=Disable) SCD / MAV
61687 Switch 4 Operations Alarm (1-9999, 10000=Disable) SCD / MAV

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6.1.12 Real Time Clock

REGISTER DEFINTION
61792 Spare
61793 Execute Register for Real Time Clock (registers 61793- 61919)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61794 high byte Relay Password Character 1
low byte Relay Password Character 2
61795 high byte Relay Password Character 3
low byte Relay Password Character 4
61796 Spare (Writeable)
61797 Hours byte (0-23)
61798 Minutes byte (0-59)
61799 Seconds byte (0-59)
61800 Day byte (0-31)(0=Clock shutdown)
61801 Month byte (1-12)
61802 Year byte (0-99)

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6.1.13 ULO Connection Settings and User Names


Low byte consists of bits 0-7
High byte consists of bits 8-15

REGISTER DEFINTION
61920 Spare
61921 Execute Register for ULO (registers 61921- 62047)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
61922 high byte Relay Password Character 1
low byte Relay Password Character 2
61923 high byte Relay Password Character 3
low byte Relay Password Character 4
61924 Spare (Writeable)
61925 ULO9..15 = high byte (where ULO 9 = bit 0,... and 0 = connected)
ULO1..8 = low byte (where ULO 1 = bit 0,...etc. and 0 = connected)
61926-929 ULO1 Character String 8 bytes
61930-933 ULO2 Character String 8 bytes
61934-937 ULO3 Character String 8 bytes
61938-941 ULO4 Character String 8 bytes
61942-945 ULO5 Character String 8 bytes
61946-949 ULO6 Character String 8 bytes
61950-953 ULO7 Character String 8 bytes
61954-957 ULO8 Character String 8 bytes
61958-961 ULO9 Character String 8 bytes
Note: Connected implies that ULIn is linked logically to ULOn.

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6.1.14 ULI User Names


User definable 8 character ULI strings. String terminating NULL is implied.

REGISTER DEFINTION
62048 Spare
62049 Execute Register for ULI (registers 62049- 62175)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62050 high byte Relay Password Character 1
low byte Relay Password Character 2
62051 high byte Relay Password Character 3
low byte Relay Password Character 4
62052 Spare (Writeable)
62053-056 ULI1 Character String 8 bytes
62057-060 ULI2 Character String 8 bytes
62061-064 ULI3 Character String 8 bytes
62065-068 ULI4 Character String 8 bytes
62069-072 ULI5 Character String 8 bytes
62073-076 ULI6 Character String 8 bytes
62077-080 ULI7 Character String 8 bytes
62081-084 ULI8 Character String 8 bytes
62085-088 ULI9 Character String 8 bytes

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6.1.15 FLI User Names and Indices

REGISTER DEFINTION
62176 Spare
62177 Execute Register for FLI (registers 62177- 62431)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62178 high byte Relay Password Character 1
low byte Relay Password Character 2
62179 high byte Relay Password Character 3
low byte Relay Password Character 4
62180 Spare (Writeable)
62181 FLI1 index byte
FLI2 index byte
62182 FLI3 index byte
FLI4 index byte
62183 FLI5 index byte
FLI6 index byte
62184 FLI7 index byte
FLI8 index byte
62185 FLI9 index byte
FLI10 index byte
62186 FLI11 index byte
FLI12 index byte
62187 FLI13 index byte
FLI14 index byte
62188 FLI15 index byte
FLI16 index byte
62189 FLI17 index byte
FLI18 index byte
62190 FLI19 index byte
FLI20 index byte
62191 FLI21 index byte
FLI22 index byte
62192 FLI23 index byte
FLI24 index byte
62193 FLI25 index byte
FLI26 index byte
62194 FLI27 index byte
FLI28 index byte
62195 FLI29 index byte
FLI30 index byte
62196 FLI31 index byte
FLI32 index byte
62197-200 FLI1 Character String 8 bytes
62201-204 FLI2 Character String 8 bytes
62205-208 FLI3 Character String 8 bytes
62209-212 FLI4 Character String 8 bytes
62213-216 FLI5 Character String 8 bytes
62217-220 FLI6 Character String 8 bytes
62221-224 FLI7 Character String 8 bytes
62225-228 FLI8 Character String 8 bytes
62229-232 FLI9 Character String 8 bytes
62233-236 FLI10 Character String 8 bytes
62237-240 FLI11 Character String 8 bytes
62241-244 FLI12 Character String 8 bytes
62245-248 FLI13 Character String 8 bytes
62249-252 FLI14 Character String 8 bytes
62253-256 FLI15 Character String 8 bytes
62257-260 FLI16 Character String 8 bytes
62261-264 FLI17 Character String 8 bytes
62265-268 FLI18 Character String 8 bytes
62269-272 FLI19 Character String 8 bytes
62273-276 FLI20 Character String 8 bytes
62277-280 FLI21 Character String 8 bytes

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REGISTER DEFINTION
62281-284 FLI22 Character String 8 bytes
62285-288 FLI23 Character String 8 bytes
62289-292 FLI24 Character String 8 bytes
62293-296 FLI25 Character String 8 bytes
62297-300 FLI26 Character String 8 bytes
62301-304 FLI27 Character String 8 bytes
62305-308 FLI28 Character String 8 bytes
62309-312 FLI29 Character String 8 bytes
62313-316 FLI30 Character String 8 bytes
62317-320 FLI31 Character String 8 bytes
62321-324 FLI32 Character String 8 bytes

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6.1.16 Communications Settings

REGISTER DEFINITION RANGE


62432 Spare
62433 Execute Register for Communications Settings (0=No Action, 1=Transfer Settings,
(registers 62432 - 62559) 2=Refresh Registers)
62434 high byte Relay Password Character 1
low byte Relay Password Character 2
62435 high byte Relay Password Character 3
low byte Relay Password Character 4
62436 Spare (Writeable)
62437 Unit Address (Modbus: 0 – 255, DNP: 0 – 65535)
62438 Front Panel Configuration
62439 Rear Panel Configuration
62440 Rear Panel Protocol (0=ASCII Modbus, 1=RTU Modbus, 2
= DNP3.0, 3=IEC870)
62441 Rear Port Parameter 1 1 - 255
62442 Rear Port Parameter 2 1 - 255
62443 Rear Port Parameter 3 0 – 255
62444 Rear Port Parameter 4 0 – 255
62445 Rear Port Parameter 5 0 – 255
62446 Rear Port Parameter 6 0 - 255
62447 Rear Port Parameter 7 0 - 255
62448 Rear Port Parameter 8 0 - 255
62449 Rear Port Parameter 9 1–8
62450 Rear Port Parameter 10 1 – 255
62451 Rear Port Parameter 11 0 – 255
62452 Rear Port Parameter 12 0 - 255
62453 Rear Port Parameter 13 0 - 255
62454 Rear Port Parameter 14 0 - 255
62455 Rear Port Parameter 15 0 – 255
62456 Rear Port Parameter 16 0 – 255
62457 Rear Port Parameter 17 0–2
62458 Rear Port Parameter 18 1 - 255
62459 Rear Port Parameter 19 1–2
62460 Rear Port Parameter 20 1–2
62461 Rear Port Parameter 21 1–2
62462 Rear Port Parameter 22 1–4
62463 Rear Port Parameter 23 1–4
62464 Rear Port Parameter 24 0=Disabled, 1=Enabled
62465 Rear Port Parameter 25 0 – 255
62466 Rear Port Parameter Mode
62467 IRIG Configuration (0=OFF, 1=ON) (Currently not
supported)
62468 RTS-CTS delay enabled 0 = Disabled, 1 = Enabled
62469 RTS-CTS delay 0 – 3000 ms, step = 50
62470 Post transmission delay 0 – 3000 ms, step = 50

Note: See DNP 3.0 implementation guide for details on Rear Port parameters

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Communications Configuration Word definition:


Bits 0-3 (Baud 0 -- 300 Bits 4-5 (Parity): 0 -- None
Rate):
1 -- 1200 1 -- Odd
2 -- 2400 2 -- Even
3 -- 4800 3 -- N/A
4 -- 9600 Bit 6 (Frame 0 -- 7 bits
Size):
5 -- 19200 1 -- 8 bits
6 -- 38400 Bit 7 (Stop Bits): 0 -- 1 bit
1 -- 2 bits

Valid Configuration Values:

Baud Rates Frame Types


Front Port 0, 1, 2, 3, & 4 N/8/1, N/8,2
Rear Port 0, 1, 2, 3, 4, & 5 E/7/1, O/7/1, N/7/2, N/8/1,
E/8/1, O/8/1, & N/8/2

Note: If an invalid Baud value is specified a default value representing 9600 Baud will be used. Also,
if an valid Frame type is specified a default of N/8/1 for be used.

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6.1.17 Modbus Global Register Mapping Block


The Modbus Global Registers can contain any valid 4xxxx register. Valid mapping registers are 1-9999
provided that the register exists and is defined by this document.

REGISTER DEFINTION
62560 Spare
62561 Execute Register for Modbus Global Mapping (registers 62561- 62687)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62562 high byte Relay Password Character 1
low byte Relay Password Character 2
62563 high byte Relay Password Character 3
low byte Relay Password Character 4
62564 Spare (Writeable)
62565 Number of Global Registers to Transmit
62566 Modbus Global Register 1 Mapping
62567 Modbus Global Register 2 Mapping
62568 Modbus Global Register 3 Mapping
62569 Modbus Global Register 4 Mapping
62570 Modbus Global Register 5 Mapping
62571 Modbus Global Register 6 Mapping
62572 Modbus Global Register 7 Mapping
62573 Modbus Global Register 8 Mapping
62574 Modbus Global Register 9 Mapping
62575 Modbus Global Register 10 Mapping
62576 Modbus Global Register 11 Mapping
62577 Modbus Global Register 12 Mapping
62578 Modbus Global Register 13 Mapping
62579 Modbus Global Register 14 Mapping
62580 Modbus Global Register 15 Mapping
62581 Modbus Global Register 16 Mapping
62582 Modbus Global Register 17 Mapping
62583 Modbus Global Register 18 Mapping
62584 Modbus Global Register 19 Mapping
62585 Modbus Global Register 20 Mapping
62586 Modbus Global Register 21 Mapping
62587 Modbus Global Register 22 Mapping
62588 Modbus Global Register 23 Mapping
62589 Modbus Global Register 24 Mapping
62590 Modbus Global Register 25 Mapping
62591 Modbus Global Register 26 Mapping
62592 Modbus Global Register 27 Mapping
62593 Modbus Global Register 28 Mapping
62594 Modbus Global Register 29 Mapping
62595 Modbus Global Register 30 Mapping
62596 Modbus Global Register 31 Mapping
62597 Modbus Global Register 32 Mapping
62598 Security Mask for Writeable 4xxxx Control Block
(bit state: 0=Control Block Password Required,
1=Control Block Unprotected)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Pulse Outputs
Bit 12: Spare Bit 4: Set Reset Outputs
Bit 11: Spare Bit 3: Force logical Input
Bit 10: Spare Bit 2: Force Physical Output
Bit 9: Spare Bit 1: Force Physical Input
Bit 8: Spare Bit 0: Initiate Input

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6.1.18 User Definable Register Configuration Block

The following registers support modification and scaling of information contained in the Modbus user
register set. The information in the 4xxxx registers can be tailored to the users needs with the
following options:

Register: Register needed can be programmed.


Scalability: Data in the registers can be scaled.
Destination register data type: This supports multiple data types to match the destination systems
needs.
Destination register data size: This supports multiple data sizes to match the destination systems
needs.
MSB/LSB bit justification: This allows users to shift the bits contained in the 4xxxx register into the
Most significant bits or the Least significant bits.

Here is an example of how to set up the Modbus registers to exploit the above facilities. Consider a
situation where the destination system is a SCADA. Suppose the user’s SCADA system is setup to
read the System Frequency on register 40001and requires the data be in the 12 Most significant bits.
Also, let us suppose that the scale required on the system frequency is hex 0a (10 decimal) and the
SCADA stores the value in a bipolar data type. The user would adopt the following procedure to
setup register 40001 to meet the specifications of the destination system. Now write hex 0a (decimal
10) which is the scale we need into register 62693. Next write hex 0147 (327 decimal) on register
62694 which fetches the value from the register 40327(the source register for system frequency).
Setting the data size (12), the data type (bipolar) and shifting data (into Most significant bits) is done
as follows:

Register Size (12 bits)


Bit Bit Bit Bit
7 6 5 4
0 0 1 1

MSB/LSB (Justified to the left i.e. data in the Most Significant Bits)
Bit
3
1

Register Type (Bipolar)


Bit Bit Bit
2 1 0
0 0 1

So, write hex 039 (decimal 57) into register 62695 and the registers should look like:
register 62692 hex 0000
register 62693 hex 000a
register 62694 hex 0147
register 62695 hex 0039

Now when the command is executed, the data is transferred to the PCD and subsequent data
transmissions from register 40001 of the unit will be 12 bit wide with the bits justified to the left (in the
Most Significant Bits). The data type will be bipolar and compatible with the destination register type.
The value will be scaled by 10.

Note: See Register Section 40001-40032 for default Data type and size definitions

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REGISTER DEFINTION
62688 Spare
62689 Execute Register for User Definable Register (registers 62689- 62943)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62690 high byte Relay Password Character 1
low byte Relay Password Character 2
62691 high byte Relay Password Character 3
low byte Relay Password Character 4
62692 Spare (Writeable)
62693 User Register 40001 Scale
62694 User Register 40001 Source Register (4xxxx Series)
62695 User Register 40001 Destination Register Data Type (bits 2-0)
(0=Offset Bipolar, 1=Bipolar, 2=Unipolar, 3=Negative Unipolar)
User Register 40001 Destination Register Justification (bit 3)
(0=LSB, 1=MSB)
User Register 40001 Destination Register Data Size(bits 7-4)
(0=2 Bit, 1=4 Bit, 2=8 Bit, 3=12 Bit, 4=16 Bit)
62696 high byte User Register 40001 Source Register Scale Type
(0=Normal, 1=Remainder, 2=Phase Current, 3=Neutral Current,
4=Voltage, 5=Power)
low byte User Register 40001 Source Register Data Type
(0=Unsigned 16 Bit, 1=Unsigned 32 Bit, 2= Signed 16 Bit,
3=Signed 32 Bit)
62697 User Register 40002 Scale
62698 User Register 40002 Source Register (4xxxx Series)
62699 User Register 40002 Destination Register Data Type
User Register 40002 Destination Register Justification
User Register 40002 Destination Register Data Size
62700 high byte User Register 40002 Source Register Scale Type
low byte User Register 40002 Source Register Data Type
62701 User Register 40003 Scale
62702 User Register 40003 Source Register (4xxxx Series)
62703 User Register 40003 Destination Register Data Type
User Register 40003 Destination Register Justification
User Register 40003 Destination Register Data Size
62704 high byte User Register 40003 Source Register Scale Type
low byte User Register 40003 Source Register Data Type
62705 User Register 40004 Scale
62706 User Register 40004 Source Register (4xxxx Series)
62707 User Register 40004 Destination Register Data Type
User Register 40004 Destination Register Justification
User Register 40004 Destination Register Data Size
62708 high byte User Register 40004 Source Register Scale Type
low byte User Register 40004 Source Register Data Type
62709 User Register 40005 Scale
62710 User Register 40005 Source Register (4xxxx Series)
62711 User Register 40005 Destination Register Data Type
User Register 40005 Destination Register Justification
User Register 40005 Destination Register Data Size
62712 high byte User Register 40005 Source Register Scale Type
low byte User Register 40005 Source Register Data Type
62713 User Register 40006 Scale
62714 User Register 40006 Source Register (4xxxx Series)
62715 User Register 40006 Destination Register Data Type
User Register 40006 Destination Register Justification
User Register 40006 Destination Register Data Size
62716 high byte User Register 40006 Source Register Scale Type
low byte User Register 40006 Source Register Data Type
62717 User Register 40007 Scale
62718 User Register 40007 Source Register (4xxxx Series)
62719 User Register 40007 Destination Register Data Type
User Register 40007 Destination Register Justification
User Register 40007 Destination Register Data Size
62720 high byte User Register 40007 Source Register Scale Type

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REGISTER DEFINTION
low byte User Register 40007 Source Register Data Type
62721 User Register 40008 Scale
62722 User Register 40008 Source Register (4xxxx Series)
62723 User Register 40008 Destination Register Data Type
User Register 40008 Destination Register Justification
User Register 40008 Destination Register Data Size
62724 high byte User Register 40008 Source Register Scale Type
low byte User Register 40008 Source Register Data Type
62725 User Register 40009 Scale
62726 User Register 40009 Source Register (4xxxx Series)
62727 User Register 40009 Destination Register Data Type
User Register 40009 Destination Register Justification
User Register 40009 Destination Register Data Size
62728 high byte User Register 40009 Source Register Scale Type
low byte User Register 40009 Source Register Data Type
62729 User Register 40010 Scale
62730 User Register 40010 Source Register (4xxxx Series)
62731 User Register 40010 Destination Register Data Type
User Register 40010 Destination Register Justification
User Register 40010 Destination Register Data Size
62732 high byte User Register 40010 Source Register Scale Type
low byte User Register 40010 Source Register Data Type
62733 User Register 40011 Scale
62734 User Register 40011 Source Register (4xxxx Series)
62735 User Register 40011 Destination Register Data Type
User Register 40011 Destination Register Justification
User Register 40011 Destination Register Data Size
62736 high byte User Register 40011 Source Register Scale Type
low byte User Register 40011 Source Register Data Type
62737 User Register 40012 Scale
62738 User Register 40012 Source Register (4xxxx Series)
62739 User Register 40012 Destination Register Data Type
User Register 40012 Destination Register Justification
User Register 40012 Destination Register Data Size
62740 high byte User Register 40012 Source Register Scale Type
low byte User Register 40012 Source Register Data Type
62741 User Register 40013 Scale
62742 User Register 40013 Source Register (4xxxx Series)
62743 User Register 40013 Destination Register Data Type
User Register 40013 Destination Register Justification
User Register 40013 Destination Register Data Size
62744 high byte User Register 40013 Source Register Scale Type
low byte User Register 40013 Source Register Data Type
62745 User Register 40014 Scale
62746 User Register 40014 Source Register (4xxxx Series)
62747 User Register 40014 Destination Register Data Type
User Register 40014 Destination Register Justification
User Register 40014 Destination Register Data Size
62748 high byte User Register 40014 Source Register Scale Type
low byte User Register 40014 Source Register Data Type
62749 User Register 40015 Scale
62750 User Register 40015 Source Register (4xxxx Series)
62751 User Register 40015 Destination Register Data Type
User Register 40015 Destination Register Justification
User Register 40015 Destination Register Data Size
62752 high byte User Register 40015 Source Register Scale Type
low byte User Register 40015 Source Register Data Type
62753 User Register 40016 Scale
62754 User Register 40016 Source Register (4xxxx Series)
62756 high byte User Register 40016 Source Register Scale Type
low byte User Register 40016 Source Register Data Type
62757 User Register 40017 Scale
62758 User Register 40017 Source Register (4xxxx Series)
62759 User Register 40017 Destination Register Data Type
User Register 40017 Destination Register Justification

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REGISTER DEFINTION
User Register 40017 Destination Register Data Size
62760 high byte User Register 40017 Source Register Scale Type
low byte User Register 40017 Source Register Data Type
62761 User Register 40018 Scale
62762 User Register 40018 Source Register (4xxxx Series)
62763 User Register 40018 Destination Register Data Type
User Register 40018 Destination Register Justification
User Register 40018 Destination Register Data Size
62764 high byte User Register 40018 Source Register Scale Type
low byte User Register 40018 Source Register Data Type
62765 User Register 40019 Scale
62766 User Register 40019 Source Register (4xxxx Series)
62767 User Register 40019 Destination Register Data Type
User Register 40019 Destination Register Justification
User Register 40019 Destination Register Data Size
62768 high byte User Register 40019 Source Register Scale Type
low byte User Register 40019 Source Register Data Type
62769 User Register 40020 Scale
62770 User Register 40020 Source Register (4xxxx Series)
62771 User Register 40020 Destination Register Data Type
User Register 40020 Destination Register Justification
User Register 40020 Destination Register Data Size
62772 high byte User Register 40020 Source Register Scale Type
low byte User Register 40020 Source Register Data Type
62773 User Register 40021 Scale
62774 User Register 40021 Source Register (4xxxx Series)
62775 User Register 40021 Destination Register Data Type
User Register 40021 Destination Register Justification
User Register 40021 Destination Register Data Size
62776 high byte User Register 40021 Source Register Scale Type
low byte User Register 40021 Source Register Data Type
62777 User Register 40022 Scale
62778 User Register 40022 Source Register (4xxxx Series)
62779 User Register 40022 Destination Register Data Type
User Register 40022 Destination Register Justification
User Register 40022 Destination Register Data Size
62780 high byte User Register 40022 Source Register Scale Type
low byte User Register 40022 Source Register Data Type
62781 User Register 40023 Scale
62782 User Register 40023 Source Register (4xxxx Series)
62783 User Register 40023 Destination Register Data Type
User Register 40023 Destination Register Justification
User Register 40023 Destination Register Data Size
62784 high byte User Register 40023 Source Register Scale Type
low byte User Register 40023 Source Register Data Type
62785 User Register 40024 Scale
62786 User Register 40024 Source Register (4xxxx Series)
62787 User Register 40024 Destination Register Data Type
User Register 40024 Destination Register Justification
User Register 40024 Destination Register Data Size
62788 high byte User Register 40024 Source Register Scale Type
low byte User Register 40024 Source Register Data Type
62789 User Register 40025 Scale
62790 User Register 40025 Source Register (4xxxx Series)
62791 User Register 40025 Destination Register Data Type
User Register 40025 Destination Register Justification
User Register 40025 Destination Register Data Size

62792 high byte User Register 40025 Source Register Scale Type
low byte User Register 40025 Source Register Data Type
62793 User Register 40026 Scale
62794 User Register 40026 Source Register (4xxxx Series)
62795 User Register 40026 Destination Register Data Type
User Register 40026 Destination Register Justification
User Register 40026 Destination Register Data Size

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REGISTER DEFINTION
62796 high byte User Register 40026 Source Register Scale Type
low byte User Register 40026 Source Register Data Type
62797 User Register 40027 Scale
62798 User Register 40027 Source Register (4xxxx Series)
62799 User Register 40027 Destination Register Data Type
User Register 40027 Destination Register Justification
User Register 40027 Destination Register Data Size
62800 high byte User Register 40027 Source Register Scale Type
low byte User Register 40027 Source Register Data Type
62801 User Register 40028 Scale
62802 User Register 40028 Source Register (4xxxx Series)
62803 User Register 40028 Destination Register Data Type
User Register 40028 Destination Register Justification
User Register 40028 Destination Register Data Size
62804 high byte User Register 40028 Source Register Scale Type
low byte User Register 40028 Source Register Data Type
62805 User Register 40029 Scale
62806 User Register 40029 Source Register (4xxxx Series)
62807 User Register 40029 Destination Register Data Type
User Register 40029 Destination Register Justification
User Register 40029 Destination Register Data Size
62808 high byte User Register 40029 Source Register Scale Type
low byte User Register 40029 Source Register Data Type
62809 User Register 40030 Scale
62810 User Register 40030 Source Register (4xxxx Series)
62811 User Register 40030 Destination Register Data Type
User Register 40030 Destination Register Justification
User Register 40030 Destination Register Data Size
62812 high byte User Register 40030 Source Register Scale Type
low byte User Register 40030 Source Register Data Type
62813 User Register 40031 Scale
62814 User Register 40031 Source Register (4xxxx Series)
62815 User Register 40031 Destination Register Data Type
User Register 40031 Destination Register Justification
User Register 40031 Destination Register Data Size
62816 high byte User Register 40031 Source Register Scale Type
low byte User Register 40031 Source Register Data Type
62817 User Register 40032 Scale
62818 User Register 40032 Source Register (4xxxx Series)
62819 User Register 40032 Destination Register Data Type
User Register 40032 Destination Register Justification
User Register 40032 Destination Register Data Size
62820 high byte User Register 40032 Source Register Scale Type
low byte User Register 40032 Source Register Data Type

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6.1.19 Miscellaneous Settings

ADDRESS DEFINTION
62944 Spare
62945 Execute Register for Miscellaneous Settings (registers 62945- 63021)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
62946 high byte Relay Password Character 1
low byte Relay Password Character 2
62947 high byte Relay Password Character 3
low byte Relay Password Character 4
62948 Spare (Writeable)
62949 Security Mask for Writeable 4xxxx Control Block
(Duplicate of 62598 since PCD does not have access to other rgister)
(bit state: 0=Control Block Password Required,
1=Control Block Unprotected)
Bit 15: Spare Bit 7: Spare
Bit 14: Spare Bit 6: Spare
Bit 13: Spare Bit 5: Pulse Outputs
Bit 12: Spare Bit 4: Set Reset Outputs
Bit 11: Spare Bit 3: Force logical Input
Bit 10: Spare Bit 2: Force Physical Output
Bit 9: Spare Bit 1: Force Physical Input
Bit 8: Spare Bit 0: Initiate Input

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6.1.20 Oscillographics Data Capture Settings

REGISTER DEFINTION
63200 Spare
63201 Execute Register for Oscillographics Settings (registers 63200 - 63327)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
63202 high byte Relay Password Character 1
low byte Relay Password Character 2
63203 high byte Relay Password Character 3
low byte Relay Password Character 4
63204 Spare (Writeable)
63205 Record Size = 0: 1 Record
1: 2 Records
2: 4 Records
3: 8 Records
63206 Mode
Bit 0 : Single-shot mode (0=off,1=on)
Bit 1 : Appended record mode (0=off, 1=on)
63207 Trigger Position
63208 Analog Quantity Select Mask
63209 Trigger Source (High Word)
63210 Trigger Source .
63211 Trigger Source .
Bit 0 : Trip Issued Signal (PCD)
Bit 1 : Breaker Open (PCD)
Bit 2 : External (WCI) (PCD / SCD)
Bit 3 : 32P (PCD / SCD)
Bit 4 : 32N (PCD / SCD)
Bit 5 : PFLT (SCD)
Bit 6 : NFLT (SCD)
Bit 7 : SFLT (SCD)
Bit 8 : PQ Sag (PCD / SCD)
Bit 9 : PQ Swell (PCD / SCD)
Bit 10: PQ Interruptions (PCD / SCD)
Bit 11: PQ Undervoltage (PCD / SCD)
Bit 12 : PQ Overvoltage (PCD / SCD)
Bit 13: PQ TDD (PCD / SCD)
Bit 14 : PQ THD (PCD / SCD)
Bit 15 : Spare
63212 Trigger Source (Low Word)
Bit 0 : 50N-1 (PCD)
Bit 1 : 50N-2 (PCD)
Bit 2 : 50N-3 (PCD)
Bit 3 : 51N (PCD)
Bit 4 : 50P-1 (PCD)
Bit 5 : 50P-2 (PCD)
Bit 6 : 50P-3 (PCD)
Bit 7 : 51P (PCD)
Bit 8 : 67P (PCD)
Bit 9 : 67N (PCD)
Bit 10 : 46 (PCD / SCD)
Bit 11 : 27 (PCD / SCD)
Bit 12 : 59 (PCD / SCD)
Bit 13 : 79 (PCD)
Bit 14 : 81S (PCD / SCD)
Bit 15 : 81R (PCD / SCD)
63213 Spare
Note: Analog Quantity Select Mask is currently not supported. Also, the two trigger word
registers 63209 through 63210 are currently not supported.

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6.1.21 Programmable Curve Parameters


Note: Support of multiple programmable curves is supported through the Extendend Memory
File number as follows:

File = 1: Prog. Curve 1


File = 2: Prog. Curve 2
File = 3: Prog. Curve 3

REGISTER DEFINTION
63328 Spare
63329 Execute Register for Programmable Curve Parameters (registers 63328 -
63967)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
63330 high byte Relay Password Character 1
low byte Relay Password Character 2
63331 high byte Relay Password Character 3
low byte Relay Password Character 4
63332 Spare (Writeable)
63333 Coefficient A (High Word)
63334 Coefficient A (Low Word)
63335 Coefficient B (High Word)
63336 Coefficient B (Low Word)
63337 Coefficient C (High Word)
63338 Coefficient C (Low Word)
63339 Coefficient P (High Word)
63340 Coefficient P (Low Word)

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6.1.22 Programmable Curve Data Settings

Note: Support of multiple programmable curves is supported through the Extended Memory File
number as follows:

File = 1: Prog. Curve 1


File = 2: Prog. Curve 2
File = 3: Prog. Curve 3

REGISTER DEFINTION
63456 Segment 0: Endrange
63457 Segment 0: Alpha (High Word)
63458 Segment 0: Alpha (Low Word)
63459 Segment 0: Beta (High Word)
63460 Segment 0: Beta (Low Word)
63461 – 63465 Segment 1:
63466 – 63470 Segment 2:
63471 – 63475 Segment 3
63476 – 63480 Segment 4:
63481 – 63485 Segment 5
63486 – 63490 Segment 6:
63491 – 63495 Segment 7:
63496 – 63500 Segment 8:
63501 – 63505 Segment 9:
63506 – 63510 Segment 10:
63511 – 63515 Segment 11
63516 – 63520 Segment 12:
63521 – 63525 Segment 13
63526 – 63530 Segment 14:
63531 - 63535 Segment 15
63536 - 63540 Segment 16:
63541 - 63545 Segment 17:
63546 - 63550 Segment 18:
63551 - 63555 Segment 19:
63556 - 63560 Segment 20:
63561 - 63565 Segment 21:
63566 - 63570 Segment 22:
63571 - 63575 Segment 23:
63576 - 63580 Segment 24:
63581 - 63585 Segment 25:
63586 - 63590 Segment 26:
63591 - 63595 Segment 27:
63596 - 63600 Segment 28:
63601 - 63605 Segment 29:
63606 - 63610 Segment 30:
63611 - 63615 Segment 31:
63616 - 63620 Segment 32:
63621 - 63625 Segment 33:
63626 - 63630 Segment 34:
63631 - 63635 Segment 35:
63636 - 63640 Segment 36:
63641 - 63645 Segment 37:
63646 - 63650 Segment 38:
63651 - 63655 Segment 39:
63656 - 63660 Segment 40:
63661 - 63665 Segment 41:
63666 - 63670 Segment 42:
63671 - 63675 Segment 43:
63676 - 63680 Segment 44:
63681 - 63685 Segment 45:
63686 - 63690 Segment 46:
63691 - 63695 Segment 47:

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REGISTER DEFINTION
63696 - 63700 Segment 48:
63701 - 63705 Segment 49:
63706 - 63710 Segment 50:
63711 - 63715 Segment 51:
63716 - 63720 Segment 52:
63721 - 63725 Segment 53:
63726 - 63730 Segment 54:
63731 - 63735 Segment 55:

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6.1.23 Programmable Curve Pointer Table Settings


Note: Support of multiple programmable curves is supported through the Extendend Memory
File number as follows:
File = 1: Prog. Curve 1
File = 2: Prog. Curve 2
File = 3: Prog. Curve 3

REGISTER DEFINTION
63840 high byte Pointer Offset 0
low byte Pointer Offset 1
63841 high byte Pointer Offset 2
low byte Pointer Offset 3
63842 high byte Pointer Offset 4
low byte Pointer Offset 5
63843 high byte Pointer Offset 6
low byte Pointer Offset 7
63844 high byte Pointer Offset 8
low byte Pointer Offset 9
63845 high byte Pointer Offset 10
low byte Pointer Offset 11
63846 high byte Pointer Offset 12
low byte Pointer Offset 13
63847 high byte Pointer Offset 14
low byte Pointer Offset 15
63848 high byte Pointer Offset 16
low byte Pointer Offset 17
63849 high byte Pointer Offset 18
low byte Pointer Offset 19
63850 high byte Pointer Offset 20
low byte Pointer Offset 21
63851 high byte Pointer Offset 22
low byte Pointer Offset 23
63852 high byte Pointer Offset 24
low byte Pointer Offset 25
63853 high byte Pointer Offset 26
low byte Pointer Offset 27
63854 high byte Pointer Offset 28
low byte Pointer Offset 29
63855 high byte Pointer Offset 30
low byte Pointer Offset 31
63856 high byte Pointer Offset 32
low byte Pointer Offset 33
63857 high byte Pointer Offset 34
low byte Pointer Offset 35
63858 high byte Pointer Offset 36
low byte Pointer Offset 37
63859 high byte Pointer Offset 38
low byte Pointer Offset 39
63860 high byte Pointer Offset 40
low byte Pointer Offset 41
63861 high byte Pointer Offset 42
low byte Pointer Offset 43
63862 high byte Pointer Offset 44
low byte Pointer Offset 45
63863 high byte Pointer Offset 46
low byte Pointer Offset 47
63864 high byte Pointer Offset 48
low byte Pointer Offset 49
63865 high byte Pointer Offset 50
low byte Pointer Offset 51
63866 high byte Pointer Offset 52
low byte Pointer Offset 53
63867 high byte Pointer Offset 54
low byte Pointer Offset 55

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REGISTER DEFINTION
63868 high byte Pointer Offset 56
low byte Pointer Offset 57
63869 high byte Pointer Offset 58
low byte Pointer Offset 59

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6.1.24 Breaker Failure Unit Settings

Note: This register set is not supported for PCD2000 revision V2.00 and higher or any SCD
products.

REGISTER DEFINTION
63968 Spare
63969 Execute Register for Oscillographics Settings (registers 63968 - 64095)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
63970 high byte Relay Password Character 1
low byte Relay Password Character 2
63971 high byte Relay Password Character 3
low byte Relay Password Character 4
63972 Spare (Writeable)
63973 Enable/Disable (1=ON/0=OFF)
63974 BFT Pickup Time Delay
63975 BFT Drop Time Delay
63976 BFT Starters:
Bit 0: External Input
Bit 1: Phase Level Detector
Bit 2: Neutral Level Detector
63977 ReTrip Pickup Time Delay
63978 ReTrip Drop Time Delay
63979 ReTrip Starters:
Bit 0: External Input
Bit 1: Phase Level Detector
Bit 2: Neutral Level Detector
63980 Phase Level Detector Pickup (5 to 100% of 51P) .
63981 Neutral Level Detector Pickup (5 to 100% of 51N)

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6.1.25 Master Trip Output Assignment

Note: This register set is not supported for PCD2000 revision V2.00 and higher or any SCD
products.

REGISTER DEFINTION
64096 Spare
64097 Execute Register for Oscillographics Settings (registers 64096 - 64223)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
64098 high byte Relay Password Character 1
low byte Relay Password Character 2
64099 high byte Relay Password Character 3
low byte Relay Password Character 4
64100 Spare (Writeable)
64101 Assignment (High Word): Spares
64102 Assignment (Low Word):
Bit 0: 50N-1
Bit 1: 50N-2
Bit 2: 50N-3
Bit 3: 51N
Bit 4: 50P-1
Bit 5: 50P-2
Bit 6: 50P-3
Bit 7: 51P
Bit 8: 67P
Bit 9: 67N
Bit 10: 46
Bit 11: Spare
Bit 12: Spare
Bit 13: Spare
Bit 14: Spare
Bit 15: Spare

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6.1.26 Load Profile Attribute Assignment (Future)

REGISTER DEFINTION
64224 Spare
64225 Execute Register for Oscillographics Settings (registers 64224
- 64352)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
64226 high byte Relay Password Character 1
low byte Relay Password Character 2
64227 high byte Relay Password Character 3
low byte Relay Password Character 4
64228 Spare (Writeable)
64229 Record Attribute 1
64230 Record Attribute 2
64231 Record Attribute 3
64232 Record Attribute 4
64233 Record Attribute 5
64234 Record Attribute 6
64235 Record Attribute 7
64236 Record Attribute 8
64237 Record Attribute 9

Currently Defined Attributes:

ATTR # DESCRIPTION DYNAMIC SCALE


0 Demand kW-A 122
1 Demand kW-B 122
2 Demand kW-C 122
3 Demand kVAR-A 122
4 Demand kVAR-B 122
5 Demand kVAR-C 122
6 Van 10
7 Vbn 10
8 Vcn 10
9 Demand kW-3P 367
10 Demand kVAR- 367
3P
11 Demand Ia 1
12 Demand Ib 1
13 Demand Ic 1
14 Vab 10
15 Vbc 10
16 Vca 10

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6.1.27 Power Quality Settings

REGISTER DEFINTION
64352 Spare
64353 Execute Register for Oscillographics Settings (registers 64352 – 64479)
(0=No Action, 1=Transfer Settings, 2=Refresh Registers)
64354 high byte Relay Password Character 1
low byte Relay Password Character 2
64355 high byte Relay Password Character 3
low byte Relay Password Character 4
64356 Spare (Writeable)
64357 Units Enabled
Bit 0: Swell Unit
Bit 1: Sag Unit
Bit 2: Interruption Unit
Bit 3: Overvoltage Unit
Bit 4: Undervoltage Unit
Bit 5: Current TDD Unit
Bit 6: Voltage THD Unit
64358 Swell, Instantaneous, Voltage Threshhold (1.0 to 1.5 PU, 0.01 PU Steps,
x100)
64359 Swell, Instantaneous, Time Maximum ( 2 to 120 Quarter cycles, qtr. cycle
steps)
64360 Swell, Momentary, Voltage Threshhold (1.0 to 1.5 PU, 0.01 PU Steps,
x100)
64361 Swell, Momentary, Time Maximum ( 30 to 180 Cycles, one Cycle steps)
64362 Swell, Temporary, Voltage Threshhold (1.0 to 1.5 PU, 0.01 PU Steps,
x100)
64363 Swell, Temporary, Time Maximum ( 3 to 60 Seconds, one Second steps)
64364 Sag, Instantaneous, Voltage Threshhold (0.1 to 1.0 PU, 0.01 PU Steps,
x100)
64365 Sag, Instantaneous, Time Maximum ( 2 to 120 Quarter cycles, qtr. cycle
steps)
64366 Sag, Momentary, Voltage Threshhold (0.1 to 1.0 PU, 0.01 PU Steps,
x100)
64367 Sag, Momentary, Time Maximum ( 30 to 180 Cycles, one Cycle steps)
64368 Sag, Temporary, Voltage Threshhold (0.1 to 1.0 PU, 0.01 PU Steps,
x100)
64369 Sag, Temporary, Time Maximum ( 3 to 60 Seconds, one Second steps)
64370 Interruption, Voltage Threshhold (0.0 to 0.1 PU, 0.01 PU Steps, x100)
64371 Interruption, Momentary Time Maximum (2 to 720 Qtr Cycles, qtr cycle
steps)
64372 Interruption, Temporary Time Maximum (3 to 60 Seconds, one second
steps)
64373 Interruption, Sustained Time Maximum (60 to 180 Seconds, one second
steps)
64374 Overvoltage, Voltage Threshold (1.0 to 1.5 PU, 0.01 PU Steps, x100)
64375 Overvoltage, Time Maximum (1 to 60 Minutes, 1 minute steps)
64376 Undervoltage, Voltage Threshold (0.1 to 1.0 PU, 0.01 PU Steps, x100)
64377 Undervoltage, Time Maximum (1 to 60 Minutes, 1 minute steps)
64378 Current TDD, Threshold (1 to 50 Percent, 1 Percent Steps)
64379 Current TDD, Initial Peak Current (1 to 1600 Amps, 1 Amp Steps)
64380 Current TDD, Peak Update Mode (0=Off, 1=On)
64381 Voltage THD, Threshold (1 to 50 Percent, 1 Percent Steps)
64382 Window:
Bit 0: Type (0=Sliding, 1=Profile)
Bit 1,2: Demand Interval (0=5, 1=15, 2=30, 3=60 Minutes)
64383 RMS Recording Mode (0=Single Quantity, 1=Dual Quantity)

UNIT SINGLE QUANTITY DUAL QUANTITY


Swell Vx Vx, Ix
Sag Vx Vx, Ix
Interruption Vx Vx, Ix
Overvoltage

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Undervoltage
TDD TDD TDD, Ix
THD THD THD, Vx

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6.1.28 Protection Settings (PCD2000 Revision V2.00 and above, also SCD where applicable)
Note: (Modbus query file numbers. Primary = 1, Alt1 = 2, Alt2 = 3, Bank2 Primary = 5, Bank2 alt1 = 6,
Bank2 Alt2 = 7)
REG DEFINTION DISPLAY DATA STEP DISABLE DATA PROD.
1 2 3
RANGE RANGE SIZE DATA SCALE
64480 Spare ALL
64481 Execute Register (registers 64481- 64863) 0, 1, 2 0, 1, 2 x1 ALL
(0=No Action, 1=Transfer Settings, 2=Refresh
Registers)
64482 (High Byte) Relay Password Character 1 ALL
(Low Byte) Relay Password Character 2
64483 (High Byte) Relay Password Character 3 ALL
(Low Byte) Relay Password Character 4
64484 Spare (Writeable) ALL
64485 High Configuration Word (read only) Ref. Table 6.1.8.5 ALL
64486 Low Configuration Word (read only) ALL
64487 51P Curve Select (ANSI Type I / IEC Type I / Ref. Tables 6.1.8.1, 6.1.8.2, & 6.1.8.3.1 PCD
Recloser Type V)
64488 51P Pickup Amps (Ref. Tap Setting Tables) Ref. Table 6.1.8.4 PCD
64489 51P (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 PCD
51P (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
51P (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
51P (Def. Time): Time Delay (Seconds) 0.0 - 10.0 0 - 200 2 x 0.05 PCD
64490 51P Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64491 51P Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64492 50P-1 Curve Select (ANSI Type III) Ref. Table 6.1.8.1 PCD
50P-1 Curve Select (IEC Type III) Ref. Table 6.1.8.2 PCD
50P-1 Curve Select (Recloser Type VI) Ref. Table 6.1.8.3.2 PCD
64493 50P-1 Pickup Multiplier 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64494 50P-1 (ANSI): Time Dial 1.0 - 10.0 10 - 200 1 x 0.05 PCD
50P-1 (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
50P-1 (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
50P-1 (Def. Time): Time Delay (Seconds) 0.0 - 9.99 0 - 999 1 x 0.01 PCD
64495 50P-1 Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64496 50P-1 Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64497 50P-1 Curve Block Pickup (x 51P Pickup) 1.0 - 20.0 10 - 200 1 201 x 0.1 PCD
64498 50P-2 Select (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 PCD
64499 50P-2 Pickup Multiplier (Seconds) 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64500 50P-2 Time Delay (Seconds) 0.00 - 9.99 0 - 999 1 x 0.01 PCD
64501 50P-2 Curve Block Pickup (x 51P Pickup) 1.0 - 20.0 10 - 200 1 201 x 0.1 PCD
64502 50P-3 Select (0=Disable, 1=Enable) 0, 1 0, 1 1 0 x1 PCD
64503 50P-3 Pickup Multiplier 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64504 50P-3 Time Delay (Seconds) 0.00 - 9.99 0 - 999 1 x 0.01 PCD
64505 46 Curve Select (ANSI Type II) Ref. Table 6.1.8.1 ALL
46 Curve Select (IEC Type II) Ref. Table 6.1.8.2 ALL
46 Curve Select (Recloser Type VI) Ref. Table 6.1.8.3.2 ALL
64506 46 Pickup Amps Ref. Table 6.1.8.4 ALL
64507 46 (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 ALL
46 (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 ALL
46 (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.10 ALL
46 (Def. Time): Time Delay (Seconds) 0.0 - 10.0 0 - 200 2 x 0.05 ALL
64508 46 Minimum Response Time (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 ALL
64509 46 Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 ALL
64510 51N Curve Select (ANSI Type II) Ref. Table 6.1.8.1 PCD
51N Curve Select (IEC Type II) Ref. Table 6.1.8.2 PCD
51N Curve Select (Recloser Type VI) Ref. Table 6.1.8.3.2 PCD
64511 51N Pickup Amps Ref. Table 6.1.8.4 PCD
64512 51N (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 PCD
51N (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
51N (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
51N (Def. Time): Time Delay (Seconds) 0.0 - 10.0 0 - 200 2 x 0.05 PCD
64513 51N Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64514 51N Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD

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REG DEFINTION DISPLAY DATA STEP DISABLE DATA PROD.


1 2 3
RANGE RANGE SIZE DATA SCALE
64515 50N-1 Curve Select (ANSI Type III) Ref. Tables 6.1.8.1 PCD
50N-1 Curve Select (IEC Type III) Ref. Tables 6.1.8.2 PCD
50N-1 Curve Select (Recloser Type VI) Ref. Tables 6.1.8.3.2 PCD
64516 50N-1 Pickup Multiplier 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64517 50N-1 (ANSI): Time Dial 0.5 - 10.0 10 - 100 1 x 0.05 PCD
50N-1 (IEC): Time Multiplier 0.05 - 1.00 10 - 100 10 x 0.005 PCD
50N-1 (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
50N-1 (Def. Time): Time Delay (Seconds) 0.0 - 9.99 0 - 999 1 x 0.01 PCD
64518 50N-1 Minimum Response (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64519 50N-1 Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64520 50N-1 Curve Block Pickup (x 51N Pickup) 1.0 - 20.0 10 - 200 1 201 x 0.1 PCD
64521 50N-2 Select (STD): 0=Disable, 1=Enable 0, 1 0, 1 1 0 x1 PCD
50N-2 Select (SEF): 0=Disable, 1=Standard, 0, 1, 2, 3 0, 1, 2, 3 1 0 x1 PCD
2=SEF, 3=Directional SEF
64522 50N-2 Pickup Multiplier (Non-SEF) 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64523 50N-2 (STD) Time Delay (Seconds) 0.00 - 9.99 0 - 999 1 x 0.01 PCD
50N-2 (SEF) Time Delay (Seconds) 0.50 - 180.0 50 - 18000 10 x 0.01 PCD
64524 50N-2 (SEF) Torque Angle (Degrees) 0 - 355 0 - 71 1 x5 PCD
64525 50N-2 (SEF) Pickup: 600:1 Type (Pri. Amps) 3.0 - 200.0 6 - 400 1 x 0.5 PCD
50N-2 (SEF) Pickup: 1000:1 Type (Pri. 5.0 - 200.0 10 - 400 1 x 0.5 PCD
Amps)
50N-2 (SEF) Pickup: Feeder Type (Sec. 5.0 - 200.0 10 - 400 1 x 0.5 PCD
MilliAmps)
64526 50N-3 Curve Block Pickup (x 51N Pickup) 1.0 - 20.0 10 - 200 1 201 x 0.1 PCD
64527 50N-3 Select (0=Disable, 1=Enable) 0, 1 0, 1 1 0 x1 PCD
64528 50N-3 Pickup Multiplier 0.5 - 20.0 5 - 200 1 x 0.1 PCD
64529 50N-3 Time Delay (Seconds) 0.00 - 9.99 0 - 999 1 x 0.01 PCD
64530 67P Select (0=Disable, 1=Enable) 0, 1 0, 1 1 0 x1 PCD
64531 67P Curve Select (ANSI Type I) Ref. Table 6.1.8.1 PCD
67P Curve Select (IEC Type I) Ref. Table 6.1.8.2 PCD
67P Curve Select (Recloser Type V) Ref. Table 6.1.8.3.1 PCD
64532 67P Pickup Amps Ref. Table 6.1.8.4 PCD
64533 67P (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 PCD
67P (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
67P (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
67P (Def. Time): Time Delay 0.0 - 10.0 0 - 200 2 x 0.05 PCD
64534 67P Torque Angle (Degrees) 0 - 355 0 - 71 1 x5 PCD
64535 67P Minimum response Time (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64536 67P Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64537 67N Select (STD) (0=Disable, 1=Enable) 0, 1 0, 1 1 0 x1 PCD
67N Select (SEF) (0=Disable, 1=Enable-Zero 0, 1, 3 0, 1, 3 1 0 x1 PCD
Sequence, 3=Enable-Neg. Seq.)
64538 67N Curve Select (ANSI Type I) Ref. Table 6.1.8.1 PCD
67N Curve Select (IEC Type I) Ref. Table 6.1.8.2 PCD
67N Curve Select (Recloser Type V) Ref. Table 6.1.8.3.1 PCD
64539 67N Pickup Amps Ref. Table 6.1.8.4 PCD
64540 67N (ANSI): Time Dial 0.50 - 10.0 10 - 200 1 x 0.05 PCD
67N (IEC): Time Multiplier 0.05 - 1.00 10 - 200 10 x 0.005 PCD
67N (Recloser): Time Multiplier 0.10 - 2.00 10 - 200 1 x 0.01 PCD
67N (Def. Time): Time Delay 0.0 - 10.0 0 - 200 2 x 0.05 PCD
64541 67N Torque Angle (Degrees) 0 - 355 0 - 71 1 x5 PCD
64542 67N Minimum response Time (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64543 67N Time-Curve Adder (Seconds) 0.00 - 2.00 0 - 200 1 x 0.01 PCD
64544 81 Select byte (0=Disable, 1=81-1, 2=81-2) 0-2 0-2 1 0 x1 ALL
64545 81S-1 (50 Hz) Pickup Frequency (Hertz) 46.00 - 54.00 4600 - 5400 1 5401 x 0.01 ALL
81S-1 (60 Hz) Pickup Frequency (Hertz) 56.00 - 64.00 5600 - 6400 1 6401 x 0.01 ALL
64546 81S-1 Time Delay (0.08 - 9.98 Seconds, 0.08 - 9.98 8 - 998 2 x 0.01 ALL
*100)
64547 81S-2 (50 Hz) Pickup Frequency (Hertz) 46.00 - 54.00 4600 - 5400 1 5401 x 0.01 ALL
81S-2 (60 Hz) Pickup Frequency (Hertz) 56.00 - 64.00 5600 - 6400 1 6401 x 0.01 ALL
64548 81S-2 Time Delay (0.08 - 9.98 Seconds, 0.08 - 9.98 8 - 998 2 x 0.01 ALL
*100)

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REG DEFINTION DISPLAY DATA STEP DISABLE DATA PROD.


1 2 3
RANGE RANGE SIZE DATA SCALE
64549 81R-1 (50 Hz) Pickup Frequency (Hertz) 46.00 - 54.00 4600 - 5400 1 5401 x 0.01 ALL
81R-1 (60 Hz) Pickup Frequency (Hertz) 56.00 - 64.00 5600 - 6400 1 6401 x 0.01 ALL
64550 81R-1 Time Delay (0 - 999 Seconds) 0 - 999 0 - 999 1 x1 ALL
64551 81R-2 (50 Hz) Pickup Frequency (Hertz) 46.00 - 54.00 4600 - 5400 1 5401 x 0.01 ALL
81R-2 (60 Hz) Pickup Frequency (Hertz) 56.00 - 64.00 5600 - 6400 1 6401 x 0.01 ALL
64552 81R-2 Time Delay (Seconds) 0 - 999 0 - 999 1 x1 ALL
64553 81V Voltage Block (Secondary Volts) 40 - 200 40 - 200 1 x1 ALL
64554 27 Select (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 ALL
64555 27 Pickup Voltage (Volts) 10 - 200 10 - 200 1 x1 ALL
64556 27 Time Delay (Seconds) 0 - 60 0 - 60 1 x1 ALL
64557 59 Select (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 ALL
64558 59 Pickup Voltage (Secondary Volts) 70 - 250 70 - 250 1 x1 ALL
64559 59 Time Delay (Seconds) 0 - 60 0 - 60 1 x1 ALL
64560 32P Select (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 ALL
64561 32P Torque Angle (Degrees5) 0 - 355 0 - 71 1 x5 ALL
64562 32N Select (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 ALL
64563 32N Torque Angle (Degrees5) 0 - 355 0 - 71 1 x5 ALL
64564 Cold Load Time (Seconds / Minutes) 0 - 254 0 - 254 1 255 x1 ALL
64565 Neutral Cold Load (SEF Only) (Seconds / 0 - 254 0 - 254 1 255 x1 PCD
Minutes)
64566 2 Phase Voting (0=Disable, 1=Enable) 0-1 0-1 1 0 x1 PCD

1
Notes: Display Range is the range of parameter values as displayed by all MMI processes.
2
Data Range is the numeric value passed over the Modbus protocol.
3
Step Size is the incremental value by which values may change within the Data Range.

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6.1.29 Recloser Settings (PCD Revision V2.00 and above)

Note: This is essentially a continuation of the Protection settings point list (see 6.1.29 above).
The execution and password registers used for this block are the same as used for
Protection settings (64481 through 64483).

REGISTER DEFINITION
64608 Single Phase Tripping Mode
0 = Single Phase Tripping Disabled
1 = Only Picked Up Phases
2 = One Or All Phases
64609 Reserved
64610 79 Reset Time: 3 - 200 Seconds, *1
64611 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64612 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64613 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64614 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64615 79-1 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64616 79-1 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64617 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64618 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64619 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64620 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64621 79-2 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64622 79-2 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64623 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64624 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64625 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64626 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64627 79-3 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64628 79-3 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout

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REGISTER DEFINITION
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64629 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64630 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64631 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64632 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64633 79-4 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64634 79-4 Open Interval Time
STD: 0.1 – 200.0 Seconds, *10, 2001 = Lockout
SEF: 0.1 – 1800.0 Seconds, *10, 18001 = Lockout
64635 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51P Bits 8 - 11: 50P-2
Bits 4 – 7: 50P-1 Bits 12 - 15: 50P-3
64636 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: 51N Bits 8 - 11: 50N-2
Bits 4 – 7: 50N-1 Bits 12 - 15: 50N-3
64637 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: 46 Bits 8 - 11: 67N
Bits 4 – 7: 67P Bits 12 - 15: Spare
64638 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64639 79-5 Mode Select (see table below for bit definitions)
Bits 0 – 3: Spare Bits 8 - 11: Spare
Bits 4 – 7: Spare Bits 12 - 15: Spare
64640 79-5 Open Interval Time (Always Lockout)
64641 79 Cutout Time (1 – 201, 201=DisaBle)
64642 79V Select (0=Disable, 1=Enable)
64643 79V Pickup (10-200 Secondary Volts)
64644 79V Time Delay (4 – 200 Seconds)
64645 79C Enable (0 = Disable, 1 = Enable)
64646 79C Reset Timer (3 – 200 seconds. 201 = Disable)

Table of the bit definitions for above.


Bit Definition Selection
0 Element Enable 0 = Disabled
1 = Enabled
1 Lockout 0 = No
1 = Yes
2 Mode 0 = Single Phase
1 = Three Phase
3 Alarm Enable 0 = No
1 = Alarm Only

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6.1.30 Fault Indicator / Sectionalizer Settings (SCD only.)

Note: This is essentially a continuation of the Protection settings point list (see 6.1.28 above).
The execution and password registers used for this block are the same as used for
Protection settings (64481 through 64483).

REGISTER DEFINITION DISPLAY DATA STEP DATA


RANGE RANGE SIZE SCALE
64736 Fault Indicator Mode Select 1-4 1 x1
1 : Phase Current Only
2 : Phase and Neutral Current
3 : Phase Current with Voltage
4 : Phase and Neutral Current with Voltage
64737 Neutral Mode Control 0-2 1 x1
0 : Standard Neutral only
1 : Sensitive Earth only
2 : Standard and Sensitive Earth
64738 Phase Fault Indicator Pickup Level Ref. Table 6.1.8.4
64739 Phase Fault Indicator Drop Level 2 - 50% 2 - 50 1 x1
64740 Phase Fault Indicator Directional Element Enable 0-1 1 x1
(0=Disable, 1=Enable)
64741 Phase Fault Indicator Directional Element Torque 0 - 355° 0 - 71 1 x5
Angle
64742 Neutral Fault Indicator Pickup Level Ref. 6.1.8.4
64743 Neutral Fault Indicator Drop Level 2 - 50% 2 - 50 1 x1
64744 Neutral Fault Indicator Directional Element Enable 0, 1 1 x1
(0=Disable, 1=Enable)
64745 Neutral Fault Indicator Directional Element Torque 0 - 355° 0 - 71 1 x5
Angle
64746 SE Fault Indicator Pickup Level Ref. Table 6.1.8.4
64747 SE Fault Indicator Drop Level (per unit) 10 - 50% 10 - 50 1 x1
64748 SE Fault Indicator Directional Element Enable 0, 1 1 x1
(0=Disable, 1=Enable)
64749 SE Fault Indicator Directional Element Torque 0 - 355° 0 - 71 1 x5
Angle
64750 Fault Indicator Pickup Delay (Seconds) 0.03 - 10.0 3 - 1000 1 x 0.01
64751 Sectionalizer Switch Open Delay (Seconds) 0.01 - 2.00 1 - 200 1 x 0.01
64752 Sectionalizer Steps to Switch Open 1-4 1 x1
64753 Sectionalizer Reset Time (Seconds) 3.0 - 200.0 30 - 1 x 0.1
2000
64754 Source Transfer Mode 0-3 1 x1
0 : Disabled
1 : Primary to Secondary Enabled
2 : Secondary to Primary Enabled
3 : Bidirectional Transfer Enabled
64755 Switch Assignment 0-1 1 x1
0 : Primary is Switch 1, Secondary is Switch 2
1 : Secondary is Switch 1, Primary is Switch 2
64756 Voltage Inputs Assignments 0-5 1 x1
0 : Va, Vb → Primary, Vc → Secondary
1 : Va, Vc → Primary, Vb → Secondary
2 : Va → Primary, Vb, Vc → Secondary
3 : Vb, Vc → Primary, Va → Secondary
4 : Vb → Primary, Va, Vc → Secondary
5 : Vc → Primary, Va, Vb → Secondary
64757 Dead Bus Voltage (per unit) 0.05 - 0.25 5 - 25 1 x 0.01
64758 Dead Bus Voltage (per unit) 0.50 - 1.00 50 - 100 1 x 0.01
64759 Current Block (per unit) 0.05 - 2.00 5 - 200 1 x 0.01
64760 Initiate Time Delay (Seconds) 0.05 - 9.99 5 - 999 1 x 0.01
64761 Transfer Time Delay (Seconds) 0.01 - 9.99 1 - 999 1 x 0.01
64762 Volt drop (percent) 10 - 80 10 - 80 1 x1

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6.1.31 Loop Control Module Settings.

REGISTER TYPE SCALE RANGE DESCRIPTION


64864 Spare
64865 Unsigned short Execute
64866 High byte Password character 1
Low byte Password character 2
64867 High byte Password character 3
Low byte Password character 4
64868 Unsigned short Spare
64869 Unsigned short 1 0–3 Operation Mode. 0 = Disabled, 1 = Sectionalizing, 2 = Midpoint, 3 = Tiepoint
64870 Unsigned short 1 0–1 Alt1 Select. 0 = Disabled, 1 = Enabled.
(64869 = Midpoint or Tiepoint only)
64871 Unsigned short 1 0 – 125 SWOTF time (64869 = Midpoint only)
64872 Reserved for future use.
64873 Unsigned short 1 0–1 Line Side Voltage Source. 0 = S2, 1 = S1
1
64874 Unsigned short 1 1–3 Number of Line Voltage Transformers
1
64875 Unsigned short 1 0–3 Number of Load Voltage Transformers
64876 Unsigned short 1 0–1 Line Voltage Transformer. 0 = Disabled, 1 = Enabled.
64877 Unsigned short 1 0–1 Load Voltage Transformer. 0 = Disabled, 1 = Enabled.
(Only if 64875 ≠ 0)
2
64878 Unsigned short 1 0 – 2 Single-Phase Line Voltage Transformer . (Only if 64874 = 1)
2
64879 Unsigned short 1 0–2 Single-Phase Load Voltage Transformer . (Only if 64875 = 1)
64880 Unsigned short 1 0 – 115 Deadbus Voltage
64881 Unsigned short 1 5 – 120 Livebus Voltage (>= Deadbus Voltage(64880) + 5)
64882 Unsigned short 1 1 – 511 Deadbus time
64883 Unsigned short 1 1 – 511 Livebus time
64884 Unsigned short 1 0 - 510 Voltage Regain Time (< Deadbus time(64882)) and
Voltage Regain Time (< Livebus time(64883))
64885 Unsigned short 1 0 - 1 Reset on power up. 0 = No, 1 = Yes (Only used when 64869 = 1 or 2)
64886 Unsigned short 1 0-1 Sectionalizing mode in 3 phase setting. 0 = Any phase, 1 = All 3 phases
(Only if 64869 = 1)
64887 Unsigned short 1 0-1 Sectionalizer reset enable. 0 = Disabled, 1 = Enabled (Only if 64869 = 1)

Notes:
1. The number of line / load voltage transformers must conform to the following table

VT LINE/LOAD → 1/0 1/1 1/2 1/3 2/0 2/1 2/2 2/3 3/0 3/1 3/2 3/3
MODE ↓
Sectionalizer x x x x x x x X X x
Mid-point x x x x x x x X X x
Tie-point x x

0 = None, 1 = 1 phase line to neutral, 2 = 2 Open delta, 3 = 3 phase wye-connected

2. 0= Phase A, 1= Phase B, 2= Phase C.

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6.1.32 DNP Binary Inputs Assignable Class Settings (PCD Rev. 2.40 and above)

The DNP Assignable Classes feature allows the user to make class assignments to the binary input
points. By default, all binary input points are assigned CLASS 1. If a class 1 event poll is performed all
binary input points that have changed state since the last event poll will be reported. The class
assignment for a given binary input point can be changed to CLASS 2, 3 or NO CLASS by setting the
appropriate value in the associated modbus register.

For example, to change the class assignment of DNP binary input point 6 to CLASS 2, modify register
64998 to set bits 7-4 to 0010(binary).

Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.

REGISTER DEFINITION
64992 Spare
64993 Execute
64994 High byte Password character 1
Low byte Password character 2
64995 High byte Password character 3
Low byte Password character 4
64996 Spare
64997 DNP binary assigned class register 0 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 0 Bits 11 - 8: DNP binary input point 1
Bits 7 - 4: DNP binary input point 2 Bits 3 - 0: DNP binary input point 3
64998 DNP binary assigned class register 1 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 4 Bits 11 - 8: DNP binary input point 5
Bits 7 - 4: DNP binary input point 6 Bits 3 - 0: DNP binary input point 7
64999 DNP binary assigned class register 2 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 8 Bits 11 - 8: DNP binary input point 9
Bits 7 - 4: DNP binary input point 10 Bits 3 - 0: DNP binary input point 11
65000 DNP binary assigned class register 3 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 12 Bits 11 - 8: DNP binary input point 13
Bits 7 - 4: DNP binary input point 14 Bits 3 - 0: DNP binary input point 15
65001 DNP binary assigned class register 4 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 16 Bits 11 - 8: DNP binary input point 17
Bits 7 - 4: DNP binary input point 18 Bits 3 - 0: DNP binary input point 19
65002 DNP binary assigned class register 5 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 20 Bits 11 - 8: DNP binary input point 21
Bits 7 - 4: DNP binary input point 22 Bits 3 - 0: DNP binary input point 23
65003 DNP binary assigned class register 6 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 24 Bits 11 - 8: DNP binary input point 25
Bits 7 - 4: DNP binary input point 26 Bits 3 - 0: DNP binary input point 27
65004 DNP binary assigned class register 7 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 28 Bits 11 - 8: DNP binary input point 29
Bits 7 - 4: DNP binary input point 30 Bits 3 - 0: DNP binary input point 31
65005 DNP binary assigned class register 8 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 32 Bits 11 - 8: DNP binary input point 33
Bits 7 - 4: DNP binary input point 34 Bits 3 - 0: DNP binary input point 35
65006 DNP binary assigned class register 9 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 36 Bits 11 - 8: DNP binary input point 37
Bits 7 - 4: DNP binary input point 38 Bits 3 - 0: DNP binary input point 39
65007 DNP binary assigned class register 10 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 40 Bits 11 - 8: DNP binary input point 41
Bits 7 - 4: DNP binary input point 42 Bits 3 - 0: DNP binary input point 43

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REGISTER DEFINITION
65008 DNP binary assigned class register 11 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 44 Bits 11 - 8: DNP binary input point 45
Bits 7 - 4: DNP binary input point 46 Bits 3 - 0: DNP binary input point 47
65009 DNP binary assigned class register 12 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 48 Bits 11 - 8: DNP binary input point 49
Bits 7 - 4: DNP binary input point 50 Bits 3 - 0: DNP binary input point 51
65010 DNP binary assigned class register 13 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 52 Bits 11 - 8: DNP binary input point 53
Bits 7 - 4: DNP binary input point 54 Bits 3 - 0: DNP binary input point 55
65011 DNP binary assigned class register 14 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 56 Bits 11 - 8: DNP binary input point 57
Bits 7 - 4: DNP binary input point 58 Bits 3 - 0: DNP binary input point 59
65012 DNP binary assigned class register 15 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 60 Bits 11 - 8: DNP binary input point 61
Bits 7 - 4: DNP binary input point 62 Bits 3 - 0: DNP binary input point 63
65013 DNP binary assigned class register 16 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 64 Bits 11 - 8: DNP binary input point 65
Bits 7 - 4: DNP binary input point 66 Bits 3 - 0: DNP binary input point 67
65014 DNP binary assigned class register 17 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 68 Bits 11 - 8: DNP binary input point 69
Bits 7 - 4: DNP binary input point 70 Bits 3 - 0: DNP binary input point 71
65015 DNP binary assigned class register 18 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 72 Bits 11 - 8: DNP binary input point 73
Bits 7 - 4: DNP binary input point 74 Bits 3 - 0: DNP binary input point 75
65016 DNP binary assigned class register 19 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 76 Bits 11 - 8: DNP binary input point 77
Bits 7 - 4: DNP binary input point 78 Bits 3 - 0: DNP binary input point 79
65017 DNP binary assigned class register 20 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 80 Bits 11 - 8: DNP binary input point 81
Bits 7 - 4: DNP binary input point 82 Bits 3 - 0: DNP binary input point 83
65018 DNP binary assigned class register 21 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 84 Bits 11 - 8: DNP binary input point 85
Bits 7 - 4: DNP binary input point 86 Bits 3 - 0: DNP binary input point 87
65019 DNP binary assigned class register 22 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 88 Bits 11 - 8: DNP binary input point 89
Bits 7 - 4: DNP binary input point 90 Bits 3 - 0: DNP binary input point 91
65020 DNP binary assigned class register 23 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 92 Bits 11 - 8: DNP binary input point 93
Bits 7 - 4: DNP binary input point 94 Bits 3 - 0: DNP binary input point 95
65021 DNP binary assigned class register 24 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 96 Bits 11 - 8: DNP binary input point 97
Bits 7 - 4: DNP binary input point 98 Bits 3 - 0: DNP binary input point 99
65022 DNP binary assigned class register 25 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 100 Bits 11 - 8: DNP binary input point 101
Bits 7 - 4: DNP binary input point 102 Bits 3 - 0: DNP binary input point 103
65023 DNP binary assigned class register26 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 104 Bits 11 - 8: DNP binary input point 105
Bits 7 - 4: DNP binary input point 106 Bits 3 - 0: DNP binary input point 107
65024 DNP binary assigned class register27 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 108 Bits 11 - 8: DNP binary input point 109
Bits 7 - 4: DNP binary input point 110 Bits 3 - 0: DNP binary input point 111
65025 DNP binary assigned class register 28 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 112 Bits 11 - 8: DNP binary input point 113
Bits 7 - 4: DNP binary input point 114 Bits 3 - 0: DNP binary input point 115

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REGISTER DEFINITION
65026 DNP binary assigned class register 29 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 116 Bits 11 - 8: DNP binary input point 117
Bits 7 - 4: DNP binary input point 118 Bits 3 - 0: DNP binary input point 119
65027 DNP binary assigned class register 30 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 120 Bits 11 - 8: DNP binary input point 121
Bits 7 - 4: DNP binary input point 122 Bits 3 - 0: DNP binary input point 123
65028 DNP binary assigned class register 31 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 124 Bits 11 - 8: DNP binary input point 125
Bits 7 - 4: DNP binary input point 126 Bits 3 - 0: DNP binary input point 127
65029 DNP binary assigned class register 32 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 128 Bits 11 - 8: DNP binary input point 129
Bits 7 - 4: DNP binary input point 130 Bits 3 - 0: DNP binary input point 131
65030 DNP binary assigned class register 33 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 132 Bits 11 - 8: DNP binary input point 133
Bits 7 - 4: DNP binary input point 134 Bits 3 - 0: DNP binary input point 135
65031 DNP binary assigned class register 34 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 136 Bits 11 - 8: DNP binary input point 137
Bits 7 - 4: DNP binary input point 138 Bits 3 - 0: DNP binary input point 139
65032 DNP binary assigned class register 35 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 140 Bits 11 - 8: DNP binary input point 141
Bits 7 - 4: DNP binary input point 142 Bits 3 - 0: DNP binary input point 143
65033 DNP binary assigned class register 36 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 144 Bits 11 - 8: DNP binary input point 145
Bits 7 - 4: DNP binary input point 146 Bits 3 - 0: DNP binary input point 147
65034 DNP binary assigned class register 37 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 148 Bits 11 - 8: DNP binary input point 149
Bits 7 - 4: DNP binary input point 150 Bits 3 - 0: DNP binary input point 151
65035 DNP binary assigned class register 38 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 152 Bits 11 - 8: DNP binary input point 153
Bits 7 - 4: DNP binary input point 154 Bits 3 - 0: DNP binary input point 155
65036 DNP binary assigned class register 39 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 156 Bits 11 - 8: DNP binary input point 157
Bits 7 - 4: DNP binary input point 158 Bits 3 - 0: DNP binary input point 159
65037 DNP binary assigned class register 40 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 160 Bits 11 - 8: DNP binary input point 161
Bits 7 - 4: DNP binary input point 162 Bits 3 - 0: DNP binary input point 163
65038 DNP binary assigned class register 41 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 164 Bits 11 - 8: DNP binary input point 165
Bits 7 - 4: DNP binary input point 166 Bits 3 - 0: DNP binary input point 167
65039 DNP binary assigned class register 42 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 168 Bits 11 - 8: DNP binary input point 169
Bits 7 - 4: DNP binary input point 170 Bits 3 - 0: DNP binary input point 171
65040 DNP binary assigned class register 43 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 172 Bits 11 - 8: DNP binary input point 173
Bits 7 - 4: DNP binary input point 174 Bits 3 - 0: DNP binary input point 175
65041 DNP binary assigned class register 44 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 176 Bits 11 - 8: DNP binary input point 177
Bits 7 - 4: DNP binary input point 178 Bits 3 - 0: DNP binary input point 179
65042 DNP binary assigned class register 45 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 180 Bits 11 - 8: DNP binary input point 181
Bits 7 - 4: DNP binary input point 182 Bits 3 - 0: DNP binary input point 183
65043 DNP binary assigned class register 46(see table below for bit definitions)
Bits 15 - 12: DNP binary input point 184 Bits 11 - 8: DNP binary input point 185
Bits 7 - 4: DNP binary input point 186 Bits 3 - 0: DNP binary input point 187

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REGISTER DEFINITION
65044 DNP binary assigned class register 47 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 188 Bits 11 - 8: DNP binary input point 189
Bits 7 - 4: DNP binary input point 190 Bits 3 - 0: DNP binary input point 191
65045 DNP binary assigned class register 48 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 192 Bits 11 - 8: DNP binary input point 193
Bits 7 - 4: DNP binary input point 194 Bits 3 - 0: DNP binary input point 195
65046 DNP binary assigned class register 49 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 196 Bits 11 - 8: DNP binary input point 197
Bits 7 - 4: DNP binary input point 198 Bits 3 - 0: DNP binary input point 199
65047 DNP binary assigned class register 50 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 200 Bits 11 - 8: DNP binary input point 201
Bits 7 - 4: DNP binary input point 202 Bits 3 - 0: DNP binary input point 203
65048 DNP binary assigned class register 51 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 204 Bits 11 - 8: DNP binary input point 205
Bits 7 - 4: DNP binary input point 206 Bits 3 - 0: DNP binary input point 207
65049 DNP binary assigned class register 52 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 208 Bits 11 - 8: DNP binary input point 209
Bits 7 - 4: DNP binary input point 210 Bits 3 - 0: DNP binary input point 211
65050 DNP binary assigned class register 53 (see table below for bit definitions)
Bits 15 - 12: DNP binary input point 212 Bits 11 - 8: Spare
Bits 7 - 4: Spare Bits 3 - 0: spare

Table of the bit definitions for above.

BITS 3-0 (OR 15-12, 11-8, 7-4) VALUE DEFINITION


0 (0000), 4(0100) - 15(1111) No Class
1 (0001) Class 1
2 (0010) Class 2
3 (0011) Class 3

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6.1.33 DNP Analog Inputs Assignable Class Settings (PCD Rev. 2.40 and above)

The DNP Assignable Classes feature allows the user to make class assignments to the analog input
points. By default, all analog input points are assigned CLASS 2. If a class 2 event poll is performed all
analog input points that have changed beyond the programmed threshold since the last event poll will
be reported. The class assignment for a given analog input point can be changed to CLASS 1, 3 or NO
CLASS by setting the appropriate value in the associated modbus register.

For example, to change the class assignment of DNP analog input point 6 to CLASS 1, modify register
65126 to set bits 7-4 to 0001(binary).

Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.

REGISTER DEFINITION
65120 Spare
65121 Execute
65122 Password character 1
Password character 2
65123 Password character 3
Password character 4
65124 Spare
65125 DNP analog assigned class register 0 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 0 Bits 11 - 8: DNP analog input point 1
Bits 7 - 4: DNP analog input point 2 Bits 3 - 0: DNP analog input point 3
65126 DNP analog assigned class register 1 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 4 Bits 11 - 8: DNP analog input point 5
Bits 7 - 4: DNP analog input point 6 Bits 3 - 0: DNP analog input point 7
65127 DNP analog assigned class register 2 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 8 Bits 11 - 8: DNP analog input point 9
Bits 7 - 4: DNP analog input point 10 Bits 3 - 0: DNP analog input point 11
65128 DNP analog assigned class register 3 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 12 Bits 11 - 8: DNP analog input point 13
Bits 7 - 4: DNP analog input point 14 Bits 3 - 0: DNP analog input point 15
65129 DNP analog assigned class register 4 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 16 Bits 11 - 8: DNP analog input point 17
Bits 7 - 4: DNP analog input point 18 Bits 3 - 0: DNP analog input point 19
65130 DNP analog assigned class register 5 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 20 Bits 11 - 8: DNP analog input point 21
Bits 7 - 4: DNP analog input point 22 Bits 3 - 0: DNP analog input point 23
65131 DNP analog assigned class register 6 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 24 Bits 11 - 8: DNP analog input point 25
Bits 7 - 4: DNP analog input point 26 Bits 3 - 0: DNP analog input point 27
65132 DNP analog assigned class register 7 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 28 Bits 11 - 8: DNP analog input point 29
Bits 7 - 4: DNP analog input point 30 Bits 3 - 0: DNP analog input point 31
65133 DNP analog assigned class register 8 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 32 Bits 11 - 8: DNP analog input point 33
Bits 7 - 4: DNP analog input point 34 Bits 3 - 0: DNP analog input point 35
65134 DNP analog assigned class register 9 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 36 Bits 11 - 8: DNP analog input point 37
Bits 7 - 4: DNP analog input point 38 Bits 3 - 0: DNP analog input point 39
65135 DNP analog assigned class register 10 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 40 Bits 11 - 8: DNP analog input point 41
Bits 7 - 4: DNP analog input point 42 Bits 3 - 0: DNP analog input point 43

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REGISTER DEFINITION
65136 DNP analog assigned class register 11 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 44 Bits 11 - 8: DNP analog input point 45
Bits 7 - 4: DNP analog input point 46 Bits 3 - 0: DNP analog input point 47
65137 DNP analog assigned class register 12 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 48 Bits 11 - 8: DNP analog input point 49
Bits 7 - 4: DNP analog input point 50 Bits 3 - 0: DNP analog input point 51
65138 DNP analog assigned class register 13 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 52 Bits 11 - 8: DNP analog input point 53
Bits 7 - 4: DNP analog input point 54 Bits 3 - 0: DNP analog input point 55
65139 DNP analog assigned class register 14 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 56 Bits 11 - 8: DNP analog input point 57
Bits 7 - 4: DNP analog input point 58 Bits 3 - 0: DNP analog input point 59
65140 DNP analog assigned class register 15 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 60 Bits 11 - 8: DNP analog input point 61
Bits 7 - 4: DNP analog input point 62 Bits 3 - 0: DNP analog input point 63
65141 DNP analog assigned class register 16 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 64 Bits 11 - 8: DNP analog input point 65
Bits 7 - 4: DNP analog input point 66 Bits 3 - 0: DNP analog input point 67
65142 DNP analog assigned class register 17 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 68 Bits 11 - 8: DNP analog input point 69
Bits 7 - 4: DNP analog input point 70 Bits 3 - 0: DNP analog input point 71
65143 DNP analog assigned class register 18 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 72 Bits 11 - 8: DNP analog input point 73
Bits 7 - 4: DNP analog input point 74 Bits 3 - 0: DNP analog input point 75
65144 DNP analog assigned class register 19 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 76 Bits 11 - 8: DNP analog input point 77
Bits 7 - 4: DNP analog input point 78 Bits 3 - 0: DNP analog input point 79
65145 DNP analog assigned class register 20 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 80 Bits 11 - 8: DNP analog input point 81
Bits 7 - 4: DNP analog input point 82 Bits 3 - 0: DNP analog input point 83
65146 DNP analog assigned class register 21 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 84 Bits 11 - 8: DNP analog input point 85
Bits 7 - 4: DNP analog input point 86 Bits 3 - 0: DNP analog input point 87
65147 DNP analog assigned class register 22 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 88 Bits 11 - 8: DNP analog input point 89
Bits 7 - 4: DNP analog input point 90 Bits 3 - 0: DNP analog input point 91
65148 DNP analog assigned class register 23 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 92 Bits 11 - 8: DNP analog input point 93
Bits 7 - 4: DNP analog input point 94 Bits 3 - 0: DNP analog input point 95
65149 DNP analog assigned class register 24 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 96 Bits 11 - 8: DNP analog input point 97
Bits 7 - 4: DNP analog input point 98 Bits 3 - 0: DNP analog input point 99
65150 DNP analog assigned class register 25 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 100 Bits 11 - 8: DNP analog input point 101
Bits 7 - 4: DNP analog input point 102 Bits 3 - 0: DNP analog input point 103
65151 DNP analog assigned class register 26 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 104 Bits 11 - 8: DNP analog input point 105
Bits 7 - 4: DNP analog input point 106 Bits 3 - 0: DNP analog input point 107
65152 DNP analog assigned class register 27 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 108 Bits 11 - 8: DNP analog input point 109
Bits 7 - 4: DNP analog input point 110 Bits 3 - 0: DNP analog input point 111
65153 DNP analog assigned class register 28 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 112 Bits 11 - 8: DNP analog input point 113
Bits 7 - 4: DNP analog input point 114 Bits 3 - 0: DNP analog input point 115

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REGISTER DEFINITION
65154 DNP analog assigned class register 29 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 116 Bits 11 - 8: DNP analog input point 117
Bits 7 - 4: DNP analog input point 118 Bits 3 - 0: DNP analog input point 119
65155 DNP analog assigned class register 30 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 120 Bits 11 - 8: DNP analog input point 121
Bits 7 - 4: DNP analog input point 122 Bits 3 - 0: DNP analog input point 123
65156 DNP analog assigned class register 31 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 124 Bits 11 - 8: DNP analog input point 125
Bits 7 - 4: DNP analog input point 126 Bits 3 - 0: DNP analog input point 127
65157 DNP analog assigned class register 32 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 128 Bits 11 - 8: DNP analog input point 129
Bits 7 - 4: DNP analog input point 130 Bits 3 - 0: DNP analog input point 131
65158 DNP analog assigned class register 33 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 132 Bits 11 - 8: DNP analog input point 133
Bits 7 - 4: DNP analog input point 134 Bits 3 - 0: DNP analog input point 135
65159 DNP analog assigned class register 34 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 136 Bits 11 - 8: DNP analog input point 137
Bits 7 - 4: DNP analog input point 138 Bits 3 - 0: DNP analog input point 139
65160 DNP analog assigned class register 35 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 140 Bits 11 - 8: DNP analog input point 141
Bits 7 - 4: DNP analog input point 142 Bits 3 - 0: DNP analog input point 143
65161 DNP analog assigned class register 36 (see table below for bit definitions)
Bits 15 - 12: DNP analog input point 144 Bits 11 - 8: DNP analog input point 145
Bits 7 - 4: DNP analog input point 146 Bits 3 - 0: spare

Table of the bit definitions for above.

BITS 3-0 (OR 15-12, 11-8, 7-4) VALUE DEFINITION


0 (0000), 4(0100) - 15(1111) No Class
1 (0001) Class 1
2 (0010) Class 2
3 (0011) Class 3

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6.1.34 DNP Binary Inputs Assignable Point Index Settings

The DNP Assignable Point indexes feature allows the user to reassign the point indexes of binary input
points. By default, the point indexes are as shown in the "DNP3.0 Implementation for the ABB PCD"
document. To change the point index of a given binary input point the appropriate modbus register has
to be modified to the desired value. NOTE: The assigned point index may not exceed the maximum
number of binary input points.

For example, to change the point index of DNP binary input point 6 to 10, modify register 65256 to set
bits 15-8 to 0001010(binary).

Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.

REGISTER DEFINITION
65248 Spare
65249 Execute
65250 Password character 1
Password character 2
65251 Password character 3
Password character 4
65252 Spare
65253 DNP binary assigned point index register 0
Bits 15 - 8: DNP binary input point 0
Bits 7 - 0: DNP binary input point 1
65254 DNP binary assigned point index register 1
Bits 15 - 8: DNP binary input point 2
Bits 7 - 0: DNP binary input point 3
65255 DNP binary assigned point index register 2
Bits 15 - 8: DNP binary input point 4
Bits 7 - 0: DNP binary input point 5
65256 DNP binary assigned point index register 3
Bits 15 - 8: DNP binary input point 6
Bits 7 - 0: DNP binary input point 7
65257 DNP binary assigned point index register 4
Bits 15 - 8: DNP binary input point 8
Bits 7 - 0: DNP binary input point 9
65258 DNP binary assigned point index register 5
Bits 15 - 8: DNP binary input point 10
Bits 7 - 0: DNP binary input point 11
65259 DNP binary assigned point index register 6
Bits 15 - 8: DNP binary input point 12
Bits 7 - 0: DNP binary input point 13
65260 DNP binary assigned point index register 7
Bits 15 - 8: DNP binary input point 14
Bits 7 - 0: DNP binary input point 15
65261 DNP binary assigned point index register 8
Bits 15 - 8: DNP binary input point 16
Bits 7 - 0: DNP binary input point 17
65262 DNP binary assigned point index register 9
Bits 15 - 8: DNP binary input point 18
Bits 7 - 0: DNP binary input point 19
65263 DNP binary assigned point index register 10
Bits 15 - 8: DNP binary input point 20
Bits 7 - 0: DNP binary input point 21

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REGISTER DEFINITION
65264 DNP binary assigned point index register 11
Bits 15 - 8: DNP binary input point 22
Bits 7 - 0: DNP binary input point 23
65265 DNP binary assigned point index register 12
Bits 15 - 8: DNP binary input point 24
Bits 7 - 0: DNP binary input point 25
65266 DNP binary assigned point index register 13
Bits 15 - 8: DNP binary input point 26
Bits 7 - 0: DNP binary input point 27
65267 DNP binary assigned point index register 14
Bits 15 - 8: DNP binary input point 28
Bits 7 - 0: DNP binary input point 29
65268 DNP binary assigned point index register 15
Bits 15 - 8: DNP binary input point 30
Bits 7 - 0: DNP binary input point 31
65269 DNP binary assigned point index register 16
Bits 15 - 8: DNP binary input point 32
Bits 7 - 0: DNP binary input point 33
65270 DNP binary assigned point index register 17
Bits 15 - 8: DNP binary input point 34
Bits 7 - 0: DNP binary input point 35
65271 DNP binary assigned point index register 18
Bits 15 - 8: DNP binary input point 36
Bits 7 - 0: DNP binary input point 37
65272 DNP binary assigned point index register 19
Bits 15 - 8: DNP binary input point 38
Bits 7 - 0: DNP binary input point 39
65273 DNP binary assigned point index register 20
Bits 15 - 8: DNP binary input point 40
Bits 7 - 0: DNP binary input point 41
65274 DNP binary assigned point index register 21
Bits 15 - 8: DNP binary input point 42
Bits 7 - 0: DNP binary input point 43
65275 DNP binary assigned point index register 22
Bits 15 - 8: DNP binary input point 44
Bits 7 - 0: DNP binary input point 45
65276 DNP binary assigned point index register 23
Bits 15 - 8: DNP binary input point 46
Bits 7 - 0: DNP binary input point 47
65277 DNP binary assigned point index register 24
Bits 15 - 8: DNP binary input point 48
Bits 7 - 0: DNP binary input point 49
65278 DNP binary assigned point index register 25
Bits 15 - 8: DNP binary input point 50
Bits 7 - 0: DNP binary input point 51
65279 DNP binary assigned point index register 26
Bits 15 - 8: DNP binary input point 52
Bits 7 - 0: DNP binary input point 53
65280 DNP binary assigned point index register 27
Bits 15 - 8: DNP binary input point 54
Bits 7 - 0: DNP binary input point 55
65281 DNP binary assigned point index register 28
Bits 15 - 8: DNP binary input point 56
Bits 7 - 0: DNP binary input point 57

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REGISTER DEFINITION
65282 DNP binary assigned point index register 29
Bits 15 - 8: DNP binary input point 58
Bits 7 - 0: DNP binary input point 59
65283 DNP binary assigned point index register 30
Bits 15 - 8: DNP binary input point 60
Bits 7 - 0: DNP binary input point 61
65284 DNP binary assigned point index register 31
Bits 15 - 8: DNP binary input point 62
Bits 7 - 0: DNP binary input point 63
65285 DNP binary assigned point index register 32
Bits 15 - 8: DNP binary input point 64
Bits 7 - 0: DNP binary input point 65
65286 DNP binary assigned point index register 33
Bits 15 - 8: DNP binary input point 66
Bits 7 - 0: DNP binary input point 67
65287 DNP binary assigned point index register 34
Bits 15 - 8: DNP binary input point 68
Bits 7 - 0: DNP binary input point 69
65288 DNP binary assigned point index register 35
Bits 15 - 8: DNP binary input point 70
Bits 7 - 0: DNP binary input point 71
65289 DNP binary assigned point index register 36
Bits 15 - 8: DNP binary input point 72
Bits 7 - 0: DNP binary input point 73
65290 DNP binary assigned point index register 37
Bits 15 - 8: DNP binary input point 74
Bits 7 - 0: DNP binary input point 75
65291 DNP binary assigned point index register 38
Bits 15 - 8: DNP binary input point 76
Bits 7 - 0: DNP binary input point 77
65292 DNP binary assigned point index register 39
Bits 15 - 8: DNP binary input point 78
Bits 7 - 0: DNP binary input point 79
65293 DNP binary assigned point index register 40
Bits 15 - 8: DNP binary input point 80
Bits 7 - 0: DNP binary input point 81
65294 DNP binary assigned point index register 41
Bits 15 - 8: DNP binary input point 82
Bits 7 - 0: DNP binary input point 83
65295 DNP binary assigned point index register 42
Bits 15 - 8: DNP binary input point 84
Bits 7 - 0: DNP binary input point 85
65296 DNP binary assigned point index register 43
Bits 15 - 8: DNP binary input point 86
Bits 7 - 0: DNP binary input point 87
65297 DNP binary assigned point index register 44
Bits 15 - 8: DNP binary input point 88
Bits 7 - 0: DNP binary input point 89
65298 DNP binary assigned point index register 45
Bits 15 - 8: DNP binary input point 90
Bits 7 - 0: DNP binary input point 91
65299 DNP binary assigned point index register 46
Bits 15 - 8: DNP binary input point 92
Bits 7 - 0: DNP binary input point 93

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REGISTER DEFINITION
65300 DNP binary assigned point index register 47
Bits 15 - 8: DNP binary input point 94
Bits 7 - 0: DNP binary input point 95
65301 DNP binary assigned point index register 48
Bits 15 - 8: DNP binary input point 96
Bits 7 - 0: DNP binary input point 97
65302 DNP binary assigned point index register 49
Bits 15 - 8: DNP binary input point 98
Bits 7 - 0: DNP binary input point 99
65303 DNP binary assigned point index register 50
Bits 15 - 8: DNP binary input point 100
Bits 7 - 0: DNP binary input point 101
65304 DNP binary assigned point index register 51
Bits 15 - 8: DNP binary input point 102
Bits 7 - 0: DNP binary input point 103
65305 DNP binary assigned point index register 52
Bits 15 - 8: DNP binary input point 104
Bits 7 - 0: DNP binary input point 105
65306 DNP binary assigned point index register 53
Bits 15 - 8: DNP binary input point 106
Bits 7 - 0: DNP binary input point 107
65307 DNP binary assigned point index register 54
Bits 15 - 8: DNP binary input point 108
Bits 7 - 0: DNP binary input point 109
65308 DNP binary assigned point index register 55
Bits 15 - 8: DNP binary input point 110
Bits 7 - 0: DNP binary input point 111
65309 DNP binary assigned point index register 56
Bits 15 - 8: DNP binary input point 112
Bits 7 - 0: DNP binary input point 113
65310 DNP binary assigned point index register 57
Bits 15 - 8: DNP binary input point 114
Bits 7 - 0: DNP binary input point 115
65311 DNP binary assigned point index register 58
Bits 15 - 8: DNP binary input point 116
Bits 7 - 0: DNP binary input point 117
65312 DNP binary assigned point index register 59
Bits 15 - 8: DNP binary input point 118
Bits 7 - 0: DNP binary input point 119
65313 DNP binary assigned point index register 60
Bits 15 - 8: DNP binary input point 120
Bits 7 - 0: DNP binary input point 121
65314 DNP binary assigned point index register 61
Bits 15 - 8: DNP binary input point 122
Bits 7 - 0: DNP binary input point 123
65315 DNP binary assigned point index register 62
Bits 15 - 8: DNP binary input point 124
Bits 7 - 0: DNP binary input point 125
65316 DNP binary assigned point index register 63
Bits 15 - 8: DNP binary input point 126
Bits 7 - 0: DNP binary input point 127
65317 DNP binary assigned point index register 64
Bits 15 - 8: DNP binary input point 128
Bits 7 - 0: DNP binary input point 129

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REGISTER DEFINITION
65318 DNP binary assigned point index register 65
Bits 15 - 8: DNP binary input point 130
Bits 7 - 0: DNP binary input point 131
65319 DNP binary assigned point index register 66
Bits 15 - 8: DNP binary input point 132
Bits 7 - 0: DNP binary input point 133
65320 DNP binary assigned point index register 67
Bits 15 - 8: DNP binary input point 134
Bits 7 - 0: DNP binary input point 135
65321 DNP binary assigned point index register 68
Bits 15 - 8: DNP binary input point 136
Bits 7 - 0: DNP binary input point 137
65322 DNP binary assigned point index register 69
Bits 15 - 8: DNP binary input point 138
Bits 7 - 0: DNP binary input point 139
65323 DNP binary assigned point index register 70
Bits 15 - 8: DNP binary input point 140
Bits 7 - 0: DNP binary input point 141
65324 DNP binary assigned point index register 71
Bits 15 - 8: DNP binary input point 142
Bits 7 - 0: DNP binary input point 143
65325 DNP binary assigned point index register 72
Bits 15 - 8: DNP binary input point 144
Bits 7 - 0: DNP binary input point 145
65326 DNP binary assigned point index register 73
Bits 15 - 8: DNP binary input point 146
Bits 7 - 0: DNP binary input point 147
65327 DNP binary assigned point index register 74
Bits 15 - 8: DNP binary input point 148
Bits 7 - 0: DNP binary input point 149
65328 DNP binary assigned point index register 75
Bits 15 - 8: DNP binary input point 150
Bits 7 - 0: DNP binary input point 151
65329 DNP binary assigned point index register 76
Bits 15 - 8: DNP binary input point 152
Bits 7 - 0: DNP binary input point 153
65330 DNP binary assigned point index register 77
Bits 15 - 8: DNP binary input point 154
Bits 7 - 0: DNP binary input point 155
65331 DNP binary assigned point index register 78
Bits 15 - 8: DNP binary input point 156
Bits 7 - 0: DNP binary input point 157
65332 DNP binary assigned point index register 79
Bits 15 - 8: DNP binary input point 158
Bits 7 - 0: DNP binary input point 159
65333 DNP binary assigned point index register 80
Bits 15 - 8: DNP binary input point 160
Bits 7 - 0: DNP binary input point 161
65334 DNP binary assigned point index register 81
Bits 15 - 8: DNP binary input point 162
Bits 7 - 0: DNP binary input point 163
65335 DNP binary assigned point index register 82
Bits 15 - 8: DNP binary input point 164
Bits 7 - 0: DNP binary input point 165

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REGISTER DEFINITION
65336 DNP binary assigned point index register 83
Bits 15 - 8: DNP binary input point 166
Bits 7 - 0: DNP binary input point 167
65337 DNP binary assigned point index register 84
Bits 15 - 8: DNP binary input point 168
Bits 7 - 0: DNP binary input point 169
65338 DNP binary assigned point index register 85
Bits 15 - 8: DNP binary input point 170
Bits 7 - 0: DNP binary input point 171
65339 DNP binary assigned point index register 86
Bits 15 - 8: DNP binary input point 172
Bits 7 - 0: DNP binary input point 173
65340 DNP binary assigned point index register 87
Bits 15 - 8: DNP binary input point 174
Bits 7 - 0: DNP binary input point 175
65341 DNP binary assigned point index register 88
Bits 15 - 8: DNP binary input point 176
Bits 7 - 0: DNP binary input point 177
65342 DNP binary assigned point index register 89
Bits 15 - 8: DNP binary input point 178
Bits 7 - 0: DNP binary input point 179
65343 DNP binary assigned point index register 90
Bits 15 - 8: DNP binary input point 180
Bits 7 - 0: DNP binary input point 181
65344 DNP binary assigned point index register 91
Bits 15 - 8: DNP binary input point 182
Bits 7 - 0: DNP binary input point 183
65345 DNP binary assigned point index register 92
Bits 15 - 8: DNP binary input point 184
Bits 7 - 0: DNP binary input point 185
65346 DNP binary assigned point index register 93
Bits 15 - 8: DNP binary input point 186
Bits 7 - 0: DNP binary input point 187
65347 DNP binary assigned point index register 94
Bits 15 - 8: DNP binary input point 188
Bits 7 - 0: DNP binary input point 189
65348 DNP binary assigned point index register 95
Bits 15 - 8: DNP binary input point 190
Bits 7 - 0: DNP binary input point 191
65349 DNP binary assigned point index register 96
Bits 15 - 8: DNP binary input point 192
Bits 7 - 0: DNP binary input point 193
65350 DNP binary assigned point index register 97
Bits 15 - 8: DNP binary input point 194
Bits 7 - 0: DNP binary input point 195
65351 DNP binary assigned point index register 98
Bits 15 - 8: DNP binary input point 196
Bits 7 - 0: DNP binary input point 197
65352 DNP binary assigned point index register 99
Bits 15 - 8: DNP binary input point 198
Bits 7 - 0: DNP binary input point 199
65353 DNP binary assigned point index register 100
Bits 15 - 8: DNP binary input point 200
Bits 7 - 0: DNP binary input point 201

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REGISTER DEFINITION
65354 DNP binary assigned point index register 101
Bits 15 - 8: DNP binary input point 202
Bits 7 - 0: DNP binary input point 203
65355 DNP binary assigned point index register 102
Bits 15 - 8: DNP binary input point 204
Bits 7 - 0: DNP binary input point 205
65356 DNP binary assigned point index register 103
Bits 15 - 8: DNP binary input point 206
Bits 7 - 0: DNP binary input point 207
65357 DNP binary assigned point index register 104
Bits 15 - 8: DNP binary input point 208
Bits 7 - 0: DNP binary input point 209
65358 DNP binary assigned point index register 105
Bits 15 - 8: DNP binary input point 210
Bits 7 - 0: DNP binary input point 211
65359 DNP binary assigned point index register 106
Bits 15 - 8: DNP binary input point 212
Bits 7 - 0: Spare

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6.1.35 DNP Analog Inputs Assignable Point Index Settings

The DNP Assignable Point indexes feature allows the user to reassign the point indexes of analog input
points. By default, the point indexes are as shown in the "DNP3.0 Implementation for the ABB PCD"
document. To change the point index of a given analog input point the appropriate modbus register has
to be modified to the desired value. NOTE: The assigned point index may not exceed the maximum
number of analog input points.

For example, to change the point index of DNP analog input point 6 to 10, modify register 65384 to set
bits 15-8 to 00001010(binary).

Refer to the "DNP 3.0 Implementation for the ABB PCD" document for a description of the DNP points
listed below.

REGISTER DEFINITION
65376 Spare
65377 Execute
65378 Password character 1
Password character 2
65379 Password character 3
Password character 4
65380 Spare
65381 DNP analog assigned point index register 0
Bits 15 - 8: DNP analog input point 0
Bits 7 - 0: DNP analog input point 1
65382 DNP analog assigned point index register 1
Bits 15 - 8: DNP analog input point 2
Bits 7 - 0: DNP analog input point 3
65383 DNP analog assigned point index register 2
Bits 15 - 8: DNP analog input point 4
Bits 7 - 0: DNP analog input point 5
65384 DNP analog assigned point index register 3
Bits 15 - 8: DNP analog input point 6
Bits 7 - 0: DNP analog input point 7
65385 DNP analog assigned point index register 4
Bits 15 - 8: DNP analog input point 8
Bits 7 - 0: DNP analog input point 9
65386 DNP analog assigned point index register 5
Bits 15 - 8: DNP analog input point 10
Bits 7 - 0: DNP analog input point 11
65387 DNP analog assigned point index register 6
Bits 15 - 8: DNP analog input point 12
Bits 7 - 0: DNP analog input point 13
65388 DNP analog assigned point index register 7
Bits 15 - 8: DNP analog input point 14
Bits 7 - 0: DNP analog input point 15
65389 DNP analog assigned point index register 8
Bits 15 - 8: DNP analog input point 16
Bits 7 - 0: DNP analog input point 17
65390 DNP analog assigned point index register 9
Bits 15 - 8: DNP analog input point 18
Bits 7 - 0: DNP analog input point 19
65391 DNP analog assigned point index register 10
Bits 15 - 8: DNP analog input point 20
Bits 7 - 0: DNP analog input point 21

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REGISTER DEFINITION
65392 DNP analog assigned point index register 11
Bits 15 - 8: DNP analog input point 22
Bits 7 - 0: DNP analog input point 23
65393 DNP analog assigned point index register 12
Bits 15 - 8: DNP analog input point 24
Bits 7 - 0: DNP analog input point 25
65394 DNP analog assigned point index register 13
Bits 15 - 8: DNP analog input point 26
Bits 7 - 0: DNP analog input point 27
65395 DNP analog assigned point index register 14
Bits 15 - 8: DNP analog input point 28
Bits 7 - 0: DNP analog input point 29
65396 DNP analog assigned point index register 15
Bits 15 - 8: DNP analog input point 30
Bits 7 - 0: DNP analog input point 31
65397 DNP analog assigned point index register 16
Bits 15 - 8: DNP analog input point 32
Bits 7 - 0: DNP analog input point 33
65398 DNP analog assigned point index register 17
Bits 15 - 8: DNP analog input point 34
Bits 7 - 0: DNP analog input point 35
65399 DNP analog assigned point index register 18
Bits 15 - 8: DNP analog input point 36
Bits 7 - 0: DNP analog input point 37
65400 DNP analog assigned point index register 19
Bits 15 - 8: DNP analog input point 38
Bits 7 - 0: DNP analog input point 39
65401 DNP analog assigned point index register 20
Bits 15 - 8: DNP analog input point 40
Bits 7 - 0: DNP analog input point 41
65402 DNP analog assigned point index register 21
Bits 15 - 8: DNP analog input point 42
Bits 7 - 0: DNP analog input point 43
65403 DNP analog assigned point index register 22
Bits 15 - 8: DNP analog input point 44
Bits 7 - 0: DNP analog input point 45
65404 DNP analog assigned point index register 23
Bits 15 - 8: DNP analog input point 46
Bits 7 - 0: DNP analog input point 47
65405 DNP analog assigned point index register 24
Bits 15 - 8: DNP analog input point 48
Bits 7 - 0: DNP analog input point 49
65406 DNP analog assigned point index register 25
Bits 15 - 8: DNP analog input point 50
Bits 7 - 0: DNP analog input point 51
65407 DNP analog assigned point index register 26
Bits 15 - 8: DNP analog input point 52
Bits 7 - 0: DNP analog input point 53
65408 DNP analog assigned point index register 27
Bits 15 - 8: DNP analog input point 54
Bits 7 - 0: DNP analog input point 55
65409 DNP analog assigned point index register 28
Bits 15 - 8: DNP analog input point 56
Bits 7 - 0: DNP analog input point 57

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REGISTER DEFINITION
65410 DNP analog assigned point index register 29
Bits 15 - 8: DNP analog input point 58
Bits 7 - 0: DNP analog input point 59
65411 DNP analog assigned point index register 30
Bits 15 - 8: DNP analog input point 60
Bits 7 - 0: DNP analog input point 61
65412 DNP analog assigned point index register 31
Bits 15 - 8: DNP analog input point 62
Bits 7 - 0: DNP analog input point 63
65413 DNP analog assigned point index register 32
Bits 15 - 8: DNP analog input point 64
Bits 7 - 0: DNP analog input point 65
65414 DNP analog assigned point index register 33
Bits 15 - 8: DNP analog input point 66
Bits 7 - 0: DNP analog input point 67
65415 DNP analog assigned point index register 34
Bits 15 - 8: DNP analog input point 68
Bits 7 - 0: DNP analog input point 69
65416 DNP analog assigned point index register 35
Bits 15 - 8: DNP analog input point 70
Bits 7 - 0: DNP analog input point 71
65417 DNP analog assigned point index register 36
Bits 15 - 8: DNP analog input point 72
Bits 7 - 0: DNP analog input point 73
65418 DNP analog assigned point index register 37
Bits 15 - 8: DNP analog input point 74
Bits 7 - 0: DNP analog input point 75
65419 DNP analog assigned point index register 38
Bits 15 - 8: DNP analog input point 76
Bits 7 - 0: DNP analog input point 77
65420 DNP analog assigned point index register 39
Bits 15 - 8: DNP analog input point 78
Bits 7 - 0: DNP analog input point 79
65421 DNP analog assigned point index register 40
Bits 15 - 8: DNP analog input point 80
Bits 7 - 0: DNP analog input point 81
65422 DNP analog assigned point index register 41
Bits 15 - 8: DNP analog input point 82
Bits 7 - 0: DNP analog input point 83
65423 DNP analog assigned point index register 42
Bits 15 - 8: DNP analog input point 84
Bits 7 - 0: DNP analog input point 85
65424 DNP analog assigned point index register 43
Bits 15 - 8: DNP analog input point 86
Bits 7 - 0: DNP analog input point 87
65425 DNP analog assigned point index register 44
Bits 15 - 8: DNP analog input point 88
Bits 7 - 0: DNP analog input point 89
65426 DNP analog assigned point index register 45
Bits 15 - 8: DNP analog input point 90
Bits 7 - 0: DNP analog input point 91
65427 DNP analog assigned point index register 46
Bits 15 - 8: DNP analog input point 92
Bits 7 - 0: DNP analog input point 93

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REGISTER DEFINITION
65428 DNP analog assigned point index register 47
Bits 15 - 8: DNP analog input point 94
Bits 7 - 0: DNP analog input point 95
65429 DNP analog assigned point index register 48
Bits 15 - 8: DNP analog input point 96
Bits 7 - 0: DNP analog input point 97
65430 DNP analog assigned point index register 49
Bits 15 - 8: DNP analog input point 98
Bits 7 - 0: DNP analog input point 99
65431 DNP analog assigned point index register 50
Bits 15 - 8: DNP analog input point 100
Bits 7 - 0: DNP analog input point 101
65432 DNP analog assigned point index register 51
Bits 15 - 8: DNP analog input point 102
Bits 7 - 0: DNP analog input point 103
65433 DNP analog assigned point index register 52
Bits 15 - 8: DNP analog input point 104
Bits 7 - 0: DNP analog input point 105
65434 DNP analog assigned point index register 53
Bits 15 - 8: DNP analog input point 106
Bits 7 - 0: DNP analog input point 107
65435 DNP analog assigned point index register 54
Bits 15 - 8: DNP analog input point 108
Bits 7 - 0: DNP analog input point 109
65436 DNP analog assigned point index register 55
Bits 15 - 8: DNP analog input point 110
Bits 7 - 0: DNP analog input point 111
65437 DNP analog assigned point index register 56
Bits 15 - 8: DNP analog input point 112
Bits 7 - 0: DNP analog input point 113
65438 DNP analog assigned point index register 57
Bits 15 - 8: DNP analog input point 114
Bits 7 - 0: DNP analog input point 115
65439 DNP analog assigned point index register 58
Bits 15 - 8: DNP analog input point 116
Bits 7 - 0: DNP analog input point 117
65440 DNP analog assigned point index register 59
Bits 15 - 8: DNP analog input point 118
Bits 7 - 0: DNP analog input point 119
65441 DNP analog assigned point index register 60
Bits 15 - 8: DNP analog input point 120
Bits 7 - 0: DNP analog input point 121
65442 DNP analog assigned point index register 61
Bits 15 - 8: DNP analog input point 122
Bits 7 - 0: DNP analog input point 123
65443 DNP analog assigned point index register 62
Bits 15 - 8: DNP analog input point 124
Bits 7 - 0: DNP analog input point 125
65444 DNP analog assigned point index register 63
Bits 15 - 8: DNP analog input point 126
Bits 7 - 0: DNP analog input point 127
65445 DNP analog assigned point index register 64
Bits 15 - 8: DNP analog input point 128
Bits 7 - 0: DNP analog input point 129

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REGISTER DEFINITION
65446 DNP analog assigned point index register 65
Bits 15 - 8: DNP analog input point 130
Bits 7 - 0: DNP analog input point 131
65447 DNP analog assigned point index register 66
Bits 15 - 8: DNP analog input point 132
Bits 7 - 0: DNP analog input point 133
65448 DNP analog assigned point index register 67
Bits 15 - 8: DNP analog input point 134
Bits 7 - 0: DNP analog input point 135
65449 DNP analog assigned point index register 68
Bits 15 - 8: DNP analog input point 136
Bits 7 - 0: DNP analog input point 137
65450 DNP analog assigned point index register 69
Bits 15 - 8: DNP analog input point 138
Bits 7 - 0: DNP analog input point 139
65451 DNP analog assigned point index register 70
Bits 15 - 8: DNP analog input point 140
Bits 7 - 0: DNP analog input point 141
65452 DNP analog assigned point index register 71
Bits 15 - 8: DNP analog input point 142
Bits 7 - 0: DNP analog input point 143
65453 DNP analog assigned point index register 72
Bits 15 - 8: DNP analog input point 144
Bits 7 - 0: DNP analog input point 145
65454 DNP analog assigned point index register 73
Bits 15 - 8: DNP analog input point 146
Bits 7 - 0: spare

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7 CATALOG DEPENDENCIES

7.1 I/O Mapping with Respect To Different Catalog Types

All references in this document have referred to digital input/outputs in a sequential order. However,
the PCD supports I/O through various cards or modules. Since the labeling on each card is generic
and always starts at IN1 and OUT1 some confusion can arise. The solution is to reference a given IO
point in a dual index scheme, i.e., IN2c would indicate input 2 in slot c (or slot 3). Cross referencing
the references given in this document to this scheme is dependent on the IO population of the unit
(catalog based) and is shown in the tables below:

7.1.1 SCD and PCD Catalogued for Three Phase Operation (xxxx-xxxx-xx-x0xx)

IO 000X 001X 002X 003X 004X 005X 101X 102X 103X 104X 105X
Designation (SCD) (SCD)
IN1 In1a In1a In1a In1a In1a In1a In1b In1b In1b In1b In1b
IN2 In2a In2a In2a In2a In2a In2a In2b In2b In2b In2b In2b
IN3 In3a In3a In3a In3a In3a In3a In3b In3b FB30 In1c In1c
IN4 In4a In4a In4a In4a In4a In4a In4b In4b FB29 In2c In2c
IN5 FB28 In1b In1b In1b In1b In1b In5b In5b FB28 In3c FB28
IN6 FB27 In2b In2b In2b In2b In2b In6b In6b FB27 In4c FB27
IN7 FB26 In3b In3b FB26 In1c In1c FB26 In1c FB26 In5c FB26
IN8 FB25 In4b In4b FB25 In2c In2c FB25 In2c FB25 In6c FB25
IN9 FB24 In5b In5b FB24 In3c FB24 FB24 In3c FB24 FB24 FB24
IN10 FB23 In6b In6b FB23 In4c FB23 FB23 In4c FB23 FB23 FB23
IN11 FB22 FB22 In1c FB22 In5c FB22 FB22 In5c FB22 FB22 FB22
IN12 FB21 FB21 In2c FB21 In6c FB21 FB21 In6c FB21 FB21 FB21
IN13 FB20 FB20 In3c FB20 FB20 FB20 FB20 FB20 FB20 FB20 FB20
IN14 FB19 FB19 In4c FB19 FB19 FB19 FB19 FB19 FB19 FB19 FB19
IN15 FB18 FB18 In5c FB18 FB18 FB18 FB18 FB18 FB18 FB18 FB18
IN16 FB17 FB17 In6c FB17 FB17 FB17 FB17 FB17 FB17 FB17 FB17
IN17 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16
. . . . . . . . . . . .
IN32 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1
OUT1 Out1a Out1a Out1a Out1a Out1a Out1a Out1b Out1b Out1b Out1b Out1b
OUT2 Out2a Out2a Out2a Out2a Out2a Out2a Out2b Out2b Out2b Out2b Out2b
OUT3 Out3a Out3a Out3a Out3a Out3a Out3a Out3b Out3b FB30 Out1c Out1c
OUT4 N/A Out1b Out1b Out1b Out1b Out1b Out4b Out4b FB29 Out2c Out2c
OUT5 FB28 Out2b Out2b Out2b Out2b Out2b N/A Out1c FB28 Out3c FB28
OUT6 FB27 Out3b Out3b N/A Out1c Out1c N/A Out2c FB27 Out4c FB27
OUT7 FB26 Out4b Out4b FB26 Out2c Out2c FB26 Out3c FB26 N/A FB26
OUT8 FB25 N/A Out1c FB25 Out3c N/A FB25 Out4c FB25 N/A FB25
OUT9 FB24 N/A Out2c FB24 Out4c FB24 FB24 N/A FB24 FB24 FB24
OUT10 FB23 N/A Out3c FB23 N/A FB23 FB23 N/A FB23 FB23 FB23
OUT11 FB22 FB22 Out4c FB22 N/A FB22 FB22 N/A FB22 FB22 FB22
OUT12 FB21 FB21 N/A FB21 N/A FB21 FB21 N/A FB21 FB21 FB21
OUT13 FB20 FB20 N/A FB20 FB20 FB20 FB20 FB20 FB20 FB20 FB20
OUT14 FB19 FB19 N/A FB19 FB19 FB19 FB19 FB19 FB19 FB19 FB19
OUT15 FB18 FB18 N/A FB18 FB18 FB18 FB18 FB18 FB18 FB18 FB18
OUT16 FB17 FB17 N/A FB17 FB17 FB17 FB17 FB17 FB17 FB17 FB17
OUT17 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16
. . . . . . . . . . . .
OUT32 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1

Note: The Feedback terms shown are system defaults. They can be changed through the Feedback
Allocation mask.

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7.1.2 PCD Catalogued for Single Phase Operation (xxxx-xxxx-x1-x1xx)

IO 000X 001X 002X 003X 004X 101X 102X 103X 104X


Designation
IN1 In1a In1a In1a In1a In1a In1b In1b In1b In1b
IN2 In2a In2a In2a In2a In2a In2b In2b In2b In2b
IN3 In3a In3a In3a In3a In3a In3b In3b In3b In3b
IN4 In4a In4a In4a In4a In4a In4b In4b In4b In4b
IN5 FB28 In1b In1b In1b In1b In5b In5b In5b In5b
IN6 FB27 In2b In2b In2b In2b In6b In6b In6b In6b
IN7 FB26 In3b In3b In3b In3b FB26 In1c In7b In7b
IN8 FB25 In4b In4b In4b In4b FB25 In2c In8b In8b
IN9 FB24 In5b In5b In5b In5b FB24 In3c FB24 In1c
IN10 FB23 In6b In6b In6b In6b FB23 In4c FB23 In2c
IN11 FB22 FB22 In1c In7b In7b FB22 In5c FB22 In3c
IN12 FB21 FB21 In2c In8b In8b FB21 In6c FB21 In4c
IN13 FB20 FB20 In3c FB20 In1c FB20 FB20 FB20 In5c
IN14 FB19 FB19 In4c FB19 In2c FB19 FB19 FB19 In6c
IN15 FB18 FB18 In5c FB18 In3c FB18 FB18 FB18 FB18
IN16 FB17 FB17 In6c FB17 In4c FB17 FB17 FB17 FB17
IN17 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16
. . . . . . . . . .
IN32 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1
OUT1 Out1a Out1a Out1a Out1a Out1a Out1b Out1b Out1b Out1b
OUT2 Out2a Out2a Out2a Out2a Out2a Out2b Out2b Out2b Out2b
OUT3 Out3a Out3a Out3a Out3a Out3a Out3b Out3b Out3b Out3b
OUT4 N/A Out1b Out1b Out1b Out1b Out4b Out4b Out4b Out4b
OUT5 FB28 Out2b Out2b Out2b Out2b N/A Out1c Out5b Out5b
OUT6 FB27 Out3b Out3b Out3b Out3b N/A Out2c Out6b Out6b
OUT7 FB26 Out4b Out4b Out4b Out4b FB26 Out3c Out7b Out7b
OUT8 FB25 N/A Out1c Out5b Out5b FB25 Out4c Out8b Out8b
OUT9 FB24 N/A Out2c Out6b Out6b FB24 N/A FB24 Out1c
OUT10 FB23 N/A Out3c Out7b Out7b FB23 N/A FB23 Out2c
OUT11 FB22 FB22 Out4c Out8b Out8b FB22 N/A FB22 Out3c
OUT12 FB21 FB21 N/A N/A Out1c FB21 N/A FB21 Out4c
OUT13 FB20 FB20 N/A FB20 Out2c FB20 FB20 FB20 N/A
OUT14 FB19 FB19 N/A FB19 Out3c FB19 FB19 FB19 N/A
OUT15 FB18 FB18 N/A FB18 Out4c FB18 FB18 FB18 FB18
OUT16 FB17 FB17 N/A FB17 N/A FB17 FB17 FB17 FB17
OUT17 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16 FB16
. . . . . . . . . .
OUT32 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1 FB1

Note: The Feedback terms shown are system defaults. They can be changed through the Feedback
Allocation mask.

184

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