IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION, VOL. 3, NO.
3, SEPTEMBER 2017
Dynamic Strategy for Efficiency Estimation in a
CCM-Operated Front-End PFC Converter for
Electric Vehicle Onboard Charger
Jiangheng Lu, Student Member, IEEE, Ayan Mallik, Student Member, IEEE,
and Alireza Khaligh, Senior Member, IEEE
Abstract— This paper presents a method for efficiency esti-
mation of boost-derived continuous conduction mode power
factor correction (CCM-PFC) converters for electric vehicle (EV)
onboard chargers. The proposed methodology incorporates con-
verter nonidealities, especially caused by magnetic components.
The value of magnetizing inductance in an inductor or trans-
former core does not remain constant over variable current
levels, which causes nonuniform power losses at different current
levels. The method proposed in this paper considers a time-
variant inductance over various current levels and accordingly
establishes a dynamic model of loss estimation. As a proof-of-
concept verification, the approach is applied to three different
PFC topologies for EV applications and the estimated conversion
efficiencies exhibit good agreement with experimentally obtained
efficiency values over a wide range of load power from 400 W
to 4.6 kW. The deviation of the efficiency predicted from the
experimental data is considerably lower in comparison with the
existing estimation methods with fixed inductance assumption.
Index Terms— CCM PFC, dynamic, electric vehicle, loss
estimation, on-board charger.
I. I NTRODUCTION
T HE interest in designing highly efficient, reliable, and
sustainable grids has driven the need for different power
electronic interfaces in various applications such as grid
integration of renewable systems, battery charging of EVs,
and auxiliary power units in more electric airplanes among
many others [1]. Onboard grid-to-vehicle chargers, typically
consisting of a front-end ac/dc converter and a dc/dc converter,
are used to charge high-voltage traction batteries in plug-in
EVs (PEVs). The front-end ac/dc stage typically comprises
a PFC converter, which is utilized for regulating the out-
put voltage and improving the input power quality. Among
various PFC operating strategies, the continuous conduction
mode (CCM)-operated PFC converters possess several advan-
tages in terms of reduced electromagnetic interference (EMI)
filter weight due to the continuous input grid current, and
enhanced power quality. Furthermore, advancements in the
semiconductor technology have resulted in the development
Manuscript received March 20, 2017; revised May 8, 2017 and
June 16, 2017; accepted July 18, 2017. Date of publication July 24, 2017;
date of current version September 15, 2017. This work was supported by the
National Science Foundation under Grant 1602012. (Corresponding author:
Alireza Khaligh.)
The authors are with the Maryland Power Electronics Laboratory,
Electrical and Computer Engineering Department, Institute for Systems
Research, University of Maryland, College Park, MD 20742 USA (e-mail:
khaligh@ece.umd.edu).
Digital Object Identifier 10.1109/TTE.2017.2731622
2332-7782 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
545
of high-performance power devices and enabled high-power
density solutions through high switching frequency operation.
At high frequency, medium-to-high power applications the
major portion of power losses arises from magnetic cores (PFC
inductors) and the switching transients (i.e., turn-ON and
turn-OFF losses). A reasonably accurate estimate of power
losses in individual components is essential in order to eval-
uate the efficiency of the converter before building up the
prototype.
To evaluate the switching and conduction losses of the
MOSFETs, several studies have been conducted and mod-
els are set up to describe the losses in a rigorous way.
Since the parasitic output capacitance varies with the drain–
source voltage, it is required to estimate instantaneous value
of COSS as a function of VDS in order to accurately get
the parasitic loss. The turn-ON losses of a MOSFET are
strongly influenced by the stored amount of charge in its
output capacitance Coss . Thus, in order to accurately model
the turn-ON losses, the method in [2] and [3] determines the
total charge Q OSS at particular blocking voltages. In addition,
Galvez et al. [4] discusses a detailed power loss estimation
technique for a matrix converter. A loss estimation method
for an isolated three-port dc/dc converter is established in [5],
which meticulously determines the average and root-mean-
square (rms) switch current expressions, considering the non-
idealities. Moreover, an efficiency estimation approach for
semiconductor losses in single-phase multilevel multistate
switching cell-based PFC rectifiers was proposed in [6].
Although the semiconductor losses are computed in a rigorous
way, the detailed loss modeling of magnetic components is
overlooked.
On the other hand, tremendous efforts have been applied
to model and calculate the magnetic core loss using differ-
ent methods with their own limitations [1], [7]–[13]. First,
the work in [7] establishes a model based on material para-
meters (Steinmetz loss coefficients, lamination resistivity, and
copper resistivity), geometry (core area, core length, and core
volume), winding (number of turns), and excitation (input
voltage, switching frequency, duty cycle, current ripple), and
predicts different categories of circuit power losses for a good
estimate of conversion efficiency. However, this method only
considers the high-frequency hysteresis of the current into the
loss calculation and the complexity of the model makes it
challenging to implement in practical scenes. The core-loss
estimation method using the product of the current through an
546 IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION, VOL. 3, NO. 3, SEPTEMBER 2017
excitation winding and induced voltage across a sensing wind-
ing over one switching period with a nonsinusoidal ac input
excitation is proposed in [1] and [8]. In this approach the
magnetic flux density (B) is calculated piecewise depending
on different excitation voltages in multilevel full/half-bridge
topologies. Furthermore, the research work in [9] and [10]
shows that zero applied voltage (constant flux) does not
necessarily imply zero core loss due to relaxation process.
Accordingly, a new core-loss modeling approach is taken
and verified experimentally. However, these methods are not
directly applicable in a PFC-based system, since core loss has
a high dependence on current ripple information.
Second, the work in [11] discusses a modified analytical
method for core losses calculation in magnetic laminations
for wide range of frequencies and flux densities. This method
assumes a known value of magnetic flux density, which varies
with the change in current level in a PFC-based converter.
An overall power loss estimate (including magnetic core loss)
requires an accurate flux density estimation in an excited
inductor core, which is not outlined in [11].
Third, based on Maxwell’s equation and flux density varia-
tion patterns using 2-D finite-element methods, core-loss char-
acteristics of stator permanent-magnet machines are analyzed
and calculated in [12]. In addition, core-loss calculation of
different soft magnetic composite (SMC) materials used in
several electrical circuits is modeled using a 3-D finite-element
analysis and the loss model is validated with experimental
measurements of a SMC motor prototype [13]. In each of the
aforementioned methods, the fundamental assumption of the
loss estimation is to have a correct set of values for magnetic
flux density (B) and magnetizing field strength (H ); how-
ever, accurately determining these parameters require highly
time-complex computations, which makes the implementation
highly challenging.
There are several attempts to estimate the power losses for
the entire PFC converter [14]–[16]. The power loss evaluation
for a PFC unit was presented in [14] using the temperature
measurements of the individual components and surrounding
ambience. The temperature profile of an ac–dc converter unit
at different operating points is reported and accordingly power
loss estimates for each component are obtained using the
mutual correlation between temperature gradient and the tested
power level. In addition, a simplified method to evaluate the
power losses for boost-derived PFC converters is proposed
in [16]. However, none of aforementioned approaches consider
nonlinearity of magnetic components into their modeling.
In practice, most of the core loss calculation methods deal
with fixed inductance method (assuming effective permeability
same as its initial value) and fixed dc bias method [17], which
accounts for the effective permeability at the rms current
level. Neither of these two existing practices considers the
instantaneous variation of permeability with current level,
which would lead to inaccuracies in core-loss estimation. The
variation of permeability will further impact the accuracy of
switching and conduction loss estimation, which will also be
discussed in this paper.
Accounting for these nonidealities and establishing a deter-
ministic expression for overall power loss is the main
contribution of this paper. This paper proposes an approach,
which considers an inductance as a current-varying function
in a CCM-operated PFC converter. The method considers
a triangular variation of the current instead of assuming it
to be constant in a switching cycle. Accordingly, the max-
imum intensity and minimum field intensity (Hmax , Hmin)
are calculated at each switching interval and thus, core-loss
energy is computed. Cumulative addition of the core loss
energy over a line cycle provides the effective core loss.
Furthermore, the proposed method helps estimating the con-
duction and switching losses in every cycle by accurately
determining the rms value of switch current. Also, for the
purpose of verification, the proposed method is applied to
different existing PFC topologies for EV charging applications.
This paper is organized as follows. Section II describes the
approximations and idealities in the aforementioned methods
with fixed inductance assumption for efficiency estimation.
The proposed efficiency estimation method is discussed in
Section III. Section IV presents the validation and results
for verification of the proposed concept by applying it to
three different efficiency data sets. Section V puts forward
conclusions with relevant discussions.
II. A PPROXIMATIONS AND I DEALITIES IN
C ONVENTIONAL E STIMATION M ETHOD
A typical loss breakdown for a PFC converter contains
inductor core loss, inductor copper loss, switching loss,
conduction loss of MOSFETs, and equivalent series resis-
tance (ESR) loss on dc-link capacitors. Other loss sources
such as PCB traces and parasitic resonance among components
and traces are generally negligible if proper design practices
are implemented. To estimate these losses, the high-frequency
current ripple of input current must be estimated first. How-
ever, either assuming an ideally fixed inductance value or fixed
amplitude of high frequency current ripple will not be accurate
as it dismisses three factors which will impact the accuracy of
the calculation:
1) nonlinearity of the inductor as a function of inductor
current level and excitation frequency;
2) high-frequency component in the input current;
3) time-variant nature of duty cycle.
Therefore, the impact of those factors on the loss estimation
should be investigated and clarified.
A. Nonlinearity of Inductors and High-Frequency Component
of Input Current as Loss Factors
As shown in Fig. 1, the input current of a CCM-operated
PFC contains two different components: low-frequency sinu-
soidal and high-frequency triangular components. As shown
in Fig. 1, the high-frequency component in the current has a
time-variant amplitude. This phenomenon is caused by mainly
two reasons: the time-variant duty ratio and input line voltage,
as well as nonlinearity of the inductor. At any instant, the high
frequency inductor current ripple can be calculated by the
following:
D(t)V in (t)
i L (t) = . (1)
Lfs
LU et al.: DYNAMIC STRATEGY FOR EFFICIENCY ESTIMATION 547

can be determined from two current values, i.e., maximum

Fig. 1. High-frequency and low-frequency components of input current
of CCM-PFC.
Assuming the input voltage to be an ideal sinusoidal wave-
form, the duty cycle (D(t)) can be expressed in terms of input
voltage as
√
Vin (t) = 2Vin.rms sin(2π f line t)
√
Vin (t) 2Vin.rms
D(t) = 1 − =1− sin(2π fline t). (3)
Vo Vo
Plugging (2) and (3) into (1), the amplitude of high-
frequency current ripple can be obtained as follows:
√ V2
2Vin.rms sin(2π f line t) − in.rms
Vo (1 − cos(4π f line t))
i L (t) =
L fs
As indicated by (4), the amplitude of high frequency current
ripple contains fundamental and second harmonics. Moreover,
the permeability of the magnetic material will change accord-
ing to the current level flowing through the inductor windings.
This directly results in a time-variant inductance value over
an input line cycle of PFC. Considering this fact, (4) can be
further modified into
√ V2
2Vin.rms sin (2π fline t) − in.rms
Vo (1 − cos(4π f line t))
and minimum current levels over a switching cycle. Due to
the dynamic change in inductance, the ripple is no longer
constant in the same charging duration, which changes the
value of Hmax and Hmin (maximum and minimum H in a
switching cycle) at different switching instants in a single line
cycle. Therefore, H changes over different switching cycles
with the change in current level and the actual core loss will
vary as well. Even though in the existing practical estimation
methods [15]–[17], inductance value is assumed to be con-
stant and the current ripple is represented by its maximum
value for a conservative estimation; however, the nonlinearity
between the inductor current and the magnetic field still exists.
Fortunately, fitting curves provided by manufactures allow us
to calculate the core loss according to the material and the
geometry of the selected cores
B = f (H ) (6)
PL = h(B, f ) (7)
(2) where H = (NI/le ) is the instantaneous magnetic field
strength; le is the mean flux path length; PL is the core-
loss density; B is ac flux swing, which is given by dif-
ference between maximum and minimum flux density levels,
i.e., (Bmax − Bmin ) and f is the frequency of the excitation.
Furthermore, since inductance itself is time dependent due
to the nonlinearity between magnetic field intensity and mag-
. netic flux, the inductance will deviate depending on different
values of inductor current. This feature can be accurately
(4) depicted by the fitting curve provided by the manufactures
4πμ(t)Ae 2 4π Ae N 2
L(t) = N = g[H (t)] (8)
le le
where N denotes the number of turns for the inductor
PCore    √  
N 2I in.rms
= Ae le h f , f line
le
 1 

i L (t) = . 2 f line D(t)Vin (t)le

L(t) f s + 2 f line h f H (t) +
8π Ae f s N 2 g[h(t)]
(5) t =0

Therefore, as indicated by (5), estimating the current ripple
by simply assuming an ideally fixed inductance or fixed
amplitude of current ripple is not accurate. This inaccuracy
in current ripple amplitude will further impact the entire loss
estimation process and thus, results in unreliable prediction of
conversion efficiency.
B. Core Loss, Inductance Change, and High-Frequency
Current Ripple
Traditionally, the field intensity H of a magnetic core in
a power converter is calculated using the inductance value at
the rms current level. The magnetic flux density B and the
effective flux  can be obtained using the empirical relation
between relative permeability (μ) and H . The magnetic core
loss is a function of B, i.e., change in flux density over
a switching cycle, which is again a function of H that
D(t)Vin (t)le
− f H (t) − , f s dt (9)
8π Ae f s N 2 g[h(t)]
PConduction(t)
= n[Iin (t)2 (D(t)R dson.total + Rwire.total)
+ Iin (t)(1 − D(t))V f.total ]. (10)
With the aid of (5)–(8), the core loss can be estimated as a
sum of low-frequency loss and high-frequency loss, as shown
in (9). First term of the expression in (9) represents the low-
frequency loss and the high-frequency loss is calculated by
taking a time average over the energy loss in a line cycle, rep-
resented by the second term. The high-frequency energy loss
is calculated by integrating the power loss density PL given
in (7) over a line cycle, i.e., PL = h((Bmax − Bmin ), f ). In (7),
the maximum and minimum flux density in a switching cycle,
i.e., Bmax and Bmin are obtained by plugging the maximum
and minimum magnetic field intensity within each switching
548 IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION, VOL. 3, NO. 3, SEPTEMBER 2017
Fig. 2. Impact of high-frequency ripple on the accuracy of switching loss
estimation.
cycle (Hmax and Hmin ) into (6), respectively. Hmax and Hmin
are determined by the maximum and minimum current levels
in a switching cycle.
C. Conduction Loss and Time Dependent Duty Cycle
In an n-phase boost-derived PFC (e.g., n = 2 if PFC is
a two-leg interleaved converter), the conduction loss can be
evaluated by (10), where Rdson.total, Rwire.total, and V f.total are
the total channel resistance of MOSFETs, wire resistance of
the inductor, and total voltage drop of diodes, respectively.
As (10) indicates, if rms value of the input current and a
constant duty cycle value Deff associated with this rms input
current are used, the time-variant nature of duty cycle D(t),
and input current Iin (t) will be completely ignored. This will
result in a nonnegligible deviation of the calculation from the
real situation.
D. Switching Loss and ESR Loss
The inaccuracy of switching loss estimation also originates
from the high-frequency component of input current. In exist-
ing practices [15]–[17], the switching loss can be calculated
by the following:
accuracy.
tr + t f 1
PSw = Iin.rms Vo f s + Vg Q g f s + Coss Vo2 f s (11)
2 2
where tr and t f are the rise and fall times of selected MOSFET,
Q g is the total gate charge, Vg is the gate voltage and Coss
is the output capacitance. However, the rms current can only
represent the low-frequency component of the input current,
which neglects the high-frequency components, introducing
significant inaccuracy in measurement, as shown in Fig. 2.
Furthermore, completely neglecting the high-frequency rip-
ple in the current also affects the estimation of loss due to the
ESR of dc link capacitor. The ESR loss can be estimated by
calculating the rms capacitor current within the line cycle.
Due to the charge conservation, the charge introduced by
the capacitor current should be equal to the charge variance
indicated by the dc-link voltage ripple
PCap = (2CVo f line ) ESR.
2
(12)
And the dc link voltage ripple can be calculated by the
following:
Po
Vo = . (13)
2π f line Vo
Fig. 3. Flowchart of proposed dynamic loss estimation strategy.
As indicated by (12), this method completely neglects the
impact of high-frequency current ripple. More accurate switch-
ing and ESR loss expressions are presented in Section III.
III. P ROPOSED DYNAMIC E STIMATION S TRATEGY
To estimate the power losses more accurately, the high
frequency component of input current should not be neglected
and the variation of the inductance over a wide range of
inductor current should also be taken into consideration.
Therefore, a switching cycle-averaged method, estimating the
losses in different individual components is proposed. The
method considers the dynamic of inductance and the high-
frequency current ripple, thus provides a reasonably higher
A. Prediction of Input Current and Estimation of Core Loss
Core loss of PFC inductor contains two parts: high
frequency ripple and low-frequency sinusoidal portion. For
low-frequency sinusoidal part, the estimation is the same as
existing practices [15]–[17], however, in the case of high-
frequency switching components of input currents, instead
of using a constant current ripple amplitude, the real-time
magnetic flux and power loss density considering the impact
from inductance variance should be calculated first. To do this,
the current waveform containing the information of the high-
frequency component should be determined by estimating the
inductor current variation for each switching cycle, as shown
in the following:
Vin (t)D(t)
Iin (t) = . (14)
L(t) f s
The updated inductor current is obtained by adding the
previous cycle value with the change, as shown in the flow-
chart in Fig. 3. Also, it is checked that the current variation
at any two consecutive cycles is limited to the worst case
ripple (ξ ). If not, the duty cycle is manipulated by adding a
LU et al.: DYNAMIC STRATEGY FOR EFFICIENCY ESTIMATION 549

small perturbation to its previous value, which is equivalent Plugging (18) into (17) and equating it to (16), the sufficient
to simulating the feedback loop. This process is repeated and necessary condition for μrms = μ is obtained as the
iteratively until the check condition satisfies. It is noteworthy following:
to mention that this iterative loop to track the input current is
particularly valid for a CCM-operated converter, which is kept bi (t)2  + 2b I i (t)sin(2π f line t)+di (t)4 
as the main focus of this paper. + 4dI 3 i (t)sin(2π f line t) + I i (t)3 sin(2π f line t)
Then, using (9), real-time core loss can be calculated for aI cI 3 dI4
each cycle, and be integrated over the entire line voltage cycle. + 6d I 2 i (t)2 sin(2π f line t) = √ + √ − . (19)
2 2 2 8
One of the fundamental variables in core-loss calculation
is the inductance value, considering instantaneous variation The coefficients a, b, c, and d are the inputs from the
of inductance due to permeability variation over the current core material properties, which in general, can be any value.
level. An empirical relation, established in [17], between Therefore, (19) cannot hold true at any given conditions, which
permeability and current level is given by means the deviation exists between the estimations of core
 loss by assuming μrms and μ, respectively. Moreover, this
μ = 1 + a Iin + b Iin2 + cIin3 + d Iin4 (15)
difference is also verified through experiments and calculation
where the phase current “Iin ” is related to the magnetizing examples in the later sections of this paper.
field intensity as: Iin = le H /N.
In the existing practical methods [15]–[17], μ is assumed
constant at μrms as expressed in (16), which is the permeability B. Capacitor ESR Loss
calculated using (15) √ under the condition of the rms input In a PFC converter, the loss on dc-link capacitor is normally
current, i.e., Iin = (I / 2) assuming Iin (t) = I sin(2π f line t). considerable. ESR of capacitor can be calculated by the
Furthermore, the core loss is proportional to the change in dissipation factor (DF) obtained from datasheet
magnetic flux density, which is again proportional to the μrms
aI bI2 cI 3 dI4 DF
μrms = 1 + √ + + √ + . (16) ESR = (20)
2 4 2π f test C
2 2 2
On the other hand, in the proposed method, the magnetic where f test is the testing frequency.
core loss is a function of time-averaged permeability μ. In an n-phase boost-derived PFC (e.g., n = 2 if PFC is a
Assuming the phase current Iin (t) = I sin(2π f line t) + i (t), two-leg interleaved converter), the average capacitor current
which is the superposition of the line-frequency sinusoidal and over one switching cycle can be calculated by
the high frequency triangular, the time-averaged permeability
can be written into the form of i c (t) = n Iin (t) − Io (21)
     
μ = 1 + aIin  + b Iin2 + c Iin3 + d Iin4 (17) where Iin (t) represent the input current per phase.
With the predicted real-time current waveform, capacitor
where
current containing high-frequency information can be accu-
Iin  = I sin(2π f line t) + i (t) rately obtained and hence, the change of output voltage for
 2 each switching cycle can be estimated as well. Then, ESR loss
I = I 2 sin2 (2π f line t) + i (t)2 +2I i (t)sin(2π f line t)
 in3  can be determined by
Iin = I 3 sin3 (2π f line t) + i (t)3 + 3I 2 i (t)sin(2π f line t)
+ 3I i (t)2 sin(2π f line t) PCap = [4C f line (Vo.max − Vo.min )]2 ESR. (22)
 
4
Iin = I 4 sin4 (2π f line t) + i (t)4 + 4I 3 i (t)sin(2π f line t)
+ 4I i (t)3 sin(2π f line t) + 6I 2 i (t)2 sin(2π f line t). C. Conduction Loss and Switching Loss
Note that over any line cycle, both I sin(2π fline t) and i (t) With the predicted real-time current waveform, accurate
are odd functions, then the averages of different exponents of estimation of conduction loss and switching loss is straightfor-
the phase current can be simplified as shown in the following ward using (10). Based on all the modeling work, the flowchart
equation: of dynamic loss estimation strategy can be summarized as
⎧ shown in Fig. 3. In Fig. 3, D is the change step of the
⎪
⎪ Iin  = 0 duty cycle to simulate the function of the feedback control
⎪
⎪  
⎪
⎪ I2 loop in a CCM-PFC; T is the time step of the calculation,
⎪
⎪ Iin2 = + i (t)2  + 2I i (t)sin(2π f line t)
⎨  2 which is set to be the pulse width modulation switching period.
Iin3 = 0 Moreover, there is a trade-off between calculation accuracy
⎪
⎪
⎪
⎪  4  3I 4 and the computation time by tuning the value of ξ in Fig. 3.
⎪
⎪ Iin = + i (t)4  + 4I 3 i (t)sin(2π f line t)
⎪
⎪ 8 An unreasonably small ξ can result in an undesirably long
⎩
+ I i (t)3 sin(2π fline t) + 6I 2 i (t)2 sin(2π fline t). computation time but ξ must be relatively small to ensure a
(18) good accuracy.
550 IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION, VOL. 3, NO. 3, SEPTEMBER 2017

as magnetic flux and magnetic field intensity, shown in the

following:
μ = μo (1 − 4.445−3 H 1 − 8.763−5 H 2 + 9.446−7 H 3
− 2.616−9 H 5) (26)

1.658−4 + 2.301−5 H + 7.297−5 H 2
B = (27)
1 + 5.906−3 H + 6.053−5 H 2
Fig. 4. Target circuit topologies. (a) Interleaved Boost PFC. (b) Interleaved where H = ((NIin )/le) is the magnetic field intensity, and
Bridgeless PFC.
μo is the initial permeability of the material.
In the case of fixed inductance and fixed dc bias methods,
TABLE I
the inductance can be calculated using (23) and (24), respec-
D ESIGN PARAMETERS AND D EVICE S ELECTIONS
tively. Meanwhile, the proposed dynamic method considers the
time-varying nature of the permeability μ; thus, a cycle-by-
cycle, real-time calculation is implemented.
With the calculated inductance, the ripple current on the
inductors can be calculated based on different estimation
methods. For the fixed inductance and fixed dc bias methods,
the ripple current can be calculated using (28) under the
condition where the ripple current amplitude is at its peak.
In fact, the ripple can be calculated at any instant during the
line cycle depending on how conservative or aggressive the
estimation strategy is. For any given condition, the estimation
of the ripple current will deviate from the realistic case, which
is the inherent weakness for both fixed inductance and fixed
IV. E XPERIMENTAL VALIDATION dc bias methods
⎧  
To verify the performance of the proposed dynamic loss ⎪
⎪ V 1 − Vin.max
⎪
⎨
in.max Vo
estimation strategy, validation has been conducted on two (Vin < 0.5Vo )
different PFC topologies from well-established research works i in = L fs (28)
⎪
⎪
on interleaved boost PFC [20] and interleaved bridgeless ⎪ Vin.max (Vin ≥ 0.5 Vo ).
⎩
PFC [21] converters. The topologies of these two converters 4L fs
are shown in Fig. 4. In fixed inductance and fixed dc bias methods, the dc bias
For the comprehensiveness of the study, three estimation has already been considered in the calculation of the induc-
methods are compared: proposed dynamic method, fixed tance. Therefore, the maximum and minimum magnetic field
inductance method where an ideally constant inductance is intensity can be obtained by
assumed as shown in (23), and fixed dc bias method where the ⎧ Ni in
rms input current is used as a fixed dc magnetic field intensity ⎪
⎨ Hmax =
2le (29)
bias to take the nonideality of the inductor into consideration ⎪
as shown in (24), but not in a real-time fashion ⎩ Hmin = − Ni in .
2le
4πμo Ae 2
L fix = N (23) Consequently, the flux swing defined as B =
le ((Bmax − Bmin )/2) can be found in the aid of (27). The core
   
4πμo Ae 2 N Iin.rms N Iin.rms loss of each inductor can be calculated using the following:
L eff = N g =g L fix . (24)
le le le

As an illustration to the differences among the core-loss
estimation results from the proposed dynamic method and
the other two methods, the topology of interleaved bridgeless
PFC in the well-established literature [21] is used as an exam-
ple. As shown in Table I, the Kool-Mu powder 77071 core is
selected due to its low loss feature. At any given Vin and Pin ,
the input current per phase can be calculated as
√ the cycle-by-cycle, real-time calculation is implemented. The
2Pin
Iin (t) = sin(2π fline t). (25)
2Vin
With the time-variant current flowing through the inductor,
the permeability and the inductance will vary. The datasheet
from the manufacture provides the relation between the perme-
ability and the magnetic field intensity, shown in (26), as well
f s 1.29
PCore = 193 Aele (B) 2.01
. (30)
1000
However, in proposed dynamic method, the time-variant
nature of the inductance leads to the time-variant ripple current
amplitude. Therefore, the power loss density of the core at
different instants during the line cycle varies. To address this
nonideality of the inductor for higher calculation accuracy,
calculation results of this example are summarized in Table II.
The results of validation are presented in Figs. 5 and 6,
respectively. Fig. 5 shows the results on a two-leg interleaved
boost PFC converter at different input voltages and power
levels. Fig. 6 shows the results on an interleaved bridgeless
PFC at different input voltages and load conditions. As can be
LU et al.: DYNAMIC STRATEGY FOR EFFICIENCY ESTIMATION
TABLE II
C ALCULATION R ESULTS
Fig. 5. Comparison of different estimation methods for referenced interleaved
boost PFC.
Fig. 6. Efficiency comparison of different estimation methods for referenced
interleaved bridgeless PFC.
seen from Figs. 5 and 6, the errors in efficiency measurements
by the proposed dynamic method lie in the range of 0% to 1%,
whereas the other two methods, i.e., fixed dc bias method
and fixed inductance method produce the efficiency estimation
error magnitudes in the range of 2%–8%.
There are two contrasting factors in fixed inductance
method.
1) The method uses the inductance value calculated
from (23), which leads to an overall large inductance
over the line cycle and underestimates the core loss.
2) The ripple current amplitude is calculated when it
reaches its peak, as shown in (28).
551
Fig. 7. Experimental prototype of interleaved totem-pole PFC.
This overestimates the core loss. As Figs. 5 and 6 indicate,
the results from the fixed inductance method tend to give
negative deviation. This is due to the dominance of the
overestimating factor over the underestimating one. In the
fixed dc bias method, however, the inductance value is cal-
culated considering the dc bias from rms phase current, which
leads to an overall smaller inductance over the line cycle.
Therefore, the core loss is completely overestimated without
any contrasting factor for the compensation. As a consequence,
higher negative deviations are observed in the results from
fixed dc bias method.
In the proposed dynamic method, however, due to the cycle-
by-cycle calculation, the time-varying feature of all the para-
meters and the nonideality of the inductance are considered.
Thus, the calculation results of this method should be expected
to be more accurate compared to the other two. The random
deviations still happen due to the nonideality of other parts
of the circuit. For instance, even though the impact of the
temperature has already been considered in the calculation
of inductors, diodes, and MOSFETs, several variables like
rise and fall time, Coss , Rds.on of the MOSFETs are not only
temperature dependent, but also dependent on Vds and switch
load current. The computation complexity makes it never
practically desired to consider all aspects of the nonidealities.
Moreover, the validation practice shows a good agreement
between the calculation results from the proposed method and
the experimental measurement.
In order to illustrate the effectiveness of the proposed
estimation method, it is employed in an experiment using an
interleaved totem-pole PFC, shown in Fig. 7.
Thus, the comparison between experimental results and
calculated values for the ripple current and the efficiency
(at Vin = 110 V, P = 1 kW) are demonstrated in Figs. 8 and 9,
respectively.
Furthermore, there are two important aspects to be men-
tioned: first, the ripple current amplitude is not the same as
the one shown in Fig. 8. And second, the calculation results
from fixed inductance method do not necessarily have less
negative deviation than results from fixed dc bias method,
which is the case in Figs. 5 and 6. These two discrepan-
cies arise from the differences in properties of the high-flux
core used in the design of interleaved totem-pole PFC and
Kool-Mu in the topologies discussed in [20] and [21]. For a
better illustration, the variations of permeability with respect to
552 IEEE TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION, VOL. 3, NO. 3, SEPTEMBER 2017
Fig. 8. Comparison of ripple current versus time between calculated and
experimental results.
Fig. 9. Comparison of efficiency between calculated and experimental results.
Fig. 10. Calculated inductance versus magnetic field intensity H .
magnetic field intensity for high-flux and Kool-Mu materials
are shown in Fig. 10.
V. C ONCLUSION
In this paper, a novel efficiency estimation method for
CCM-PFC converters is introduced and analyzed. The anom-
alies between experimentally obtained efficiencies and their
theoretical calculation by the existing practices arise due to
ignoring several converter nonidealities including the inductor
core nonlinearity, which is addressed in this paper. The pro-
posed method exhibits a good agreement with the actual exper-
imental data and error magnitudes of estimated efficiencies are
below 1% for two different PFC topologies (i.e., interleaved
boost and interleaved bridgeless), whereas the estimations
ignoring nonidealities have a higher deviation (2%–8%) from
the actual values. This paper presents the accuracy of this
method for CCM-PFC converters; however, it can be extended
to different converter topologies.
R EFERENCES
[1] A. Mallik, W. Ding, and A. Khaligh, “A comprehensive design approach
to an EMI filter for a 6-kW three-phase boost power factor correction
rectifier in avionics vehicular systems,” IEEE Trans. Veh. Technol.,
vol. 66, no. 4, pp. 2942–2951, Apr. 2017.
[2] Y. Xiong, S. Sun, H. Jia, P. Shea, and Z. J. Shen, “New physical insights
on power MOSFET switching losses,” IEEE Trans. Power Electron.,
vol. 24, no. 2, pp. 525–531, Feb. 2009.
[3] C. L. Shen and Y. S. Shen, “Conversion efficiency estimation for an
interleaved high-step-up converter,” in Proc. Int. Conf. Adv. Mater. Sci.
Eng. (ICAMSE), Tainan, Taiwan, 2016, pp. 661–664.
[4] J. Galvez, X. Perpinya, X. Jorda, M. Vellvehui, and J. Millan, “Semi-
conductor power losses estimation method for matrix converter appli-
cations,” in Proc. IEEE Eur. Conf. Power Electron. Appl., Sep. 2009,
pp. 1–8.
[5] C. Zhao, S. D. Round, and J. W. Kolar, “An isolated three-port bidi-
rectional DC-DC converter with decoupled power flow management,”
IEEE Trans. Power Electron., vol. 23, no. 5, pp. 2443–2453, Sep. 2008.
[6] M. S. Ortmann, S. A. Mussa, and M. L. Heldwein, “Evaluation of
semiconductor losses and efficiency in single-phase multilevel multistate
switching cells based PFC rectifiers,” in Proc. IEEE Southern Power
Electron. Conf., Fortaleza, Brazil, Nov. 2015, pp. 1–5.
[7] A. Shahin, A. Payman, J. P. Martin, S. Pierfederici, and
F. Meibody-Tabar, “Approximate novel loss formulae estimation
for optimization of power controller of DC/DC converter,” in Proc.
36th Annu. Conf. IEEE Ind. Electron. Soc., Glendale, AZ, USA,
Nov. 2010, pp. 373–378.
[8] V. J. Thottuvelil, T. G. Wilson, and H. A. Owen, Jr., “High-frequency
measurement techniques for magnetic cores,” IEEE Trans. Power
Electron., vol. 5, no. 1, pp. 41–53, Jan. 1990.
[9] J. Muhlethaler, J. Biela, J. W. Kolar, and A. Ecklebe, “Improved core-
loss calculation for magnetic components employed in power electronic
systems,” IEEE Trans. Power Electron., vol. 27, no. 2, pp. 964–973,
Feb. 2012.
[10] S. Barg, K. Ammous, M. Hanen, and A. Ammous, “An improved
empirical formulation for magnetic core losses estimation under non-
sinusoidal induction,” IEEE Trans. Power Electron., vol. 32, no. 3,
pp. 2146–2154, Mar. 2017.
[11] A. M. Takbash and P. Pillai, “A modified analytical method for core
losses calculation in magnetic laminations for a wide range of frequency
and flux density,” in Proc. IEEE Electr. Mach. Drives Conf. (IEMDC),
May 2015, pp. 1109–1114.
[12] S. Zhu, M. Cheng, J. Dong, and J. Du, “Core loss analysis and
calculation of stator permanent-magnet machine considering DC-biased
magnetic induction,” IEEE Trans. Ind. Electron., vol. 61, no. 10,
pp. 5203–5212, Oct. 2014.
[13] Y. Guo, J. Zhu, H. Lu, Z. Lin, and Y. Li, “Core loss calculation for soft
magnetic composite electrical machines,” IEEE Trans. Magn., vol. 48,
no. 11, pp. 3112–3115, Nov. 2012.
[14] K. Viswanathan and R. Oruganti, “Evaluation of power losses in a boost
PFC unit by temperature measurements,” IEEE Trans. Ind. Appl., vol. 43,
no. 5, pp. 1320–1328, Oct. 2007.
[15] A. Mallik and A. Khaligh, “Variable-switching-frequency state-feedback
control of a phase-shifted full-bridge DC/DC converter,” IEEE Trans.
Power Electron., vol. 32, no. 8, pp. 6523–6531, Aug. 2017.
[16] F. Musavi, D. S. Gautam, W. Eberle, and W. G. Dunford, “A simplified
power loss calculation method for PFC boost topologies,” in Proc. IEEE
Transp. Electrific. Conf. Expo. (ITEC), Detroit, MI, USA, Jun. 2013,
pp. 1–5.
[17] (2013). Magnetics Powder Core Catalog. [Online]. Available:
https://www.mag-inc.com/Design/Technical-Documents/Powder-Core-
Documents.aspx
[18] A. Mallik and A. Khaligh, “Control of a three-phase boost PFC converter
using a single DC-link voltage sensor,” IEEE Trans. Power Electron.,
vol. 32, no. 8, pp. 6481–6492, Aug. 2017.
[19] C. Shi, H. Wang, and A. Khaligh, “Interleaved SEPIC power factor
preregulator using coupled inductors in discontinuous conduction mode
with wide output voltage,” IEEE Trans. Ind. Appl., vol. 52, no. 4,
pp. 3461–3471, Aug. 2016.
[20] D. S. Gautam, F. Musavi, M. Edington, W. Eberle, and W. G. Dunford,
“An automotive onboard 3.3-kW battery charger for PHEV application,”
IEEE Trans. Veh. Technol., vol. 61, no. 8, pp. 3466–3474, Oct. 2012.
LU et al.: DYNAMIC STRATEGY FOR EFFICIENCY ESTIMATION
[21] F. Musavi, W. Eberle, and W. G. Dunford, “A high-performance
single-phase bridgeless interleaved PFC converter for plug-in hybrid
electric vehicle battery chargers,” IEEE Trans. Ind. Appl., vol. 47, no. 4,
pp. 1833–1843, Jul./Aug. 2011.
Jiangheng Lu (S’16) received the bachelor’s degree
in electrical engineering from the Huazhong Uni-
versity of Science and Technology, Wuhan, China,
in 2014. He is currently pursuing the Ph.D. degree
with the Electrical and Computer Engineering
Department, University of Maryland, College Park,
MD, USA.
He is involved in hardware and control devel-
opment, thermal management, and EMI filter
design. His current research interests include mod-
eling, analysis, design and development of On-bard
Charger and High step-down auxiliary power module for electric vehicles.
Ayan Mallik (S’14) received the B.Tech and
M.Tech degrees (under 5 years Dual Degree Pro-
gram) in electrical engineering from IIT Kharagpur,
Kharagpur, India, in 2014. He is currently pursuing
the Ph.D. degree with the Electrical and Computer
Engineering Department, University of Maryland,
College Park, MD, USA.
His current research interests include design, mod-
elling, and control of power electronic converters,
highly efficient and high-power density solutions
for power conversions in the applications of more-
electric-airplanes, electric vehicles, and data centers.
553
Alireza Khaligh (S’04–M’06–SM’09) is currently
an Associate Professor with the Department of Elec-
trical and Computer Engineering (ECE), the Insti-
tute for Systems Research in the University of
Maryland (UMD), College Park, MD, USA. He has
authored or co-authored over 160 journal and con-
ference papers. His current research interests include
modeling, analysis, design, and control of power
electronic converters for transportation electrifica-
tion, renewable energies, energy harvesting, and
microrobotics.
Dr. Khaligh received various awards and recognitions including the
2017 Outstanding Young Alumnus Award from Illinois Institute of Tech-
nology, the 2016 E. Robert Kent Junior Faculty Teaching Award and the
2016 Junior Faculty Outstanding Research Award from the Clark School of
Engineering, UMD, the 2015 Junior Faculty Fellowship from the Institute for
Systems Research, UMD, the 2013 George Corcoran Memorial Award from
the ECE Department, UMD, three Best Vehicular Electronics Awards from
the IEEE Vehicular Electronics Society, and the 2010 the Ralph R. Teetor
Educational Award from the Society of Automotive Engineers. He is the
Area Editor of “Vehicular Electronics and Systems Area” of the IEEE
T RANSACTIONS ON V EHICULAR T ECHNOLOGY. He is an Associate Editor
of the IEEE T RANSACTIONS ON P OWER E LECTRONICS , the IEEE J OURNAL
OF E MERGING AND S ELECTED T OPICS IN P OWER E LECTRONICS , and the
IEEE T RANSACTIONS ON T RANSPORTATION E LECTRIFICATION. He was the
General Chair of the 2016 IEEE Applied Power Electronic Conference and
Expo, Long Beach, CA, USA, and the 2013 IEEE Transportation Electrifi-
cation Conference and Expo, Dearborn, MI, USA, and the Program Chair of
the 2011 IEEE Vehicle Power and Propulsion Conference, Chicago, IL, USA.
He is a Distinguished Lecturer of the IEEE Vehicular Technology Society and
the IEEE Industry Applications Society.