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A B C D E
1 1
Compal Confidential
m
.co
2 2
Cougar
fix
LA-6855P Schematics Document
se
Intel Pine View Processor/ Tiger point
.ro
2010-10-10
3
w 3
w
REV: 1.0
w
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC A6855
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AD
Date: Wednesday, March 16, 2011 Sheet 1 of 36
A B C D E
A B C D E
Compal Confidential
Model Name : PBU00
File Name : LA-6855P
1
Thermal Sensor Low Power Clock Generator 1
Fan Control EMC1402 ICS9LVRS387AKLFT MLF

page 24
page 7 page 9
CRT Conn.
page 15
Memory BUS(DDRII) 200pin DDRII-SO-DIMM
Intel Pineview-M page 10
LED Conn. LVDS

page 16 ONE CHANNEL (22x22mm) page 6,7,8 1.8V DDRII 667
2
DMI x 2 2
PCIeMini Card
WWAN USB Conn X3 Int. Camera
(FULL)
USB port 6 USB USB USB port 0,1,4 USB port 7
page 16
5V 480MHz 5V 480MHz page 18,21 page 16
PCIeMini Card
PCIe 1x [2]
WLAN +BT COMBO (HALF) 1.5V 2.5GHz(250MB/s)
Tiger Pointer
PCIe port 2 USB
page 16 Card Reader Card Reader Conn.
RTL5137 page 23
PCIe 1x USB port 3 page 23
(17x17mm)
RJ45 RTL8105E 1.5V 2.5GHz(250MB/s) SATA port 0 SATA HDD
page 22
10/100 LAN 5V 1.5GHz(150MB/s)
page 19
PCIe port 3 page 22
page 11,12,13,14
3 3
RTC CKT.
page 13 HD Audio 3.3V 24.576MHz/48Mhz
3.3V 33 MHz
LPC BUS
DC/DC Interface CKT. HDA Codec
ALC269
page 26 page 20
ENE KB926 E0
page 24
Power Circuit DC/DC
Int.
page 27~35 MIC CONN MIC CONN HP CONN SPK CONN
page 20 page 21 page 21 page 21
Touch Pad Int.KBD SPI ROM (10A 1X) (10B 2X)
page 26 page 25 page 25
4
Power/B 4
page 26

SCHEMATIC A6855
D
4019AD
A B C D E
A B C D E
Voltage Rails
1 SIGNAL 1
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 G3
Full ON HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) ON ON ON OFF
B+ AC or battery power rail for power circuit. ON ON ON ON S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
+0.89VS 0.89VS GFX support voltage ON OFF OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+1.05VS VCCP switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8V 1.5V power rail for DDR ON ON OFF OFF
+1.8VS 1.8VS switched power rail ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON OFF
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
BTO Option Table
+3V_WLAN 3.3V power rail for LAN ON ON OFF OFF
2 +3VS 3.3V switched power rail ON ON OFF OFF 2
+5VALW 5V always on power rail ON OFF ON OFF Function Mini PCI-E SLOT CAMERA & MIC BLUE TOOTH Clock gen
+5VS 5V switched power rail ON OFF OFF OFF
+VSB VSB always on power rail ON ON ON OFF
description
+RTCVCC RTC power ON ON ON ON explain Wi-Fi WiMax 3GGPS 3G CAMERA MIC BLUE TOOTH Tpye
BTO WLAN@ WIMAX@ 3GGPS@ 3G@ CAM@ MIC@ BT@ low@ normal@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Function
description
explain
BTO
3 3
EC SM Bus1 address EC SM Bus2 address

Device Address Device Address
Smart Battery 0001 011X b EMC1402 1001 010X b
ICH7M SM Bus address

Device Address
Clock Generator 1101 001Xb

(SLG8SP556VTR)
DDR DIMMA 1010 000Xb
WWAN/WLAN
4 4

SCHEMATIC A6855
Custom D
4019AD
A B C D E
5 4 3 2 1
D D
C C
B B
A
Security Classification Compal Secret Data Compal Electronics, Inc. A
SCHEMATIC A6855
D
4019AD
5 4 3 2 1
5 4 3 2 1
B+ DESIGN CURRENT 250mA Cougar Power Map

Ipeak=6.97A, Imax=4.88A
DESIGN CURRENT 522mA
+3VALWP +-5%
** The SW just is reserved.
The power passes by jump or
UP6182CQAG 0-ohm resistor. WOL_EN#
D ** P-CHANNEL +3V_LAN D
AO3413 DESIGN CURRENT 300mA
Ipeak=3.98A, Imax=2.8A +5VALWP +-5%

SUSP
N-CHANNEL +5VS
SI4800BDY
SUSP
N-CHANNEL DESIGN CURRENT 5586mA
+3VS
C C
SI4800BDY ENVDD
P-CHANNEL +LCD_VDD
AO3413 DESIGN CURRENT 2000mA
SUSP#

+0.89VSP
SY8033BDBC
SUSP#
SY8033BDBC Ipeak=1.308A, Imax=4A +1.05VSP +-5%

VR_ON
B Imax=3.5A DESIGN CURRENT 6000mA +CPU_CORE B
ADP3211AMNR2G
SYSON
Ipeak=19.6A, Imax=13.72A +1.8VP +-5%
G5603RU1U
SUSP#
DESIGN CURRENT 2112mA +1.5VSP
APL5930KAI
SUSP

+0.9VSP
G2992F1U
A A

SCHEMATIC A6855
Custom D
4019AD
5 4 3 2 1
5 4 3 2 1
<10> DDR_A_DQS#[0..7]
PINEVIEW_M
N455@ N475@
U1 U1 <10> DDR_A_D[0..63]
U80610006237AA SLBX9 A0 1.66G AU80610006240AA SLBX5 U1B
REV = 1.1
<10> DDR_A_DM[0..7]
PINEVIEW_M DDR_A_MA0 AH19 AD3 DDR_A_DQS0
U1A <10> DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DDR_A_MA2 AK18 AD4 DDR_A_DM0
<10> DDR_A_MA[0..14] DDR_A_MA3 DDR_A_MA_2 DDR_A_DM_0
REV = 1.1 AK16 DDR_A_MA_3
DMI_RXP0_C F3 G2 DMI_TXP0 <12> DDR_A_MA4 AJ14 AC4 DDR_A_D0
DMI_RXN0_C DMI_RXP_0 DMI_TXP_0 DDR_A_MA5 DDR_A_MA_4 DDR_A_DQ_0 DDR_A_D1
F2 DMI_RXN_0 DMI_TXN_0 G1 DMI_TXN0 <12> AH14 DDR_A_MA_5 DDR_A_DQ_1 AC1
DMI_RXP1_C H4 H3 DMI_TXP1 <12> DDR_A_MA6 AK14 AF4 DDR_A_D2
DMI_RXN1_C DMI_RXP_1 DMI_TXP_1 DDR_A_MA7 DDR_A_MA_6 DDR_A_DQ_2 DDR_A_D3
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TXN1 <12> AJ12 DDR_A_MA_7 DDR_A_DQ_3 AG2
DDR_A_MA8 AH13 AB2 DDR_A_D4
D DMI DDR_A_MA9 DDR_A_MA_8 DDR_A_DQ_4 DDR_A_D5 D
AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
DDR_A_MA10 AK20 AE2 DDR_A_D6
DDR_A_MA11 DDR_A_MA_10 DDR_A_DQ_6 DDR_A_D7
AH12 DDR_A_MA_11 DDR_A_DQ_7 AE3
DDR_A_MA12 AJ11
DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
<9> CLK_CPU_EXP# N7 EXP_CLKINN EXP_RCOMPO L10 AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8
<9> CLK_CPU_EXP N6 L9 DMI_IRCOMP R492 DDR_A_MA14 AJ10 AD7 DDR_A_DQS#1
EXP_CLKINP EXP_ICOMPI R493 49.9_0402_1% DDR_A_MA_14 DDR_A_DQS#_1 DDR_A_DM1
EXP_RBIAS L8 DDR_A_DM_1 AA9
R10 750_0402_1%
EXP_TCLKINN DDR_A_WE# DDR_A_D8
R9 EXP_TCLKINP RSVD_TP N11 T1 <10> DDR_A_WE# AK22 DDR_A_WE# DDR_A_DQ_8 AB6
N10 P11 Pull-down must be placed DDR_A_CAS# AJ22 AB7 DDR_A_D9
RSVD RSVD_TP T2 <10> DDR_A_CAS# DDR_A_CAS# DDR_A_DQ_9
N9 DDR_A_RAS# AK21 AE5 DDR_A_D10
RSVD within 500 mils from Pineview-M <10> DDR_A_RAS# DDR_A_RAS# DDR_A_DQ_10
AG5 DDR_A_D11
DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
<10> DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
DDR_A_BS1 AH20 AB5 DDR_A_D13
<10> DDR_A_BS1 DDR_A_BS_1 DDR_A_DQ_13
K2 K3 DDR_A_BS2 AK11 AB9 DDR_A_D14
RSVD RSVD <10> DDR_A_BS2 DDR_A_BS_2 DDR_A_DQ_14
J1 L2 AD6 DDR_A_D15
RSVD RSVD DDR_A_DQ_15
M4 RSVD RSVD M2
L3 N2 AD8 DDR_A_DQS2
RSVD RSVD DDR_CS0# DDR_A_DQS_2 DDR_A_DQS#2
<10> DDR_CS0# AH22 DDR_A_CS#_0 DDR_A_DQS#_2 AD10
DDR_CS1# AK25 AE8 DDR_A_DM2
1 OF 6 <10> DDR_CS1# DDR_A_CS#_1 DDR_A_DM_2
AJ21
PINEVIEW-M_FCBGA8559 AJ25
DDR_A_CS#_2
AG8 DDR_A_D16
DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
DDR_A_DQ_17 AG7
DDR_CKE0 AH10 AF10 DDR_A_D18
<10> DDR_CKE0 DDR_A_CKE_0 DDR_A_DQ_18
DDR_CKE1 AH9 AG11 DDR_A_D19
<10> DDR_CKE1 DDR_A_CKE_1 DDR_A_DQ_19
SMPWROK AK10 AF7 DDR_A_D20
DDR_A_CKE_2 DDR_A_DQ_20
0.1U_0402_16V4Z
AJ8 AF8 DDR_A_D21
DDR_A_CKE_3 DDR_A_DQ_21 DDR_A_D22
DDR_A_DQ_22 AD11
10K_0402_5%
M_ODT0 AK24 AE10 DDR_A_D23
<10> M_ODT0 DDR_A_ODT_0 DDR_A_DQ_23
<12> DMI_RXP0 C9481 2 DMI_RXP0_C M_ODT1 AH26
<10> M_ODT1 DDR_A_ODT_1
2
0.1U_0402_10V6K 1 AH24 AK5 DDR_A_DQS3
DDR_A_ODT_2 DDR_A_DQS_3
1
@ D DDR_A_DQS#3
AK27 DDR_A_ODT_3 DDR_A_DQS#_3 AK3
C C9491 DMI_RXN0_C SYSON# Q37 DDR_A_DM3 C
<12> DMI_RXN0 2 <27> SYSON# 2 DDR_A_DM_3 AJ3
0.1U_0402_10V6K G
S 2N7002_SOT23 2 DDR_A_D24
AH1
1
DDR_A_DQ_24
R880
C1063
<12> DMI_RXP1 C9501 2 DMI_RXP1_C M_CLK_DDR0 AG15 AJ2 DDR_A_D25
<10> M_CLK_DDR0 DDR_A_CK_0 DDR_A_DQ_25
0.1U_0402_10V6K M_CLK_DDR#0 AF15 AK6 DDR_A_D26
<10> M_CLK_DDR#0 DDR_A_CK_0# DDR_A_DQ_26
@ M_CLK_DDR1 AD13 AJ7 DDR_A_D27
<10> M_CLK_DDR1 DDR_A_CK_1 DDR_A_DQ_27
<12> DMI_RXN1 C9511 2 DMI_RXN1_C @ M_CLK_DDR#1 AC13 AF3 DDR_A_D28
<10> M_CLK_DDR#1 DDR_A_CK_1# DDR_A_DQ_28
0.1U_0402_10V6K AH2 DDR_A_D29
+1.8V DDR_A_DQ_29 DDR_A_D30
DDR_A_DQ_30 AL5
AC15 AJ6 DDR_A_D31
DDR_A_CK_3 DDR_A_DQ_31
AD15 DDR_A_CK_3#
1
Close to CPU AF13 AG22 DDR_A_DQS4
+5VALW R885 DDR_A_CK_4 DDR_A_DQS_4 DDR_A_DQS#4
AG13 DDR_A_CK_4# DDR_A_DQS#_4 AG21
10K_0402_5% Add 1.8V for PWROK AD19 DDR_A_DM4
DDR_A_DM_4
Derek 8/20
1
AE19 DDR_A_D32
3 2
@ R884 DDR_A_DQ_32 DDR_A_D33
AD17 RSVD DDR_A_DQ_33 AG19
1K_0402_5% AC17 AF22 DDR_A_D34
@Q40B
@ Q40B RSVD DDR_A_DQ_34 DDR_A_D35
SM_PWROK 1 2 AB15 RSVD DDR_A_DQ_35 AD22
@ R881 0_0402_5% AB17 AG17 DDR_A_D36
2
RSVD DDR_A_DQ_36 DDR_A_D37
5 AF19
XDP Reserve +1.05VS
DRAMRST#
DDR_A_DQ_37
DDR_A_DQ_38 AE21 DDR_A_D38
6
2N7002DW-T/R7_SOT363-6 AD21 DDR_A_D39
4
@Q40A DDR_A_DQ_39
<7> XDP_TDI XDP_TDI @R495
@ R495 1 2 @ R882 AE26 DDR_A_DQS5
51_0402_5% +1.8V @R878
@ R878 SMPWROK AB4 DDR_A_DQS_5 DDR_A_DQS#5
<13,24> PM_SLP_S4# 1 2 2 DRAM_PWROK DDR_A_DQS#_5 AG27
<7> XDP_TMS XDP_TMS @
@R496
R496 1 2 +1.8V 1 2 AK8 AJ27 DDR_A_DM5
51_0402_5% 0_0402_5% 2N7002DW-T/R7_SOT363-6 DRAM_RST# DDR_A_DM_5
1
1
<7> XDP_TDO XDP_TDO @
@R499
R499 1 2 @ R886 10K_0402_5% AE24 DDR_A_D40
51_0402_5% R500 DDR_A_DQ_40 DDR_A_D41
<24,27,32> SYSON 1 2 DDR_A_DQ_41 AG25
<7> XDP_PREQ# XDP_PREQ#@
@R501
R501 1 2 T3 AB11 AD25 DDR_A_D42
51_0402_5% 0_0402_5% 1K_0402_1% RSVD_TP DDR_A_DQ_42 DDR_A_D43
T4 AB13 RSVD_TP DDR_A_DQ_43 AD24
B DDR_A_D44 B
AC22
2
DDR_VREF DDR_A_DQ_44 DDR_A_D45
AL28 DDR_VREF DDR_A_DQ_45 AG24
DDR_RPD AK28 AD27 DDR_A_D46
DDR_RPD DDR_A_DQ_46
1
<7> XDP_TRST# XDP_TRST#@
@R502
R502 1 2 Reserve PM_SLP_S4# to turn on DRAM_PWROK 1 DDR_RPU AJ26 AE27 DDR_A_D47
51_0402_5% R504 C953 DDR_RPU DDR_A_DQ_47
<7> XDP_TCK XDP_TCK @

@R505
R505 1 2 AK29 AE30 DDR_A_DQS6
51_0402_5% 1K_0402_1% 0.1U_0402_16V4Z RSVD DDR_A_DQS_6 DDR_A_DQS#6
DDR_A_DQS#_6 AF29
2 DDR_A_DM6
AF30
2
DDR_A_DM_6
Change Power rail to 1.8V +1.8V DDR_A AG31 DDR_A_D48
Derek 8/20 DDR_A_DQ_48
AG30 DDR_A_D49
DDR_A_DQ_49 DDR_A_D50
# MP Remove XDP resistor for ESD DDR_A_DQ_50 AD30
AD29 DDR_A_D51
DDR_A_DQ_52 AJ30
AJ29 DDR_A_D53
DDR_A_DQ_54 AE29
R497 DDR_RPU AD28 DDR_A_D55
DDR_A_DQ_55
1
80.6_0402_1% AB27 DDR_A_DQS7
C952 DDR_A_DQS_7 DDR_A_DQS#7
DDR_A_DQS#_7 AA27
0.01U_0402_16V7K R503 DDR_RPD AB26 DDR_A_DM7
+5VALW +1.8V 2 DDR_A_DM_7
80.6_0402_1% AA24 DDR_A_D56
DDR_A_DQ_57 AB25
W24 DDR_A_D58
DDR_A_DQ_59 W22
AB24 DDR_A_D60
DDR_A_DQ_61 AB23
AA23 DDR_A_D62
1 1 1 1 DDR_A_DQ_63 W27
C1050 C1065
C203 C204
A 68P_0402_50V8J 0.1U_0402_16V4Z 68P_0402_50V8J 0.1U_0402_16V4Z A
2 OF 6
2 2 2 2
PINEVIEW-M_FCBGA8559

2010.07.12 RF request
SCHEMATIC A6855
Custom D
4019AD
5 4 3 2 1
5 4 3 2 1
PINEVIEW_M
U1C U1D PINEVIEW_M
T8 D12 XDP_RSVD_00 REV = 1.1 REV = 1.1

T18 A7 M30 U25 E7 H_SMI#
XDP_RSVD_01 CRT_HSYNC GMCH_CRT_HSYNC <15> <16> LCD_TXCLK- LA_CLKN SMI# H_SMI# <11>
T9 D6 M29 U26 H7 H_A20M#
XDP_RSVD_02 CRT_VSYNC GMCH_CRT_VSYNC <15> <16> LCD_TXCLK+ LA_CLKP A20M# H_A20M# <11>
T10 C5 <16> LCD_TXOUT0- R23 H6 H_FERR#
XDP_RSVD_03 LA_DATAN_0 FERR# H_FERR# <11>
T19 C7 <16> LCD_TXOUT0+ R24 F10 H_INTR
XDP_RSVD_04 LA_DATAP_0 LINT0 H_INTR <11>
D T11 C6 N31 GMCH_CRT_R <16> LCD_TXOUT1- N26 F11 H_NMI D
XDP_RSVD_05 CRT_RED GMCH_CRT_R <15> LA_DATAN_1 LINT1 H_NMI <11>
T20 D8 P30 GMCH_CRT_G <16> LCD_TXOUT1+ N27 E5 H_IGNNE#
XDP_RSVD_06 CRT_GREEN GMCH_CRT_G <15> LA_DATAP_1 IGNNE# H_IGNNE# <11>
T12 B7 P29 GMCH_CRT_B <16> LCD_TXOUT2- R26 F8 H_STPCLK#
XDP_RSVD_07 CRT_BLUE GMCH_CRT_B <15> LA_DATAN_2 STPCLK# H_STPCLK# <11>
ICH
T13 A9 XDP_RSVD_08 CRT_IRTN N30 <16> LCD_TXOUT2+ R27 LA_DATAP_2
XDP_RSVD_9 D9
VGA
XDP_RSVD_09 H_DPRSTP#
T14 C8 XDP_RSVD_10 DPRSTP# G6 H_DPRSTP# <13>
T15 B8 R510 be placed <500 mils to U1.P28 R509 L_IBG R22 G10 H_DPSLP#
XDP_RSVD_11 LIBG DPSLP# H_DPSLP# <13>
T44 C10 L31 2.37K_0402_1% J28 G8 H_INIT#
XDP_RSVD_12 CRT_DDC_DATA GMCH_CRT_DATA <15> LVBG INIT# H_INIT# <11>
T17 D10 XDP_RSVD_13 CRT_DDC_CLK L30 GMCH_CRT_CLK <15> R509 be placed U1.R22 N22 LVREFH PRDY# E11 T48
T21 B11 N23 F15 XDP_PREQ#
XDP_RSVD_14 R510 665_0402_1% LVREFL PREQ# XDP_PREQ# <6>
T22 B10 P28 DAC_IREF ENBKL L27
XDP_RSVD_15 DAC_IREF <24> ENBKL LBKLT_EN
LVDS
T23 B12 XDP_RSVD_16 <16> GMCH_INVT_PWM L26 LBKLT_CTL Close to CPU
T24 C11 Y30 CPU_DREFCLK L23 E13 H_THERMTRIP#
XDP_RSVD_17 REFCLKINP CPU_DREFCLK <9> LCTLA_CLK THERMTRIP# H_THERMTRIP# <11>
Y29 CPU_DREFCLK# K25
REFCLKINN CPU_DREFCLK# <9> LCTLB_DATA
AA30 CPU_SSCDREFCLK K23
REFSSCLKINP CPU_SSCDREFCLK <9> <16> LCD_EDID_CLK LDDC_CLK +1.05VS
AA31 CPU_SSCDREFCLK# <16> LCD_EDID_DATA K24 Close to CPU
REFSSCLKINN CPU_SSCDREFCLK# <9> LDDC_DATA
<16> GMCH_ENVDD H26 LVDD_EN
T25 L11 C18 H_PROCHOT# 68_0402_5% R511
RSVD +3VS PROCHOT# H_PWRGD
CPUPWRGOOD W1 H_PWRGD <13>
0_0402_5%
R512
1
K29 PM_EXTTS#1
PM_EXTTS#_1/DPRSLPVR PM_DPRSLPVR <13>
J30 PM_EXTTS#0 R513 A13 H_GTLREF
PM_EXTTS#_0 PM_EXTTS#0 <10> GTLREF
L5 PCH_POK 10K_0402_5% H27
PWROK PCH_POK <13> VSS
AA3 PLTRST#
RSTIN# PLTRST# <13,17,22>
Close to Processor pin
2
PM_EXTTS#0
W8 CLK_CPU_HPLCLK# L6
HPL_CLKINN CLK_CPU_HPLCLK# <9> RSVD
W9 CLK_CPU_HPLCLK E17
HPL_CLKINP CLK_CPU_HPLCLK <9> RSVD
C G11 C
T43 BPM_1_0#
AA7 E15 H10 CLK_CPU_BCLK#
MISC
T26 RSVD_TP T47 BPM_1_1# BCLKN CLK_CPU_BCLK# <9>

T27 AA6 T46 G13 J10 CLK_CPU_BCLK
RSVD_TP BPM_1_2# BCLKP CLK_CPU_BCLK <9>
T28 R5 RSVD_TP T45 F13 BPM_1_3#
T29 R6 K5 CPU_BSEL0
RSVD_TP BSEL_0 CPU_BSEL0 <9>
To be placed <250 mils to U1 ball Close to CPU T30 B18 H5 CPU_BSEL1
BPM_2_0#/RSVD BSEL_1 CPU_BSEL1 <9>
T31 AA21 T32 B20 K6 CPU_BSEL2
RSVD_TP BPM_2_1#/RSVD BSEL_2 CPU_BSEL2 <9>
CPU
T33 W21 RSVD_TP R514 T34 C20 BPM_2_2#/RSVD
T35 T21 GMCH_CRT_R 1 2 T36 B21 H30 CPU_VID0
RSVD_TP BPM_2_3#/RSVD VID_0 CPU_VID0 <35>
T37 V21 150_0402_1% H29 CPU_VID1
RSVD_TP VID_1 CPU_VID1 <35>
GMCH_CRT_G 1 R515 2 Close to CPU H28 CPU_VID2
VID_2 CPU_VID2 <35>
150_0402_1% G30 CPU_VID3
VID_3 CPU_VID3 <35>
GMCH_CRT_B 1 R516 2 T38 G5 G29 CPU_VID4
RSVD VID_4 CPU_VID4 <35>
150_0402_1% XDP_TDI D14 F29 CPU_VID5
<6> XDP_TDI TDI VID_5 CPU_VID5 <35>
ENBKL R517 XDP_TDO D13 E29 CPU_VID6
<6> XDP_TDO TDO VID_6 CPU_VID6 <35>
100K_0402_5% XDP_TCK B14
<6> XDP_TCK TCK
XDP_TMS C14 L7
<6> XDP_TMS TMS RSVD
XDP_TRST# C16 D20
<6> XDP_TRST# TRST# RSVD
To be placed <500 mils to U1 ball RSVD H13
RSVD D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP K9 T39
RSVD_TP D19 T40
RF@C205
RF@C205 K7 H_EXTBGREF
LCD_EDID_CLK 1 EXTBGREF
2
12P_0402_50V8J
RF@C206
RF@ C206
B LCD_EDID_DATA 1 B
2 C30 THRMDA_2/RSVD
D31 THRMDC_2/RSVD
XDP_RSVD_9 12P_0402_50V8J
3 OF 6
4 OF 6
PINEVIEW-M_FCBGA8559 PINEVIEW-M_FCBGA8559
2
R518 placed within 0.5" placed within 0.5" of processor

1K_0402_5% 2010.07.12 RF request H_DPRSTP# C954 1 @2 220P_0402_50V7K of processor pin. pin and 5 mils spacing
1
H_DPSLP# C955 1 @2 220P_0402_50V7K

# PVT C205, C206 change to +1.05VS +1.05VS
12p and stuff for RF H_PWRGD C956 1 @2 220P_0402_50V7K
H_A20M# C957 1 @2 220P_0402_50V7K

R519 R520
+3VS H_IGNNE# C958 1 @2 220P_0402_50V7K 1K_0402_1% 976_0402_1%
CPU THERMAL SENSOR H_INIT# C959 1 2 220P_0402_50V7K
H_GTLREF H_EXTBGREF
H_INTR C960 1 2 220P_0402_50V7K
0.1U_0402_16V4Z
1
2 1
C961 H_FERR# C962 1 @2 220P_0402_50V7K C963 R521 C964 R522
U2 @ 2K_0402_1% 3.3K_0402_1%
2 H_NMI C965 1 @2 220P_0402_50V7K 220P_0402_50V7K 1U_0402_6.3V6K
1 2
1 8 EC_SMB_CK2 EC_SMB_CK2 <24> H_SMI# C966 1 @2 220P_0402_50V7K
VDD SMCLK
A A
H_THERMDA 2 7 EC_SMB_DA2 H_STPCLK# C967 1 @2 220P_0402_50V7K
DP SMDATA EC_SMB_DA2 <24>
C968
1 2 H_THERMDC 3 6 2 1 +3VS ESD request
2200P_0402_50V7K DN ALERT# @ R523 10K_0402_5% # PVT C959, C960 stuff for ESD
CPU_THERM# 4 5
THERM# GND
+3VS 1 2
R524 10K_0402_5% 2010/06/27 2011/6/27 Title
EMC1402-1-ACZL-TR_MSOP8
Issued Date Deciphered Date
Address:0100_1100 EMC1402-1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC A6855
Address:0100_1101 EMC1402-2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B D
4019AD
5 4 3 2 1
5 4 3 2 1
+1.05VS
R525
1 2 +VCCA_VCCD
U1F PINEVIEW_M
0_0805_5%
22U_0805_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
U1E +CPU_CORE A11 REV = 1.1
F24
VSS VSS
PINEVIEW_M 3500mA 1U_0402_6.3V6K 1 2 1 1 1 A16 VSS VSS F28
1U_0402_6.3V6K
C969
C970
C971
C972
C973
VCC A23 A19 VSS VSS F4
VCC A25 A29 RSVD_NCTF VSS G15
+0.89VS REV = 1.1
A27 A3 G17
VCC 1 1 1 1 RSVD_NCTF VSS
1380mA B23 C974 C975 C976 C977 @2 @1 2 2 2
A30 G22
D VCC RSVD_NCTF VSS D
T13 VCCGFX VCC B24 A4 RSVD_NCTF VSS G27
T14 B25 1U_0402_6.3V6K AA13 G31
VCCGFX VCC 2 2 2 2 VSS VSS
T16 VCCGFX VCC B26 AA14 VSS VSS H11
modify C979,C980,C981,C982,C983 T18 VCCGFX VCC B27 AA16 VSS VSS H15
from 1U to 2.2U base on Intel check T19
list VCCGFX VCC C24 1U_0402_6.3V6K AA18 VSS VSS H2
Derek 08/24 V13 VCCGFX VCC C26 +1.05VS AA2 VSS VSS H21
V19 VCCGFX VCC D23 AA22 VSS VSS H25
W14 VCCGFX VCC D24 R526 AA25 VSS VSS H8
W16 D26 Please closed U1 ball 1 2 +RING_EAST AA26 J11
VCCGFX VCC VSS VSS
1U_0402_6.3V6K
W18 D28 0_0603_5% AA29 J13
GFX/MCH
VCCGFX VCC VSS VSS
W19 VCCGFX VCC E22 1 AA8 VSS VSS J15
+1.8V
C978
R527 VCC E24 AB19 VSS VSS J4
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M E27 +CPU_CORE AB21 K11
CPU
2.2U_0402_6.3V6M +VCC_SM VCC VSS VSS
1 2 VCC F21 2 x 330uF(9mohm/2) 2
AB28 VSS VSS K13
VCC F22 AB29 VSS VSS K19
0_1206_5% 2 2 2 2 2 F25 1 1 AB30 K26
VCC VSS VSS
VCC G19 AC10 VSS VSS K27
C979 C980 C981 C982 C983 G21 + C984 + C985 1 R528 2 +RING_WEST AC11 K28
VCC VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
@ G24 AC19 K30
1 1 1 1 1 VCC 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M 0_0603_5% VSS VSS
H17 1 1 AC2 K4
GND
VCC 2 2 VSS VSS
C986
C987
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M H19 AC21 K8
VCC VSS VSS
VCC H22 AC28 VSS VSS L1
VCC H24 AC30 VSS VSS L13
2 2
VCC J17 AD26 VSS VSS L18
+VCC_SM AK13 J19 AD5 L22
VCCSM VCC +CPU_CORE VSS VSS
Please closed U1 ball AK19 VCCSM VCC J21 AE1 VSS VSS L24
Change to +1.8V power rail AK9 VCCSM VCC J22 1 R529 2 +LGI_VID AE11 VSS VSS L25
1U_0402_6.3V6K
Derek 08/24 AL11 VCCSM VCC K15 AE13 VSS VSS L29
AL16 K17 0_0603_5% @ 1 AE15 M28
VCCSM VCC VSS VSS
C988
AL21 VCCSM VCC K21 AE17 VSS VSS M3
+1.8V
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AL25 VCCSM VCC L14 AE22 VSS VSS N1
VCC L16 1 1 1 AE31 VSS VSS N13
2
C989
C990
C991
C 22U_0805_6.3V6M +VCCCK_DDR C
1 2 VCC L19 AF11 VSS VSS N18
VCC L21 AF17 VSS VSS N24
R530 2270mA N14 AF21 N25
0_0603_5% VCC 2 2 2 +VCC_DMI VSS VSS
1 1 VCC N16 1 R531 2 AF24 VSS VSS N28
1U_0402_6.3V6K
1U_0402_6.3V6K
C992 C993 +VCCCK_DDR AK7 N19 AF28 N4
VCCCK_DDR VCC 0_0603_5% VSS VSS
AL7 VCCCK_DDR VCC N21 1 1 AG10 VSS VSS N5
C994
C995
1U_0402_6.3V6K AG3 N8
2 2 VSS VSS
AH18 VSS VSS P13
+VCCA_VCCD U10 AH23 P14
VCCA_DDR 2 2 VSS VSS
DDR
1880mA U5 VCCA_DDR AH28 VSS VSS P16

U6 +CPU_CORE AH4 P18
VCCA_DDR VSS VSS
Please closed U1 ball U7 VCCA_DDR AH6 VSS VSS P19
POWER
U8 VCCA_DDR AH8 VSS VSS P21
1
U9 VCCA_DDR AJ1 RSVD_NCTF VSS P3
V2 R532 AJ16 P4
VCCA_DDR VSS VSS
V3 VCCA_DDR AJ31 RSVD_NCTF VSS R25
V4 100_0402_5% AK1 R7
VCCA_DDR RSVD_NCTF VSS
W10 AK2 R8
2
VCCA_DDR RSVD_NCTF VSS
W11 VCCA_DDR AK23 VSS VSS T11
C29 VCCSENSE AK30 U22
VCCSENSE VCCSENSE <35> +1.8VS RSVD_NCTF VSS
AA10 B29 VSSSENSE AK31 U23
VCCACK_DDR VSSSENSE VSSSENSE <35> RSVD_NCTF VSS
AA11 VCCACK_DDR VCCA Y2 +1.5VS AL13 VSS VSS U24
80mA AL19 VSS VSS U27
1
+1.05VS 1 AL2 RSVD_NCTF VSS V14
420mA R533 1 R534 2 +VCCSFR_AB_DPL AL23 V16
0_0603_5% VSS VSS
D4 C996 AL29 V18
VCCP 100_0402_5% RSVD_NCTF VSS
0.01U_0402_16V7K 1 1 AL3 V28
2 RSVD_NCTF VSS
B4 1 AL30 V29
2
VCCP C999 C997 C998 RSVD_NCTF VSS
VCCP B3 AL9 VSS VSS W13
@ 1U_0402_6.3V6K 1U_0402_6.3V6K B13 W2
0.1U_0402_10V6K 2 2 VSS VSS
AA19 VCCD_AB_DPL
Please closed U1.Y2 B16 VSS VSS W23
2
B19 VSS VSS W25
B B
B22 VSS VSS W26
Please closed U1.D4 +VCCA_VCCD 1 2 B30 W28
C159 22P_0402_50V8J RSVD_NCTF VSS
V11 VCCD_HMPLL 1 R535 2 +VCC_CRT_DAC B31 RSVD_NCTF VSS W30
RF@ 0_0603_5% B5 VSS VSS W4
1 B9 VSS VSS W5
+VCCSFR_AB_DPL AC31 C1 W6
VCCSFR_AB_DPL +VCC_ALVD C1000 RSVD_NCTF VSS
VCCALVDS V30 C12 VSS VSS W7
W31 +VCC_DLVD 1U_0402_6.3V6K C21 Y28
VCCDLVDS 2 VSS VSS
154mA 60mA C22 VSS VSS Y3
+VCCCK_DDR 1 2 C25 Y4
LVDS
+VCC_CRT_DAC C150 22P_0402_50V8J VSS VSS

T30 C31
EXP\CRT\PLL
VCCACRTDAC +DMI_HMPLL RSVD_NCTF

RF@ 1 R536 2 D22 VSS
+3VS 0_0603_5% E1 RSVD_NCTF
5mA 1 E10 VSS
T31 T1 +VCC_DMI E19
+RING_EAST VCC_GIO VCCA_DMI +0.89VS C1001 VSS
J31 VCCRING_EAST VCCA_DMI T2 480mA E21 VSS
+RING_WEST C3 T3 1U_0402_6.3V6K E25 T29
DMI
VCCRING_WEST VCCA_DMI 2 VSS VSS

305mA B2 VCCRING_WEST 1 2 E8 VSS
C2 P2 T41 C153 22P_0402_50V8J F17
+LGI_VID VCCRING_WEST RSVD +DMI_HMPLL VSS
A21 VCC_LGI VCCSFR_DMIHMPLL AA1 RF@ F19 VSS
104mA 1 R537 2 +VCC_ALVD
VCCP E2 +1.05VS 0_0603_5% 6 OF 6
1 PINEVIEW-M_FCBGA8559
+CPU_CORE C1002
5 OF 6 22U_0805_6.3V6M
2
PINEVIEW-M_FCBGA8559 1 2
C156 22P_0402_50V8J
+0.89VS RF@ R538

1 2 +VCC_DLVD
0_0603_5%
1
A A
0.1U_0402_10V6K
C1003
330U_D2_2.5VY_R9M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z
2.2U_0603_10V6K
1U_0402_6.3V6K
1 2010.07.12 RF request 2
C1006
C1007
C1008
C1009
C1010
C1011
C1012
2 1 1 1 1 1 1 1 2 1
C1005
C1013
C1014
C1004
1 2 2 2 2 2 2 2 1 2 2
Close Chipset pin THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC A6855
Custom D
4019AD
5 4 3 2 1
5 4 3 2 1
+3VM_CK505 2010.03.23 Change R81 from bead to 0 ohm

FSC FSB FSA CPU SRC PCI REF DOT_96 USB R81 250 mA CPU_SSCDREFCLK CPU_SSCDREFCLK#
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1 2
1 1 1 1 1 1
0_0603_5% C126 C127 C128 C129 C133
0 0 0 266 100 33.3 14.318 96.0 48.0 C940 @ C941 @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J 33P_0402_50V8K 33P_0402_50V8K
2 2 2 2 2 2
0 0 1 133 100 33.3 14.318 96.0 48.0
+1.05VM_CK505 7/13 For RF request 7/13 Add 33pFfor RF request
R82
0 1 0 200 100 33.3 14.318 96.0 48.0 80 mA 7/21 Reserve 33pFfor RF request
+1.05VS 1 2
FBMH1608HM601-T_0603 1 1 1 1 1 1 +3VS
0 1 1 166 100 33.3 14.318 96.0 48.0 C134 C135 C136 C137 C138 C139 C141
D D
7/13 For RF request 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J
2 2 2 2 2 2 R83 R84
1 0 0 333 100 33.3 14.318 96.0 48.0
2010.03.23 Change R477 from bead to 0 ohm 2.2K_0402_5% 2.2K_0402_5%
1 0 1 100 100 33.3 14.318 96.0 48.0 +1.5VM_CK505
8/27 Delete C93, C94, C95, C102 for low power CLK GEN Q1A
R477 2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0 +1.5VS 1 2 <13> PCH_SMBDATA 6 1 CLK_SMBDATA
10U_0805_10V4Z
0_0603_5% 1
SA00003H610 (ICS :CS9LVRS387AKLFT MLF)
C942
1 1 1 LOW@
Reserved
2
+3VS
Low power CLK Gen.
5
2
7/13 For RF request NORMAL@
7/21 Delete C296, C297 for RF request
U4 7/13 Add 22pF to gnd and close to U3 for RF request CLK_SMBCLK
Normal Power Low Power RTM875N-397-GR
<13> PCH_SMBCLK 3 4
+3VM_CK505 +3VM_CK505 Q1B 2N7002DW-T/R7_SOT363-6
LOW@U4
LOW@ U4
7/21 Reserve 22pF to gnd and close to U3 for RF request
R477 @ Stuff NORMAL@ R478 9 CLK_SMBDATA
+3VM_1.5VM_R SDA CLK_SMBDATA <10,17>
R478 Stuff @ +1.5VM_CK505
1 2 55 VDD_SRC
10 CLK_SMBCLK SRC PORT LIST
0_0603_5% SCL CLK_SMBCLK <10,17>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R479 Stuff @ LOW@ R483
LOW@R483 1 1 1
6 VDD_REF
C943
C944
C945
R480 @ Stuff 1
0_0603_5%
2 12 VDD_PCI CPU_0 71 CLK_CPU_BCLK
CLK_CPU_BCLK <7> PORT DEVICE
CLK_CPU_BCLK#
R483 @ Stuff 2 2 2
72 VDD_CPU CPU_0# 70 CLK_CPU_BCLK# <7>
NORMAL@ R479
1 2 19 68 CLK_CPU_HPLCLK
SRC0 CPU_DREFCLK
+1.05VM_CK505 VDD_48 CPU_1 CLK_CPU_HPLCLK <7>
0_0603_5% 27 67 CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK# <7>
SRC2 CPU_EXP
VDD_PLL3 CPU_1#
LOW@ R480
LOW@R480 +1.05VM_CK505
SRC3
+1.05VS +1.05VM_1.5VM_R CPU_DREFCLK
C +1.5VM_CK505 1 2 66 VDD_CPU_IO SRC_0/DOT_96 24 CPU_DREFCLK <7> SRC4 PCIE_SATA C
47P_0402_50V8J
0.1U_0402_16V4Z
0_0603_5% CPU_DREFCLK#
1 31 VDD_PLL3_IO SRC_0#/DOT_96# 25 CPU_DREFCLK# <7> SRC6 PCIE_WLAN
1
C946
C947
@
R481
470_0402_5%
62 VDD_SRC_IO
28 CPU_SSCDREFCLK
CPU_SSCDREFCLK <7>
SRC7
R482 2 LCDCLK/27M
2.2K_0402_5%
7/13 For RF request 52 VDD_SRC_IO CPU_SSCDREFCLK# SRC8
29 CPU_SSCDREFCLK# <7>
2
FSA 2 LCDCLK#/27M_SS
1 23 VDD_IO SRC9 PCIE_LAN
8/24 Change net name to FSB for U3.2 CLK_CPU_EXP
<7> CPU_BSEL0 1
R86
2 38 VDD_SRC_IO SRC_2 32 CLK_CPU_EXP <6> SRC10 PCIE_PCH
0_0402_5% 7/13 Add 33pF to GND for RF request 10_0402_5% 1 2 R92 CLK_CPU_EXP#
SRC_2# 33 CLK_CPU_EXP# <6> SRC11 PCIE_WWAN
1
<23> CLK_48M_CR
@ R484 7/21 Reserve 33pF to GND for RF request 10_0402_5% 1 2 R91 FSA 20
<12> CLK_PCH_48M USB_0/FS_A
SRC_3 35
1K_0402_5% 8/27 C303, C324, C325, C326, C327 to GND for RF request 1 2 FSB 2
C143 22P_0402_50V8J FS_B/TEST_MODE
36
2
33_0402_5% 1 SRC_3#
2 R93 FSC 7 REF_0/FS_C/TEST_
<13> CLK_PCH_14M
1 2 8 39 CLK_PCIE_SATA
REF_1 SRC_4 CLK_PCIE_SATA <11> +3VS
+3VS R65 1 2 H_STP_CPU# C868 22P_0402_50V8J
10K_0402_5% 40 CLK_PCIE_SATA#
SRC_4# CLK_PCIE_SATA# <11>
VGATE 1
+1.05VS <13,24,35> VGATE CKPWRGD/PD#
7/22 Add R241 pull up to +3VS for RF Intel request 11 57 CLK_PCIE_WLAN WLAN_CLKREQ# R99 2 1 10K_0402_5%
NC SRC_6 CLK_PCIE_WLAN <17>
WWAN_CLKREQ# R100 2 1 10K_0402_5%
1
56 CLK_PCIE_WLAN# LAN_CLKREQ# R101 2 1 10K_0402_5%

SRC_6# CLK_PCIE_WLAN# <17>
R485
470_0402_5% H_STP_CPU# 53
R486 <13> H_STP_CPU# CPU_STOP#
SRC_7 61
1K_0402_5% R427 1 2 @ 0_0402_5% H_STP_PCI#_R 54 CLK_PCIE_PCH 1 2
2
FSB <13> H_STP_PCI# PCI_STOP# @ C1067 56P_0402_50V8

2 1 SRC_7# 60
CLK_PCIE_PCH# 1 2
1 2 CLK_XTAL_IN 5 @ C1066 56P_0402_50V8
<7> CPU_BSEL1 XTAL_IN
B R487 64 B
0_0402_5% CLK_XTAL_OUT SRC_8/CPU_ITP
4 XTAL_OUT
1
R608 1 2 H_STP_PCI#_R 1 2 63
@ R488
+3VS
10K_0402_5% C144 22P_0402_50V8J SRC_8#/CPU_ITP# 2010.07.12 RF request
0_0402_5% 33_0402_5% 1 2 R103 CLK_PCI_DDR_R 13 CLK_PCIE_LAN
<17> CLK_PCI_DDR PCI_1 SRC_9 44 CLK_PCIE_LAN <22>
REQ PORT LIST
2
PCI2_TME 14 45 CLK_PCIE_LAN#
PCI_2 SRC_9# CLK_PCIE_LAN# <22>
1 2
C145 22P_0402_50V8J 15 PCI_3
50 CLK_PCIE_PCH
CLK_PCIE_PCH <12>
PORT DEVICE
+1.05VS 33_0402_5% 1 PCI4_SEL SRC_10
8/14 Add R250 pull up for Intel request <24> CLK_PCI_LPC 2 R107 16 PCI_4/SEL_LCDCL
33_0402_5% 1 2 R108 ITP_EN 17
SRC_10# 51 CLK_PCIE_PCH#
CLK_PCIE_PCH# <12> REQ_3#
<11> CLK_PCI_PCH PCIF_5/ITP_EN
1
R489 7/13 Add 33pF to GND for RF request 1 2 48 CLK_PCIE_WWAN

CLK_PCIE_WWAN <17>
REQ_4#
470_0402_5% C146 22P_0402_50V8J SRC_11
R490 18 47 CLK_PCIE_WWAN#
CLK_PCIE_WWAN# <17>
REQ_6# PEIC_WLAN
10K_0402_5% VSS_PCI SRC_11#
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# REQ_7#
2
FSC 2 1 3 VSS_REF
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# REQ_9# PCIE_LAN
<7> CPU_BSEL2 1 2 22 37
R104 Pin28/29 : LCDCLK / LCDCLK# VSS_48 CLKREQ_3#
0_0402_5% 1 = Pin24/25 : SRC_0 / SRC_0# 26 41
REQ_10#
VSS_IO CLKREQ_4#
1
@ R491 Pin28/29 : 27M/27M_SS 69 58 WLAN_CLKREQ#

WLAN_CLKREQ# <17>
REQ_11# PEIC_WWAN
VSS_CPU CLKREQ_6#
For PCI2_TME:0=Overclocking of CPU and SRC allowed REQ_A#
0_0402_5% 30 65
(ICS only) 1=Overclocking of CPU and SRC NOT allowed VSS_PLL3 CLKREQ_7#
2
34 43 LAN_CLKREQ#
VSS_SRC CLKREQ_9# LAN_CLKREQ# <22>
+3VS 59 49
VSS_SRC SLKREQ_10#
7/22 Add R242 to R253 for Intel request WWAN_CLKREQ#
42 VSS_SRC CLKREQ_11# 46 WWAN_CLKREQ# <17>
2
A A
R112 73 21
CLK_XTAL_IN VSS USB_1/CLKREQ_A#
C147 22P_0402_50V8J 10K_0402_5% 7/21 Change WWAN_CLKREQ# from REQ4 to REQ11
1
ICS9LVRS387AKLFT MLF
1
Y1
14.31818MHZ 20PF 7A14300003 ITP_EN PCI4_SEL PCI2_TME
2
CLK_XTAL_OUT
2
C148 22P_0402_50V8J @
R113 R114 R115 Security Classification Compal Secret Data Compal Electronics, Inc.
Routing the trace at least 10mil Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title
10K_0402_5% 10K_0402_5% 10K_0402_5%
SCHEMATIC A6855
1
2010.03.09 Change Y1 to 5 x3.2 size D
4019AD
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V
<6> DDR_A_DQS#[0..7] JDDR1

+DIMM_VREF 1 VREF VSS 2
+1.8V 3 4 DDR_A_D5
<6> DDR_A_D[0..63] VSS DQ4
DDR_A_D0 5 6 DDR_A_D4
DDR_A_D1 DQ0 DQ5
<6> DDR_A_DM[0..7] 7 DQ1 VSS 8
1
9 10 DDR_A_DM0
R888 DDR_A_DQS#0 VSS DM0
<6> DDR_A_DQS[0..7] Layout Note: 11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6
<6> DDR_A_MA[0..14]
Place near JDDR1 1K_0402_1% 15
DQS0 DQ6
16 DDR_A_D7
DDR_A_D2 VSS DQ7
17 18
2
DDR_A_D3 DQ2 VSS DDR_A_D12
+DIMM_VREF 19 DQ3 DQ12 20
21 22 DDR_A_D13
VSS DQ13
1
D DDR_A_D9 D
23 DQ8 VSS 24
R889 Share +DIMM_VREF for DDR_A_D8 25 26 DDR_A_DM1
DQ9 DM1
27 28
1K_0402_1% 1.DDRII VREF DDR_A_DQS#1 29
VSS VSS
30 M_CLK_DDR0
DQS1# CK0 M_CLK_DDR0 <6>
2.GMCH SM_VREF_0 DDR_A_DQS1 31 32 M_CLK_DDR#0 M_CLK_DDR#0 <6>
2
+1.8V DQS1 CK0#
33 34
SM_VREF_1 DDR_A_D10 35
VSS VSS
36 DDR_A_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15
37 DQ11 DQ15 38
39 VSS VSS 40
+DIMM_VREF
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2 2 2 2 2 20mils
41 VSS VSS 42
C1077
C1078
C1079
C1073
C1074
1 1 45 DQ17 DQ21 46
1 1 1 1 1 C1075 C1076 47 VSS VSS 48
DDR_A_DQS#3 49 50
DQS2# NC PM_EXTTS#0 <7>
0.1U_0402_16V4Z 2.2U_0603_6.3V6K DDR_A_DQS3 51 52 DDR_A_DM3
2 2 DQS2 DM2
53 VSS VSS 54
57 DQ19 DQ23 58
59 VSS VSS 60
220U_B2_2.5VM_R35
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 0.1U_0402_16V4Z +1.8V DDR_A_D16 61 62 DDR_A_D20

1 1 1 1 63 DQ25 DQ29 64
+ 65 66
VSS VSS
C1080
C1081
C1082
C1083
C1084
@ DDR_A_DM2 67 68 DDR_A_DQS#2
DM3 DQS3# DDR_A_DQS2
69 NC DQS3 70
2 2 2 2 2
71 VSS VSS 72
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 1 1 75 DQ27 DQ31 76
77 VSS VSS 78
C1085
C1086
1086
C1087
C1088
C1089
C1090
<6> DDR_CKE0 DDR_CKE0 79 80 DDR_CKE1 DDR_CKE1 <6>
CKE0 NC/CKE1
81 VDD VDD 82
C 2 @C
@ 2 2 2 2 2 C
83 NC NC/A15 84
<6> DDR_A_BS2 DDR_A_BS2 85 86 DDR_A_MA14
BA2 NC/A14
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6
A8 A6
95 VDD VDD 96
Layout Note: DDR_A_MA5 97 98 DDR_A_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2
99 100
Place one cap close to every 2 pullup DDR_A_MA1 101
A3 A2
102 DDR_A_MA0
A1 A0
resistors terminated to +0.9VS 103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_A_BS1 <6>
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
<6> DDR_A_BS0 107 BA0 RAS# 108 DDR_A_RAS# <6>
<6> DDR_A_WE# DDR_A_WE# 109 110 DDR_CS0# DDR_CS0# <6>
WE# S0#
111 VDD VDD 112
<6> DDR_A_CAS# DDR_A_CAS# 113 114 M_ODT0 M_ODT0 <6>
DDR_CS1# CAS# ODT0 DDR_A_MA13
<6> DDR_CS1# 115 NC/S1# NC/A13 116
117 VDD VDD 118
<6> M_ODT1 M_ODT1 119 120
+0.9VS NC/ODT1 NC
121 VSS VSS 122
DDR_A_D33 123 124 DDR_A_D36
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
VSS DQ38
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D39 135 136 DDR_A_D35
DDR_A_D34 DQ34 DQ39
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 137 DQ35 VSS 138
139 140 DDR_A_D44
VSS DQ44
C1091
C1092
C1093
C1094
C1095
C1096
C1097
C1098
C1099
C1100
C1101
C1102
C1103
C1104
C1105
C1106
C1107
C1108
C1109
C1110
DDR_A_D41 141 142 DDR_A_D45
DDR_A_D40 DQ40 DQ45
143 DQ41 VSS 144
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_DQS#5
145 VSS DQS5# 146
B DDR_A_DM5 DDR_A_DQS5 B
147 DM5 DQS5 148
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 M_CLK_DDR1 M_CLK_DDR1 <6>
NC,TEST CK1 M_CLK_DDR#1
165 VSS CK1# 166 M_CLK_DDR#1 <6>
DDR_A_DQS#6 167 168
+0.9VS DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
RP1 RP2 171 172
M_ODT1 DDR_A_BS0 DDR_A_D50 VSS VSS DDR_A_D54
1 8 8 1 173 DQ50 DQ54 174
DDR_CS1# 2 7 7 2 DDR_A_MA10 DDR_A_D51 175 176 DDR_A_D55
DDR_A_CAS# DDR_A_MA1 DQ51 DQ55
3 6 6 3 177 VSS VSS 178
DDR_A_WE# 4 5 5 4 DDR_A_MA3 DDR_A_D56 179 180 DDR_A_D60
181 DQ57 DQ61 182
47_0804_8P4R_5% 47_0804_8P4R_5% Layout Note: 183 184
RP3 RP4 DDR_A_DM7 VSS VSS DDR_A_DQS#7
Place these resistor 185 DM7 DQS7# 186
DDR_A_MA8 1 8 8 1 M_ODT0 187 188 DDR_A_DQS7
DDR_A_MA9 2
closely DIMMA,all VSS DQS7
7 7 2 DDR_A_MA13 DDR_A_D62 189 DQ58 VSS 190
DDR_A_MA12 3 6 6 3 DDR_CS0#
trace length<1000 mil DDR_A_D59 191 192 DDR_A_D58
DDR_A_MA5 4 DQ59 DQ62
5 5 4 DDR_A_RAS# 193 VSS DQ63 194 DDR_A_D63
<9,17> CLK_SMBDATA CLK_SMBDATA 195 196
47_0804_8P4R_5% 47_0804_8P4R_5% CLK_SMBCLK SDA VSS R891 1
<9,17> CLK_SMBCLK 197 SCL SA0 198 2 10K_0402_5%
RP5 RP6 199 200 R892 1 2 10K_0402_5%
+3VS VDDSPD SA1
DDR_A_BS1 1 8 8 1 DDR_A_MA4
DDR_A_MA0 2 7 7 2 DDR_A_MA11 201 202
DDR_A_MA2 G1 G2
3 6 6 3 DDR_A_MA7 1 1
DDR_A_MA6 4 5 5 4 DDR_A_MA14 C1111 C1112
A 47_0804_8P4R_5% 47_0804_8P4R_5%
Modify DDR3 to DDR2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
FOX_AS0A426-N4SN-7F_200P
CONN@ A
Derek 8/19
2 2
DIMMA
Layout Note:
DDR_CKE1 1 R893 2 Place these resistor
47_0402_5%
DDR_A_BS2
closely DIMMA,all
1 R894 2 Security Classification Compal Secret Data Compal Electronics, Inc.
47_0402_5% trace length
DDR_CKE0 1 R895 2 Max=1000 mil Issued Date 2009/04/07 Deciphered Date 2012/10/21 Title
47_0402_5%
SCHEMATIC A6855
Custom D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019AD
5 4 3 2 1
5 4 3 2 1
+3VS
U15A TGP
R539 1 2 8.2K_0402_5% RSVD01
A5 PAR AD0 B22
R540 1 2 8.2K_0402_5% RSVD02 PCI_DEVSEL# B15 D18
CLK_PCI_PCH DEVSEL# AD1
<9> CLK_PCI_PCH J12 PCICLK AD2 C17
PCI_RST# A23 C18
<24> PCI_RST# PCIRST# AD3
PCI_IRDY# B7 B17
+3VS IRDY# AD4
C22 PME# AD5 C19
1
100K_0402_5%
RP7 PCI_SERR# B11 B18 PCI_RST#
PCI_PIRQB# R541 PCI_STOP# SERR# AD6
D 1 8 F14 STOP# AD7 B19 D
2 7 PCI_PIRQF# PCI_PLOCK# A8 D16
PCI_PIRQC# PCI_TRDY# PLOCK# AD8 CLK_PCI_PCH
3 6 A10 TRDY# AD9 D15
PCI_PIRQA# PCI_PERR#
0.1U_0402_16V4Z
4 5 D10 A13
2
PERR# AD10
1
PCI_FRAME# A16 E14 1
8.2K_0804_8P4R_5% FRAME# AD11 R542 @
AD12 H14
C1015
For EC request. L14 @ 10_0402_5%
+3VS AD13
AD14 J14
RP8 2
A18 E10 1
2
PCI_PIRQE# GNT1# AD15 @
1 8 E16 GNT2# AD16 C11
2 7 PCI_PLOCK# E12 C1016
PCI_PIRQG# REQ1# AD17 8.2P_0402_50V8D
3 6 G16 B9
4 5 PCI_IRDY# REQ2# A20
REQ1# PCI AD18
B13
2
REQ2# AD19
AD20 L12
8.2K_0804_8P4R_5% B8
AD21
G14 GPIO48/STRAP1# AD22 A3
+3VS A2 B5
RP16 GPIO22 GPIO17/STRAP2# AD23
C15 GPIO22 AD24 A6
1 8 PCI_SERR# GPIO1 C9 G12
PCI_PERR# GPIO1 AD25
2 7 AD26 H12
3 6 PCI_TRDY# R543 R544 C8 For EMI, close to TigerPoint
GPIO1 10K_0402_5% 10K_0402_5% AD27
4 5 AD28 D9
@ @ PCI_PIRQA# B2 C7
8.2K_0804_8P4R_5% PCI_PIRQB# PIRQA# AD29
D7 PIRQB# AD30 C1
+3VS PCI_PIRQC# B3 B1
RP10 PCI_PIRQD# PIRQC# AD31
H10 PIRQD#
1 8 GPIO22 PCI_PIRQE# E8
PCI_DEVSEL# PCI_PIRQF# PIRQE#/GPIO2
2 7 D6 PIRQF#/GPIO3
3 6 PCI_PIRQD# PCI_PIRQG# H8 H16
C PCI_PIRQH# PCI_PIRQH# PIRQG#/GPIO4 C/BE0# C
4 5 F8 PIRQH#/GPIO5 C/BE1# M15
C/BE2# C13
8.2K_0804_8P4R_5% D11 L16
RSVD01 STRAP0# C/BE3#
K9 RSVD01
RSVD02 M13 RSVD02
+3VS 2 1
RP11 R545
1 8 REQ2# @ 1K_0402_5% +1.05VS
TIGERPOINT_ES1_BGA360
2 7 REQ1#
PCI_STOP# U15C TGP
3 6
1
4 5 PCI_FRAME#
R12 AE6 SATA_IRX_C_DTX_N0 <19> R546
8.2K_0804_8P4R_5% RSVD03 SATA0RXN 56_0402_5%
AE20 RSVD04 SATA0RXP AD6 SATA_IRX_C_DTX_P0 <19>
AD17 RSVD05 SATA0TXN AC7 SATA_ITX_DRX_N0 <19>
AC15 RSVD06 SATA0TXP AD7 SATA_ITX_DRX_P0 <19>
AD18 AE8 T63 PAD H_FERR#
RSVD07 SATA1RXN
Y12 RSVD08 SATA1RXP AD8 T64 PAD
AA10 RSVD09 SATA1TXN AD9 T65 PAD R111 closed TigerPoint within 1"
AA12 RSVD10 SATA1TXP AC9 T66 PAD
Y10 RSVD11
AD15 RSVD12
SATA
W10 RSVD13
V12 RSVD14
AE21 RSVD15
AE18 RSVD16
AD19 RSVD17
U12 RSVD18
SATA_CLKN AD4 CLK_PCIE_SATA# <9> Please closed Tiger point
AC17 AC4 CLK_PCIE_SATA <9> +3VS
B
AB13
RSVD19 SATA_CLKP PIN within 500 mils B
RSVD20
AC13 RSVD21 SATARBIAS# AD11 SATARBIAS R547 24.9_0402_1%
AB15 RSVD22 SATARBIAS AC11 R548
Y14 RSVD23 SATALED# AD25 SATALED# <26>
SATALED#
AB16 RSVD24 10K_0402_5%
AE24 RSVD25
AE23 R549
RSVD26 GATEA20
10K_0402_5%
AA14 U16 GATEA20 GATEA20 <24> R550
RSVD27 A20GATE H_A20M# SERIRQ
V14 RSVD28 A20M# Y20 H_A20M# <7> 1 2
CPUSLP# Y21
Y18 H_IGNNE# 8.2K_0402_5%
IGNNE# H_IGNNE# <7>
AD16 AD21 +1.05VS
RSVD29 INIT3_3V# H_INIT#
AB11 RSVD30 INIT# AC25 H_INIT# <7>
+3VS AB10 AB24 H_INTR
RSVD31 INTR H_INTR <7>
HOST
1
R551 Y22 H_FERR#
FERR# H_FERR# <7>
1 2 AD23 T17 H_NMI R552 R110 to be within 1" from the Tiger
GPIO36 NMI H_NMI <7>
AC21 EC_KBRST# EC_KBRST# <24>
8.2K_0402_5% RCIN#
AA16 SERIRQ SERIRQ <24> 56_0402_5% Point chipset.
SERIRQ H_SMI#
SMI# AA21 H_SMI# <7>
2
V18 H_STPCLK#
STPCLK# H_STPCLK# <7>
THRMTRIP# AA20 H_THERMTRIP# <7>
3
A A

SCHEMATIC A6855
D
4019AD
5 4 3 2 1
5 4 3 2 1
D D
USB PORT LIST
PORT #EVT DEVICE

TGP
U15B
USB0 USB1(Left)
<6> DMI_TXN0 R23
R24
DMI0RXN USBP0N H7
H6
USB20_N0
USB20_P0
USB20_N0 <18> USB1(Right) USB1 USB2(Left)
<6> DMI_TXP0 DMI0RXP USBP0P USB20_P0 <18>
<6> DMI_RXN0 P21
P20
DMI0TXN USBP1N H3
H2
USB20_N1
USB20_P1
USB20_N1 <18> USB2(Right) USB2 NC
<6> DMI_RXP0 DMI0TXP USBP1P USB20_P1 <18>
<6> DMI_TXN1 T21
T20
DMI1RXN USBP2N J2
J3
T49 PAD USB3 Card-reader
<6> DMI_TXP1 DMI1RXP USBP2P T50 PAD
<6> DMI_RXN1 T24
T25
DMI1TXN USBP3N K6
K5
USB20_N3 <23> Card-reader USB4 USB3(Right)
<6> DMI_RXP1 DMI1TXP USBP3P USB20_P3 <23>
DMI
PAD T51 T19 DMI2RXN USBP4N K1 USB20_N4
USB20_P4
USB20_N4 <18> USB5 WWAN
PAD T52 T18 DMI2RXP USBP4P K2
USB20_N5_L
USB20_P4 <18> USB3(Left) USB6
PAD T53 U23
U24
DMI2TXN USBP5N L2
L3 USB20_P5_L WLAN + BT
PAD T54 DMI2TXP USBP5P USB20_N6 WWAN USB7
PAD T55 V21
V20
DMI3RXN USBP6N M6
M5 USB20_P6
USB20_N6 <17> CMOS
PAD
PAD
T56
T57 V24
DMI3RXP USBP6P
N1 USB20_N7
USB20_P6 <17> WLAN + BT (Combo) #6/27 EVT
DMI3TXN USBP7N USB20_N7 <16>
USB20_P7
PAD T58 V23 DMI3TXP USBP7P N2 USB20_P7 <16> CMOS
D4 USB_OC#0_1_PCH
OC0# USB_OC#0_1_PCH <18>
USB_OC#0_1_PCH #DVT USB_OC# control by EC PCH reserve
USB
PAD T59 K21 PERN1 OC1# C5
PAD T60 K22 D3 USB_OC#2
PERP1 OC2# USB_OC#3
PAD T61 J23 PETN1 OC3# D2 USB_OC#4_PCH <18>
PAD T62 J24 E5 USB_OC#4_PCH
C PCIE_PTX_C_IRX_N2 PETP1 OC4# SLP_CHG_M3_PCH C
<17> PCIE_PTX_C_IRX_N2 M18 PERN2 OC5#/GPIO29 E6 SLP_CHG_M3_PCH <18>
PCIE_PTX_C_IRX_P2 SLP_CHG_M4_PCH +3VALW
WLAN+BT Combo <17> PCIE_PTX_C_IRX_P2
C1017 2
M19 PERP2 OC6#/GPIO30 C2 SLP_CHG_M4_PCH <18>
<17> PCIE_ITX_C_PRX_N2 1 0.1U_0402_10V6K PCIE_ITX_PRX_N2 K24 PETN2 OC7#/GPIO31 C3 USB_OC#7 RP12
<17> PCIE_ITX_C_PRX_P2 C1018 2 1 0.1U_0402_10V6K PCIE_ITX_PRX_P2 K25 #EVT 6/27 support sleep charge function USB_OC#0_1_PCH 4 5
PCIE_PTX_C_IRX_N3 PETP2 SLP_CHG_M4_PCH 3
<22> PCIE_PTX_C_IRX_N3 L23 PERN3 6
PCI-E
PCIE_PTX_C_IRX_P3 L24 USB_OC#7 2 7
<22> PCIE_PTX_C_IRX_P3 PERP3
LAN <22> PCIE_ITX_C_PRX_N3 C1019 2 1 0.1U_0402_10V6K PCIE_ITX_PRX_N3 L22 G2 1 8
C1020 2 PETN3 USBRBIAS
<22> PCIE_ITX_C_PRX_P3 1 0.1U_0402_10V6K PCIE_ITX_PRX_P3 M21 PETP3 USBRBIAS# G3 R553 10K_0804_8P4R_5%
PCIE_PTX_C_IRX_N4 P17 22.6_0402_1% Please closed Tiger point
<17> PCIE_PTX_C_IRX_N4 PERN4
PCIE_PTX_C_IRX_P4 P18 RP13
<17> PCIE_PTX_C_IRX_P4 PERP4 PIN within 200 mils
WWLAN <17> PCIE_ITX_C_PRX_N4 C1021 2 1@ 0.1U_0402_10V6K PCIE_ITX_PRX_N4 N25 USB_OC#3 4 5
C1022 2 PETN4
<17> PCIE_ITX_C_PRX_P4 1@ 0.1U_0402_10V6K PCIE_ITX_PRX_P4 N24 PETP4
USB_OC#2 3 6
F4 CLK_PCH_48M USB_OC#4_PCH 2 7
CLK48 CLK_PCH_48M <9>
1
SLP_CHG_M3_PCH 1 8
R554 @ 10K_0804_8P4R_5%
Please closed Tiger point 33_0402_5%
PIN within 500 mils 1
2
RF@C225
RF@ C225 @
PCIE_ITX_PRX_N21 2 +1.5VS C1023
R555 24.9_0402_1% 22P_0402_50V8J
12P_0402_50V8J 2
1 2 H24 DMI_ZCOMP
J22 For EMI, Close to TigerPoint 1 2
RF@C226
RF@ C226 DMI_IRCOMP R3 0_0402_5%
PCIE_ITX_PRX_P21 2 W23 RF@ L2
<9> CLK_PCIE_PCH# DMI_CLKN
W24 USB20_N5_L 1 1 2 USB20_N5
<9> CLK_PCIE_PCH DMI_CLKP 2 USB20_N5 <17>
12P_0402_50V8J
2
TIGERPOINT_ES1_BGA360 USB20_P5_L 4 3 USB20_P5

4 3 USB20_P5 <17>
WCM-2012-900T_0805
1 2
B R4 0_0402_5% B
# PVT C225, C226 add 2010.07.12 RF request

12p to GND for RF
A A

SCHEMATIC A6855
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019AD D
5 4 3 2 1
5 4 3 2 1
+3VALW
2.2K_0402_5% 1 R560 2 PCH_SMBCLK

7/2 For EMI, Close to TigerPoint
2.2K_0402_5% 1 R561 2 PCH_SMBDATA
9/1 C207 change to SE071100J80 for EMI request
+3VALW
HDA_BITCLK
+3VALW
1
D @ D
2 PM_CLKRUN# 1 2 R610
R598 10K_0402_5% 10K_0402_5%
10K_0402_5% 2 R562 1 SYS_RST# C1024
10P_0402_50V8J EVT# For EC request 7/5
2
1 BOARD_ID
1
8.2K_0402_5% R563 ICH_RI# @
R611
10K_0402_5% 2 R564 1 EC_SWI# U15D TGP
10K_0402_5%
10K_0402_5% 2 R565 1 SLP_CHG# AA5 T15 GPIO0
2
LDRQ1#/GPIO23 BMBUSY#/GPIO0 GPIO6
<24> LPC_AD0 V6 LAD0/FWH0 GPIO6 W16
LPC
AA6 W14 SLPIOVR
<24> LPC_AD1 LAD1/FWH1 GPIO7
12/17 Add Pull high Resistor for GPIO14 Y5 K18 EC_SMI#
<24> LPC_AD2 LAD2/FWH2 GPIO8 EC_SMI# <24>
W8 H19 EC_SCI#
<24> LPC_AD3 LAD3/FWH3 GPIO9 EC_SCI# <24>
9/1 R125 change to SM010027780 for EMI request Y8 M17 PCH_ACIN
+3VALW LDRQ0# GPIO10 GPIO12
<24> LPC_FRAME# Y4 LFRAME#/FWH4 GPIO12 A24
C23 EC_LID_OUT#
R582 GPIO13 EC_LID_OUT# <24>
33_0402_5%
1 2 BITCLK_PCH P6 P5 SLP_CHG#
<20> HDA_BITCLK R567 HDA_BIT_CLK GPIO14 SLP_CHG# <18>
33_0402_5%
1 2 RST#_PCH U2 E24 GPIO15
<20> HDA_RST# HDA_RST# GPIO15
AUDIO
<20> HDA_SDIN0 W2 HDA_SDIN0 DPRSLPVR AB20 PM_DPRSLPVR <7>
V2 HDA_SDIN1 STP_PCI# Y16 H_STP_PCI# <9>
P8 HDA_SDIN2 STP_CPU# AB19 H_STP_CPU# <9>
33_0402_5%
1 R568 2 SDOUT_PCHAA1 R3
<20> HDA_SDOUT HDA_SDOUT GPIO24
RP14 33_0402_5%
1 R569 2 SYNC_PCH Y1 C24 R570 1 2 1K_0402_5%
<20> HDA_SYNC HDA_SYNC GPIO25
5 4 LINKALERT# <9> CLK_PCH_14M AA3 CLK14 GPIO26 D19 BOARD_ID
1
6 3 GPIO11 GPIO27 D20 12/31 Add HW Board ID function
7 2 SMLINK0 R571 U3 EE_CS GPIO28 F22
8 1 SMLINK1 AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN# 2010.04.22 Add C1064 for ESD solution PLTRST#
# MP C1026 4.7P change to 10_0402_5% T6 U14
10K_0804_8P4R_5% RF@ V3
EE_DOUT EPROM GPIO33
AC1
10p for RF request
2
C C1025 EE_SHCLK GPIO34 C
GPIO38 AC23
2
18P_0402_50V8J T4 AC24 1
LAN_CLK GPIO39 BT_PWR# <17>
2 1 RTCX1 1 P7 R573
RF@ LANR_RSTSYNC H_PWRGD C1064 100K_0402_5%
B23 LAN_RST# CPUPWRGD/GPIO49 AB22 H_PWRGD <7>
10M_0402_5%
+3VALW Y2 C1026 AA2 0.1U_0402_16V4Z
LAN
MISC
LAN_RXD0
1
RP15 32.768KHZ_12.5PF_Q13MC14610002 EC_THERM# 2
AD1 AB17 EC_THERM# <24>
1
R572 2 LAN_RXD1 THRM#
1 8 GPIO15 2 NC OSC 1 10P_0402_50V8J AC2 LAN_RXD2 VRMPWRGD V16 VGATE
2 7PCH_LOW_BAT# W3 LAN_TXD0 MCH_SYNC# AC18 MCH_SYNC#
3 6 GPIO12 3 NC OSC 4 T7 LAN_TXD1 PWRBTN# E21 PBTN_OUT#
PBTN_OUT# <24>
4 5 EC_LID_OUT# U4 H23 ICH_RI#
2
C1027 LAN_TXD2 RI# T42

SUS_STAT#/LPCPD# G22 7/20 Add test point
8.2K_0804_8P4R_5% 18P_0402_50V8J EC_CLK
W4 D22 EC_CLK <24> 01/11 Reserve EC_CLK for KBC
RTC
RTCX2 RTCX1 SUSCLK SYS_RST#
2 1 V5 RTCX2 SYS_RESET# G18
RTCRST# T5 G23 PLTRST#
RTCRST# PLTRST# PLTRST# <7,17,22>
C25 EC_SWI#
WAKE# EC_SWI# <24>
GPIO11 E20 T8 INTRUDER#
PCH_SMBCLK SMBALERT#/GPIO11 INTRUDER# PCH_POK
<9> PCH_SMBCLK H18 SMBCLK PWROK U10 8/24 Add R254 pull down for EC request
SMB
+RTCVCC R574 1 2 <9> PCH_SMBDATA PCH_SMBDATA E23 AC3 PCH_RSMRST#
20K_0402_5% LINKALERT# SMBDATA RSMRST# INTVRMEN
H21 LINKALERT# INTVRMEN AD3
SMLINK0 F25 J16 PCH_SPKR +3VALW
+RTCVCC J1 SMLINK0 SPKR PCH_SPKR <20>
@ SMLINK1 F24 SMLINK1
1 1 2 2 SLP_S3# H20 PM_SLP_S3# <24>
2
1M_0402_5% 1 R575 INTRUDER#
2 R2 SPI_MISO SLP_S4# E25 PM_SLP_S4# <6,24>
T1 F21 R578
JUMP_43X39 SPI_MOSI SLP_S5# PM_SLP_S5# <24>
1 R576
SPI
332K_0402_1% 2 INTVRMEN M8 330K_0402_5%
C1028 SPI_CS# PCH_LOW_BAT#
P9 SPI_CLK BATLOW# B25
1U_0402_6.3V4Z R4 AB23 H_DPRSTP#
H_DPRSTP# <7>
1
SPI_ARB DPRSTP# H_DPSLP# D44
1 2 DPSLP# AA18 H_DPSLP# <7>
F20 PCH_ACIN 2 1
+3VS RSVD31 ACIN <24,30>
CH751H-40PT_SOD323-2
B 8.2K_0402_5% R577
7/20 Add SLPIOVR pull up 8.2k to +3vs B
SLPIOVR TIGERPOINT_ES1_BGA360
8.2K_0402_5%
9/23 Change RP17 to R256, R257, R258 for layout request
@R579 PM_CLKRUN#
D45
8.2K_0402_5% R580 GPIO0 PCH_POK 2 1 PCH_RSMRST#
8.2K_0402_5% R581 GPIO6
PCH_POK 1 2 D46
+3VS R583 10K_0402_5% 1 2
<29,31> POK
EC_PWROK 1 2
R584 10K_0402_5% CH751H-40PT_SOD323-2
1K_0402_5% 1 R585 2 MCH_SYNC#

1 2
R586 0_0402_5%
+3VS R587 2 1 0_0402_5%
PCH_RSMRST# 1 3
C
EC_RSMRST# <24>
1 1 2 @ Q36
E
@ R588 MMBT3906_SOT23-3
C1030 10K_0402_5%
B
2
0.1U_0402_16V4Z 1 2 +3VALW
2 @ R589
1
4.7K_0402_5%
5
+RTCBATT @ U5 @ D7B @D7A

@ D7A
1 BAV99DW-7_SOT363 BAV99DW-7_SOT363
P
<24> EC_PWROK B
Y 4 PCH_POK <7>
+RTCVCC +RTCBATT_R 2
<9,24,35> VGATE A
G
JRTC
6
1 3 TC7SH08FUF_SSOP5 2 1
D6 RSMRST# circuit
3
A 1 GND R126 @ R590

@R590 A
2 2 GND 4
2 1 2 +RTCBATT 2.2K_0402_5%
ACES_85205-0200N 1 1K_0402_5%
CONN@ 3 2010.03.22 Un-stuff RSMRST# circuit and use 0 ohm bypass
+3VL
1 2010.03.22 Un-stuff U5 and C1030
C1029
1U_0402_6.3V6K DAN202U_SC70
2 Security Classification Compal Secret Data Compal Electronics, Inc.

SCHEMATIC A6855
5 4 3 2 1
5 4 3 2 1
D U15F TGP D
TGP
+5VS +3VS U15E A1
VSS01
VSS02 A25
F12 +V5REF_RUN B6
VCC5REF VSS03
1
VSS04 B10
R591 D8 B16
VSS05
VSS06 B20
100_0402_5% RB751V-40TE17_SOD323-2 F5 +V5REF_SUS B24
VCC5REF_SUS VSS07
E18
2
+SATAPLL VSS08
VCCSATAPLL Y6 VSS09 F16
+V5REF_RUN 2mA G4
VSS10
1 6mA VCCRTC AE3 +RTCVCC VSS11 G8
C1031
0.01U_0402_16V7K
H1
0.1U_0402_10V6K
1U_0402_6.3V6K +DMIPLL VSS12
VCCDMIPLL Y25 1 1 VSS13 H4
C1033
VSS14 H5
2
C1032
VCCUSBPLL F6 VSS15 K4
1432mA R592 K8
+VCC1_5 1 2 2 VSS16
2 +1.5VS VSS17 K11
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
10U_0805_10V4Z
VSS18 K19
W18 0_0603_5% K20
V_CPU_IO VSS19
14mA 2 2 1 1 1 L4
C1034
C1035
+5VALW +3VALW VSS20
C1036
C1037
C1038
VSS21 M7
VSS22 M11
VCC1_5_1 AA8 VSS23 N3
1
D47 1 1 2 2 2
VCC1_5_2 M9 VSS24 N12
R593 M20 N13
VCC1_5_3 VSS25
POWER
VCC1_5_4 N22 VSS26 N14
10_0402_5% RB751V-40TE17_SOD323-2 N23
R594 VSS27
P11
2
C +V5REF_SUS +VCC1_05 1 VSS28 C

2 +1.05VS VSS29 P13
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_10V4Z
P19
10mA 955mA 0_0603_5% VSS30
R14
C1039 1 1 1 1 VSS31
C1040
C1041
C1042
VCC1_05_1 J10 VSS32 R22
VCC1_05_2 K17 VSS33 T2
0.1U_0402_10V6K P15 T22
2 VCC1_05_3 2 2 2 VSS34
VCC1_05_4 V10 VSS35 V1
VSS36 V7
VSS37 V8
VSS38 V19
216mA R596 V22
+VCC33 VSS39
VCC3_3_1 H25 1 2 +3VS VSS40 V25
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VCC3_3_2 AD13 VSS41 W12
F10 1 1 1 1 1 1 1 0_0603_5% W22
C1043
C1044
VCC3_3_3 VSS42
C1045
C1046
C1047
C1048
C1049
G10 @ @ Y2
VCC3_3_4 VSS43
VCC3_3_5 R10 VSS44 Y24
VCC3_3_6 T9 VSS45 AB4
2 2 2 2 2 2 2
VSS46 AB6
VSS47 AB7
VCCSUS3_3_1 F18 VSS48 AB8
VCCSUS3_3_2 N4 VSS49 AC8
K7 R599 AD2
VCCSUS3_3_3 +VCCSUS33 VSS50
VCCSUS3_3_4 F1 1 2 +3VALW VSS51 AD10
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_6.3V4Z
VSS52 AD20
92mA 0_0603_5% AD24
VSS53
1 1 1 1 VSS54 AE1
C1051
C1052
C1053
C1054
@ AE10
VSS55
VSS56 AE25
2 2 2 2
5
B B
VSS57 G24
Place closely pin Y25 within 100mlis. VSS58 AE13
VSS59 F2
+1.5VS
+1.5VS
R601
1 2 RSVD32 AE16
1 2 +DMIPLL RF@C1068
RF@C1068 2200P_0402_50V7K
+3VS
0.01U_0402_16V7K
4.7U_0603_6.3V6K
24mA 1 2
0_0603_5% 1 1 RF@C207
RF@ C207 68P_0402_50V8J
1 2
C1055
C1056
@ RF@C1069
RF@ C1069 2200P_0402_50V7K TIGERPOINT_ES1_BGA360
+3VALW 1 2
2 2 RF@C208
RF@ C208 68P_0402_50V8J
1 2
RF@C1070
RF@ C1070 2200P_0402_50V7K
+1.05VS 1 2
RF@C209
RF@ C209 68P_0402_50V8J
Place closely pin Y6 within 100mlis. RF@C1071
RF@ C1071
1 2
2200P_0402_50V7K
1 2
+1.5VS RF@ C210 68P_0402_50V8J
R602
1 2
1 2 +SATAPLL RF@C1072
RF@ C1072 0.1U_0402_10V6K
10U_0805_10V4Z
0.1U_0402_10V6K
45mA
0_0603_5% 1 2
C1057
C1058
A 2010.07.12 RF request A
2 1

SCHEMATIC A6855
5 4 3 2 1
A B C D E
Place closed to conn.

CRT CONNECTOR
1
D2 D3 D4
DAN217_SC59
DAN217_SC59
DAN217_SC59
2/16 DVT: Mount C504 for EMI request
+3VS
3
@ @ @
3/16 PVT: Change to high speed bead
1 1 1
C504
Place closed to conn. 0.1U_0402_16V4Z

2
L6
GMCH_CRT_R 1 2 CRT_R_L
<7> GMCH_CRT_R
NBQ100505T-800Y_0402
L7
GMCH_CRT_G 1 2 CRT_G_L
<7> GMCH_CRT_G
NBQ100505T-800Y_0402
L8
GMCH_CRT_B 1 2 CRT_B_L
<7> GMCH_CRT_B
NBQ100505T-800Y_0402
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
1
1
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1
R145 R146 R147 C190 C191 C192 C193 C194 C195
2 2 2 2 2 2
2
2 2
+CRT_VCC
1 2 1 2
C196 0.1U_0402_16V4Z R148 10K_0402_5%
5
1
P U13
OE# CRT_HSYNC_1 R149 1
<7> GMCH_CRT_HSYNC 2 A Y 4 2 39_0402_5% HSYNC
G
SN74AHCT1G125DCKR_SC70-5 CRT_VSYNC_1 R150 1 2 39_0402_5% VSYNC

3
33P_0402_50V8K
33P_0402_50V8K
+CRT_VCC
1 1
1 2
C197 0.1U_0402_16V4Z C198 C199
5
1
U14
2 2
P
OE#
<7> GMCH_CRT_VSYNC 2 A Y 4
G
SN74AHCT1G125DCKR_SC70-5 3/29 PVT:Change F1 from SC04301P000 to SP04301P120.

3
If=1A
+5VS
D5 +CRT_VCC_R +CRT_VCC
2 F1 30mil
1 1 2
3 RB491D_SOT23-3 1.1A_6V_MINISMDC110F-2 1
3 3
C200
+3VS +CRT_VCC 0.1U_0402_16V4Z
2
+3VS
1
+CRT_VCC
1
R151 R152 JCRT

R153 R154 6
4.7K_0402_5% 4.7K_0402_5% RGND
PAD T67 11 ID0
4.7K_0402_5% 4.7K_0402_5% CRT_R_L 1
2
Red
7
2
GGND
5
CRT_DDC_DAT 12
Q3B CRT_G_L SDA
2 Green
4 3 CRT_DDC_DAT 8
<7> GMCH_CRT_DATA HSYNC BGND
13 Hsync
2N7002DW-T/R7_SOT363-6 CRT_B_L 3 Blue
2
9 +5V
VSYNC 14
CRT_DDC_CLK Vsync
<7> GMCH_CRT_CLK 1 6 PAD T68 4 res
Q3A 10
2N7002DW-T/R7_SOT363-6 CRT_DDC_CLK SGND
1 1 15 SCL
5 GND
C201 C202
470P_0402_50V8J 470P_0402_50V8J 16
@ 2 2 @ GND
17 GND
SUYIN_070546FR015S263ZR
4 4
@

SCHEMATIC A6855
D
4019AD
A B C D E
5 4 3 2 1
LCD POWER CIRCUIT
D D
+LCDVDD
1/22 DVT:Change R117 from 47K to 100K
+3VS W=40mils
1
R116 +3VS
150_0603_5%
1
1
C149
2
1 @
R117 C183 4.7U_0805_10V4Z
3
100K_0402_5% 2
Q2B 0.1U_0402_16V7K 2A
3
2
S
G
2N7002DW-T/R7_SOT363-6 5 2 1 2
R141 47K_0402_5% 1/22 DVT:Change Q11 from SI2301BDS to A03413
D Q11
1
# MP Add C227~C232 for RF request 1 AO3413_SOT23
C498
+LCDVDD
6
@ C227 0.01U_0402_25V7K W=40mils
LCD_TXOUT0- 2
1 2
Q2A
12P_0201_50V8J 2 1 1
<7> GMCH_ENVDD
1
@ C228 2N7002DW-T/R7_SOT363-6 C186 C187 +3VS
1 2 LCD_TXOUT0+ @
1
R142 4.7U_0805_10V4Z 0.1U_0402_16V4Z
12P_0201_50V8J 2 2
2.2K_0402_5%
2.2K_0402_5%
C @ C229 100K_0402_5% C
2
1 2 LCD_TXOUT1-
R143
R144
12P_0201_50V8J 1/22 DVT:Add C498 with 0.01uF
@ C230
1 2 LCD_TXOUT1+
1
12P_0201_50V8J LCD_EDID_CLK LCD_EDID_CLK <7>
@ C231
1 2 LCD_TXOUT2- LCD_EDID_DATA
12P_0201_50V8J
LED/PANEL BD. Conn. LCD_EDID_DATA <7>
@ C232
1 2 LCD_TXOUT2+
12P_0201_50V8J
JLVDS1
+LCDVDD R377 1 2 0_0805_5% (20 MIL) +LCDVDD_R 1

RF@C1114
RF@C1114 1
2 2
2 1 LCD_TXCLK- +3VS 3
LCD_EDID_CLK 3
1 4 4
10P_0402_50V8J C468 1 LCD_EDID_DATA 5
RF@C1115
RF@C1115 @ C469 LCD_TXOUT0- 5
<7> LCD_TXOUT0- 6 6
2 1 LCD_TXCLK+ 680P_0402_50V7K @ <7> LCD_TXOUT0+ LCD_TXOUT0+ 7 7
2 680P_0402_50V7K 8 8
10P_0402_50V8J 2 LCD_TXOUT1- CH751H-40PT_SOD323-2 D55
<7> LCD_TXOUT1- 9 9
<7> LCD_TXOUT1+ LCD_TXOUT1+ 10 2 1 INVT_PWM_R
B 10 <24> INVT_PWM B
<7> LCD_TXOUT2- LCD_TXOUT2- 11
LCD_TXOUT2+ 11 R420 1
# PVT Add C1114, C1115 <7> LCD_TXOUT2+ 12 12 <7> GMCH_INVT_PWM 2 @ 0_0402_5%
10p and stuff for RF 13 13
LCD_TXCLK- 14 2011.01.5 Change R419 to D55
<7> LCD_TXCLK- 14
2011.01.5 Change R421 to D56 LCD_TXCLK+ 15
<7> LCD_TXCLK+ 15 and R11 pull down for KBC ESD protection
16
and R12 pull down for KBC ESD protection 17
16
17
18 18
680P_0402_50V7K 2 1 C188 CH751H-40PT_SOD323-2 D56 INVT_PWM_R 19
BKOFF# 19
<24> BKOFF#_L 2 1 20 20
21 21
68P_0402_50V8J 2 1 C189 1
2 +LCD_INV 22
C306
0.1U_0402_16V4Z 22
23 23
1 2 24 24
R12 10K_0402_5% +3VS_LVDS_CAM 25 34
R376 0_0805_5% USB20_N7_R 25 MGND4
250mA B+ 1 2 +LCD_INV 26 26 MGND3 33
USB20_P7_R 27 27
28
<20> DMIC_CLK
DMIC_CLK
DMIC_DAT
29
30
28
29 MGND2 32
31
Int. Camera 1 @
R392
2
0_0402_5%
+3VS_LVDS_CAM <20> DMIC_DAT 30 MGND1
R105 L13
1 1 2 2
0_0603_5% W=20mils 0.1U_0402_16V4Z #6/27 EVT I-PEX_20143-030E-20F~D USB20_N7_R
USB20_N7 <12>
+3VS 1 2 1 2 @ USB20_P7_R
USB20_P7 <12>
C313 4 3
D9 4 3
3 DMIC_CLK WCM2012F2S-900T04_0805
1 1 2
2 DMIC_DAT R393 0_0402_5%
A A
@
PACDN042Y3R_SOT23-3
For EMI request

LCD_TXCLK+ C871 1 2 10P_0402_50V8J LCD_TXCLK- 2010/06/27 2011/6/27 Title
SCHEMATIC A6855
2/25 PVT:Mount C871 with 10pF D
4019AD
5 4 3 2 1
A B C D E
Mini-Express Card for WLAN/WiMax 2/25 PVT:Mount C479,C480 with 47pf

3/16 PVT:Add BOM Config of C481,C482 to WLAN@
+3V_WLAN +1.5V_WLAN
120 mil
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1
C258 C259 C260 C479 C261 C262 C263 C480
WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@ WLAN@
2 2 2 47P_0402_50V8J 2 2 2 47P_0402_50V8J
1 0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z 1
For WWAN request For WWAN request
+1.5V_WLAN
+1.5VS
BT_CTRL 2 1 EC_RX_P80_CLK_R +3V_WLAN +3VS
1K_0402_5% 1 2 PJ20
R326 R896 0_0805_5% 2 1
JWLAN 2 1
# MP Add R326 1K for WB195 pin 51 1 @ JUMP_43X79
1
3 3 2 2
BT_CTRL 5 4
WLAN_CLKREQ# 5 4
<9> WLAN_CLKREQ# 7 7 6 6
9 8 LPC_FRAME#_R
9 8 LPC_FRAME#_R <24>
11 10 LPC_AD3_R
<9> CLK_PCIE_WLAN# 11 10 LPC_AD3_R <24>
13 12 LPC_AD2_R #EVT WLAN&BT Combo module circuits
<9> CLK_PCIE_WLAN 13 12 LPC_AD2_R <24>
15 14 LPC_AD1_R
15 14 LPC_AD1_R <24>
16 LPC_AD0_R BT BT
16 LPC_AD0_R <24>
on module on module
PLTRST# 17 Enable Disable
CLK_PCI_DDR 17
<9> CLK_PCI_DDR 19 19 18 18
21 20 WL_OFF_R#
21 20 PLTRST#
<12> PCIE_PTX_C_IRX_N2 23 23 22 22 PLTRST# <7,13,22> BT_CRTL HI LO
<12> PCIE_PTX_C_IRX_P2 25 25 24 24
27 27 26 26
29 29 28 28 # MP Add R328
<12> PCIE_ITX_C_PRX_N2 31 31 30 30 CLK_SMBCLK <9,10> by pass for cost down
<12> PCIE_ITX_C_PRX_P2 33 33 32 32 CLK_SMBDATA <9,10>
35 34 +3VS BT_CTRL
35 34
37 37 36 36 USB20_N6 <12>
WLAN/ WiFi +3V_WLAN 39 39 38 38 USB20_P6 <12>
2
41 41 40 40
2 @ R259 R328 @ 2
43 43 42 42
45 44 LED_WIMAX#_R 1 2 LED_WIMAX# 100K_0402_5% 0_0402_5%
45 44 LED_WIMAX# <24,26>
47 47 46 46
R425 1 2 0_0402_5% 49 48 R428 R229@
<24> EC_TX_P80_DATA
1
49 48
1
R426 1 EC_RX_P80_CLK_R 0_0402_5% 100K_0402_5% D
<24> EC_RX_P80_CLK 2 51 51 50 50
0_0402_5% 52 1 2 +3VS 2 Q41
52 <13> BT_PWR#
Debug card using 53 GND
G
1
54 S 2N7002_SOT23
3
R429 GND WLAN@
100K_0402_5% CONN@ ACES_88910-5204
#DVT WLAN,WWAN and BT LED #DVT Q41 due die
control by EC and HW reserve @ D49 change to single
2
WL_OFF_R# 2 1 WL_OFF# <24>

Mini-Express Card for 3G/GPS 1 2
3G current need to 2750mA 3/16 PVT:Add BOM Config of C481,C482 to 3GGPS@ R430
0_0402_5%
+3V_WWAN +1.5V_WWAN
120 mil
#DVT R430 reserve for leakage power
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1 1 1
C265 C266 C267 C482 C268 C269 C270 C481
WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ WWAN@ D14
2 2 2 47P_0402_50V8J 2 2 2 47P_0402_50V8J 1 V I/O V I/O 6
0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z
For WWAN request For WWAN request 2 Ground V BUS 5 +UIM_PWR
2/25 PVT:Mount C482,C481 with 47pf +UIM_PWR
3 +3V_WWAN +3VS 3 4 3
+1.5VS +1.5V_WWAN V I/O V I/O
IP4223CZ6_SO6-6
1
1 2 R231
1 2 R897 0_0805_5% @ 4.7K_0402_5%
R898 0_0805_5% J3GSIM @
JGPS WWAN@
WWAN@ +UIM_PWR +UIM_PWR 1 4
UIM_RST VCC GND UIM_VPP
1 120 mil 2 5
2
1 RST VPP
1
Reserve 3 2 1 UIM_CLK 3 6 UIM_DATA

3 2 D13 CLK I/O
5 5 4 4
<9> WWAN_CLKREQ# WWAN_CLKREQ# 7 6 +1.5V_WWAN C296 GLZ20A LL-34 7 8
7 6 +UIM_PWR 0.1U_0402_16V4Z GND GND
9 9 8 8 +UIM_PWR 3G@
UIM_DATA 3G@ 2 SUYIN_254020MA006S522ZL~D
<9> CLK_PCIE_WWAN# 11 10 1
2
11 10 UIM_CLK 3G@
<9> CLK_PCIE_WWAN 13 13 12 12 1 1
15 14 UIM_RST C297
15 14 UIM_VPP 3G@ C307 C298 3G@ CONN@ 22P_0402_50V8J
16 16
12P_0402_50V8J 12P_0402_50V8J 2
2 2
17 17
19 19 18 18
21 20 UWB_OFF#_R
21 20 PLTRST#
<12> PCIE_PTX_C_IRX_N4 23 23 22 22 RF request change to 12pF
<12> PCIE_PTX_C_IRX_P4 25 25 24 24 Derek 08/30
27 27 26 26
29 29 28 28
31 30 CLK_SMBCLK
<12> PCIE_ITX_C_PRX_N4 31 30
33 32 CLK_SMBDATA @ D52
<12> PCIE_ITX_C_PRX_P4 33 32 UWB_OFF#_R 2
35 35 34 34 1 UWB_OFF# <24>
37 37 36 36 USB20_N5 <12>
+3V_WWAN 39 38 CH751H-40PT_SOD323-2
39 38 USB20_P5 <12>
41 41 40 40
43 42 LED_WIMAX#_R
4 43 42 4
45 45 44 44 1 2
47 47 46 46
49 48 WWAN@ R431
49 48 0_0402_5%
51 51 50 50
52 52 #DVT R431reserve for leakage power
53 GND
54 GND
P-TWO_A54402-A0G16-N
CONN@ Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title
SCHEMATIC A6855
D
4019AD
A B C D E
5 4 3 2 1
USB CONN- -Left W=30mils

+5VALW 1.4A +USB_VCCB
U24
1 GND OUT 8
SLP_CHG_M3 SLP_CHG_M4 2
3
IN OUT 7
6
IN OUT USB_OC#4
<24> USB_CHG_EN# 1 2 4 EN# OC# 5
Mode 3 R88
HIGH LOW 0_0402_5% APL3510BXI-TRG MSOP 8
<24> USB_EN# 1 2 1
Mode 4 @ R87 C288
LOW HIGH 0_0402_5% @
4.7U_0805_10V4Z
2
#PVT R88 CHG@ change to
SLP_CHG FUNCTION +3VALW always stuff for OC protect
D U11 CHG@ actioc same D
+USB_VCCB
LOW D=1D USB20_P4_S 1 1D+ VCC 10 W=30mils
USB20_N4_S +USB_VCCB 0.1U_0402_16V4Z
HIGH D=2D 2 1D- S 9 SLP_CHG# <13>
1
USB20_P4 3 8 USB20_P4_R 1 1 1
<12> USB20_P4 2D+ D+ + C2
C1 C3 C4
USB20_N4 4 7 USB20_N4_R
<12> USB20_N4 2D- D- 220U_6.3V_M_R17
USB_CHG_EN# 2 2 2 2
5 GND OE# 6
470P_0402_50V8J 1000P_0402_50V7K JUSB1

1 VCC
TS3USB221RSER_QFN10_2x1P5~D USB20_N4_RL 2
USB20_P4_RL D-
3 D+
1 2 nonCHG@ 4 GND
R221 0_0402_5%
1 2 nonCHG@ 5 GND1
R222 0_0402_5% 6 GND2
7 GND3
CHG@ 8
R211 0_0402_5% GND4 C5
2 1 SLP_CHG_M3 1 2 SUYIN_020133GB004M25MZL 0.1U_0402_16V4Z
<12> SLP_CHG_M3_PCH
@ R1 0_0402_5% CONN@ D1
CHG@ L1 1 6 1 2
R213 0_0402_5% USB20_N4_R USB20_N4_RL I/O1 I/O4
1 1 2 2
2 1 SLP_CHG_M4 2 5 +5VALW
<12> SLP_CHG_M4_PCH REF1 REF2
USB20_P4_R 4 3 USB20_P4_RL USB20_P4_RL 3 4 USB20_N4_RL
4 3 I/O2 I/O3
Use PCH 0120 reserve both EC and PCH.

+USB_VCCB
WCM-2012-900T_0805
1
@ R2
2
0_0402_5%
CM1293A-04SO_SOT23-6
For EMI request
1
CHG@ R215 R216
U12 75K_0402_1% 43K_0402_1%
C SLP_CHG_M3 1 CHG@ CHG@ C
1OE#
4
2
2
SLP_CHG_M4 2OE#
10 3OE#
13 USB20_P4_S_O
4OE# USB20_N4_S_O @
USB20_P4_S 2 3 USB20_P4_S_O <12> USB_OC#0_1_PCH 1 2 USB_OC#0_1 1 2 USB_OC#0_1_EC <24>
1A 1B
1
USB20_N4_S 5 6 USB20_N4_S_O R7 0_0402_5% R9 0_0402_5%

2A 2B USB_OC#4
9 3A 3B 8 R220 1 CHG@ 2 R218 R219 <12> USB_OC#4_PCH 1 2 1 2 USB_OC#4_EC <24>
12 4A 4B 11 100_0402_5% 51K_0402_1% 51K_0402_1% R8 0_0402_5% R10 0_0402_5%
CHG@ CHG@ @
+USB_VCCB 14 7
2
VCC GND
2
SN74CBT3125PWRG4_TSSOP14
C361
0.1U_0402_16V4Z
1 CHG@
#DVT USB_OC# control by EC
For EMI request For EMI request

2/3 DVT: Change D38,D37 from PRTR5V0U2X_SOT143-4 to CM1293A-04SO_SOT23-6
USB CONN H2 H3 H4 H11 H12 H13 H14
@ @ @ @ @ @ @
1
1
H_2P3 H_2P3 H_2P3 H_3P3 H_3P3 H_2P0N H_2P0X2P6N
+5VALW 1.4A +USB_VCCA

W=60mils # PVT Add H14 and remove H1
U18 H6 H7 H8 H9 H10
B B
1 GND OUT 8
2 IN OUT 7
3 6 1 @ @ @ @ @
USB_EN# IN OUT C283
4 5
1
1
EN# OC# @ H_2P3 H_2P3 H_1P2 H_1P2 H_1P2
APL3510BXI-TRG MSOP 8 4.7U_0805_10V4Z
2
Add 0.1u Caps for each screw hole for ESD rule
+3VS +5VALW
USB_OC#0_1
0.1U_0402_16V4Z
+USB_VCCA
0.1U_0402_16V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1 1 1 1 1U_0402_6.3V4Z 1 1 @ 1
0.1U_0402_16V4Z
JP1
1 @ C530 @ C531 @ C528 @ C535 C534 C526@ C527
1 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2
3 3
4 4
USB20_P0 5
<12> USB20_P0 5
USB20_N0 6
<12> USB20_N0 6
7 7 Close to H1,H7 Close to H2 Close to H9,H6
USB20_P1 8
<12> USB20_P1 8
USB20_N1 9
<12> USB20_N1 9
10 10
# PVT Close to H4
11 GND 2010.07.20 Add for ESD solution
12 GND
ACES_85201-1005N_10P
CONN@ FIDUCIAL_C40M80
FM1 FM2
@ @
1
A A
FM3 FM4
@ @
1
Close to H5

SCHEMATIC A6855
D
4019AD
5 4 3 2 1
A B C D E F G H
SATA Conn.
For 1.8" SSD
+5VS +3VS SSD HDD need 400mA for 3V(PHISON)
Place closely JHDD SATA CONN.
1.2A
1 1 1 1 1 1 1 1
1 C275 C276 C277 C278 C279 C280 C281 C282 1
@ @ @ @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2
JSATA
GND 1
2 SATA_ITX_C_DRX_P0 C284 1 2 0.01U_0402_25V7K
A+ SATA_ITX_DRX_P0 <11>
3 SATA_ITX_C_DRX_N0 C285 1 2 0.01U_0402_25V7K
A- SATA_ITX_DRX_N0 <11>
GND 4
5 SATA_IRX_DTX_N0 C286 1 2 0.01U_0402_25V7K
B- SATA_IRX_C_DTX_N0 <11>
6 SATA_IRX_DTX_P0 C287 1 2 0.01U_0402_25V7K
B+ SATA_IRX_C_DTX_P0 <11>
GND 7
V33 8 +3VS
V33 9
V33 10
GND 11
GND 12
GND 13
V5 14 +5VS
V5 15
V5 16
GND 17
Reserved 18
2 19 2
GND
V12 20
V12 21
V12 22
GND 23
GND 24
SUYIN_127043FR022G226ZL_NR
CONN@
3 3
4 4

SCHEMATIC A6855
Custom D
4019AD
A B C D E F G H
A B C D E
Speaker Connector
RA2
+PVDD1 600 mA 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z +5V_CODEC placement near Audio Codec
1 1 0_0603_1% 1 1
CA57 CA44 RA13
place close to chip CA56 CA43 SPKL+ 2 1 SPK_L1
SPK_L1 <21>
2
0_0603_1% 1
JA1 2 2 2 2
2
0.1U_0402_16V4Z JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z CA19
470P_0402_50V8J 2
2
1
1 1 @ place close to chip @ CA24
CA2 CA1 1 1U_0402_6.3V4Z
1
1 +3VS_DVDD @ 1
+3VS_DVDD
For RF request 1
10U_0805_10V4Z RA11 470P_0402_50V8J CA20
2 2 +PVDD2 Derek 08/24 2 1 RA14
+5V_CODEC 2
1 1 1 0_0603_1% SPKL- 2 1 @ SPK_L2
SPK_L2 <21>
0.1U_0402_16V4Z 0.1U_0402_16V4Z CA60 @ 0_0603_1%
1 2 35 mA CA61 C224 @ RA15
+3VS +AVDD
RA1 FBMH1608HM601-T 1 1 68P_0402_50V8J SPKR+ 2 1 SPK_R1
2 2 2 10U_0805_10V4Z SPK_R1 <21>
RF@ 0_0603_1% 1
CA8 CA7
10U_0805_10V4Z RA3 CA25
2 2 68 mA 10U_0805_10V4Z 0.1U_0402_16V4Z 2 470P_0402_50V8J
1 +5V_CODEC 2
0_0603_1% @ 2 CA27
ALC259@ 1 1U_0402_6.3V4Z
UA1 ALC269@ @
39
46
25
38
1 1 1 1
9
ALC259-VB5-GR_QFN48_7X7 UA1 CA3 CA4 CA5 CA6 470P_0402_50V8J CA26 1
Change CA9 and CA10 RA16
DVDD
DVDD_IO
PVDD1
PVDD2
AVDD1
AVDD2
SPKR- 2
Ext. Mic/LINE IN 2 1 @ SPK_R2
SPK_R2 <21>
to 1U at pre-MP 2 2 2 2
place close to chip 0_0603_1%
10U_0805_10V4Z 0.1U_0402_16V4Z
CA9 1U_0402_6.3V4Z
MIC1_LINE1_R_L 2 1 LINE1_L 23 40 SPKL+
<21> MIC1_LINE1_R_L
CA10 LINE1_R 24 LINE1_L SPK_OUT_L+
41 SPKL- Beep sound
<21> MIC1_LINE1_R_R
MIC1_LINE1_R_R 2 11U_0402_6.3V4Z
LINE1_R SPK_OUT_L- EC Beep RA7
14 45 SPKR+ 1 2
LINE2_L SPK_OUT_R+ <24> EC_BEEP
15 44 SPKR- 47K_0402_5%
4.7U_0805_10V4Z CA21 LINE2_R SPK_OUT_R-
MIC1_LINE1_R_L 2 1 MIC_L 21 32
MIC1_L HP_OUT_L HP_L <21>
MIC_R 22 33
MIC1_LINE1_R_R 2 1
MIC1_R HP_OUT_R HP_R <21> PCI Beep RA8
CA13
16 1 2 1 2 MONO_IN
4.7U_0805_10V4Z CA22 MIC2_L <13> PCH_SPKR
17 MIC2_R 47K_0402_5%
10 HDA_SYNC 0.1U_0402_16V4Z
2 SYNC HDA_SYNC <13> 2
DMIC_DAT 2 6 HDA_BITCLK
<16> DMIC_DAT GPIO0/DMIC_DATA BCLK HDA_BITCLK <13>
DMIC_CLK_R 3 GPIO1/DMIC_CLK
1
5 HDA_SDOUT HDA_SDOUT <13> 1
SDATA_OUT RA12 100P_0402_50V8J
EC_MUTE# 4 8 HDA_SDIN0_R 2 1 CA18
<24> EC_MUTE# PD# SDATA_IN HDA_SDIN0 <13>
RA6 33_0402_5% 4.7K_0402_5%
2
2
HDA_RST# 11 47 Change to AGND for
<13> HDA_RST# RESET# EAPD
high frequency noise issue
1
SPDIFO 48
1 2 MONO_IN 12
RA40 CA11 CA12 100P_0402_50V8J PCBEEP #DVT PC beep R,C change 4.7K and 100P
MONO_OUT 20
100K_0402_5% 0.01U_0402_25V7K
@ @ SENSE_A 13
2
SENSE A
For EMI MIC2_VREFO 29
+5VALW +5VS
18 SENSE B +5V_CODEC
MIC1_VREFO_R 30 +MIC1_VREFO_R CA23 10U_0805_10V4Z
1 2 36 CBP LDO_CAP 28 1 2
CA15 ALC269@
2.2U_0603_6.3V4Z 35 27 AC_VREF 1 2
CBN VREF RA53 0_0805_5%
+MIC1_VREFO_L 31 19 AC_JDREF2 RA9 1 20K_0402_1% 1 2
MIC1_VREFO_L JDREF RA54 0_0805_5%
1 2
EC_MUTE# 43 34 CPVEE 1 2 ALC259@
PVSS2 CPVEE CA14 2.2U_0603_6.3V4Z CA17 CA16
42 PVSS1
49 DVSS2 AVSS1 26 2.2U_0603_6.3V4Z
1
2 1
7 DVSS1 AVSS2 37
RA45 0.1U_0402_16V4Z
4.7K_0402_5% Add RA45 and un-mount RA43 at PVT ALC269Q-VB2-GR_QFN48_7X7 MIC_SENSE
for audio noise issue place close to chip
1
3 3
DGND AGND
2
RA55 ALC259@
# DVT For RF need stuff 0_0402_5%
6
for EMI request
EC control EC_MUTE# behavior: High-state / low-state QA1A
2
HDA_BITCLK 1 2 1 2 ALC269@ RA28 100K_0402_5%
CA47 1 2 0.1U_0603_50V7K RA42 10_0402_5% 2N7002DW-T/R7_SOT363-6 2
RF@ CA62 12P_0402_50V8J ALC269@
RA47 CA48 1 2 0.1U_0603_50V7K RF@
1
DMIC_CLK_R
<16> DMIC_CLK
39_0402_5% CA49 1 2 0.1U_0603_50V7K Add RA43 for S/M battery mode at PVT
2
CA50 1 2 0.1U_0603_50V7K
For RF request C438 +3VL RA44 100K_0402_5%
100P_0402_50V8J 1 2
Derek 08/24 1 RA18 FBMH1608HM601-T for RF request
<24> SM_SENSE#
3
place close to chip For EMI
QA1B
Sense Pin Impedance Codec Signals Function ALC269@
MIC_SENSE 2 1 SENSE_A 5
+3VS B+ BACK_SENSE <21>
39.2K PORT-I (PIN 32, 33) Headphone out RA10 20K_0402_1% 2N7002DW-T/R7_SOT363-6
4
20K PORT-B (PIN 21, 22) Ext. MIC
SENSE A 1
@ CA28
2
1U_0402_6.3V4Z
<21> NBA_PLUG
10K PORT-C (PIN 23, 24) RA21 39.2K_0402_1% 1 2
4 @ CA29 1U_0402_6.3V4Z 4
5.1K (PIN 48) #EVT EMI for DMIC_CLK solution

SCHEMATIC A6855
A B C D E
A B C D E
# PVT for DC mode only detect

VL
SPEAKER
4.7K_0402_5%
RA48
MIC
1
ALC269@
JMIC1
1 8 1
7
3
2
MIC1_L LA2 1 2 FBM-11-160808-601-T_0603 MIC1_L_1 1
4
MIC1_R LA1 1 2 FBM-11-160808-601-T_0603 MIC1_R_1 2
DA7 BACK_SENSE 5
<20> BACK_SENSE
2 6
0.1U_0402_16V4Z
1
CA63
3 JSPK1 1 1 1 SINGA_2SJ2285-001191
6 CONN@
PESD5V0U2BT_SOT23-3 GND2 CA68 CA69 @
5 GND1
33P_0402_50V8K
33P_0402_50V8K
SPK_R1 2 2 2
<20> SPK_R1 4 4 1 1
SPK_R2 3
<20> SPK_R2 3
1
0_0402_5%
SPK_L1 2 ESD request CA64 CA65
<20> SPK_L1 2
SPK_L2 1 @ 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<20> SPK_L2 1 2 2
PESD5V0U2BT_SOT23-3 CONN@ RA56
2 E&T_3806-F04N-02R ALC259@
2
1
2 2
3
DA6
Head phone
Ext.MIC/LINE IN JACK JHP2
8
RA46 2 1 +MIC1_VREFO_R 7
1K_0402_5% RA36 2.2K_0402_5% 3
MIC1_LINE1_R_R 2 1 MIC1_R HP_L RA52 1 2 40.2_0402_1% HP_L_R LA4 1 2 FBM-11-160808-601-T_0603 PL 1
<20> MIC1_LINE1_R_R <20> HP_L
4
HP_R RA51 1 2 40.2_0402_1% HP_R_R LA3 1 2 FBM-11-160808-601-T_0603 PR 2
MIC1_LINE1_R_L MIC1_L <20> HP_R
<20> MIC1_LINE1_R_L 2 1
1K_0402_5% <20> NBA_PLUG NBA_PLUG 5
RA35 2 1 +MIC1_VREFO_L 6
RA31 2.2K_0402_5%
3 1 1 CA71 SINGA_2SJ2285-001191 3
@
33P_0402_50V8K
0.1U_0402_16V4Z CA70 CONN@
33P_0402_50V8K 1
2 2
2 1
CA66
CA67 0.1U_0402_16V4Z
2 ESD request
ESD request
4 4

SCHEMATIC A6855
A B C D E
A B C D
3/10 Change CL13 0805-->0603

UL1
+3V_LAN
Close to Pin 27,39,12,47,48
<12> PCIE_PTX_C_IRX_P3 CL1 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_P3 22 HSOP LED3/EEDO 31
37 +LAN_VDD10
LED1/EESK
<12> PCIE_PTX_C_IRX_N3 CL2 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_N3 23 HSON LED0 40 @ 1 2
LL1 0.1U_0402_16V4Z CL10
17 30 RL2 2 1 10K_0402_5% +LAN_REGOUT 1 2 1 2
<12> PCIE_ITX_C_PRX_P3 HSIP EECS/SCL
18 32 RL1 2 1 10K_0402_5% 2.2UH +-5% NLC252018T 0.1U_0402_16V4Z CL4
<12> PCIE_ITX_C_PRX_N3 HSIN EEDI/SDA
1 2 1 2
Layout Note: LL1 must be 0.1U_0402_16V4Z CL5
RL19 0_0402_5% 16 1 LAN_MDI0+ within 200mil to Pin36 CL13 CL9 1 2
<9> LAN_CLKREQ# CLKREQB MDIP0
2 LAN_MDI0- CL8,CL9 must be within 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL6
MDIN0 LAN_MDI1+ 200mil to LL1 2 1
1
<7,13,17> PLTRST# 25 PERSTB MDIP1 4 1 2 1
5 LAN_MDI1- +LAN_REGOUT: Width =60mil 0.1U_0402_16V4Z CL7

MDIN1
<9> CLK_PCIE_LAN 19 REFCLK_P NC/MDIP2 7
<9> CLK_PCIE_LAN# 20 REFCLK_N NC/MDIN2 8
NC/MDIP3 10
+3VALW 11
LAN_X1 NC/MDIN3
43 CKXTAL1
LAN_X2 44 13 +LAN_VDD10 Close to Pin 3,6,9,13,29,41,45
CKXTAL2 DVDD10
1
29 +LAN_VDD10 +LAN_EVDD10
RL102 DVDD10 +LAN_VDD10
DVDD10 41
10K_0402_5% LOM_WAKE# 28 2 1
<24> LOM_WAKE# LANWAKEB 0_0603_5% LL2 1 2 1 2
ISOLATEB 26 27 +3V_LAN 0.1U_0402_16V4Z CL19
2
ISOLATEB DVDD33 CL18 CL17

DVDD33 39 1 2
LOM_WAKE# 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL20
2 1
14 NC/SMBCLK AVDD33 12 +3V_LAN 1 2
15 42 0.1U_0402_16V4Z CL21
NC/SMBDATA AVDD33
+3V_LAN 1 RL22 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 Close to Pin 21 1 2
48 0.1U_0402_16V4Z CL22
AVDD33
ENSWREG 33 ENSWREG
EVDD10 21 +LAN_EVDD10
+LAN_VDDREG 34 VDDREG
35 VDDREG AVDD10 3 +LAN_VDD10
AVDD10 6
9 +3V_LAN +LAN_VDDREG
AVDD10
1 2 46 RSET AVDD10 45
RL5 2.49K_0402_1% 2 1
+3VS 24 36 +LAN_REGOUT 0_0603_5% LL3
GND REGOUT 1 2
49 PGND @
CL28 CL29
1
2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 2
RL6 RTL8105E-VB-GR_QFN48_6X6 2 1
1K_0402_1%
2
ISOLATEB
+3V_LAN
RL7
15K_0402_5%
+3VALW TO +3V_LAN
RL4 @
0_0402_5% +3VALW
+3VALW
2
+3VS ENSWREG Vgs=-4.5V,Id=3A,Rds<97mohm
RL25
RL23 100K_0402_5% 2
2 1 0_0402_5% CL12
YL1
CL33 0.01U_0402_16V7K 0.1U_0402_16V7K QL1
3
S
LAN_X1 2 1LAN_X2 2 1
CL34 0.01U_0402_16V7K 1 G
<24> WOL_EN# 1 2 2
2 1 RL16 47K_0402_5%
25MHZ_20PF_7A25000012
1 1 CL35 0.01U_0402_16V7K 1
D
1
CL14 AO3413_SOT23
CL26 CL27 0.01U_0402_25V7K +3V_LAN
27P_0402_50V8J 27P_0402_50V8J
2 2 2
# MP reserve CL33,CL34,CL35
+3VS to GND decouplin cap for 1 1
3 3
EMI request CL15 CL8 1U_0402_6.3V4Z

4.7U_0805_10V4Z
@ 2 2
UL2
LAN_MDI1+ 1 16 RJ45_MIDI1+
LAN_MDI1- TD+ TX+ RJ45_MIDI1- JLAN1
2 TD- TX- 15
2 1 3 14 RL26 RJ45_MIDI1- 1
CL30 0.01U_0402_16V7K CT CT CL31 1 RJ45_MIDI1+ 1
4 NC NC 13 2 1000P_0402_50V7K 1 2 75_0402_1% 2 2
5 12 1 2 1 2 RJ45_GND 1 2 1000P_1808_3KV7K LANGND 3
NC NC CL32 1000P_0402_50V7K 75_0402_1% CL3 RJ45_MIDI0- 3
6 CT CT 11 4 4
LAN_MDI0+ 7 10 RJ45_MIDI0+ RL27 RJ45_MIDI0+ 5
LAN_MDI0- RD+ RX+ RJ45_MIDI0- 5
8 RD- RX- 9 1 6 6
CL23 7 7
8 8
NS681680 4.7U_0603_6.3V6K 9
2 GND1
10 GND2
ACES_88231-08001
CONN@
# MP change back to orignal design for EMI

　D28 remove and add CL23 4.7U
4 4
JLAN1 connect pin defind change, remove CL16 and CL23, Add ESD diode
Derek 0823
# PVT Add pin 7 connect to LANGND

SCHEMATIC A6855
Size Document Number
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom D
A B C D
A B C D E
XD_CD#
SP1 XD_RDY SD_WP MS_CLK
SP2 XD_RE# MS_INS#
SP3 XD_CE# SD_D1
SP4 XD_CLE SD_D0 MS_D7
SP5 XD_ALE SD_D7 MS_D3
SP6 XD_WE# SD_CD#
SP7 XD_WP SD_D6 MS_D6
SP8 XD_D0 SD_CLK MS_D2
SP9 XD_D1 SD_D5 MS_D0
1 SP10 XD_D2 SD_CMD 1
SP14 XD_D6 MS_BS
XD_D7
+3VS_CR
CC4 2 1 100P_0402_50V8J
UC1
RC7 1 2 6.2K_0603_1% RREF 1 REFE CR_LED#
GPIO0 17 CR_LED# <26>
R899 2
<12> USB20_N3 DM
+3VS 1 2 3 24 XTLI 2 1
<12> USB20_P3 DP CLK_IN CLK_48M_CR <9>
0_0805_5% 0_0402_5% RC19
4 3V3_IN XD_D7 23
+VCC_3IN1
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1 2 VREG
5
6
CARD_3V3
22
48Mhz
V18 SP14
1U_0402_6.3V6K
CC5
CC13
1 need 12 mil trace 21 SD_DATA2 @ R556 @ C1113

SP13
CC8
7 20 SD_DATA3 1 2 1 2
XD_CD# SP12 33_0402_5%
SP11 19
2 1 SDWP# SDCMD 22P_0402_50V8J
8 SP1 SP10 18
2
9 SP2 SP9 16
SD_DATA1 10 15 SD_MS_CLK RC11 1 2 33_0402_5% SDCLK
SP3 SP8
EPAD
SD_MS_DATA0 11 14
2
SP4 SP7 SDCD# 2
12 SP5 SP6 13
RTS5137-GR QFN 24P_4X4
25
2 in 1 Card Reader
JREAD1
SD_DATA3 1 SD-DAT3
SDCMD 2 SD-CMD
+VCC_3IN1 3 SD-GND
4 SD-VCC
0.1U_0402_16V4Z
3 SDCLK 3
2 5 SD-CLK
CB29
6 SD-GND
1 SD_MS_DATA0 7 SD-DAT0
SD_DATA1 8 SD-DAT1
SD_DATA2 9 SD-DAT2
SDCD# 10 12
DETECT GND1
SDWP# 11 13
PROTECT GND2
#DVT swap conncet pin10 and pin11 TAITW_PSDATA009GLBS1ZZ4H

CONN@
10_0402_5% 10P_0402_50V8J
SDCLK 1 2
@ RC18 @ CC15
4 4

SCHEMATIC A6855
Custom D
4019AD
A B C D E
+3V_EC +3V_EC +3VALW
01/06 Reserve +3VL power for EC
@ R612
+EC_AVCC 2 1
0_0603_5% CLK_PCI_LPC
LPC_FRAME#_R 1 2 LPC_FRAME# C384 R613 +3VL
<17> LPC_FRAME#_R 1 1 1 1 1 1
1
0.1U_0402_16V4Z
C378
0.1U_0402_16V4Z
C379
0.1U_0402_16V4Z
C380
0.1U_0402_16V4Z
C381
1000P_0402_50V7K
C382
1000P_0402_50V7K
C383
0_0402_5% @ R310 1 2 2 1
LPC_AD3_R 1 2 LPC_AD3 0_0603_5% R302
<17> LPC_AD3_R
0_0402_5% @ R311 0.1U_0402_16V4Z @ 10_0402_5%
LPC_AD2_R 2 2 2 2 2 2 +EC_AVCC +3V_EC
<17> LPC_AD2_R 1 2 LPC_AD2 R614
111
125
0_0402_5% @ R315
22
33
96
67
2 1
2
9
LPC_AD1_R 1 2 LPC_AD1 U29 0_0603_5% 1
<17> LPC_AD1_R
0_0402_5% @ R316
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
LPC_AD0_R 1 2 LPC_AD0 C385
<17> LPC_AD0_R
0_0402_5% @ R317 @ 22P_0402_50V8J
2
GATEA20 1 21
<11> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F SM_SENSE# <20>
12/31 Add for miniI PCIE debug card. EC_KBRST# 2 23 EC_BEEP # MP change LID# pull up to +3VL
<11> EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 EC_BEEP <20>
SERIRQ 3 26 EC_PWM_FAN Place closely pin 109
<11> SERIRQ SERIRQ# FANPWM1/GPIO12 EC_PWM_FAN <25> R243
LPC_FRAME# 4 27 ACOFF @ R329
<13> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <30>
LPC_AD3 5 +3VALW 1 2 1 2 LID_SW#
+3V_EC <13> LPC_AD3 LAD3
R303 LPC_AD2 7 PWM Output 0_0402_5%
<13> LPC_AD2 LAD2
47K_0402_5% LPC_AD1 8 63 BATT_TEMPA R330 1
<13> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA <29> 47K_0402_5%
ECRST# LPC_AD0
2 1 <13> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
+3VL 1
0_0402_5%
2
@ C525
ADP_I/AD2/GPIO3A 65 ADP_I <30>
2 1 CLK_PCI_LPC 12 AD Input 66 ADP_V 0.1U_0402_16V4Z
<9> CLK_PCI_LPC PCICLK AD3/GPIO3B ADP_V <30> 2
C387 0.1U_0402_16V4Z PCI_RST# 13 75 Delet KILL_SW#
<11> PCI_RST# PCIRST#/GPIO05 AD4/GPIO42
ECRST# 37 76
EC_SCI# 20
ECRST# SELIO2#/AD5/GPIO43 #6/27 EVT
<13> EC_SCI# SCI#/GPIO0E
LED_WIMAX# 38 CLK_PCI_LPC 1 2
<17,26> LED_WIMAX# CLKRUN#/GPIO1D
68 USB_CHG_EN# @ C211 68P_0402_50V8J
DAC_BRIG/DA0/GPIO3C USB_CHG_EN# <18>
70 #DVT remove EN_DFAN1 INVT_PWM 1 2
KSO[0..15] EN_DFAN1/DA1/GPIO3D IREF @ C212 68P_0402_50V8J
<25> KSO[0..15]
#DVT EC to contral WWAN, DA Output IREF/DA2/GPIO3E 71 IREF <30>
KSI0 55 72 CHGVADJ EC_TX_P80_DATA 1 2
KSI[0..7] WLAN and BT LED KSI1 56
KSI0/GPIO30 DA3/GPIO3F CHGVADJ <30>
@ C216 68P_0402_50V8J
<25> KSI[0..7] KSI2 KSI1/GPIO31 EC_RX_P80_CLK 1
57 KSI2/GPIO32 2
KSI3 58 83 EC_MUTE# @ C217 68P_0402_50V8J
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <20>
confirm battery team change +5VALW to +3VALW KSI4 59 84 USB_EN#
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# <18>
KSI5 60 85
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C
+3V_EC
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 2010.07.12 RF request
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <26>
KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <26>
KSO1 40
EC_SMB_CK1 KSO2 KSO1/GPIO21
41 KSO2/GPIO22
R323 2.2K_0402_5% KSO3 42 97 VGATE
KSO3/GPIO23 SDICS#/GPXOA00 VGATE <9,13,35>
EC_SMB_DA1 KSO4 43 98 WOL_EN#
KSO4/GPIO24 SDICLK/GPXOA01 WOL_EN# <22> +3V_EC
R314 2.2K_0402_5% KSO5
EVT# For EC request 7/5
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 Delet SBPWR_EN#
LID_SW#
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 #6/27 EVT LID_SW# <26>
KSO7 46 SPI Device Interface 1 2
KSO8 KSO7/GPIO27 330K_0402_5% R307
47 KSO8/GPIO28
+3VS KSO9 EC_SI_SPI_SO D21
48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO <25>
KSO10 49 120 EC_SO_SPI_SI ACIN_D 2 1
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI <25> ACIN <13,30>
EC_SMB_CK2 KSO11 50 SPI Flash ROM 126 EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK <25>
R308 2.2K_0402_5% KSO12 51 128 SPI_CS# CH751H-40PT_SOD323-2
KSO12/GPIO2C SPICS# SPI_CS# <25>
EC_SMB_DA2 KSO13 52 Add D21 for AC-IN leakage issue
R309 2.2K_0402_5% KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73 USB_OC#0_1_EC
KSO15/GPIO2F CIR_RX/GPIO40 USB_OC#0_1_EC <18>
81 74 USB_OC#4_EC
KSO16/GPIO48 CIR_RLC_TX/GPIO41 USB_OC#4_EC <18>
For EC recommend 10/17 82 89 FSTCHG
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG <30>
90 BATT_FULL_LED#
BATT_CHGI_LED#/GPIO52 BATT_FULL_LED# <26>
01/06 Add HW board ID in EC pin16 91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# <25>
EC_SMB_CK1 77 GPIO 92 BATT_CHG_LOW_LED#
<29> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW_LED# <26> +3VALW
EC_SMB_DA1 78 93 PWR_ON_LED#
+3V_EC <29> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_ON_LED# <26>
EC_SMB_CK2 79 SM Bus 95 SYSON
<7> EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON <6,27,32>
EC_SMB_DA2 80 121 VR_ON
<7> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <35>
127 ACIN_D
AC_IN/GPIO59
1
USB_OC#0_1_EC 1 2
R318 2 1 PCI_RST# R5 10K_0402_5%
10K_0402_5% C389 0.1U_0402_16V4Z PM_SLP_S3# 6 100 EC_RSMRST#
<13> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <13>
PM_SLP_S5# 14 101 EC_LID_OUT#
<13> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# <13>
EC_SMI# 15 102 EC_ON USB_OC#4_EC 1 2
<13> EC_SMI# EC_ON <26>
2
HW_BOARD_ID HW_BOARD_ID EC_SMI#/GPIO08 EC_ON/GPXO05 EC_SWI# R6 10K_0402_5%

2010.07.15 EMI request 16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103 EC_SWI# <13>
17 104 EC_PWROK
SUSP#/GPIO0B ICH_PWROK/GPXO06 EC_PWROK <13>
1
@ WP 18 GPO 105 BKOFF#_L BKOFF#_L <16>

R319 PBTN_OUT#/GPIO0C BKOFF#/GPXO08 WL_OFF#
19 EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09 106 WL_OFF# <17>
10K_0402_5% INVT_PWM 25 107 UWB_OFF# UWB_OFF# <17> #DVT USB_OC# control by EC
<16> INVT_PWM EC_THERM#/GPIO11 GPXO10
FAN_SPEED1 28 108 Delet ARROW_LED#
<25> FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11
29 #6/27 EVT
2
EC_TX_P80_DATA FANFB2/GPIO15
<17> EC_TX_P80_DATA 30 EC_TX/GPIO16
EC_RX_P80_CLK 31 110 PM_SLP_S4#
<17> EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# <6,13>
ON/OFFBTN# 32 112 ENBKL Chenge EAPD to NC
<26> ON/OFFBTN# ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL <7>
PWR_SUSP_LED# 34 114
<26> PWR_SUSP_LED#
36
PWR_LED#/GPIO19
GPI
GPXID3
115 EC_THERM# #6/27 EVT
NUMLED#/GPIO1A GPXID4 EC_THERM# <13>
@ R320 Delet NUM_LED# 116 SUSP#
GPXID5 SUSP# <27,33,34>
WP_R 1 2 WP 117 PBTN_OUT#
<25> WP_R #6/27 EVT GPXID6
118 LOM_WAKE#
PBTN_OUT# <13>
0_0402_5% GPXID7 LOM_WAKE# <22>
122 XCLK1
1 2 123 124 +EC_V18R
<13> EC_CLK XCLK0 V18R
0_0402_5% R322 20mil
AGND
01/11 Reserve EC pin17 for WP function.

GND
GND
GND
GND
GND
1 C391
1
BATT_TEMPA 1 2 4.7U_0603_6.3V6K
C388 100P_0402_50V8J RZ01 KB926QFE0_LQFP128
11
24
35
94
113
69
100K_0402_5% @ CZ01 20mil

ACIN_D 2 20P_0402_50V8J TP_CLK
1 2 +5VS 1 2
C390 100P_0402_50V8J R595 4.7K_0402_5%
2
1 2 TP_DATA
R597 4.7K_0402_5%
01/11 Reserve EC_CLK for KBC

+3V_EC Layout: R322 need to close EC pin123
KSO1 1 2
R312 47K_0402_5%
KSO2 1 2
R313 47K_0402_5% 2010/06/27 2011/6/27 Title
SCHEMATIC A6855
to avoid EC entry ENE test mode AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom D
4019AD
For RF request
+5VS +3VS For RF request SPI Flash (8Mb*1)
FAN Control Circuit Derek 08/24
1
Derek 08/24
+3V_EC 2/3 DVT: Add C501,C502,C503,R412 for EMI request
1 RF@
1
RF@ C223 1
C222 R332 R887 68P_0402_50V8J RF@ +3V_EC
68P_0402_50V8J 2 C221
10K_0402_5% 10K_0402_5%
2 68P_0402_50V8J 330P_0402_50V7K
JFAN 2 U36 1 1 1
1
1 1 8 C503 C502 C411
1 <24> SPI_CS# CE# VDD
R600 2 For RF request R321
<24> FAN_SPEED1 2
<24> EC_PWM_FAN 1 2 EC_PWM_FAN_R 3 0_0402_5% 0.1U_0402_16V4Z
4
3 Derek 08/24 2 7
2 2 2
+5VS 4 <24> EC_SI_SPI_SO SO HOLD#
10_0603_5% 470P_0402_50V8J
2
1 5 GND1
@ 6 3 6 EC_SPICLK
GND2 <24> WP_R WP# SCK EC_SPICLK <24>
C218
68P_0402_50V8J ACES_88231-04001 1
2 CONN@ C501 EC_SO_SPI_SI
4 VSS SI 5 EC_SO_SPI_SI <24>
330P_0402_50V7K
2 8M W25Q80BVSSIG SOIC 8P # PVT remove EON BIOS ROM
RF@
01/11 Reserve WP function for SPI ROM RF@
C508 R412
1 2 1 2 EC_SPICLK
#DVT Reserve for EC protect 0_0402_5%
12P_0402_50V8J
2/25 PVT:Change R412 with 33ohm,C508 with 33pF
LPC Debug Port

KSI0 C414 1 2 100P_0402_50V8J
KSI1 C419 1 2 100P_0402_50V8J
KSI2 C416 1 2 100P_0402_50V8J
KSI3 C418 1 2 100P_0402_50V8J
KEYBOARD KSI4 C422 1 2 100P_0402_50V8J
KSI5 C424 1 2 100P_0402_50V8J

CONN. KSI6 C426 1 2 100P_0402_50V8J
KSI[0..7] KSI7 C428 1 2 100P_0402_50V8J

KSI[0..7] <24>
KSO[0..15] KSO0 C430 1 2 100P_0402_50V8J
KSO[0..15] <24>
KSO1 C432 1 2 100P_0402_50V8J
JKB KSO2 C434 1 2 100P_0402_50V8J

1 KSO3 C436 1 100P_0402_50V8J
2 2
3 CAPS_LED# <24>
R382 1 2 300_0402_5% +3VS
4 KSI1
5 KSI6
6 KSI5
7 KSI0 KSO4 C415 1 100P_0402_50V8J
8 2
KSI4
9 KSI3 KSO5 C420 1 100P_0402_50V8J
10 2
KSI2
11 KSI7 KSO6 C417 1 100P_0402_50V8J
12 2
KSO15
13 KSO12 KSO7 C421 1 100P_0402_50V8J
14 2
KSO11
15 KSO10 KSO8 C423 1 100P_0402_50V8J
16 2
KSO9
17 KSO8 KSO9 C425 1 100P_0402_50V8J
18 2
KSO13
19 KSO7 KSO10 C427 1 100P_0402_50V8J
20 2
KSO6
21 KSO14 KSO11 C429 1 100P_0402_50V8J
22 2
KSO5
23 KSO3 KSO12 C431 1 100P_0402_50V8J
24 2
KSO4
25 KSO0 KSO13 C433 1 100P_0402_50V8J
26 2
KSO1
27 KSO2 KSO14 C435 1 100P_0402_50V8J
28 2
29 KSO15 C437 1 100P_0402_50V8J
30 2
31 CAPS_LED# C461 1 100P_0402_50V8J
32 2
33
34
@ ACES_88170-3400
3/4 PVT:Mount C414~C437,C461 for EMI request
12/18 Follow KB Matrix the same to KSKAA
Security Classification Compal Secret Data Compal Electronics Inc

SCHEMATIC A6855
D
4019AD
A B C D E
Power Button +3V_EC

change power ON/OFF power rail +3VALW-->+3V_EC
Derek 0823
Touch/B Connector
1/22 DVT:JTOUCH pin define reversal
2
+5VS
R324
100K_0402_5%
1
D24 JTOUCH
1
2 R325 R223
1 2 0_0402_5% 1 8
ON/OFFBTN# <24> <24> LID_SW# 1 G2
ON/OFFBTN#_R 1 0_0603_5% 2 7
2 G1
3 51_ON# <28> <24> TP_DATA 3 3
<24> TP_CLK 4
2
CHN202UPT SC-70 4
5 5
1 1
2 6 6
2
E-T_7182K-F06N-00R
1
D C405 D26
1 1U_0402_6.3V4Z CONN@
2 Q15 PJDLC05_SOT23-3
<24> EC_ON G
2
S 2N7002_SOT23
3
R327 #MP Change To E&T footprint
10K_0402_5%
1
1
2
JPOWER @ R333 R331
1 1
2 0_0402_5% 0_0402_5%
ON/OFFBTN#_R R415 1 2
2 FBMA-10-100505-151T 3
1
3
4 4
0.1U_0402_16V4Z
180P_0402_50V8J
5 GND
3
+3VALW
+3VL
2 @D27
@ D27 6
@ GND
1
C538
C505
JOINT_F1017WR-S-04P
CONN@
1 @
2
1
PJSOT24C_SOT23-3 # MP change LID power to +3VL
2 2
LED Conn
JLED
1
+5VS
+5VALW
<24> BATT_CHG_LOW_LED#
2
3
1
2
3
ISPD
<24> BATT_FULL_LED# 4 4
5 ZZZ
<24> PWR_SUSP_LED# 5
<24> PWR_ON_LED# 6 6
<17,24> LED_WIMAX# 7 7
8
SATALED#_R 9
8
9
PCB
10 10
11 PCB LA-6855
GND
12 GND
4/7 MP:PCB P/N Change to DAZ08100105
P-TWO_161021-10021
CONN@
# PVT change non ZIF for cost

D50
2 1 CR_LED# <23>
3 CH751H-40PT_SOD323-2 3
D51
SATALED#_R 2 1 SATALED# <11>
4 4

SCHEMATIC A6855
Custom D
4019AD
A B C D E
A B C D E
+3VALW TO +3VS +5VALW TO +5VS

4/2 MP:For EMI ESD solution
+3VALW +3VS Vgs=-0V,Id=9A,Rds=18.5mohm +5VALW +5VS
4/2 MP:For EMI ESD solution
SI7326DN-T1-E3_PAK1212-8 1 1 SI7326DN-T1-E3_PAK1212-8 1 1
Q18 Q19
470_0805_5%
470_0805_5%
1 C439 C440 1 C441 C442
2
2 1U_0402_6.3V4Z 4.7U_0805_10V4Z 2 1U_0402_6.3V4Z 4.7U_0805_10V4Z
2 2 2 2 R343
1 5 3 5 3 1
R342
0.1U_0402_16V4Z
@1 1 R344 2 +VSB 1 R346 2 +VSB

4
3 1
3 1
0.01U_0402_25V7K
47K_0402_5% 47K_0402_5%
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1 1 1
6
0.022U_0402_16V7K
C529 C447
1
C446 C448 C449 R349 Q7A
2 R348 Q6A Q6B 200K_0402_5% Q7B
2 2 SUSP 2 2 @ SUSP
2 5 2 5
330K_0402_5% 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
4
4/2 MP:For EMI ESD solution 2/25 PVT:Change C447 with 0.022uF 3/23 For EMI ESD solution
+5VALW
2
R362
100K_0402_5%
1
2 SYSON# 2
<6> SYSON#
3
Q28B
SYSON 5 2N7002DW-T/R7_SOT363-6
<6,24,32> SYSON
4
R402
10K_0402_5%
1
Change to 1.8V
Derek 8/20
+5VALW
#DVT change to 470 ohm for
+VS power leakage
+1.8V TO +1.8VS
2
+0.89VS +1.5VS +1.8VS

R361 +1.8V +1.8VS
470_0603_5%
2
3 @ R603 R363@ R604@ 3

1
470_0603_5% 470_0603_5% 470_0603_5% SI7326DN-T1-E3_PAK1212-8 1 2

SUSP Q33 C1059
<32> SUSP
1 C1060
1
1
6
2 10U_0805_10V4Z
2 1
5 3
6
Q28A
2 @ Q25B @ Q31B 1U_0402_6.3V4Z
<24,33,34> SUSP#
@Q31A
4.7U_0805_10V4Z
4
2
2N7002DW-T/R7_SOT363-6 2 SUSP 5 SUSP 5 SUSP

1
C1061 8/31 Change Q20 from SB000002880 to SB00000DW00 for HW design

R401 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
1
10K_0402_5% 2 200K_0402_5% 1 R605 2 +VSB

47K_0402_5%
1
1
+3VALW
Change to 0.9VS 1
Derek 8/25 R606 C1062
2
2/6 DVT: Reserve +1.5VS,+1.05VS,+0.75VS,+1.8VS discharge circuit 0.01U_0402_25V7K
2 R607
2
10K_0402_5%
Change to 1.8V
3
+1.05VS
+0.9VS +1.8V Derek 8/23
1
8/14 R237 for HW design
2
5
2
@ @ R365@ Q35B
6
R366 R367 1 470_0603_5% 1 2N7002DW-T/R7_SOT363-6
4
470_0603_5% 470_0603_5% @ @
C533 C532
1
1U_0402_6.3V4Z 1U_0402_6.3V4Z Q35A 2 SUSP#

6 1
4 2 2 4
7/9 Add Q29, Q30, R228 for Intel power sequence 2N7002DW-T/R7_SOT363-6
1
1
@Q25A D D
2 SUSP @ Q26 2SYSON# @ Q24 2 SUSP
G G
2N7002DW-T/R7_SOT363-6 2N7002_SOT23 S 2N7002_SOT23 S Security Classification Compal Secret Data Compal Electronics, Inc.
1
SCHEMATIC A6855
Custom D
4019AD
A B C D E
A B C D
VIN
PL1
PF1 SMB3025500YA_2P
DC301001M80 DC_IN_S1 1 2 DC_IN_S2 1 2
PJP1 5A_24V_0466005.NR
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1
-
PC4
PC1
PC2
PC3
1 1
2
+
@ SINGA_2DW-0005-B03
VIN
2
PD3
RLS4148_LL34-2
1
1
1
PQ4 PR8 PR9
68_1206_5% 68_1206_5%
BSS84_SOT23-3
2
PD4
2 1 N1 3 1
BATT+ VS
2 2
RLS4148_LL34-2
1
PR10 PC6
1
100K_0402_1% 0.22U_0603_25V7K PC5
2
0.1U_0603_25V7K
2
2
PR11
51_ON# 1 2
22K_0402_1%
PJ330 PJ150
+3VALWP 2 2 1 1 +3VALW +1.5VSP 2 2 1 1 +1.5VS
@ JUMP_43X118 @ JUMP_43X118
(6A,200mils ,Via NO.= 10) (54.1A,240mils ,Via NO.= 12)
(OCP min=8A) (OCP min=6.03A)
PJ350 PJ105
+5VALWP 2 2 1 1 +5VALW +1.05VSP 2 2 1 1 +1.05VS
3 3
@ JUMP_43X118 @ JUMP_43X118
(5.5A,200mils ,Via NO.= 10) (3.5A,140mils ,Via NO.=7)
(OCP min=7.8A)
PJ180
PJ5 2 1
+1.8VP 2 1 +1.8V
+VSBP 2 1 +VSB
2 1
@ JUMP_43X118
@ JUMP_43X39
(3A,20mils ,Via NO.= 1)
(120mA,40mils ,Via NO.= 1)
PJ75 PJ89
+0.9VSP 2 2 1 1 +0.9VS +0.89VSP 2 2 1 1 +0.89VS
@ JUMP_43X79 @ JUMP_43X118
(0.5A,60mils ,Via NO.= 3) (2.6A,120mils ,Via NO.=6)
4 PJ331 4
+3VLP 2 2 1 1 +3VL
@ JUMP_43X39
(100mA,40mils ,Via NO.= 2)

SCHEMATIC A6855
Size
Document Number Rev
D
4019AD
A B C D
A B C D
1
VMB 1
7A_24VDC_429007.WRML PL2 PH1 under CPU botten side :

PJP2 PF2 SMB3025500YA_2P
9 9 BATT_S1 1 2 1 2 BATT+
CPU thermal protection at 95 degree C
8
8
7 7 Recovery at 56 degree C
6 BATT_P4
6 BATT_P5
5 5
EC_SMDA
1
10 GND 4 4
11 3 EC_SMCA PC7 PC8
1
GND 3 0.01U_0402_25V7K
2 1000P_0402_50V7K
2 PR14
2
1 1 1K_0402_1%
@ SUYIN_200045MR009G171ZR
2
PD6
VL
1
PJSOT24C_SOT23-3
1
PD5 2
PJSOT24C_SOT23-3 1 PR15
3
1
PR16 19.6K_0402_1%
6.49K_0402_1% PC9
3
2
2 1 0.1U_0402_25V6
2
+3VL
2
PR18
1
8.66K_0402_1%
PR19 PU1
1
2 2
1 8
1
1K_0402_1% VCC TMSNS1
PH1
2 7
2
GND RHYST1
2
100K_0402_1%_NCP15WF104F03RC
PR20 PR21 BATT_TEMPA 3 6
2
OT1 TMSNS2
100_0402_1% 100_0402_1%
4 OT2 RHYST2 5
VS_ON
1
G718TM1U_SOT23-8
EC_SMB_DA1
EC_SMB_CK1
PQ5
BSS84_SOT23-3
B+ 3 1 +VSBP
3 3
0.22U_0603_25V7K
100K_0402_1%
1
PC10
1
1
PR23
PC11 @
VL @ 0.1U_0603_25V7K
2
2
2
PR24
2
1 2
PR25 22K_0402_1%
100K_0402_1%
1
D
PR26
1 2 2 PQ6
POK
G SSM3K7002FU_SC70-3
0_0402_5%
S
3
1
@ PC12
.1U_0402_16V7K
2
4 4

SCHEMATIC A6855
Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019AD D
A B C D
A B C D
47P_0402_50V8J
10U_1206_25V6M
10U_1206_25V6M
PC228
1
2PC2271
1
PC209
PR215
B+ CHG_B+
P2 PQ204 P3 0.05_1206_1% PQ207
PD203
2
AO4407A_SO8 PL201 AO4435_SO8
VIN 2 1 1 8 1 4 2 1 1 8
2 7 1.2UH_1127AS-1R2N_2.4A_30% 2 7
PC222 2200P_0402_50V7K
3 6 2 3 CSIN 3 6
PC208 0.1U_0402_25V6
PC224 47P_0402_50V8J
B340A_SMA2 PC225
10U_1206_25V6M
5 PC226 5
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
CSIP
1
4
4
1
1
1 1
PC231
PC232
1
PC233
1
PC207
VIN
2
PC211 PR236
1 2
2
VIN
2
1
2
5600P_0402_25V7K
2
47K_0402_1%
0.1U_0603_25V7K
1
1
2
6251VDD
PR210
200K_0402_1% PR212 PR226 PR237
2
ACSETIN
PC210
200K_0402_1% 191K_0402_1% 10K_0402_1%
2.2U_0603_6.3V6K
2
PD201
1
1000P_0402_25V8J
RB751V-40_SOD323-2 ACSETIN
1
PC212
1 1
3
1
1
PC217
47K
2
PR228
PR227 14.3K_0402_1%
2 47K
2
PR216 10_1206_5%
2
PQ210 10K_0402_1%
2
FSTCHG 2 1 PU200
1
1
PDTA144EU_SOT323-3 PC218
1 24 DCIN 2 1
1
VDD DCIN
1
1
0.1U_0603_25V7K
PR213 PR217 PQ215
BATT_ON 2 2 23 ACPRN 2
PQ211 150K_0402_1% 100K_0402_1% ACSET ACPRN DTC115EUA_SC70-3
DTC115EUA_SC70-3 PR229 20_0402_5%
2
2
6251_EN 3 22 1 2 CSON
6
D EN CSON
1
PC219
3
3
5
2 0.047U_0402_16V7K
G PR238
4 21 1 2 CSOP
1
CELLS CSOP 100K_0402_1%
PR230 20_0402_5%
AON4708L
S PQ212A PC213
1
2
PQ201
2 DMN66D0LDW-7_SOT363-6 1 2 5 20 PR2312 1 20_0402_5% 2
ICOMP CSIN
2
PC220 4
PQ212B PC214 PR218 6800P_0402_25V7K BATT_ON
0.1U_0603_25V7K
DMN66D0LDW-7_SOT363-6 1 2 1 2 6 19 1 2
1
VCOMP CSIP PL202
3
D
10K_0402_1% PR232 2_0402_5% PR235
5 0.01U_0402_25V7K PR219 10UH_MPL73-100_3A_20% BATT+
3
2
1
G 1 2 7 18 LX_CHG 1 2 CHG 1 4
ADP_I ICM PHASE
47K_0402_1%
1
5
S PC215 2 3
PC229 2200P_0402_50V7K
4
PR211 1 2 6251VREF 8 17 DH_CHG

47K_0402_1% PR220 VREF UGATE PR206
0.02_1206_1%
PC204 0.1U_0402_25V6
10U_1206_25V6M
10U_1206_25V6M
AON4708L
PACIN 1 2 309K_0402_1% .1U_0402_16V7K PR205 PC205 4.7_1206_5%
PQ202
IREF 2 1 9 16 BST_CHG 1 2 BST_CHGA 2 1
2
CHLIM BOOT
1
0_0603_5% 4
0.01U_0402_25V7K
1
1
0.1U_0603_25V7K
1
PC202
PC203
PR222 PD202
1
1
6251VREF
1 2 6251aclim 10 15 6251VDDP PC206
ACLIM VDDP
1
PQ213 RB751V-40_SOD323-2
2
PC216
2
24.9K_0402_1% 680P_0603_50V7K
2
DTC115EUA_SC70-3 PR221 1 2 6251VDD
2
3
2
1
ACOFF 2 100K_0402_1% 11 14 DL_CHG PR233 4.7_0603_5%
ACOFF
2
VADJ LGATE
1
2
2
PC221
PR223 12 13 4.7U_0603_6.3V6M
1
GND PGND
20K_0402_1%
3
ISL6251AHAZ-T_QSOP24
CP mode PR224
CHGVADJ 1 2
3 Iada=0~1.579A(30W) CP= 92%*Iada; CP=1.45A 15.4K_0402_1% 3
2
Vaclim=1.01832V(30W) PR70=53.6k PR215=0.05

PR225
31.6K_0402_1%
VIN
1
6251VDD
CC=0.25A~2A CHGVADJ=(Vcell-4)*9.455
IREF=1.636*Icharge Vcell CHGVADJ
IREF=0.409V~3.272V 4V 0V
1
PR241
1
VCHLIM need over 95mV 4.2V 1.898V 10K_0402_1% PR246

PR240 1 2
- 4.35V 3.309V 47K_0402_1% PR242 ACIN 309K_0402_1%
10K_0402_1% PR247
2
10K_0402_1%
2
Ki PACIN 1 2 ADP_V
Vchlim=Iref*(PR221/(PR220+PR221))
1
=Iref*(100K/(309K+100K))
1
PQ214
Vin Detector
1
=Iref*0.2444 DTC115EUA_SC70-3 PR248 PC223
1
Ichanrge=(165mV/PR235)*(Vchlim/3.3V) 47K_0402_1% .1U_0402_16V7K

ACPRN 2
=(165m/20m)*(1/3.3V)*Iref*0.5537 PR243
2
14.3K_0402_1% High 18.089V
2
=0.611*Iref
Iref=1.636*Ichanrge =>Ki=1.636 Low 17.44V
2
3
Kv
4 4
Rinternal ic=514K Rec=3K R1=PR224=15.4K R2=PR225=31.6K
R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899 Security Classification Compal Secret Data Compal Electronics, Inc.
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv Issued Date 2010/01/25 Deciphered Date 2009/04/28 Title
A=Vref*(R/(R+514K))=0.052
SCHEMATIC A6855
Kv=9.455 Size Document Number Rev
A B C D
5 4 3 2 1
2VREF_6182
D D
1
PC363
1U_0402_6.3V6K
2
PR362 PR364
13K_0402_1% 30K_0402_1%
1 2 1 2
PR363 PR365
UP6182_B+ 20K_0402_1% 19.1K_0402_1%
1 2 1 2 UP6182_B+
PL331
HCB2012KF-121T50_0805
ENTRIP1
ENTRIP2
B+ 1 2 +3VLP
0.1U_0402_25V6
PR337
PC366 10U_1206_25V6M
PR357
2200P_0402_50V7K
120K_0402_1% 120K_0402_1%
PC360 10U_1206_25V6M
PC375 47P_0402_50V8J
0.1U_0402_25V6
2200P_0402_50V7K
1 2 1 2
PC368
1
1
1
4.7U_0603_6.3V6K
5
5
2
2
1
PQ331 PQ351
PC361
VREF
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
2
2
2
PC372
C C
AON7408L
25
PC374
2
P PAD AON7408L
PC367
4 4
7 VO2 VO1 24 POK
PC335 8 VREG3 PGOOD 23 PC355

PR335 PR355
1
2
3
3
2
1
0.1U_0603_25V7K
1 2 1 2 BST_3V 9 VBST2 VBST1 22 BST_5V 1 2 1 2 0.1U_0603_25V7K
PL332 0_0603_5% 0_0603_5% PL352
UG_3V 10 21 UG_5V
4.7UH_FDVE0630-H-4R7M=P3_5.5A_20% DRVH2 DRVH1 4.7UH_FDVE0630-H-4R7M=P3_5.5A_20%
LX_3V LX_5V
+5VALWP
+3VALWP 1 2 11 LL2 LL1 20 1 2
5
2200P_0402_50V7K
1
1
LG_3V 12 19 LG_5V
DRVL2 DRVL1
@ PR336
SKIPSEL
@ PR356
150U_B_6.3VM_R45M
VREG5
0.1U_0402_25V6
PU330
0.1U_0402_25V6
4.7_1206_5% 4.7_1206_5%
VCLK
1
GND
1
EN0
VIN
1
4 4
1
PC371
2
2
PC369
+ +
PC352
PC332
S TR AON7702L
TPS51125ARGER_QFN24_4X4
S TR AON7702L
PQ332
PR360
13
14
15
16
17
18
1
1
PQ352
150U_B_6.3VM_R45M @ PC336 499K_0402_1%
2
2
2 @ PC356 2
B+ 1 2
1
2
3
3
2
1
680P_0603_50V7K 680P_0603_50V7K
PC236
2
2
Ipeak=6A
100K_0402_5%
1
1
Imax=4.2A VL
PR361
PC362
F=375KHz
1
1U_0402_6.3V6K
PC364
2
B Total Capacitor 150uF, 4.7U_0603_6.3V6K
B
2
ESR 35mohm ENTRIP1 ENTRIP2 UP6182_B+ Ipeak=5.5A
2
Imax=3.85A
F=300KHz
6
D
3
PQ360A
2 5 Total Capacitor 150uF,
G G PQ360B
ESR 35mohm
1
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 PC365
S S
2VREF_6182
1
0.1U_0603_25V7K
2
PR370
VL 2 1
100K_0402_1%
1
VS_ON PQ361
DTC115EUA_SC70-3
PR371
VS 1 2 2
100K_0402_1%
42.2K_0402_1%
1
1
PR372
@ PC370
0.1U_0402_16V4Z
2
2
A A

SCHEMATIC A6855
D
4019AD
5 4 3 2 1
A B C D
1 1
PL151
HCB2012KF-121T50_0805
1.8_B+ 1 2 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
2200P_0402_50V7K
0.1U_0402_25V6
1
1
1
1
PC163
1
PC168
PC164
PC165
5
PC169
2
2
2
2
2
AON4708L
PR164
PQ151
255K_0402_1%
4
1 2
PR160
SYSON 1 2 PR155
BST_1.8V 1 2
0_0402_5%
3
2
1
0_0603_5%
1
PL152
15
14
PC160 @
1
PU150 PC155 2.2UH_PCMC063T-2R2MN_8A_20%
.1U_0402_16V7K BST_1.8V-1 1 2 2 1 +1.8VP
EN_SKIP
TP
BST
2
2 13 DH_1.8V 0.1U_0603_25V7K
S TR AON7702L 1N DFN
TON DH
3 12 LX_1.8V Ipeak=4.5A
OUT LX
220U_B2_2.5VM
PR161 PR157 Imax=3.15A
0.1U_0402_25V6
1 2 4 11 1 2 @ PR156
@PR156 1
+5VALW VCC
VFB=0.75V ILIM +5VALW 4.7_1206_5% F=313KHz
1
10K_0402_1%
PQ152
100_0603_5%
PC152
PC167
5 10 +
2 FB VDD Total Capacitor 220uF, 2
2
1
DL_1.8V
2
PC161 6 PGOOD DL 9 4 ESR 25mohm
2
AGND
PGND
4.7U_0603_6.3V6K
2
2
@ PC156
1
PC162
G5603RU1U_TQFN14_3P5X3P5 4.7U_0805_10V6K 680P_0603_50V7K
3
2
1
2
PR162
1 2
28.7K_0402_1%
1
PR163
20.5K_0402_1%
2
3
+1.8V 3
1
PJ90
1
JUMP_43X79
@
2
2
PU75
1 VIN VCNTL 6 +3VALW
PC260 2 5
GND NC
2
4.7U_0805_6.3V6K
1
3 7 PC261
PR261 VREF NC
1
1K_0402_1% 4 8 1U_0603_10V6K
VOUT NC
9
2
TP
G2992F1U_SO8
.1U_0402_16V7K
PR262
+0.9VSP
1
D
SSM3K7002FU_SC70-3
0_0402_5%
PQ261
1K_0402_1%
PC263
1 2 2
SUSP
1
G
2
S PR263 PC264
3
1
10U_0603_6.3V6M
2
PC262
.1U_0402_16V7K
2
4 4
For shortage changed

SCHEMATIC A6855
A B C D
A B C D
1 1
+1.8V +5VALW
1
PJ151
@ JUMP_43X39
1
2
1U_0603_10V6K
PC181
2
2
2 2
1
PC182
2
4.7U_0805_25V6-K
PU180
6 VCNTL
5 VIN VOUT 3 +1.5VSP
PR181 9 4
VIN VOUT
0.01U_0402_25V7K
0_0402_5%
PC183
SUSP# 1 2 8 EN
22U_0805_6.3V6M
7 2 PR182
GND
POK FB
1
2.7K_0402_1%
2
1
PC184
@ PC185
2
APL5930KAI-TRG_SO8
2
0.47U_0402_6.3V6K
1
PR183
3K_0402_1%
2
3 3
PU400
SY8033BDBC_DFN10_3X3 PL400
4
@ PJ400 1UH_PCMC063T-1R0MN_11A_20%
+5VALW 2 1 10 2 LX_1.05V 1 2 +1.05VSP Ipeak=3.5A
PG
2 1 PVIN LX
ILIM = 2.45A
68P_0402_50V8J
JUMP_43X39 9 3
PVIN LX
1
F=1MHz
4.7_1206_5%
1
1
PC402
PC405 8 SVIN Total Capacitor66uF,
PR403
22U_0805_6.3V6M PR404
22U_0805_6.3V6M
6 10K_0402_1%
22U_0805_6.3V6M
2
2
FB
5
2
EN
1
NC
NC
TP
PC404
PC403
2
FB=0.6Volt FB_1.05V
680P_0603_50V7K
11
2
PR402
1
SUSP# 1 2 EN_1.05V
1
PC406
0_0402_5% PR405
13.7K_0402_1%
1
2
1
@ PR401 PC401@
2
499K_0402_1% 0.1U_0402_10V7K
2
2
Pin 1 define same with Pin 2 & Pin 3 that just for SY8035 ,
4
SY8035 is for 5A loading , let LX shape can bigger!! 4

SCHEMATIC A6855
A B C D
A B C D
1 1
2 2
PU89
SY8033BDBC_DFN10_3X3 PL89
4
@ PJ891 1UH_PCMC063T-1R0MN_11A_20%
+5VALW 2 1 10 2 LX_0.89V 1 2 +0.89VSP Ipeak=3A
PG
2 1 PVIN LX
ILIM = 2.1A
68P_0402_50V8J
JUMP_43X39 9 3
PVIN LX
1
F=1MHz
4.7_1206_5%
1
1
PC272
PC275 8 SVIN Total Capacitor 330uF,
PR273
22U_0805_6.3V6M PR274
ESR 9mohm
22U_0805_6.3V6M
6 FB=0.6Volt 10K_0402_1%
22U_0805_6.3V6M
2
2
FB
5
2
EN
1
NC
NC
TP
PC274
PC273
2
FB_0.89V
680P_0603_50V7K
11
2
PR272
1
SUSP# 1 2 EN_0.89V
1
PC276
0_0402_5% PR275
21K_0402_1%
1
2
1
@ PR271 PC271@
2
499K_0402_1% 0.1U_0402_10V7K
2
3 3
2
Pin 1 define same with Pin 2 & Pin 3 that just for SY8035 ,
SY8035 is for 5A loading , let LX shape can bigger!!
4 4

SCHEMATIC A6855
A B C D
A B C D E F G H
1 1
CPU_VID3
CPU_VID4
CPU_VID6
CPU_VID1
CPU_VID2
CPU_VID5
CPU_VID0
VR_ON
+3VS
100P_0402_50V8J
PC518
10K_0402_1%
1
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PR504
+5VALW
2
+CPU_B+ PL500
2
HCB2012KF-121T50_0805
2
PR505
PR501
PR507
PR508
PR509
PR511
PR512
PR513
PR514
0_0402_5% 1 2 B+
4700P_0402_25V7K
2200P_0402_50V7K
13211_PWRGD PR510
4.7U_0805_25V6M
4.7U_0805_25V6M
VGATE 2
10_0603_1%
0.1U_0402_25V6
1
1
PC500
PC501
PC503
PC505
PC504
3211_EN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
2
1
3211_VCC
5
+3VS PC507
1U_0805_25V6K
32
31
30
29
28
27
26
25
2
PQ501
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
1
PR519 PC519 AON7408L
VCC 24 4
PR515 1 0_0603_5% 0.22U_0603_25V7K
PWRGD
10K_0402_1%
BST 23 CPU_BOOST 1 2CPU_BOOST-1
1 2
1
2
PC509 IMON 3211_DRVH PL501
22 PJ501
3
2
1
1000P_0402_50V7K CLK_ENABLE# CLK_ENABLE# DRVH 1UH_PCMC063T-1R0MN_11A_20%
2 3 2
2
CLKEN# 3211_SW +CPU_COREP

21 1 2 1 2
4
SW 1 2 +CPU_CORE
FBRTN
1
ADP3211AMNR2G_QFN32_5X5 20 +5VALW @
PVCC JUMP_43X118
5
1 2 3211_FB 5 FB PU500 3211_DRVL @ PR506
19 2 1
AON7212L
DRVL
PC510 PC512 1 3211_COMP 6
COMP
4.7_1206_5%
PQ502
390P_0402_50V7K 47P_0402_50V8J 18 PC511 LL=5.9m ohm
2
PGND 2.2U_0603_10V6K
7
2
1 2 1 23211_COMP-1
1 2
GPU
17 4
OCP=12A
AGND
1
3211_ILIM 8 VID:0.75V~1.1V
CSCOMP
PR518 PC513 PR517 ILIM @ PC506
33
CSREF
AGND Io(max)=6.3A
RAMP
LLINE
CSFB
1K_0402_1% 470P_0402_50V8J 28K_0402_1% 680P_0603_50V7K
IREF
RPM
2
RT
3
2
1
9
10
11
12
13
14
15
16
2
PR516
4.22K_0402_1%
3211_IREF
3211_RAMP
3211_RT
3211_CSCOMP
3211_CSFB
3211_CSCOMP
2 3211_RPM
PH500
3211_CSCOMP 1
100K_0402_1%_TSM0B104F4251RZ
80.6K_0402_1%
1 2
200K_0402_1%
274K_0402_1%
2
2
PR520
Avoid high dV/dt

Place RTH1 close to inductor
PR521
PR522
PR523
35.7K_0402_1%
on the same layer
1
499K_0402_1%
2 1
1
1
2
PR524
1
PR502 PR503
1
0_0402_5% 0_0402_5% PC515
330P_0402_50V7K PR525
2
PC514 75K_0402_1%
1
2
680P_0402_50V7K
2
PR527 2 1
1K_0402_1%
3 3
+CPU_B+ 2 1 3211_RAMP-1 PR526
124K_0402_1%
VSSSENSE
VCCSENSE
Connect to input caps

1
PC516 PC517
1000P_0402_50V7K 1000P_0402_50V7K
2
Shortest the
net trace
4 4

SCHEMATIC A6855
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019AD
A B C D E F G H
NO DATE PAGE MODIFICATION LIST PURPOSE
------------------------------------------------------------------------------------------------------------------------------
2010/8/23(DVT) P30 Charger Install PC222 PC224 0.1u (SE00000G880) EMI commond
2010/8/23(DVT) P30 Charger Install PC227,PC209,PC207,PC208,PC204 10u (SE142106M80 ) EMI commond
2010/8/23(DVT) P31 +5VALWP/+3VALWP Install PC371,PC369 0.1u (SE00000G880 ) RF commond
2010/8/23(DVT) P31 +5VALWP/+3VALWP Install PC367 2200P(SE074222K80 ) RF commond

2010/8/23(DVT) P32 +1.5VP Install PC165 2200P(SE074222K80 ) RF commond
2010/8/23(DVT) P32 +1.5VP Install PC169,PC168,PC167 0.1u(SE00000G880 ) RF commond
2010/9/21(PVT) P30 Charger Install PC225 PC208PC204 ( 0.1u) , PC226 PC222 PC229(2200P) RF commond
Add PC208 add PC228 PC224 (47P),install snubber PR206,PC206
2010/9/21(PVT) P31 +5VALWP/+3VALWP Add PC372 PC374(0.1u) , PC375(47P) PC371 (2200P) RF commond
2010/9/21(PVT) P32 +1.5VP Add PC170(2200P) install snubber PR156 PC156 RF commond
2010/10/8(pre-MP) P30 Charger Change PL210 to 1.2u (SH00000B100) EMI commond
2010/10/08(Pre-MP)P31 +5VALWP/+3VALWP Change PC332 & PC352 to ESR 45 m ohm cost down plane
2010/10/08(Pre-MP) P32 +1.8VP Change PC152 to ESR 35 m ohm cost down plane

SCHEMATIC A6855
D
4019AD

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A B C D E

Security Classification Compal Secret Data Compal Electronics, Inc.

Fan Control EMC1402 ICS9LVRS387AKLFT MLF

LED Conn. LVDS

Security Classification Compal Secret Data Compal Electronics, Inc.

EC SM Bus1 address EC SM Bus2 address

ICH7M SM Bus address

Clock Generator 1101 001Xb

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/27 Deciphered Date 2011/6/27 Title

B+ DESIGN CURRENT 250mA Cougar Power Map

Ipeak=3.98A, Imax=2.8A +5VALWP +-5%

DESIGN CURRENT 2640mA

SY8033BDBC Ipeak=1.308A, Imax=4A +1.05VSP +-5%

B Imax=3.5A DESIGN CURRENT 6000mA +CPU_CORE B

DESIGN CURRENT 500mA

Security Classification Compal Secret Data Compal Electronics, Inc.

<7> XDP_TCK XDP_TCK @

Security Classification Compal Secret Data Compal Electronics, Inc.

T8 D12 XDP_RSVD_00 REV = 1.1 REV = 1.1

T26 RSVD_TP T47 BPM_1_1# BCLKN CLK_CPU_BCLK# <9>

R518 placed within 0.5" placed within 0.5" of processor

H_DPSLP# C955 1 @2 220P_0402_50V7K

H_A20M# C957 1 @2 220P_0402_50V7K

1880mA U5 VCCA_DDR AH28 VSS VSS P16

U8 VCCA_DDR AH8 VSS VSS P21

+VCC_CRT_DAC C150 22P_0402_50V8J VSS VSS

VCCACRTDAC +DMI_HMPLL RSVD_NCTF

VCCRING_WEST VCCA_DMI 2 VSS VSS

+0.89VS RF@ R538

+3VM_CK505 2010.03.23 Change R81 from bead to 0 ohm

56 CLK_PCIE_WLAN# LAN_CLKREQ# R101 2 1 10K_0402_5%

FSB <13> H_STP_PCI# PCI_STOP# @ C1067 56P_0402_50V8

R489 7/13 Add 33pF to GND for RF request 1 2 48 CLK_PCIE_WWAN

@ R491 Pin28/29 : 27M/27M_SS 69 58 WLAN_CLKREQ#

<6> DDR_A_DQS#[0..7] JDDR1

1 0.1U_0402_16V4Z +1.8V DDR_A_D16 61 62 DDR_A_D20

Security Classification Compal Secret Data Compal Electronics, Inc.

PORT #EVT DEVICE

TIGERPOINT_ES1_BGA360 USB20_P5_L 4 3 USB20_P5

# PVT C225, C226 add 2010.07.12 RF request

Security Classification Compal Secret Data Compal Electronics, Inc.

2.2K_0402_5% 1 R560 2 PCH_SMBCLK

C1027 LAN_TXD2 RI# T42

1K_0402_5% 1 R585 2 MCH_SYNC#

+RTCBATT @ U5 @ D7B @D7A

A 1 GND R126 @ R590

2 Security Classification Compal Secret Data Compal Electronics, Inc.

C +V5REF_SUS +VCC1_05 1 VSS28 C

Security Classification Compal Secret Data Compal Electronics, Inc.

Place closed to conn.

Place closed to conn. 0.1U_0402_16V4Z

SN74AHCT1G125DCKR_SC70-5 CRT_VSYNC_1 R150 1 2 39_0402_5% VSYNC

SN74AHCT1G125DCKR_SC70-5 3/29 PVT:Change F1 from SC04301P000 to SP04301P120.

R151 R152 JCRT

Security Classification Compal Secret Data Compal Electronics, Inc.

LCD POWER CIRCUIT

+LCDVDD R377 1 2 0_0805_5% (20 MIL) +LCDVDD_R 1

For EMI request

Mini-Express Card for WLAN/WiMax 2/25 PVT:Mount C479,C480 with 47pf

WL_OFF_R# 2 1 WL_OFF# <24>

Mini-Express Card for 3G/GPS 1 2