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RT8566
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
……
……
100 0 12
SEN 17
LED8
RSENSE CF
100m 1nF RSTATUS
100k
VIN
RDRV STATUS 6 FLT
5 14 DRV RISET
2 4.53k
RISET
1k 4 PWM
PWM Signal RRT 56k
8
RT
Chip Enable 1k 11 CSS 0.1µF
EN
SS 10
RC CREG 1µF
560 15
9 CREG
VC
CC
0.22µF PGND GND
13 25, 26, 27, 28,
29 (Exposed Pad)
100 0 12
SEN 17
RSENSE LED8
CF
100m 1nF RSTATUS
100k
VIN
RDRV STATUS 6 FLT
5 14 DRV RISET
2 4.53k
1k RISET
4 PWM
PWM Signal RRT 56k
8
RT
Chip Enable 1k 11
EN CSS 0.1µF
SS 10
RC
560 CREG 1µF
9 15
VC CREG
CC
0.22µF PGND GND
13 25, 26, 27, 28,
29 (Exposed Pad)
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
RT OSC OVP
VCC -
S UVP
UVLO +
OTP
R
OVP/UVP + R LED Short
1.2V -
- LED1
UVP +
…………………
0.6V +
-
EN -
-
+
1.2V + Shutdown
5V
CREG LED8
LDO VOUT +
VC Regulation 5V -
Unit
6µA
SS
GND
PWM + PGND
-
RISET
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Electrical Characteristics
(VCC = 12V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Supply Voltage
Supply Current IVCC Switching Off -- 5 -- mA
Shutdown Current ISHDN VEN 0.7V -- -- 10 A
VDD LDO Output VCREG -- 5 -- V
VDD LDO Capability ICREG 30 -- -- mA
VCC Rising -- -- 8
VCC UVLO Threshold VUVLO V
Hysteresis -- 1.4 --
EN Input Logic-High VENH 1.5 -- -- V
Threshold Voltage Logic-Low VENL -- -- 0.8 V
LED Current Programming
LED Current Accuracy RISET = 4.53k, V PWM 1.2V 114 120 126 mA
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions may affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC
is measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
100
140
LED Current (mA)
95
VIN
90
Efficiency (%)
(5V/Div)
85
DRV
(5V/Div)
80
75 I IN
(1A/Div) VIN = 12V, CSS = 0.1μF,
96LEDs, RISET = 4.3kΩ 96LEDs, RISET = 9.1kΩ
70
8 10 12 14 16 18 20 22 24 26 28 Time (5ms/Div)
Input Voltage (V)
VEN PWM
(2V/Div) (2V/Div)
DRV DRV
(5V/Div) (5V/Div)
I IN I IN
VIN = 12V, CSS = 0.1μF, VIN = 12V, CSS = 0.1μF,
(1A/Div) (1A/Div)
96LEDs, RISET = 9.1kΩ 96LEDs, RISET = 9.1kΩ
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Compensation R
VOUT(UVP) = VUVP x 1 + OVP2
The regulator loop can be compensated by adjusting the R OVP1
external components connected to the VC pin. The VC where ROVP1 and ROVP2 are the resistors in the resistive
pin is the output of the internal error amplifier. The voltage divider connected to the OVP/UVP pin. If at least
compensation capacitor will adjust the integrator zero to one string is in normal operation, the controller will
maintain stability and the resistor value will adjust the automatically ignore the open strings and continue to
frequency integrator gain for fast transient response. regulate the current for the strings in normal operation.
Typical values of the compensation components are RC = Suggested value for ROVP2 is up to 3MΩ to prevent loading
560Ω, CC = 0.22μF. effect.
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
IOUT x D 2.0
COUT = 1.6
VOUT x f
1.2
where ΔVOUT is the peak-to-peak ripple voltage at the
0.8
output.
0.4
0.0
Thermal Considerations 0 25 50 75 100 125
For continuous operation, do not exceed absolute Ambient Temperature (°C)
maximum junction temperature. The maximum power
Figure 3. Derating Curve for RT8566 Packages
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The Layout Considerations
maximum power dissipation can be calculated by the Careful PCB layout is very important for designing
following formula : switching power converter circuits. The following layout
PD(MAX) = (TJ (MAX) − TA) / θJA guidelines should be strictly followed for best performance
of the RT8566.
where TJ (MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJAis the junction to ambient The power components L1, D1, CIN, COUT must be placed
thermal resistance. as close as possible to the IC to reduce current loop.
The PCB trace between power components must be as
For recommended operating condition specifications of
short and wide as possible.
the RT8566, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient The compensation circuit should be kept away from
thermal resistance, θJA, is layout dependent. For TSSOP- the power loops and shielded with a ground trace to
28 (Exposed Pad) packages, the thermal resistance, θJA, prevent any noise coupling. Place the compensation
is 28°C/W on a standard JEDEC 51-7 four-layer thermal components, RC and CC, as close as possible to pin 9.
test board. The maximum power dissipation at TA = 25°C The exposed pad of the chip should be connected to
can be calculated by the following formula : ground plane for thermal consideration.
PD(MAX) = (125°C − 25°C / (28°C/W) = 3.571W for
TSSOP-28 (Exposed Pad) package
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
RF2 RF1
Place the power
components as close as
CF RSENSE
possible to the IC. The
traces should be wide
PGND and short especially for
the high-current loop.
Copyright © 2013 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.