Digital-to-Analog

Analog-to-Digital
Conversions
Microprocessor Interface
▪Both data about the physical world and control signals sent to
interact with the physical world are typically "analog" or continuously
varying quantities.
 Data Handling Systems

▪ In order to use the power of digital electronics, one must convert

from analog to digital form on the experimental measurement
and convert from digital to analog form on the control or output
end of a laboratory system.
MDAC
Advantages : strong linearity, low noise, fastest switching, lower
glitch vs. R-2R, constant reference loading
Disadvantages: transimpedance output stage, output is inverted with
respect to the reference
Analog/Digital Conversion
[ADC]
Analog/digital conversion

n*Ts
 ADC Basic Principle
The Comparator: a 1-Bit ADC
▪ If the input is above a threshold,
the output has “1” logic value, if
below it has a “0” logic value.
▪ There is no ADC architecture
which does not use at least one
comparator of some sort.
▪ So while a 1 bit ADC is of very
limited usefulness it is a building
block for other architectures.
 ADC Various Approaches
Some Basic Types of ADC
▪ Digital-Ramp (counter) ADC
▪ Successive Approximation ADC
▪ Dual slope ADC
▪ Flash ADC
▪ Pipeline ADC
▪ ΔΣ ADC

• The dual slope, used mostly in measurement instruments such as a digital

voltmeter, has a slow sampling rate
• Successive-approximation ADCs have good resolution and moderately high sampling
rate
• Flash converter offers the fastest sampling but typically has lower resolution
• The pipeline converter employs multiple flash converters to extend the resolution
but retain high speed.
• Delta-sigma (ΔΣ) offers very high resolution, but lower sampling speed
 Digital-Ramp ADC
▪ Conversion from analog/digital form inherently involves comparator
action where the value of the analog voltage at some point in time is
compared with some references.
▪ A common way to do that is to apply the analog voltage to one
terminal of a comparator and trigger a binary counter which drives a
DAC.
Digital-Ramp ADC
 Digital-Ramp ADC
▪ The output of the DAC is applied to the other terminal of the
comparator
▪ Since the output of the DAC is increasing with the counter, it will
trigger the comparator at some point when its voltage exceeds the
analog input
▪ The transition of the comparator stops the binary counter, which at
that point holds the digital value corresponding to the analog voltage
Tracking ADC
Flash ADC
Fundamental Components
• 2N-1 Comparators
• 2N Resistors
• Control Logic/encoder
 Flash ADC
Advantages
• Very fast
• Very simple operational theory
• Speed is only limited by gate and comparator propagation delay

Disadvantages
• Needs many parts (256 comparators for 8-bit ADC)
• Lower resolution
• Expensive
• High power consumption
• Prone to produce glitches in the output
• Each additional bit of resolution requires twice the comparators
Successive Approximation Register ADC
 Successive Approximation Register ADC
Advantages
• Capable of high speed
• Medium accuracy compared to other ADC types
• Good tradeoff between speed and cost

Disadvantages
• Higher resolution SAR ADCs will be slower
• Speed limited ~10 Msps
 Dual Slope ADC

Fundamental components
▪ Integrator, VREF, Switches, Counter, Clock, Control Logic, Comparator
• The input signal is applied to an integrator; at the same time a counter is
started, counting clock pulses. After a predetermined amount of time (T),
a reference voltage having opposite polarity is applied to the integrator.
At that instant, the accumulated charge on the integrating capacitor is
proportional to the average value of the input voltage over the interval T.
The integral of the reference is an opposite-going ramp having a slope of
VREF/RC. At the same time, the counter is again counting from zero. When
the integrator output reaches zero, the count is stopped, and the analog
circuitry is reset.
• Since the charge gained is proportional to VIN · T, and the equal amount of
charge lost is proportional to VREF · tx, then the number of counts relative to
the full scale count is proportional to tx/T, or VIN/VREF.
• If the output of the counter is a binary number, it will therefore be a binary
representation of the input voltage.
• Dual-slope integration has many advantages. Conversion accuracy is
independent of both the capacitance and the clock frequency, because they
affect both the up-slope and the down-slope by the same ratio.
 Dual Slope ADC
Advantages
• Input signal is averaged
• Greater noise immunity than other ADC types
• High accuracy

Disadvantages
• Slow
• High precision external components required to achieve accuracy
• Expensive
 ΔΣ ADC

• The main circuit of a ΔΣ converter, as seen in this simplified block, is the modulator.
• The input signal is applied to a differential amplifier that subtracts the DAC output.
• The difference value is then integrated and the output result is compared to GND
• The comparator output sets/resets the D flip flop (FF)
• The output of the D FF is sent to a 1-bit DAC whose output is either the reference
voltage/zero.
 ΔΣ ADC
Advantages

• High resolution
• No precision external components needed

Disadvantages

• Slow due to oversampling

• Only good for low bandwidth
• Complex

https://www.analog.com/media/en/training-seminars/tutorials/MT-022.pdf
https://www.analog.com/media/en/training-seminars/tutorials/MT-023.pdf
https://www.electronicdesign.com/adc/what-s-difference-between-sar-and-delta-sigma-adcs
https://www.youtube.com/watch?v=SFAS8nE4_ZM
 Key ADC Specifications
Resolution: Resolution is the number of possible output bits that an ADC can generate per
conversion. Resolution is also the smallest analog increment corresponding to a one LSB
converter change. Moreover, analog resolution determines the smallest analog input signal that
can be represented.

Accuracy: Related to resolution, accuracy reveals how close a converter output comes to
representing its maximum possible theoretical resolution. Accuracy of an ADC is determined by
the quantization noise, nonlinearities in the transfer function, and by additional sources of
noise in the ADC.

Sampling speed: Sampling speed is the highest number of conversions that can be made per
second. For example, an ADC may be able to output 10 million samples per second (10
Msamples/s). Sampling speed is related to conversion time or the period of time it takes to
output one conversion. The conversion time or speed of a 10-Msample/s ADC is 100 ns.

Quantizing noise: Quantizing noise is an unwanted voltage added to the input signal—it’s the
error that occurs during the conversion. More specifically, it’s a sawtooth-shaped noise signal
that’s the difference between the actual input value and the voltage represented by the digital
codes possible in the converter. The peak noise value is the least-significant-bit (LSB) analog
resolution value. This value is VR/2N, where VR is the converter reference voltage and 2N is the
number of resolution bits. Quantizing noise reduces as number of resolution bits increases.