Direct Power Control of PWM Rectifier under
Unbalanced Network Using Extended Power Theory
Yongchang Zhang
Power Electronics and Motor Drives
Engineering Research Center of Beijing
North China University of Technology
Beijing, China
Email: yozhang@ieee.org
Abstract—The control of PWM rectifiers under unbalanced
network has become an important issue in recent years, especially
in the applications with weak grid. Conventional methods is
based on voltage oriented control (VOC), which requires sev-
eral PI controllers in dual reference frame and the sequence
extraction of grid/rectifier voltages and currents. To reduce the
control complexity, recently direct power control (DPC) based
solutions were proposed, which only requires to add appropriate
power compensations to the original power reference. However,
the calculation of power compensation is usually complicated.
This paper proposes a space vector modulation (SVM) based
DPC for PWM rectifier under unbalanced network, which uses
extended power theory rather than conventional instantaneous
power theory to obtain much simpler power compensations.
Furthermore, not only sinusoidal grid current is obtained, but
also the oscillations in the dc bus voltage is also significantly
reduced. The effectiveness of the proposed method is confirmed
by the presented experimental results.
I. I NTRODUCTION
With the development of renewable energy resources, more
and more power converters and loads are connected into the
grid. For the applications with weak grids, the grid voltages
are usually unbalanced with negative sequence voltage com-
ponents. Hence, developing the power control methods under
unbalanced network becomes an important topic in recent
years [1]–[5]. As VOC is a mature and popular method to
achieve power regulation and current control, many methods
are proposed under the frame of VOC, which inherits the use
of PI controllers and synchronous transformation. The PI gains
need fine tuning work and dual synchronous transformation
increases the control complexity [6].
Recently DPC is proposed as a powerful method for the
control of three-phase PWM rectifiers [7], [8]. Compared to
VOC, DPC is much simpler and achieves quick dynamic
response due to the elimination of current control loop. How-
ever, conventional DPC presents large power ripples and rich
current harmonics at steady state. Introducing SVM into DPC
can improve the steady state performance significantly, but
it cannot ensure the good quality of power and current under
unbalanced network. Recent study on DPC tries to improve its
performance under unbalanced network by adding appropriate
power compensation into the original power references [9],
[10]. However, they require the use of sequence extraction of
978-1-5090-2998-3/17/$31.00 ©2017 IEEE 4617
Jie Liu, Jihao Gao
Power Electronics and Motor Drives
Engineering Research Center of Beijing
North China University of Technology
Beijing, China
Email: 347090517@qq.com
ea 5 /
eb a C
O b RL
ec c
Fig. 1. Topology of a two-level PWM rectifier
postie sequence and negative sequence grid voyages and/or
currents. Furthermore, they only consider the input power
control, but fail to consider the output power control. In fact,
one of the control aims of PWM rectifier is to achieve constant
dc voltage in the output side, which is directly related to the
output active power.
This paper proposes a novel DPC-SVM method for PWM
rectifier under unbalanced network. Different from prior so-
lutions using conventional power theory and sequence extrac-
tion, the proposed method uses extended power theory instead,
which is reported to be more suitable than conventional power
theory under unbalanced network [11]. The instantaneous
power of inductance is analyzed in detail using the extended
power theory. It is found that to achieve constant dc voltage,
the compensation power in the input power has to be the
same as the ripple components of inductance power. The
compensation power is derived analytically and added to the
original power reference, using only the grid currents and
their delayed value. The proposed method is compared to
conventional DPC-SVM and its effectiveness is confirmed by
the presented experimental results.
II. M ODEL OF PWM R ECTIFIER
The circuit of a three-phase PWM rectifier is shown in Fig.1
and its mathematical model can be expressed in stationary two-
phase coordinate as [1]:
di
e = Ri + L +v (1)
dt
where v, e and i are converter voltage vector, grid voltage From (12) and (13), the derivatives of grid current and its
vector and grid current vector, respectively; R and L are the delayed value can be calculated as
equivalent series resistance and inductance of grid filter.
According to the instantaneous power theory [12], the grid- di   

side complex power sin can be expressed as: = jω · i+ ejωt − i− e−jωt = −ωi (14)
dt

di  
sin =
3 ∗
i e = pin + j · qin (2) = ω · i+ ejωt + i− e−jωt = ω · i (15)
2 dt
and the complex power of rectifier side sout can be expressed The derivatives of inductance voltage and its delayed value
as: can be obtained from (14) and (15) as
uL = −ωL · i (16)
3
sout = i∗ v = pout + j · qout (3) uL = ωL · i (17)
2
where ∗ indicates the conjugate. Substituting (16) and (17) into (8) and (10), the ripple
For the unbalanced grid voltage conditions, the extended pq components of both active power and extended reactive power
theory proposed in [11] is more suitable than the original pq for the inductance can be obtained as
theory. The extended instantaneous reactive power is expressed
as: 3  
 3  

p̃L = i  uL − i  uL = − ωL i  i (18)
4 2  
nov 3
Re (i∗ e ) 3  3   2
qin = (4) nov   2  
2 q̃L = i  uL + i  uL = ωL |i| − i  (19)

4 4
where the variable e lags e by 90 electrical degrees [11].
B. Output Active Power Ripple Elimination
Under unbalanced network, the active power and the ex-
tended reactive power can be expressed as the sum of dc The dc bus voltage is related to the output active power
nov
component and ac component [1], [13], namely ripple. If the output power ripples are zero, i.e. p̃out = q̃out =
0, the input power ripples will be exactly the same as the power
ripples of inductance, as shown in (18) and (19). Hence, in
pin = p̄in + p̃in (5) order to achieve constant dc bus voltage, the corresponding
nov
qin nov
= q̄in nov
+ q̃in (6) compensation term S comp for input power should be:

where      2 
3  3 2  
S comp = p̃L +j·q̃L
nov
= − ωL i  i +j· ωL |i| − i 
2 4
3  

(20)
p̄in = ie+i e (7)
4 By adding the compensation power into the original power
3  
 ref
reference, the final new power referenceSnew is obtained as:
p̃in = ie−i e (8)
4
nov 3  
 ref
Snew = S ref + S comp (21)
q̄in = ie −i e (9)
4
nov 3  
 The merit of using the new power reference is that the internal
q̃in = ie +i e (10) power control loop does not need to be modified. Furthermore,
4
III. P RINCIPLE OF P ROPOSED DPC-SVM compared to the prior power compensation techniques [9],
[10], the power compensation in (20) is not only much simpler
A. Instantaneous Power of Inductance but also more practical by taking the output active power (dc
According to conventional pq theory [12], the instantaneous bus voltage) ripple into account.
power of inductance is expressed as:
C. DPC-SVM under Unbalanced Network
 
3 ∗ 3 ∗ di Similar to (14) and (15), the differentiation of grid voltage
sL = (i uL ) = i ·L (11)
2 2 dt vector and its delayed value can be obtained as:
One of the control aims is to eliminate the current harmon-
de 
ics, so the grid current and its delayed value can be expressed = jωe+ − jωe− = −ωe (22)
as the sum of positive sequence and negative sequence com- dt

ponents, which are expressed as [1], [13] de
= ωe+ + ωe− = ωe (23)
dt
The differentiation of grid current can be obtained from (1)
i = i+ ejωt + i− e−jωt (12)
   as:
i = −j · i+ ejωt − i− e−jωt (13) di 1
= (e − v − Ri) (24)
dt L

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 TABLE I ea 5 /
S YSTEM AND CONTROL PARAMETERS 2 /RDG

System Parameters Symbol Value U dc

Line resistance R 0.3 Ω
U dcref
Line inductance L 10 mH  
WUDQVIRUPDWLRQ WUDQVIRUPDWLRQ
Line-line voltage (RMS) UN 150 V 6a 6b 6c
Line voltage frequency f 50 Hz eD eE
iD iE
3,
Load resistance RL 100 Ω
DC-side capacitor C 840 μF 690


DC-side voltage Udc 300 V
Sampling period tsp 50 μs
P ref
&DOFXODWLRQRI Q QRYref
WKHILQDOvref 
Substituting (22) and (24) into (5) and considering (4), the
P FRmp
Q nov comp
differentiation of input active power can be obtained as: iDc 3RZHU
 FRPSHQVDWLRQ
GHOD\HG
iEc
3 2
R SDQGQRYHOT
dpin
|e| − Re (v ∗ e) − pin − ωqin nov 3RZHUFRPSHQVDWLRQ
= (25) FDOFXODWLRQ iD iE
dt 2L L
Similarly, the differentiation of reactive power can be ob-
Fig. 2. Control diagram of the proposed DPC-SVM.
tained from (4), (22), (23) and (24) as:

nov
dqin 3 

R
= Re (e∗ − v ∗ ) e − qin nov
+ ωpin (26) Pref [400W/div]
dt 2L L
P [400W/div]
Following the principle of deadbeat power control in con-
ventional DPC-SVM [14], the equations in (25) and (26) can Pout [400W/div]

be discretized using first-order Euler method as:

Q [400W/div]
    
1 pref − pkin R
ω pkin
nov,k − L
R nov,k
Ts q ref − qin −ω L qin

     (a)
3 ekα ekα + ekβ ekβ 3 ekα ekβ vαk
=   −   (27)
2L ekα eαk + ekβ eβk 2L eαk eβk vβk
Pref [400W/div]
Solving (27), the final converter voltage reference is calcu-
lated as [1]: P [400W/div]

   
 Pout [400W/div]
vαk 2 Reβk + ωLekβ −Rekβ + ωLeβk
=−
vβk
 
3Δ Reαk + ωLekα −Rekα + ωLeαk Q nov [400Var/div]

 

 
pkin 2L eβk −ekβ pref − pkin
× nov,k −  ref nov,k
qin 3Ts Δ −eαk ekα q − qin (b)
Fig. 3. Responses of input active power reference, input active power, output
 
ekα
+ (28)
ekβ
 
where Δ = ek ⊗ e k = ekα eβk − ekβ eαk .
IV. E XPERIMENTAL R ESULTS
To confirm the theoretical study, both the proposed DPC-
SVM and conventional DPC-SVM [14] are tested on a pro-
totype of two-level PWM rectifier under both balanced and
unbalanced grid voltage conditions. The difference between
conventional DPC-SVM and the proposed DPC-SVM are
that the former uses conventional power theory without any
power compensations, while the latter uses extended power
theory with power compensations. Fig. 2 illustrates the control
active power and input reactive power under one-phase grid voltage dip for
(a) conventional DPC-SVM, (b) the proposed DPC-SVM.

diagram of the proposed method. Both control algorithms
are implemented on a 32-bit floating DSP TMS320F28335.
During the tests, the internal variables, such as active power,
reactive power, are displayed and recorded using a digital
oscilloscope, while the grid voltages, grid currents and dc bus
voltages are measured directly by the voltage/current probes
connected to a scope coder DL850. The system and control
parameters are listed in Table I, where the control period tsp
is 100 μs.
The results obtained from the conventional DPC-SVM and
4619
 10

Uab /V
0

-5

-10
0 0.01 0.02 0.03 0.04
t/s
Fundamental ( 50Hz ) = 6.5842, THD = 26.6869%
30

Hn /H1 (%)
(a) 20

10

0
0 50 100 150 200 250
Harmonic order
(a)

10

Uab /V
0

-5
(b)
-10
Fig. 4. Responses of dc bus voltage, three-phase grid voltages and two-phase 0 0.01 0.02 0.03 0.04
grid currents under one-phase grid voltage dip for (a) conventional DPC-SVM, t/s
(b) the proposed DPC-SVM. Fundamental ( 50Hz ) = 8.449, THD = 1.5668%
1.5
Hn /H1 (%)

the proposed DPC-SVM under the condition of the one-
phase grid voltage dip are shown in Fig. 3 and 4, with the
results obtained from conventional DPC-SVM on the left half,
the proposed DPC-SVM on the right half. The active power
reference is 1000 W, and the reactive power reference is 0 Var
to achieve unity power factor. From top to bottom, the curves
in Fig. 3 are the input active power reference, input active
power, output active power and reactive power, respectively.
The dc bus voltage, three-phase grid voltages, two-phase grid
currents are illustrated in Fig. 4. It is seen that, for the
conventional DPC-SVM, although the input active power and
reactive power have small ripples, there are significant ripples
in the output active power, which accounts for high oscillations
in the dc bus voltage (1.6 V) and distorted grid currents.
On the contrary, for the proposed DPC-SVM, the oscillations
in the dc bus voltage are significantly reduced to 0.448 V
with small ripples in the output active power ripple. The grid
currents are sinusoidal with much reduced harmonics. Due to
the power compensation, the input active power and reactive
power are now oscillating at twice grid-frequency. However,
the dc component still tracks the original reference value,
which means average unity power factor is achieved.
The harmonic spectrum of one-phase grid current at P =
1000 W and Q = 0 Var is shown in Fig. 5, where the current
THD is calculated up to 250th order (12.5 kHz) harmonics. It
is clearly seen that, in spite of the grid voltage unbalance, the
current THD of the proposed DPC-SVM is only 1.57%, which
is much lower than the value of 26.69% in the conventional
DPC-SVM. This clearly shows that the proposed DPC-SVM
can achieve sinusoidal grid current even under the condition
1
0.5
0
0 50 100 150 200 250
Harmonic order
(b)
Fig. 5. Harmonic spectrum of one-phase grid current at steady state of P=1000
W and Q=0 Var for (a) conventional DPC-SVM, and (b) the proposed DPC-
SVM.
of grid voltage unbalance.
Figs. 6 and 7 further show the dynamic responses for both
conventional DPC-SVM and the proposed DPC-SVM when
the active power reference steps from 600 W to 1000 W. The
reference of reactive power is set to zero to achieve unity
power factor. It is clearly seen that the ripple component
of the dc voltage in the proposed method is much smaller
than that of conventional DPC-SVM, even in the dynamic
process. Furthermore, the grid current of the proposed method
is sinusoidal in shape, exhibiting much lower harmonics than
that of conventional method. The results clearly confirm that
the proposed method is effective in both steady state response
and dynamic process.
V. C ONCLUSION
This paper proposes a novel DPC method for PWM rectifier
under unbalanced network. Compared to prior solutions, the
merits of the proposed methods are threefold. Firstly, a power
compensation block is added only to the original power

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 reference without modifying the internal power control loop,
which is easy to implement. Secondly, due to the use of
extended power theory and analysis of the power ripples
in the inductance, a very simple and straightforward power
compensation is obtained. Finally, not only the grid current
harmonics are reduced, but also the output active power ripple
are considered. In the prior solutions, only the input power and
grid currents are considered, which cannot ensure constant dc
voltage in the output side. A comparative study with conven-
(a) tional DPC-SVM using conventional pq theory is carried out
and the experimental results confirm the effectiveness of the
proposed method.

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