Expert View
by Ira Pitel
Current-Fed Power Processing—
S
electing the best power convert-
er topology for a specific applica-
tion can be somewhat over-
whelming considering the advances
made in the past 20 years. Many of
these advances were accomplished
with better semiconductor switches
providing faster switching rates, lower
on-state voltages, lower power loss,
lower power driver requirements, and
so on. Selecting the best power convert-
er topology must balance the applica-
tion’s demands with priorities of cost,
size/packaging, efficiency, and robust-
ness. Magna-Power Electronics (Mag-
na-Power), a programmable dc power
product manufacturer in Flemington,
New Jersey, United States, prioritized
robustness in its topology selection.
The topology choice was driven by the
customers’ need for high reliability in
demanding in­­­dustrial environments.
With Magna-Power products often
being used in experimental, proto-
type validation applications, custom-
er satisfaction required consistent
power converter performance well
beyond typical operating conditions.
Having shipped tens of thousands of
power supplies, the vast majority of
field failures results from customer
abuse, such as
■■corrosion
■■abnormal input voltage such as
lightning, power line transients, and
power line harmonics
Digital Object Identifier 10.1109/MPEL.2018.2886110
Date of publication: 19 February 2019
58 IEEE Power Electronics Magazine z March 2019
Ride Through Robustness
■■output abuse, such as back-fed volt-
ages and excessive ac currents
■■susceptibility of electromagnetic
interference in abnormal environ-
ments
■■poor packaging of power supplies
in equipment racks resulting in
restrictive air flow and exces-
sive heating.
Typical methods to improve re­­
liability are the implementation of n + 1
redundancy and lowering the mean
time between failure. These techniques
can only partially improve long-term
reliability if the cause of failure is a
result of external conditions. For exam-
ple, a power supply placed in an indus-
trial environment, which is subjected to
high incoming voltage transients, will
be more reliable at utilizing input recti-
fiers with a higher blocking voltage rat-
ing. In this case, improving reliability
with higher-voltage devices can be
more beneficial than having redundant
power supplies with lower component
ratings, which will all fail from the
same external environmental condi-
Q1
D1
C1 Q3
+ Output
–
Input
Q2 D2
Q4
FIG 1 A voltage-fed converter.
tion. Surviving an abnormal external
influence, even if operation is temporal-
ly aborted, is far better than the product
failing and relying on a spare.
One of Magna-Power’s key objec-
tives has been to develop power cir-
cuits capable of riding through poten-
tially damaging conditions. S t r o n g
ride-through capability, or fault resis-
tance, lowers field returns, reduces cost-
ly repairs, and, most importantly, pre-
serves customer satisfaction. Fault pro-
tection cannot be achieved under all
conditions, but knowing the weak points
in a design can give a better understand-
ing to possible improvements.
Most power supply designs in the
1-kW and up power range use a volt-
age-fed topology or a similar deriva-
tive. As illustrated in Figure 1, the
input stage is a dc source feeding a
capacitor, bridge inverter, a trans-
former for ohmic isolation, an output
rectifier, and inductor-capacitor low-
pass filter. The weak point of the
design is the bridge inverter. If one of
the devices should fail or erroneously
D3 L1
D5 D7
T1 C2
D6 D8
D4
turn on, the resulting effects can be Any external influence causing a wrong input dc bus. Second, output induc-
quite dramatic: failure of other bridge switching state can result in a potential tor L1 in a voltage-fed converter is on
inverter devices, flames, and damage failure with little time to take correc- the output side of the converter, but
to surrounding circuitry. If the bridge tive action. it is on the input side of the current-
inverter circuit does not switch with fed converter.
a near-perfect volt-second balance, Current-Fed Converter As illustrated in Figure 3, the re­­
the transformer core will saturate, Figure 2 shows the electrical dual of the quirement for a current source input
possibly resulting in similar fail- voltage-fed converter, i.e., a current-fed can be achieved with a buck converter
ure conditions. converter. The current-fed topology has or chopper operated as a voltage-to-
There have been been around for a current converter. While this is indeed
considerable advanc- long time, but it is a negative point of the topology, this
es in the fault detec- With the current-fed rarely commercially added stage can be utilized for protec-
tion of voltage-fed con- deployed because of tion between the two converter stages.
converter, the time to
verters. However, pro- the need and added The inverter stage, which has the
tection schemes must protect any semicon- cost for creating a primary function of ohmic isolation
still operate on the ductor device is current source input and voltage transformation, should
order of microsec- dependent on the plus the demand for a operate at a near 50% duty cycle. This
onds. Such failures switching period of low-leakage trans- stage can be operated at a lower
are thermal and de­­ the buck converter former [1]. The differ- switching frequency with virtually no
vice dependent. Pro- ences between volt- degradation in dynamic performance.
and the design of
t ec t ion a dv a nce s age-fed and current- All of the converter control is governed
include detection of inductor L1. fed converters are by the buck converter stage. A low-
on-state conduction very subtle. The volt- leakage impedance for transformer T1
with antisaturation- age-fed bridge devic- ensures high converter efficiency and
sensing circuitry and current-mode con- es should never short the input dc bus, low output voltage ripple. During com-
trollers that limit peak current through as opposed to the current-fed bridge mutation of the two inverter poles, the
transformers to prevent core saturation. devices, which should never open the dc bus across the inverter shorts, and
current is blocked from f lowing
through the output stage.
With the current-fed converter, the
L1
time to protect any semiconductor
Q1 D1 D3 device is dependent on the switching
D5 D7 period of the buck converter and the
Q3 T1 C1 design of inductor L1; both of these
Output parameters govern the time needed to
Input
D6 D8 prevent core saturation of inductor L1.
Q2 D2 D4
For a buck converter operating at
Q4
20 kHz, a typical 10-μs period can eas-
ily be deployed to protect controlled
semiconductor devices within the nor-
FIG 2 A current-fed converter. mal operating limits. This protection

L1
L2 Q1 D1 D3
D10 D12 D14 Q5
D5 D7
Q3 T1 C1
C2 D9
Input Output
D6 D8
Q2 D2 D4
D11 D13 D15

Q4

FIG 3 A current-fed converter with a buck converter.

60 IEEE Power Electronics Magazine z March 2019

can be applied to the inverter or buck converter, which prevents catastroph- and efficiency. Manufacturing a single-
semiconductor switches in the event ic failures. Because of the extended board power supply can be more cost-
of erroneous switching states, trans- time for protection, special antisatura- effective when power levels are lower—
former shorts, or output diode shorts. tion circuitry is not required. in the 1-kW and lower range. Many man-
During a fault condition, the dc bus One additional attribute of current- ufacturers gang multiple assemblies of
across the bridge inverter collaps- fed topologies is scalabi­­lity to higher- the same design to achieve higher
es, protecting the re­­ power, physically larg- power levels, but such designs can have
maining devices from er systems. Adding a a negative effect on system reliability by
catastrophic failure. Despite the advantag- little extra induc- additional parts count.
With the dc bus cur- es of a current-fed tance in series with
rent being limited to a design, voltage-fed inductor L1 has vir- The Challenges of the
current level set and tually no effect on Current-Fed Converter
designs are far
ma inta ined by the system performance. Manufacturing current-fed converters
buck converter, core more prevalent in Stages can be easily have their challenges in a compet-
saturation of trans- industry. pa ­­r alleled without itive market. There is an extra power
former T1 is virtual- m a jor concern for conversion stage taking up physical
ly impossible. lead inductances. volume along with the materials
With sufficient time, fault protec- Despite the advantages of a current- cost associated with it. Conventional
tion circuitry can be devised to protect fed design, voltage-fed designs are far control circuits cannot be used be­­
the inverter stage with the buck con- more prevalent in industry. Voltage-fed cause of the duality of the design, and
verter stage and the buck converter topologies do require one fewer power these circuits have to be de­­signed
stage with the inverter stage. Also, fail- conversion stage and have fewer mag- from fewer integrated devices. Trans-
ure of a controlled semiconductor netic components. Both of these formers designed for extremely low
switch is current limited by the buck requirements have an impact on cost leakage inductance require unique core

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2018-01-25_Halfpage.indd 1 2018-01-26 09:55:56

March 2019 z IEEE Power Electronics Magazine 61
geometries. The demands of tighter About the Author
packaging and specialized magnetic Ira Pitel (ipitel@magna-power.com)
circuits have required Magna-Power received his B.S. degree from Rutgers,
Electronics to vertically integrate its The State University of New Jersey;
manufacturing operations to minimize his M.S. degree from Bucknell Univer-
outsourcing and to optimize its designs. sity; and his Ph.D. degree from Carne-
Today, Magna-Power Electronics gie Mellon University in 1972, 1975,
manufactures all its assemblies in and 1978, respectively. From 1973 to
house. This decision has helped keep 1981, he worked for GTE Sylvania,
the company competitive in a global Bell Laboratories, and Exxon Enter-
market, allowing it to realize the cur- prises as a research engineer specializ-
rent-fed topology plus improving quality ing in high-frequency ballasting tech-
and delivery times. Manufacturing oper- niques for gaseous discharge lighting,
ations include sheet metal fabrication, power distribution, and ac drives. In
powder coating, robotic heat sink and 1981, he founded Magna-Power Elec-
fastener assembly, automated surface tronics, a company specializing in cus-
mount and through-hole printed circuit tom and standard power conditioning
board assembly, magnetics winding and products. As president, he is responsi-
core fabrication, computer numerical ble for technology oversight and man-
control machining, wire harness fabri- ufacturing of its line of 1.5–3,000+ kW
cation, final assembly, and testing. ac to dc power supplies and electronic
Patent Reviews (continued from page 57)
the unwillingness to license competi- this was industry practice was not the
tors while licensing all other appli- case. Besides, the court pointed out,
cants. The TIA guidelines also state Qualcomm argued in another lawsuit
that the FRAND com- that the TIA policy
mitment is in­­tended compels a competitor
to prevent a patent The takeaway lesson is to license any patents
holder from securing required to develop
that signing onto a
a monopoly in any pr o duc t s that are
market a s a result
FRAND commitment c o m pl i a n t with a
of the standardiza- means that anyone who given standard.
tion process. wants to participate in Qualcomm also ar­­
Qualcomm defend- the industry involving gued that the FRAND
ed its position by the standard being requirement only ap­­
­s ay i n g it was just plies to applicants
established must be
following industry who “practice or im­­
pract ice a nd t hat
granted a license under plement whole stan-
modem chip suppli- FRAND terms. dards,” and since the
ers never receive SEP chip could not imple-
licenses. The court ment the whole stan-
disposed of this argument in a couple dard, a license is not required. The
of ways. First, the court noted, Qual- court dismissed this argument by
comm itself was the recipient of SEP pointing to the TIA requirement that
licenses, suggesting that its claim that the licenses must be extended to “the
62 IEEE Power Electronics Magazine z March 2019
loads. In 1986, he joined Texas A&M
University as an adjunct professor. He
holds 29 patents in the field of power
electronics and is corecipient of the
1995 Society Prize Paper Award of the
IEEE Industry Applications Society.
He was honored as the Rutgers Out-
standing Engineering Alumnus in 2000
and with the Gerald Kliman Innovator
Award in 2008. He is a Life Fellow of
the IEEE and has served in many
IEEE capacities, including Society
president of the IEEE Industry Appli-
cations Society. He is a member of Eta
Kappa Nu and Tau Beta Pi.
Reference
[1] I. Abraham, Pressman: Switching Power
Supply Design, 2nd ed. New York: McGraw-Hill,
1998.

extent necessary for the practice of
any or all of the normative portions
for the field of use of practice of the
standard.” Thus, even a portion trig-
gers the FRAND commitment.
The takeaway lesson is that signing
onto a FRAND commitment means
that anyone who wants to participate
in the industry involving the standard
being established must be granted a
license under FRAND terms.
About the Author
Art MacCord (amaccord@maccord
mason.com) has practiced patent,
trademark, copyright, and trade-secret
law for more than 35 years and is a
graduate of the University of Virginia
and George Washington University
Law School. He currently practices
with MacCord Mason PLLC in Greens-
boro, North Carolina.