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P01: COVER PAGE&INDEX P02: BLOCK DIAGRAM_BOARD LEVEL P03: BLOCK DIAGRAM_SYS LEVEL P04: LOGIC OF LED/BTN/PIPE LED P05: CLOCK DISTRIBUTION P06: MISCELLANEOUS TABLES P07: BLANK P08: ARD DMI/PEG/FDI/CLK/MISC P09: ARD DDR3 P10: ARD CFG/RSVD/GND

P28: ALC272 CODEC& MIC P29: AMP&HEADPHONE&SPDIF P30: CARD READER CONTROLER P31: WLAN&TV&HDD&BT P32: RTL8111DL GIGA LAN P33: RGB LED&PW_BT&HW P34: USB*4 P35: GLUELOGIC&RST&DISCHARGE P36: VIN&VTT_CPU/PCH P37: VSUS5&1P8&0P9&VCC5&1P8&3P3 P38: Calpella CPU VCCP power P39: Capella GFX POWER P40: DC system power P41: DDR power1.5V P42: VCC_1P8 P43: VTT power P44: SCREW&EMI BEAD&FD P45: POWER SEQUENCE P46: CHANGE HISTORY

 

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P11: ARD PWR P12: DDR3_CHA&DIMM0 P13: DDR3_CHB&DIMM1 P14: DDR3_CA/DQ Voltage P15: PCH SATA/IHDA/RTC/LPC P16: PCH PCIE/CLK/SMB/PEG P17: PCH FDI/DMI/SYS PWR/DISPLAY P18: PCH PCI/NVRAM/USB P19: PCH CPU/GPIO/MISC P20: PCH POWER/GND

SAMUI 2.0

P17: PCH FDI/DMI/SYS PWR/DISPLAY P18: PCH PCI/NVRAM/USB P19: PCH CPU/GPIO/MISC P20: PCH POWER/GND SAMUI 2.0 C

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P21: PCH POWER.GND_2 P22: HW_MONITOR P23: CLK_GEN P24: HDMI/DVI LEVEL SHIFT P25: RTD2281_SCALER P26: TRANS CN&HDMI IN&LVDS_PWR P27: HDMI OUT

 

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Title

Title

Title

SAMUI_2.0_COVER PAGE&INDEX

SAMUI_2.0_COVER PAGE&INDEX

SAMUI_2.0_COVER PAGE&INDEX

 

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Size

Size

Custom

Custom

Custom

Document Number

Document Number

Document Number

MP-00008529-005-AK

MP-00008529-005-AK

MP-00008529-005-AK

Rev

Rev

Rev

V03

V03

V03

Date:

Date:

Date:

Monday, May 17, 2010

Monday, May 17, 2010

Monday, May 17, 2010

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5 4 3 2 1 SAMUI 2.0 EXTERNAL CLOCK GENERATOR DDR3, 800/1066MT/S DIMM0 Channel A
5
4
3
2
1
SAMUI 2.0
EXTERNAL CLOCK GENERATOR
DDR3, 800/1066MT/S
DIMM0
Channel A
D
D
CK505
12
23
THERMAL SENSOR / FAN CONTROLLER
Intel Arrandale CPU
rPGA Socket
Channel B
DIMM1
ATD7940
13
8,9,10,11
FDI
DMI
PCH HM55
SATA HDD
SATA
HDMI IN CON
31
26
RTD2281
Level shift
DVI
C
2482D-GR
C
SCALER
LVDS CON
25
ALC272-GR
SPDIF
29
26
AUDIO CODEC
Level shift
HDA
HDMI OUT CON
HDMI
MIC
27
28
28
PCIE INTERFACE
SPEAKER
29
AUDIO AMP
TPA6019
HEADPHONE
29
RTL8111DL-VB-GR
TV
WLAN
29
PCIE ETHERNET
32
31
31
15,16,17,18,19,20,21,22
RTD2482D-GR
B
SCALER
B
RJ45
SPI I/F
25
32
SPI ROM
1M Byte
15
USB#3
USB#2
USB#1
USB#0
USB 2.0
34
34
34
34
BLUETOOTH
CAMERA
33
33
RELTEK
RTS5138
30
8 IN1 Card
A
A
30
Title
Title
Title
SAMUI_2.0_BLOCK DIAGRAM_BOARD LEVEL
SAMUI_2.0_BLOCK DIAGRAM_BOARD LEVEL
SAMUI_2.0_BLOCK DIAGRAM_BOARD LEVEL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
Custom
Custom
Custom
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
2
2
2
of
of
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46
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46
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4
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5 4 3 2 1 BOARD CAMERA LCD MODULE D D USB LVDS BL POWER
5
4
3
2
1
BOARD
CAMERA
LCD
MODULE
D
D
USB
LVDS BL
POWER
CHANGE BOARD
SWITCH BOARD
I2C
LED BOARD
LVDS
USB
I2C
POWER
OTHER
C
C
USB
BLUE TOOTH
MINI-PCIE
WLAN
M/B
MINI-PCIE
TV
B
PIPE LED BOARD
PWM
B
L/R
SPEAKER
A
A
Title
Title
Title
SAMUI_2.0_BLOCK DIAGRAM_SYS LEVEL
SAMUI_2.0_BLOCK DIAGRAM_SYS LEVEL
SAMUI_2.0_BLOCK DIAGRAM_SYS LEVEL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
Custom
Custom
Custom
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
3
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5 4 3 2 1 D TOUCH BUTTON LED D LCD ON/OFF LIGHT 绚绚绚绚 绚绚绚绚
5
4
3
2
1
D
TOUCH BUTTON
LED
D
LCD ON/OFF
LIGHT
绚绚绚绚 绚绚绚绚 MODE
HDMI IN MODE
HDMI/PC
ADJUST
C
C
RTD2482
PIPE LED
SCLAER
RGB_LED BUTTON
R&G&B LED
PWM
ENABLE
TOUCH BUTTON LOGIC:
1,LCD on/off,HDMI /PC 循循循循 循循循循循循循循循循循循循循循循循循循循循循循。循。。。
B
2,LIGHT ADJUST:TBD
3,绚绚绚绚绚绚绚绚 MODE
B
HDMI IN LED LOGIC:
1,LED ON when in HDMI IN Mode.
2,LED OFF when in PC&LCD OFF Mode.
PIPE RGB BUTTON&LED LOGIC:
1,系系系系系系系系系系系系系系系系系系系,系,,灯,灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯循灯循循循循循循灯循灯灯灯灯灯灯灯.
2,用用用用用用用用用用用用用用用用用用用用RGB LED button,,灯,,灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯.
A
3,再再用再再用用用用用用用用用用用 RGB LED button,,灯,,灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯.
A
4,再再用再再用用用用用用用用用用系用系系再系再再系再系系灯系灯灯,灯,,灯,灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯灯循灯循循循循循循灯循灯灯灯灯灯灯。灯。。。
Title
Title
Title
SAMUI_2.0_LOGIC OF LED/BTN/PIPE LED
SAMUI_2.0_LOGIC OF LED/BTN/PIPE LED
SAMUI_2.0_LOGIC OF LED/BTN/PIPE LED
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
Custom
Custom
Custom
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
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I2C
5 4 3 2 1 PROCESSOR Arrandale M_CLK0/1_A_DP/DN CLK_133M_CPU_DP/DN BCLK0 SA_CK0/1/2/3 DDR3 CHA RDIMM0 XDP0
5
4
3
2
1
PROCESSOR
Arrandale
M_CLK0/1_A_DP/DN
CLK_133M_CPU_DP/DN
BCLK0
SA_CK0/1/2/3
DDR3 CHA RDIMM0
XDP0 CPU
133M_ITP_DP/DN
D
D
BCLK_ITP
DDR3 800/1066/1333 MHz
M_CLK0/1_B_DP/DN
SB_CK0/1/2/3
DDR3 CHB RDIMM0
PEG_CLK
CLK_100M_PE_DMI_DP/DN
TP
C
C
PCI_CLK0
PCICLK0
CLKOUT_DMI
CK505
9LRS4200
CLK_PCI_FB
PCICLK1
CLKOUT_BCLK0
CLK_133M_CSI_PCH_IN_DP/DN
CPU
CLKIN_BCLK
TP
PCICLK2
CLKOUT_BCLK1
CLK_96M_DOT_PCH_DP/DN
DOT96
CLKIN_DOT_96M
TP
PCICLK3
CLK_100M_SATA_PCH_DP/DN
SATA
CLKIN_SATA
TP
PCICLK4
CLK_100M_DMI_PCH_DP/DN
PCIE
CLKIN_DMI
CLK_PCI_FB
PCICLKIN
CLK_14M_PCH
REF
REF14CLKIN
TP
B
B
CLKOUT_PE0
(DEFAULT)
25MHZ XTAL
CLK_48M_SIO
CLK_100M_PCIE-LAN_DP/DN
USB48
CARDREADER
CLKOUT_PE1
CLK_100M_PCIE_WLAN_DP/DN
BCM57780
CLKOUT_PE2
WLAN
(NIC)
CLK_100M_PCIE_TV_DP/DN
CLKOUT_PE3
TV
PCIE_REFCLK
TP
CLKOUT_PE4
TP
14.318 MHZ XTAL
CLKOUTFLEX0
TP
TP
CLKOUT_PE5
25MHZ XTAL
CLKOUTFLEX1
TP
TP
CLKOUTFLEX2
CLKOUT_PE6
TP_CLK_48M_SIO(RESERVE)
CLKOUTFLEX3
TP
CLKOUT_PE7
TP
CLKOUT_PEGA
TP
CLKOUT_PEGB
A
A
PCH
Title
Title
Title
SAMUI_2.0_CLOCK DISTRIBUTION
SAMUI_2.0_CLOCK DISTRIBUTION
SAMUI_2.0_CLOCK DISTRIBUTION
25 MHZ XTAL
32.768 KHZ XTAL
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
C
C
C
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
5
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5 4 3 2 1 PCH_IBEX Thermal Systems (Emergency Shutdown, Throttling, Fan Control) GPIO Internal
5
4
3
2
1
PCH_IBEX
Thermal Systems
(Emergency Shutdown, Throttling, Fan Control)
GPIO
Internal &
PCH_IBEX
Use As
Signal Name
External
Power
GPIO
Pull-up/down
GPIO 00
-
GPIO0
VCC_3P3
EXT PU(Not used)
GPIO 01
-
TACH1/GPIO1
EXT PU(Not used)
VCC_3P3
GPIO [2:5]
Native
PCI_INT[E:H]#
EXT PU
VCC_3P3
GPIO 06
TACH2/GPIO6
EXT PU(Not used)
VCC_3P3
-
GPIO 07
-
TACH3/GPIO7
EXT PU(Not used)
VCC_3P3
D
D
GPIO 08
-
GPIO8
EXT PU(Not used)
VSTB_3P3
ADT7490
GPIO 09
Native
USB_OC5#
EXT PU
VSTB_3P3
PWM1
GPIO 10
Native
USB_OC6#
EXT PU
VSTB_3P3
PECI
TACH1
GPIO 11
-
SMBALERT#
EXT PU(Not used)
VSTB_3P3
thermal
D-
SDA
PECI
GPIO 12
-
PM_LANPHY_EN
EXT PU
diode
VSTB_3P3
D+
SCL
GPIO 13
-
-
-
VSTB_3P3
INTEL
GPIO 14
Native
USB_OC7#
EXT PU
VSTB_3P3
SDA
HM55
GPIO 15
-
-
-
VSTB_3P3
SCL
PROCHOT_L
GPIO 16
-
SATA4GP/GPIO16
EXT PU(Not used)
VCC_3P3
INTEL
GPIO 17
-
TACH0/GPIO17
EXT PU(Not used)
VCC_3P3
Arrandale
GPIO 18
-
CLKREQ1_LAN#
EXT PD
VCC_3P3
THERMTRIP_L
translate
THERMTRIP#
GPIO 19
Native
SATA1GP
EXT PU
VCC_3P3
GPIO 20
Native
CLKREQ2_WLAN#
EXT PD
VCC_3P3
GPIO 21
Native
SATA0GP
EXT PU
VCC_3P3
GPIO 22
-
GPIO22
EXT PU(Not used)
VCC_3P3
GPIO 23
-
-
-
VCC_3P3
GPIO 24
VSTB_3P3
GPO
PWR_LED
-
GPIO 25
Native
CLKREQ3_TV#
EXT PD
VSTB_3P3
GPIO 26
-
CLK_REQ4#
EXT PU(Not used)
VSTB_3P3
C
C
GPIO 27
-
-
VSTB_3P3
-
GPIO 28
GPI
BT_RST
EXT PD
VSTB_3P3
GPIO 29
-
-
-
VSTB_3P3
GPIO 30
-
-
-
VSTB_3P3
GPIO 31
Native
AC_PRESENT
EXT PU (Not used)
VSTB_3P3
GPIO 32
Native
CLKRUN#
EXT PU
VCC_3P3
GPIO 33
Native
HDA_DOCK_EN#
EXT PD
VCC_3P3
SM BUS DIAGRAM
GPIO 34
Native
STP_PCI#
EXT PU
VCC_3P3
GPIO 35
GPO
SATA_CLK_REQ#
EXT PU
VCC_3P3
GPIO 36
-
GPIO36
EXT PU
VCC_3P3
GPIO 37
-
GPIO37
EXT PU
VCC_3P3
GPIO 38
GPI
PCB_ID0
EXT PD
VCC_3P3
GPIO 39
GPI
PCB_ID1
EXT PD
VCC_3P3
SM BUS CONTROLLER 0
GPIO 40
GPI
USB_OC1#
-
HM55
(INTEL LAN)
GPIO 41
Native
USB_OC2#
EXT PU (Not used)
VSTB_3P3
SM BUS CONTROLLER 1
(EC)
GPIO 42
Native
USB_OC3#
EXT PU (Not used)
VSTB_3P3
SM BUS CONTROLLER
GPIO 43
Native
USB_OC4#
EXT PU (Not used)
VSTB_3P3
VCC_3P3 PU
SMB_CK
GPIO 44
Native
CLK_REQ5
EXT PU (Not used)
VSTB_3P3
VSTB_3P3
SMB_DA
MOS
GPIO 45
Native
CLK_REQ6#
EXT PU (Not used)
VSTB_3P3
B
B
GPIO 46
Native
CLK_REQ7#
EXT PU (Not used)
VSTB_3P3
GPIO 47
-
CLKREQ_PEG#
EXT PD
VSTB_3P3
GPIO 48
-
GPIO48
EXT PU(Not used)
VCC_3P3
XDP
CLOCK GEN
SO-DIMM0
SO-DIMM1
ADT7490
GPIO 49
PCH_TEMP_ALERT#
-
VCC_3P3
-
GPIO 50
-
PCI_REQ1#
EXT PU (Not used)
VCC_3P3
GPIO 51
-
PCI_GNT1#
EXT PU
VCC_3P3
SMB ADDR
0101 110Xb
1101 0010
1010 000X 1010 010X
0010 111X
GPIO 52
-
PCI_REQ2#
EXT PU
VCC_3P3
GPIO 53
-
PCI_GNT2#
EXT PU
VCC_3P3
GPIO 54
-
PCI_REQ3#
EXT PU
VCC_3P3
GPIO 55
Native
PCI_GNT3#
INT PU
VCC_3P3
GPIO 56
Native
CLKREQ_PEG#_R
EXT PU (Not used)
VSTB_3P3
GPIO 57
-
GPIO57
EXT PU(Not used)
VSTB_3P3
GPIO 58
Native
SML1_CLK
EXT PU
VSTB_3P3
GPIO 59
GPI
USB_OC0#
-
GPIO 60
-
SML0_ALERT#
EXT PU (Not used)
VSTB_3P3
GPIO 61
-
-
- VSTB_3P3
GPIO 62
-
-
- VSTB_3P3
GPIO 63
-
SLP_S5#
- VSTB_3P3
A
GPIO 64
-
CLK_OUT0
- VCC_3P3
A
GPIO 65
-
CLK_OUT1
- VCC_3P3
GPIO 66
-
CLK_OUT2
- VCC_3P3
GPIO 67
Native
CLK_USB48_CR
- VCC_3P3
GPIO 72
- BATLOW#
EXT PU (Not used)
VSTB_3P3
GPIO 73
- CLK_REQ0#
EXT PU (Not used)
VSTB_3P3
GPIO 74
- SML1ALERT#
EXT PU (Not used)
VSTB_3P3
Title
Title
Title
SAMUI_2.0_MISCELLANEOUS TABLES
SAMUI_2.0_MISCELLANEOUS TABLES
SAMUI_2.0_MISCELLANEOUS TABLES
GPIO 75
Native
SML1_DAT
EXT PU
VSTB_3P3
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
C
C
C
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
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PWM
TACH
4-PIN CPU FAN
5 4 3 2 1 Power Distribution D D C C B B A A
5
4
3
2
1
Power Distribution
D
D
C
C
B
B
A
A
Title
Title
Title
SAMUI_2.0
SAMUI_2.0
SAMUI_2.0
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
Custom
Custom
Custom
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
7
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5 4 3 2 1 U0801A U0801A 1%1% 49R949R9 SKTOCC#: pulled to GND on processor
5
4
3
2
1
U0801A
U0801A
1%1%
49R949R9
SKTOCC#: pulled to GND on processor
may use to determine if CPU is present
B26
PEG_IRCOMP_R R1329R1329
1
2
PEG_ICOMPI
A26
PEG_ICOMPO
A24
B27
17
DMI_TXN0
DMI_RX#[0]
PEG_RCOMPO
R1330R1330
1%1%
750R750R
C23
A25
EXP_RBIAS
1
2
U0801B
U0801B
17
DMI_TXN1
DMI_RX#[1]
PEG_RBIAS
1%
1%
B22
R1333
R1333
1
2
20R OHM
20R OHM
H_COMP3
AT23
17
DMI_TXN2
DMI_RX#[2]
COMP3
A21
K35
A16
CLK_CPU_BCLK
17
DMI_TXN3
DMI_RX#[3]
PEG_RX#[0]
1%
1%
BCLK
J34
R1334
R1334
1
2
20R OHM
20R OHM
H_COMP2
AT24
B16
CLK_CPU_BCLK#
PEG_RX#[1]
COMP2
BCLK#
B24
J33
17
DMI_TXP0
DMI_RX[0]
PEG_RX#[2]
R1331R1331
1%1%
49R949R9
D23
G35
1
2
H_COMP1
G16
AR30
CLK_ITP_BLCK
17
DMI_TXP1
DMI_RX[1]
PEG_RX#[3]
COMP1
BCLK_ITP
B23
G32
AT30
CLK_ITP_BLCK#
17
DMI_TXP2
DMI_RX[2]
PEG_RX#[4]
R1332R1332
1%1%
49R949R9
BCLK_ITP#
A22
F34
1
2
H_COMP0
AT26
17
DMI_TXP3
DMI_RX[3]
PEG_RX#[5]
COMP0
F31
E16
CLK_EXP_P
PEG_RX#[6]
PEG_CLK
D24
D35
D16
CLK_EXP_N
17
DMI_RXN0
DMI_TX#[0]
PEG_RX#[7]
PEG_CLK#
G24
E33
TP121TP121
STPSTP
1
TP_SKTOCC#
AH24
17
DMI_RXN1
DMI_TX#[1]
PEG_RX#[8]
SKTOCC#
F23
C33
A18
CLKDREF
R681R681
1
2
0R0R
D
17
DMI_RXN2
DMI_TX#[2]
PEG_RX#[9]
DPLL_REF_SSCLK
CLK_REF
16
D
H23
D32
A17
CLKDREF#
R682R682
1
2
0R0R
17
DMI_RXN3
DMI_TX#[3]
PEG_RX#[10]
DPLL_REF_SSCLK#
CLK_REF#
16
B32
R1335R1335
1
1%1%
2
49R949R9
H_CATERR#
AK14
VTT_CPU
PEG_RX#[11]
CATERR#
R768R768
MISC
THERMAL
1
2
0R_NA0R_NA
MISC
THERMAL
D25
C31
17
DMI_RXP0
R769R769
0R_NA0R_NA
PWR MANAGEMENT
PWR MANAGEMENT
DMI_TX[0]
PEG_RX#[12]
1
2
F24
B28
17
DMI_RXP1
DMI_TX[1]
PEG_RX#[13]
E23
B30
F6
17
DMI_RXP2
DMI_TX[2]
PEG_RX#[14]
SM_DRAMRST#
SM_DRAMRST#
12,13
G23
A31
R673R673
1
2
0R0R
H_PECI_ISO
AT15
17
DMI_RXP3
DMI_TX[3]
PEG_RX#[15]
19,22
H_PECI
PECI
AL1
SM_RCOMP0
R1339R1339
1 1%1%
2
100R100R OHMOHM
SM_RCOMP[0]
J35
AM1
SM_RCOMP1
R1340R1340
1 1%1%
2
24R924R9
PEG_RX[0]
R1336
R1336
SM_RCOMP[1]
H34
1
1%
1%
2
68R
68R
AN1
SM_RCOMP2
R1341R1341
1 2
1%1%
130R130R
17
FDI_TXN[7:0]
VTT_CPU
PEG_RX[1]
SM_RCOMP[2]
H33
H_PROCHOT_S#_R
AN26
PEG_RX[2]
PROCHOT#
FDI_TXN0
E22
F35
R675R675
1
0R0R
2
AN15
FDI_TX#[0]
PEG_RX[3]
PM_EXT_TS#[0]
PM_EXTTS#0
12,13
FDI_TXN1
22,38
VRTT#
D21
G33
AP15
PM_EXTTS#1
FDI_TX#[1]
PEG_RX[4]
PM_EXT_TS#[1]
1 2
R1342R1342
10K10K
FDI_TXN2
VTT_CPU
D19
E34
FDI_TX#[2]
PEG_RX[5]
FDI_TXN3
D18
F32
R676R676
1
2
0R0R
H_THRMTRIP#_R
AK15
10K
10K
FDI_TX#[3]
PEG_RX[6]
19
H_THRMTRIP#
THERMTRIP#
1 R1343
R1343
2
FDI_TXN4
VTT_CPU
G21
D34
FDI_TX#[4]
PEG_RX[7]
FDI_TXN5
E19
F33
FDI_TX#[5]
PEG_RX[8]
FDI_TXN6
F21
B33
AT28
XDP_PROY#
FDI_TX#[6]
PEG_RX[9]
PRDY#
FDI_TXN7
G18
D31
AP27
H_PREQ#
FDI_TX#[7]
PEG_RX[10]
PREQ#
17
FDI_TXP[7:0]
A32
PEG_RX[11]
C30
AN28
H_TCK
PEG_RX[12]
TCK
FDI_TXP0
D22
A28
H_CPURST#
AP26
AP28
H_TMS
FDI_TX[0]
PEG_RX[13]
RESET_OBS#
TMS
FDI_TXP1
C21
B29
AT27
H_TRST#
FDI_TX[1]
PEG_RX[14]
TRST#
FDI_TXP2
D20
A30
FDI_TX[2]
PEG_RX[15]
FDI_TXP3
C18
R677R677
1
2
0R0R
PM_SYNC#_R
AL15
AT29
H_TDI
FDI_TX[3]
17
PM_SYNC#
PM_SYNC
TDI
FDI_TXP4
G22
L33
AR27
H_TDO
FDI_TX[4]
PEG_TX#[0]
TDO
FDI_TXP5
E20
M35
AR29
H_TDI_M
FDI_TX[5]
PEG_TX#[1]
TDI_M
FDI_TXP6
F20
M33
R678R678
1
2
0R0R
VCCPWRGOOD_1_R
AN14
AP29
H_TDO_M
FDI_TX[6]
PEG_TX#[2]
VCCPWRGOOD_1
TDO_M
FDI_TXP7
G19
M30
FDI_TX[7]
PEG_TX#[3]
L31
AN25
H_DBR#
PEG_TX#[4]
DBR#
F17
K32
R679R679
1
2
0R0R
VCCPWRGOOD_0_R
AN27
17
FDI_FSYNC0
FDI_FSYNC[0]
PEG_TX#[5]
19
H_CPUPWRGD
VCCPWRGOOD_0
E17
M29
17
FDI_FSYNC1
FDI_FSYNC[1]
PEG_TX#[6]
J31
AJ22
XDP_BPM#0
PEG_TX#[7]
BPM#[0]
C17
K29
R680R680
1
2
0R0R
VCCPWRGOOD_R
AK13
AK22
XDP_BPM#1
17
FDI_INT
FDI_INT
PEG_TX#[8]
17
H_DRAM_PWRGD
SM_DRAMPWROK
BPM#[1]
H30
AK24
XDP_BPM#2
PEG_TX#[9]
BPM#[2]
F18
H29
AJ24
XDP_BPM#3
17
FDI_LSYNC0
FDI_LSYNC[0]
PEG_TX#[10]
BPM#[3]
D17
F29
VTT_PG_CPU
R778R778
1
2
0R0R
VTT_PG_CPU_R
AM15
AJ25
XDP_BPM#4
17
FDI_LSYNC1
FDI_LSYNC[1]
PEG_TX#[11]
VTTPWRGOOD
BPM#[4]
E28
AH22
XDP_BPM#5
PEG_TX#[12]
BPM#[5]
C
D29
AK23
XDP_BPM#6
C
For Intel GFX display
PEG_TX#[13]
BPM#[6]
D27
H_PWRGD_XDP
AM26
AH23
XDP_BPM#7
PEG_TX#[14]
TAPPWRGOOD
BPM#[7]
C26
PEG_TX#[15]
L34
R1337R1337
1
2
1K51K5
PLT_RST_RSTIN
AL14
PEG_TX[0]
18,23,31,32
PLT_RST#
RSTIN#
M34
PEG_TX[1]
M32
PEG_TX[2]
L30
1
PEG_TX[3]
M31
SKT989P+4P
SKT989P+4P
PEG_TX[4]
K31
R1338
R1338
PEG_TX[5]
M28
750R
750R
PEG_TX[6]
H31
PEG_TX[7]
K28
PEG_TX[8]
2
G30
PEG_TX[9]
G29
R683R683
1 0R0R
2
CLK_CPU_BCLK
PEG_TX[10]
19
BCLK_CPU_P_PCH
F28
R684R684
1 0R0R
2
CLK_CPU_BCLK#
PEG_TX[11]
19
BCLK_CPU_N_PCH
E27
PEG_TX[12]
D28
PEG_TX[13]
R685R685
1 0R0R
2
CLK_EXP_P
C27
16
CLK_DMI_PCH
VTT_CPU
PEG_TX[14]
R686R686
1 0R0R
2
CLK_EXP_N
C25
16
CLK_DMI#_PCH
PEG_TX[15]
R1344
R1344
68R_NA 1%
68R_NA 1%
H_CPURST#
1
2
SKT989P+4P
SKT989P+4P
J0801
J0801
XDP
1
2
1
2
H_PREQ#
3
4
3
4
XDP_PROY#
5
6
Default Strapping When Not Used
5
6
7
8
7
8
VTT_CPU
XDP_BPM#0
9
10
9
10
VSUS_1P5
XDP_BPM#1
11
12
11
12
13
14
DRAMPWROK
13
14
XDP_BPM#1
R1347R1347
1
2
51R_NA51R_NA
XDP_BPM#2
15
16
1
15
16
H_PREQ#
R1348R1348
1
2
51R_NA51R_NA
XDP_BPM#3
17
18
17
18
H_TDI
R1349R1349
1
2
51R_NA51R_NA
19
20
B
R1345
R1345
19
20
B
H_TDO_M
R1350R1350
1
2
51R51R
21
22
1K1
1K1
21
22
H_TMS
R1351R1351
1
2
51R_NA51R_NA
23
24
1%
1%
23
24
H_TDO
R1360R1360
1
2
51R_NA51R_NA
25
26
25
26
XDP_BPM#4
2
27
28
VCCPWRGOOD_R
27
28
H_TDO_M
R687R687
1
2
0R_NA0R_NA
H_TDI_M
XDP_BPM#5
29
30
29
30
2
31
32
31
32
XDP_BPM#6
33
34
33
34
R1359
R1359
H_DBR#
R1354R1354
1
2
1K1K
XDP_BPM#7
35
36
VCC_3P3
35
36
3K01
3K01
37
38
37
38
H_TCK
R1352R1352
1
2
51R_NA51R_NA
R1515R1515
1 2
1K1K
XDP_PRWGD
39
40
R755R755
1 2
0R0R
CLK_ITP_BLCK
1%
1%
19
H_CPUPWRGD
39
40
R753R753
1 2
0R0R
PWRBTN#_XDP
41
42
R756R756
1 2
0R0R
CLK_ITP_BLCK#
DMI
DMI
Intel(R) FDI
Intel(R) FDI
17,25,33
PWRBTN#
1
41
42
H_TRST#
R1353R1353
1
2
51R51R
43
44
VTT_CPU
1K1K VTT_CPU
43
44
H_PWRGD_XDP
R754R754
1 2
0R0R
45
46
XDPRST#
R1363R1363
1
2
H_CPURST#
45
46
TP123TP123
STPSTP
1
47
48
H_DBR#
47
48
49
50
49
50
51
52
H_TDO_M
12,13,16,22,23
SMB_DA0
51
52
53
54
H_TRST#
12,13,16,22,23
SMB_CLK0
53
54
55
56
H_TDI
55
56
H_TCK
57
58
H_TMS
57
58
59
60
59
60
VTT_CPU
G1
G2
VCC_3P3
G1
G2
VTT_PG_CPU
SKT2X30P_NA
SKT2X30P_NA
1
1
4K7
4K7
4K7
4K7
Note:delete J0801
R217
R217
R219
R219
2010.03.14
Kurt xiong
2
VTT_PG_CPU
2
Q79
Q79
Q78
Q78
2N7002
2N7002
2N7002
2N7002
A
A
35,43
VTT_PG
Note:add Q78,R217 for VTT_PG_CPU
2010.03.01
Kurt xiong
Title
Title
Title
SAMUI_2.0_DMI/PEG/FDI/CLK/MISC
SAMUI_2.0_DMI/PEG/FDI/CLK/MISC
SAMUI_2.0_DMI/PEG/FDI/CLK/MISC
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
C
C
C
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
8
8
8
of
of
of
46
46
46
5
4
3
2
1
G
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
D
S
G
D
S
JTAG & BPM
JTAG & BPM
DDR3
DDR3
CLOCKS
CLOCKS
MISC
MISC
5 4 3 2 1 U0801D U0801D U0801C U0801C 13 SB_DQ[63:0] W8 12 SA_DQ[63:0] SB_CK[0]
5
4
3
2
1
U0801D
U0801D
U0801C
U0801C
13
SB_DQ[63:0]
W8
12
SA_DQ[63:0]
SB_CK[0]
SB_CK_DDR0
13
AA6
W9
SA_CK[0]
SA_CK_DDR0
12
SB_CK#[0]
SB_CK_DDR#0
13
AA7
SA_CK#[0]
SA_CK_DDR#0
12
SB_DQ0
B5
M3
SB_DQ[0]
SB_CKE[0]
SB_CKE0
13
P7
A5
SA_CKE[0]
SA_CKE0
12
SB_DQ[1]
SA_DQ0
A10
SB_DQ1
C3
SA_DQ[0]
SB_DQ[2]
SA_DQ1
C10
B3
V7
D
SB_DQ2
D
SA_DQ[1]
SB_DQ3
SB_DQ[3]
SB_CK[1]
SB_CK_DDR1
13
SA_DQ2
C7
E4
V6
SA_DQ[2]
SB_DQ[4]
SB_CK#[1]
SB_CK_DDR#1
13
SA_DQ3
A7
Y6
SA_DQ[3]
SA_CK[1]
SA_CK_DDR1
12
SB_DQ5
SB_DQ4
A6
M2
SB_DQ[5]
SB_CKE[1]
SB_CKE1
13
SA_DQ4
B10
Y5
A4
SA_DQ[4]
SA_CK#[1]
SA_CK_DDR#1
12
D10
P6
SB_DQ6
SB_DQ[6]
SA_DQ5
C4
SA_DQ[5]
SA_CKE[1]
SA_CKE1
12
SA_DQ6
SB_DQ7
SB_DQ[7]
E10
SA_DQ[6]
SA_DQ7
A8
SB_DQ9
SB_DQ8
D1
SB_DQ[8]
D2
SA_DQ[7]
SB_DQ[9]
SA_DQ8
D8
SB_DQ10
F2
AB8
SA_DQ[8]
SB_DQ[10]
SB_CS#[0]
SB_CS#0
13
SA_DQ9
F10
AE2
F1
AD6
SA_DQ[9]
SA_CS#[0]
SA_CS#0
12
SA_DQ10
SB_DQ12
SB_DQ11
SB_DQ[11]
SB_CS#[1]
SB_CS#1
13
E6
AE8
C2
SA_DQ[10]
SA_CS#[1]
SA_CS#1
12
SB_DQ[12]
SA_DQ11
F7
F5
SA_DQ[11]
SB_DQ[13]
SA_DQ12
E9
SB_DQ13
F3
SA_DQ[12]
SB_DQ[14]
SA_DQ13
B7
SB_DQ15
SB_DQ14
G4
AC7
SA_DQ[13]
SB_DQ[15]
SB_ODT[0]
SB_ODT0
13
SA_DQ14
E7
AD8
H6
AD1
SA_DQ[14]
SA_ODT[0]
SA_ODT0
12
SB_DQ[16]
SB_ODT[1]
SB_ODT1
13
SA_DQ15
C6
AF9
SA_DQ[15]
SA_DQ16
SB_DQ17
SB_DQ16
G2
SA_ODT[1]
SA_ODT1
12
SB_DQ[17]
H10
J6
SA_DQ[16]
G8
SB_DQ18
SB_DQ[18]
SA_DQ17
J3
SA_DQ[17]
SB_DQ[19]
SB_DM[7:0]
13
SA_DQ18
K7
SB_DQ20
SB_DQ19
G1
SA_DQ[18]
SB_DQ[20]
SA_DQ19
J8
G5
D4
SB_DM0
SA_DQ[19]
SB_DQ[21]
SB_DM[0]
SA_DQ20
G7
SB_DQ21
J2
E1
SB_DM1
SA_DQ[20]
SA_DM[7:0]
12
SB_DQ[22]
SB_DM[1]
SA_DQ21
G10
SB_DQ22
SB_DQ23
J1
H3
SB_DM2
SA_DQ[21]
SB_DQ[23]
SB_DM[2]
SA_DQ22
J7
B9
SA_DM0
J5
K1
SB_DM3
SA_DQ[22]
SA_DM[0]
SA_DQ23
J10
D7
SA_DM1
SB_DQ24
SB_DQ[24]
SB_DM[3]
SA_DQ24
L7
SA_DM2
SB_DQ25
K2
AH1
SB_DM4
SA_DQ[23]
SA_DM[1]
SB_DQ[25]
SB_DM[4]
H7
L3
AL2
SB_DM5
SA_DQ[24]
SA_DM[2]
SB_DQ[26]
SB_DM[5]
SA_DQ25
M6
M7
SA_DM3
SB_DQ27
SB_DQ26
M1
AR4
SB_DM6
SA_DQ[25]
SA_DM[3]
SB_DQ[27]
SB_DM[6]
SA_DQ26
M8
AG6
SA_DM4
K5
AT8
SB_DM7
SA_DQ[26]
SA_DM[4]
SB_DQ[28]
SB_DM[7]
SA_DQ27
L9
AM7
SA_DM5
SB_DQ28
K4
SA_DQ[27]
SA_DM[5]
SB_DQ[29]
SA_DQ28
L6
AN10
SA_DM6
SB_DQ29
M4
SA_DQ[28]
SA_DM[6]
SB_DQ[30]
SA_DQ29
K8
AN13
SA_DM7
SB_DQ30
SA_DM[7]
N8
SB_DQ32
SB_DQ31
N5
SA_DQ[29]
SB_DQ[31]
SA_DQ30
AF3
SA_DQ[30]
SB_DQ[32]
SA_DQ31
P9
AG1
C
C
SA_DQ[31]
AH5
SB_DQ33
SB_DQ[33]
SA_DQ32
SB_DQ34
AJ3
D5
SB_DQS#0
SA_DQ[32]
SB_DQ[34]
SB_DQS#[0]
SB_DQS#0
13
SA_DQ33
AF5
SA_DQ[33]
SB_DQ35
AK1
F4
SB_DQS#1
SB_DQ[35]
SB_DQS#[1]
SB_DQS#1
13
SA_DQ34
AK6
C9
SA_DQS#0
SA_DQ[34]
SA_DQS#[0]
SA_DQS#0
12
SA_DQ35
AK7
F8
SA_DQS#1
SB_DQ36
AG4
J4
SB_DQS#2
SB_DQ[36]
SB_DQS#[2]
SB_DQS#2
13
AG3
L4
SB_DQS#3
SA_DQ[35]
SA_DQS#[1]
SA_DQS#1
12
SB_DQ37
SB_DQ[37]
SB_DQS#[3]
SB_DQS#3
13
SA_DQ36
AF6
J9
SA_DQS#2
AJ4
SA_DQ[36]
SA_DQS#[2]
SA_DQS#2
12
SB_DQ38
AH2
SB_DQS#4
SB_DQ[38]
SB_DQS#[4]
SB_DQS#4
13
SA_DQ37
AG5
N9
SA_DQS#3
SB_DQ39
AH4
AL4
SB_DQS#5
SA_DQ[37]
SA_DQS#[3]
SA_DQS#3
12
SB_DQ[39]
SB_DQS#[5]
SB_DQs#5
13
SA_DQ38
AJ7
AH7
SA_DQS#4
SA_DQ[38]
SA_DQS#[4]
SA_DQS#4
12
SA_DQ39
AJ6
AK9
SA_DQS#5
SB_DQ40
AK3
AR5
SB_DQS#6
SB_DQ[40]
SB_DQS#[6]
SB_DQS#6
13
AK4
AR8
SB_DQS#7
SA_DQ[39]
SA_DQS#[5]
SA_DQS#5
12
SB_DQ[41]
13
SA_DQ40
AJ10
AP11
SA_DQS#6
SB_DQ42
SB_DQ41
SB_DQS#[7]
SB_DQS#7
AM6
SA_DQ[40]
SA_DQS#[6]
SA_DQS#6
12
SB_DQ[42]
SA_DQ41
AJ9
AT13
SA_DQS#7
SA_DQ[41]
SA_DQS#[7]
SA_DQS#7
12
SA_DQ42
AL10
SB_DQ44
SB_DQ43
AN2
SB_DQ[43]
AK5
SA_DQ[42]
SB_DQ[44]
SA_DQ43
AK12
SA_DQ[43]
SB_DQ45
AK2
SB_DQ[45]
SA_DQ44
AK8
AM4
SA_DQ[44]
SB_DQ[46]
SA_DQ45
AL7
SB_DQ47
SB_DQ46
AM3
SA_DQ[45]
SB_DQ[47]
SA_DQ46
AK11
C8
SA_DQS0
AP3
C5
SB_DQS0
SA_DQ[46]
SA_DQS[0]
SA_DQS0
12
SB_DQ[48]
SB_DQS[0]
SB_DQS0
13
SA_DQ47
AL8
F9
SA_DQS1
SA_DQ[47]
SA_DQS[1]
SA_DQS1
12
SB_DQ49
SB_DQ48
AN5
E3
SB_DQS1
SB_DQ[49]
SB_DQS[1]
SB_DQS1
13
SA_DQ48
AN8
H9
SA_DQS2
AT4
H4
SB_DQS2
SA_DQ[48]
SA_DQS[2]
SA_DQS2
12
SB_DQ[50]
SB_DQS[2]
SB_DQS2
13
SA_DQ49
AM10
M9
SA_DQS3
SB_DQ50
AN6
M5
SB_DQS3
SA_DQ[49]
SA_DQS[3]
SA_DQS3
12
SB_DQ[51]
SB_DQS[3]
SB_DQS3
13
SA_DQ50
AR11
AH8
SA_DQS4
SA_DQ[50]
SA_DQS[4]
SA_DQS4
12
SA_DQ51
AL11
AK10
SA_DQS5
SB_DQ52
SB_DQ51
AN4
AG2
SB_DQS4
SB_DQ[52]
SB_DQS[4]
SB_DQS4
13
SB_DQ53
AN3
AL5
SB_DQS5
SA_DQ[51]
SA_DQS[5]
SA_DQS5
12
SB_DQ[53]
SB_DQS[5]
SB_DQS5
13
SA_DQ52
AM9
AN11
SA_DQS6
AT5
AP5
SB_DQS6
SA_DQ[52]
SA_DQS[6]
SA_DQS6
12
SB_DQ[54]
SB_DQS[6]
SB_DQS6
13
SA_DQ53
AN9
AR13
SA_DQS7
SB_DQ54
AT6
AR7
SB_DQS7
SA_DQ[53]
SA_DQS[7]
SA_DQS7
12
SB_DQ[55]
SB_DQS[7]
SB_DQS7
13
SA_DQ54
AT11
SB_DQ55
SA_DQ[54]
SB_DQ56
AN7
SB_DQ[56]
SA_DQ55
AP12
AP6
SA_DQ[55]
SB_DQ[57]
SA_DQ56
AM12
SA_MA[15:0]
12
SB_DQ57
SA_DQ[56]
AN12
SB_DQ59
SB_DQ58
AP8
SB_DQ[58]
SA_DQ57
AT9
SA_DQ[57]
SB_DQ[59]
SA_DQ58
AM13
Y3
SA_MA0
AT7
SA_DQ[58]
SA_MA[0]
SB_DQ[60]
SA_DQ59
AT14
W1
SA_MA1
SB_DQ60
SA_DQ[59]
SA_DQ60
AA8
SA_MA2
SB_DQ61
AP9
SB_MB[15:0]
13
SA_MA[1]
SB_DQ[61]
AT12
AR10
SA_DQ[60]
SA_MA[2]
SB_DQ[62]
SA_DQ61
AL13
AA3
SA_MA3
SB_DQ62
SB_DQ63
AT10
U5
SB_MB0
B
B
SA_DQ[61]
SA_MA[3]
SB_DQ[63]
SB_MA[0]
SA_DQ62
AR14
V1
SA_MA4
V2
SB_MB1
SA_DQ[62]
SA_MA[4]
SB_MA[1]
SA_DQ63
AP14
AA9
SA_MA5
T5
SB_MB2
SA_DQ[63]
SA_MA[5]
SB_MA[2]
V8
SA_MA6
V3
SB_MB3
SA_MA[6]
SB_MA[3]
T1
SA_MA7
R1
SB_MB4
SA_MA[7]
SB_MA[4]
Y9
SA_MA8
AB1
T8
SB_MB5
SA_MA[8]
13
SB_BS0
SB_BS[0]
SB_MA[5]
AC3
U6
SA_MA9
W5
R2
SB_MB6
12
SA_BS0
SA_BS[0]
SA_MA[9]
13
SB_BS1
SB_BS[1]
SB_MA[6]
AB2
AD4
SA_MA10
R7
R6
SB_MB7
12
SA_BS1
SA_BS[1]
SA_MA[10]
13
SB_BS2
SB_BS[2]
SB_MA[7]
U7
T2
SA_MA11
R4
SB_MB8
12
SA_BS2
SA_BS[2]
SA_MA[11]
SB_MA[8]
U3
SA_MA12
R5
SB_MB9
SA_MA[12]
SB_MA[9]
AG8
SA_MA13
AC5
AB5
SB_MB10
SA_MA[13]
13
SB_CAS#
SB_CAS#
SB_MA[10]
T3
SA_MA14
Y7
P3
SB_MB11
SA_MA[14]
13
SB_RAS#
SB_RAS#
SB_MA[11]
AE1
V9
SA_MA15
AC6
R3
SB_MB12
12
SA_CAS#
SA_CAS#
SA_MA[15]
13
SB_WE#
SB_WE#
SB_MA[12]
AB3
AF7
SB_MB13
12
SA_RAS#
SA_RAS#
SB_MA[13]
AE9
P5
SB_MB14
12
SA_WE#
SA_WE#
SB_MA[14]
N1
SB_MB15
SB_MA[15]
SKT989P+4P
SKT989P+4P
SKT989P+4P
SKT989P+4P
A
A
Title
Title
Title
SAMUI_2.0_ARD DDR3
SAMUI_2.0_ARD DDR3
SAMUI_2.0_ARD DDR3
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
Custom
Custom
Custom
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
9
9
9
of
of
of
46
46
46
5
4
3
2
1
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
5 4 3 2 1 U0801I U0801I U0801H U0801H U0801E U0801E K27 AT20 AE34 VSS161
5
4
3
2
1
U0801I
U0801I
U0801H
U0801H
U0801E
U0801E
K27
AT20
AE34
VSS161
VSS1
VSS81
K9
AJ13
AT17
AE33
VSS162
RSVD32
VSS2
VSS82
K6
AJ12
AR31
AE32
VSS163
RSVD33
VSS3
VSS83
K3
D
AR28
AE31
VSS164
D
VSS4
VSS84
J32
AP25
AR26
AE30
VSS165
RSVD1
VSS5
VSS85
J30
AL25
AH25
AR24
AE29
VSS166
RSVD2
RSVD34
VSS6
VSS86
J21
AL24
AK26
AR23
AE28
VSS167
RSVD3
RSVD35
VSS7
VSS87
J19
AL22
AR20
AE27
VSS168
RSVD4
VSS8
VSS88
H35
AJ33
AL26
AR17
AE26
VSS169
RSVD5
RSVD36
VSS9
VSS89
H32
AG9
AR2
AR15
AE6
VSS170
10mis trace
RSVD6
RSVD_NCTF_37
VSS10
VSS90
H28
M27
AR12
AD10
VSS171
RSVD7
VSS11
VSS91
H26
L28
AJ26
AR9
AC8
VSS172
RSVD8
RSVD38
VSS12
VSS92
H24
1
J17
AJ27
AR6
AC4
VSS173
STPSTP
TP275TP275
SA_DIMM_VREFDQ
RSVD39
VSS13
VSS93
H22
1
H17
AR3
AC2
VSS174
STPSTP
TP280TP280
SB_DIMM_VREFDQ
VSS14
VSS94
H18
G25
AP20
AB35
VSS175
RSVD11
VSS15
VSS95
H15
G17
AP17
AB34
VSS176
RSVD12
VSS16
VSS96
H13
E31
AP1
AP13
AB33
VSS177
RSVD13
RSVD_NCTF_40
TP157TP157
STPSTP
VSS17
VSS97
H11
E30
AT2
AP10
AB32
VSS178
RSVD14
RSVD_NCTF_41
TP158TP158
STPSTP
VSS18
VSS98
H8
AP7
AB31
VSS179
VSS19
VSS99
H5
AT3
AP4
AB30
VSS180
RSVD_NCTF_42
TP159TP159
STPSTP
VSS20
VSS100
H2
AR1
AP2
AB29
VSS181
RSVD_NCTF_43
TP160TP160
STPSTP
VSS21
VSS101
G34
AN34
AB28
VSS182
VSS22
VSS102
G31
AN31
AB27
VSS183
VSS23
VSS103
G20
AN23
AB26
VSS184
VSS24
VSS104
G9
AL28
AN20
AB6
VSS185
RSVD45
VSS25
VSS105
G6
TP132TP132
STPSTP
1
CFG0
AM30
AL29
AN17
AA10
VSS186
CFG[0]
RSVD46
VSS26
VSS106
G3
TP133TP133
STPSTP
1
CFG1
AM28
AP30
AM29
Y8
VSS187
CFG[1]
RSVD47
VSS27
VSS107
F30
TP134TP134
STPSTP
1
CFG2
AP31
AP32
AM27
Y4
VSS188
CFG[2]
RSVD48
VSS28
VSS108
F27
TP135TP135
STPSTP
1
CFG3
AL32
AL27
AM25
Y2
VSS189
CFG[3]
RSVD49
VSS29
VSS109
F25
TP136TP136
STPSTP
1
CFG4
AL30
AT31
AM20
W35
VSS190
CFG[4]
RSVD50
VSS30
VSS110
F22
TP137TP137
STPSTP
1
CFG5
AM31
AT32
AM17
W34
VSS191
CFG[5]
RSVD51
VSS31
VSS111
F19
TP138TP138
STPSTP
1
CFG6
AN29
AP33
AM14
W33
VSS192
CFG[6]
RSVD52
VSS32
VSS112
F16
TP139TP139
STPSTP
1
CFG7
AM32
AR33
AM11
W32
VSS193
CFG[7]
RSVD53
VSS33
VSS113
E35
TP140TP140
STPSTP
1
CFG8
AK32
AT33
AM8
W31
VSS194
CFG[8]
RSVD_NCTF_54
VSS34
VSS114
E32
TP141TP141
STPSTP
1
CFG9
AK31
AT34
AM5
W30
VSS195
VSS
VSS
CFG[9]
RSVD_NCTF_55
VSS35
VSS115
E29
TP142TP142
STPSTP
1
CFG10
AK28
AP35
AM2
W29
VSS196
CFG[10]
RSVD_NCTF_56
VSS36
VSS116
E24
TP143TP143
STPSTP
1
CFG11
AJ28
AR35
AL34
W28
VSS197
CFG[11]
RSVD_NCTF_57
VSS37
VSS
VSS
VSS117
E21
TP144TP144
STPSTP
1
CFG12
AN30
AR32
AL31
W27
VSS198
CFG[12]
RSVD58
VSS38
VSS118
E18
TP145TP145
STPSTP
1
CFG13
AN32
AL23
W26
VSS199
CFG[13]
VSS39
VSS119
E13
TP146TP146
STPSTP
1
CFG14
AJ32
AL20
W6
VSS200
CFG[14]
VSS40
VSS120
E11
TP147TP147
STPSTP
1
CFG15
AJ29
E15
AL17
V10
VSS201
C
CFG[15]
RSVD_TP_59
VSS41
VSS121
E8
C
TP148TP148
STPSTP
1
CFG16
AJ30
F15
AL12
U8
VSS202
CFG[16]
RSVD_TP_60
VSS42
VSS122
E5
TP149TP149
STPSTP
1
CFG17
AK30
A2
AL9
U4
VSS203
CFG[17]
KEY
VSS43
VSS123
E2
AT35
TP_VSS_NCTF1
1
TP150TP150
STPSTP
1
CFG18
H16
D15
AL6
U2
VSS204
VSS_NCTF1
TP161TP161
STPSTP
RSVD_TP_86
RSVD62
VSS44
VSS124
D33
AT1
TP_VSS_NCTF2
1
C15
AL3
T35
VSS205
VSS_NCTF2
TP162TP162
STPSTP
RSVD63
VSS45
VSS125
D30
AR34
AJ15
RSVD64_R
R690R690
1
2
0R0R
AK29
T34
VSS206
VSS_NCTF3
RSVD64
VSS46
VSS126
D26
B34
AH15
RSVD65_R
R691R691
1
2
0R0R
AK27
T33
VSS207
VSS_NCTF4
RSVD65
VSS47
VSS127
D9
B2
AK25
T32
VSS208
VSS_NCTF5
VSS48
VSS128
D6
B1
TP_VSS_NCTF6
1
B19
AK20
T31
VSS209
VSS_NCTF6
TP163TP163
STPSTP
RSVD15
VSS49
VSS129
D3
A35
TP_VSS_NCTF7
1
A19
AK17
T30
VSS210
VSS_NCTF7
TP164TP164
STPSTP
RSVD16
VSS50
VSS130
C34
AJ31
T29
VSS211
VSS51
VSS131
C32
R688R688
1
2
0R0R
RSVD17_R
A20
AJ23
T28
VSS212
RSVD17
VSS52
VSS132
C29
R689R689
1
2
0R0R RSVD18_R
B20
AJ20
T27
VSS213
RSVD18
VSS53
VSS133
C28
AA5
AJ17
T26
VSS214
RSVD_TP_66
VSS54
VSS134
C24
U9
AA4
AJ14
T6
VSS215
RSVD19
RSVD_TP_67
VSS55
VSS135
C22
T9
R8
AJ11
R10
VSS216
RSVD20
RSVD_TP_68
VSS56
VSS136
C20
AD3
AJ8
P8
VSS217
RSVD_TP_69
VSS57
VSS137
C19
AC9
AD2
AJ5
P4
VSS218
RSVD21
RSVD_TP_70
VSS58
VSS138
C16
AB9
AA2
AJ2
P2
VSS219
RSVD22
RSVD_TP_71
VSS59
VSS139
B31
AA1
AH35
N35
VSS220
RSVD_TP_72
VSS60
VSS140
B25
R9
AH34
N34
VSS221
RSVD_TP_73
VSS61
VSS141
B21
AG7
AH33
N33
VSS222
RSVD_TP_74
VSS62
VSS142
B18
TP151TP151
STPSTP
1
C1
AE3
AH32
N32
VSS223
RSVD_NCTF_23
RSVD_TP_75
VSS63
VSS143
B17
TP152TP152
STPSTP
1
A3
AH31
N31
VSS224
RSVD_NCTF_24
VSS64
VSS144
B13
AH30
N30
VSS225
VSS65
VSS145
B11
V4
AH29
N29
VSS226
RSVD_TP_76
VSS66
VSS146
B8
V5
AH28
N28
VSS227
RSVD_TP_77
VSS67
VSS147
B6
N2
AH27
N27
VSS228
RSVD_TP_78
VSS68
VSS148
B4
J29
AD5
AH26
N26
VSS229
RSVD26
RSVD_TP_79
VSS69
VSS149
A29
J28
AD7
AH20
N6
VSS230
RSVD27
RSVD_TP_80
VSS70
VSS150
A27
W3
AH17
M10
VSS231
RSVD_TP_81
VSS71
VSS151
A23
TP153TP153
STPSTP
1
A34
W2
AH13
L35
VSS232
RSVD_NCTF_28
RSVD_TP_82
VSS72
VSS152
A9
TP154TP154
STPSTP
1
A33
N3
AH9
L32
VSS233
RSVD_NCTF_29
RSVD_TP_83
VSS73
VSS153
AE5
AH6
L29
RSVD_TP_84
VSS74
VSS154
TP155TP155
STPSTP
1
C35
AD9
AH3
L8
RSVD_NCTF_30
RSVD_TP_85
VSS75
VSS155
TP156TP156
STPSTP
1
B35
AG10
L5
RSVD_NCTF_31
VSS76
VSS156
AF8
L2
VSS77
VSS157
AP34
AF4
K34
VSS
VSS78
VSS158
B
AF2
K33
B
VSS79
VSS159
AE35
K30
VSS80
VSS160
SKT989P+4P
SKT989P+4P
SKT989P+4P
SKT989P+4P
SKT989P+4P
SKT989P+4P
CFG0
R1355R1355
1 1%1%
2
3K01_NA3K01_NA
CFG3
R1356R1356
1 1%1%
2
3K01_NA3K01_NA
CFG4
R1357R1357
1 1%1%
2
3K01_NA3K01_NA
CFG7
R1358R1358
1 1%1%
2
3K01_NA3K01_NA
A
A
Title
Title
Title
SAMUI_2.0_CFG/RSVD/GND
SAMUI_2.0_CFG/RSVD/GND
SAMUI_2.0_CFG/RSVD/GND
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
C
C
C
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
10
10
10
of
of
of
46
46
46
5
4
3
2
1
RESERVED
RESERVED
NCTF
NCTF
5 4 3 2 1 VCORE U0801F U0801F VGFX_CORE U0801G U0801G GRAPHICS GRAPHICS FDI FDI
5
4
3
2
1
VCORE
U0801F
U0801F
VGFX_CORE
U0801G
U0801G
GRAPHICS
GRAPHICS
FDI
FDI
PEG & DMI
PEG & DMI
VTT_CPU
AT21
VAXG1
AT19
AR22
VAXG2
VAXG_SENSE
VCCAGX_SENSE
39
AG35
AH14
AT18
AT22
VCC1
VTT0_1
VAXG3
VSSAXG_SENSE
VSSAGX_SENSE
39
AG34
AH12
AT16
VCC2
VTT0_2
VAXG4
AG33
AH11
AR21
VCC3
VTT0_3
VAXG5
AG32
AH10
AR19
VCC4
VTT0_4
VAXG6
AG31
J14
AR18
VCC5
VTT0_5
VAXG7
AG30
J13
AR16
AM22
GFX_VID0
VCC6
VTT0_6
VAXG8
GFX_VID[0]
GFX_VID0
39
AG29
H14
AP21
AP22
GFX_VID1
VCC7
VTT0_7
VAXG9
GFX_VID[1]
GFX_VID1
39
AG28
H12
AP19
AN22
GFX_VID2
D
VCC8
VTT0_8
VAXG10
GFX_VID[2]
GFX_VID2
39
D
AG27
G14
AP18
AP23
GFX_VID3
VCC9
VTT0_9
VAXG11
GFX_VID[3]
GFX_VID3
39
AG26
G13
AP16
AM23
GFX_VID4
R1362R1362
1
1%1%
2
10K10K
VTT_CPU
VCC10
VTT0_10
VAXG12
GFX_VID[4]
GFX_VID4
39
AF35
G12
AN21
AP24
GFX_VID5
VCC11
VTT0_11
VAXG13
GFX_VID[5]
GFX_VID5
39
AF34
G11
AN19
AN24
GFX_VID6
R694R694
1
2
0R0R
VCC12
VTT0_12
VAXG14
GFX_VID[6]
GFX_VID6
39
GFX_VR_ON
39
AF33
F14
AN18
VCC13
VTT0_13
VAXG15
AF32
F13
AN16
R716R716
1
2
0R_NA0R_NA
VCC14
VTT0_14
VAXG16
AF31
F12
AM21
AR25
VCC15
VTT0_15
VAXG17
GFX_VR_EN
AF30
F11
AM19
AT25
R695R695
1
2
0R0R
VCC16
VTT0_16
VTT_CPU
VAXG18
GFX_DPRSLPVR
AF29
E14
AM18
AM24
VCC17
VTT0_17
VAXG19
GFX_IMON
AF28
E12
AM16
VCC18
VTT0_18
VAXG20
AF27
D14
AL21
GFX_IMON
39
VSUS_1P5
VCC19
VTT0_19
VAXG21
AF26
D13
AL19
VCC20
VTT0_20
VAXG22
AD35
D12
AL18
VCC21
VTT0_21
VAXG23
AD34
D11
AL16
VCC22
VTT0_22
VAXG24
AD33
C14
AK21
AJ1
VCC23
VTT0_23
C536
C536
C535
C535
VAXG25
VDDQ1
AD32
C13
AK19
AF1
VCC24
VTT0_24
10UF_NA
10UF_NA
10UF_NA
10UF_NA
VAXG26
VDDQ2
AD31
C12
AK18
AE7
VCC25
VTT0_25
X5R
X5R
X5R
X5R
VAXG27
VDDQ3
AD30
C11
AK16
AE4
EC9
EC9
VCC26
VTT0_26
VAXG28
VDDQ4
C698
C698
C695
C695
C696
C696
C697
C697
C699
C699
C700
C700
6V3
6V3
6V3
6V3
AD29
B14
AJ21
AC1
+
+
330UF
330UF
VCC27
VTT0_27
VAXG29
VDDQ5
1UF
1UF
1UF
1UF
1UF
1UF
1UF
1UF
22UF
22UF
22UF
22UF
AD28
B12
0805
0805
0805
0805
AJ19
AB7
POLYMER
POLYMER
VCC28
VTT0_28
VAXG30
VDDQ6
X5R
X5R
X5R
X5R
X5R
X5R
X5R
X5R
X5R
X5R
X5R
X5R
AD27
A14
AJ18
AB4
2.5V
2.5V
VCC29
VTT0_29
VAXG31
VDDQ7
10V
10V
10V
10V
10V
10V
10V
10V
6V3
6V3
6V3
6V3
AD26
A13
AJ16
Y1
VCC30
VTT0_30
VAXG32
VDDQ8
7343
7343
AC35
A12
AH21
W7
0805
0805
0805
0805
VCC31
VTT0_31
VAXG33
VDDQ9
AC34
A11
AH19
W4
VCC32
VTT0_32
VAXG34
VDDQ10
AC33
AH18
U1
VCC33
VTT_CPU
VAXG35
VDDQ11
AC32
AH16
T7
VCC34
VAXG36
VDDQ12
AC31
T4
VCC35
VDDQ13
AC30
AF10
P1
VCC36
VTT0_33
VDDQ14
AC29
AE10
N7
VCC37
VTT0_34
VTT_CPU
VDDQ15
AC28
AC10
N4
VCC38
VTT0_35
C494
C494
C361
C361
VDDQ16
AC27
AB10
L1
VCC39
VTT0_36
22UF
22UF
22UF
22UF
VDDQ17
AC26
Y10
J24
H1
VCC40
VTT0_37
X5R
X5R
X5R
X5R
VTT1_45
VDDQ18
AA35
W10
J23
VCC41
VTT0_38
VTT1_46
6V3
6V3
6V3
6V3
AA34
U10
H25
VCC42
VTT0_39
VTT1_47
AA33
T10
0805
0805
0805
0805
VTT_CPU
VCC43
VTT0_40
C500
C500
C502
C502
AA32
J12
VCC44
VTT0_41
22UF
22UF
22UF
22UF
AA31
J11
P10
VCC45
VTT0_42
X5R
X5R
X5R
X5R
VTT0_59
C
AA30
J16
N10
C
VCC46
VTT0_43
VTT0_60
C693
C693
C694
C694
6V3
6V3
6V3
6V3
AA29
J15
L10
VCC47
VTT0_44
VTT0_61
22UF
22UF
22UF
22UF
AA28
0805
0805
0805
0805
K10
VCC48
VTT0_62
X5R
X5R
X5R
X5R
AA27
VCC49
6V3
6V3
6V3
6V3
AA26
VCC50
VTT_CPU
Y35
0805
0805
0805
0805
VTT_CPU
VCC51
Y34
VTT_CPU
VCC52
Y33
J22
VCC53
VTT1_63
Y32
K26
J20
VCC54
VTT1_48
VTT1_64
2
Y31
J27
J18
C686
C686
C687
C687
VCC55
VTT1_49
VTT1_65
Y30
J26
H21
22UF
22UF
22UF
22UF
VCC56
R693
R693
C504
C504
VTT1_50
VTT1_66
Y29
C507
C507
C510
C510
C522
C522
J25
H20
X5R
X5R
X5R
X5R
VCC57
22UF
22UF
0R_NA
0R_NA
VTT1_51
VTT1_67
Y28
22UF
22UF
22UF
22UF
22UF
22UF
H27
H19
6V3
6V3
6V3
6V3
VCC58
X5R
X5R
VTT1_52
VTT1_68
Y27
X5R
X5R
X5R
X5R
X5R
X5R
G28
VCC59
VTT1_53
0805
0805
0805
0805
6V3
6V3
Y26
1
G27
6V3
6V3
6V3
6V3
6V3
6V3
VCC60
VTT1_54
VCC_1P8
V35
AN33
R692R692
1
2
0R0R
0805
0805
G26
VCC61
PSI#
PSI#
38
0805
0805
0805
0805
0805
0805
VTT1_55
V34
2
F26
VCC62
VTT1_56
V33
E26
L26
VCC63
VTT1_57
VCCPLL1
V32
AK35
CPU_VID0
R1524
R1524
VTT_CPU
E25
L27
VCC64
VID[0]
CPU_VID0
38
VTT1_58
VCCPLL2
V31
AK33
CPU_VID1
1K
1K
M26
VCC65
VID[1]
CPU_VID1
38
VCCPLL3
V30
AK34
CPU_VID2
C676
C676
C675
C675
2
VCC66
VID[2]
CPU_VID2
38
C692
C692
C691
C691
C690
C690
C672
C672
V29
AL35
CPU_VID3
4.7UF
4.7UF
4.7UF
4.7UF
VCC67
VID[3]
CPU_VID3
38
1UF
1UF
1UF
1UF
2.2UF
2.2UF
22UF
22UF
1
V28
AL33
CPU_VID4
R1523
R1523
X5R
X5R
X5R
X5R
VCC68
VID[4]
CPU_VID4
38
X5R
X5R
X5R
X5R
X5R
X5R
X5R
X5R
V27
AM33
CPU_VID5
1K
1K
CPU_VID5
38
6V3
6V3
6V3
6V3
VCC69
VID[5]
V26
AM35
CPU_VID6
10V
10V
10V
10V
16V
16V
6V3
6V3
VCC70
VID[6]
CPU_VID6
38
0603
0603
0603
0603
U35
AM34
0603
0603
0805
0805
VCC71
PROC_DPRSLPVR
1
U34
R743R743
1
2
0R0R
2
VCC72
DPRSLPVR
38
U33
SKT989P+4P
SKT989P+4P
VCC73
U32
R759
R759
VCC74
U31
G15
1
0R_NA
0R_NA
VCC75
VTT_SELECT
TP173TP173
STPSTP
U30
VCC76
U29
VCC77
1
U28
VTT_CPU
VCC78
U27
VCC79
U26
VCC80
R1488R1488
1
2
1K_NA1K_NA
CPU_VID0
R1486R1486
1
2
1K1K
R35
VCC81
R34
R1490R1490
1 2
1K_NA1K_NA
CPU_VID1
R1489R1489
1 2
1K1K
VCC82
R33
B
VCC83
R1492R1492
1 2
1K_NA1K_NA
CPU_VID2
R1491R1491
1 2
1K1K
B
R32
AN35
VCC84
ISENSE
VCORE_IMON
22,38
R31
R1494R1494
1 2
1K1K
CPU_VID3
R1493R1493
1 2
1K_NA1K_NA
VCC85
R30
VCC86
R1496R1496
1
2
1K1K
CPU_VID4
R1495R1495
1
2
1K_NA1K_NA
R29
VCC87
R28
AJ34
VCC_SENSE
R1498R1498
1 2
1K_NA1K_NA
CPU_VID5
R1497R1497
1 2
1K1K
VCC88
VCC_SENSE
VCC_SENSE
38
R27
AJ35
VSS_SENSE
VCC89
VSS_SENSE
VSS_SENSE
38
R1500R1500
1 2
1K1K
CPU_VID6
R1499R1499
1 2
1K_NA1K_NA
R26
VCC90
P35
VCC91
P34
B15
VTT_SENSE
1
VCC92
VTT_SENSE
TP165TP165
STPSTP
P33
A15
VSS_SENSE_VTT
1
VCC93
VSS_SENSE_VTT
TP166TP166
STPSTP
P32
VCC94
P31
VCC95
P30
VCC96
CPU/VGFX VID CONTROOLER
CPU VID [6:0] 0100111 VCORE=1.0125V
VGA VID [6:0] 0100111 VGFX=1.0125V
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
VTT_CPU
R1501R1501
1
2
1K_NA1K_NA
GFX_VID0
R1502R1502
1
2
1K1K
R1504R1504
1 2
1K_NA1K_NA
GFX_VID1
R1503R1503
1 2
1K1K
R1505R1505
1 2
1K_NA1K_NA
GFX_VID2
R1506R1506
1 2
1K1K
CPU CORE SUPPLY
CPU CORE SUPPLY
R1508R1508
1 2
1K1K
GFX_VID3
R1507R1507
1 2
1K_NA1K_NA
SKT989P+4P
SKT989P+4P
R1509R1509
1
2
1K1K
GFX_VID4
R1510R1510
1 2
1K_NA1K_NA
R1512R1512
1 2
1K_NA1K_NA
GFX_VID5
R1511R1511
1 2
1K1K
R1513R1513
1 2
1K1K
GFX_VID6
R1514R1514
1 2
1K_NA1K_NA
A
A
Title
Title
Title
SAMUI_2.0_ARD PWR
SAMUI_2.0_ARD PWR
SAMUI_2.0_ARD PWR
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
C
C
C
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
11
11
11
of
of
of
46
46
46
5
4
3
2
1
POWER
POWER
SENSE LINES
SENSE LINES
CPU VIDS
CPU VIDS
1.1V RAIL POWER
1.1V RAIL POWER
C67110UF
C67110UF
12
X5R
X5R
12
6V30805
6V30805
C53810UF
C53810UF
12
X5R
X5R
6V30805
6V30805
C54210UF
C54210UF
12
X5R
X5R
12
6V30805
6V30805
C54410UF
C54410UF
12
X5R
X5R
6V30805
6V30805
C65410UF
C65410UF
12
X5R
X5R
6V30805
6V30805
12
C65710UF
C65710UF
12
X5R
X5R
6V30805
6V30805
C66110UF
C66110UF
12
X5R
X5R
6V30805
6V30805
C66510UF
C66510UF
12
X5R
X5R
C53210UF_NA
C53210UF_NA
12
X5R
X5R
6V30805
6V30805
6V30805
6V30805
C66810UF
C66810UF
12
X5R
X5R
6V30805
6V30805
12
12
12
12
12
12
12
POWER
POWER
SENSE
SENSE
GRAPHICS VIDs
GRAPHICS VIDs
LINES
LINES
1.1V1.8V
1.1V1.8V
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
5 4 3 2 1 CHANNEL A & DIMM0 D D J1201B J1201B 9 SA_MA[15:0]
5
4
3
2
1
CHANNEL A & DIMM0
D
D
J1201B
J1201B
9
SA_MA[15:0]
SA_MA0
98
SA_DQ[63:0]
9
A0
A0
SA_MA1
97
5
SA_DQ0
A1
A1
DQ0
DQ0
SA_MA2
96
7
SA_DQ1
VCC_3P3
A2
A2
DQ1
DQ1
SA_MA3
95
15
SA_DQ2
A3
A3
DQ2
DQ2
SA_MA4
92
17
SA_DQ3
A4
A4
DQ3
DQ3
SA_MA5
91
4
SA_DQ4
J1201A
J1201A
VSUS_1P5
A5
A5
DQ4
DQ4
SA_MA6
90
6
SA_DQ5
C725
C725
C726
C726
A6
A6
DQ5
DQ5
SA_MA7
86
16
SA_DQ6
0.1UF
0.1UF
0.1UF
0.1UF
A7
A7
DQ6
DQ6
SA_MA8
89
18
SA_DQ7
Y5V
Y5V
Y5V
Y5V
A8
A8
DQ7
DQ7
SA_MA9
85
21
SA_DQ8
VREFDQ_DIMM0
A9
A9
DQ8
DQ8
16V
16V
16V
16V
199
75
SA_MA10
107
23
SA_DQ9
VDDSPD
VDDSPD
VDD1
VDD1
A10/AP
A10/AP
DQ9
DQ9
76
SA_MA11
84
33
SA_DQ10
VDD2
VDD2
A11
A11
DQ10
DQ10
1
81
SA_MA12
83
35
SA_DQ11
VREFDQ
VREFDQ
VDD3
VDD3
A12/BC*
A12/BC*
DQ11
DQ11
126
82
SA_MA13
119
22
SA_DQ12
VREFCA
VREFCA
VDD4
VDD4
A13
A13
DQ12
DQ12
C727
C727
C728
C728
87
SA_MA14
80
24
SA_DQ13
VDD5
VDD5
A14
A14
DQ13
DQ13
2.2UF
2.2UF
0.1UF
0.1UF
88
SA_MA15
78
34
SA_DQ14
VDD6
VDD6
A15
A15
DQ14
DQ14
VREFCA_DIMM0
Y5V
Y5V
Y5V
Y5V
77
93
36
SA_DQ15
NC1
NC1
VDD7
VDD7
DQ15
DQ15
122
94
6V3
6V3
16V
16V
39
SA_DQ16
NC2
NC2
VDD8
VDD8
DQ16
DQ16
99
109
41
SA_DQ17
0603
0603
VDD9
VDD9
9
SA_BS0
BA0
BA0
DQ17
DQ17
100
108
51
SA_DQ18
VDD10
VDD10
9
SA_BS1
BA1
BA1
DQ18
DQ18
203
105
79
53
SA_DQ19
VCC_0P75
VTT1
VTT1
VDD11
VDD11
9
SA_BS2
BA2
BA2
DQ19
DQ19
C729
C729
C730
C730
204
106
40
SA_DQ20
VTT2
VTT2
VDD12
VDD12
DQ20
DQ20
2.2UF
2.2UF
0.1UF
0.1UF
111
110
42
SA_DQ21
VDD13
VDD13
VCC_0P75
9
SA_RAS#
RAS*
RAS*
DQ21
DQ21
Y5V
Y5V
Y5V
Y5V
112
115
50
SA_DQ22
VDD14
VDD14
9
SA_CAS#
CAS*
CAS*
DQ22
DQ22
2
117
C
6V3
6V3
16V
16V
113
SA_DQ23
VSS1
VSS1
C
52
VDD15
VDD15
9
SA_WE#
WE*
WE*
DQ23
DQ23
3
118
57
SA_DQ24
0603
0603
VSS2
VSS2
VDD16
VDD16
DQ24
DQ24
8
123
59
SA_DQ25
VSS3
VSS3
VDD17
VDD17
DQ25
DQ25
9
124
114
67
SA_DQ26
VSS4
VSS4
VDD18
VDD18
9
SA_CS#0
S0*
S0*
DQ26
DQ26
13
C742
C742
C743
C743
C819
C819
C820
C820
121
69
SA_DQ27
VSS5
VSS5
9
SA_CS#1
S1*
S1*
DQ27
DQ27
14
1UF
1UF
1UF
1UF
0.1UF
0.1UF
0.1UF
0.1UF
56
SA_DQ28
VSS6
VSS6
DQ28
DQ28
19
X5R
X5R
X5R
X5R
Y5V
Y5V
Y5V
Y5V
58
SA_DQ29
VSS7
VSS7
DQ29
DQ29
20
SA_DQ30
VSS8
VSS8
10V
10V
10V
10V
16V
16V
16V
16V
68
DQ30
DQ30
25
138
70
SA_DQ31
VSS9
VSS9
VSS31
VSS31
DQ31
DQ31
26
139
116
129
SA_DQ32
VSS10
VSS10
VSS32
VSS32
9
SA_ODT0
ODT0
ODT0
DQ32
DQ32
31
144
120
131
SA_DQ33
VSS11
VSS11
VSS33
VSS33
9
SA_ODT1
ODT1
ODT1
DQ33
DQ33
32
145
141
SA_DQ34
VSS12
VSS12
VSS34
VSS34
DQ34
DQ34
37
150
101
143
SA_DQ35
VSS13
VSS13
VSS35
VSS35
9
SA_CK_DDR0
CK0_1
CK0_1
DQ35
DQ35
38
151
103
130
SA_DQ36
VSS14
VSS14
VSS36
VSS36
9
SA_CK_DDR#0
CK0_2*
CK0_2*
DQ36
DQ36
43
155
102
132
SA_DQ37
VSS15
VSS15
VSS37
VSS37
9
SA_CK_DDR1
CK1_1
CK1_1
DQ37
DQ37
44
156
104
140
SA_DQ38
VSS16
VSS16
VSS38
VSS38
9
SA_CK_DDR#1
CK1_2*
CK1_2*
DQ38
DQ38
48
161
142
SA_DQ39
VSS17
VSS17
VSS39
VSS39
DQ39
DQ39
49
162
147
SA_DQ40
VSS18
VSS18
VSS40
VSS40
DQ40
DQ40
54
167
73
149
SA_DQ41
VSS19
VSS19
VSS41
VSS41
9
SA_CKE0
CKE0
CKE0
DQ41
DQ41
55
168
74
157
SA_DQ42
VSS20
VSS20
VSS42
VSS42
9
SA_CKE1
CKE1
CKE1
DQ42
DQ42
60
172
159
SA_DQ43
VSS21
VSS21
VSS43
VSS43
DQ43
DQ43
61
173
9
SA_DM[7:0]
146
SA_DQ44
VSS22
VSS22
VSS44
VSS44
DQ44
DQ44
65
178
SA_DM0
11
148
SA_DQ45
VSS23
VSS23
VSS45
VSS45
DM0
DM0
DQ45
DQ45
66
179
SA_DM1
28
158
SA_DQ46
VSS24
VSS24
VSS46
VSS46
DM1
DM1
DQ46
DQ46
71
184
SA_DM2
46
160
SA_DQ47
VSS25
VSS25
VSS47
VSS47
DM2
DM2
DQ47
DQ47
72
185
SA_DM3
63
163
SA_DQ48
VSS26
VSS26
VSS48
VSS48
DM3
DM3
DQ48
DQ48
127
189
SA_DM4
136
165
SA_DQ49
VSS27
VSS27
VSS49
VSS49
DM4
DM4
DQ49
DQ49
128
190
SA_DM5
153
175
SA_DQ50
VSS28
VSS28
VSS50
VSS50
DM5
DM5
DQ50
DQ50
133
195
SA_DM6
170
177
SA_DQ51
VSS29
VSS29
VSS51
VSS51
DM6
DM6
DQ51
DQ51
134
196
SA_DM7
187
164
SA_DQ52
VSS30
VSS30
VSS52
VSS52
DM7
DM7
DQ52
DQ52
B
B
166
SA_DQ53
DQ53
DQ53
MH1
205
SA_DQS0
12
174
SA_DQ54
MH1
MH1
NOCONN PAD LEFT
NOCONN PAD LEFT
9
SA_DQS0
DQS0_1
DQS0_1
DQ54
DQ54
MH2
206
SA_DQS#0
10
176
SA_DQ55
MH2
MH2
NOCONN PAD RGHT
NOCONN PAD RGHT
9
SA_DQS#0
DQS0_2*
DQS0_2*
DQ55
DQ55
SA_DQS1
29
181
SA_DQ56
9
SA_DQS1
DQS1_1
DQS1_1
DQ56
DQ56
SA_DQS#1
27
183
SA_DQ57
9
SA_DQS#1
DQS1_2*
DQS1_2*
DQ57
DQ57
DIMM204P+4P
DIMM204P+4P
SA_DQS2
47
191
SA_DQ58
9
SA_DQS2
DQS2_1
DQS2_1
DQ58
DQ58
SA_DQS#2
45
193
SA_DQ59
9
SA_DQS#2
DQS2_2*
DQS2_2*
DQ59
DQ59
SA_DQS3
64
180
SA_DQ60
9
SA_DQS3
DQS3_1
DQS3_1
DQ60
DQ60
SA_DQS#3
62
182
SA_DQ61
9
SA_DQS#3
DQS3_2*
DQS3_2*
DQ61
DQ61
For VDD decoulping
SA_DQS4
137
192
SA_DQ62
9
SA_DQS4
DQS4_1
DQS4_1
DQ62
DQ62
SA_DQS#4
135
194
SA_DQ63
VSUS_1P5
9
SA_DQS#4
DQS4_2*
DQS4_2*
DQ63
DQ63
place near SO DIMM0
SA_DQS5
154
9
SA_DQS5
DQS5_1
DQS5_1
SA_DQS#5
152
9
SA_DQS#5
DQS5_2*
DQS5_2*
SA_DQS6
171
9
SA_DQS6
DQS6_1
DQS6_1
SA_DQS#6
169
198
R1367R1367
1
2
0R_NA0R_NA
9
SA_DQS#6
DQS6_2*
DQS6_2*
EVENT*
EVENT*
PM_EXTTS#0
8,13
SA_DQS7
188
9
SA_DQS7
DQS7_1
DQS7_1
SA_DQS#7
186
9
SA_DQS#7
DQS7_2*
DQS7_2*
30
RESET*
RESET*
SM_DRAMRST#
8,13
200
8,13,16,22,23
SMB_DA0
SDA
SDA
202
125
C817
C817
C818
C818
C814
C814
C815
C815
C816
C816
8,13,16,22,23
SMB_CLK0
SCL
SCL
TEST
TEST
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
R1365R1365
1 2
10K10K
197
Y5V
Y5V
Y5V
Y5V
Y5V
Y5V
Y5V
Y5V
Y5V
Y5V
SA0
SA0
R1366R1366
1 2
10K10K
201
SA1
SA1
16V
16V
16V
16V
16V
16V
16V
16V
16V
16V
DIMM204P+4P
DIMM204P+4P
A
A
Title
Title
Title
SAMUI_2.0_DDR3_CHA&DIMM0
SAMUI_2.0_DDR3_CHA&DIMM0
SAMUI_2.0_DDR3_CHA&DIMM0
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
Custom
Custom
Custom
MP-00008529-005-AK
MP-00008529-005-AK
MP-00008529-005-AK
V03
V03
V03
Date:
Date:
Date:
Monday, May 17, 2010
Monday, May 17, 2010
Monday, May 17, 2010
Sheet
Sheet
Sheet
12
12
12
of
of
of
46
46
46
5
4
3
2
1
12
12
12
12
12
12
C74010UF
C74010UF
12
X5R
X5R
6V30805
6V30805
C74110UF
C74110UF
12
X5R
X5R
6V30805
6V30805
C73810UF
C73810UF
12
X5R
X5R
6V30805
6V30805
C73710UF
C73710UF
12
X5R
X5R
6V30805
6V30805
C73910UF
C73910UF
12
X5R
X5R
6V30805
6V30805
12
12
12
12
12
12
12
12
12
5 4 3 2 1 CHANNEL B & DIMM1 D D J1301B J1301B 9 SB_MB[15:0]
5
4
3
2
1
CHANNEL B & DIMM1
D
D
J1301B
J1301B
9
SB_MB[15:0]
SB_MB0
98
SB_DQ[63:0]
9
A0
A0
SB_MB1
97
5
SB_DQ0
VCC_3P3
A1
A1
DQ0
DQ0
SB_MB2
96
7
SB_DQ1
A2
A2
DQ1
DQ1
SB_MB3
95
15
SB_DQ2
A3
A3
DQ2
DQ2
SB_MB4
92
17
SB_DQ3
J1301A
J1301A
A4
A4
DQ3
DQ3
SB_MB5
91
4
SB_DQ4
C731
C731
C732
C732
A5
A5
DQ4
DQ4