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"Those who cannot learn from history are doomed to repeat it "
George Santayana [1863-1952]; american philosopher and poet
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 1
1 Historical Review of Manufacturing Science and Semiconductor Fabrication
1.1 Introduction
IC Manufacturing Technology
Through-put
Market Capacity Planning (Durchsatz) Technological
(Kapazitätsplanung) Ability
Cycle Time
(Durchlaufzeiten)
Process Control and Yield Logistics
(Prozeßkontrolle und Ausbeute)
Bottlenecks
(Engpässe)
Schedule stability
(Liefertreue) Inventory Control
(Lagerbestandshaltung)
an understanding of this behavior qualifies engineers and manager to use the system internal characteristics
1. to recognize possibilities of improvement in existing fabs
2. to detect better and more efficient systems
3. to achieve an optimum trade-off of wisdoms out of various fields for the own needs
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 3
1.Historical Review
1.1 Intro Increase in Productivity
An example:
Always there exist someone, who is faster, better, cheaper and sells more and earns more
and displaces established producers from the market.
"saved" farmers will be factory workers, who manufacture tractors or service providers (eg. truck drivers)
1.1 Introduction
Absolutism, Guilds
Just-In-Time
New requirements
-> new manufacturing techniques are neccessary -> flexible specialists + quality
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 7
1 Historical Review
1.2 Production Models
Historical Production Environments
Family Shepherd Family Spinner Family Dyer Family Weaver Family Tailor
produces wool produces yarn dys yarn produces textiles produces clothes
tradesman tradesman tradesman tradesman
buy, transport, sell
Heinrich Hempel
Junge Frau zu Besuch beim Großenritter Schäfer (1928)
Twofold separatists: producers are sited on different places due to family ownership + fabrication of different goods
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 8
1 Historical Review Historical Manufacturing Environments
1.2 Production Models
Historic Loom
America:
Historic pistol
- fabricated as one piece
- fabricated from one specialist
- long fabrication time
-> expensive products
Whitney Revolver
1. Exchange parts -> exchange workers -> creation of "workers" and "managers"
2. Mass production creates mass distribution systems and vice verse
- railroad trains distribute and need mass products
- wholesalers, department stores, mail-order companies
- promotion
- foundation of consortia to finance giant enterprises (railroad tracks)
3. the mass distribution systems needed new organsiation structures (manager classes)
+ cost calculation/accounting methods (e.g. delivery time per product, costs per tonmile)
1.1 Introduction
1870 Hittdorf: deflection of current due to fields 1866 Siemens: Dynamo 1874 Braun: rectifying
-> current = neg. particles 1876 Bell: microphon-telephon with wire connection metal/semiconductor
1878 Edison: Phonograph contacts
1883 Edison: explanation of glow-emission
1886 Hertz: creation and proof of elmag waves
1887 Hertz/Hallwachs: Photo effect
1892 Wien: e/m
1895 Thomson: Identification of the electron 1895 Braun: cathode ray tube 1895 Popow: crystal detector
1895 Marconi: Telegraph with elmag.waves
1900 Planck: “quantum constant”
1905 Einstein: explanation of photo effect 1904 Fleming: discovery of rectifying effect in tube diode
1906 DeForest: tube triode
1913 Arnold: vacuum triode
Quantum Physics Telephon-Radio-Tube-Market
The mineral pyrite, or iron pyrite, is an iron sulfide with the formula FeS2. This mineral's metallic luster and
FeS2 pale-to-normal, brass-yellow hue have earned it the nickname fool's gold due to its resemblance to gold.
The color has also led to the nicknames brass, brazzle and brazil, primarily used to refer to pyrite found in
coal.
Pyrite is a natural semiconductor with a bandgap of 0.8 - 1.8 eV (depending on contamination).
During the early years of the 20th century, pyrite was used as a mineral detector in radio receivers, and is
still used by 'crystal radio' hobbyists. Until the vacuum tube matured, the crystal detector was the most
sensitive and dependable detector available- with considerable variation between mineral types and even
individual samples within a particular type of mineral. The most sensitive mineral was galena, which was
very sensitive also to mechanical vibration, and easily knocked off the sensitive point; the most stable were
perikon mineral pairs; and midway between was the pyrites detector, which is approximately as sensitive as
a modern 1N34A diode detector.
1919: GE takes over Marconi and founds with Westinghouse the RCA
New
AT&T RCA
„Entertainment Broadcasting“ (Radio)
cable telegraphy/-telephony wireless telecommunication (mail, navigation)
( Using cable + wireless)
+ radio tubes in radio telephony + tube-based end devices
"output current"
"Gate voltage"
Amplification:
20 - 100
In 1947, during their investigations for the replacement of tubes the researcher Brattain, Bardeen und Shockley
discovered an amplification effect in the semiconductor material Germanium.
A small plastic triangle was wrapped with a gold foil and cut with
a razor blade at the tip.
On top two contacts were soldered.
The whole construction was pressed on a piece of Germanium (the base),
which was also contacted.
At both gold contacts the power supply was applied,
without allowing any current to flow.
Ge-base
~ 1µm SiO2
300 – 800 µm
Geometrical characteristics:
1. Defect-free, single-crystal 2. Creation of a mask layer, e.g. thermal oxide Technological advantage:
semiconductor All devices are fabricated simultaneously (parallel)
-> all devices exhibit same performance
Economical advantage:
Mask
~ 1µm Photo resist * All devices are fabricated simultaneously (parallel)
* As smaller the devices are as more can be fabricated
simultaneously (nearly constant processing costs)
3. Deposition of photo resist 4. Exposure 5. Development of resist Planartechnology paved the roads
for two major inventions:
< 1µm
1948 - 1952:
From the invention of the (bipolar) transistor in 1948 until commercializing the transistor in 1952
the theoretical fundamentals were developed within the Bell-Labs
1952 - 1960:
since 1960:
Until 1960 the Bell-Labs developed the planartechnology. Using the planartechnology it was possible:
- mass fabrication of reproducible and reliable transistors
- the fabrication of MOSFETs (successful fabrication 1960)
- the fabrication of Integrated Circuits (invented 1959)
3 main applications
Logic Memory
(micro processors)
Mixed applications
(Application Specific ICs, ASICs)
1968: Noyce and Moore left Fairchild and founded INTEL (see e.g. http://de.wikipedia.org/wiki/Intel)
1969: Nippon Calculating Machines (Japan) asked INTEL for some RAM ICs for making their industrial calculators
(Busicom) more flexible. Hoff (INTEL) was assigned for the project, but came up with a even more flexible
solution designing one central logic chip (NMC-ARU) with 3 additional ICs (NMC-RAM, NMC-ROM, NMC-SHR).
1970: Intel offered Busicom a lower price for the chips in return for securing the rights to the microprocessor design
and the rights to market it for non-calculator applications, allowing the Intel 4004 microprocessor to be
advertised in the November 15, 1971 issue of Electronic News.
It's then that the Intel 4004 became the first general-purpose microprocessor on the market
2010 INTEL:
All processors with 32 nm technology are called "Westmere" with variations: Arrandale, Clarkdale, Gulftown
New architecture in this new technology (= tick) are called "Sandy-bridge" (=tock)
Computing Power:
2010: SAMSUNG
Producing Industry’s First Higher-performing
20nm-class NAND Flash Memory, 64 Gb
Seoul, Korea on Apr 19, 2010
www.koreaittimes.com
2013: SAMSUNG
Producing ~10nm-class NAND Flash Memory,
128 Gb -> 8 chips stacked => 128 GB on one chip !
also: Toshiba, Micron similar products
Have a look at: http://www.theinquirer.net/inquirer/feature/2286446/micron-bets-on-3d-nand-flash-for-the-future-of-storage
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 32
1 Historical Review
1.3 Semiconductors Memory
-> advantage:
* non-volatile
* very small footprint -> cheap
-> disadvantage:
* volatile -> advantage:
small footprint -> cheap -> disadvantage:
* big footprint-> expensive very slow (10 -100 µsec)
fast (~10 nsec)
-> advantage: very fast
(few nsec) -> disadvantage: -> new so-called SSD
* volatile (solid state discs)
used as a small cache memory used as main memory used as mass storage
on processor chips for processors in duty
no power supply -> storage lost no power supply -> storage lost no power supply -> storage remains for 10 years
Goal of Market
Traditional Semiconductor Companies
(since starting ~1950)
Gate arrays consisted of regular arrays of unconnected transistors. The chips The other ASIC architecture was the standard cell, which started as a blank die.
were complete except for metal layers needed to connect the transistors. The The standard cell vendor created a library of logic gates and higher-level logic
gate array vendor would mass-produce these chips. Software provided by the functions called cells. The customer created a design from this library. The
gate array vendor, called a place-and-route tool, would map the logic gates of standard cell vendor provided place-and-route software that placed each cell
the customer’s design – NANDs, NORs, flip-flops, and so forth – to specific onto the die and wired them all together to create the customer’s design.
transistors on the chip and determine a good way to put metal traces on the chip Because only cells that the design specifically required were placed on the chip,
to connect the transistors so as to complete the design. Because all customers the chips were smaller and thus cost less per piece than a gate array. The
used the same basic platform, the costs associated with creating these base tradeoff was that the initial costs were not shared by other customers because
wafers were shared among all the customers. Thus, the initial NRE (non each customer’s standard cell chip was completely unique. Thus the standard
recurring expense) for a gate array was fairly cheap, though it could still be in cell chip had a large NRE.
the thousands or tens of thousands of dollars.
The cost structure was such that gate arrays were used by companies requiring
Gate array vendors offered families of gate arrays with a fixed number of fewer volumes of chips while standard cells were used by companies requiring
transistors. A vendor might offer a 5,000 transistor chip and a 10,000 transistor higher volumes of chips.
chip. If your design required 5,001 transistors you were forced to put the design
into the 10,000 transistor chip. Utilization of the transistors in a gate array was
thus inefficient. Since it costs a fixed amount of money to process a single
wafer, the more chip die that fit on that wafer – the cheaper the cost per chip.
Conversely, an underutilized gate array meant that the customer paid for all
transistors on the chip, even the unused ones. Thus the cost per piece for a
gate array was relatively high.
1.1 Introduction
Information
Industrial Communication
Agrar Society Society
Society
Services
Society
time
steam engine
cotton
steel
trains
electricity
chemistry
oil
cars
computers
networks
mobile phone
?
multimedia
The invention of the transistor and the IC enabled the mobile information- and communication society
Data transfer is done by bipolar discrete devices, data processing is done by CMOS Integrated Circuits
10000
Electronic Equipment
annual growth: ~ 9%
1000
Global Economical
Bill. US $
Limit ?
Semiconductors
100 annual growth: ~ 17%
10 Semiconductor
Manufacturing Equipment
annual growth: ~ 10%
Automotive 8%
Consumer Industry/Military
17% 10%
Other
Communication
11%
PC 30%
Cell Phone
12% Other
Computer
12%
Other Other
Material Integration
5% 12% Technology
Other
15%
MOS
85%
Silicon
IC
95%
88%
Logic MOSFETs
16%
Memory 2009
DRAM
60%
Memory
MPU 54%
30% SRAM
Silicon is the dominant semiconductor material (95 %) 2% other NAND
11% Flash
88% of all semiconductors are in ICs 27%
All values are financial values, not numbers
DRAM (memory) is the most important product (~40% of all semiconductor money)
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 43
1 Historical Review
1.4 Semiconductor Economics
The Semiconductor Market
100%
90% 90% is MOS !
80%
70% Discretes
Market Value
60% BiP
50% MOS-Analog
MOS-Logic
40%
MOS-MPU
30%
MOS-Memory
20%
10% Source: ICE
0%
1982 1986 1990 1994 1998 2002 2006
Foundries
Foundries
Equipment
Fabless
HELSINKI, Jan 26 (Reuters) - Prices of key DRAM chips could rise to vendors cash cost level, helped by Qimonda's insolvency filing,
electronic components research firm DRAMeXchange said in a statement.
The research firm said there was "high possibility" for a 10 percent cut in global supply of dynamic random access memory (DRAM) as long as o
ther vendors stick to their capacity cut plans.
Prices for DDR2 1Gb chips, used as the main memory chip in many personal computers, could rise from below $1 currently to $1.2 to $1.5 level,
which is the cash cost for vendors, said DRAMeXchange, a leading price-tracking organisation for the industry.
The sector has been mired in its worst-ever downturn for more than a year, with all major players reporting losses on their operations due to a
large oversupply of the chips used mainly in PCs.
Qimonda on Friday became the first major maker of DRAM chips to file for insolvency as a result of huge industry price declines and a
global financing squeeze.
Also on Friday, Samsung Electronics, the world's largest DRAM maker, posted its first-ever quarterly loss in large part due to its DRAM business.
According to preliminary estimates from iSuppli, global DRAM revenue fell by 19.8 percent in 2008 to $25.2 billion, the second year of decline,
and is expected to drop another 4.3 percent this year.
"Qimonda's insolvency means global (2009) DRAM bit shipment growth now is expected to be less than the 30 percent level, down from iSuppli's
previous forecast of 35 percent," Nam Hyung Kim, chief analyst for memory at iSuppli, said in a statement.
"This will reduce supply growth, helping to stabilise pricing, and helping to mitigate the oversupply-driven downturn," Kim said.
Kim said the potential impact of the Qimonda insolvency will come in the graphics and server chip markets as in the third quarter of 2008 it
accounted for 26 percent of shipments of graphic DRAMs. These are used in the video subsystems in computers and consumer electronics
devices, and control 15 percent to 20 percent of the global market for DRAM for servers.
(Reporting by Tarmo Virki; Editing by Simon Jessop and Sharon Lindores)
0 10 20 30 40 50
Far-East (Korea, Japan, Taiwan) dominates the Memory-Market with ~ 90% share
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 50
1 Historical Review
1.4 Semiconductor Economics Area Consumption for Memory
Costs per GByte
SRAM
2% other NAND
11% Flash
27%
http://www.reram-forum.com/2012/07/10/are-we-there-yet-
is-new-memory-costbit-equal-to-dram-yet/
source: convergent semiconductors
iSuppli’s report shows that Elpida Memory Inc. in Japan posted the strongest performance among the Top 5 DRAM suppliers in the second quarter, with revenue reaching $745 million, up from $497 million
in the first quarter. The market researcher attributes the boost to a 32 percent increase in average selling prices (ASPs) for DRAMs in the second quarter, compared to the first quarter.
“Elpida accomplished its strong increases in revenue and pricing by expanding its specialty DRAM sales to mobile and consumer applications,” said Kim. “These specialty DRAMs command higher prices
than commodity parts, allowing Elpida to outperform its competitors.
”The other big winner during the second quarter was Taiwan’s Winbond Electronics Corp., whose revenue doubled, rising to $87.6 million, up from $44 million in the first quarter.
The Top 2 South Korean companies, Samsung Electronics Co. Ltd. and Hynix Semiconductor Inc., captured 55.9 percent of the global market, with DRAM sales for each company increasing
sequentially by more than 30 percent during the second quarter, said iSuppli.
Micron Technology Inc. in the U.S. saw its share of DRAM revenue dip to 13.9 percent in the second quarter, down from 14.3 percent in the first quarter, due to strong sales growth of other Tier 1 DRAM
suppliers.
However, Micron’s second-quarter revenue declined by 15.2 compared to the same period in 2008, the lowest level of decrease among the Top 10 DRAM suppliers in the second quarter, according to
iSuppli.
Taiwan’s Nanya Technology Corp. also performed relatively well on the year-over-year comparison, with only a 15.4 percent decline in revenue.
“The relatively limited declines of Micron and Nanya, which recently entered a partnership, showed that the companies are seriously striving to increase their scale to become more competitive in the market.
MOSFETs can be fabricated with less production steps than Bipolar transistors
-> cost saving fabrication
MOSFETs are consuming less area than Bipolar transistors using same minimum feature size
-> cost saving integration
MOSFETs can be fabricated with lower effort, this is direct saving of fabrication costs
Reduced number of fabrication processes induces less failure possibilities, more working chips/wafer
Integration means:
MOS: 4 masks
-> smaller area
-> cheaper
-> higher yield
about 4-10 MOSFETs can be placed
Bipolar MOSFET on the same area of one BiP using
the same technology
-> scalable -> safety for shrinking
-> easy design
MOS is much more suitable for integration than bipolar
CMOS devices are best suited for high integration and mobile applications
64M 0.35
x 4 / 3 years
1M 1
16k --
The prosperty of the semiconductor market (annual growth by ~17%) is mainly due to cost reduction
by shrinking devices in planar technology (see next chapter)
1960 1970 1980 1990 2000 2010 2020 2030 2040 Moore´s law is achieved by:
Year of 1 Million Units on Market
1000 1000
DRAM: 8F²
2 in lithography DRAMs
2000 100
Chip Size [mm²]
a factor 2 in dimension shrink a factor 1.5 in chip size increase a factor 1.3 in better design
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 60
1 Historical Review
1.4 Semiconductor Economics
Planning the Future with Roadmaps
VG = 315 mV
(with ideal S = 63 mV/dec)
Starting Yield: 60 %
Roadmaps are only a list of required device properties in time to ensure the prosperty of semiconductor industry
Shrink by 15 %
1000000
100
Chips per Wafer Wafer Diameter:
Chips per Wafer
100000 3"
100mm Yield per Wafer
Yield [% of dies]
200mm Production Costs
10000 300mm
Number of Dies
450mm D = 0,1/cm²
per working chip
D = 1/cm²
1000 10 D = 3/cm²
100 3.46 $
10
Gross die
Rwafer Adie
2
YPoisson exp A D
Adie
1 1
1 10 100 1000 1 10 100 1000
Die Area [mm²] Die Area [mm²]
10000
chips/wafer
1000
300
200
150
100 125
100
75
10
1960 1970 1980 1990 2000 2010 2020 2030
Year
20/7 nm MOSFET (Experiment):
CMOS mainstream 2008
INTEL 2007
Hoerni (Fairchild) 1957 Penryn CPU,
Si-Planartransistor 2N1613, 45 nm Gate Length
764µm diameter
Deleonibus et al., EDL 21 (2000) 173
1000
announced in www 486 12
various
Pentium 18
sources
Pentium IV (2004) 25
100
~ Factor 10 in 15 years
=> Factor 1.6 in 3 years
1965 1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2020 Equipment + 50 %
Year Pure Materials + 35 %
Process Steps + 25 %
Test + 20 %
Production Costs + (30-50) %
Cost Reducing Strategies
1. Around 2000 with 300mm wafer automation and Mini-Environments
2. Cooperation (Sharing costs, risks and time)
Integrated Circuit Manufacturing Prof.Dr.W.Hansch, Dipl.-Ing.E.Schober
Modul 1278 ICM, 1- 64
1 Historical Review
1.4 Semiconductor Economics Exponential Increase in Fabrication Costs
Example: Number of metallization layers
512Mb
10 0,01 (Prices are from cheapest
available DRAM at time)
CPUs (Price at introduction of new generation)
1E-3 DRAMs
386 134k
386 275k
2G
1 1E-4 Excess
capacity
486 1.2M
INTEL PI 3.1M
1 US$-line INTEL PIpro 5.5M
1E-5
price/bit [US $]
INTEL PII 7.5M
(~100Mill/year)
1E-8
Finally every IC will end around 1 US $ Traditional slope trade agreements
(650 Mill. US$ fines)
of 70%
1E-9
-> average reduction of 30% / year
Fabrication costs are below 1 $US per chip 1E-10
1975 1980 1985 1990 1995 2000 2005 2010
(but well kept secret of every company !) Year
2012
2 Gb = 0.80 USD
2008
1 Gb = 0.60 USD
-> 1 Mb = 0.1 ct
~ 40 grains of rice
INTEL Processors
386
Mask Levels
10 Investment Costs 10000 # Fab-costs rise about a factor 2 / Generation
12
Investment [Mill. US $]
486 per FAB
1
Pentium 18
1000
+
Escalating Costs /per Gen
from Mitsubishi / ISSCC93 1995 2001
10
100
# Fabrication costs rise about <1.5 / Generation
16k 64k 256k 1M 4M 16M 64M 256M 1G 4G
Equipment: + 50 % DRAM Generation
Pure Materials: + 35 %
Process Steps: + 25 %
Cost Reduction Strategies
Test: + 20 % Cooperations (Risc-, Cost-, Time-Sharing)
Production Costs: + (30 - 50) % New Concepts (Mini-Environments)
Technology
1 Mbit DRAM
~ 1990
75 $
3" 100 mm
90 $
125 mm 150 mm
105 $ 130 $ # Fabrication costs: 1Mb-DRAM on 6“-wafers: ~130 US $ / wafer
with: Production Costs
2
Defect Density D: 3cm-2 per working chip
Redesign: Die Size: 9x9 mm²
Shrink by 15 % wafer size: 100mm
6.43 $
0.01
5
Chips / Wafer Yield / Die Size (Prices are from cheapest CPUs Preis beim Erscheinen des Folgemodells
10 100 available DRAM at time)
386 134k
4
10
[3"]
[100mm]
[150mm]
[200mm]
3.46 $
1E-3 DRAMs 386 275k
486 1.2M
# cost/transistor decrease about 2 / generation
3
3
10 1E-4
Gross Die
INTEL PI 3.1M
price/bit [US $]
10 D=1 Excess INTEL PIpro 5.5M
2
10 D=3 Cost Reduction capacity INTEL PII 7.5M
D=10
1 R A1/ 3
2 by 2 1E-5
Fit:
AMD Athlon 22M
10 Gross Die Y exp A D
0
10
1 10
A
100 1000
1
1 10 100
Die Area [mm²]
1000 1E-6
slope: 0.70
Calculation:
Equipment costs: FAB (1990) ~ 1Bill. US $, life cycle about 10 years ~ 3 generations
Fabrication costs: input: 7000 wafer/week *52 weeks * 10 years * 130 US$/wafer = 470 Mill. US$
Cost increase / gen. = 2 parts FAB * Factor 2 + 1 Part production * Factor 1.5 = 5.5 new parts / 3 old parts = 1.8
income: increased selling price per generation / cost rise per generation = 2 / 1.8 ~ 10 %