copyright 2017, Thomas P.

Weldon

Digital Controls Final Project 2019

Reid Cashion, Kristy Hecht, Ryan Hill, and Matthew Trusnovic
Email: rcashio2@uncc.edu, khecht2@uncc.edu, rcashio2@uncc.edu, and mtrusnov@uncc.edu

Abstract—This report summarizes Digital Controls Final For this project, our assigned plant transfer function
Project: comparison of stat-variable and classical system design (including ZOH) was
approaches. In this project, a continuous-time plant function was
(1−𝑒 −𝑠𝑇0 ) (104 )(1−𝑒 −𝑠𝑇0 )
assigned to the group, with design goals for unity feedback and 100 𝐺𝐶 (𝑠) = 𝐺𝑝 (𝑠) = (1)
𝑠 𝑠(𝑠+0.15−𝑗9)(𝑠+0.15+𝑗9)(𝑠+1)
Hz sampling being steady-state error < 5% and settling time to
within 10% of less than 0.1 second. The first task was to design a with corresponding G(z)
classical digital PID/Lag-Lead controller D(z) to meet the goals.
The second task was to design a digital state-variable observer and 129𝑧 2 +21𝑧+0.000182
controller with pole placement to meet the goals. It was not 𝐺(𝑧) = (2)
30𝑧 3 −30𝑧 2 +0.00136𝑧−1.89∗10−14
possible to meet the design goals using a classical D(z) controller,
and the best result was steady-state error 1.89% and settling time where Ts=0.01 s for the sampler. And since H(s)=1, the open-
of 17 seconds. However, a successful digital state-variable loop gain is GOL(z)=G(z).
observer and controller design achieved steady-state error 4.5%
and settling time of 0.13 seconds. Theory and simulation results
are provided for the two designs.

I. INTRODUCTION
The team was provided a plant function through two
complex poles and one pole located at negative one. Through a
classical PID controller and state-variable observer and
controller compensator, the goal was to design two different
controllers to follow certain design requirements. State space
Fig. 1. System block diagram with T0=0.01 s digital phase-
variable controllers have multiple applications such as controller
lag controller D(z), with plant function Gc(s)=(1-
voltage source converters and optimization for a DC motor for
esTo)/[s(s+1)], feedback H(s)=1, and a ZOH.
an FPGA [2][3].The design requirements were to have a settling
time with ten percent of 0.1 seconds for a step input, a steady
state error of less than five percent, a peak overshoot of less than
five percent, and a closed-loop bandwidth of greater than 2 Hz. The digital PID controller used in the classical system design
approach is [1]
The classical PID controller was designed using [1]. The
problem provided was graphed using MATLAB. After the phase
margin was chosen to be 45°, the w1 was found. Using this 𝑇0 𝑧+1 𝑧−1
information, the phase of the digital filter was calculated and 𝐷(𝑧) = 𝐾𝑝 + 𝐾𝑖 + 𝐾𝐷 (3)
2 𝑧−1 𝑧𝑇0
used to find the KI, KP, and KD values. These gain values were 𝑧+1 𝑧−1
used for making the digital controller. = 0.1647 + 0.0000095 − 0.36 (4)
𝑧−1 𝑧

For designing the state variable controller we chose to back

out our matrix equations provided in the notes. By first selecting
where KI is 0.0019, KP is 0.1647, and KD is 0.0036. D(z) is
two propionate poles to control our outcome and one pole very
then translated into the w-domain. This is done through the
far away from the origin, this setup allowed the further pole to
equation below.
basically have no effect on the system and allowed the system
to act more like a second order than a third.
The following section will explain the classical PID 1+𝑇𝑜/𝑤
Z= (5)
controller system and will include the theory and results. Section 1−𝑇𝑜/𝑤
III will discuss the state variable controller approach and explain
the theory and results.
The open-loop transfer function magnitude |GOL(z)| and
II. CLASSICAL SYSTEM DESIGN phase GOL(z) are shown in Fig. 2, using the digital controller
The block diagran for the digital PID controller and system D(z) of (3), plotted along with the uncompensted plant |G(z)| and
is shown in Fig. 1, where sample time T0=0.1 s digital phase-lag G(z) and controller plant |D(z)| and D(z). As can be seen,
controller D(z), with plant function Gc(s)= (1-esTo)/[s(s+1)], the phase margin is -86.6 and the gain margin is -52.1 dB.
feedback H(s)=1, and a ZOH included in Gc(s)=Gp(s)(1-esTo)/s.
 The open-loop transfer function magnitude |GOL(z)| and loop DC gain of the system is 1 and the steady state error is
phase GOL(z) are shown in Fig. 2, using the digital controller 1.89%
inof (2). As can be seen, the phase margin is -86.6 degrees and
the gain margin is -52.1 dB. The system was designed to have
a phase margin of 45 degrees. With this method of design, the
results did not satisfy the design goals.

Fig. 4. Closed-loop step response for whatever/PID/lag-

Fig. 2. Open-loop response GOL(z) with compensator
(solid), with T0=0.01 s using digital PID controller D(z),
along with the uncompensted plant (dashed) |G(z)| and
G(z) and compensator (dotted) |D(z)| and D(z).
lead c(t.) Closed-loop gain is 1, overshoot is 71%, and
rise time is 0.09 s.
Table I lists the poles and zeroes of the closed loop system.
All of the open-loop poles except one were stable, two closed-
loop poles were unstable.

TABLE I. POLES OF OPEN AND CLOSED-LOOP PID CONTROLLER

The corresponding closed-loop transfer function magnitude
|GCL(z)| and phase GCL(z) are shown in Fig. 3 along with Complex Value Magnitude
|GOL(z)| and phase GOL(z), using the digital controller inof (2). -0.15±j9 9.124
As can be seen, the 3 dB closed-loop bandwidth is 37.399Hz and Open-loop Poles -1+j0 1
the dc gain is 0. 0.000604 0.000604
Closed-loop Poles 0.891 0.891
1.04±j0.118 1.04667

Table II compares goals and observed performance for the

whatever controller design. As shown in Table II below, 3 of the
5 goals were met. The final design goal of 0.1 as the settling
time and the peak overshoot value were not met due to the
complex imaginary pole causing the system to oscillate and take
a long time to settle.

TABLE II. DESIGN GOALS AND RESULTS

Design Final
Clock Signal Name
Goal Design
Settilng time +/- 10% <0.1 s 17 s
Steady-state error <5% 1.89%
Fig. 3. Closed-loop frequency response GCL(z), with Overshoot peak <5 % 71 %
T0=0.1 s digital PID controller D(z), along with open-
loop response |GOL(z)| and phase GOL(z) . Closed-loop Rise Time <0.1 s 0.09 s
gain is 0, and bandwidth 37.399 Hz. Closed-loop 3 dB bandwidth >2 Hz 37.399 Hz
Overall, the PID controller was not an accurate or effective
A plot of the closed-loop step response is shown in Fig. 4. way to control this system due to the complex imaginary poles.
As can be seen, the settling time is 17 seconds and the peak To create a system that can work with the design parameter, a
overshoot percentage is 71%. Oscillation is also observed at a state-variable observer and controller is designed and discussed
frequency of approximately 4 Hz, most likely due to a poles at - in the following section.
0.15+9i -0.15-9i. The rise time of the system is approximately
0.09s and the percent overshoot is 71%. In addition, the closed
 III. STATE-VARIABLE OBSERVER+CONTROLLER DESIGN 𝑝(𝑧) = 4𝑧 3 − 4.3992𝑧 2 + 1.638𝑧 − 0.09164 (14)
The block diagram for the state-variable observer+controller 𝑝𝑜𝑙𝑒𝑠 = {0.5162 + 𝑗0.271 0.5162 − 𝑗0.271 0.0674} (15)
digital compensator approach is shown in Fig. 5, where sample
time T0=0.1 s, and was 𝐿 = [18.8150 23.0993 5.8593] (16)
Fig. 6 shows the closed-loop frequency response for the
y[n] = C x[n] + Du[n] state-variable digital observer+controller design, along with the
x[n +1] = A x[n] + Bu[n] . (6) losed-loop response of the classical design of the previous
section. The state-variable design greatly reduced the peaking
The state variables are derived from plant function G(s), in the response while also improving bandwidth. The bandwidth
resulting in : was designed to be 46.227 radians or 7.3211 Hz. This was done
with a rise time of 0.05 seconds and a settling time of .13
seconds. With these parameters an overshoot percentage of 3.27
0 1 0 percent was obtained.
𝐴=[ 0 0 1 ] (7)
0.986919 −2.966798 2.978806
0
𝐵 = [0] (8)
1
𝐶 = [0.000165 0.000662 0.000166] (9)

𝐷 = [0] (10)

These variables relate to the block diagram found in fig 5.

Each of these base variables can be rewritten in order to
determine the systems controller and observer values.

Fig. 6. Closed-loop frequency response for state-variable

design (dashed) and classical design (solid), with
T0=0.01.

Fig. 7 shows the closed-loop step response for the state-

variable digital observer+controller compensated design, along
with the closed-loop response of the classical design of the
previous section. The state-variable design greatly reduced the
peaking in the response while also improving bandwidth.

Fig. 5. State-variable observer and controller block

diagram corresponding to system GC(s) of Fig, 1.

A controller K was designed for a target pole placement

polynomial of p(z) having poles at z={0.5162+j0.271, 0.5162-
j0.271, 0.0674}, where:
𝑝(𝑧) = 𝑧 3 − 1.0998𝑧 2 + 0.4095𝑧 − 0.02291; (11)
𝑝𝑜𝑙𝑒𝑠 = {0.5162 + 𝑗0.271 0.5162 − 𝑗0.271 0.0674} (12)
Fig. 7. Closed-loop step response for state-variable
𝐾 = [30.0411 −20.5067 15.4007] (13) design (dashed) and classical design (solid), with
An observer was designed with observer pole placement T0=0.01.
polynomial of p2(z) having poles at z={0.5162+j0.271, 0.5162-
j0.271, 0.0674}, where:
 Table III lists the poles of the closed-loop compensated [1] Phillips, C., Nagle, H. and Chakrabortty, A. (2014). Digital control
observer+controller state-variabe system. All of the open-loop system analysis & design. 4th ed. Pearson
poles were stable, as they fell within the unit circle. [2] H. Kim, H. Jung and S. Sul, "Discrete-Time Voltage Controller for
Voltage Source Converters With LC Filter Based on State-Space
Models," in IEEE Transactions on Industry Applications, vol. 55, no. 1,
TABLE III. POLES OF CLOSED-LOOP STATE-VARIABLE DESIGN pp. 529-540, Jan.-Feb. 2019.
Complex Value Magnitude [3] O. Andrs and M. Maliszewski, "Optimization of The DC Motor State
0.516-j0.271 0.5828 Space Controller for FPGA," 2018 18th International Conference on
Closed-loop Mechatronics - Mechatronika (ME), Brno, Czech Republic, 2018, pp. 1-
0.516+j0.271 0.5828
Poles 7.
0.0674+j0 0.0674
[4] T.P. Weldon, J.M.C. Covington III, K.L. Smith, and R.S. Adams,
``Stability Conditions for a Digital Discrete-Time Non-Foster Circuit
IV. COMPARISONS OF BOTH METHODS TO DESIGN GOALS Element,'' 2015 IEEE Int. Symposium on Antennas and Propagation,
Vancouver, BC, Canada, July 19-25, 2015.
As shown in Table III below, all goals were met using the
state variable controller, while 4 goals were not met using the
classical whatever/PID controller. All goals were met using state
variable methods learned in class and from articles found online.
These equations helped up derive our own expressions to simply
plug in parameters and achieve pole and zeros needed to achieve
these goals.
Table IV compares goals and design obtained from the
project, PID controller, and state variable controller.

TABLE IV. DESIGN GOALS AND RESULTS FOR BOTH METHODS

Design Classical State
Clock Signal Name
Goal Design Variable
Settilng time +/- 10% <0.1 s 17 s .13 s

Steady-state error <5% 1.89 % 4.5%

Overshoot peak <5 % 71 % 3.27 %

Rise Time <0.1 s .09 s .05 s

Closed-loop 3 dB bandwidth >2 Hz 37.399 Hz 7.3211 Hz

As can be seen in Table IV, the properties of the state

variable controlled system were within the design goals of the
project. The classical PID design only met the requirements of 3
of the 5 for the project, but the state variable system met every
one of the requirements. So it can be seen that the system can
only be properly controlled using non classical controlling
methods.
V. SUMMARY
Two digital controllers were designed using a PID and state
variable controller. After covering material in class and
observing the results first hand, designing a controller using state
variables over other methods is more accurate and efficient.
State variable design ensures that parameter control which was
unobtainable using a PID controller can be determined and
modeled to meet all design parameter.
The state variable controller uses matrices to force poles in
positions to make a system stable and functional with the design
parameters. Unlike the PID controller, the imaginary poles and
their placement do not cause issues in the design.

REFERENCES
 Appendix 1

Mattlab Script

%% E4112 Project 7 Matlab

%% copyright 2017 by Thomas Weldon

close all
clear all
close all force

Ts = 0.01; %sample period

fmax=100 ; %max freq for plotting
fmin =fmax/10^6;
Gp.s = tf([10^4],[1 1.3 81.3 81]); %plant function 10,000/s(s+20)(s+50)
Gp.z = c2d(Gp.s, Ts, 'zoh');
Gp.z
H.s = tf([1],[1]); %feedback continuous-time filter
H.z = c2d(H.s, Ts, 'zoh');
H.z

%***********************************************
% enter your PID design coefficients here
kp=0.1647; ki=0.0019; kd=-0.0036;
pidCtrl=pid(kp,ki,kd,0,Ts,'IFormula','Trapezoidal','DFormula','BackwardEuler');
pid.z=tf(pidCtrl);
D.z=pid.z
D.s = d2c(D.z,'Tustin');
Gfwd.z = series(D.z,Gp.z);
Gfwd.s = series(D.s,Gp.s);
Gol.z = series(Gfwd.z,H.z);%compensated open loop response
GolUncomp.z=series(Gp.z,H.z);%uncompensated open loop response
Gol.s = series(Gfwd.s,H.s);
Gcl.z = feedback(Gfwd.z, H.z); %closed loop pulse trans func
Gcl.s = feedback(Gfwd.s, H.s);

figure(1);
set(gca,'linewidth',3.0);
aa=gca
aa.XGrid='on';aa.YGrid='on';aa.LineWidth=3;aa.FontWeight='bold';
aa.XLabel.FontSize=20;aa.YLim=[-225 0];
set(findall(gcf,'Type','line'),'LineWidth',3);
set(findall(gca,'Type','line'),'LineWidth',3);
set(findall(gcf,'Type','text'),'FontSize',14);
set(findall(gcf,'Type','text'),'FontWeight','bold');
bplt=bodeplot(Gol.z)
setoptions(bplt,'FreqUnits','Hz','grid','on','YLim',[-20 60],'XLim',[fmin fmax]);
title('e4112 compensated open loop response')
%legend('C(z)/R(z)','Location','northwest')
aa=gca
aa.XGrid='on';aa.YGrid='on';aa.LineWidth=3;aa.FontWeight='bold';
aa.XLabel.FontSize=20;aa.YLim=[-225 0];
set(findall(gcf,'Type','line'),'LineWidth',3);
set(findall(gca,'Type','line'),'LineWidth',3);
set(findall(gcf,'Type','text'),'FontSize',14);
set(findall(gcf,'Type','text'),'FontWeight','bold');

figure(2);
set(gca,'linewidth',3.0);
bplt=bodeplot(Gcl.z)
setoptions(bplt,'FreqUnits','Hz','grid','on','YLim',[-20 30],'XLim',[fmin fmax]);
title('e4112 closed loop response C(z)/R(z)')
%legend('C(z)/R(z)','Location','northwest')
aa=gca
aa.XGrid='on';aa.YGrid='on';aa.LineWidth=3;aa.FontWeight='bold';
aa.XLabel.FontSize=20;aa.YLim=[-90 90];
set(findall(gcf,'Type','line'),'LineWidth',3);
set(findall(gca,'Type','line'),'LineWidth',3);
set(findall(gcf,'Type','text'),'FontSize',14);
set(findall(gcf,'Type','text'),'FontWeight','bold');

figure(3);
set(gca,'linewidth',3.0);
%zplane(Z,P) plots the zeroes Z and poles P (in column vectors) with the
pzmap(Gcl.z);
title('Closed loop response C(z)/R(z) poles and zeroes')
axis([-1.5 1.5 -1.5 1.5]);
%zeta = [ 0.25 0.5 0.75];
Wn = [0.25 0.5 0.75]*3;
aa=gca
aa.XGrid='on';aa.YGrid='on';aa.LineWidth=3;aa.FontWeight='bold';
aa.XLabel.FontSize=20;aa.FontSize=12;
set(findall(gcf,'Type','line'),'LineWidth',3);
set(findall(gcf,'Type','text'),'FontSize',14);
set(findall(gcf,'Type','text'),'FontWeight','bold');

figure(4);
set(gca,'linewidth',3.0);
step(Gcl.s, '-', Gcl.z, '-r', 1);
legend('Continous-Time', 'Discrete-Time')
title('e4112 closed-loop step response ')
aa=gca
aa.XGrid='on';aa.YGrid='on';aa.LineWidth=3;aa.FontWeight='bold';
aa.XLabel.FontSize=20;aa.FontSize=12;
set(findall(gcf,'Type','line'),'LineWidth',3);
set(findall(gcf,'Type','text'),'FontSize',14);
set(findall(gcf,'Type','text'),'FontWeight','bold');

figure(5);
set(gca,'linewidth',3.0);
bplt=bodeplot(D.z)
setoptions(bplt,'FreqUnits','Hz','grid','on','YLim',[-20 60],'XLim',[fmin fmax]);
title('e4112 compensator response D(z)')
%legend('D(z)','Location','northwest')
aa=gca
aa.XGrid='on';aa.YGrid='on';aa.LineWidth=3;aa.FontWeight='bold';
aa.XLabel.FontSize=20;aa.YLim=[-90 90];
set(findall(gcf,'Type','line'),'LineWidth',3);
set(findall(gca,'Type','line'),'LineWidth',3);
set(findall(gcf,'Type','text'),'FontSize',14);
set(findall(gcf,'Type','text'),'FontWeight','bold');

[zcl,pcl,kcl] = zpkdata(Gcl.z,'v')

%run sisotool with PID controller

initconfig = sisoinit(1);initconfig.OL1.View = {'rlocus','bode'};
initconfig.G.Value = Gp.z;
%initconfig.C.Value = D.z;
initconfig.C.Value = pid.z; %insert PID controller
C=pid.z; %**********workaround for mlab2017a bug,************
% in mlab2017a you may need to manually import C ...see project website
initconfig.H.Value = H.z;
F.z = tf([1],[1],Ts);
sisotool(Gp.z,D.z,H.z,F.z);
D.z
%##############Define Gc Plant Function##################
clear
format long e;
zz=[ ]';
pp=[ -0.15+9i -0.15-9i -1 ]';
kk=10^4;
Ts = 0.01; %sample period
fmax=100 ; %max freq in Hz for plotting
fmin =fmax/10^6; %min freqfor plotting
[tfnum,tfden] = zp2tf(zz,pp,kk);
System.Gc.Gp.s = tf(tfnum,tfden); %plant function Gp(s)
%display(System.Gc.Gp.s) %Display the plant function

%################Convert Gc to Z-Domain#################
System.Gc.z = c2d(System.Gc.Gp.s,Ts,'zoh'); %Gc to z-domain
%display(System.Gc.z); %Display the Gc.z

%################Define Feedback########################
System.H.s = tf([1],[1]); %Feedback in S-Domain
%display(System.H.s); %Display Feedback in S-Domain
System.H.z = c2d(System.H.s,Ts,'zoh'); %Feedback in z-domain
%display(System.H.z); %Display Feedback in Z-domain

%###############Define Digital Compensation##############

System.D.s = tf([1],[1]); %Digital Compensator in S-Domain
%display(System.D.s); %Display Digital Compensator in S-Domain
System.D.z = c2d(System.H.s,Ts,'zoh'); %Digital Compensator in z-domain
%display(System.D.z); %Display Digital Compensator in Z-domain

%##############Define G##################################
System.G.z = System.D.z*System.Gc.z; %G(z)=Gc(z)*D(z)
%display(System.G.z);

%#############Define Closed Loop#########################

%Gcl(z)=C(z)/R(z)
System.GCl.z = feedback(System.G.z,System.H.z);
display(System.GCl.z); %Display Closed Loop Function

%############Define Closed Loop in ABCD Form#############

%genss/ss and tf2ss differ by a diagonal state transformation:
System.sys1 = genss(System.GCl.z); %Convert GCl(z) to ABCD form

A = System.sys1.A;
B = System.sys1.B;
C = System.sys1.C;
D = System.sys1.D;

sys = ss(A,B,C,D,Ts); %Create State space model

%System.sys2 = ss(A,B,C,D,Ts); %Create State space model
%##########Check Controllability and Observability#######
ctrb = ctrb(A,B);
display(length(A) - rank(ctrb)); %Is 0 when controllable
obsv = obsv(A,C);
display(length(A)-rank(obsv)); % Is 0 when observable
%##################Define Design Parameters#######################
System.POS = 3; %Percent Overshoot < 5%
System.DR = sqrt((log(System.POS/100)^2)/((pi^2)+log(System.POS/100)^2)); %Damping
Ratio
System.Beta = sqrt(1-(System.DR^2)); %Beta
System.ST = 0.08; %Settling Time < 0.1s
System.Tol = 2/100; %Tolerance Factor
System.Wn = (-log(System.Tol*System.Beta))/(System.DR*System.ST); %Natural Frequency
System.RT = (1+((1.1)*System.DR)+((1.43)*(System.DR^2)))/(System.Wn); %Rise Time <
0.1s
System.alpha = System.DR*System.Wn*5; %Alpha >> DR*Wn, So we can approximate as 2nd-
order system

System.new.G.num = [System.alpha*(System.Wn^2)];
System.new.G.den = [1, ((2*System.Wn*System.DR)+System.alpha),
((System.Wn^2)+(2*System.Wn*System.DR*System.alpha)),(System.alpha*System.Wn^2) ];
System.new.G.s = tf(System.new.G.num,System.new.G.den); %H(s)=Y(s)/U(s)
System.new.G.z = c2d(System.new.G.s,Ts);
%display(System.new.G.s);
%display(System.new.G.z);

%##############Create K Matrixs###############################
System.new.pd =
[System.new.G.z.Denominator{1,1}(1),System.new.G.z.Denominator{1,1}(2),System.new.G.z.
Denominator{1,1}(3),System.new.G.z.Denominator{1,1}(4)];
pd = roots(System.new.pd); %Find the Roots of the Denominator

K = place(A,B,pd); %Create K-Matrix

%#############Create L Matrix################################
%Observer Poles are 2-4 times faster
%than the Controller Poles
System.new.pd1 = 4*System.new.pd; %Redefine Denominator as 4 times the controller
denominator
pd1 = roots(System.new.pd1); %Find the Roots of the Denominator
L = place(A',C',pd1);

%############Define Regulator################################
rsys = reg(sys,K,L'); %Define Regulator
I = eye(3); %3 by 3 Identity Matrix

%###########Define ##########################
comp = (K*(I-(A-B*K-L'*C))^(-1)*L'); %Gain
newsys = feedback(sys,rsys,1); %Closed-Loop TF ??
display(newsys);
newsys1 = comp*newsys;
System.stepinfo = stepinfo(newsys1);
%display(System.stepinfo);
step(newsys1) %Graph time response for unit-function input

[z,p,k]=ss2zp(newsys1.A,newsys1.B,newsys1.C,newsys1.D); %State Variable to tf in Z-

domain
test = zpk(z,p,k,Ts); %tf
display(test);
%##############Check Parameters################################
display('RiseTime:'); % RT < 0.1s
display(System.stepinfo.RiseTime);
display('SettlingTime:'); % ST < 0.1s
display(System.stepinfo.SettlingTime);
display('Percent Overshoot:'); % POS < 5%
display(System.stepinfo.Overshoot);
dbdrop = -3;
sys3D = ss(newsys1.A,newsys1.B,newsys.C,newsys.D,Ts);
fb = bandwidth(sys3D,dbdrop);
display('Closed-Loop 3db Bandwidth:'); %BW > 2.0 Hz
display(fb);

%########## Check Steady-State Error#######################

%ess=1/1+kr
%kr=lim(s->0)(GH(z))=lim(s->0)G(z)