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Charging Towards Successful ESD

Protection Design

www.cst.com | CST workshop series 2011 | February 10 | 1


Electrostatic Discharge

ESD is the sudden and momentary electric current that


flows between two objects at different electrical
potentials caused by direct contact or induced by
electrostatic fields.

• Electrostatic Discharge (ESD)

Continuing trend to reduce device junction size, oxide


layer thickness and lower the operating voltages.
Smaller devices give higher operating speeds, lower
power consumption and higher chip component density.
These developments increase the sensitivity to ESD.
• Trends in susceptibility

www.cst.com | CST workshop series 2011 | February 10 | 2


ESD Problems

Catastrophic damage Latent effect Interference


(burn-out) (unpredictability) (software upset)

• Thermal damage to transistor junctions


• Oxide insulation layer breakdown in transistor gates
• EM interference leading to signal errors, software failure and corrupted data

ESD problems fall into 3 categories: catastrophic failure, latent effects


causing unpredictable behavior and software upset
www.cst.com | CST workshop series 2011 | February 10 | 3
Susceptibility Regulations
Susceptibility
Radiated and Conducted
North America IEC Europe Description
ANSI ESD 20:20 61000-4-2 EN 61000-4-2 ESD
61000-4-3 EN 61000-4-3 Radiated fields
61000-4-4 EN 61000-4-4 EFT
61000-4-5 EN 61000-4-5 Surge
61000-4-6 EN 61000-4-6 Conducted
61000-4-8 EN 61000-4-8 Magnetic fields
61000-4-11 EN 61000-4-11 Voltage variations
60601-1-2 EN 60601-1-2 Medical systems

Not all the standards are shown in the table

www.cst.com | CST workshop series 2011 | February 10 | 4


IEC 61000-4-2 Standard
 IEC 61000-4-2 specifies
a current waveform for
contact testing
 Initial spike has rise
time of 0.7-1.0 ns
 Current levels scale
linearly with voltage
from 2 to 8 kV
 At 8 kV, the peak
current is 30 amps

www.cst.com | CST workshop series 2011 | February 10 | 5


ESD Simulation Workflow

ESD Generator Connect to True Transient


Model System Under
Calibration Test Co-Simulation

ESD simulated directly in the time-domain using the transient solver (FIT or TLM)

www.cst.com | CST workshop series 2011 | February 10 | 6


MWS 3D ESD Generator Model

ESD generator model

Lossy materials (1 S/m) Metal components

Numerical Prediction and Measurement of ESD Radiated Fields by Free-Space Field Sensors
S. Caniggia, F. Maradei, IEEE Trans. Elec. Comp. Vol. 49 No.3, Aug 2007

www.cst.com | CST workshop series 2011 | February 10 | 7


Lumped Circuit Components
A slumped circuit model can be used to generate the ESD waveform

The physical geometry is also modeled for


higher accuracy (e.g. effect of ground strap)
www.cst.com | CST workshop series 2011 | February 10 | 8
Example – Calibration Scenario

Excitation (voltage) Port 1

Current measurement at Port 2

www.cst.com | CST workshop series 2011 | February 10 | 9


Calibration – Resulting Current
Discharge current seen at the tip

4 kV applied to
excitation port

Peak magnitude and rise time calibrated to the IEC standard

www.cst.com | CST workshop series 2011 | February 10 | 10


True Transient Co-Simulation

True transient co-simulation


enables non-linear transient
protection devices such as
varistors to be included…

The port provides a connection


between the 3D and circuit
worlds. Voltages and currents
exchanged as the time-domain
simulation evolves…

www.cst.com | CST workshop series 2011 | February 10 | 11


Live demonstration
ESD discharge to cell phone model

www.cst.com | CST workshop series 2011 | February 10 | 12


NoiseKen ESD Generator Model

NoiseKen ESD
Generator

The motivation for developing a full


3D model of the generator is to
correctly simulate the asymmetric
fields and coupling to the system.

Full wave model for simulating Noiseken ESD Generator


Dazhao Liu; Nandy, A.; Pommerenke, D.; Soon Jae Kwon;
Ki Hyuk Kim; IEEE Symposium on EMC,17-21 Aug. 2009 CST STUDIO Model
www.cst.com | CST workshop series 2011 | February 10 | 13
NoiseKen Model Validation
Discharge current
at gun tip

Induced voltage in
semi-circular loop

Excellent agreement of simulation results and measurements for both discharge current (top) and
induced voltage in one of the semi circular loops (bottom).
www.cst.com | CST workshop series 2011 | February 10 | 14
Quick Approach by CST PCB STUDIO

Pulse source: IEC


ESD Generator
150 pF, 330 ohms

ESD discharge
voltage 4 kV

www.cst.com | CST workshop series 2011 | February 10 | 15


Quick Approach Validation
Protective Measurement
element
CST PCB STUDIO
SPICE model

Peak voltage at IC Pin: 375 V Peak voltage at IC Pin: 250 V Peak voltage at IC Pin: 75 V

Protective Element: no Protective Element: 470 pF Protective Element: 14 V


protective device capacitor varistor CT0603K14G

Rise time: 700 ps Vendor: EPCOS Vendor: EPCOS

400 400 400

350 350 350

300 300 300

250 250 250


voltage in V
voltage in V

voltage in V
200 200 200

150 150 150

100 100 100

50 50 50

0 0 0

-50 -50 -50


-25 0 25 50 75 100 125 150 175 200 -25 0 25 50 75 100 125 150 175 200 -25 0 25 50 75 100 125 150 175 200
time in ns time in ns time in ns

www.cst.com | CST workshop series 2011 | February 10 | 16


ESD Summary
True time-domain analysis
• Direct simulation of ESD transients

Field /circuit co-simulation


• Non-linear transient protection devices (TPDs)

Simulation of real-world ESD tests


• Full 3D MWS ESD generator model (validated), impact of return strap etc.

Quick approach for PCB analysis


• PCB Studio stack-up model using circuit representation for ESD standard

High performance computing


• GPU acceleration

www.cst.com | CST workshop series 2011 | February 10 | 17

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