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1 2 3 4 5 6 7 8

PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND
ZQG SYSTEM DIAGRAM
LAYER 3 : IN1
DDR3- SODIMM2 DDR3- SODIMM1 DDR3 HDMI HDMI
PAGE 7 PAGE 6 HDMI PAGE 21
LAYER 4 : IN2 Channel A AMD Brazos CRT CRT
LAYER 5 : VCC CRT PAGE 20
A
LAYER 6 : BOT PWM FAN SCH. CPU THERMAL Zacate TDP~18W LVDS LVDS A
CPU (PROCHOT) LVDS PAGE 20
SENSOR
E.C. (CPUFAN#) 19mmX19mm 413pin BGA DIG
IV@ -----> iGPU / PWW control (Reserve Only) UMA/Muxless
32.768KHz 25MHz PAGE 30 PAGE 4
SW@ -----> Switchable iGPU & dGPU
SWS@ -----> VRAM / Strap / BACO option PCI-Express 4X ATI 800MHz
SP@ -----> Board ID / VBIOS option / CPU CPU SideBand TemperatureSense I2C PAGE 3,4,5
Seymour XT
VRAM DDR3
128-bit M2 Pkg
64MX16X4,64 bit
HT3 29mm X 29mm
1.8GHz PAGE 13~17 64MX16X8,128 bit
PAGE 19

VGA AMD Seymour XT

PCI-Expresss

B B
P0 P2 AMD
LAN Mini PCI-E Hudson-M1
Atheros Card
AR8151L rev.B (Wireless LAN) 23mmX23mm, 605pin BGA
PAGE 23
(10/100/1000) TDP~4.7W
PAGE 22
25MHz

RJ45
PAGE 22

P0 P9 P13

FFC
USB2.0 Port Blue Tooth Web-Camera
SATA - HDD SATA0 150MB
C on board x1 C
CHARGER (ISL88731A) 3 Gb/s
PAGE 24 PAGE 28 PAGE 28 PAGE 20 USB BOARD
PAGE 32
P4 P10 USB2.0 Ports x3
SATA - ODD SATA1 150MB
AMD CPU CORE (ISL6265) PAGE 28
CPU 3 Gb/s PAGE 8,9,10,11,12 Mini Card CardReader
PAGE 34 PAGE 24
PCLK_DEBUG WLAN & Debug AU6437
LPC Azalia PAGE 23 PAGE 25
NB_CORE (UP6111AQDD)
PAGE 36 NB CLK_PCI_775
Winbond KBC Audio CODEC
NPCE791L Conexant 20584 12MHz
0.9V/DDR 1.5V(RT8207) CPU SideBand TemperatureSense I2C
PAGE 37 PAGE 31 PAGE 26

SYSTEM 5V/3V (RT8206)


PAGE 33
D D

Keyboard SPI ROM INT MIC AUDIO CONN Speaker CN


1.1V(UP6111AQDD)
TouchPad (H.P./ MIC)
PAGE 35
PAGE 30 PAGE 31 PAGE 26 PAGE 27 PAGE 27
Quanta Computer Inc.
Discharge /Thermal protec PROJECT : ZQG
PAGE 40 Size Document Number Rev
Block Diagram 1A

Date: Monday, November 01, 2010 Sheet 1 of 41


1 2 3 4 5 6 7 8
5 4 3 2 1

INDEX
Power Sequence 02
PAGE# DESCRIPTION NOTE
AC IN
1 BLOCK DIAGRAM Hudson M1 SM BUS
3V/5VPCU
2 SYSTEM INFORMATION
SB820 SMBUS Pin NO. SMBUS Function Define
3 ONTARIO MEM & PCIE I/F(1/3) NBSWON#
D D
PCLK_SMB AD22
4 ONTATIO DISPLAY/CLK/MI(2/3) DDR / RFID
DNBSWON# PDAT_SMB AE22
5 ONTARIO POWER & DECOUP(3/3) (+3V)
S5_ON/S5
6 DDR3 SO-DIMM (RVS) SB_SMBCLK1 F5
not used
SB_SMBDATA1 F4
7 DDR3 SO-DIMM (STD) RSMRST#
(+3V_S5)
8 HUDSON PCIE/LPC/CPU IF(1/5)
SB_SCLK2 D25
PCIE_WAKE# not used
9 HUDSON ACPI/GPIO/USB(2/5) SB_SDATA2 F23
(+3V_S5)
10 HUDSON SATA/BIDs(3/5) SUSC
SB_SCLK3 B26
11 HUDSON PWR/GND(4/5) not used
SUSB SB_SDATA3 E26
12 HUDSON STRAPS/PWRGD(5/5) (+3V_S5)
SUSON
13 Seymour - PCIE SB_SCLK3 B26
not used
SB_SDATA3 E26
14 Seymour - HOST MAINON
(+3V_S5)
15 Seymour - MEM
VR_ON
C C
16 Seymour - PWR/GND
CPU_CORE
17 Seymour - DP_PWR/GND ( BACO)
KBC(EC) SM BUS
18 VRAM strap VRM_PWRGD
KBC SMBUS Pin NO. SMBUS Function Define
19 VRAM channel B
HWPG
20 CRT/LVDS/LID MBCLK 110
Battery
ECPWROK MBDATA 111
21 HDMI
(+3VPCU)
22 LAN AR8151 SB_PWRGD_IN
MBCLK_THRM 115
Thermal
23 MINI PCI-E MBDATA_THRM 116
CPU RESET
(+3VPCU)
24 HDD /ODD
CPU POWER OK
25 CARD READER

26 AUDIO - CONEXANT 20584

27 AUDIO JACK CONN


B B
28 USB / BT /TP

29 LED / NUT

30 KB/FAN/TP

31 WPCE791 /FLASH

32 CHARGER ( ISL88731)

33 SYSTEM 5V/3V (RT8206)

34 CPU CORE ( OZ8380)

35 VCCP 1.1V ( UP6111A)

36 +1V(G5602)

37 DDR 1.5V (TPS51116)

38 GPU CORE (MAX8792)

39 +1.8V/+1.5_GPU/+1.8V_GPU
A A
40 Discharge/Thermal Protection

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
System Information 1A

Date: Monday, November 01, 2010 Sheet 2 of 41


5 4 3 2 1
1 2 3 4 5 6 7 8

6,7 M_A_A[15:0]
M_A_A0
M_A_A1
R17 M_ADD0
ONTARIO (2.0)
U17E

M_DATA0 B14 M_A_DQ0


M_A_DQ1
M_A_DQ[0..63] 6,7 +1.5V_SUS 5,6,7,30,37,39
VDD_10 5 03
H19 M_ADD1
PART 1 OF 5
M_DATA1 A15
M_A_A2 J17 A17 M_A_DQ2 PEG_TXP[3..0]
M_A_A3 H18
M_ADD2
M_ADD3
M_DATA2
M_DATA3 D18 M_A_DQ3
13 PEG_TXP[3..0]
13 PEG_TXN[3..0]
PEG_TXN[3..0] This page is different AMD Nile
M_A_A4 H17 M_ADD4 M_DATA4 A14 M_A_DQ4 PEG_RXP[3..0]
13 PEG_RXP[3..0]
M_A_A5 G17 M_ADD5 M_DATA5 C14 M_A_DQ5 PEG_RXN[3..0]
13 PEG_RXN[3..0]
M_A_A6 H15 M_ADD6 M_DATA6 C16 M_A_DQ6
A M_A_A7
M_A_A8
G18
F19
M_ADD7
M_ADD8
M_DATA7 D16 M_A_DQ7
U17A GPU A

M_A_A9 E19 M_ADD9 M_DATA8 C18 M_A_DQ8 PEG_RXP0 AA6 P_GPP_RXP0 P_GPP_TXP0 AB6 PEG_TXP0_C C535 SW@0.1U/10V_4 PEG_TXP0
M_A_A10 T19 M_ADD10 M_DATA9 A19 M_A_DQ9 PEG_RXN0 Y6 P_GPP_RXN0 P_GPP_TXN0 AC6 PEG_TXN0_C C540 SW@0.1U/10V_4 PEG_TXN0
M_A_A11 F17 M_ADD11 M_DATA10 B21 M_A_DQ10 ONTARIO (2.0)
M_A_A12 E18 M_ADD12 M_DATA11 D20 M_A_DQ11 PEG_RXP1 AB4 P_GPP_RXP1 PART 2 OF 5 P_GPP_TXP1 AB3 PEG_TXP1_C C531 SW@0.1U/10V_4 PEG_TXP1
M_A_A13 W17 M_ADD13 M_DATA12 A18 M_A_DQ12 PEG_RXN1 AC4 P_GPP_RXN1 P_GPP_TXN1 AC3 PEG_TXN1_C C533 SW@0.1U/10V_4 PEG_TXN1
M_A_A14 E16 M_ADD14 M_DATA13 B18 M_A_DQ13
M_A_A15 G15 M_ADD15 M_DATA14 A21 M_A_DQ14 PEG_RXP2 AA1 P_GPP_RXP2 P_GPP_TXP2 Y1 PEG_TXP2_C C526 SW@0.1U/10V_4 PEG_TXP2
6,7 M_A_BS[2..0]
M_DATA15 C20 M_A_DQ15 PEG_RXN2 AA2 P_GPP_RXN2 P_GPP_TXN2 Y2 PEG_TXN2_C C530 SW@0.1U/10V_4 PEG_TXN2

PCIE I/F
M_A_BS0 R18 M_BANK0
M_A_BS1 T18 M_BANK1 M_DATA16 C23 M_A_DQ16 VDD_10 PEG_RXP3 Y4 P_GPP_RXP3 P_GPP_TXP3 V3 PEG_TXP3_C C523 SW@0.1U/10V_4 PEG_TXP3
M_A_BS2 F16 M_BANK2 M_DATA17 D23 M_A_DQ17 PEG_RXN3 Y3 P_GPP_RXN3 P_GPP_TXN3 V4 PEG_TXN3_C C525 SW@0.1U/10V_4 PEG_TXN3
6,7 M_A_DM[7..0]
M_DATA18 F23 M_A_DQ18
M_A_DM0 D15 M_DM0 M_DATA19 F22 M_A_DQ19 R375 2K/F_4 ON_ZVDD Y14 P_ZVDD_10 P_ZVSS AA14 ON_ZVSS R382 1.27K/F_4
M_A_DM1 B19 M_DM1 M_DATA20 C22 M_A_DQ20
M_A_DM2 D21 M_DM2 M_DATA21 D22 M_A_DQ21
M_A_DM3 H22 M_DM3 M_DATA22 F20 M_A_DQ22
M_A_DM4 P23 M_DM4 M_DATA23 F21 M_A_DQ23 8 UMI_RXP0 AA12 P_UMI_RXP0 P_UMI_TXP0 AB12 UMI_TXP0_C C574 0.1u/10V_4 UMI_TXP0 8
M_A_DM5 V23 M_DM5 8 UMI_RXN0 Y12 P_UMI_RXN0 P_UMI_TXN0 AC12 UMI_TXN0_C C578 0.1u/10V_4 UMI_TXN0 8
M_A_DM6 AB20 M_DM6 M_DATA24 H21 M_A_DQ24
M_A_DM7 AA16 M_DM7 M_DATA25 H23 M_A_DQ25 8 UMI_RXP1 AA10 P_UMI_RXP1 P_UMI_TXP1 AC11 UMI_TXP1_C C563 0.1u/10V_4 UMI_TXP1 8
M_DATA26 K22 M_A_DQ26 8 UMI_RXN1 Y10 P_UMI_RXN1 P_UMI_TXN1 AB11 UMI_TXN1_C C568 0.1u/10V_4 UMI_TXN1 8

UMI I/F
A16 M_DQS_H0 M_DATA27 K21 M_A_DQ27
B 6,7 M_A_DQSP0 B
B16 M_DQS_L0 M_DATA28 G23 M_A_DQ28 8 UMI_RXP2 AB10 P_UMI_RXP2 P_UMI_TXP2 AA8 UMI_TXP2_C C554 0.1u/10V_4 UMI_TXP2 8
6,7 M_A_DQSN0
B20 M_DQS_H1 M_DATA29 H20 M_A_DQ29 8 UMI_RXN2 AC10 P_UMI_RXN2 P_UMI_TXN2 Y8 UMI_TXN2_C C558 0.1u/10V_4 UMI_TXN2 8
6,7 M_A_DQSP1
A20 M_DQS_L1 M_DATA30 K20 M_A_DQ30
6,7 M_A_DQSN1
E23 M_DQS_H2 M_DATA31 K23 M_A_DQ31 8 UMI_RXP3 AC7 P_UMI_RXP3 P_UMI_TXP3 AB8 UMI_TXP3_C C542 0.1u/10V_4 UMI_TXP3 8
6,7 M_A_DQSP2
6,7 M_A_DQSN2 E22 M_DQS_L2 8 UMI_RXN3 AB7 P_UMI_RXN3 P_UMI_TXN3 AC8 UMI_TXN3_C C548 0.1u/10V_4 UMI_TXN3 8
MEMORY I/F

J22 M_DQS_H3 M_DATA32 N23 M_A_DQ32


6,7 M_A_DQSP3
J23 M_DQS_L3 M_DATA33 P21 M_A_DQ33 SP@FT1_ONTARIO
6,7 M_A_DQSN3
R22 M_DQS_H4 M_DATA34 T20 M_A_DQ34
6,7 M_A_DQSP4
P22 M_DQS_L4 M_DATA35 T23 M_A_DQ35
6,7 M_A_DQSN4
W22 M_DQS_H5 M_DATA36 M20 M_A_DQ36
6,7 M_A_DQSP5
V22 M_DQS_L5 M_DATA37 P20 M_A_DQ37
6,7 M_A_DQSN5
AC20 M_DQS_H6 M_DATA38 R23 M_A_DQ38
6,7 M_A_DQSP6
AC21 M_DQS_L6 M_DATA39 T22 M_A_DQ39
6,7 M_A_DQSN6
6,7 M_A_DQSP7 AB16 M_DQS_H7
AC16 M_DQS_L7 M_DATA40 V20 M_A_DQ40 +M_VREF +1.5V_SUS
6,7 M_A_DQSN7
M_DATA41 V21 M_A_DQ41
M17 M_CLK_H0 M_DATA42 Y23 M_A_DQ42
6 M_A_CLKP0
M16 M_CLK_L0 M_DATA43 Y22 M_A_DQ43
6 M_A_CLKN0
M19 M_CLK_H1 M_DATA44 T21 M_A_DQ44 R403 +1.5V_SUS R410 2.2K_4
6 M_A_CLKP1
M18 M_CLK_L1 M_DATA45 U23 M_A_DQ45 1K/F_4
6 M_A_CLKN1
N18 M_CLK_H2 M_DATA46 W23 M_A_DQ46
7 M_A_CLKP2

2
N19 M_CLK_L2 M_DATA47 Y21 M_A_DQ47 +1.5V_SUS R402 1K/F_4 Q32
7 M_A_CLKN2
L18 M_CLK_H3 MMBT3904
7 M_A_CLKP3
C 7 M_A_CLKN3 L17 M_CLK_L3 M_DATA48 Y20 M_A_DQ48 M_A_EVENT# 1 3 R408 0_4
APU_MEMHOT# 9 C
M_DATA49 AB22 M_A_DQ49
6,7 M_A_RST# L23 M_RESET_L M_DATA50 AC19 M_A_DQ50 R404 C597 C598
6,7 M_A_EVENT# N17 M_EVENT_L M_DATA51 AA18 M_A_DQ51 1K/F_4
M_DATA52 AA23 M_A_DQ52 0.1u/10V_4 1000p/50V_4
M_DATA53 AA20 M_A_DQ53
6,7 M_A_CKE0 F15 M_CKE0 M_DATA54 AB19 M_A_DQ54 0902-- change value from 1uF to 1nF
6,7 M_A_CKE1 E15 M_CKE1 M_DATA55 Y18 M_A_DQ55

M_DATA56 AC17 M_A_DQ56


M_DATA57 Y16 M_A_DQ57
6 M_A_ODT0 W19 M0_ODT0 M_DATA58 AB14 M_A_DQ58
6 M_A_ODT1 V15 M0_ODT1 M_DATA59 AC14 M_A_DQ59
7 M_A_ODT2 U19 M1_ODT0 M_DATA60 AC18 M_A_DQ60
7 M_A_ODT3 W15 M1_ODT1 M_DATA61 AB18 M_A_DQ61
M_DATA62 AB15 M_A_DQ62
6 M_A_CS#0 T17 M0_CS_L0 M_DATA63 AC15 M_A_DQ63
6 M_A_CS#1 W16 M0_CS_L1

7 M_A_CS#2 U17 M1_CS_L0

7 M_A_CS#3 V16 M1_CS_L1 M_VREF M23 +M_VREF

6,7 M_A_RAS# U18 M_RAS_L

6,7 M_A_CAS# V19 M_CAS_L


V17 M_WE_L M_ZVDDIO_MEM_S M22 39.2/F_4 R405 +1.5V_SUS
D
6,7 M_A_WE# D
SP@FT1_ONTARIO ?

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
ONTARIO MEM & PCIE I/F(1/3) 1A

Date: Monday, November 01, 2010 Sheet 3 of 41


1 2 3 4 5 6 7 8
1

+1.8V

R70
R69
1K/F_4
1K/F_4
APU_SVC
APU_SVD
+1.8V
+3V
5,30,39,40
5,6,7,9,10,11,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40 04
R301 300_4 LDT_RST#
U17B

R326 300_4 APU_PWRGD ANALOG/DISPLAY/MISC


0.1u/10V_4 C541 PEG_HDMI_TXDP2 A8 TDP1_TXP0 DP_ZVSS H3 R310 150/F_4
+3V 21 TX2_HDMI+
0.1u/10V_4 C546 PEG_HDMI_TXDN2 B8 TDP1_TXN0
21 TX2_HDMI-
DP_BLON G2 R86 0_4 INT_LVDS_BLON 20

DP MISC
0.1u/10V_4 C550 PEG_HDMI_TXDP1 B9 TDP1_TXP1 DP_DIGON H2 R309 0_4 INT_LVDS_DIGON 20
21 TX1_HDMI+
R345 1K/F_4 APU_THERMTRIP# 0.1u/10V_4 C556 PEG_HDMI_TXDN1 A9 TDP1_TXN1 DP_VARY_BL H1 R308 0_4 INT_LVDS_PWM 20

DISPLAYPORT 1
21 TX1_HDMI-
R334 1K/F_4 APU_ALERT# R329 10K_4
0.1u/10V_4 C555 PEG_HDMI_TXDP0 D10 TDP1_TXP2
21 TX0_HDMI+
0.1u/10V_4 C559 PEG_HDMI_TXDN0 C10 TDP1_TXN2 TDP1_AUXP B2
21 TX0_HDMI- HDMI_DDCCLK 21
TDP1_AUXN C2 HDMI_DDCDATA 21
0.1u/10V_4 C564 PEG_HDMI_TXCP A10 TDP1_TXP3
21 TXC_HDMI+
0.1u/10V_4 C569 PEG_HDMI_TXCN B10 TDP1_TXN3 TDP1_HPD C1 INT_HDMI_HPD 21
21 TXC_HDMI-
R323 1K/F_4 H_PROCHOT#
20 INT_TXLOUTP2 B5 LTDP0_TXP0 LTDP0_AUXP A3 INT_EDIDCLK 20
20 INT_TXLOUTN2 A5 LTDP0_TXN0 LTDP0_AUXN B3 INT_EDIDDATA 20

20 INT_TXLOUTP1 D6 LTDP0_TXP1 LTDP0_HPD D3 DP0_HPD R87 *100K_4


20 INT_TXLOUTN1 C6 LTDP0_TXN1

DISPLAYPORT 0
DAC_RED C12 INT_CRT_RED 20
20 INT_TXLOUTP0 A6 LTDP0_TXP2 DAC_REDB D13
20 INT_TXLOUTN0 B6 LTDP0_TXN2 DAC_GREEN A12 INT_CRT_GRE 20
DAC_GREENB B12
INT_CRT_RED R377 150/F_4 20 INT_TXLCLKP D8 LTDP0_TXP3 DAC_BLUE A13 INT_CRT_BLU 20
INT_CRT_GRE R376 150/F_4 20 INT_TXLCLKN C8 LTDP0_TXN3 DAC_BLUEB B13
INT_CRT_BLU R380 150/F_4
8 APU_CLKP V2 CLKIN_H DAC_HSYNC E1 INT_CRT_HSYNC 20

VGA DAC
8 APU_CLKN V1 CLKIN_L DAC_VSYNC E2 INT_CRT_VSYNC 20
+3V

CLK
8 DISP_CLKP D2 DISP_CLKIN_H DAC_SCL F2 INT_DDCCLK 20
2K_1/16W_F_4 R357 INT_EDIDCLK D1 DISP_CLKIN_L DAC_SDA D4
8 DISP_CLKN INT_DDCDATA 20
2K_1/16W_F_4 R355 INT_EDIDDATA
APU_SVC J1 SVC DAC_ZVSS D12 DAC_RSET R148 499/F_4
0901-- change from 2.2k to 2kohm APU_SVD J2 SVD
TEST4 R1 APU_THERMDA T111
APU_SIC APU_THERMDC

SER
P3 SIC TEST5 R2 T109
+3V APU_SID P4 SID TEST6 R6 APU_TEST6_DIRECRACKMON T15
TEST14 T5 APU_BP0_TSTCLK_USCLK0 T16
R322 0_4 LDT_RST#_R T3 RESET_L TEST15 E4 T50
8,30 LDT_RST#
R336 0_4 APU_PWRGD_R T4 PWROK TEST16 K4 APU_BP3_SCANSHIFTEND_USDATA1 T117
8,30 APU_PWRGD
TEST17 L1 APU_BP2_SCANSHIFTEN_USDATA0 T112
H_PROCHOT# U1 PROCHOT_L TEST18 L2 TEST18 R305 1K/F_4

CTRL
8,10,31 H_PROCHOT#
R71 APU_THERMTRIP# U2 THERMTRIP_L TEST19 M2 TEST19 R333 1K/F_4
1K/F_4 10 SB_TALERT# R324 *0_4 APU_ALERT# T2 ALERT_L TEST25_H K1 R327 510/F_4
TEST25_L K2 R306 510/F_4
+1.8V
2

TEST
N2 APU_TDI
TDI TEST28_H L5 APU_TEST28_H_PLLCHARZ T110
N1 APU_TDO TDO TEST28_L M5 APU_TEST28_L_PLLCHARZ T17
9 SB_SCLK3 R60 *0_4 3 1 APU_SIC P1 APU_TCK
TCK TEST31 M21 APU_TEST31_MEM_TEST T154
P2 APU_TMS
TMS TEST33_H J18 APU_TEST33_H_M_CLKTST_H C318 0.1u/10V_4 R164 51/F_4

JTAG
Q19 *2N7002K M4 TRST_L
APU_TRST#
TEST33_L J19 APU_TEST33_H_M_CLKTST_L C310 0.1u/10V_4 R154
UNNAMED_7_CAP_I337_B
51/F_4
31 APU_SIC_EC R53 0_4 M3 DBRDY
DBRDY TEST34_H U15 APU_TEST34_H_TSTCLKIN_H T65
R59 0_4 M1 DBREQ_L TEST34_L T15 APU_TEST34_L_TSTCLKIN_L T74
TEST35 H4 APU_TEST35 R328 *1K/F_4
F4 VDDCR_NB_SENSE TEST36 N5 APU_TEST36 R315 1K_4
+3V +1.8V
G1 VDDCR_CPU_SENSE TEST37 R5 APU_TEST37_GIO_TSTDTM0_CLKINIT T14
APU_TDI F3 VDDIO_MEM_S_SENSE
APU_TDO
APU_TCK F1 VSS_SENSE
APU_TMS TEST38 K3 APU_FDO T113
R61 APU_TRST# B4 RSVD_1 DMAACTIVE_L T1 ON_DMAACTIVE# R335 0_4 ALLOW_LDTSTP 8
1K/F_4 DBRDY W11 RSVD_2
ONTARIO (2.0)
DBREQ# V5 RSVD_3
2

PART 3 OF 5

SP@FT1_ONTARIO ? R307 R325


9 SB_SDATA3 R63 *0_4 3 1 APU_SID 1K/F_4 1K/F_4
A VSS_SENSE R312 0_4 A
CPU_VDD0_FB_L 34 +1.8V
Q18 *2N7002K VDDCR_CPU_SENSE R311 0_4
CPU_VDD0_FB_H 34 +1.8V
31 APU_SID_EC R54 0_4 +1.8V R314 *10K/F_4 CNTR_VREF
R62 0_4 0831---follow AMD request for HDMI function
VDDIO_SUS_SENSE R85 *0_4 R300
CPU_VDDIO_SUS_FB_H 37

2
+3V Q29 *1K/F_4
VSS_SENSE R319 0_4 *MMBT3904
CPU_VDDNB_FB_L 34
VDDCR_NB_SENSE R330 0_4 LDT_RST# 1 3 CPU_LDT_RST_HTPA#
CPU_VDDNB_FB_H 34
R337
10K/F_4 Can remove on MP------>LX
DIFFERENTIAL ROUTING
2

Q31
MMST3904-7-F
33,40 SYS_SHDN# R351 0_4 3 1 APU_THERMTRIP#
VID Override Circuit
+1.8V
+3V

R350 0906-- modify circuit


*10K/F_4
R88 R66 R304
*300_4 *300_4 *2.2K/F_4
2

Q30
*MMST3904-7-F APU_SVC R90 0_4 CPU_SVC 34
9 CPU_THERMTRIP# R331 *0_4 3 1
APU_SVD R68 0_4 CPU_SVD 34
APU_PWRGD R302 *0_4 CPU_PWRGD_SVID_REG CPU_PWRGD_SVID_REG 34

R89 R67 R298


for normal operation *220/F_4 *220/F_4 *220/F_4
open all switches

+3V

0830---add circuit
R299
10K/F_4
+1.8V +1.8V

HDT+ Connector
2

Q28 +1.8V
MMST3904-7-F
30,31 SML1ALERT# R297 0_4 3 1 APU_ALERT#

R318 HDT+ HEADER / PLACE ON TOP +1.8V +1.8V


1K/F_4 C520
+3V CN10 U14 0.1u/10V_4

5
APU_TCK R303 1K/F_4
1 CPU_VDDIO CPU_TCK 2
APU_TMS R317 1K/F_4 VCC
3 GND CPU_TMS 4
APU_TDI R320 1K/F_4
5 GND CPU_TDI 6
R321 APU_TDO LDT_RST#_R LDT_RST#_BUF R347 1K/F_4
7 GND CPU_TDO 8 1 1A 1Y 6
*10K/F_4 APU_TRST# R332 0_4 HDT_TRST# 9 10 APU_PWRGD_BUF
CPU_TRST_L CPU_PWROK_BUF
R344 10K_4 11 12 LDT_RST#_BUF
CPU_DBRDY3 CPU_RST_L_BUF
R354 10K_4 13 CPU_DBRDY2 CPU_DBRDY0 14 DBRDY APU_PWRGD_R 3 2A 2Y 4 APU_PWRGD_BUF R348 1K/F_4
2

Q27 R359 10K_4 15 CPU_DBRDY1 CPU_DBREQ_L 16 DBREQ# R366 300_4


*MMST3904-7-F 17 18 J108_PLLTST0 R338 0_4 TEST19
SML1ALERT# R296 *0_4 3 1 H_PROCHOT# 19
GND
CPU_VDDIO
CPU_PLLTEST0
CPU_PLLTEST1 20 J108_PLLTST1 R316 0_4 TEST18 GND SN74LVC2G07DCKR Quanta Computer Inc.

2
<DEVICE_NAME>
PROJECT : ZQG
Size Document Number Rev
ONTATIO DISPLAY/CLK/MI(2/3) 1A

Date: Monday, November 01, 2010 Sheet 4 of 41


1
1

+VCORE +1.5V_SUS 3,6,7,30,37,39

U17C
+1V
+1.8V
+3V
30,36,39
4,30,39,40
4,6,7,9,10,11,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40
+VCORE 30,34
+NBCORE 34
05
11A 440mil viax22 2A 80mil viax4 VDD_10 3
E5 U8 VDD_18 R371 0_8
E6
VDDCR_CPU_1
VDDCR_CPU_2
VDD_18_1
VDD_18_2 W8
+1.8V +VCORE This page is different AMD Nile
F5 VDDCR_CPU_3 VDD_18_3 U6 1u/6.3V_4 10u/6.3V_8 0.1u/10V_4
F7 VDDCR_CPU_4 VDD_18_4 U9 1u/6.3V_4
G6 VDDCR_CPU_5 VDD_18_5 W6 C134 C135 C175 C544 C149 C148
G8 VDDCR_CPU_6 VDD_18_6 T7 C127
H5 VDDCR_CPU_7 VDD_18_7 V7 1u/6.3V_4 0.1u/10V_4 1u/6.3V_4 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8
H7 VDDCR_CPU_8
J6 VDDCR_CPU_9 C501 C170 C498 C499 C500 C141 C206
J8 VDDCR_CPU_10 10u/6.3V_8
L7 VDDCR_CPU_11 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8
M6 VDDCR_CPU_12
M8 VDDCR_CPU_13 150mA 10mil viax1 +VCORE
N7 VDDCR_CPU_14 VDDAN_18_DAC L58
+NBCORE +1.8V
R8 VDDCR_CPU_15
BLM18PG221SN1D(220_1.4A)_6
10A 400mil viax20 C19 +VCORE
E8 W9 C674 C537 C188 1u/6.3V_4
E11
VDDCR_NB_1
VDDCR_NB_2
VDD_18_DAC
C18 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4
E13 VDDCR_NB_3 C163 C138 C165 C129
F9 VDDCR_NB_4 1u/6.3V_4 1u/6.3V_4
ONTARIO (2.0)
F12 VDDCR_NB_5 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
PART 4 OF 5
G11 VDDCR_NB_6 C167
G13 VDDCR_NB_7 C131 C166 C168 C136 C130 C164 C169 C132
H9 VDDCR_NB_8
+1V 0.1u/10V_4
H12 VDDCR_NB_9 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
T49
K11 VDDCR_NB_10 200mA 10mil viax1
K13 VDDCR_NB_11
L10 U11 VDDPL_10 R103 0_6
POWER
VDDCR_NB_12 VDDPL_10
L12 VDDCR_NB_13
+NBCORE +NBCORE
L14 VDDCR_NB_14 0.1u/10V_4
M11 VDDCR_NB_15 0901-- change R7037 P/N and footprint
M12 VDDCR_NB_16 C534 C192 C191 add R
M13 VDDCR_NB_17
N10 VDDCR_NB_18 10u/6.3V_8 1u/6.3V_4 +1V 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4
N12 VDDCR_NB_19
VDD_10
N14 VDDCR_NB_20 C155 C259 C147 C266 C231 C195 C198 C233 C154 C197
P11 VDDCR_NB_21 5.5A 220mil viax11 10u/6.3V_8 1u/6.3V_4
P13 VDDCR_NB_22 VDD_10_1 U13 R149 0_8 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4
+1.5V_SUS VDD_10_2 W13 R144 0_8
2A 80mil viax4 VDD_10_3 V12 10u/6.3V_8 0.1u/10V_4 0.1u/10V_4
G16 VDDIO_MEM_S_1 VDD_10_4 T12
G19 VDDIO_MEM_S_2 C579 C280 C237 C236 C238 C235
E17 VDDIO_MEM_S_3
J16 VDDIO_MEM_S_4 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4 +NBCORE
L16 VDDIO_MEM_S_5
L19 VDDIO_MEM_S_6
N16 VDDIO_MEM_S_7
R16 VDDIO_MEM_S_8
+3V
R19 VDDIO_MEM_S_9 500mA 20mil viax1 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
W18 VDDIO_MEM_S_10 C252
U16 VDDIO_MEM_S_11 VDD_33 A4 C194 C181 C203 C199 C247 C251 C250 C214
0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
SP@FT1_ONTARIO ?

C528
1u/6.3V_4

+1.5V_SUS
GND +1.5V_SUS

1u/6.3V_4
A C351 C352 A
C269 C289 C321 C315 10u/6.3V_8 10u/6.3V_8
1u/6.3V_4 1u/6.3V_4
1u/6.3V_4

U17D
+1.5V_SUS

A7 VSS_1 ONTARIO (2.0) VSS_50 N13


B7 VSS_2 PART 5 OF 5 VSS_51 N20
B11 VSS_3 VSS_52 N22
B17 VSS_4 VSS_53 P10 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
B22 VSS_5 VSS_54 P14 C350
C4 VSS_6 VSS_55 R4 C272 C275 C311 C273 C271 C296 C319 C316
D5 VSS_7 VSS_56 R7 0.1u/10V_4
D7 VSS_8 VSS_57 R20 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
D9 VSS_9 VSS_58 T6
D11 VSS_10 VSS_59 T9
D14 VSS_11 VSS_60 T11
B15 VSS_12 VSS_61 T13
D17 VSS_13 VSS_62 U4
D19 VSS_14 VSS_63 U5
E7 VSS_15 VSS_64 U7
E9 VSS_16 VSS_65 U12 place capacitors under BGA
E12 VSS_17 VSS_66 U20 EMC CAPS
E20 VSS_18 VSS_67 U22
F8 VSS_19 VSS_68 V8 +1.5V_SUS +VCORE +NBCORE +1.5V_SUS
F11 VSS_20 VSS_69 V9
F13 VSS_21 VSS_70 V11
G4 VSS_22 VSS_71 V13
G5 VSS_23 VSS_72 W1
G7 VSS_24 VSS_73 W2
G9 VSS_25 VSS_74 W4 180P/25V_4 180P/25V_4 0.1u/10V_4
GROUND

G12 VSS_26 VSS_75 W5 C270 C303 C133 C128 C196 C232 C274 C320
G20 VSS_27 VSS_76 W7 180P/25V_4 180P/25V_4 180P/25V_4 180P/25V_4 0.1u/10V_4
G22 VSS_28 VSS_77 W12
H6 VSS_29 VSS_78 W20
H11 VSS_30 VSS_79 Y5
H13 VSS_31 VSS_80 Y7
J4 VSS_32 VSS_81 Y9 VDD_18 VDDAN_18_DAC VDD_10 VDDPL_10 +3V
J5 VSS_33 VSS_82 Y11
J7 VSS_34 VSS_83 Y13
J20 VSS_35 VSS_84 Y15
K10 VSS_36 VSS_85 Y17
K14 VSS_37 VSS_86 Y19
L4 VSS_38 VSS_87 AA4
L6 VSS_39 VSS_88 AA22 C174 C153 C187 C234 C190 C521
L8 VSS_40 VSS_89 AB2 180P/25V_4 180P/25V_4 180P/25V_4 180P/25V_4 180P/25V_4 0.1u/10V_4
L11 VSS_41 VSS_90 AB5
L13 VSS_42 VSS_91 AB9
L20 VSS_43 VSS_92 AB13
L22 VSS_44 VSS_93 AB17
M7 VSS_45 VSS_94 AB21
N4 VSS_46 VSS_95 AC5
N6 VSS_47 VSS_96 AC9
N8 VSS_48 VSS_97 AC13
N11 VSS_49 VSSBG_DAC A11

SP@FT1_ONTARIO ?

GND
GND

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
ONTARIO POWER & DECOUP(3/3) 1A

Date: Monday, November 01, 2010 Sheet 5 of 41


1
1 2 3 4 5 6 7 8

0830--P/N and footprint are follow ZR7B


+1.5V_SUS 3,5,7,30,37,39

+0.75V_DDR_VTT 7,37
+3V 4,5,7,9,10,11,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40
06
CN16A M_A_DQ[0..63] 3,7
3,7 M_A_A[0..15]
M_A_A0 98 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ1
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ7 +1.5V_SUS
M_A_A3 A2 DQ2 M_A_DQ3
95 A3 DQ3 17
A M_A_A4 M_A_DQ4 CN16B A
92 A4 DQ4 4
M_A_A5 91 6 M_A_DQ5 75 44
M_A_A6 A5 DQ5 M_A_DQ6 VDD1 VSS16
90 A6 DQ6 16 76 VDD2 VSS17 48
M_A_A7 86 18 M_A_DQ2 81 49
M_A_A8 A7 DQ7 M_A_DQ8 VDD3 VSS18
89 A8 DQ8 21 82 VDD4 VSS19 54
M_A_A9 85 23 M_A_DQ9 87 55
M_A_A10 A9 DQ9 M_A_DQ14 VDD5 VSS20
107 A10/AP DQ10 33 88 VDD6 VSS21 60
M_A_A11 84 35 M_A_DQ11 93 61
M_A_A12 A11 DQ11 M_A_DQ13 VDD7 VSS22
83 A12/BC# DQ12 22 94 VDD8 VSS23 65
M_A_A13 119 24 M_A_DQ12 99 66
M_A_A14 A13 DQ13 M_A_DQ10 VDD9 VSS24
80 A14 DQ14 34 100 VDD10 VSS25 71
M_A_A15 78 36 M_A_DQ15 105 72
A15 DQ15 M_A_DQ20 VDD11 VSS26
3,7 M_A_BS[0..2] DQ16 39 106 VDD12 VSS27 127

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM


M_A_BS0 109 41 M_A_DQ17 111 128
M_A_BS1 BA0 DQ17 M_A_DQ22 VDD13 VSS28
108 BA1 DQ18 51 112 VDD14 VSS29 133
M_A_BS2 79 53 M_A_DQ23 117 134
M_A_CS#0 BA2 DQ19 M_A_DQ21 VDD15 VSS30
3 M_A_CS#0 114 S0# DQ20 40 118 VDD16 VSS31 138
M_A_CS#1 121 42 M_A_DQ16 123 139
3 M_A_CS#1 S1# DQ21 VDD17 VSS32
M_A_CLKP0 101 50 M_A_DQ18 124 144
3 M_A_CLKP0 CK0 DQ22 VDD18 VSS33
3 M_A_CLKN0 M_A_CLKN0 103 52 M_A_DQ19 145
M_A_CLKP1 CK0# DQ23 M_A_DQ24 VSS34
3 M_A_CLKP1 102 CK1 DQ24 57 +3V 199 VDDSPD VSS35 150
M_A_CLKN1 104 59 M_A_DQ29 151
3 M_A_CLKN1 CK1# DQ25 VSS36
3,7 M_A_CKE0 M_A_CKE0 73 67 M_A_DQ27 77 155
M_A_CKE1 CKE0 DQ26 M_A_DQ26 NC1 VSS37
3,7 M_A_CKE1 74 CKE1 DQ27 69 122 NC2 VSS38 156
M_A_CAS# 115 56 M_A_DQ28 125 161
3,7 M_A_CAS# CAS# DQ28 NCTEST VSS39
3,7 M_A_RAS# M_A_RAS# 110 58 M_A_DQ25 0_4 R213 162
M_A_WE# RAS# DQ29 M_A_DQ31 MEM_A_HOT# 198 VSS40
3,7 M_A_WE# 113 W E# DQ30 68 3,7 M_A_EVENT# EVENT# VSS41 167
R204 10K/F_4 DIMM0_SA0 197 70 M_A_DQ30 3,7 M_A_RST# 30 168
R205 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ36 RESET# VSS42
201 SA1 DQ32 129 VSS43 172
PCLK_SMB 202 131 M_A_DQ37 173
B
7,9,22,23 PCLK_SMB SCL DQ33 VSS44 B
7,9,22,23 PDAT_SMB PDAT_SMB 200 141 M_A_DQ39 7 +DDR_VREF2 1 178
SDA DQ34 M_A_DQ34 +DDR_VREF VREF_DQ VSS45
DQ35 143 7 +DDR_VREF 126 VREF_CA VSS46 179
M_A_ODT0 116 130 M_A_DQ32 184
3 M_A_ODT0 ODT0 DQ36 VSS47
M_A_ODT1 120 132 M_A_DQ33 185
3 M_A_ODT1 ODT1 DQ37 VSS48
140 M_A_DQ38 C389 0.1u/10V_4 2 189
3,7 M_A_DM[0..7] DQ38 VSS1 VSS49
M_A_DM0 11 142 M_A_DQ35 3 190
M_A_DM1 DM0 DQ39 M_A_DQ40 C390 1000p/50V_4 VSS2 VSS50
28 DM1 DQ40 147 8 VSS3 VSS51 195
M_A_DM2 M_A_DQ45

(204P)
46 DM2 DQ41 149 9 VSS4 VSS52 196
M_A_DM3 M_A_DQ43 0902--Add C7273
(204P)
63 DM3 DQ42 157 13 VSS5
M_A_DM4 136 159 M_A_DQ42 14
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS6
153 DM5 DQ44 146 19 VSS7
M_A_DM6 170 148 M_A_DQ41 20
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS8
187 DM7 DQ46 158 25 VSS9 600mA
160 M_A_DQ47 26 203
3,7 M_A_DQSP[7:0] DQ47 VSS10 VTT1 +0.75V_DDR_VTT
M_A_DQSP0 12 163 M_A_DQ48 31 204
M_A_DQSP1 DQS0 DQ48 M_A_DQ52 VSS11 VTT2
29 DQS1 DQ49 165 32 VSS12
M_A_DQSP2 47 175 M_A_DQ54 37 C401 C400 C386
M_A_DQSP3 DQS2 DQ50 M_A_DQ50 VSS13
64 DQS3 DQ51 177 38 VSS14
M_A_DQSP4 137 164 M_A_DQ53 43 4.7u/6.3V_6 0.1u/10V_4 4.7u/6.3V_6

GND

GND
M_A_DQSP5 DQS4 DQ52 M_A_DQ49 VSS15
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ51
M_A_DQSP7 DQS6 DQ54 M_A_DQ55 DDR3-DIMM1_H=8_STD
188 176

205

206
3,7 M_A_DQSN[7:0] M_A_DQSN0 DQS7 DQ55 M_A_DQ60
10 DQS#0 DQ56 181
M_A_DQSN1 27 183 M_A_DQ61
M_A_DQSN2 DQS#1 DQ57 M_A_DQ63
45 DQS#2 DQ58 191
M_A_DQSN3 62 193 M_A_DQ62
M_A_DQSN4 DQS#3 DQ59 M_A_DQ56
135 DQS#4 DQ60 180
SM_MEM BUS ADDRESS M_A_DQSN5 152 182 M_A_DQ57
M_A_DQSN6 DQS#5 DQ61 M_A_DQ58
169 DQS#6 DQ62 192
M_A_DQSN7 M_A_DQ59 +1.5V_SUS
C
SO-DIMM0 1010 000 186 DQS#7 DQ63 194
C

SO-DIMM1 1010 001


BUS1_A2 DDR3-DIMM1_H=8_STD

R235
3mA +SMDDR_VREF
1K/F_4

+1.5V_SUS R237 *0_6 +DDR_VREF


7,37 +SMDDR_VREF

+1.5V_SUS R236
1K/F_4
C403 C378 C384 C415 C375

0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C372 C371 C402 C409 C413 C376 C412
0.1u/10V_4 0.1u/10V_4
4.7u/6.3V_6 4.7u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4

+1.5V_SUS
+1.5V_SUS

C380 C379 C383 C385 C374


D C381 C382 C377 C416 D
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
DDR3 SO-DIMM (STD) 1A

Date: Monday, November 01, 2010 Sheet 6 of 41


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

3,6 M_A_A[0..15]
0830--P/N and footprint are follow ZR7B

CN20A M_A_DQ[0..63] 3,6


+1.5V_SUS 3,5,6,30,37,39
+0.75V_DDR_VTT 6,37
+3V 4,5,6,9,10,11,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40 07
M_A_A0 98 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ1
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ7
M_A_A3 A2 DQ2 M_A_DQ3
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4
M_A_A5 A4 DQ4 M_A_DQ5
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 +1.5V_SUS
M_A_A7 A6 DQ6 M_A_DQ2
86 A7 DQ7 18 CN20B
M_A_A8 89 21 M_A_DQ8
A A8 DQ8 A
M_A_A9 85 23 M_A_DQ9 75 44
M_A_A10 A9 DQ9 M_A_DQ14 VDD1 VSS16
107 A10/AP DQ10 33 76 VDD2 VSS17 48
M_A_A11 84 35 M_A_DQ11 81 49
M_A_A12 A11 DQ11 M_A_DQ13 VDD3 VSS18
83 A12/BC# DQ12 22 82 VDD4 VSS19 54
M_A_A13 119 24 M_A_DQ12 87 55
M_A_A14 A13 DQ13 M_A_DQ10 VDD5 VSS20
80 A14 DQ14 34 88 VDD6 VSS21 60
M_A_A15 78 36 M_A_DQ15 93 61
A15 DQ15 M_A_DQ20 VDD7 VSS22
3,6 M_A_BS[2..0] DQ16 39 94 VDD8 VSS23 65

PC2100 DDR3 SDRAM SO-DIMM


M_A_BS0 109 41 M_A_DQ17 99 66
M_A_BS1 BA0 DQ17 M_A_DQ22 VDD9 VSS24
108 BA1 DQ18 51 100 VDD10 VSS25 71
M_A_BS2 79 53 M_A_DQ23 105 72
M_A_CS#2 BA2 DQ19 M_A_DQ21 VDD11 VSS26
3 M_A_CS#2 114 S0# DQ20 40 106 VDD12 VSS27 127
M_A_CS#3 M_A_DQ16

PC2100 DDR3 SDRAM SO-DIMM


3 M_A_CS#3 121 S1# DQ21 42 111 VDD13 VSS28 128
3 M_A_CLKP2 M_A_CLKP2 101 50 M_A_DQ18 112 133
M_A_CLKN2 CK0 DQ22 M_A_DQ19 VDD14 VSS29
3 M_A_CLKN2 103 CK0# DQ23 52 117 VDD15 VSS30 134
3 M_A_CLKP3 M_A_CLKP3 102 57 M_A_DQ24 118 138
M_A_CLKN3 CK1 DQ24 M_A_DQ29 VDD16 VSS31
3 M_A_CLKN3 104 CK1# DQ25 59 123 VDD17 VSS32 139
3,6 M_A_CKE0 M_A_CKE0 73 67 M_A_DQ27 124 144
M_A_CKE1 CKE0 DQ26 M_A_DQ26 VDD18 VSS33
3,6 M_A_CKE1 74 CKE1 DQ27 69 VSS34 145
3,6 M_A_CAS# M_A_CAS# 115 56 M_A_DQ28 199 150
CAS# DQ28 +3V VDDSPD VSS35
3,6 M_A_RAS# M_A_RAS# 110 58 M_A_DQ25 151
M_A_WE# RAS# DQ29 M_A_DQ31 VSS36
3,6 M_A_WE# 113 W E# DQ30 68 77 NC1 VSS37 155
+3V R248 10K/F_4 DIMM1_SA0 197 70 M_A_DQ30 122 156
R247 10K/F_4 DIMM1_SA1 SA0 DQ31 M_A_DQ36 NC2 VSS38
201 SA1 DQ32 129 125 NCTEST VSS39 161
6,9,22,23 PCLK_SMB PCLK_SMB 202 131 M_A_DQ37 162
PDAT_SMB SCL DQ33 M_A_DQ39 R251 0_4 MEM_B_HOT# VSS40
6,9,22,23 PDAT_SMB 200 SDA DQ34 141 3,6 M_A_EVENT# 198 EVENT# VSS41 167
143 M_A_DQ34 3,6 M_A_RST# 30 168
M_A_ODT2 DQ35 M_A_DQ32 RESET# VSS42
3 M_A_ODT2 116 ODT0 DQ36 130 VSS43 172
3 M_A_ODT3 M_A_ODT3 120 132 M_A_DQ33 173
B ODT1 DQ37 M_A_DQ38 +DDR_VREF2 VSS44 B
3,6 M_A_DM[0..7] DQ38 140 6 +DDR_VREF2 1 VREF_DQ VSS45 178
M_A_DM0 11 142 M_A_DQ35 6 +DDR_VREF +DDR_VREF 126 179
M_A_DM1 DM0 DQ39 M_A_DQ40 VREF_CA VSS46
28 DM1 DQ40 147 VSS47 184
M_A_DM2 46 149 M_A_DQ45 185
M_A_DM3 DM2 DQ41 M_A_DQ43 C432 0.1u/10V_4 VSS48
63 157 2 189

(204P)
M_A_DM4 DM3 DQ42 M_A_DQ42 VSS1 VSS49
136 DM4 DQ43 159 3 VSS2 VSS50 190
M_A_DM5 153 146 M_A_DQ44 C431 1000p/50V_4 8 195
M_A_DM6 DM5 DQ44 M_A_DQ41 VSS3 VSS51
170 148 9 196

(204P)
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS4 VSS52
187 DM7 DQ46 158 13 VSS5
3,6 M_A_DQSP[7:0] 160 M_A_DQ47 14
DQ47 VSS6
M_A_DQSP0 12 DQS0 DQ48 163 M_A_DQ48 0902--Add C7274 19 VSS7
M_A_DQSP1 29 165 M_A_DQ52 20
M_A_DQSP2 DQS1 DQ49 M_A_DQ54 VSS8
47 DQS2 DQ50 175 25 VSS9
M_A_DQSP3 64 177 M_A_DQ50 26 203 +0.75V_DDR_VTT
M_A_DQSP4 DQS3 DQ51 M_A_DQ53 VSS10 VTT1
137 DQS4 DQ52 164 31 VSS11 VTT2 204
M_A_DQSP5 154 166 M_A_DQ49 32
M_A_DQSP6 DQS5 DQ53 M_A_DQ51 VSS12 C421 C419 C437
171 DQS6 DQ54 174 37 VSS13
M_A_DQSP7 188 176 M_A_DQ55 38
3,6 M_A_DQSN[7:0] DQS7 DQ55 VSS14
M_A_DQSN0 10 181 M_A_DQ60 43 4.7u/6.3V_6 0.1u/10V_4 4.7u/6.3V_6

GND

GND
M_A_DQSN1 DQS#0 DQ56 M_A_DQ61 VSS15
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ63
M_A_DQSN3 DQS#2 DQ58 M_A_DQ62 DDR3-DIMM0_H=4_Standard
62 193

205

206
M_A_DQSN4 DQS#3 DQ59 M_A_DQ56
135 DQS#4 DQ60 180
M_A_DQSN5 152 182 M_A_DQ57
M_A_DQSN6 DQS#5 DQ61 M_A_DQ58
SM_MEM BUS ADDRESS 169 DQS#6 DQ62 192
M_A_DQSN7 186 194 M_A_DQ59
DQS#7 DQ63
SO-DIMM0 1010 000
SO-DIMM1 1010 001 DDR3-DIMM0_H=4_Standard
C
BUS1_A2 C
+1.5V_SUS

R245
3mA +SMDDR_VREF
1K/F_4

6,37 +SMDDR_VREF R244 *0_6 +DDR_VREF2


+1.5V_SUS
+1.5V_SUS
R246
1K/F_4
C423 C434 C410 C439 C417 C435 C420
C433 C426 C428 C429
4.7u/6.3V_6 4.7u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

+1.5V_SUS

+1.5V_SUS

D C411 C430 C424 C414 C418 D


C436 C427 C425 C438 C404
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
DDR3 SO-DIMM (STD) 1A

Date: Monday, November 01, 2010 Sheet 7 of 41


1 2 3 4 5 6 7 8
5 4 3 2 1

+3V_S5
+3V_S5

C601 *0.1u/10V_4
PCIE_VDDR 11
+3V_S5 9,10,11,12,22,28,29,30,33
+3VPCU 20,29,30,31,32,33,39
+5VPCU 33,34,35,40
08
C600 *0.1u/10V_4 U21

5
U20 *TC7SH08FU
This page is different AMD Nile

5
TC7SH08FU 2 PCIE_RST#
2 A_RST#_R A_RST#_L 4
13,22,23,31 PLTRST# R441 33_4 A_RST#_L R440 0_4 4 1 SB_GPIO_RST# 9
expect RTC circuit
1
C609

3
3
150P/25V_4 31 EC_A_RST#_L R439 *0_4
R442 *0_4
D D

23,25 PCIE_RST#
30 A_RST#_R
PCIE_RST#
A_RST#_R
P1
L1
U18A

PCIE_RST#
A_RST#
Hudson M1 Part 1 of 5
PCICLK0
PCICLK1/GPO36
W2
W1
W3
PCI_CLK0
R419 22_4
T93
PCI_CLK1
PCI_CLK2
12
12 STRAP Function
RTC
PCICLK2/GPO37

PCI CLKS
3 UMI_RXP0 C96 0.1u/10V_4 UMI_RXP0_C AD26 W4 PCI_CLK3 12 20mils D22
C99 0.1u/10V_4 UMI_RXN0_C UMI_TX0P PCICLK3/GPO38 RB500V-40
3 UMI_RXN0 AD27 UMI_TX0N PCICLK4/14M_OSC/GPO39 Y1 PCI_CLK4 12 To EC 20mils
PLACE THESE 3 UMI_RXP1 C86 0.1u/10V_4 UMI_RXP1_C AC28 +3VPCU
C93 0.1u/10V_4 UMI_RXN1_C UMI_TX1P
3 UMI_RXN1 AC29 UMI_TX1N PCIRST# V2 T167
PCIE AC 3 UMI_RXP2 C80 0.1u/10V_4 UMI_RXP2_C AB29 UMI_TX2P
+AVBAT
C84 0.1u/10V_4 UMI_RXN2_C AB28
COUPLING CAPS 3 UMI_RXN2
C70 0.1u/10V_4 UMI_RXP3_C UMI_TX2N D23 R406
3 UMI_RXP3 AB26 UMI_TX3P AD0/GPIO0 AA1 20mils
CLOSE TO U41 3 UMI_RXN3 C75 0.1u/10V_4 UMI_RXN3_C AB27 UMI_TX3N AD1/GPIO1 AA4 RB500V-40 510/F_6 20mils
AA3 +3VRTC_2 +3VRTC
AD2/GPIO2
3 UMI_TXP0 AE24 UMI_RX0P AD3/GPIO3 AB1
3 UMI_TXN0 AE23 AA5 G1
UMI_RX0N AD4/GPIO4

1
3 UMI_TXP1 AD25 AB2 *SHORT_ PAD1
UMI_RX1P AD5/GPIO5 C599
AD24 AB6

PCI EXPRESS INTERFACES


3 UMI_TXN1 UMI_RX1N AD6/GPIO6
3 UMI_TXP2 AC24 AB5 1u/6.3V_4
UMI_RX2P AD7/GPIO7 R423
3 UMI_TXN2 AC25 AA6

2
UMI_RX2N AD8/GPIO8 1K_4
3 UMI_TXP3 AB25 UMI_RX3P AD9/GPIO9 AC2
3 UMI_TXN3 AB24 UMI_RX3N AD10/GPIO10 AC3
AD11/GPIO11 AC4
R105 590/F_4 U600_CALRP AD29 AC1 20mils
R108 2K_4 U600_CALRN PCIE_CALRP AD12/GPIO12
PCIE_VDDR AD28 PCIE_CALRN AD13/GPIO13 AD1
AD14/GPIO14 AD2
22 PCIE_TXP0_LAN C515 0.1u/10V_4 PCIE_TXP0_C AA28 AC6 Del Q33,R434,R435,R444 from BOMs, ZQE no support RTC charge circuits.
C516 0.1u/10V_4 PCIE_TXN0_C GPP_TX0P AD15/GPIO15
LAN 22 PCIE_TXN0_LAN AA29 GPP_TX0N AD16/GPIO16 AE2
23 PCIE_TXP1 C514 0.1u/10V_4 PCIE_TXP1_C Y29 AE1 20MIL
C513 0.1u/10V_4 PCIE_TXN1_C GPP_TX1P AD17/GPIO17
WLAN 23 PCIE_TXN1 Y28 GPP_TX1N AD18/GPIO18 AF8
23 PCIE_TXP2 C511 0.1u/10V_4 PCIE_TXP2_C Y26 AE3 VCCRTC_2 1 3 RTC_N01 R434 *16K_6
GPP_TX2P AD19/GPIO19 +5VPCU
WWAN 23 PCIE_TXN2 C512 0.1u/10V_4 PCIE_TXN2_C Y27 AF1
C GPP_TX2N AD20/GPIO20 Q33 R435 C
W28 GPP_TX3P AD21/GPIO21 AG1 dGPU_RST_GPIO 13
W29 GPP_TX3N AD22/GPIO22 AF2 20MIL
AE9 *MMBT3904 *68.1K/F_4
AD23/GPIO23 AD23 12
22 PCIE_RXP0_LAN AA22 AD9 AD24 12

2
GPP_RX0P AD24/GPIO24 RTC_N03
22 PCIE_RXN0_LAN Y21 GPP_RX0N AD25/GPIO25 AC11 AD25 12 Debug STRAPs
23 PCIE_RXP1 AA25 GPP_RX1P AD26/GPIO26 AF6 AD26 12
23 PCIE_RXN1 AA24 GPP_RX1N AD27/GPIO27 AF4 AD27 12
W23 AF3 R444

VCCRTC_2

1VCCRTC_2
23 PCIE_RXP2 GPP_RX2P AD28/GPIO28 dGPU_PWROK 16
23 PCIE_RXN2 V24 GPP_RX2N AD29/GPIO29 AH2
W24 AG2 *150K/F_6
GPP_RX3P AD30/GPIO30
W25 GPP_RX3N AD31/GPIO31 AH3 All the PCI bus has
CBE0# AA8 T75
AD5 T161
build-in Pull-UP/Down CN14 CN13
CBE1#

PCI INTERFACE
CBE2# AD8 T88 resistors 1 1
CBE3# AA10 T71 2 2
AE8 T87

2
FRAME# *BAT_CONN
AB9 T80 RTC_CONN
DEVSEL#
M23 PCIE_RCLKP/NB_LNK_CLKP IRDY# AJ3 T153
P23 PCIE_RCLKN/NB_LNK_CLKN TRDY# AE7 T94
PAR AC5 T99
4 DISP_CLKP DISP_CLKP R342 0_4 DISP_CLKP_R U29 AF5 T151
DISP_CLKN R341 0_4 DISP_CLKN_R NB_DISP_CLKP STOP#
4 DISP_CLKN U28 NB_DISP_CLKN PERR# AE6 T98 CR2032 with cable CR2032 (Non-Chargeable)
AE4 SERR#
T26
SERR#
AE11
T158 AHL03003004 AHL03003014
NB_HT_CLKP REQ0# T73
T27 NB_HT_CLKN REQ1#/GPIO40 AH5 T145 AHL03003032 AHL030M0009
REQ2#/CLK_REQ8#/GPIO41 AH4 T146 AHL03003037 , AHL03001044
4 APU_CLKP APU_CLKP R339 0_4 APU_CLKP_R V21 AC12 SB_GPIO42
CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42 T66
CPU_CLK 4 APU_CLKN APU_CLKN R340 0_4 APU_CLKN_R T21 AD12 T67
CPU_HT_CLKN GNT0#
GNT1#/GPO44 AJ5 T149
13 CLK_PCIE_VGAP 4 3 SLT_GFX_CLKP V23 AH6 dGPU_VRON 16
SLT_GFX_CLKN SLT_GFX_CLKP GNT2#/GPO45 GNT3#CLK_REQ7#
13 CLK_PCIE_VGAN 2 1 T23 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AB12 T72
RP5 SW@0_4P2R_4 AB11
CLKRUN# CLKRUN# 31
22 CLK_PCIE_LANP L29 AD7 LOCK#
GPP_CLK0P LOCK# T95
To LAN Controller 22 CLK_PCIE_LANN L28 GPP_CLK0N
B
INTE#/GPIO32 AJ6 T147 B
23 CLK_PCIE_WLAN1P N29 GPP_CLK1P INTF#/GPIO33 AG6 T148
To WLAN Controller 23 CLK_PCIE_WLAN1N N28 AG4 INTG# LPC_CLK0 12
GPP_CLK1N INTG#/GPIO34 T152
INTH#/GPIO35 AJ4 T150 LPC_CLK1 12 To STRAPs Page
23 CLK_PCIE_WLAN2P M29 GPP_CLK2P
To WWAN Connector 23 CLK_PCIE_WLAN2N M28 GPP_CLK2N
T25 GPP_CLK3P
V25 H24 LPC_CLK0 R101 22_4
GPP_CLK3N LPCCLK0 CLK_PCI_775 31
CLOCK GENERATOR

H25 LPC_CLK1 R115 22_4 PCLK_DEBUG


LPCCLK1 PCLK_DEBUG 23
L24 GPP_CLK4P LAD0 J27 LPC_LAD0 23,31
L23 GPP_CLK4N LAD1 J26 LPC_LAD1 23,31
LAD2 H29 LPC_LAD2 23,31
P25 H28
LPC

GPP_CLK5P LAD3 LPC_LAD3 23,31


M25 GPP_CLK5N LFRAME# G28 LPC_LFRAME# 23,31
LDRQ0# J25 LPC_DRQ#0 23
P29 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AA18 T63
P28 GPP_CLK6N SERIRQ/GPIO48 AB19 IRQ_SERIRQ 31
N26 GPP_CLK7P
N27 GPP_CLK7N
ALLOW_LDTSTP/DMA_ACTIVE# G21 ALLOW_LDTSTP 4
T29 GPP_CLK8P PROCHOT# H21 H_PROCHOT# 4,10,31
T28 GPP_CLK8N LDT_PG K19 APU_PWRGD 4,30
G22 T56
CPU

LDT_STP# C603
LDT_RST# J24 LDT_RST# 4,30
T52 L25 22p/50V_4
14M_25M_48M_OSC

1
C1 RTC_X1
32K_X1
C518 22p/50V_4 25M_X1 L26 C2 RTC_X2
25M_X1 32K_X2 R407 Y5
R349 D2 PCH_SUSCLK R409 *10K/F_4 +3V_S5 20M_6 32.768KHZ
Y3 RTCCLK INTRUDER_ALERT#
RTC

1M/F_4 INTRUDER_ALERT# B2 T156


25MHz_30PPM 25M_X2 L27 B1 +AVBAT RTC_CLK must ready

2
A 25M_X2 VDDBT_RTC_G C602 A
C519 22p/50V_4 refore RSMRST# 22p/50V_4
Hudson M1

INTRUDER_ALERT# Left not connected (Southbridge


has 50-kohm internal pull-up to VBAT).

Quanta Computer Inc.


PCH_SUSCLK PCH_SUSCLK 31 PROJECT : ZQG
Size Document Number Rev
HUDSON PCIE/LPC/CPU IF(1/5) 1A

Date: Monday, November 01, 2010 Sheet 8 of 41


5 4 3 2 1
5 4 3 2 1

+3V SCL0/SDATA0is 3V tolerance


AMD datasheet define it
R125 2.2K_4 PCLK_SMB
Clock gen/Robson/TV
tuner
/DDR3/DDR3
thermal/Accelerometer
+3V
+3V_S5
4,5,6,7,10,11,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40
8,10,11,12,22,28,29,30,33
09
R131 2.2K_4 PDAT_SMB U18D This page is different AMD Nile
3 APU_MEMHOT# J2 A10 T144
RI# PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
T163 K1
+3V SPI_CS3# RI#/GEVENT22# USB_RCOMP_SB R139 11.8K/F_4
T157 D3 G19
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
30,31 SUSB# F1
R179 *10K/F_4 SUS_STAT# SLP_S3#
30,31 SUSC# H1
SLP_S5#

ACPI / WAKE UP EVENTS


30,31 DNBSWON# F2
R133 4.7K_4 NB_PWRGD SB_PWRGD_IN PWR_BTN#
H5 Hudson M1

USB 1.1 USB MISC


SUS_STAT# PWR_GOOD
G6 J10 T69
SB_TEST0 SUS_STAT# USB_FSD1P/GPIO186
D T155 B3
TEST0 Part 4 of 5 USB_FSD1N
H11 T70 D
+3V_S5 SB_TEST1 C4
T97 TEST1/TMS
SB_TEST2 F6 H9 T76
T82 TEST2 USB_FSD0P/GPIO185
31 SIO_A20GATE SIO_A20GATE AD21 J8 T85
R175 10K/F_4 CPU_THERMTRIP# GA20IN/GEVENT0# USB_FSD0N
31 SIO_RCIN# AE21
KBRST#/GEVENT1#
31 SIO_EXT_SCI# K2 B12
LPC_PME#/GEVENT3# USB_HSD13P
31 SIO_EXT_SMI# J29 A12
LPC_SMI#/GEVENT23# USB_HSD13N
T166 H2
SYS_RST# GEVENT5#
SB/ PWR_GOOD / VDDIO_33_S J1
SYS_RESET#/GEVENT19# USB_HSD12P
F11
22,31 PCIE_WAKE# H6 E11
WAKE#/GEVENT8# USB_HSD12N
T169 F3
C346 CPU_THERMTRIP# IR_RX1/GEVENT20#
4 CPU_THERMTRIP# J6 E14
NB_PWRGD THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P
AC19 E12
100p/50V_4 NB_PWRGD USB_HSD11N
30,31 ICH_RSMRST# G1 J12 USBP10+ 23
RSMRST# USB_HSD10P
USB_HSD10N
J14 USBP10- 23 WL2(3G)
T62 AD19
CLK_REQ4#/SATA_IS0#/GPIO64
T64 AA16 A13 USBP9+ 23
R437 *10K/F_4 SYS_RST# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P
+3V_S5
R140 0_4
8 SB_GPIO_RST#
PCIE_REQ_LAN#_R
AB21
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N
B13 USBP9- 23 WL1
22 PCIE_REQ_LAN# AC18
CLK_REQ0#/SATA_IS3#/GPIO60
16 dGPU_PWR_EN AF20 D13 USBP8+ 28
0908--Add net SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P
R120 *10K/F_4 SIO_A20GATE
T61 AE19
SATA_IS5#/FANIN3/GPIO59 USB_HSD8N
C13 USBP8- 28 EXT BLUETOOTH
+3V 26 SPKR AF19
PCLK_SMB SPKR/GPIO66
6,7,22,23 PCLK_SMB AD22 G12 USBP7+ 28
SCL0/GPIO43 USB_HSD7P
By AMD confirm PDAT_SMB AE22 G14 BLUETOOTH

USB 2.0
6,7,22,23 PDAT_SMB SDA0/GPIO47 USB_HSD7N USBP7- 28
+3V_S5 R184 10K/F_4 SB_SMBCLK1 F5
R185 10K/F_4 SB_SMBDATA1 SCL1/GPIO227
F4 G16 USBP6+ 25
R373 0_4 PCIE_REQ_WLAN2#_R SDA1/GPIO228 USB_HSD6P
+3V_S5 23 PCIE_REQ_WLAN2#
R142 0_4 PCIE_REQ_WLAN1#_R
AH21
CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N
G18 USBP6- 25 4 IN 1 CARD READER (MMC)
23 PCIE_REQ_WLAN1# AB18
ACCLED_EN CLK_REQ1#/FANOUT4/GPIO61
T168 E1 D16 USBP5+ 28
IR_LED#/LLB#/GPIO184 USB_HSD5P

GPIO
R436 *10K/F_4 DNBSWON# AJ21 C16 USB3 Connector (Daughter)
T142 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD5N USBP5- 28
T159 H4
R189 10K/F_4 PCIE_WAKE# DDR3_RST#/GEVENT7#
T90 D5 B14
C GBE_LED0/GPIO183 USB_HSD4P C
T81 D7 A14
R352 10K/F_4 SB_SCLK3 GBE_LED1/GEVENT9# USB_HSD4N
T91 G5
GBE_LED2/GEVENT10#
T165 K3 E18
R353 10K/F_4 SB_SDATA3 GBE_STAT0/GEVENT11# USB_HSD3P
T59 AA20 E16
CLK_REQG#/GPIO65/OSCIN USB_HSD3N
R193 10K/F_4 SB_PWRGD_IN J16
USB_HSD2P USBP2+ 20
CPU_MEMHOT#_IN H3 J18 CCD
T164 BLINK/USB_OC7#/GEVENT18# USB_HSD2N USBP2- 20
28 OC_6# D1
R116 2.2K_4 SB_SCLK4 R187 *10K/F_4 USB_OC6#/IR_TX1/GEVENT6#
+3V_S5 E4 B17 USBP1+ 28
USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P
D4 A17 USB2 Connector (Daughter)

USB OC
28 OC_4# USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N USBP1- 28
R102 2.2K_4 SB_SDATA4 E8
T77 USB_OC3#/AC_PRES/TDO/GEVENT15#
T84 F7 A16 USBP0+ 28
USB_OC2#/TCK/GEVENT14# USB_HSD0P
T83 E7
USB_OC1#/TDI/GEVENT13# USB_HSD0N
B16 USBP0- 28 USB1 Connector (MB Side)
T78 F8
USB_OC0#/TRST#/GEVENT12#
for EMI SCL2/SDATA2 is 3V/S5 tolerance
AMD datasheet define it
C607 *10p/50V_4 R412 *10K_4
26 ACZ_BITCLK_AUDIO R424 33_4 ACZ_BITCLK_R M3 D25 SB_SCLK2 R360 10K/F_4 +3V_S5
ACZ_SDOUT AZ_BITCLK SCL2/GPIO193 SB_SDATA2 R362 10K/F_4
N1 F23
To Azalia
HD audio
12 ACZ_SDOUT
26 ACZ_SDOUT_AUDIO
C608 *10p/50V_4
R425 33_4 L2
AZ_SDOUT
AZ_SDIN0/GPIO167
SDA2/GPIO194
SCL3_LV/GPIO195
B26 SB_SCLK3
SB_SDATA3
SB_SCLK3 4
M2 E26 SB_SDATA3 4
AZ_SDIN1/GPIO168 SDA3_LV/GPIO196

HD AUDIO
interface 26 ACZ_SDIN0 M1 F25 T53
C604 *10p/50V_4 R411 *10K_4 AZ_SDIN2/GPIO169 EC_PWM0/EC_TIMER0/GPIO197
M4 E22 T125
is 3.3S5 R414 33_4 ACZ_SYNC_R AZ_SDIN3/GPIO170 EC_PWM1/EC_TIMER1/GPIO198 SB_GPIO199 R132 *2.2K_4
26 ACZ_SYNC_AUDIO N2
AZ_SYNC EC_PWM2/EC_TIMER2/GPIO199
F22 has checked with
voltage R416 33_4 ACZ_RST#_R P2 E21 SB_GPIO200 R134 2.2K_4
26 ACZ_RESET#_AUDIO
C605 *10p/50V_4 AZ_RST# EC_PWM3/EC_TIMER3/GPIO200 AMD FAE already--Allen
G24
R417 10K/F_4 GBE_COL KSI_0/GPIO201
T1 G25
R428 10K/F_4 GBE_CRS GBE_COL KSI_1/GPIO202
T4
GBE_CRS KSI_2/GPIO203
E28 GPIO200 GPIO199
L6 E29
R171 10K/F_4 GBE_MDIO GBE_MDCK KSI_3/GPIO204
+3V_S5 L5 D29
GBE_MDIO KSI_4/GPIO205
T9 D28
GBE_RXCLK KSI_5/GPIO206
B
U1
GBE_RXD3 KSI_6/GPIO207
C29 H,H = Reserved B
U3 C28
GBE_RXD2 KSI_7/GPIO208
T2
GBE_RXD1 H,L = SPI ROM (DEFAULT)

GBE LAN
U2 B28
GBE_RXD0 KSO_0/GPIO209
T5 A27
R169 10K/F_4 GBE_RXERR GBE_RXCTL/RXDV KSO_1/GPIO210
V5 B27
GBE_RXERR KSO_2/GPIO211

EMBEDDED CTRL
P5
GBE_TXCLK KSO_3/GPIO212
D26 L,H = LPC ROM
M5 A26
GBE_TXD3 KSO_4/GPIO213 L,L = FWH ROM
P9 C26
GBE_TXD2 KSO_5/GPIO214
T7 A24
GBE_TXD1 KSO_6/GPIO215
P7 B25
GBE_TXD0 KSO_7/GPIO216
M7 A25
GBE_TXCTL/TXEN KSO_8/GPIO217
P4 D24
GBE_PHY_PD KSO_9/GPIO218
M9 B24
R161 10K/F_4 GBE_PHY_INTR GBE_PHY_RST# KSO_10/GPIO219
+3V_S5 V7 C24
GBE_PHY_INTR KSO_11/GPIO220
B23
SB_SDATA4 KSO_12/GPIO221
23 SB_SDATA4 E23 A23
SB_SCLK4 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222
23 SB_SCLK4 E24 D22
SB_GPIO166 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223
T58 F21 C22
SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224

EMBEDDED CTRL
SB_GPIO160 G29 A22
T114 FC_RST#/GPO160 KSO_16/GPIO225
B22
AC_OK KSO_17/GPIO226
T116 D27
BAT_INT# PS2KB_DAT/GPIO189
T115 F28
PS2KB_CLK/GPIO190
F29
PS2M_DAT/GPIO191
E27
PS2M_CLK/GPIO192
+3V_S5
Hudson M1

System PWR_OK(CLG)
C349
*0.1u/10V_4
A A
5

U8
2 CPU_COREPG 30,34
SB_PWRGD_IN 4
17,30 SB_PWRGD_IN
1 PWROK_EC
PWROK_EC 30,31
TC7SH08FU
3

R194
100K_4
Quanta Computer Inc.
PROJECT : ZQG
Size Document Number Rev
HUDSON ACPI/GPIO/USB(2/5) 1A

Date: Monday, November 01, 2010 Sheet 9 of 41


5 4 3 2 1
5 4 3 2 1

SATA PORT 0,1,2,3


can support AHCI PLACE SATA AC COUPLING
U18B
AVDD_SATA 11
+3V 4,5,6,7,9,11,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40
+3V_S5 8,9,11,12,22,28,29,30,33 10
mode CAPS CLOSE TO Hudson M1

C592 .01U/16V/X7R_4 SATA_TXP0_C AH9


Hudson M1 AH28 This page is different AMD Nile
24 SATA_TXP0 SATA_TX0P FC_CLK T123
C590 .01U/16V/X7R_4 SATA_TXN0_C AJ9 Part 2 of 5 AG28 T124
24 SATA_TXN0 SATA_TX0N FC_FBCLKOUT
SATA HDD AJ8
FC_FBCLKIN
AF26 T47
24 SATA_RXN0 SATA_RX0N
24 SATA_RXP0 AH8 SATA_RX0P FC_OE#/GPIOD145 AF28 T121
AG29 T122
C588 .01U/16V/X7R_4 SATA_TXP1_C FC_AVD#/GPIOD146
24 SATA_TXP1 AH10 AG26 T128
C585 .01U/16V/X7R_4 SATA_TXN1_C SATA_TX1P FC_WE#/GPIOD148
24 SATA_TXN1 AJ10 AF27 T119
SATA_TX1N FC_CE1#/GPIOD149
AE29
D
SATA ODD AG10
FC_CE2#/GPIOD150
AF29
T118
T120
D
24 SATA_RXN1 SATA_RX1N FC_INT1/GPIOD144
24 SATA_RXP1 AF10 SATA_RX1P FC_INT2/GPIOD147 AH27 T129 AMD recommand : TEMPIN0 / TEMPIN1 / TEMPIN2
AG12 AJ27
can not maintain on floating stages when without usage.
SATA_TX2P FC_ADQ0/GPIOD128 T126
AF12 AJ26 T133 Do not care pull high or pull down.
SATA_TX2N FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130 AH25 T132
AJ12 SATA_RX2N FC_ADQ3/GPIOD131 AH24 T137
AH12 AG23 T135
SATA_RX2P FC_ADQ4/GPIOD132 TEMPIN2
XTLVDD_SATA-- SATA FC_ADQ5/GPIOD133 AH23 T134
crystal power AH14 AJ22 T138
SATA_TX3P FC_ADQ6/GPIOD134 TEMPIN1
PLACE SATA_CAL RES AJ14 SATA_TX3N FC_ADQ7/GPIOD135 AG21 T143
PLVDD_SATA-- AF21 T139
VERY CLOSE TO BALL AG14
FC_ADQ8/GPIOD136
AH22 TEMPIN0
SATA PLL SATA_RX3N FC_ADQ9/GPIOD137 T140
OF Hudson M1 POWER AF14
SATA_RX3P FC_ADQ10/GPIOD138
AJ23 T141

FLASH
AF23 T131
FC_ADQ11/GPIOD139
AG17 AJ24 T136
SATA_TX4P FC_ADQ12/GPIOD140 R388 R389 R391
AF17 AJ25 T130
SATA_TX4N FC_ADQ13/GPIOD141 10K_4 10K_4 10K_4
AG25 T46
FC_ADQ14/GPIOD142
AJ17 AH26 T127
SATA_RX4N FC_ADQ15/GPIOD143
AH17
SATA_RX4P

SERIAL ATA
AJ18
SATA_TX5P BOARD_ID0
AH18 W5
SATA_TX5N FANOUT0/GPIO52 BOARD_ID1
FANOUT1/GPIO53 W6
AH19 Y9 SB_PROCHOT#
SATA_RX5N FANOUT2/GPIO54
AJ19
SATA_RX5P BOARD_ID2
W7
FANIN0/GPIO56 BOARD_ID3
V9
R147 1K/F_4 FANIN1/GPIO57
SATA_CALRP AB14
SATA_CALRP FANIN2/GPIO58
W8 BOARD_ID4 0831--modify location
AVDD_SATA R143 931/F_4 SATA_CALRN AA14
SATA_CALRN TEMPIN0
TEMPIN0/GPIO171 B6
A6 TEMPIN1
TEMPIN1/GPIO172 TEMPIN2
29 SATA_LED# AD11 SATA_ACT#/GPIO67 TEMPIN2/GPIO173 A5
B5 SB_TALERT#
C TEMPIN3/TALERT#/GPIO174
TEMP_COMM
C7
SB_TALERT# 4
MB ID C

A3 CPU_TYPE
C575 *22p/50V_4 SATA_X1 VIN0/GPIO175 SB_HOLE_TIME
AD16 SATA_X1 VIN1/GPIO176 B4

HW MONITOR
A4 CPU_SENSOR CPU THERMAL
VIN2/GPIO177 VIN2 R390 10K_4
GPIO52 GPIO57
C5
Y4 R381 VIN3/GPIO178 VIN3 R387 10K_4
VIN4/GPIO179
A7 External 1 ( Dis ) SW 1
*25MHz_30PPM *1M/F_4 B7 VIN4 R386 10K_4
VIN5/GPIO180 VIN5 R383 10K_4
VIN6/GBE_STAT3/GPIO181 B8 SB-TSI 0 UMA 0
SATA_X2 AC16 A8 BOARD_ID5
C582 *22p/50V_4 SATA_X2 VIN7/GBE_LED3/GPIO182
SB8XX Hold Time GPIO53 GPIO58
1.2V 1 VRAM - 800 1
SPI_DI J5 G27
T89 SPI_DI/GPIO164 NC1
SPI_DO E2 Y2 1.1V 0 VRAM-900 0
T96 SPI_DO/GPIO163 NC2
SPI ROM

SPI_CLK K4
T160 SPI_CLK/GPIO162
SPI_CS1# K9
T79 SPI_CS1#/GPIO165
ROM_RST# G2
T162 ROM_RST#/GPIO161 DU1/MK2 GPIO56 GPIO182
MK2.0 AMD 1 PX4.0 1
Hudson M1
DU1.0 AMD 0 PX3.0 0
D6 RB500V-40
H_PROCHOT# SB_PROCHOT#
4,8,31 H_PROCHOT#

0831--add circuit
+3V
GPIO52
R182 10K_4 BOARD_ID0 R192 *10K_4

GPIO53
B R181 10K_4 BOARD_ID1 R191 *10K_4 B

GPIO56
R180 10K_4 BOARD_ID2 R190 *10K_4

GPIO57
R158 *SP@10K_4 BOARD_ID3 R157 SP@10K_4

GPIO58
R418 *SP@10K_4 BOARD_ID4 R429 SP@10K_4

+3V_S5 GPIO182
R385 *SP@10K_4 BOARD_ID5 R384 SP@10K_4

R400 *10K/F_4 CPU_TYPE R399 10K/F_4

R395 *10K/F_4 CPU_SENSOR R394 10K/F_4

R398 *10K/F_4 SB_HOLE_TIME R397 10K/F_4

A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
HUDSON SATA/BIDs(3/5) 1A

Date: Monday, November 01, 2010 Sheet 10 of 41


5 4 3 2 1
5 4 3 2 1

+3V
+1.1V
4,5,6,7,9,10,12,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40
30,35
+3V_S5 8,9,10,12,22,28,29,30,33
+1.1V_S5 30,35
AVDD_SATA 10
11
VDDIO_AZ 12

This page is different AMD Nile

PLACE ALL THE DECOUPLING CAPS ON


THIS SHEET CLOSE TO SB AS POSSIBLE. +1.1V
+3V U18E
D
42mA U18C
D

Part 3 of 5 790mA 35mil viax2


R188 0_6 +3.3V_SB_R AH1
Hudson M1 N13 VCC_SB_R R145 0_6 Y14
Hudson M1 AJ2
VDDIO_33_PCIGP_1 VDDCR_11_1 VSSIO_SATA_1 VSS_1
V6 R15 Y16 A28
0.1u/10V_4 0.1u/10V_4 VDDIO_33_PCIGP_2 VDDCR_11_2 0.1u/10V_4 0.1u/10V_4 VSSIO_SATA_2 VSS_2
Y19 N17 AB16 A2
VDDIO_33_PCIGP_3 VDDCR_11_3 VSSIO_SATA_3 VSS_3
AE5 U13 AC14 E5

CORE S0
C340 C326 C338 C178 VDDIO_33_PCIGP_4 VDDCR_11_4 C245 C284 C291 C290 C260 VSSIO_SATA_4 VSS_4
AC21 U17 AE12 D23
22U/6.3V/X5R_8 VDDIO_33_PCIGP_5 VDDCR_11_5 VSSIO_SATA_5 VSS_5
AA2 V12 AE14 E25
0.1u/10V_4 VDDIO_33_PCIGP_6 VDDCR_11_6 10u/6.3V_8 1u/6.3V_4 1u/6.3V_4 VSSIO_SATA_6 VSS_6
AB4 V18 AF9 E6

PCI/GPIO I/O
VDDIO_33_PCIGP_7 VDDCR_11_7 VSSIO_SATA_7 VSS_7
AC8 W12 AF11 F24
VDDIO_33_PCIGP_8 VDDCR_11_8 VSSIO_SATA_8 VSS_8
AA7 W18 AF13 N15
VDDIO_33_PCIGP_9 VDDCR_11_9 +1.1V VSSIO_SATA_9 VSS_9
AA9
AF7
VDDIO_33_PCIGP_10 382mA 20mil viax1 AF16
AG8
VSSIO_SATA_10 VSS_10
R13
R17
VDDIO_33_PCIGP_11 +1.1V_CKVDD L45 FBMA-11-201209-800A50T(80,5A) VSSIO_SATA_11 VSS_11
GPIOD Interface Not Implemented AA19
VDDIO_33_PCIGP_12 VDDAN_11_CLK_1
K28 AH7
VSSIO_SATA_12 VSS_12
T10
K29 AH11 P10
connected to GND through a 0-Ω resistor VDDAN_11_CLK_2 0.1u/10V_4 0.1u/10V_4 VSSIO_SATA_13 VSS_13
150mA 10mil viax1 VDDAN_11_CLK_3
J28
K26 C502
AH13
AH16
VSSIO_SATA_14 VSS_14
V11
U15
VDDAN_11_CLK_4 C185 C156 C113 C145 VSSIO_SATA_15 VSS_15
J21 AJ7 M18
VDDAN_11_CLK_5 VSSIO_SATA_16 VSS_16

CLKGEN I/O
R129 0_6 VDDIO_18_FC AF22 J20 AJ11 V19
VDDIO_18_FC_1 VDDAN_11_CLK_6 22U/6.3V/X5R_8 1u/6.3V_4 1u/6.3V_4 VSSIO_SATA_17 VSS_17
AE25 K21 AJ13 M11

FLASH I/O
VDDIO_18_FC_2 VDDAN_11_CLK_7 VSSIO_SATA_18 VSS_18
AF24 J22 AJ16 L12
VDDIO_18_FC_3 VDDAN_11_CLK_8 VSSIO_SATA_19 VSS_19
AC22 L18
VDDIO_18_FC_4 VSS_20
A9 J7
+3V VSSIO_USB_1 VSS_21
V1 B10 P3
VDDRF_GBE_S VSSIO_USB_2 VSS_22
K11 V4
22mA POWER VDDIO_33_GBE_S
M10 B9
VSSIO_USB_3
VSSIO_USB_4
VSS_23
VSS_24
AD6
L49 HCB1608KF-221T20 VDDPL_3.3V_PCIE D10 AD4
VSSIO_USB_5 VSS_25
AE28 D12 AB7
VDDPL_33_PCIE VSSIO_USB_6 VSS_26

GBE LAN
1115mA 50mil viax3 D14
D17
VSSIO_USB_7 VSS_27
AC9
V8
C517 C510 VSSIO_USB_8 VSS_28
U26 L7 E9 W9

PCI EXPRESS
+1.1V PCIE_VDDR 2.2u/6.3V_6 *0.1u/10V_4 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 VSSIO_USB_9 VSS_29
V22 L9 F9 W10
C VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 VSSIO_USB_10 VSS_30 C
V26 F12 AJ28
L46 VDDAN_11_PCIE_3 VSSIO_USB_11 VSS_31
V27 F14 B29
FBMA-11-201209-800A50T(80,5A) VDDAN_11_PCIE_4 VSSIO_USB_12 VSS_32
V28 M6 F16 U4
0.1u/10V_4 VDDAN_11_PCIE_5 VDDIO_GBE_S_1 VSSIO_USB_13 VSS_33
V29 P8 C9 Y18
VDDAN_11_PCIE_6 VDDIO_GBE_S_2 VSSIO_USB_14 VSS_34
W22 G11 Y10
C503 C123 C144 C122 VDDAN_11_PCIE_7 VSSIO_USB_15 VSS_35
W26 F18 Y12

GROUND
VDDAN_11_PCIE_8 VSSIO_USB_16 VSS_36
D9 Y11
22U/6.3V/X5R_8 1u/6.3V_4 1u/6.3V_4 VSSIO_USB_17 VSS_37
H12 AA11
+3V VSSIO_USB_18 VSS_38
15mA 5mil vaix1 H14
VSSIO_USB_19 VSS_39
AA12
AD14
L29 HCB1608KF-221T20 VDDPL_3.3V_SATA VDDPL_33_SATA
A21
49mA H16
H18
VSSIO_USB_20 VSS_40
G4
J4
VDDIO_33_S_1 VSSIO_USB_21 VSS_41
AJ20 D21 J11 G8
VDDAN_11_SATA_1 VDDIO_33_S_2 +3.3ALW_R R137 0_6 VSSIO_USB_22 VSS_42
AF18 B21 +3V_S5 J19 G9
VDDAN_11_SATA_4 VDDIO_33_S_3 VSSIO_USB_23 VSS_43

SERIAL ATA
AH20 K10 K12 M12
C268 VDDAN_11_SATA_2 VDDIO_33_S_4 VSSIO_USB_24 VSS_44
AG19 L10 K14 AF25

3.3V_S5 I/O
VDDAN_11_SATA_3 VDDIO_33_S_5 VSSIO_USB_25 VSS_45
AE18 J9 K16 H7
2.2u/6.3V_6 VDDAN_11_SATA_5 VDDIO_33_S_6 C201 C301 VSSIO_USB_26 VSS_46
AD18 T6 K18 AH29
VDDAN_11_SATA_6 VDDIO_33_S_7 VSSIO_USB_27 VSS_47
AE16 T8 H19 V10
+1.1V AVDD_SATA VDDAN_11_SATA_7 VDDIO_33_S_8 2.2u/6.3V_6 2.2u/6.3V_6 VSSIO_USB_28 VSS_48
P6
+1.1V_S5 VSS_49
L24
1354mA 60mil viax3 165mA 10mil viax1 VSS_50
N4
Y4 L4
FBMA-11-201209-800A50T(80,5A) VDDCR_1.1V R113 0_6 EFUSE VSS_51
F26 L8

CORE S5
0.1u/10V_4 0.1u/10V_4 VDDCR_11_S_1 VSS_52
A18 G26 D8
C224 VDDAN_33_USB_S_1 VDDCR_11_S_2 1u/6.3V_4 VSSAN_HWM
C228 C249 C229 C230
A19
A20
VDDAN_33_USB_S_2
M8
15mA VDDIO_AZ M19 M20
VDDAN_33_USB_S_3 VDDIO_AZ_S C117 C116 VSSXL VSSPL_SYS
22U/6.3V/X5R_8 1u/6.3V_4 1u/6.3V_4
B18
B19
VDDAN_33_USB_S_4
A11
58mA VDDCR_1.1_USB +1.1V_S5
VDDAN_33_USB_S_5 VDDCR_11_USB_S_1 1u/6.3V_4
B20 B11 P21 H23
VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 VSSIO_PCIECLK_1 VSSIO_PCIECLK_14
USB I/O

C18 P20 H26


VDDAN_33_USB_S_7 L51 HCB1608KF-221T20 VSSIO_PCIECLK_2 VSSIO_PCIECLK_15
+3V_S5 L52 HCB1608KF-221T20 AVDD_USB 534mA 25mil viax2 C20
D18
VDDAN_33_USB_S_8
M21
46mA VDDPL_3.3V
M22
M24
VSSIO_PCIECLK_3 VSSIO_PCIECLK_16
AA21
AA23
VDDAN_33_USB_S_9 VDDPL_33_SYS 0.1u/10V_4 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17
0.1u/10V_4 1u/6.3V_4
D19
D20
VDDAN_33_USB_S_10
L22
65mA VDDPL_1.1V
M26
P22
VSSIO_PCIECLK_5 VSSIO_PCIECLK_18
AB23
AD23
B VDDAN_33_USB_S_11 VDDPL_11_SYS_S C567 C583 C584 VSSIO_PCIECLK_6 VSSIO_PCIECLK_19 B
C572 C244 C573 C571 C217
E19
VDDAN_33_USB_S_12 16mA P24
VSSIO_PCIECLK_7 VSSIO_PCIECLK_20
AA26
PLL

F19 AVDD_USB P26 AC26


VDDPL_33_USB_S 10u/6.3V_8 0.1u/10V_4 +3V VSSIO_PCIECLK_8 VSSIO_PCIECLK_21
+1.1V_S5 10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 C11 D6
12mA VDDAN_3.3V_HWM
T20
T22
VSSIO_PCIECLK_9 VSSIO_PCIECLK_22
Y20
W21
VDDAN_11_USB_S_1 VDDAN_33_HWM_S VSSIO_PCIECLK_10 VSSIO_PCIECLK_23
D11
VDDAN_11_USB_S_2
L20
5mA VDDXL_3.3V L25 HCB1608KF-221T20
T24
V20
VSSIO_PCIECLK_11 VSSIO_PCIECLK_24
W20
AE26
L53 HCB1608KF-221T20 VDDAN_1.1V_USB VDDXL_33_S VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
J23 L21
VSSIO_PCIECLK_13 VSSIO_PCIECLK_26
K20
Hudson M1 VSSIO_PCIECLK_27
88mA C207 Part 5 of 5
C577 C587 2.2u/6.3V_6 Hudson M1
0.1u/10V_4
2.2u/6.3V_6

+3V +3V_S5 VDDIO_AZ


+3V +1.1V +1.1V_S5 +3V_S5 VDDAN_3.3V_HWM
VDDPL_3.3V VDDPL_1.1V

R186 *0_6 L22 L20 L30


HCB1608KF-221T20 HCB1608KF-221T20 HCB1608KF-221T20
R183 0_6 L21
*HCB1608KF-221T20 0.1u/10V_4
C183 C98 C334 C336
C322
2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6
2.2u/6.3V_6
A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
HUDSON PWR/GND(4/5) 1A

Date: Monday, November 01, 2010 Sheet 11 of 41


5 4 3 2 1
5 4 3 2 1

OVERLAP COMMON PADS WHERE intermal have pull


Hi 10K , confirm AMD
VDDIO_AZ 11
+3V 4,5,6,7,9,10,11,16,17,20,21,23,25,26,29,30,31,33,34,35,36,37,38,39,40
+3V_S5 8,9,10,11,22,28,29,30,33 12
POSSIBLE FOR DUAL-OP RESISTORS. ward this pull Hi
not need

REQUIRED STRAPS
D D

VDDIO_AZ +3V +3V +3V

R413
R430

10K/F_4
R431

*10K/F_4
R427

*10K/F_4
DEBUG STRAPS
*10K/F_4
HUDSON-M1 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
9 ACZ_SDOUT 8 PCI_CLK1 8 PCI_CLK2 8 PCI_CLK3 8 AD27
8 AD26
8 AD25
8 AD24
R420 R421 R415 8 AD23
R426
10K/F_4 *10K/F_4 10K/F_4 10K/F_4
Use 2.2K PD. R401 R393 R151 R165 R152
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4

C C
+3V +3V_S5 +3V_S5
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

R432 R128 R123 PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
*10K/F_4 *10K/F_4 10K/F_4 HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT

DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT


8 PCI_CLK4 8 LPC_CLK0 8 LPC_CLK1

PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI


R422 R127 R122 LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT

10K/F_4 10K/F_4 *10K/F_4

PCI_CLK4 CPU/NB HT Clock Selection


0 V – Reserved.
3.3 V – Required setting for integrated clock mode.
This strap is not used if the strap CLKGEN is
B
configured for external clock generator mode. B

REQUIRED STRAPS
AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199

PULL LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN


HIGH MODE PCIE Gen2 Timer DEBUG CLOCK MODE ENABLED ENABLED H,H = Reserved
DEFAULT Enabled STRAP DEFAULT H,L = SPI ROM (Default)

PULL PERFORMANCE FORCE Watchdog IGNORE FUSION EC CLKGEN L,H = LPC ROM
LOW MODE PCIE Gen1 Timer DEBUG CLOCK MODE DISABLED DISABLED
L,L = FWH ROM
Disabled STRAP
A DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
HUDSON STRAPS/PWRGD(5/5) 1A

Date: Monday, November 01, 2010 Sheet 12 of 41


5 4 3 2 1
5 4 3 2 1

3 PEG_TXP[3..0] PEG_TXP[3..0]
U15A

15
PEG_TXN[3..0]
3 PEG_TXN[3..0]
PEG_TXP3 AA38 Y33 PEG_RXP3_C C179 SW@.1u/10V_4 PEG_RXP3
PEG_TXN3 PCIE_RX0P PCIE_TX0P PEG_RXN3_C C189 SW@.1u/10V_4 PEG_RXN3
Y37 PCIE_RX0N PCIE_TX0N Y32
D D

PEG_RXP[3..0] PEG_TXP2 Y35 W33 PEG_RXP2_C C205 SW@.1u/10V_4 PEG_RXP2


3 PEG_RXP[3..0] PCIE_RX1P PCIE_TX1P
PEG_TXN2 W36 W32 PEG_RXN2_C C213 SW@.1u/10V_4 PEG_RXN2
PCIE_RX1N PCIE_TX1N
PEG_RXN[3..0]
3 PEG_RXN[3..0]
PEG_TXP1 W38 U33 PEG_RXP1_C C221 SW@.1u/10V_4 PEG_RXP1
PEG_TXN1 PCIE_RX2P PCIE_TX2P PEG_RXN1_C C246 SW@.1u/10V_4 PEG_RXN1
V37 PCIE_RX2N PCIE_TX2N U32

PEG_TXP0 V35 U30 PEG_RXP0_C C255 SW@.1u/10V_4 PEG_RXP0


PEG_TXN0 PCIE_RX3P PCIE_TX3P PEG_RXN0_C C262 SW@.1u/10V_4 PEG_RXN0
U36 PCIE_RX3N PCIE_TX3N U29

U38 PCIE_RX4P PCIE_TX4P T33


T37 PCIE_RX4N PCIE_TX4N T32

PCI EXPRESS INTERFACE


T35 PCIE_RX5P PCIE_TX5P T30
R36 PCIE_RX5N PCIE_TX5N T29

R38 PCIE_RX6P PCIE_TX6P P33


C P37 PCIE_RX6N PCIE_TX6N P32 C

P35 PCIE_RX7P PCIE_TX7P P30


N36 PCIE_RX7N PCIE_TX7N P29

N38 PCIE_RX8P PCIE_TX8P N33


M37 PCIE_RX8N PCIE_TX8N N32

M35 PCIE_RX9P PCIE_TX9P N30


L36 PCIE_RX9N PCIE_TX9N N29

L38 PCIE_RX10P PCIE_TX10P L33


K37 PCIE_RX10N PCIE_TX10N L32

K35 PCIE_RX11P PCIE_TX11P L30


J36 PCIE_RX11N PCIE_TX11N L29

J38 PCIE_RX12P PCIE_TX12P K33


B H37 PCIE_RX12N PCIE_TX12N K32 B

H35 PCIE_RX13P PCIE_TX13P J33


G36 J32 +3V_D
PCIE_RX13N PCIE_TX13N

G38 PCIE_RX14P PCIE_TX14P K30


F37 K29 R361
PCIE_RX14N PCIE_TX14N
SW@10K/F_4
F35 PCIE_RX15P PCIE_TX15P H33
E37 H32 D20 SW@BAS316
PCIE_RX15N PCIE_TX15N PCIE_RST_VGA#
PLTRST# 8,22,23,31
D19 SW@BAS316
CLOCK
dGPU_RST_GPIO 8
8 CLK_PCIE_VGAP AB35 PCIE_REFCLKP
8 CLK_PCIE_VGAN AA36 PCIE_REFCLKN

For Madison and Park CALIBRATION


AJ21 Y30 R130 SW@1.27K/F_4
the PWRGOOD ball must
AK21
NC#1 PCIE_CALRP C04
A be conneccted to ground R76 SW@10K_4 NC#2 R135 SW@2K/F_4 A
AH16 PWRGOOD PCIE_CALRN Y29 +1V_GPU

PCIE_RST_VGA# AA30 PERSTB Quanta Computer Inc.


SW@SEYMOUR_M2
PROJECT : ZQG
Size Document Number Rev
SeymourPCIE 1/6 1A

Date: Monday, November 01, 2010 Sheet 13 of 41


5 4 3 2 1
5 4 3 2 1

U15B

U15G
16
AU24
TXCAP_DPA3P
AV23
TXCAM_DPA3N
AT25 LVDS CONTROL AK27 R97 *SW@10K_4
MUTI GFX TX0P_DPA2P VARY_BL
AR24 AJ27
DPA TX0M_DPA2N DIGON
AU26
TX1P_DPA1P
For Park-M2 NC AV25
TX1M_DPA1N
pin AR8
DVPCNTL_MVP_0 TX2P_DPA0P
AT27
TXCLK_UP_DPF3P
AK35
AU8 AR26 AL36
D DVPCNTL_MVP_1 TX2M_DPA0N TXCLK_UN_DPF3N D
AP8
DVPCNTL_0
AW8 AR30 AJ38
DVPCNTL_1 TXCBP_DPB3P TXOUT_U0P_DPF2P
AR3 AT29 AK37
DVPCNTL_2 TXCBM_DPB3N TXOUT_U0N_DPF2N
AR1
DVPCLK
AU1 AV31 AH35
GPU Power-on sequence 18 RAM_STRAP0
18 RAM_STRAP1 AU3
AW3
DVPDATA_0
DVPDATA_1 DPB
TX3P_DPB2P
TX3M_DPB2N
AU30
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AJ36
18 RAM_STRAP2 DVPDATA_2
AP6 AR32 AG38
T21 DVPDATA_3 TX4P_DPB1P TXOUT_U2P_DPF0P
AW5 AT31 AH37
1 => +3V_D AU5
DVPDATA_4
DVPDATA_5
TX4M_DPB1N TXOUT_U2N_DPF0N
AR6 AT33 AF35
2 => +VGPU_CORE 1.8V GPIO AW6
DVPDATA_6
DVPDATA_7
TX5P_DPB0P
TX5M_DPB0N
AU32
TXOUT_U3P
TXOUT_U3N
AG36
AU6
DVPDATA_8
3 => +1V AT7
AV7
DVPDATA_9 TXCCP_DPC3P
AU14
AV13 LVTMDP
DVPDATA_10 TXCCM_DPC3N
4 => +1.5V_GPU AN7
AV9
DVPDATA_11
DVPDATA_12 TX0P_DPC2P
AT15
TXCLK_LP_DPE3P
AP34
AT9 AR14 AR34
5 => +1.8V_GPU AR10
DVPDATA_13
DVPDATA_14
TX0M_DPC2N TXCLK_LN_DPE3N
AW10 DPC AU16 AW37
6 => dGPU_PWROK AU10
AP10
DVPDATA_15
DVPDATA_16
TX1P_DPC1P
TX1M_DPC1N
AV15
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AU35
For Park-M2 NC DVPDATA_17
AV11 AT17 AR37
pin DVPDATA_18 TX2P_DPC0P TXOUT_L1P_DPE1P
AT11 AR16 AU39
DVPDATA_19 TX2M_DPC0N TXOUT_L1N_DPE1N
DVPDATA_17 - AR12
DVPDATA_20
AW12 AU20 AP35
DVPDATA_21 TXCDP_DPD3P TXOUT_L2P_DPE0P
DVPDATA_23 AU12
DVPDATA_22 TXCDM_DPD3N
AT19
TXOUT_L2N_DPE0N
AR35
AP12
+3V_D DVPDATA_23
AT21 AN36
TX3P_DPD2P TXOUT_L3P
AR20 AP37
TX3M_DPD2N TXOUT_L3N
DPD AU22
TX4P_DPD1P
AV21
R84 R65 TX4M_DPD1N
SW@10K/F_4 SW@10K/F_4 I2C AT23
TX5P_DPD0P SW@SEYMOUR_M2
AR22
TX5M_DPD0N
AK26
SCL
C AJ26 C
SDA
AD39 EXT_CRT_RED
GENERAL PURPOSE I/O R
AD37
RB
18 GPU_GPIO0 AH20
GPIO_0 EXT_CRT_GRN
18 GPU_GPIO1 AH18 AE36
GPIO_1 G
18 GPU_GPIO2 AN16 AD35
GPIO_2 GB
18 GPIO3_SMBDAT AH23
GPIO_3_SMBDATA EXT_CRT_BLU
18 GPIO4_SMBCLK AJ23 AF37
IO_VID1 GPIO_4_SMBCLK B
AH17 AE38
T42 IO_VID0 GPIO_5_AC_BATT DAC1 BB
AJ17

*SW@150/F_4

*SW@150/F_4

*SW@150/F_4
T41 EV_LVDS_BLON GPIO_6
AK17 AC36 EXT_HSYNC 18
T36 SOUT_GPIO8 GPIO_7_BLON HSYNC
AJ13 AC38 EXT_VSYNC 18
SIN_GPIO9 GPIO_8_ROMSO VSYNC

R107

R111

R124
T25 AH15
18 SIN_GPIO9 GPIO_9_ROMSI
SCLK_GPIO10 AJ16
T54 GPIO_10_ROMSCK R121 SW@499/F_4
18 GPU_GPIO11 AK16 AB34
GPIO_11 RSET
18 GPU_GPIO12 AL16
GPIO_12 AVDD
18 GPU_GPIO13 AM16 AD34
GPIO_13 AVDD +1.8V_GPU
AM14 AE34
T23 GPIO_14_HPD2 AVSSQ
3.3V GPIO 38 GPU_VID1 AM13
GPIO_15_PWRCNTL_0 (1.8V@70mA AVDD)
GPU_VID3 AK14 AC33 VDD1DI 120 ohm/300mA
T55 GPIO_16_SSIN VDD1DI AVDD L19 SW@SBY100505T-121Y-N/0.3A/120ohm_4
18 ALT#_GPIO17 AG30 AC34
GPIO_17_THERMAL_INT VSS1DI SW@.1u/10V_4 SW@10U/6.3V_6
AN14
T20 GPIO_18_HPD3
AM17
T27 GPIO_19_CTF C90 C88 C87
38 GPU_VID2 AL13 AC30
GPIO_20_PWRCNTL_1 R2 SW@1U/6.3V_4
AJ14 AC31
T48 SCS#_GPIO22 GPIO_21_BB_EN R2B
18 SCS#_GPIO22 AK13
GPIO_22_ROMCSB
AN13 AD30
R96 *SW@10K/F_4 GPIO24_TRSTB GPIO_23_CLKREQB G2
AM23
JTAG_TRSTB G2B
AD31 (1.8V@100mA VDD1DI)
T31 GPIO25_TDI AN23 120 ohm/300mA
T38 GPIO26_TCK JTAG_TDI VDD1DI L17 SW@SBY100505T-121Y-N/0.3A/120ohm_4
AK23 AF30
T37 GPIO27_TMS JTAG_TCK B2
AL24 AF31
T18 GPIO28_TDO JTAG_TMS B2B SW@.1u/10V_4 SW@10U/6.3V_6
AM24
JTAG_TDO C89 C94 C83
AJ19
GENERICA SW@1U/6.3V_4
AK19 AC32
GENERICB C
AJ20 AD32
GENERICC Y
AK20 AF32
GENERICD COMP
AJ24
B GENERICE_HPD4 DAC2 B
AH26
GENERICF T51
AH24 AD29
GENERICG H2SYNC
AC29 V2SYNC 18
V2SYNC
AK24
HPD1 VDD1DI
AG31
VDD2DI
AG32
VSS2DI

A2VDD
AG33 +3V_D (3.3V@130mA A2VDD)
AD33 A2VDDQ
R55 SW@499/F_4 VREFG A2VDDQ C112
+1.8V_GPU AH13
VREFG SW@.1u/10V_4
AF33
A2VSSQ
R79 C56
SW@249/F_4 AA29 R126 SW@715/F_4
SW@.1u/10V_4 R2SET
+1.8V(75mA)
120 ohm/300mA
+1.8V_GPU L14 SW@SBY100505T-121Y-N/0.3A/120ohm_4 DPLL_PVDD DDC/AUX AM26
PLL/CLOCK DDC1CLK
AN26
C60 C63 C68 DPLL_PVDD DDC1DATA
AM32
DPLL_PVDD
AN32 AM27
SW@10U/6.3V_6
SW@1U/6.3V_4
SW@.1u/10V_4 DPLL_PVSS AUX1P T30 +1.8V_GPU
AL27
AUX1N T26 (1.8V@2mA A2VDDQ)
DPLL_VDDC AN31 AM19 120 ohm/300mA
C53 SW@27p/50V_4 DPLL_VDDC DDC2CLK T28 A2VDDQ L48 SW@SBY100505T-121Y-N/0.3A/120ohm_4
AL19
DDC2DATA T22
+1.0V(125mA)
2

120 ohm/300mA XTALI_27M AV33 AN20 SW@1U/6.3V_4


L13 SW@SBY100505T-121Y-N/0.3A/120ohm_4 DPLL_VDDC Y1 R58 XTALO_27M XTALIN AUX2P T34 C508 C507
+1V_GPU AU34 AM20
SW@1M_4 XTALOUT AUX2N T24 SW@.1u/10V_4
C05 C59 C62 C67
SW@27MHZ
AL30
1

DDCCLK_AUX3P T32
AM30
SW@10U/6.3V_6
SW@1U/6.3V_4
SW@.1u/10V_4 C54 SW@27p/50V_4 DDCDATA_AUX3N T33
AL29
DDCCLK_AUX4P T35
18 GPU_D+ AF29 AM29
DPLUS THERMAL DDCDATA_AUX4N T29
A
18 GPU_D- AG29 A
DMINUS
+1.8V(5mA) DDCCLK_AUX5P
AN21
120 ohm/300mA AM21
L18 SW@SBY100505T-121Y-N/0.3A/120ohm_4 TS_VDD T40 DDCDATA_AUX5N
+1.8V_GPU AK32
TS_VDD TS_FDO
AJ32 AJ30
C85 C92 TSVDD DDC6CLK
AJ33 AJ31
TSVSS DDC6DATA
SW@10U/6.3V_6 SW@.1u/10V_4 AK30
NC_DDCCLK_AUX7P T39
AK29
NC_DDCDATA_AUX7N T19

Quanta Computer Inc.


SW@SEYMOUR_M2
PROJECT : ZQG
Size Document Number Rev
Seymour-HOST 2/6 1A

Date: Monday, November 01, 2010 Sheet 14 of 41


5 4 3 2 1
5 4 3 2 1

17
VMB_DQ[63..0]
19 VMB_DQ[63..0]
VMB_DM[7..0]
19 VMB_DM[7..0]
U15C U15D
DDR2 DDR2 VMB_RDQS[7..0] DDR2 DDR2
GDDR3/GDDR5 GDDR5/GDDR3 19 VMB_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 VMB_WDQS[7..0] DDR3 DDR3
19 VMB_WDQS[7..0]
C37 G24 VMB_DQ0 C5 P8 VMB_MA0
DQA0_0/DQA_0 MAA0_0/MAA_0 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 VMB_MA1
C35 J23 C3 T9

MEMORY INTERFACE A
D DQA0_1/DQA_1 MAA0_1/MAA_1 VMB_MA[13..0] VMB_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1 VMB_MA2 D
A35 H24 E3 P9

MEMORY INTERFACE B
DQA0_2/DQA_2 MAA0_2/MAA_2 19 VMB_MA[13..0] DQB0_2/DQB_2 MAB0_2/MAB_2
E34 J24 VMB_DQ3 E1 N7 VMB_MA3
DQA0_3/DQA_3 MAA0_3/MAA_3 VMB_DQ4 DQB0_3/DQB_3 MAB0_3/MAB_3 VMB_MA4
G32 H26 F1 N8
DQA0_4/DQA_4 MAA0_4/MAA_4 VMB_DQ5 DQB0_4/DQB_4 MAB0_4/MAB_4 VMB_MA5
D33 J26 F3 N9
DQA0_5/DQA_5 MAA0_5/MAA_5 VMB_DQ6 DQB0_5/DQB_5 MAB0_5/MAB_5 VMB_MA6
F32 H21 F5 U9
DQA0_6/DQA_6 MAA0_6/MAA_6 VMB_DQ7 DQB0_6/DQB_6 MAB0_6/MAB_6 VMB_MA7
E32 G21 G4 U8
DQA0_7/DQA_7 MAA0_7/MAA_7 VMB_DQ8 DQB0_7/DQB_7 MAB0_7/MAB_7 VMB_MA8
D31 H19 H5 Y9
DQA0_8/DQA_8 MAA1_0/MAA_8 VMB_DQ9 DQB0_8/DQB_8 MAB1_0/MAB_8 VMB_MA9
F30 H20 H6 W9
DQA0_9/DQA_9 MAA1_1/MAA_9 VMB_DQ10 DQB0_9/DQB_9 MAB1_1/MAB_9 VMB_MA10
C30 L13 J4 AC8
DQA0_10/DQA_10 MAA1_2/MAA_10 VMB_DQ11 DQB0_10/DQB_10 MAB1_2/MAB_10 VMB_MA11
A30 G16 K6 AC9
DQA0_11/DQA_11 MAA1_3/MAA_11 VMB_DQ12 DQB0_11/DQB_11 MAB1_3/MAB_11 VMB_MA12
F28 J16 K5 AA7
DQA0_12/DQA_12 MAA1_4/MAA_12 VMB_DQ13 DQB0_12/DQB_12 MAB1_4/MAB_12 VMB_BA2
C28 H16 L4 AA8 VMB_BA2 19
DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 VMB_DQ14 DQB0_13/DQB_13 MAB1_5/BA2 VMB_BA0
A28 J17 M6 Y8 VMB_BA0 19
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 VMB_DQ15 DQB0_14/DQB_14 MAB1_6/BA0 VMB_BA1
E28 H17 M1 AA9 VMB_BA1 19
DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMB_DQ16 DQB0_15/DQB_15 MAB1_7/BA1
D27 M3
DQA0_16/DQA_16 VMB_DQ17 DQB0_16/DQB_16 VMB_DM0
F26 A32 M5 H3
DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMB_DQ18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 VMB_DM1
C26 C32 N4 H1
DQA0_18/DQA_18 WCKA0B_0/DQMA_1 VMB_DQ19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 VMB_DM2
A26 D23 P6 T3
DQA0_19/DQA_19 WCKA0_1/DQMA_2 VMB_DQ20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 VMB_DM3
F24 E22 P5 T5
DQA0_20/DQA_20 WCKA0B_1/DQMA_3 VMB_DQ21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 VMB_DM4
C24 C14 R4 AE4
DQA0_21/DQA_21 WCKA1_0/DQMA_4 VMB_DQ22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 VMB_DM5
A24 A14 T6 AF5
DQA0_22/DQA_22 WCKA1B_0/DQMA_5 VMB_DQ23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 VMB_DM6
E24 E10 T1 AK6
DQA0_23/DQA_23 WCKA1_1/DQMA_6 VMB_DQ24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 VMB_DM7
C22 D9 U4 AK5
DQA0_24/DQA_24 WCKA1B_1/DQMA_7 VMB_DQ25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
A22 V6
DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
F22 C34 V1 F6
DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 VMB_DQ27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 VMB_RDQS1
D21 D29 V3 K3
DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 VMB_DQ28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 VMB_RDQS2
A20 D25 Y6 P3
DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 VMB_DQ29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 VMB_RDQS3
F20
DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3
E20 Y1
DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3
V5 QSB[7..0]
D19 E16 VMB_DQ30 Y3 AB5 VMB_RDQS4
DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 VMB_DQ31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 VMB_RDQS5
E18 E12 Y5 AH1
DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 VMB_DQ32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 VMB_RDQS6
C18 J10 AA4 AJ9
DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 VMB_DQ33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 VMB_RDQS7
A18 D7 AB6 AM5
DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 AB1
DQA1_2/DQA_34 VMB_DQ35 DQB1_2/DQB_34 VMB_WDQS0
D17 A34 AB3 G7
DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMB_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMB_WDQS1
A16 E30 AD6 K1
DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 VMB_DQ37 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 VMB_WDQS2
F16 E26 AD1 P1
DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 VMB_DQ38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 VMB_WDQS3
D15
DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3
C20 AD3
DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3
W4 QSB#[7..0]
C E14 C16 VMB_DQ39 AD5 AC4 VMB_WDQS4 C
DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 VMB_DQ40 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 VMB_WDQS5
F14 C12 AF1 AH3
DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 VMB_DQ41 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 VMB_WDQS6
D13 J11 AF3 AJ8
DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 VMB_DQ42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 VMB_WDQS7
F12 F8 AF6 AM3
DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 VMB_DQ43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 AG4
DQA1_11/DQA_43 VMB_DQ44 DQB1_11/DQB_43
D11 J21 AH5 T7 VMB_ODT0 19
DQA1_12/DQA_44 ADBIA0/ODTA0 VMB_DQ45 DQB1_12/DQB_44 ADBIB0/ODTB0
F10 G19 AH6 W7 VMB_ODT1 19
DQA1_13/DQA_45 ADBIA1/ODTA1 VMB_DQ46 DQB1_13/DQB_45 ADBIB1/ODTB1
A10 AJ4
DQA1_14/DQA_46 VMB_DQ47 DQB1_14/DQB_46 VMB_CLKP0
C10 H27 AK3 L9 VMB_CLKP0 19
DQA1_15/DQA_47 CLKA0 VMB_DQ48 DQB1_15/DQB_47 CLKB0 VMB_CLKN0
G13 G27 AF8 L8 VMB_CLKN0 19
DQA1_16/DQA_48 CLKA0B VMB_DQ49 DQB1_16/DQB_48 CLKB0B
H13 AF9
DQA1_17/DQA_49 VMB_DQ50 DQB1_17/DQB_49 VMB_CLKP1
J13 J14 AG8 AD8 VMB_CLKP1 19
DQA1_18/DQA_50 CLKA1 VMB_DQ51 DQB1_18/DQB_50 CLKB1 VMB_CLKN1
H11 H14 AG7 AD7 VMB_CLKN1 19
DQA1_19/DQA_51 CLKA1B VMB_DQ52 DQB1_19/DQB_51 CLKB1B
G10 AK9
DQA1_20/DQA_52 VMB_DQ53 DQB1_20/DQB_52 VMB_RAS0#
G8 K23 AL7 T10 VMB_RAS0# 19
DQA1_21/DQA_53 RASA0B VMB_DQ54 DQB1_21/DQB_53 RASB0B VMB_RAS1#
K9 K19 AM8 Y10 VMB_RAS1# 19
DQA1_22/DQA_54 RASA1B VMB_DQ55 DQB1_22/DQB_54 RASB1B
K10 AM7
DQA1_23/DQA_55 VMB_DQ56 DQB1_23/DQB_55 VMB_CAS0#
G9 K20 AK1 W10 VMB_CAS0# 19
+1.5V_GPU DQA1_24/DQA_56 CASA0B VMB_DQ57 DQB1_24/DQB_56 CASB0B VMB_CAS1#
A8 K17 AL4 AA10 VMB_CAS1# 19
DQA1_25/DQA_57 CASA1B +1.5V_GPU VMB_DQ58 DQB1_25/DQB_57 CASB1B
C8 AM6
DQA1_26/DQA_58 VMB_DQ59 DQB1_26/DQB_58 VMB_CS0#
E8 K24 AM1 P10 VMB_CS0# 19
DQA1_27/DQA_59 CSA0B_0 VMB_DQ60 DQB1_27/DQB_59 CSB0B_0
A6 K27 AN4 L10
DQA1_28/DQA_60 CSA0B_1 VMB_DQ61 DQB1_28/DQB_60 CSB0B_1
C6 AP3
R168 DQA1_29/DQA_61 VMB_DQ62 DQB1_29/DQB_61 VMB_CS1#
E6 M13 AP1 AD10 VMB_CS1# 19
SW@40.2/F_4 DQA1_30/DQA_62 CSA1B_0 R174 VMB_DQ63 DQB1_30/DQB_62 CSB1B_0
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1B_1 SW@40.2/F_4 DQB1_31/DQB_63 CSB1B_1
MVREFDA L18 K21 U10 VMB_CKE0
MVREFDA CKEA0 CKEB0 VMB_CKE0 19
MVREFSA L20 J20 MVREFDB Y12 AA11 VMB_CKE1
MVREFSA CKEA1 MVREFDB CKEB1 VMB_CKE1 19
MVREFSB AA12
SW@100/F_4

SW@.1u/10V_4

R160 *SW@240/F_4 L27 MVREFSB VMB_WE0#


K26 N10

SW@100/F_4

SW@.1u/10V_4
MEM_CALRN0 WEA0B WEB0B VMB_WE0# 19
R146 SW@240/F_4 N12 L15 +3V_D R117 *SW@10K_4 AB11 VMB_WE1#
MEM_CALRN1 WEA1B WEB1B VMB_WE1# 19

C341
R114 *SW@240/F_4 AG12
MEM_CALRN2
R162

C307

R176
+1.5V_GPU
R155 SW@240/F_4 M12 R109 SW@5.1K_4 TESTEN VMB_MA13
GDDR5

H23 AD28 T8 Rb Ra

GDDR5
R150 *SW@240/F_4 M27 MEM_CALRP1 MAA0_8 TESTEN MAB0_8
J19 W8
R48 *SW@240/F_4 AH12 MEM_CALRP0 MAA1_8 MAB1_8 R47 R41
AK10
MEM_CALRP2 CLKTESTA
AL10 AH11 MEM_RST# 19
+1.5V_GPU CLKTESTB DRAM_RST
B B
+1.5V_GPU R74 R73 SW@10_4 SW@51_4
TP1 AL31
RSVD

*SW@0_4

*SW@0_4
C46 R51 C42
R163
SW@40.2/F_4 SW@SEYMOUR_M2 R172 SW@SEYMOUR_M2 *SW@68p/50V_4 SW@4.99K_4 SW@150P/25V_4
SW@40.2/F_4
Rc C
For PARK
SW@100/F_4

SW@.1u/10V_4

MEM_CALRNP0
SW@100/F_4

SW@.1u/10V_4
R156

C309

C Ra Rb Rc
R177

C342

MEM_CALRNP1 stuff
120pF 51 ohm 10 ohm 5K ohm
MEM_CALRNP2

DDR3/GDDR3 Memory Stuff Option


GDDR5 GDDR3 DDR3

+1.5V_VGA 1.5V 1.8V/1.5V 1.5V

Ra 40.2R 40.2R 40.2R


A A

Rb 100R 100R 100R

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
Seymour-MEM 3/6 1A

Date: Monday, November 01, 2010 Sheet 15 of 41


5 4 3 2 1
5 4 3 2 1

U15E
U15F
18
+1.5V_GPU MEM I/O +1.8V_GPU
For DDR3, MVDDQ = 1.5V (1.5A) PCIE (1.8V@400mA PCIE_VDDR) 180 ohm/1.5A
AB39
E39
PCIE_VSS#1 GND#1
A3
A37
PCIE_VDDR_1.8 L23 SW@HCB1608KF-181T15/180ohm/1.5A_6 PCIE_VSS#2 GND#2
AC7 AA31 F34 AA16
VDDR1#1 PCIE_VDDR#1 PCIE_VSS#3 GND#3
AD11 AA32 F39 AA18
VDDR1#2 PCIE_VDDR#2 PCIE_VSS#4 GND#4
AF7 AA33 G33 AA2
C285 C317 C586 C261 C591 VDDR1#3 PCIE_VDDR#3 C161 C159 C158 C212 C162 C160 C186 C172 PCIE_VSS#5 GND#5
AG10 AA34 G34 AA21
SW@10U/6.3V_6 SW@10U/6.3V_6 VDDR1#4 PCIE_VDDR#4 SW@.1u/10V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@10U/6.3V_6 PCIE_VSS#6 GND#6
AJ7 V28 H31 AA23
SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 VDDR1#5 PCIE_VDDR#5 SW@.1u/10V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 PCIE_VSS#7 GND#7
AK8 W29 H34 AA26
D VDDR1#6 PCIE_VDDR#6 PCIE_VSS#8 GND#8 D
AL9 W30 H39 AA28
VDDR1#7 PCIE_VDDR#7 PCIE_VSS#9 GND#9
G11 Y31 J31 AA6
VDDR1#8 PCIE_VDDR#8 PCIE_VSS#10 GND#10
G14 J34 AB12
VDDR1#9 PCIE_VSS#11 GND#11
G17 K31 AB15
VDDR1#10 +1V_GPU PCIE_VSS#12 GND#12
G20 G30 K34 AB17
C139 C325 C327 C243 C331 C314 G23
VDDR1#11 PCIE_VDDC#1
G31 (1.0V@1.1A PCIE_VDDC)
C06 K39
PCIE_VSS#13 GND#13
AB20
SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 VDDR1#12 PCIE_VDDC#2 PCIE_VSS#14 GND#14
G26 H29 L31 AB22
SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 VDDR1#13 PCIE_VDDC#3 PCIE_VSS#15 GND#15
G29 H30 L34 AB24
VDDR1#14 PCIE_VDDC#4 PCIE_VSS#16 GND#16
H10 J29 M34 AB27
VDDR1#15 PCIE_VDDC#5 C304 C287 C278 C254 C288 C297 C222 C306 PCIE_VSS#17 GND#17
J7 J30 M39 AC11
VDDR1#16 PCIE_VDDC#6 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@10U/6.3V_6 PCIE_VSS#18 GND#18
J9 L28 N31 AC13
VDDR1#17 PCIE_VDDC#7 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 PCIE_VSS#19 GND#19
K11 M28 N34 AC16
VDDR1#18 PCIE_VDDC#8 PCIE_VSS#20 GND#20
K13 N28 P31 AC18
VDDR1#19 PCIE_VDDC#9 PCIE_VSS#21 GND#21
K8 R28 P34 AC2
C312 C300 C333 C328 C215 C105 VDDR1#20 PCIE_VDDC#10 PCIE_VSS#22 GND#22
L12 T28 P39 AC21
SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 VDDR1#21 PCIE_VDDC#11 PCIE_VSS#23 GND#23
L16 U28 R34 AC23
SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 VDDR1#22 PCIE_VDDC#12 +VGPU_CORE PCIE_VSS#24 GND#24
L21 T31 AC26
VDDR1#23 PCIE_VSS#25 GND#25
L23
VDDR1#24
(30A or more) T34
PCIE_VSS#26 GND#26
AC28
L26 AA15 T39 AC6
VDDR1#25 CORE VDDC#1 PCIE_VSS#27 GND#27
L7 AA17 U31 AD15
VDDR1#26 VDDC#2 PCIE_VSS#28 GND#28
M11 AA20 U34 AD17
VDDR1#27 VDDC#3 C277 C114 C200 C143 C211 C182 C140 C241 C204 C151 PCIE_VSS#29 GND#29
N11 AA22 V34 AD20
C276 C332 C313 C308 C330 VDDR1#28 VDDC#4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 PCIE_VSS#30 GND#30
P7 AA24 V39 AD22
SW@.1u/10V_4 SW@.1u/10V_4 VDDR1#29 VDDC#5 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 PCIE_VSS#31 GND#31
R11 AA27 W31 AD24
SW@1U/6.3V_4 SW@.1u/10V_4 SW@.1u/10V_4 VDDR1#30 VDDC#6 PCIE_VSS#32 GND#32
U11 AB16 W34 AD27
VDDR1#31 VDDC#7 PCIE_VSS#33 GND#33
U7 AB18 Y34 AD9
VDDR1#32 VDDC#8 PCIE_VSS#34 GND#34
Y11 AB21 Y39 AE2
VDDR1#33 VDDC#9 PCIE_VSS#35 GND#35
Y7 AB23 AE6
VDDR1#34 VDDC#10 GND#36
AB26 AF10
VDDC#11 GND#37
AB28 AF16
VDDC#12 C126 C218 C171 C103 C177 C121 C267 C227 C173 C256 GND#38
AC17 AF18
VDDC#13 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 GND#39
AC20 AF21

(1.8V@110mA VDD_CT)
LEVEL
TRANSLATION
VDDC#14
VDDC#15
AC22
AC24
SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4
F15
GND GND#40
GND#41
AG17
AG2
VDDC#16 GND#100 GND#42

POWER
+1.8V_GPU L12 SW@SBY100505T-121Y-N/0.3A/120ohm_4 VDDC_CT AF26 AC27 F17 AG20
VDD_CT#1 VDDC#17 GND#101 GND#43
AF27 AD18 F19 AG22
VDD_CT#2 VDDC#18 GND#102 GND#44
AG26 AD21 F21 AG6
C58 C61 C66 VDD_CT#3 VDDC#19 GND#103 GND#45
C AG27 AD23 F23 AG9 C
SW@1U/6.3V_4 VDD_CT#4 VDDC#20 GND#104 GND#46
AD26 F25 AH21
SW@10U/6.3V_6 SW@.1u/10V_4 VDDC#21 C263 C184 C124 C281 C150 C152 C258 C210 C120 C146 GND#105 GND#47
AF17 F27 AJ10
I/O VDDC#22 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 GND#106 GND#48
(3.3V@60mA)) VDDC#23
AF20 F29
GND#107 GND#49
AJ11
+3V_D AF23 AF22 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 F31 AJ2
VDDR3#1 VDDC#24 GND#108 GND#50
AF24 AG16 F33 AJ28
VDDR3#2 VDDC#25 GND#109 GND#51
AG23 AG18 F7 AJ6
C106 C118 C101 C102 VDDR3#3 VDDC#26 GND#110 GND#52
AG24 AG21 F9 AK11
SW@1U/6.3V_4 SW@1U/6.3V_4 VDDR3#4 VDDC#27 GND#111 GND#53
AH22 G2 AK31
SW@10U/6.3V_6 SW@1U/6.3V_4 VDDC#28 GND#112 GND#54
AH27 G6 AK7
VDDC#29 C104 C107 C180 C220 C265 C111 GND#113 GND#55
AF13 AH28 H9 AL11
VDDR4#4 VDDC#30 SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 GND#114 GND#56
AF15 M26 J2 AL14
120 ohm/300mA VDDR4#5 VDDC#31 SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 GND#115 GND#57
AG13 N24 J27 AL17
L11 SW@SBY100505T-121Y-N/0.3A/120ohm_4
VDDR4 VDDR4#7 VDDC#32 GND#116 GND#58
+1.8V_GPU AG15 N27 J6 AL2
VDDR4#8 VDDC#33 GND#117 GND#59
R18 J8 AL20
VDDC#34 GND#118 GND#60
R21 K14 AL21 PX_EN 17
C55 C57 VDDC#35 GND#119 GND#61
AD12 R23 K7 AL23
SW@.1u/10V_4 VDDR4#1 VDDC#36 GND#120 GND#62 R82
AF11
VDDR4#2 VDDC#37
R26 Ra should be removed by PX 4.0 ( BACO mode) L11
GND#121 GND#63
AL26
SW@1U/6.3V_4 AF12 T17 L17 AL32
VDDR4#3 VDDC#38 GND#122 GND#64 *SW@0_4
AG11 T20 L2 AL6
VDDR4#6 VDDC#39 GND#123 GND#65
T22 L22 AL8
VDDC#40 R31 GND#124 GND#66
T24 L24 AM11
VDDC#41
T27
Ra +VGPU_CORE L6
GND#125 GND#67
AM31
VDDC#42 GND#126 GND#68
U16 M17 AM9
T86 VDDC#43 SWS@0_4 GND#127 GND#69
M20 U18 M22 AN11
T92 NC_VDDRHA VDDC#44 GND#128 GND#70
M21 U21 M24 AN2 BACO reference schematics for detail
NC_VSSRHA VDDC#45 GND#129 GND#71
U23 N16 AN30
VDDC#46 GND#130 GND#72
U26 N18 AN6
T57 VDDC#47 GND#131 GND#73
V12 V17 BIF_VDDC N2 AN8
T60 NC_VDDRHB VDDC#48 GND#132 GND#74
U12 V20 N21 AP11
NC_VSSRHB VDDC#49 GND#133 GND#75
V22 N23 AP7
VDDC#50 GND#134 GND#76
VDDC#51
V24 55mA @ 1V in BCAO mode N26
GND#135 GND#77
AP9
V27 N6 AR5
VDDC#52 GND#136 GND#78
Y16 R15 AW34
120 ohm/300mA PLL VDDC#53 GND#137 GND#79
(1.8V@40mA PCIE_PVDD) VDDC#54
Y18 R17
GND#138 GND#80
B11
+1.8V_GPU L50 SW@SBY100505T-121Y-N/0.3A/120ohm_4 PCIE_PVDD AB37 Y21 R2 B13
PCIE_PVDD VDDC#55 GND#139 GND#81
Y23 R20 B15
MPV18 VDDC#56 GND#140 GND#82
H7 Y26 R22 B17
B
C536 C543 C549 MPV18#1 VDDC#57 GND#141 GND#83 B
H8 Y28 R24 B19
SW@1U/6.3V_4 MPV18#2 VDDC#58 GND#142 GND#84
R27 B21
SW@10U/6.3V_6 SW@.1u/10V_4 GND#143 GND#85
R6 B23
SPV18 GND#144 GND#86
AM10 T11 B25
120 ohm/300mA SPV18 GND#145 GND#87
(1.8V@150mA MPV18) VDDCI#1
AA13 T13
GND#146 GND#88
B27
+1.8V_GPU L31 SW@SBY100505T-121Y-N/0.3A/120ohm_4 SPV10 AN9 AB13 T16 B29
SPV10 VDDCI#2 GND#147 GND#89
AC12 T18 B31
VDDCI#3 C283 C257 C286 C226 C292 GND#148 GND#90
AN10 AC15 T21 B33
C337 C324 C329 SPVSS VDDCI#4 SW@1U/6.3V_4 SW@1U/6.3V_4 GND#149 GND#91
AD13 T23 B7
SW@1U/6.3V_4 VDDCI#5 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 GND#150 GND#92
AD16 T26 B9
SW@10U/6.3V_6 SW@.1u/10V_4 VDDCI#6 GND#151 GND#93
M15 U15 C1
VDDCI#7 +VGPU_CORE GND#153 GND#94
M16 U17 C39
VOLTAGE VDDCI#8 GND#154 GND#95
M18 U2 E35
120 ohm/300mA SENESE VDDCI#9 GND#155 GND#96
(1.8V@75mA SPV18) VDDCI#10
M23 U20
GND#156 GND#97
E5
L10 SW@SBY100505T-121Y-N/0.3A/120ohm_4 N13 +3V U22 F11
+1.8V_GPU VDDCI#11 GND#157 GND#98
T43 AF28 N15 U24 F13
FB_VDDC VDDCI#12 C209 C264 C295 C302 C253 GND#158 GND#99
N17 U27
C45 C49 VDDCI#13 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 GND#159
N20 U6

1
SW@.1u/10V_4 T45 VDDCI#14 SW@1U/6.3V_4 SW@1U/6.3V_4 GND#160
AG28 N22 V11
SW@10U/6.3V_6 FB_VDDCI ISOLATED VDDCI#15 GND#161
R12 V16
CORE I/O VDDCI#16 R13 R35 V18
GND#163
PowerXpress control signal for Park only
T44 VDDCI#17 GND#164
AH29 R16 2 V21 If not used, can be disconnected.
120 ohm/300mA FB_GND VDDCI#18 *SW@0_6 GND#165
(1.0V@120mA SPV10) VDDCI#19
T12 V23
GND#166 PX_EN = LOW, turn on
+1V_GPU L9 SW@SBY100505T-121Y-N/0.3A/120ohm_4 T15 V26
VDDCI#20 C157 C193 C293 Q13 SW@AO3413 GND#167 PX_EN = HIGH, turn off
VDDCI#21
V15
SW@10U/6.3V_6
1A W2
GND#168 PX_EN is used to turn ON/OFF some
Y13 W6

3
C44 C48 VDDCI#22 SW@10U/6.3V_6 SW@10U/6.3V_6 GND#169 regulators for PowerXpress mode. An
+3V_D_EXT Y15
SW@.1u/10V_4 GND#170 output high ‘3.3V’ will turn the regulators
Y17
SW@10U/6.3V_6 SW@SEYMOUR_M2 C35 C32 C33 GND#171 OFF. An output low ‘0V’ will turn the
Y20
GND#172 regulators ON. PX_EN outputs low (0V)
Y22 A39
SW@1U/6.3V_4 GND#173 VSS_MECH#1 by default.
Y24 AW1
SW@10U/6.3V_6 SW@.1u/10V_4 GND#174 VSS_MECH#2 If this signal is unused, it can be NC (not
Y27 AW39
+3V GND#175 VSS_MECH#3
U13
GPU power enable GPU all PWROK V13
GND#152
connected) or connected to ground.
GPU +3V_D power GND#162
+3V +3V +3V SW@SEYMOUR_M2
R52
A Change from 100K to 4.7K SW@10K_4 R32 A
dGPU_VRON

1
2ms R36 R39 SW@0_6
dGPU_PWREN SW@4.7K_4 SW@4.7K_4
dGPU_PWROK 8
R42 R37
3

SW@10K_4 2
Q17 dGPU_PWREN R38 *SW@0_6
SW@2N7002K SW@0_4
9 dGPU_PWR_EN dGPU_PWREN 38,39

3
SW@BAS316 D5 2 Q14 *SW@.1u/10V_4 1A
8 dGPU_VRON

3
3

*SW@BAS316 D4 R40 2
C39
+1.5V_GPU
*SW@0_4
C41
SW@DTC144EUA
Q15 C37 C40 C38
+3V_D
Quanta Computer Inc.
+1.8V_GPU 2
1

>1mS delay is required between all MXM power rail stable SW@.1u/10V_4
PROJECT : ZQG
1

and MXM_PWREN(enables the module internal power) SW@1U/6.3V_4 *SW@1u/6.3V_4


Q16 *SW@.1u/6.3V_6 *SW@.1u/10V_4 Size Document Number Rev
1

SW@PDTC143TT
Seymour (PWR/GND)4/6 1A

Date: Monday, November 01, 2010 Sheet 16 of 41


5 4 3 2 1
5 4 3 2 1

DPAB_VDD18
U15H

DP C/D POWER DP A/B POWER DPAB_VDD18


(1.8V@300mA DPAB_VDD18) L15 SW@BLM15BB121SS1
+1.8V_GPU
19
AP20 AN24
DPC_VDD18#1 DPA_VDD18#1
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
C72 C78 C64
DPAB_VDD10 DPAB_VDD10 SW@.1u/10V_4 SW@1U/6.3V_4 SW@10U/6.3V_6

AP13 DPC_VDD10#1 DPA_VDD10#1 AP31


AT13 AP32
DPC_VDD10#2 DPA_VDD10#2

D AN17 AN27 D
DPC_VSSR#1 DPA_VSSR#1
AP16 AP27
DPC_VSSR#2 DPA_VSSR#2
AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
AW14 DPC_VSSR#4 DPA_VSSR#4 AW24
AW16 DPC_VSSR#5 DPA_VSSR#5 AW26

DPAB_VDD18 DPAB_VDD18

AP22 AP25 C07


DPD_VDD18#1 DPB_VDD18#1
AP23 DPD_VDD18#2 DPB_VDD18#2 AP26
DPAB_VDD10 DPAB_VDD10 +1V_GPU
(1.0V@220mA DPAB_VDD10) L16 SW@BLM15BB121SS1
NOTE : DPD is NA on Park,Robson and Seymour. AP14 DPD_VDD10#1 DPB_VDD10#1 AN33
AP15 AP33
DPD_VDD10#2 DPB_VDD10#2
C73 C79 C76
SW@.1u/10V_4 SW@1U/6.3V_4 SW@10U/6.3V_6
AN19 AN29
DPD_VSSR#1 DPB_VSSR#1
AP18 AP29
DPD_VSSR#2 DPB_VSSR#2
AP19 AP30
DPD_VSSR#3 DPB_VSSR#3
AW20 AW30
DPD_VSSR#4 DPB_VSSR#4
AW22 AW32
DPD_VSSR#5 DPB_VSSR#5
DP mode
(1.8V@300mA DPEF_VDD18)
R92 SW@150/F_4 DPCD_CALR AW18 AW28 DPAB_CALR R72 SW@150/F_4
LVDS mode DPCD_CALR DPAB_CALR
+1.8V_GPU (1.8V@440mA DPEF_VDD18) DPEF_VDD18 DPAB_VDD18
DP E/F POWER DP PLL POWER
L47 SW@BLM15BB121SS1 AH34 AU28
DPE_VDD18#1 DPA_PVDD
AJ34 DPE_VDD18#2 DPA_PVSS AV27
C505 C506 C504
SW@10U/6.3V_6 SW@1U/6.3V_4 SW@.1u/10V_4 DPEF_VDD10
C C
AL33 AV29
DPE_VDD10#1 DPB_PVDD
AM33 DPE_VDD10#2 DPB_PVSS AR28

AN34 AU18
DPE_VSSR#1 DPC_PVDD
AP39 AV17
DPE_VSSR#2 DPC_PVSS
AR39
DPE_VSSR#3
AU37 DPE_VSSR#4
AW35
DPE_VSSR#5
AV19
DPEF_VDD18 DPD_PVDD
DPD_PVSS AR18
C07 DP mode AF34 DPEF_VDD18
DPF_VDD18#1
(1.0V@220mA DPEF_VDD10) AG34
DPF_VDD18#2
AM37
+1V_GPU LVDS mode DPEF_VDD10 DPE_PVDD
AN38
DPE_PVSS
(1.0V@240mA DPEF_VDD10)
L8 SW@BLM15BB121SS1 AK33
DPF_VDD10#1
AK34
C43 C50 C47 DPF_VDD10#2
AL38
SW@10U/6.3V_6 SW@1U/6.3V_4 SW@.1u/10V_4 NC_DPF_PVDD
AM35
NC_DPF_PVSS
AF39
DPF_VSSR#1
AH39
DPF_VSSR#2
AK39
DPF_VSSR#3
AL34
DPF_VSSR#4
AM34
DPF_VSSR#5

R313 SW@150/F_4 DPEF_CALR AM39


DPEF_CALR

B SW@SEYMOUR_M2 B

Support BACO Mode +5V


+3V +5V C07 Q4 Q8
PX4@2N7002 PX4@2N7002
BACO MODE : Board ID / BACO part / Del Ra C29
R33 +1V_GPU 1 3 3 1
R34 PX4@1K_4
5

PX4@0.1U/10V_4 PX4@1K_4
38,39 PG_GPUIO_EN 2 PX_EN##

2
4 BACO_EN PX_EN# PX_EN# BIF_VDDC
PX_MODE 1

38,39 SB_PWRGD_IN U4
3

PX4@TC7SH08FU
Q11 Q10
3

+3V
PX4@2N7002 PX4@2N7002

R28 +3V 2 Q6 2 Q12 1 3 3 1 BIF_VDDC


+VGPU_CORE
PX4@10K_4 C673 C36
PX4@2N7002 PX4@2N7002 PX4@10U/6.3VS_8

2
PX_EN##
1

1
5

R29 PX4@0.1U/10V_4
2
R27 4 PX_MODE Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra)
PX_MODE 38,39
PX4@0_4 1
A 2. BACO Support: Refer to the BACO reference A
*SPE@0_4 U25
schematics/Application note for detail about BIF_VDDC Rail
3
3

PX4@TC7SH08FU
if BACO is Supported (Uninstall Ra)
R25
Q5 2 PX_EN 16
C17
R26 *SPE@0_4
PX4@2N7002

Quanta Computer Inc.


1

PX4@5.11K

PX_EN = 0, for Normal Operation PROJECT : ZQG


PX_EN = 1, for BACO MODE
Size Document Number Rev
Seymour (DP_PWR/GND)5/6 1A

Date: Monday, November 01, 2010 Sheet 17 of 41


5 4 3 2 1
5 4 3 2 1

20
PIN STRAPS Memory Aperture size
CONFIGURATION STRAPS
GPIO[13:11] Size ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
+3V_D THEY MUST NOT CONFLICT DURING RESET
R77 *SW@10K/F_4
14 GPU_GPIO13 000 128MB STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS DEFAULT REMARK
R78 *SW@10K/F_4
14 GPU_GPIO12
001 256MB
R93 SW@10K/F_4 TX_PWRS_ENB GPIO0 0 = 50% TX OUTPUT SWING 0
D 14 GPU_GPIO11 D
1 = FULL TX OUTPUT SWING
010 64MB
TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 0
R91 *SW@10K/F_4 0 = TX DE-EMPHASIS DISABLED
14 GPU_GPIO0
011 32MB 1 = TX DE-EMPHASIS ENABLED
R81 *SW@10K/F_4 ENABLE EXTERNAL BIOS ROM
14 GPU_GPIO1
BIOS_ROM_EN GPIO_22_ROMCSB 0 = DISABLE 0
C02 : to slove the Power DVD issue , setting size to 256MB 1 = ENABLE

ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT


R83 *SW@10K/F_4 NUMONYX M25P10A : 101 000 See ROM table
14 GPIO3_SMBDAT
R64 *SW@10K/F_4
14 GPIO4_SMBCLK
BIF_GEN2_EN_A GPIO2 0 = PCIE DEVICE AS 2.5GT/S CAPABLE 0
ROM Table 1 = PCIE DEVICE AS 5GT/S CAPABLE
R57 *SW@10K/F_4
14 SCS#_GPIO22
EXT_HSYNC EXT_VSYNC GPIO_8_ROMSO GPIO8
Discription H2SYNC H2SYNC Reserved Only 0
R75 *SW@10K/F_4 GPIO_21_BB_EN GPIO21
14 GPU_GPIO2
0 0 No Audio AUD[1:0]
R112 *SW@10K/F_4 AUD[1] HSYNC 00: NO AUDIO FUNCTION.
14 EXT_HSYNC
R118 *SW@10K/F_4 0 1 Any one by dectec AUD[0] VSYNC
01: AUDIO FOR DISPLAYPORT AND HDMI IF
See Audio table
14 EXT_VSYNC ADAPTER IS DETECTED. 00
10: AUDIO FOR DISPLAYPORT ONLY.

R56 *SW@10K/F_4 1 0 DP only 11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.
14 SIN_GPIO9
R110 *SW@10K/F_4
14 V2SYNC
1 1 Both DP & HDMI GPIO_9_ROMSI GPIO9 0 = VGA controller capacity enable 0
C C

C08 : to slove the HDMI issue , remove R112,R118 from BOMs VIP_DEVICE_STRAP_ENA V2SYNC 0 = DRIVER would ignore the value sample on VHAD_0 during RESET. 0

DDR3 Memory Aperture size


RAM_STRAP2 RAM_STRAP1 RAM_STRAP0
Vendor Vendor P/N STN B/S P/N Total Memory Size DVPDATA_2 DVPDATA_1 DVPDATA_0
ZQE/G

H5TQ1G63DFR-11C AKD5LZWTW05 (64M*16) 1GB ( 900 Mhz) 1 1 0 V


Hynix H5TQ1G63BFR-12C AKD5LZGTW04 (64M*16) 1GB ( 800 Mhz) 1 0 0 V
B B
H5TQ2G63BFR-12C AKD5MGGTW03 (128M*16) 2GB 1 1 1 V
K4W1G1646G-BC11 AKD5EGGT503 (64M*16) 1GB 0 1 0
Samsung K4W1G1646E-HC12 AKD5LGGT506 (64M*16) 1GB ( 800 Mhz) 0 0 0 V
K4W2G1646B-HC12 AKD5MGGT500 2GB 0 0 1
Thermal Sensor +3V_D_EXT

+3V_D_EXT
R80 R94

SW@10K_4 SW@10K_4 C74 SW@.1u/10V_4 +1.8V_GPU

U5
R44 SWS@10K/F_4
14 RAM_STRAP2
A
31 MXM_SMCLK12 8 SCLK VCC 1 GPU_D+ 14 R50 *SWS@10K/F_4 RAM_STRAP2 SET DDR3 Vendor A
C65
31 MXM_SMDATA12 7
SDA DXP
2
RAM_STRAP[1:0] SET SIZE.
6 3 SW@2.2n/50V_4
14 ALT#_GPIO17 ALERT# DXN R46 SWS@10K/F_4
GPU_D- 14 14 RAM_STRAP1
31 VGA_THERM# 4 5
OVERT# GND R45 *SWS@10K/F_4

SW@G780-1P81U(MSOP)
Quanta Computer Inc.
R43 *SWS@10K/F_4
PROJECT : ZQG
Address ID: 98H 14 RAM_STRAP0
R49 SWS@10K/F_4 Size Document Number Rev
Seymour Strip/Thermal 6/6 1A

Date: Monday, November 01, 2010 Sheet 18 of 41


5 4 3 2 1
5 4 3 2 1

CHANNEL B: 512MB DDR3 (64M*16*4pcs)


15 VMB_DQ[63..0]

15 VMB_DM[7..0]

15 VMB_RDQS[7..0]
VMB_DQ[63..0]

VMB_DM[7..0]

VMB_RDQS[7..0]

VMB_WDQS[7..0]
QSA[7..0]
U7 U19
U6 U13
21
15 VMB_WDQS[7..0] QSA#[7..0]
VREFC_VMB3 M8 E3 VMB_DQ63 VREFC_VMB4 M8 E3 VMB_DQ51
VREFC_VMB1 VMB_DQ5 VREFC_VMB2 VMB_DQ9 VREFD_VMB3 VREFCA DQL0 VMB_DQ57 VREFD_VMB4 VREFCA DQL0 VMB_DQ52
M8 E3 M8 E3 H1 F7 H1 F7
VREFD_VMB1 VREFCA DQL0 VMB_DQ3 VREFD_VMB2 VREFCA DQL0 VMB_DQ13 VREFDQ DQL1 VMB_DQ60 VREFDQ DQL1 VMB_DQ50
H1 F7 H1 F7 F2 F2
VREFDQ DQL1 VMB_DQ4 VREFDQ DQL1 VMB_DQ11 VMB_MA0 DQL2 VMB_DQ58 VMB_MA0 DQL2 VMB_DQ53
F2 F2 N3 F8 N3 F8
15
15
VMB_MA0
VMB_MA1
VMB_MA0
VMB_MA1
VMB_MA2
N3
P7
A0
A1
DQL2
DQL3
DQL4
F8
H3
VMB_DQ2
VMB_DQ7
VMB_DQ0 0
VMB_MA0
VMB_MA1
VMB_MA2
N3
P7
A0
A1
DQL2
DQL3
DQL4
F8
H3
VMB_DQ12
VMB_DQ10
VMB_DQ14
1 VMB_MA1
VMB_MA2
VMB_MA3
P7
P3
A0
A1
A2
DQL3
DQL4
DQL5
H3
H8
VMB_DQ62
VMB_DQ59
VMB_DQ61 7
VMB_MA1
VMB_MA2
VMB_MA3
P7
P3
A0
A1
A2
DQL3
DQL4
DQL5
H3
H8
VMB_DQ49
VMB_DQ54
VMB_DQ48
6
15 VMB_MA2 P3 H8 P3 H8 N2 G2 N2 G2
VMB_MA3 A2 DQL5 VMB_DQ6 VMB_MA3 A2 DQL5 VMB_DQ8 VMB_MA4 A3 DQL6 VMB_DQ56 VMB_MA4 A3 DQL6 VMB_DQ55
15 VMB_MA3 N2 G2 N2 G2 P8 H7 P8 H7
VMB_MA4 A3 DQL6 VMB_DQ1 VMB_MA4 A3 DQL6 VMB_DQ15 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7
15 VMB_MA4 P8 H7 P8 H7 P2 P2
D
VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7 VMB_MA6 A5 VMB_MA6 A5 D
15 VMB_MA5 P2 P2 R8 R8
VMB_MA6 A5 VMB_MA6 A5 VMB_MA7 A6 VMB_DQ34 VMB_MA7 A6 VMB_DQ45
15 VMB_MA6 R8 R8 R2 D7 R2 D7
VMB_MA7 A6 VMB_DQ24 VMB_MA7 A6 VMB_DQ21 VMB_MA8 A7 DQU0 VMB_DQ37 VMB_MA8 A7 DQU0 VMB_DQ41
15 VMB_MA7 R2 D7 R2 D7 T8 C3 T8 C3
VMB_MA8 A7 DQU0 VMB_DQ31 VMB_MA8 A7 DQU0 VMB_DQ19 VMB_MA9 A8 DQU1 VMB_DQ33 VMB_MA9 A8 DQU1 VMB_DQ47
T8 C3 T8 C3 R3 C8 R3 C8
15
15
VMB_MA8
VMB_MA9
VMB_MA9
VMB_MA10
R3
L7
A8
A9
DQU1
DQU2
C8
C2
VMB_DQ25
VMB_DQ29
3
VMB_MA9
VMB_MA10
R3
L7
A8
A9
DQU1
DQU2
C8
C2
VMB_DQ23
VMB_DQ17
VMB_MA10
VMB_MA11
L7
R7
A9
A10/AP
DQU2
DQU3
C2
A7
VMB_DQ36
VMB_DQ32
4
VMB_MA10
VMB_MA11
L7
R7
A9
A10/AP
DQU2
DQU3
C2
A7
VMB_DQ42
VMB_DQ44 5
15
15
15
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA11
VMB_MA12
VMB_MA13
R7
N7
A10/AP
A11
A12/BC
DQU3
DQU4
DQU5
A7
A2
VMB_DQ26
VMB_DQ30
VMB_DQ28
VMB_MA11
VMB_MA12
VMB_MA13
R7
N7
A10/AP
A11
A12/BC
DQU3
DQU4
DQU5
A7
A2
VMB_DQ20
VMB_DQ16
VMB_DQ22
2 VMB_MA12
VMB_MA13
N7
T3
A11
A12/BC
A13
DQU4
DQU5
DQU6
A2
B8
VMB_DQ39
VMB_DQ35
VMB_DQ38
VMB_MA12
VMB_MA13
N7
T3
A11
A12/BC
A13
DQU4
DQU5
DQU6
A2
B8
VMB_DQ40
VMB_DQ46
VMB_DQ43
15 VMB_MA13 T3 B8 T3 B8 T7 A3 T7 A3
A13 DQU6 VMB_DQ27 A13 DQU6 VMB_DQ18 A14 DQU7 A14 DQU7
T7 A3 T7 A3 M7 M7
A14 DQU7 A14 DQU7 A15 +1.5V_GPU A15 +1.5V_GPU
M7 M7
A15 +1.5V_GPU A15 +1.5V_GPU
VMB_BA0 M2 B2 VMB_BA0 M2 B2
VMB_BA0 VMB_BA0 VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2
15 VMB_BA0 M2 B2 M2 B2 N8 D9 N8 D9
VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2 VMB_BA2 BA1 VDD#D9 VMB_BA2 BA1 VDD#D9
15 VMB_BA1 N8 D9 N8 D9 M3 G7 M3 G7
VMB_BA2 BA1 VDD#D9 VMB_BA2 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7
15 VMB_BA2 M3 G7 M3 G7 K2 K2
BA2 VDD#G7 BA2 VDD#G7 VDD#K2 VDD#K2
K2 K2 K8 K8
VDD#K2 VDD#K2 VDD#K8 VDD#K8
K8 K8 N1 N1
VDD#K8 VDD#K8 VMB_CLKP1 VDD#N1 VMB_CLKP1 VDD#N1
N1 N1 15 VMB_CLKP1 J7 N9 J7 N9
VMB_CLKP0 VDD#N1 VMB_CLKP0 VDD#N1 VMB_CLKN1 CK VDD#N9 VMB_CLKN1 CK VDD#N9
15 VMB_CLKP0 J7 N9 J7 N9 15 VMB_CLKN1 K7 R1 K7 R1
VMB_CLKN0 CK VDD#N9 VMB_CLKN0 CK VDD#N9 VMB_CKE1 CK VDD#R1 VMB_CKE1 CK VDD#R1
15 VMB_CLKN0 K7 R1 K7 R1 15 VMB_CKE1 K9 R9 K9 R9
VMB_CKE0 CK VDD#R1 VMB_CKE0 CK VDD#R1 CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU
15 VMB_CKE0 K9 R9 K9 R9
CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU
VMB_ODT1 K1 A1 VMB_ODT1 K1 A1
15 VMB_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_CS1# L2 A8 VMB_CS1# L2 A8
15 VMB_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 15 VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_CS0# L2 A8 VMB_CS0# L2 A8 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
15 VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 15 VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
15 VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 15 VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_WE1# L3 D2 VMB_WE1# L3 D2
15 VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 15 VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
VMB_WE0# L3 D2 VMB_WE0# L3 D2 E9 E9
15 VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9 VDDQ#E9
E9 E9 F1 F1
VDDQ#E9 VDDQ#E9 VMB_RDQS7 VDDQ#F1 VMB_RDQS6 VDDQ#F1
F1 F1 F3 H2 F3 H2
VMB_RDQS0 VDDQ#F1 VMB_RDQS1 VDDQ#F1 VMB_RDQS4 DQSL VDDQ#H2 VMB_RDQS5 DQSL VDDQ#H2
F3 H2 F3 H2 C7 H9 C7 H9
VMB_RDQS3 DQSL VDDQ#H2 VMB_RDQS2 DQSL VDDQ#H2 DQSU VDDQ#H9 DQSU VDDQ#H9
C7 H9 C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMB_DM7 E7 A9 VMB_DM6 E7 A9
VMB_DM0 VMB_DM1 VMB_DM4 DML VSS#A9 VMB_DM5 DML VSS#A9
E7 A9 E7 A9 D3 B3 D3 B3
VMB_DM3 DML VSS#A9 VMB_DM2 DML VSS#A9 DMU VSS#B3 DMU VSS#B3
D3 B3 D3 B3 E1 E1
DMU VSS#B3 DMU VSS#B3 VSS#E1 VSS#E1
C E1 E1 G8 G8 C
VSS#E1 VSS#E1 VMB_WDQS7 VSS#G8 VMB_WDQS6 VSS#G8
G8 G8 G3 J2 G3 J2
VMB_WDQS0 VSS#G8 VMB_WDQS1 VSS#G8 VMB_WDQS4 DQSL VSS#J2 VMB_WDQS5 DQSL VSS#J2
G3 J2 G3 J2 B7 J8 B7 J8
VMB_WDQS3 DQSL VSS#J2 VMB_WDQS2 DQSL VSS#J2 DQSU VSS#J8 DQSU VSS#J8
B7 J8 B7 J8 M1 M1
DQSU VSS#J8 DQSU VSS#J8 VSS#M1 VSS#M1
M1 M1 M9 M9
VSS#M1 VSS#M1 VSS#M9 VSS#M9
M9 M9 P1 P1
VSS#M9 VSS#M9 MEM_RST# VSS#P1 MEM_RST# VSS#P1
P1 P1 T2 P9 T2 P9
MEM_RST# VSS#P1 MEM_RST# VSS#P1 RESET VSS#P9 RESET VSS#P9
T2 P9 T2 P9 T1 T1
15 MEM_RST# RESET VSS#P9 RESET VSS#P9 VMB_ZQ3 VSS#T1 VMB_ZQ4 VSS#T1
T1 T1 L8 T9 L8 T9
VMB_ZQ1 VSS#T1 VMB_ZQ2 VSS#T1 ZQ VSS#T9 ZQ VSS#T9
L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9
B1 B1
VSSQ#B1 VSSQ#B1
B1 B1 B9 B9
VSSQ#B1 VSSQ#B1 R99 VSSQ#B9 R363 VSSQ#B9
B9 B9 D1 D1
R166 VSSQ#B9 R378 VSSQ#B9 VSSQ#D1 VSSQ#D1
D1 D1 SW@240/F_4 D8 SW@240/F_4 D8
VSSQ#D1 VSSQ#D1 VSSQ#D8 VSSQ#D8
SW@240/F_4 D8 SW@240/F_4 D8 E2 E2
VSSQ#D8 VSSQ#D8 VSSQ#E2 VSSQ#E2
E2 E2 J1 E8 J1 E8
VSSQ#E2 VSSQ#E2 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
J1 E8 J1 E8 L1 F9 L1 F9
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
L1 F9 L1 F9 J9 G1 J9 G1
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
J9 G1 J9 G1 L9 G9 L9 G9
NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 100-BALL 100-BALL
100-BALL 100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 SDRAM DDR3 SWS@VRAM _DDR3 SWS@VRAM _DDR3
SWS@VRAM _DDR3 SWS@VRAM _DDR3

BOT Down TOP Down TOP Up BOT Up

Group-B0 VREF Group-B1 VREF


+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B

R159 R178 R372 R396 R106 R343 R365 R95


SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4

VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4

R153 C299 R167 C335 R374 C565 R392 C594 R104 C95 R346 C522 R364 C529 R98 C82
SW@.1u/10V_4 SW@.1u/10V_4 SW@.1u/10V_4 SW@.1u/10V_4 SW@.1u/10V_4 SW@.1u/10V_4 SW@.1u/10V_4 SW@.1u/10V_4
SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4 SW@4.99K/F_4

Group-B0 decoupling CAP Group-B1 decoupling CAP


MEM_B0 CLK MEM_B1 CLK
+1.5V_GPU +1.5V_GPU

VMB_CLKP1

VMB_CLKP0 VMB_CLKN1
C593 C561 C596 C589 C595 C343 C119 C81 C176 C509 C142 C538 C77 C71 C91
VMB_CLKN0 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4
SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 R358 R356
SW@56.2/F_4
R170 R173 SW@56.2/F_4
SW@56.2/F_4 +1.5V_GPU +1.5V_GPU
SW@56.2/F_4

A C524 A
C566 C110 C347 C344 C305 C576 C345 C137 C109 C51 C219 C69 C115 C100 C97 SW@.01u/16V_4
C339 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4
SW@.01u/16V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4 SW@1U/6.3V_4

+1.5V_GPU +1.5V_GPU

C323 C348 C553 C557 C581 C52 C298 C545 C248 C547
Quanta Computer Inc.
SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6
SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 SW@10U/6.3V_6 PROJECT : ZQG
Size Document Number Rev
MEMORY 2 channel B 1A

Date: Monday, November 01, 2010 Sheet 19 of 41


5 4 3 2 1
1 2 3 4 5 6 7 8

CRT OPTION SIGNAL FROM NB to LVDS/CRT for UMA C560 .22u/6.3V_4


+5V 30V/ 1A 30V/ 0.5A

F1 CRTVDD5_F D21 CRTVDD5

16
2 1 2 1
B0520WS-7-F CN12
SMD1206P100TF CRT
INT_DDCCLK 6
4 INT_DDCCLK
INT_DDCDATA INT_CRT_RED L28 BLM18BA470SN1_6 CRT_R1 1 11 CRT_11 T68
4 INT_DDCDATA
7
INT_CRT_GRE L27 BLM18BA470SN1_6 CRT_G1 2 12 DDCDAT_1
INT_CRT_HSYNC 8
4 INT_CRT_HSYNC
INT_CRT_VSYNC INT_CRT_BLU L26 BLM18BA470SN1_6 CRT_B1 3 13 CRTHSYNC
4 INT_CRT_VSYNC
A
9 A
4 14 CRTVSYNC
R136 R141 R138 C240 C216 C242 C282 C279 C294 10
INT_CRT_RED 5 15 DDCCLK_1
4 INT_CRT_RED
150/F_4 150/F_4 150/F_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4
INT_CRT_GRE
4 INT_CRT_GRE

17
INT_CRT_BLU
4 INT_CRT_BLU

+3V U16 +3V


CRTVDD5 1 16 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRTHSYNC
SYNC_OUT1 14
7 C551 *.1u/10V_4 CRTVDD5
C239 .22u/6.3V_4 CRT_BYP VCC_DDC
8 BYP
C580 15 INT_CRT_VSYNC R369 R368 C125 *10P/50V_4 CRTVSYNC
SYNC_IN2 INT_CRT_HSYNC 2.7K_4 2.7K_4
+3V 2 VCC_VIDEO SYNC_IN1 13
0.1u/10V_4 C202 *10P/50V_4 CRTHSYNC
C223
CRT_R1 3 10 INT_DDCCLK C108 *10P/50V_4 DDCCLK_1
0.1u/10V_4 CRT_G1 VIDEO_1 DDC_IN1 INT_DDCDATA
4 VIDEO_2 DDC_IN2 11
CRT_B1 5 C570 *10P/50V_4 DDCDAT_1
VIDEO_3 DDCCLK_1 R370 2.7K_4 CRTVDD5
DDC_OUT1 9
6 12 DDCDAT_1 R367 2.7K_4
GND DDC_OUT2
CM2009-02QR

B B

LVDS(LDS) VIN
L5 *0_6
LCD PW(LDS) +3V
LCDVCC L2 0_6 LCDVCC_L
L4 0_6 LCD_VIN C4 C9
C14 C11
*10P/50V_4 *10P/50V_4
4 INT_EDIDCLK
*10P/50V_4 *10P/50V_4 C8
4 INT_EDIDDATA +3V L1 1U/6.3V_4 U1
4 INT_TXLCLKN
0_6 40mil
4 INT_TXLCLKP
CCD_POWER 6 1 LCDVCC
4 INT_TXLOUTN0 IN OUT
C10
4 INT_TXLOUTP0
C15 *10P/50V_4 4 2
4 INT_TXLOUTN1 IN GND
*10P/50V_4
4 INT_TXLOUTP1
3 5 C5 C1 C6 C3
4 INT_TXLOUTN2 4 INT_LVDS_DIGON ON/OFF GND
CN6
4 INT_TXLOUTP2
LCD_VIN
1 1U/6.3V_4 *.1u/10V_4 .01u/16V_4 22u/6.3V_8
+3V 60mil 2
1 IC(5P) G5243T11U
LCDVCC_L 2 R2
3
40mil 4
3
4 100K_4
5 5
6 6
R5 2.2K_4 INT_EDIDCLK 7
R6 2.2K_4 INT_EDIDDATA 8 7
8
9 9
INT_TXLOUTN0 10
INT_TXLOUTP0 10
11
C
INT_TXLOUTN1
12
11
12
Backlight Control(LDS) C

13 13
INT_TXLOUTP1 14 32
14 32 +3V
15 15
VIN INT_TXLOUTN2 16 33
+3V INT_TXLOUTP2 16 33
17 17
18 18
INT_TXLCLKN 19
C12 C13 L3 INT_TXLCLKP 19
20 20
C2 C7 *DLW21HN900SQ2L 21 R8 R7
4.7u/25V_8 1000P/50V_4 USBP2- 21
9 USBP2- 3 3 4 4 22 22
0.1u/10V_4 1000P/50V_4 2 2 USBP2+ 10K_4 10K_4
9 USBP2+ 1 1 23 23 BL_ON D2
24 24 2 1 BAS316 LID591# 31
25 25
CCD_POWER 26 26
27 27 34 34

3
28 28

3
R3 SW@0_4 LVDS_BRIGHT 29 31
31 CONTRAST 29 31
BL_ON 30
R4 IV@0_4 30 BL#
4 INT_LVDS_PWM 2 2 EC_FPBACK# 31
LVDS

3
Q1 Q2
2N7002K DTC144EUA

1
1
4 INT_LVDS_BLON 2
+3VPCU
Lid Switch (HSR) Q3
2N7002K
C480 1U/6.3V_4 R9

1
D R269 D
1

100K_4
*470K/F_4
LID591# 2 HE1
AH9249NTR-G1
SOT23_123-2_8-1_9

Quanta Computer Inc.


3

PT3661-BB (PLC) : AL003661003


ME268-002 (FCE) : AL000268000
PROJECT : ZQG
Size Document Number Rev
CRT/LVDS/LID 1A

Date: Monday, November 01, 2010 Sheet 20 of 41


1 2 3 4 5 6 7 8
5 4 3 2 1

HDMI SDVO I2C Control HDMI HPD SENSE (HDM)

4 HDMI_DDCDATA
HDMI_DDCDATA
HDMI_DDCCLK
UMA use +3V for the detect pin
Dis use +3V_DELAY for the detect pin
23
4 HDMI_DDCCLK +3V

D D
R216
10K_4

3
+3V

2 HDMI_DET_R R215 200K/F_4 HDMI_DET

R217 Q20 R214


10K_4 2N7002K 200K/F_4

1
4 INT_HDMI_HPD

3
2 HDMI_HPD_EC# 31
Q21
2N7002K

HDMI (HDM)

1
C C

Close to HDMI Connector EMI reserve for HDMI(EMC)


Close connector

+5V HDMI_PL_MOS R234 715/F_4 TX2_HDMI+


TX2_HDMI+ HDMI PORT (HDM)
R238
R240 715/F_4 TX2_HDMI- *100/F_4 CN18
TX2_HDMI- 20
SHELL1
3

R230 715/F_4 TX1_HDMI+ TX2_HDMI+ 1 22


Q22 TX1_HDMI+ D2+SHELL3
2 D2 Shield
2N7002K R226 715/F_4 TX1_HDMI- TX2_HDMI- 3
R228 TX1_HDMI+ D2-
2 4 D1+
R233 715/F_4 TX0_HDMI+ *100/F_4 5
TX1_HDMI- TX1_HDMI- D1 Shield
6 D1-
R231 715/F_4 TX0_HDMI- TX0_HDMI+ 7
TX0_HDMI+ D0+
8
1

R224 715/F_4 TXC_HDMI+ TX0_HDMI- D0 Shield


B 9 D0- B
R232 TXC_HDMI+ 10
R252 R221 715/F_4 TXC_HDMI- *100/F_4 CK+
11 CK Shield
TX0_HDMI- TXC_HDMI- 12 CK-
Due to HDMI item7-2 is fail, 13 CE Remote
100K/F_4 TXC_HDMI+ 14
Change to CS16492FB13. +5V HDMI_DDCCLK NC
15 DDC CLK
R223 F2 HDMI_DDCDATA 16
*100/F_4 SMD1206P100TF DDC DATA
DIS TXC_HDMI- 2 1 +5V_HDMI
17
18
GND
+5V
Stuff 499 ohm CS14992FB24 HDMI_DET 19 HP DET
SHELL4 23
SHELL2 21

C09 : Del D26 to slove HDMI issue. QJ1119C-NK01-8F


C627
.22u/6.3V_4
C633
*1000P/50V_4
TX2_HDMI+
4 TX2_HDMI+ D24 R446
TX2_HDMI-
4 TX2_HDMI-
TX1_HDMI+ +5V 2 1 HDMI_DDCCLK
4 TX1_HDMI+
TX1_HDMI-
4 TX1_HDMI-
TX0_HDMI+ 2K/F_4 C636
4 TX0_HDMI+ CH501H-40PT
TX0_HDMI- *1000P/50V_4
4 TX0_HDMI-
TXC_HDMI+
4 TXC_HDMI+ D25 R447
TXC_HDMI-
4 TXC_HDMI-
A
+5V 2 1 HDMI_DDCDATA A

2K/F_4
CH501H-40PT

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
HDMI 1A

Date: Monday, November 01, 2010 Sheet 21 of 41


5 4 3 2 1
5 4 3 2 1

Giga-LAN AR8151
+3V_S5 close Pin1 +3V_LAN
R195 *short0603 +3V_LAN

C355 C353 C366 C361 C358 U9

10u/6.3V_8 10u/6.3V_8 1u/6.3V_4 0.1u/10V_4 *1000p/50V_4 1 22 AVDDH C405 0.1u/10V_4


9/16 VDD33 AVDDH
2 23 LED2 T100
8,13,23,31 PLTRST# PERSTn CLKREQn/LED2
D 3 24 DVDDL C406 0.1u/10V_4 D
9,31 PCIE_WAKE# WAKEn DVDDL
R201 *Short_4 8151_CLKREQ# 4 25 SMCLK_8151 R218 *0_4
9 PCIE_REQ_LAN# CLKREQn SMCLK PCLK_SMB 6,7,9,23
C373 0.1u/10V_4 +VDDCT 5
VDDCT
AR8151
5X5mm SMDATA
26 SMDATA_8151 R219 *0_4
PDAT_SMB 6,7,9,23
C618 1u/6.3V_4 AVDDL 6 40-Pin QFN 27 SMBus PU at PCH side already
AVDDL_REG TESTMODE
C624 0.1u/10V_4 XTLO 7 28
XTLO TEST_RST
XTLI 8 29 PCIE_RXN6_C C407 0.1u/10V_4
XTLI TX_N PCIE_RXN0_LAN 8
C368 1u/6.3V_4 AVDDH 9 30 PCIE_RXP6_C C408 0.1u/10V_4
AVDDH_REG TX_P PCIE_RXP0_LAN 8
C367 0.1u/10V_4 R203 2.37K/F_4 RBIAS 10 31 AVDDL C621 0.1u/10V_4
RBIAS AVDDL
TX0P 11 32
TRXP0 REFCLK_N CLK_PCIE_LANN 8
Wake# and CLKREQ# PU at PCH side already TX0N 12 33
TRXN0 REFCLK_P CLK_PCIE_LANP 8
C619 0.1u/10V_4 AVDDL 13 34 AVDDL C622 0.1u/10V_4
NC/AVDDL AVDDL
TX1P 14 35
TRXP1 RX_P PCIE_TXP0_LAN 8
TX1N 15 36
TRXN1 RX_N PCIE_TXN0_LAN 8
C396 0.1u/10V_4 AVDDH 16 37 DVDDL C393 1u/6.3V_4
C365 33p/50V_4 XTLO NC/AVDDH DVDDL_REG C397 0.1u/10V_4
TX2P 17 38 LAN_ACTLED R208 5.1K_4
1

NC/TRXP2 LED0
1.2H Y2 TX2N 18 39 LAN_LINKLED#
25MHz NC/TRXN2 LED1
C623 0.1u/10V_4 AVDDL 19 40 LX L55 4.7uH/1A_2X2 +VDDCT
2

C
C364 33p/50V_4 XTLI NC/AVDDL LX C

TX3P 20 41 C614 C615 C616


NC/TRXP3 GND
TX3N 21
NC/TRXN3
Layout : *1000p/50V_4 0.1u/10V_4 10u/6.3V_8

AR8151
need isolate GND

TRANSFORMER(LAN)

RJ45(LAN)
TX0P

TX1P
TX0N

TX1N
R197

R198

R200

R202

reverse 1000p*4 for EMI CN15


9
LAN_ACTLED YELLOW_N
Close Transformer U28 R433 220_8 10
YELLOW_P
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

14
AVDD_CEN L54 X-TX0P GND2
+VDDCT 1 13
PBY160808T-181Y-N/2A/180ohm_6 X-TX0N 0+ GND1
2
X-TX1P 0-
3
LAN_N1

LAN_N2

C356 1U/10V_4 X-TX2P 1+


reverse 1000p*4 for EMI X-TX2N
4
2+
5
C363 *1000P/50V_4 X-TX1N 2-
6
U22 X-TX3P 1-
7
C360 C359 C370 C369 C613 0.1u/10V_4 X-TX3N 3+
B 1 24 8 B
TX0P TCT1 MCT1 X-TX0P 3-
2 23
*1000P/50V_4 0.1U/10V_4 *1000P/50V_4 C357 *1000P/50V_4 TX0N TD1+ MX1+ X-TX0N +3V_LAN
3 22
0.1U/10V_4 TD1- MX1- LAN_LINKLED# 11
C394 0.1u/10V_4 R445 220_8 LAN_LNK_LED_PWR GREEN_N
4 21 12
TX1P TCT2 MCT2 X-TX1P GREEN_P
5 20
C388 *1000P/50V_4 TX1N TD2+ MX2+ X-TX1N RJ45
6 19
TD2- MX2-
C387 0.1u/10V_4 7 18
TX2P TCT3 MCT3 X-TX2P
8 17
C395 *1000P/50V_4 TX2N TD3+ MX3+ X-TX2N
9 16
TD3- MX3- LAN_ACTLED
TX2P

TX3P
TX2N

TX3N

C362 0.1u/10V_4 10 15
TX3P TCT4 MCT4 X-TX3P LAN_LINKLED#
11 14
TD4+ MX4+
R207

R209

R211

R212

TX3N 12 13 X-TX3N
TD4- MX4-
TRANSFORMER

2
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

C606 C625
R196 R199 R206 R210 *470p/50V_4 *470p/50V_4

1
Delta LFE9276C-R (DB0ZR1LAN00) 75/F_8 75/F_8 75/F_8 75/F_8
FCE NS892407 (DB0LL1LAN00)
LAN_N3

LAN_N4

Bothhand GST5009B (DB0Z06LAN00)

C392 C391 C399 C398 C354


1500p/3KV_18
0.1U/10V_4 *1000P/50V_4 0.1U/10V_4 *1000P/50V_4

A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
LAN (AR8151) 1A

Date: Monday, November 01, 2010 Sheet 22 of 41


5 4 3 2 1
1 2 3 4 5 6 7 8

MINI-CARD WLAN(MPC) Check LED signal. (active high or low)


+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA
R463 *0_4
51
CN21
Reserved +3.3V
52 +WL_VDD
+3V

R460 *Short_8

C453 C628 C648


+WL_VDD

C632
26
8 LPC_DRQ#0 49 Reserved GND 50
47 48 +WL_1.5V 10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
8,25 PCIE_RST# Reserved +1.5V
8 PCLK_DEBUG 45 46
Reserved LED_WPAN# RF_LED#
43 44 RF_LED# 29
Reserved LED_WLAN#
+WL_VDD 41 42
Reserved LED_WWAN#
39 40
Reserved GND
A 37 38 USBP9+ 9 A
Reserved USB_D+
35 GND USB_D- 36 USBP9- 9
8 PCIE_TXP1 33 PETp0 GND 34
8 PCIE_TXN1 31 PETn0 SMB_DATA 32 PDAT_SMB 6,7,9,22
29 GND SMB_CLK 30 PCLK_SMB 6,7,9,22
27 GND +1.5V 28 +WL_1.5V
8 PCIE_RXP1 25 PERp0 GND 26
23 24 +WL_VDD +1.5V
8 PCIE_RXN1 PERn0 +3.3Vaux +WL_1.5V
21 GND PERST# 22 PLTRST# 8,13,22,31
19 20 RF_EN 31
Reserved Reserved R450 *Short_8
17 18
Reserved GND
15 16 DEBUG_LFRAME# R229 *Short_4
GND Reserved LPC_LFRAME# 8,31
13 14 DEBUG_LAD3 R227 *Short_4 C457 C443 C629
8 CLK_PCIE_WLAN1P REFCLK+ Reserved LPC_LAD3 8,31
11 12 DEBUG_LAD2 R225 *Short_4 Debug *1000P/50V_4 *0.1u/10V_4 *10u/6.3V_8
8 CLK_PCIE_WLAN1N REFCLK- Reserved LPC_LAD2 8,31
9 10 DEBUG_LAD1 R220 *Short_4
GND Reserved LPC_LAD1 8,31
7 8 DEBUG_LAD0 R222 *Short_4
9 PCIE_REQ_WLAN1# CLKREQ# Reserved LPC_LAD0 8,31
+5V_TV-CARD R449 *0_6 +5V_TV-CARD_R_A 5 6 +WL_1.5V
R448 *0_6 +5V_TV-CARD_R_B Reserved +1.5V
TV use +5V 3
Reserved GND
4
PCIE_WAKE_WL 1 2 +WL_VDD
T170 WAKE# +3.3V
53 54
PAD53 PAD54
MINI CARD_A

MINI-CARD WLAN(MPC) Check LED signal. (active high or low)


B B
+3V +WL_VDD
+3.3V: 1000mA
+3.3Vaux:330mA R289 *Short_8
CN7
+1.5V:500mA
51 52 +WL_VDD
LPC_DRQ#0 R291 *0_4 Reserved +3.3V C489 C484 C491 C486
49 50
PLTRST# Reserved GND 10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
47 48 +WL_1.5V
PCLK_DEBUG Reserved +1.5V
45 46
Reserved LED_WPAN# RF_LED#
43 44
Reserved LED_WLAN#
+WL_VDD 41 42
Reserved LED_WWAN#
39 40
Reserved GND
37 Reserved USB_D+ 38 USBP10+ 9
35 36 USBP10- 9
GND USB_D-
8 PCIE_TXP2 33 34
PETp0 GND SB_SDATA4
8 PCIE_TXN2 31 32 SB_SDATA4 9
PETn0 SMB_DATA SB_SCLK4
29 30 SB_SCLK4 9
GND SMB_CLK
27 28 +WL_1.5V
GND +1.5V
8 PCIE_RXP2 25 26
PERp0 GND +1.5V
8 PCIE_RXN2 23 24 +WL_VDD
PERn0 +3.3Vaux PLTRST# +WL_1.5V
21 GND PERST# 22
19 20 RF_EN
Reserved Reserved R292 *Short_8
17 18
Reserved GND
15 16
GND Reserved C487 C485 C490
8 CLK_PCIE_WLAN2P 13 14
+5V REFCLK+ Reserved *1000P/50V_4 *0.1u/10V_4 *10u/6.3V_8
8 CLK_PCIE_WLAN2N 11 12
REFCLK- Reserved
9 GND Reserved 10
9 PCIE_REQ_WLAN2# 7 CLKREQ# Reserved 8
R287 *0_6 +5V_TV-CARD_R_A 5 6 +WL_1.5V
R286 *0_6 +5V_TV-CARD_R_B Reserved +1.5V
3 Reserved GND 4
PCIE_WAKE_WL
500mA, 25mil T101 1
WAKE# +3.3V
2 +WL_VDD
C 53 54 C
PAD53 PAD54
MINI CARD_A

D D

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
MINI PCI-E card 1A

Date: Monday, November 01, 2010 Sheet 23 of 41


1 2 3 4 5 6 7 8
1 2 3 4

SATA HDD

27
CN19

GND23 23

GND1 1
RXP 2 SATA_TXP0 10
RXN 3 SATA_TXN0 10
A A
GND2 4
5 SATA_RX0-_C C452 .01u/16V_4
TXN SATA_RXN0 10
6 SATA_RX0+_C C445 .01u/16V_4
TXP SATA_RXP0 10
GND3 7

3.3V 8
3.3V 9
3.3V 10
GND 11
GND 12
13
GND
14
120mil +5V_HDD R443 *Short_8 +5V
5V
5V 15
+

16 C620
5V C617 C612 C611 C610
GND 17
18 10u/25V_1206 10u/25V_1206 0.1u/10V_4 .01u/16V_4
RSVD *100u/6.3V_3528
GND 19
12V 20
12V 21
12V 22
B B
GND24 24

SATA_HDD

SATA ODD
CN11
GND14 14

GND1 1
RXP 2 SATA_TXP1 10
RXN 3 SATA_TXN1 10
GND2 4
5 SATA_RX1-_C C225 .01u/16V_4
TXN SATA_RXN1 10
6 SATA_RX1+_C C208 .01u/16V_4
C TXP SATA_RXP1 10 C
GND3 7

8 SATA_DP R119 *1K_4


DP +5V_ODD R379 *Short_8 +5V
+5V 9
+5V 10
+

11 C562
RSVD C539 C552 C532 C527
GND 12
13 *100u/6.3V_3528 10u/25V_1206 10u/25V_1206 0.1u/10V_4 .01u/16V_4
GND

GND15 15

C18534-11305-L

D D

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
SATA-HDD/ODD/HOLE 1A

Date: Monday, November 01, 2010 Sheet 24 of 41


1 2 3 4
A B C D E

2 IN 1 CARD READER (MMC)


CARD READER Controller
SD_WP

SD_CD# 30

11
12
4
for EMI CN4

SW COM
CD/SW

WP/SW
SD_CLK SD_DAT1 10
4 C634 SD_DAT0 DATA1 4
9 DATA0
8 VSS2
*10P/50V_4 SD_CLK 7 CLK
VCC_XD 6 VDD
5 VSS1
SD_CMD 3 CMD

GND1
SD_DAT3 2

GND
SD_DAT2 DATA3
1 DATA2
SD-CARD

13

14
VCC_XD
Main DFHS11FR011 C652 C650

4.7u/10V_6 0.1u/10V_4
Second DFHS11FR033

Close to CNxx pin 14 & pin23 5/10 change Card Redaer conn
C743 close PIN46, 47 4.7u CAP close to pin23 footpirnt sdcard-sdsn09-08-xa-11p-smt
+1.8V_VDD
T178
C708 close PIN48, 47
+3V_VDD T177
R464 *Short_4 XTALSEL C653 C654

3 Clock input selection 0.1u/10V_4 0.1u/10V_4 3

XTALSEL
CRMD_N
'1' for 48MHz input [Default]

DATA1
DATA0
CTRL1
CTRL3
NBMD
'0' for 12MHz input
CTRL0, CRTL 1 trace length shorter ,
and surround with GND.
R473 *100K_4

48
47
46
45
44
43
42
41
40
39
38
37
+3V_VDD U23
R472 *Short_4
8,23 PCIE_RST#

GND
VDD

NBMD
VDDHM

TRIST
XTALSEL

CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6
C657 *0.47u/10V_6

+3V R461 *Short_6 +3V_VDD


C658 1 36 CTRL0
GPON7 CTRL0
2 EXT48IN DATA5 35
4.7u/10V_6 3 34 CTRL2
R474 330_4 RSTN CTRL2 GPI4
4 REXT GPI4 33
5 32 T172
VD33P DATA4 DATA3
9 USBP6+ 6 DP DATA3 31
7 AU6437-GBL 30 DATA2
9 USBP6- DM DATA2
8 29 DATA0 R455 *Short_4 SD_DAT0
C659 C660 XI VS33P XDWPN GPI2
9 XI GPI2 28
XO 10 27 T171
*5p/50V_4 *5p/50V_4 XO XDCEN EEPDATA DATA1 R456 *Short_4 SD_DAT1
+1.8V_VDD 11 VDD EEPDATA 26
12 25 GPI1 T173
VDD GPI1 T174
SDWPEN
AGND5V

EEPCLK
CF_V33

VDDHM

XDCDN DATA2 R454 *Short_4 SD_DAT2


VCC33

CTRL4
GND
VDD
V18

V33

2 2
DATA3 R453 *Short_4 SD_DAT3
close PIN11, 12
13
14
15
16
17
18
19
20
21
22
23
24

crystal trace width needs at least 10 mils. pin13 output 20mils


EEPCLK T175
C655
VCC_XD

C662 18p/50V_4 XI
4.7u/10V_6

Y6 R470
12MHz 270K_4 CTRL0 R451 SD_CLK
*0_4 R457 BLM15AG121SS1/0.5A/120ohm_4
VCC_XD

C663 18p/50V_4 XO
SD write protect C637
+1.8V_VDD 1:decided by SDWP[Default] *10P/50V_4
0:letting SD always CTRL1 R459 *Short_4 SD_WP
+3V_VDD +3V_VDD write-able
C644 C646 CTRL2 R452 *Short_4 SD_CMD

4.7u/10V_6 0.1u/10V_4
CTRL3 R458 *Short_4 SD_CD#

1 1

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
AU6433 CardReader 1A

Date: Monday, November 01, 2010 Sheet 25 of 41


A B C D E
5 4 3 2 1

FILT_1.65V LDO_OUT_3.3V
Codec(ADO)
AUDIO CODEC C471
C468
C474 C466
AVDD_3.3 pin is output of
internal LDO. Do NOT connect
1u/16V_6 0.1u/10V_4 to external supply.
10u/10V_8 0.1u/10V_4
3V_DVDD
Port Configuration
ADOGND
ADOGND
Notes:
C661 C656 C651
Port A: Headphone jack (jack shared with S/PDIF)
10u/10V_8 0.1u/10V_4 0.1u/10V_4
+5VA Port B: Internal MIC (mono or stereo)
D Port C: Microphone/LI/LO jack D

3V_DVDD Port D: Line Out jack (Optional)


Port E: Line In jack (Optional)
(3.3V or 1.5V) C475 C467
Port F: Not used.
10u/10V_8 0.1u/10V_4
Layout Note: Path from +5V to LPWR_5.0 and Port G: Internal stereo speakers
C448 RPWR_5.0 must be very low resistance ( <0.01 ohms).
C640 3V_DVDD R256 Port J: Internal stereo digital mic (Optional)
1u/16V_6 0.1u/10V_4 0.1/F_12 Port H: S/PDIF (jack shared with headphone)
Place bypass caps very close to device.

C642 C451 R46 only needed if supply to VAUX_3.3 is


CLASSD_5V
10u/10V_8 0.1u/10V_4
removed during system re-start.
FILT_1.8V
C456
R250 C635 C450 C645 C647 C454 C455
0.1u/10V_4
10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8 10u/10V_8
10K_4

21
29

32

30

31

15

18

20
5

4
9
U11 3V_DVDD
C440 *22p/50V_4

FILT_1.8

VAUX_3.3
VDD_IO
DVDD_3.3
AVDD_HP

FILT_1.65

AVDD_3.3

AVDD_5V

LPWR_5.0

RPWR_5.0

CLASSDREF
R255 R254
11 5.1K/F_4 5.1K/F_4
9 ACZ_RESET#_AUDIO RESET#
C449 *22p/50V_4
R243 0_4 7 44 SENSEA R468 10K/F_4 MIC1_JD
9 ACZ_BITCLK_AUDIO BIT_CLK SENSE_A MIC1_JD 27
10 43 SENSEB R253 39.2K/F_4 HPOUT_JD
C 9 ACZ_SYNC_AUDIO SYNC SENSE_B HPOUT_JD 27 C
9 ACZ_SDIN0 R242 33_4 8 R466 *20K/F_4 ADOGND
SDATA_IN
9 ACZ_SDOUT_AUDIO 6 SDATA_OUT PORTF_R 42
41
PORTF_L
C442 *22p/50V_4 40 MIC2_R C470 2.2U/6.3V/X5R_6
PORTB_R MIC2_L C469 2.2U/6.3V/X5R_6 MIC2_INTL1
PORTB_L 39
38 MIC2-VREFO
B_BIAS
R481 0_4 R239 33_4 C441 0.1u/10V_4 13 37
9 SPKR PC_BEEP C_BIAS MIC1-VREFO 27
PORTC_R 36 MIC1-R 27
48 35 MIC1-L 27
R241 C422 SPDIF PORTC_L
47
GPIO0/EAPD# CX20584 PORTE_R
34
R482 0_4 *4.7K_4 *100p/50V_4 SPK_MUTE# 46 33
31 PCBEEP GPIO1/SPK_MUTE# PORTE_L
45
GPIO2/SPDIF2
PORTD_R 28
27
PORTD_L
1 DMIC_3/4 PORTA_R 26 HP-R 27
2 25 HP-L 27
C10 : net PCBEEP connects with U11 by 10k ohm for AC pulg in ,out function. DMIC_CLK0 PORTA_L
3
DMIC_1/2 AVEE
24
AVEE
23
FLY_N C458 1u/16V_6
EXT_MUTE#

22
FLY_P

EP_GND
C463 C462

RIGHT+
RIGHT-
LEFT+

LEFT-

0.1u/10V_4 10u/10V_8
12

14

16

17

19

49
B 3V_DVDD +3V B
0.1A L56 1. The VDD_IO and VAUX_3.3 pins should be connected to same
27,31 AMP_MUTE#
1 2 power supply domain as HDA bus controller so that the HDA controller
and codec bus interface will power-up at the same time. This will avoid
NHCB2012KF-131T10 130
C641

C639

C638

Low Active L35 0_6


INSPKR+ 27
bus leakage issues if using HDA controller with bus pull-up strap
SPK_MUTE# R249 *0_4 L34 0_6 options. See other FET option on this page if these supplies are not on
INSPKR- 27
same domain as HDA controler.
1U/10V/X5R_4
10U/10V/X5R_8

0.1U/10V/X5R_4

C446 C447 2. To support Wake-on-Jack, the codec VAUX_3.3 pin must be


powered from a Standby supply.
*1000P/50V_4 *1000P/50V_4

3. C309, C310, C311 are optional.


Do not install unless needed for EMI/SI.

Power (ADO) INT MIC array


DIGITAL ANALOG
R469 *0_6 5/7 update the footprint name
+5V L57 UPB201209T-310Y-N/6A/31ohm_8 R480 *0_6 CN5 R268
+5VA R476 *0_6 1 MIC2_INTL1 MIC2-VREFO
U24 R465 *0_6 1
2
R259 *0_6 2 C481 2.2K_4
3 4
IN OUT R467 *0_6
2 R462 0_6 *INT_MIC *22P/50V_4
GND R471 0_6
1 5 R479 *29.4K/F_4 C465 *1000P/50V_4
A SHDN SET C649 *1000P/50V_4
A
5/11 update Mic Partnumber
*G923-330T1UF
R478 + C669 C670 ADOGND
*10K/F_4
10u/10V_3216 0.1u/10V_4 ADOGND
C668 C667 C482 0.1u/10V_4
+ R475 *0_4 Tied at one point only under
0.1u/10V_4 10u/10V_3216 the codec or near the codec Quanta Computer Inc.
ADOGND
PROJECT : ZQG
cap place close to MIC-connector Size Document Number Rev
C730, C787 close U37 pin3 and L65 CONEXANT 20584 1A
Date: Monday, November 01, 2010 Sheet 26 of 41
5 4 3 2 1
5 4 3 2 1

MIC D8 BAS316

D9 BAS316
26 MIC1-VREFO
Internal Speaker
Normal OPEN Jack
R267 R266
3K/F_4 3K/F_4

1 CN26 7
D C476 2.2U/6.3V_6 MIC1_L2 R262 100/F_4 MIC1_L3 L41 MIC1_L D
26 MIC1-L 2
BLM15AG121SS1/0.5A/120ohm_4 6
26 MIC1-R C477 2.2U/6.3V_6 MIC1_R2 R261 100/F_4 MIC1_R3 L40 MIC1_R 3
BLM15AG121SS1/0.5A/120ohm_4 MIC1_JD 4 CN24
26 MIC1_JD 8 26 INSPKR- 2 2
5 26 INSPKR+ 1 1
JAS7331-P30H9-7F
C478 C479 SPEAKER-CONN
Max. 100mVrms input for Mic-IN *470p/50V_4 *470p/50V_4

C671 C672
MIC1_JD ADOGND *0.22u/25V_6 *0.22u/25V_6
ADOGND

1
ADOGND
D27

*VPORT_6

C C

HP

26,31 AMP_MUTE# HP_MUTE#


R258 *0_6

1 CN25 7
HP-L-2 R265 39.2/F_4 L39 0_6 HPL-1 2

2
6
HP-R-2 R260 39.2/F_4 L38 0_6 HPR-1 3
HPOUT_JD 4 26 HP-L 3 1 HP-L-2
8
5 Q25
JAS7331-P30H9-7F *FDV301N
1

D11 D12 R264 0_6


ADOGND ADOGND
B B
2

*VPORT_6 *VPORT_6 Normal OPEN Jack HP_MUTE#

2
26 HP-R 3 1 HP-R-2

Q24
*FDV301N

HPOUT_JD R263 0_6


26 HPOUT_JD
1

D10

*VPORT_6
2

A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
AUDIO JACK CONN 1A
Date: Monday, November 01, 2010 Sheet 27 of 41

5 4 3 2 1
5 4 3 2 1

+5V_S5
EXT. USB(USB)
INT. USB(USB) +5V_S5

C444
120mil CN17
L37 *0_6 C631 10u/10V_8
1u/16V_6 U10 16 18
USBPW L36 0_6 USBPW_L C630 1u/16V_6 15 17
2 IN1 OUT3 8 14
3 7 C460 C459
IN2 OUT2 + C643 13
OUT1 6 12
USBON# 4 *10P/50V_4 *10P/50V_4
D 31 USBON# EN# 9 OC_4# 11 D
1 330u/6.3V_6X5.7
GND L33 *DLW21HN900SQ2L/330mA/90ohm 10
OC# 5 9
OC_6# 9 3 3 USBP1_L-
G547F2P81U
9 USBP1- 4 4 USBP1_L+ 8
9 USBP1+ 2 2 1 1 7
RP3 CN22
USBPW_L L32 *DLW21HN900SQ2L/330mA/90ohm 6
1 1 8 8 5
3 4 USBP0_L- 2 7 3 3 USBP5_L-
9 USBP0-
USBP0_L+ 2 7 9 USBP5- 4 4 USBP5_L+ 4
9 USBP0+ 1 2 3 3 6 6 9 USBP5+ 2 2 1 1 3
4 4 5 5 2
USBON#
0_4P2R_4 USB_MB 1

1
USB_BTB CONN
C626
RV1 RV2 RP2 0_4P2R_4

*EGA10402V05AH_4

*EGA10402V05AH_4
USBP1- 1 2 USBP1_L- *100p/50V_4

2
USBP1+ 3 4 USBP1_L+

USBP5- 1 2 USBP5_L-
USBP5+ 3 4 USBP5_L+

RP1 0_4P2R_4

C C

BLUETOOTH V3.0 CONN(BTM)


BLUETOOTH V2.1 CONN(BTM)

30mil
+3V_S5 1 3 BT_POWER1
30mil
+3V_S5 1 3 BT_POWER2 C664 Q34
.33u/10V_6 R477 + C665 C666

2
C473 Q23 47K_4 AO3413
.33u/10V_6 R257 + C472 C461 2.2U/6.3V_6 1000P/50V_4
47K_4 2 AO3413
2.2U/6.3V_6 1000P/50V_4

B 31 BT_POWERON# B

BT_POWERON#

CN23
BT_POWER1
5
CN3
BT_POWER2 4
5 9 USBP7+ 3
4 9 USBP7- 2 7
9 USBP8+ 3 1 6
9 USBP8- 2 7 BT_CONN
1 6
BT_CONN

A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
USB/BT 1A

Date: Monday, November 01, 2010 Sheet 28 of 41


5 4 3 2 1
5 4 3 2 1

EE RETURN-PATH CAPACITORS(EMC) LED(UIF)


+3V_S5
EC2 .01u/50V_6
VIN Amber
EC3 .01u/50V_6 LED2
R270 300_4 4 3
31 SUSLED#
EC8 .01u/50V_6
R271 100_4 1 2
31 PWRLED#
D EC1 .01u/50V_6 LED_A/B D

EC12 .01u/50V_6 Blue


R273 *1M_4 +3VPCU +3VPCU
EC11 .01u/50V_6
R272 *1M_4 Amber
LED3
R274 300_4 4 3
31 BATLED1#
EC4 .01u/50V_6
R275 100_4 1 2
31 BATLED0#
EC14 .01u/50V_6
LED_A/B
EC5 .01u/50V_6 +3V

EC9 .01u/50V_6
AmberLED5
R276 220_4
23 RF_LED#
EC13 .01u/50V_6 LED_Amber

EC10 .01u/50V_6 Blue LED4


R277 100_4 1 2
10 SATA_LED#

C
LED_B-LTST-C191TBKT-5A C

LED1 LED_Bule R1 100_4


D1 Power LED near PW SW

HOLE(OTH) HOLE12 HOLE7 HOLE8 HOLE11


*HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 mini PCI
7 6 7 6 7 6 7 6 HOLE20
8 5 8 5 8 5 8 5 HOLE26 HOLE18 VGA-c256d161p2 HOLE3 HOLE16
9 4 9 4 9 4 9 4 MPCIE-C197D87 *VGA-C197D87P2 *H-C94D94N *h-o95x134d95x134n
1
2
3

1
2
3

1
2
3

1
2
3

1
1

1
B HOLE10 HOLE15 B
*HG-C315D118P2 *HG-C315D118P2 HOLE14
7 6 7 6 *HG-C315D118P2 HOLE17
8 5 8 5 7 6 HOLE21 HOLE19 FAN-C315D146 HOLE5
9 4 9 4 8 5 VGA-C197D87P2 VGA-C197D87P2 7 6 *O-ZQG-1
9 4 8 5
9 4
1
2
3

1
2
3

1
2
3

1
2
3
1

1
HOLE1 HOLE6
HG-C315D118P2
*HG-C315D118P2 *HG-C315D118P2 HOLE4
7 6 7 6 *HG-C315D118P2 HOLE9
8 5 8 5 7 6 H-C256D142P2
9 4 9 4 8 5 cpu
9 4 HOLE23 HOLE24
*H-C236D165P2 *H-C236D165P2
CPU nut PN : FBBU1001010 x 3 @ SHOLE1~3
1
2
3

1
2
3

1
2
3

1
HOLE2 HOLE13
1

1
*HG-C315D110P2 *H-C315D118P2 HOLE25
A 7 6 VGA-C256I161D161 A
8 5
9 4 HOLE22
*H-C236D165P2
Quanta Computer Inc.
1
2
3

1
PROJECT : ZQG
Size Document Number Rev
1

29 -- LED/ EMI/ Screw Hole& Nut 1A

Date: Monday, November 01, 2010 Sheet 29 of 41


5 4 3 2 1
5 4 3 2 1

K/B(KBC) MY0
CN2 CPU FAN(THM)
31 MY0 1
MY1 2
31 MY1
MY2 3
31 MY2 +3VPCU
MY3 4
31 MY3
MY4 5
31 MY4
MY5 6
31 MY5
MY6 7 RP4 10K_10P8R +3V
31 MY6
MY7 8 10 1 MX7
31 MY7
D MY8 9 MX0 9 2 MX6 D
31 MY8
MY9 10 MX1 8 3 MX5 R293
31 MY9 +5V
MY10 11 MX2 7 4 MX4 10K_4
31 MY10
MY11 12 MX3 6 5
31 MY11
MY12 13
31 MY12 31 FANSIG
MY13 14 R30 *0_8
31 MY13
MY14 15 C492 .01u/16V_4
31 MY14
MY15
31 MY15
MY16
16
17 U3
30 MIL CN8
31 MY16
MY17 18 C30 2.2U/6.3V_6 2 3 TH_FAN_POWER
31 MY17 VIN VO 1
MX7 19 5
31 MX7 GND 2 4
MX6 20 1 6
31 MX6 4,31 SML1ALERT# FON# GND 3 5
MX5 21 7 C31 C34
31 MX5 GND
MX4 22 4 8 FAN
31 MX4 31 CPUFAN# VSET GND
MX3 23 22u/6.3V_8 1000P/50V_4
31 MX3
MX2 24 27 G991
31 MX2
MX1 25 28
31 MX1
MX0 26
31 MX0
change footpirnt as SA6
KB
4/23

C C

TOUCHPAD BOARD CONN(TPD) SW2

LEFT#
MISAKI_SW_H1.5
Power Sequence
1 2
+5V +5V 3 4

1
5
50mil C497 D13 6 0903--Add Connecotr
L42 +TPVDD +TPVDD
BK1608HS220/1A/22ohm_6 *VPORT_6

2
*100p/50V_4 CN9
B B
R295 R294 C493 C494 SW3 2 1
10K_4 10K_4 *.1u/10V_4 0.1u/10V_4 MISAKI_SW_H1.5 31 NBSWON#
+3V_S5 4 3 S5_ON 31,33,35,40
TP/B 6 5
+1.1V_S5 +5V_S5
1 RIGHT# 1 2 8 7
9,31 DNBSWON# ICH_RSMRST# 9,31
2 3 4 9,31 SUSB# 10 9 SUSC# 9,31

1
L44 LZA10-2ACB104MT/100mA_6 TPDATA_R 3 C464 5 12 11
31 TPDATA 31,36,37,39,40 MAINON SUSON 31,37,40
L43 LZA10-2ACB104MT/100mA_6 TPCLK_R 4 D7 6 +1.5V_SUS 14 13 +5V_SUS
31 TPCLK
5 +3V 16 15 +5V
6 *100p/50V_4 *VPORT_6 +1.1V 18 17 +1.8V
RIGHT# 7 2 31 HWPG 20 19 +1V
C496 C495 8 +VCORE 22 21
*.01u/16V_4 *.01u/16V_4 VRON 31,34
9 9,31 PWROK_EC 24 23 CPU_COREPG 9,34
10 13 4,8 APU_PWRGD 26 25 SB_PWRGD_IN 9,17
11 14 4,8 LDT_RST# 28 27 A_RST#_R 8
LEFT# 12 30 29
CN1 *CON30_DEBUG

A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
30 -- KB/TP/FAN 1A

Date: Monday, November 01, 2010 Sheet 30 of 41


5 4 3 2 1
5 4 3 2 1

EC(KBC) L7 PBY160808T-250Y-N/3A/25ohm_6 +A3VPCU


+3V
+3V
+3VPCU
4,5,6,7,9,10,11,12,16,17,20,21,23,25,26,29,30,33,34,35,36,37,38,39,40
8,20,29,30,32,33,39
I/O ADDRESS SETTING(KBC)
C24 C25
30mil
0.1u/10V_4 10u/6.3V_6
+3VPCU E775AGND
R13 2.2_6 D3 C16 C19
1 2 +3VPCU_EC 0.03A(30mils)
BAS316 4.7u/6.3V_6 0.1u/10V_4
C23 C22 C17 C21 C28 C27

115

102
19
46
76
88

4
4.7u/6.3V_6 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4 U2

AVCC

VDD
VCC1
VCC2
VCC3
VCC4
VCC5
E775AGND C488 10u/6.3V_8 ICMNT
D CLK_PCI_775 D
C26 .01U/16V/X7R_4
8,23 LPC_LFRAME# 3 LFRAME GPIO90/AD0 97 TEMP_MBAT 32
126 98 IGFX_VR_ICC T12
8,23 LPC_LAD0 LAD0 GPIO91/AD1
R10 127 A/D 99 CPU_VCC T11 SHBM SHBM R20 10K_4
8,23 LPC_LAD1 LAD1 GPIO92/AD2
128 100 CPU_ICC
8,23 LPC_LAD2 LAD2 GPIO93/AD3
*22_4 1 R15 0_4
8,23 LPC_LAD3 LAD3 ICMNT 32
CLK_PCI_775 2 Disable (non share SPI ROM) : no external PU resistor
8 CLK_PCI_775 LCLK
101 POWER_SAVE T10 enable (share SPI ROM) : 10Kohm external PD resistor
GPIO94/DA0
8 CLKRUN# 8 GPIO11/CLKRUN D/A GPI95/DA1 105
ODDLED
CPUFAN# 30
C18 106 T9
GPI96/DA2
*10p/50V_4 9 SIO_A20GATE 121 GPIO85/GA20

9 SIO_RCIN# 122 KBRST/GPIO86


64
9 SIO_EXT_SCI# 29 ECSCI/GPIO54 LPC
GPIO01/TB2
GPIO02 79 PANEL_COLOR
NBSWON#
T108
ACIN 32
SM BUS PU(KBC) +3VPCU
GPIO03 95 NBSWON# 30
6 96 MBCLK R24 10K_4
20 EC_FPBACK# GPIO24/LDRQ GPIO04
108 MBDATA R17 10K_4
GPIO05
26,27 AMP_MUTE# 124 GPIO10/LPCPD GPIO06/IOX_DOUT/RTS1 93 LID591# 20
94 IGFX_VR_VCC T13
C11 : MXM_SMCLK12 / MXM_SMDATA12 should be pull up to +3V by 10k ohm.
R438 0_4 GPIO07
8,13,22,23 PLTRST# 7 LREST GPIO16 114 SCRL_LED# R11 *10K_4 +3V +3V
109 ACPRN T8
GPIO30
23 RF_EN 123 GPIO67/PWUREQ GPIO36/CTS1 15 T3
80 APU_SIC_EC R16 *10K_4
8 EC_A_RST#_L GPIO41 VRON 30,34
125 17 HWPG APU_SID_EC R23 *10K_4
8 IRQ_SERIRQ SERIRQ GPIO42/SCL3B/TCK
GPIO43/SDA3B/TMS 20 SML1ALERT# 4,30
9 SIO_EXT_SMI# 9 GPIO65/SMI GPIO44/TDI 21 SUSB# 9,30
GPIO 24 VIN_ON T105 +3V
GPO47/SCL4
GPIO50/PSCLK3/TDO 25 D/C# 32
MX0 54 26 S5_ON
30 MX0 KBSIN0 GPIO51 S5_ON 30,33,35,40
MX1 55 27 HDMI_HPD_EC# MXM_SMCLK12 R483 10K_4
30 MX1 KBSIN1 GPIO52/PSDAT3/RDY HDMI_HPD_EC# 21
MX2 56 28 PCIE_WAKE#_R R285 *0_4 MXM_SMDATA12 R484 10K_4
30 MX2 KBSIN2 GPIO53/SDA4 PCIE_WAKE# 9,22
MX3 57 73
C 30 MX3 KBSIN3 GPIO70 SUSC# 9,30 C
MX4 58 74 PWROK_EC_uR R22 0_4
30 MX4 KBSIN4 GPIO71 PWROK_EC 9,30
MX5 59 75 RSMRST#_uR R18 0_4 R288 *0_4 H_PROCHOT# 4,8,10
30 MX5 KBSIN5 GPIO72 ICH_RSMRST# 9,30
MX6 60 82
30 MX6 KBSIN6 GPIO75/SPI_SCK MAINON 30,36,37,39,40

3
MX7 61 83 SHBM
30 MX7 KBSIN7 GPO76/SHBM
84 ODD_EJ T107 Q26
MY0 GPIO77
30 MY0 53 KBSOUT0/JENK GPIO81 91 DNBSWON# 9,30
MY1 52 110 Do not use it T7 PROCHOT_EC 2
30 MY1 KBSOUT1/TCK GPO82/IOX_LDSH/TEST
MY2 51 112 USBON#
30 MY2 KBSOUT2/TMS GPO84/IOX_SCLK/XORTR USBON# 28
MY3 50 107 VGA_THERM#
30 MY3 KBSOUT3/TDI GPIO97 VGA_THERM# 18
MY4 49 KB R12 *2N7002K
30 MY4 KBSOUT4/JEN0
MY5 48
30 MY5

1
MY6 KBSOUT5/TDO *100K_4
30 MY6 47 KBSOUT6/RDY GPIO56/TA1 31
MY7 43 117
30 MY7 KBSOUT7 GPIO20/TA2/IOX_DIN_DIO SUSON 30,37,40
MY8 42 63
30 MY8 KBSOUT8 GPIO14/TB1 FANSIG 30
MY9 41
30 MY9 KBSOUT9/SDP_VIS
MY10 40 TIMER 32
30 MY10 KBSOUT10/P80_CLK GPIO15/A_PWM CONTRAST 20
MY11 39 118 PCBEEP
30 MY11 KBSOUT11/P80_DAT GPIO21/B_PWM PCBEEP 26
MY12 38 62 socket : DG008000031
30 MY12 KBSOUT12/GPIO64 GPIO13/C_PWM PWRLED# 29
MY13 37 65
30
30
MY13
MY14
MY14
MY15
36
KBSOUT13/GPIO63
KBSOUT14/GPIO62
GPIO32/D_PWM
GPIO45/E_PWM 22 T103
BATLED0# 29
SPI FLASH(KBC) W25X40BVSSIG : AKE37FN0N01 +3VPCU
30 MY15 35 KBSOUT15/GPIO61/XOR_OUT GPIO40/F_PWM/RI1 16 SUSLED# 29
MY16 34 81 CAPSLED# T106 U12
30 MY16 GPIO60/KBSOUT16 GPIO66/G_PWM
MY17 33 66 C_SPI_SDI_uR R281 22_4 SPI_SDI_uR_R 2 8
30 MY17 GPIO57/KBSOUT17 GPIO33/H_PWM/SOUT1 BATLED1# 29 SO VDD
R280 *100K_4 SPI_SDO_uR 5 7 C483
MBCLK SI HOLD
Battery 32 MBCLK 70 GPIO17/SCL1
MBDATA 69 SPI_SCK_uR 6 3 0.1u/10V_4
32 MBDATA GPIO22/SDA1 SCK WP
4 APU_SIC_EC APU_SIC_EC 67 SMB 113 CIRR_X2 T6
APU_SID_EC GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR KILL_SW_RF# R279 10K_4 C_PSPI_CS0#_uR 1
APU Thermal 4 APU_SID_EC 68 GPIO74/SDA2 GPIO34/SIN1/CIRRXL 14 T1 +3VPCU CE VSS 4
18 MXM_SMCLK12 MXM_SMCLK12 119 IR 23 IOArcade# T104
MXM_SMDATA12 120 GPIO23/SCL3 GPIO46/CIRRXM/TRST PROCHOT_EC W25Q16BVSSIG
18 MXM_SMDATA12 GPIO31/SDA3 GPO83/SOUT_CR/TRIST 111

1/13 Comfirm by vendor mail :


B TPCLK 72 86 C_SPI_SDI_uR If the Southbridge enables 'Long Wait Abort' by B
30 TPCLK GPIO37/PSCLK1 F_SDI/F_SDIO1
TPDATA 71 87 C_SPI_SDO_uR_R
30 TPDATA GPIO35/PSDAT1 F_SDO/F_SDIO0 default, the flash device should be 50MHz (or faster)
T4 ME_WR# 10 PS/2 FIU 90 C_PSPI_CS0#_uR
GPIO26/PSCLK2 F_CS0 C_SPI_SCK_uR_R
28 BT_POWERON# 11 GPIO27PSDAT2 F_SCK 92

8 PCH_SUSCLK R19 0_4 E775_32KX1 77 30 ECDB_CLOCK T102


GPIO00/32KCLKIN GPIO55/CLKOUT/IOX_DIN_DIO +3V
VCC_POR 85 VCC_POR# R21 47K/F_4 +3VPCU HWPG(KBC)
VCORF

12 VTT
AGND
GND1
GND2
GND3
GND4
GND5
GND6

T2 EC_PECI 13 104 VREF_uR R14 0_4 +A3VPCU +3VPCU R278 100K_4 R284
PECI VREF

NPCE791L 10K_4
5
18
45
78
89
116

103

VCORF_uR 44

HWPG
SM BUS ARRANGEMENT TABLE HWPG 30
D15 BAS316
39 HWPG_1.8V
SM Bus 1 Battery
L6 PBY160808T-250Y-N/3A/25ohm_6 D17 BAS316
36 HWPG_1V
C20 SM Bus 2 APU Thermal D18 BAS316
37 HWPG_1.5V
1u/6.3V_4 D14 BAS316
33 SYS_HWPG
E775AGND SM Bus 3 VGA
D16 BAS316
35 HWPG_1.1V

PALM REST THERMAL SENSOR (THM) POWER-ON SWITCH (KBC)


+3V

A SW1 A
R290 MISAKI_SW_H1.5
47K_4
NBSWON# 1 2 C_SPI_SDO_uR_R R283 22_4 SPI_SDO_uR
Near TP on TOP side and only for 3 4
2

TPD_TRIP 5
AMD platform Palm Rest use. D1 6
*VPORT_6
RT1
100K/F/NTC_4 (02/25) Quanta Computer Inc.
1

Per QSMC SMT request, change to


t Mitsubishi. C_SPI_SCK_uR_R R282 22_4 SPI_SCK_uR PROJECT : ZQG
Main: CU4100B0000 Size Document Number Rev
E775AGND Second: CU410000Z07 (MIT) 1A
WPCE791 & FLASH
Date: Monday, November 01, 2010 Sheet 31 of 41
5 4 3 2 1
5 4 3 2 1

PW_JACK (65W)
dcjk-2dc2003-000111-3p-v PL2 VA1 PD6 PR7
PJ1 UPB201212T-121Y-N_8 SBR1045SP5-13 PQ21 0.01_3720 VIN PQ22
1 1 FDD6685 FDD6685
2 VA 3 VA2 3 4 1 2 3 4
2

1
3 PL1
PC81 PC80 UPB201212T-121Y-N_8

1
0.1u/50V_6 2.2n/50V_4 PC1 PC2 PR1 VIN PC83 PC7 PR3
7
6
5
4

0.1u/50V_6 PD7 0.1u/50V_6 220K/F_4 0.1u/50V_6 2.2n/50V_4 33K/F_4


SMAJ20A

2
CSIP_1
D D
PD1
SW1010CPT 1 6
PR4
PR2 2 5 10K_4
D/C# 31
220K/F_4
3 4

3
For EMI
VA PQ1
IMD2AT108
+ VIN 2
EC7 EC6 PC82
22u/25V_1210 22u/25V_1210 *100u/25V_6.3*5.8 PQ2
CSIP_1 DMN601K-7

1
VIN

PC93
PR10 PR9 1u/16V_6
10/F_4 10/F_4

Item Color QCI P/N


PC11 PC121 PC92
0.1u/50V_6 PR127 2.2n/50V_4 4.7u/25V_8
65W Yellow DFPJ06MR012 4.7_6 PC95
1u/16V_6

27 CSIN
28 CSIP
ISL88731_VDDP

5
6
7
8
90W Blue DFPJ06MR013

33
32
31
30

26

21
C C

1
+3VPCU
4

CSSP

VDDP
NC
GND
GND
GND
GND

CSSN

VCC
PC98 PR11 PC12
0.1u/50V_6 2.7_6 0.1u/50V_6
+3VPCU 11 25 88731B_2 88731B_1 PQ23
VDDSMB BOOT AO4468 PR126
PL5 0.01_3720

3
2
1
MBDATA 9 24 ISL88731_UGATE 6.8uH
PR128 SDA UGATE BAT-V
1 2
100K_4

5
6
7
8
MBCLK 10 23 ISL88731_PHASE
SCL PHASE
PR8
13 20 ISL88731_LGATE 4 *4.7_6
31 ACIN ACOK LGATE

PR12 PC94 19
49.9/F_6 0.1u/50V_6 PGND PQ25
DCIN 22 AO4468 PC9
DCIN PR24 *680p/50V_6 PC85 PC88 PC84

3
2
1
PR13 10/F_4 2.2n/50V_4 10u/25V_1206 10u/25V_1206
82.5K/F_4 PU2
CSOP 18 CSOP CSOP_1
88731ACSET 2 ISL88731A CSOP_1
ACIN PC17
0.1u/50V_6
3 VREF
B
PR14
CSON 17 CSON BAT-V BAT-V
B
PL4 22K/F_4
UPB201212T-121Y-N_8 4 PR27
MBAT+ ICOMP 10/F_4
NC 16
BAT-V
C114F3-108A1-L_Batt_Conn 5
PC3 PC4 PL3 NC
0.1u/50V_6 100p/50V_4 UPB201212T-121Y-N_8 15 BAT-V
10 1 VBF
2 6 VCOMP
29 PR29
3 TEMP_MBAT GND 100/F_4

GND
4 TEMP_MBAT 31

ICM
NC

NC
5 PR6
6 100/F_4 PR5 PR28
7

14

12
7 100K_4 2.21K/F_4
9 8
+3VPCU
PJ2
PC6 PC5
47p/50V_6 47p/50V_6 PC100
.01u/50V_6
ISL88731 thermal pad
ICMNT
tie to Pin12
ICMNT 31
PR124 PR125
100/F_4 100/F_4 PC96 PC97 PC99
MBCLK 31 *1u/16V_6 .01u/50V_6 *0.01u/50V_6

MBDATA 31
A A

PU1
CM1293A-04SO
1 6 MBDATA
CH1 CH4
2 VN VP 5 +3VPCU Quanta Computer Inc.
TEMP_MBAT 3 4 MBCLK
CH2 CH3 PROJECT : ZQG
Size Document Number Rev
Add ESD diode base on EC FAE suggestion 1A
Charger(ISL88731A)
Date: Monday, November 01, 2010 Sheet 32 of 41
5 4 3 2 1
5 4 3 2 1

MAIND
MAIND 35,37,40
C-Test

VL
PR99 *Short_4
4,40 SYS_SHDN#

C-Test
C-Test
VIN
D VIN D
PR97
39K/F_4
+3VPCU
PC63
PC146
1U/6.3V_4 PR187
PC55
2.2n/50V_4
PC56
4.7u/25V_8
PC142
*4.7u/25V_8
3Volt +/- 5%
+
PC149
PC66
2.2n/50V_4
PC148
4.7u/25V_8
3V5V_EN 0.1u/50V_6 *0_4 TDC : 5.23A
C-Test
100u/25V_6.3*5.8 PEAK : 7A
PR98 PR100 VL
*Short_4 *Short_4 OCP : 8A
PR186 PR90
PC145 0_4 *0_4 Width : 220mil
1u/16V_6
+3VPCU

5V_EN

3V_EN
PC67
+5VPCU

5
6
7
8
PR93 4.7u/10V_6
5Volt +/- 5% 390K_4

+5VPCU TDC : 5.85A 8206_ONLDO REF 3V_DH 4 C-Test

8
7
6
5
PEAK : 7.8A PC144
0.1u/50V_6 PQ51
OCP : 8.5A PR92 AO4468

8
7
6
5
4
3
2
1
4 5V_DH 150K_4
Width : 240mil PL12

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

3
2
1
2.2uH/14A
PQ54 3V_LX
C-Test AO4468 PR185

5
6
7
8
9 32 REFIN2 200K/F_4
PL13 BYP REFIN2
10 31

1
2
3
2.2uH/8A OUT1 ILIM2 PR85
C 11 FB1 OUT2 30 C
5V_LX 12 PU9 29 SKIP 4 *4.7_6 +
PR188 DDPWRGD_R 13 ILIM1 RT8206B SKIP# DDPWRGD_R PC58 PC143
PGOOD1 PGOOD2 28

8
7
6
5
205K/F_4 5V_EN 14 27 3V_EN 0.1u/50V_6 330u/6.3V_6X5.7
PR191 EN1 EN2
15 DH1 DH2 26
+ *0_4 PR101 16 25 PC57
PC151 *4.7_6 5V_DL LX1 LX2 *680p/50V_6
4 37 PAD
330u/6.3V_6X5.7 36

3
2
1
PAD

PGND
PVCC
PC59 PQ52 PR87

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
PC65 0.1u/50V_6 AO4710 PR86 *0_4

NC
PC73 PC68 0.1u/50V_6 0_4
0.1u/50V_6 *680p/50V_6 PQ53 PR91

35
34
33

17
18
19
20
21
22
23
24
PR189 AO4710 PR96 1/F_6
1
2
3

0_4 1/F_6
3V_DL PR89
*0_4 PR184
*0_4
VL
+5VPCU_FB
PR190 *Short_6
2 PC62 PR192 *Short_6
PD10 1u/16V_6
CHN217 3 SKIP
PC64
1 0.1u/50V_6

PC61
PC147 2 0.1u/50V_6 PR95 *Short_6
0.1u/50V_6 PD5
CHN217 3
B B
L(ripple current) 1 L(ripple current)
=(9-5)*5/(2.2u*0.4M*9) =(9-3.3)*3.3/(2.2u*0.5M*9)
+15V_ALWP DDPWRGD_R
=2.525A +15V =1.9A SYS_HWPG 31
Iocp=8.5-(2.525/2)=7.24A PR94 Iocp=8-(1.9/2)=7.05A PR88
22_8 *Short_6
Vth=7.24A*14.2mOhm=102.77mV PC60 Vth=7.05A*14.2mOhm=100.11mV
R(Ilim)=(102.77mV*10)/5uA 0.1u/50V_6 R(Ilim)=(100.11mV*10)/5uA
~205.54K ~200.22K

VIN +3V_S5 +5V_S5 +15V +5VPCU +5VPCU +3VPCU +3VPCU

PR111 PR117 PR110 PR103

3
1M_6 22_8 22_8 1M_6
5
6
7
8

5
6
7
8

5
6
7
8
S5D 2
S5D MAIND
4 4
MAIND 4 +3V_S5
3

A PQ57 PQ58 PQ50


PQ10
AO3404
TDC : 0.62A A

1
30,31,35,40 S5_ON 2 AO4468 AO4468 AO4468 PEAK : 0.84A
2 2 2 +3V_S5
Width : 40mil
3
2
1

3
2
1

PR113 PQ20 PQ12


1

3
2
1
PQ19 1M_6 DMN601K-7 DMN601K-7
DTC144EU PQ11
+5V_S5
Quanta Computer Inc.
1

DMN601K-7
+5V_S5 +5V +3V
+5V +3V
3A TDC : 1.88A TDC : 2.85A TDC : 2.52A PROJECT : ZQG
PEAK : 2.5A 3.28A PEAK : 3.8A PEAK : 3.36A Size Document Number Rev
1A
Width : 80mil Width : 120mil Width : 100mil SYSTEM 5V/3V (RT8206)
Date: Monday, November 01, 2010 Sheet 33 of 41
5 4 3 2 1
5 4 3 2 1

8380CSN1
8380CSP1
PR151 49.9/F_4 +VCORE
C-Test
4 CPU_VDD0_FB_H PR55 *Short_4 SNS_POS_VDD_0 PR154 665/F_4 8380RSP1 PR63 0_4
VRON 30,31
PC113 PC115
D D
PC33 PR157 10K_4 100p/50V_4 6.8n/25V_4
100p/50V_4

4 CPU_VDD0_FB_L PR48 *Short_4 SNS_NEG_VDD_0 PR149 665/F_4 8380RSN1


+3V +1.5V

PR145 49.9/F_4 PR53


*330/F_4
PR65 VIN
1K/F_4 CPU_PWRGD_SVID_REG 4
Parallel
C-Test

2
PQ9 *AO3402 PC34

8380VREF 3 1

1
0.1U/50V_6

1
PR51 + PR61
27.4K/F_4 PC118 2.2/F_4
PR197 *0_4 100u/25V_6X5.8

2
PR59 Close to Phase
PC119

5
1000p/50V_4 Inductor
PC40 PC37 PC107
5.62K/F_4
PR172
OCP:12A
0.1u/50V_6 4.7u/25V_8 *4.7u/25V_8 PR156 10K_6_NTC
8380HDR1 4 3.92K/F_4 9A
PQ32 +VCORE

1
2
3
AOL1448 C-Test

4
8380RSN1

8380CSN1
8380RSP1

8380CSP1
8380SC
8380LX1 1 2

8380EN
+5VPCU +5VPCU

5
PC122 PR69 PL9
0.22u/25V_6 *2.2/F_6 1uH +
PC131
8380LDR1 330u/2V_7343

42
41

22
24
23
20
21
19
18
17
38
39
40
4

2
PD8
PC109 PR45 PC108 RB500V-40 PQ35

RSN1
RSP1
CSN1
CSP1

HDR1
SC

EN
GNDA
GNDA

PWR_OK

GNDA
GNDA
GNDA

1
2
3
C 1u/6.3V_4 22_6 470p/50V_4 PC41 AOL1718 PC43 C

1
PR68 *2.2n/50V_4 *1000p/50V_6 VIN
8380VREF 25 16 2_6
COMPV1 LX1 8380BST1
26 15
VDDA BST1
8380TSET
27
VREF PU6 LDR1
14 C-Test
28 13
8380ILIM TSET GNDP PC39
PC110
29
ILIM OZ8380 VDDP
12
1u/6.3V_4
30 8
0.22u/6.3V_4 SVD HDR2
31 10 +5VPCU

1
SVC BST2
32 9
8380VREF COMPV2 LX2 +

GNDA
GNDA

GNDA
GNDA
GNDA
+5VPCU

RSN2

CSN2
RSP2

CSP2
PR67 PC120

LDR2
VFIX

2
1

VIN
PG
2_6 8380HDR2 100u/25V_6X5.8
4 OCP:11A

2
PR41
43.2K/F_4 PQ34
8A
2

33
34

1
2
3
5
4
6
7
11
35
36
37

1
2
3
PD9 AOL1448 PC38 PC36
PR141 PR44 RB500V-40 0.1u/50V_6 4.7u/25V_8
8380RSN2

8380CSN2
8380RSP2

8380CSP2
0_4 2.55K/F_4 8380VFIX +NBCORE

8380VIN
PC123 PL8
PC111 0.22u/25V_6 1uH
C-Test
470p/50V_4 8380LX2 1 2

PR152 PR147 PC112 PR143 PC106 8380LDR2

4
5
*49.9K/F_4 49.9K/F_4 0.1u/10V_4 6.2K/F_4 1000p/50V_4 PR159
*2.2/F_6 +
PR155 PC133
4 3.92K/F_4 330u/2V_7343
PR64 1.91K/F_4 +3V
PQ33 Close to Phase

1
2
3
4 CPU_SVD CPU_SVD PR43 0_4 8380SVD AOL1718 PC124 PR57
CPU_COREPG 9,30 Inductor
PC44 *1000p/50V_6 5.62K/F_4
4 CPU_SVC CPU_SVC PR46 0_4 8380SVC *2.2n/50V_4 PR166
10K_6_NTC
8380VREF PR158 27.4K/F_4 VIN
PR50 PR60
32.4K/F_4 PC117 *4.99K/F_4 PR62
1000p/50V_4 2.2/F_4
B B
C-Test
PR144 49.9/F_4 PC35

4 CPU_VDDNB_FB_L PR47 *Short_4 SNS_NEG_VDD_1 PR146 1.2K/F_4 PC114 0.1u/10V_4 PC116


100p/50V_4 6.8n/25V_4
PC32
220p/50V_4

4 CPU_VDDNB_FB_H PR54 *Short_4 SNS_POS_VDD_1 PR148 1.2K/F_4 8380RSP2 8380CSP2


8380CSN2

PR150 49.9/F_4 +NBCORE

PR153
*100K/F_4

+3V
PR142 0_6

PR140 0_6

A A

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
1A
CPU Core (OZ8380)
Date: Monday, November 01, 2010 Sheet 34 of 41
5 4 3 2 1
5 4 3 2 1

C-Test
VIN
+5VPCU

D D
PR176
10/F_6 PC136 PC137

5
6
7
8
for EMI PD4 2.2n/50V_4 4.7u/25V_8 +1.1V_S5
RB500V-40
PR173 PR80
1M_4 2.2/F_6 PC50 4
PR79 4.7U/6.3V_6 C-Test
PU8 0_6 PQ45
G5602 AO4468
PR81 200K/F_4 PC52
15 13 0.1u/50V_6
30,31,33,40 S5_ON

3
2
1
EN/DEM BOOT
+3V UGATE-1.1V PL11
16 TON UGATE 12
1uH +1.1V_S5
1 VOUT PHASE 11 PHASE-1.1V
1.1Volt +/- 5%
PR84 2 VDD OC 10 PR78 TDC : 3.02A

5
6
7
8
C 10K_4 PC138 2.21K/F_4 C
0.1u/50V_6 3 FB VDDP 9 PC53 PR77 PEAK : 4A
1u/16V_6 *4.7_6
31 HWPG_1.1V 4 PGOOD LGATE 8 LGATE-1.1V 4 + OCP : 5A
6 7 Width : 120mil
GND PGND PC51
C12 : stuff 10k ohm 5 17 *680p/50V_6
NC TPAD PQ44
14 AO4710 PC135 PC49

3
2
1
NC 560u/2.5V_6X5.7 0.1u/50V_6
PC140 PC139
1u/16V_6 *1000P/50V_6

B
PR83
Rds*OCP=RILIM*20uA B
TON=3.85p*RTON*Vout/(Vin-0.5) 4.7K/F_4 PC54
Frequency=Vout/(Vin*TON) R1 *33p/50V_4

1.1V_FB
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K PR174
VOUT=(1+R1/R2)*0.75
+1.1V_S5 R2 10K/F_4

AO4710 Rdson=11.7~14.2mOhm
L(ripple current)
5
6
7
8
=(19-1.1)*1.1/(1u*272k*19)
~3.81A 33,37,40 MAIND
MAIND 4
Rth = 14.2mohm*(5-1.905)/200uA
A =2.194K PQ43 +1.1V A
AO4468
TDC : 2.73A PR175
PR82
*Short_6
*Short_6 Quanta Computer Inc.
PEAK : 3.64A
3
2
1

Width : 120mil PROJECT : ZQG


Size Document Number Rev
1A
+1.1V VCCP 1.1V(UP6111A)
Date: Monday, November 01, 2010 Sheet 35 of 41
5 4 3 2 1
5 4 3 2 1

C-Test
+1V
VIN
+5V_S5 1Volt +/- 5%
TDC : 6.5A
C13 PEAK : 8.5A
D PR165 D
change PR169 PN from 0ohm to 430kohm for timing issue 10/F_6 PC42 PC125 OCP : 10A

5
6
7
8
for EMI PD3 2.2n/50V_4 4.7u/25V_8
RB500V-40 Width : 260mil
PR168 PR71
1M_4 2.2/F_6 PC48 4 +1V
PR76 4.7U/6.3V_6

PU7 0_6 PQ38 C-Test


PR169 G5602 AO4468
430K_4 PC47
+1V_EN 15 13 0.1u/50V_6
30,31,37,39,40 MAINON

3
2
1
EN/DEM BOOT
+1V_TON 16 12 UGATE-1.05V PL10
+3V TON UGATE 1R0uH-3mR/15A
1 11 PHASE-1.05V
VOUT PHASE
PR73 +1V_VDD 2 10 PR74
VDD OC

5
6
7
8
10K/F_4 PC130 5.6K/F_4
0.1u/50V_6 3 9 PC45 PR164
FB VDDP 1u/16V_6 *4.7_6
4 8 LGATE-1.05V 4 +
C 31 HWPG_1V PGOOD LGATE C
6 GND PGND 7
PC126
5 17 *680p/50V_6
NC TPAD
C14 : stuff 10k ohm
14 PQ37

3
2
1
NC AO4710 PC132 PC134
PC127 PC129 560u/2.5V_6X5.7 0.1u/50V_6
1u/16V_6 *1000P/50V_6

PR70 *Short_6
PR72 *Short_6
VOUT=(1+R1/R2)*0.75
PR75
3.65K/F_4 PC46
R1 *33p/50V_4

+1V_FB
B B

PR163
10K/F_4 C15 : change PR75 PN from 3.57k to 3.65k
R2

TON=3.85p*RTON*Vout/(Vin-0.5) AO4710 Rdson=11.7~14.2mOhm


Frequency=Vout/(Vin*TON) L(ripple current)
A
TON=3.85p*1M*1/(Vin-0.5) =(19-1)*1/(1u*272k*19) A

Frequency=1/(0.0036767)=272K ~3.483A
Quanta Computer Inc.
Rth=14.2mohm*(10-1.741)/20uA
=5.863Kohm PROJECT : ZQG
Size Document Number Rev
1A
+1V(G5602)
Date: Monday, November 01, 2010 Sheet 36 of 41
5 4 3 2 1
5 4 3 2 1

D +0.75V_DDR_VTT D

TDC : 0.56A PC72


10u/10V_8
PEAK : 0.75A
Width : 40mil for EMI PC71
0.1u/50V_6 C-Test
8207A_VBST PR102 0_6
+0.75V_DDR_VTT
VIN
8207A_DH
PC75 PC74
10u/10V_8 10u/10V_8 8207A_LX

5
6
7
8
8207A_DL PC70 PC150 PC69
2.2n/50V_4 4.7u/25V_8 4.7u/25V_8
4

25

24

23

22

21

20

19
PQ55
AO4468

LL

DRVL
VTT

VBST
GND

VLDOIN

DRVH
C-Test

3
2
1
1 18 +1.5V_SUS
VTTGND PGND
PL14
2 17 1.5uH +1.5V_SUS
VTTSNS CS_GND
+SMDDR_VREF 1.5Volt +/- 5%

5
6
7
8
TDC : 0.08A 3 GND
RT8207A
PU10 CS 16 PR195 15K/F_4
+5V_S5
TDC : 8.6A
C-Test
PEAK : 0.1A 4 PR193 PEAK : 11.6A
+1.5V_SUS 4 15 *4.7_6 +
C Width : 10mil MODE V5IN PC155 OCP : 12A C
10u/10V_8
5 14 PR112 5.1/F_6 Width : 360mil
+SMDDR_VREF VTTREF V5FILT

3
2
1
VDDQSNS

VDDQSET

PC78 +5V_S5 6 13 PC153 PC76 PQ56 PC152


.033u/50V_6 COMP PGOOD 1U/6.3V_4 1U/6.3V_4 AO4710 *680p/50V_6 PC154

2
PR114 560u/2.5V_6X5.7
NC

NC
100K_4
S3

S5

+3V
7

10

11

12

FOR DDR III


HWPG_1.5V 31

PR120 (For RT8207A 400KHZ ) close to pc2008


VIN
620K/F_4

S5_1.8V PR123
SUSON 30,31,40
PR196 *Short_6 0_4
PR107 *Short_6
S3_1.8V PR122
MAINON 30,31,36,39,40
*0_4

1 2
4 CPU_VDDIO_SUS_FB_H PR115 *0_4

PC79 PR118
*33p/50V_4 10K/F_4
Vout = (PR126/PR130) X 0.75 + 0.75
B B

8207A_SET

L(ripple current)
PR121
10K/F_4
S5_1.8V PR119 *Short_4 S3_1.8V =(19-1.5)*1.5/(1.5u*400k*19)
~2.303A
VDDIO_FB_L 1 2 +1.5V_SUS Vtrip= 12-1.1513*14.2mohm=0.15405V
T176 PR194 *0_4 Rlimit= 0.154051/10uA=15.405Kohm
3

MAIND
33,35,40 MAIND
2
+1.5V
PQ17
TDC : 0.75A
AO3404 PEAK : 1A
1

S3 S5 +1.5VSUS REF VTT


Width : 40mil
+1.5V S0 1 1 ON ON ON

S3 0 1 ON ON OFF
A A
S4/S5 0 0 OFF OFF OFF

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
1A
DDR 1.5V(TPS51116)
Date: Monday, November 01, 2010 Sheet 37 of 41
5 4 3 2 1
1 2 3 4 5

C-Test
+5V_S5 +VGPU_CORE
VIN
1Volt +/- 5%
Frequency(PR141=200K) 300K TDC : 10.65A
PEAK : 14.2A
A +3V +3V_D_EXT PC8 PC90 PC91 PC89 A
PR18 SW @2.2n/50V_4 SW @4.7u/25V_8 SW @4.7u/25V_8 SW @4.7u/25V_8 OCP : 15A

5
SW @200K/F_4
PC22 SW @1u/10V_6 2 7 8792TON Width : 440mil
VDD TON
PR33 PR30 5 8792DH 4 PQ24 +VGPU_CORE
*SW @10K_4 SW @10K_4 PC18 SW @1u/10V_6 8792VCC DH
13 VCC
C-Test

1
2
3
6 8792BST
BST SW @AOL1448
17,39 PG_GPUIO_EN 14 PGOOD PR15 PC14 PL6
PR129 1 SW @1/F_6 SW @0.22u/25V_6 SW @0.36uH/30A
16,39 dGPU_PW REN *SW @0_4 EN PU3 8792LX
LX 4

+3V_D_EXT PR31 PR26 8792SKIP# 12 SW @MAX8792ETD+T


SW @0_4 *SW @0_4 SKIP# 8792DL
DL 3

5
PC21
PR202 SW @0.1u/10V_4 8792REFIN 10 PR16 + +
17 PX_MODE REFIN
*PX4@0_4 8 *SW @2.2/F_6
FB 8792DL 8792DL 4
4
for PX4.0 function ( BACO) REF-2V
PR32 8792REF 11 9 8792ILIM PC19 PQ26 PQ27

1
2
3

1
2
3
SW @100K_4 REF ILIM SW @2.2n/50V_4 SW @AOL1718 *SW @AOL1718 PC15
*SW @1000P/50V_6 PC10 PC86 PC87

EP
SW @0.1u/50V_6 SW @330u/2V_7343
SW @330u/2V_7343
B B
Rc

15
PR20 PR132 *Short_6
SW @40.2K/F_4 remove PQ27 for cose down.
PR22 PR130 *Short_6
SW @73.2K/F_4
Ra Place near GND pin15
PC13
PR17 SW @1000P/50V_4
3

SW @220K/F_4

PR21
2 SW @100K_4
14 GPU_VID1
PQ3
PR23 SW @DMN601K-7 Note: MAX8792 had integrate
SW @100K_4 PR25
discharge design.
1

Rd SW @49.9K/F_4

PC16
SW @.01u/16V_4
C
Rb Seymour - XT C

GPU_VID1 (GPIO15) GPU_VID2 (GPIO20) +VGPU_CORE


PR19
3

SW @110K/F_4 0 0 1.1V
1 0 1V
14 GPU_VID2 2

PQ4
0 1 0.9V
PR34 SW @DMN601K-7 1 1 0.85V
SW @100K_4
1

Ra Rb Rc Rd VREF

PC20
220K 110K 40.2K 49.9K 2V
SW @.01u/16V_4

Ra --> 220K/F_4 (CS42202FB01) Rb --> 110K/F_4 (CS41102FB13)


D Rc --> 40.2K/F_4 (CS34022FB15) Rd --> 49.9K/F_4 (CS34992FB10) D

Quanta Computer Inc.


PROJECT : ZQG
Size Document Number Rev
1A
GPU CORE(MAX8792)
Date: Monday, November 01, 2010 Sheet 38 of 41
1 2 3 4 5
5 4 3 2 1

+3VPCU
C-Test
+1.8V

C-Test
+1.8V
PC28
10u/10V_8
PC29
0.1u/25V_4
1.8Volt +/- 5%
PU4 HPA00835RTER
PH10_11_12
TDC : 3A
16 10
C-Test
VIN PH
PEAK : 4A
1 11 PL7
VIN PH 1uH_7X7X3 Width : 120mil
D 2 VIN PH 12 D

PR40 *Short_4 15 13
30,31,36,37,40 MAINON EN BOOT
54418-1.8_VFB 6 14 PC30 R1
VSNS PWRGD 0.1u/50V_6
PC31 COMP_PIN7 7 3 PR131
1000p/50V_4 COMP GND 100K/F_4
8 RT/CLK GND 4

PAD
PAD
PAD
PAD
PAD
PAD
HW PG_1.8V 31
9 SS AGND 5
PR36
15K/F_4 PR42 +3V 54418-1.8_VFB PC101 PC103 PC102

22
21
20
19
18
17
PR35 10K_4 R2 0.1u/25V_4 10u/10V_8 10u/10V_8
PC25 182K/F_4
*100P/50V_4 PC24
0.01u/25V_4
V0=0.8*(R1+R2)/R2 PR135
PC23 78.7K/F_4
1200p/50V_4

C03 VIN +15V +1V

PR198 PR199

3
C C
SW @1M_4 SW @1M_4

dGPU_D1 2
+1V_GPU

3
TDC : 2.5A
3
PQ59
PR200 SW @AO3404 Width : 100mil

1
PR201 PX4@0_4 2 PQ61 SW @1M_4 2
17,38 PG_GPUIO_EN
SW @DTC144EU PC156
+1V_GPU
PQ60 *2.2n/50V_4
PC157 SW @DMN601K-7
1

1
*1U/6.3V_4

VIN +1.5V_GPU +15V +1.5V_SUS


for PX4.0 function ( BACO)
PR203 *PX4@0_4
17 PX_MODE
PR182 PR177

5
6
7
8
B SW @1M/F_6 SW @22_8 PR183 B
SW @1M/F_6
PG_GPUIO_EN PR179 SW @0_6 DGPU_1.5V_ON_R 4
3

C03
3

3
PQ46
PR180 *SW @0_6 2 SW @AO4468
16,38 dGPU_PW REN
PQ47
2 2
+1.5V_GPU

3
2
1
PR178 SW @DMN601K-7
PR181
SW @1M/F_6
PQ48
SW @DMN601K-7
PQ49
SW @DMN601K-7 PC141
TDC : 2.1A
+1.5V_GPU
1

*SW @100K_4 *SW @2.2n/50V_4 PEAK : 2.8A


1

Width : 90mil

VIN +1.8V_GPU +15V +1.8V

PR139 PR134 PR138


3

C03 SW @1M/F_6 SW @22_8 SW @1M/F_6

A PG_GPUIO_EN PR133 SW @0_6 A


2
+1.8V_GPU
3

PR136
*SW @0_4 PQ30
TDC : 1.41A
+1.5V_GPU 2 SW @AO3404 PEAK : 1.88A
1

2 2
PQ29 Width : 60mil
PR137 PQ31 PQ28 PC105
+1.8V_GPU
Quanta Computer Inc.
PC104 SW @DMN601K-7 SW @1M/F_6 SW @DMN601K-7 SW @DMN601K-7 *SW @2.2n/50V_4
1

*SW @1U/10V_4
PROJECT : ZQG
1

Size Document Number Rev


1A
+1.8V /+1V_GPU / +1.5_GPU / +1.8_GPU
Date: Monday, November 01, 2010 Sheet 39 of 41
5 4 3 2 1
5 4 3 2 1

VIN +3V +5V +1.8V +1.5V +15V

PR116 PR104 PR105 PR171 PR106 PR109


1M_6 22_8 22_8 22_8 22_8 1M_6

MAINON_ON_G MAIND
D MAIND 33,35,37 D

3
3
PR108
MAINON 2 PQ18 1M_6 2 2 2 2 2
30,31,36,37,39 MAINON DTC144EU PC77
PQ13 PQ14 PQ42 PQ15 PQ16 *2200p/50V_4
DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7

1
PR66

1
*100K_4

VIN +5V_SUS +15V +5VPCU


VIN

Thermal protection PR160 PR170 PR167

3
PD2
C
SW1010CPT
1M_6 22_8 1M_6 +5V_SUS C

SUSD 2
TDC : 1.125A
PEAK : 1.5A

3
Width : 50mil

3
PQ40
PR161 AO3404

1
2 1M_6 2 2
PR39 30,31,37 SUSON PC128
+5V_SUS
1M_6 1 PQ41 PQ39 *2.2n/50V_4
PR162 PQ36 DMN601K-7 DMN601K-7

1
PQ6 *100K_4 DTC144EUA

1
2 AO3409
3

S5_ON 2
30,31,33,35 S5_ON

PQ7
1

DTC144EU PR38
VL VL *Short_6
B B

LM393_PIN8

PR52 PR56
1.2K/F_4 200K/F_4 PR37
200K_6
SYS_SHDN# 4,33
PC26
0.1u/50V_6
3
8

PR58
THERMISTOR_10K_6(NTC) 2.469V 3
+
1 2
LM393_PIN2 2 - PQ5
PU5A DMN601K-7
4

LM393 PC27
1

0.1u/50V_6

PR49
3

200K/F_4 5
A + A
7
6 -
S5_ON 2
PU5B
PQ8 LM393 Quanta Computer Inc.
DMN601K-7
PROJECT : ZQG
1

For EC control thermal protection (output 3.3V) Size Document Number Rev
Discharge /Thermal protection 1A
Date: Monday, November 01, 2010 Sheet 40 of 41
5 4 3 2 1
5 4 3 2 1

Model ZQE/G M/B BOARD


MODEL REV CHANGE LIST Page From To
1 1A 3A
ZQE/G M/B 3A C01 2 1A 3A
3 1A 3A
D
C02 PAGE18 : to slove the Power DVD issue , setting size to 256MB 4 1A 3A D
5 1A 3A
C03 PAGE39 : add PR210,PC157,PQ61,PR198,PR200,PR199,PQ60,PC156,PQ69 for GPU +1V power source . 6 1A 3A
7 1A 3A
changed control net from HWPG_1V to PG_GPUIO_EN
8 1A 3A
C04 PAGE13 : change the power source from +1V to +1V_GPU 9 1A 3A
10 1A 3A
C05 PAGE14 : change the power source from +1V to +1V_GPU
11 1A 3A
C06 PAGE16 : change the power source from +1V to +1V_GPU 12 1A 3A
13 1A 3A
C07 PAGE17 : change the power source from +1V to +1V_GPU 14 1A 3A
15 1A 3A
C08 PAGE18 : to solve the HDMI issue , remove R112,R118 from BOMs
16 1A 3A
17 1A 3A
C09 PAGE21 : Del D26 to slove HDMI issue.
18 1A 3A
C C10 PAGE26 : net PCBEEP connects with U11 by 10k ohm for AC pulg in /out function. 19 1A 3A C

20 1A 3A
C11 PAGE31 : Both MXM_SMCLK12 / MXM_SMDATA12 should be pull up to +3V by 10k ohm.
21 1A 3A
C12 PAGE35 : stuff 10k ohm 22 1A 3A
23 1A 3A
C13 PAGE36 : change PR169 PN from 0 ohm to 430K ohm for timing issue. 24 1A 3A
25 1A 3A
C14 PAGE36 : stuff 10k ohm
26 1A 3A
C15 PAGE36 : change PR75 PN from 3.57k to 3.65k 27 1A 3A
28 1A 3A
C16 PAGE38 : remove PQ27 for cose down. 29 1A 3A
C17 PAGE38 : remove PQ27 for cose down. 30 1A 3A
C18 PAGE5 : Add C674 to reduce CRT noise. 31 1A 3A
32 1A 3A
C19 PAGE5 : del R100 , add L58 to reduce CRT noise. 33 1A 3A
B
34 1A 3A B

35 1A 3A
36 1A 3A
37 1A 3A
38 1A 3A
39 1A 3A
40 1A 3A
41 1A 3A

Note :
1. Remove Jumper : JP7,JP11,JP1,JP2,JP3,JP4,JP5,JP6,JP8,JP9,JP10,JP12,JP13,JP14,JP15,JP16,JP17,JP18
A A
Quanta Computer Inc.
PROJECT : ZQG
Size Document Number Rev
1A
CHANGE LIST - 3A
Date: Monday, November 01, 2010 Sheet 41 of 41

Quanta Computer Inc. PROJECT: ZQE/G PCBA NO. REV: 3A DOC. NO :


ZQE/G APPROVED BY : Johnny O CHECK BY : Darren Liao DRAWING BY : Kenneth Huang DATE :10/18/2010 SHEET 1
5 4 3 2 1

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