Designing an Award-Winning mmWave RFIC: Experiences and Insights

Erik Öjefors, Mikael Andreasson, Torgil Kjellberg, Håkan Berg, Lars Aspemyr, Richard Nilsson, Klas Brink,
Robin Dahlbäck, Dapeng Wu, Kristoffer Sjögren and Mats Carlsson

2018 IEEE RFIC Best Industry

Paper Award

802.11ad 60-GHz RF transceiver chip

Erik Öjefors 1
 Outline
• Introduction of Sivers IMA AB
• Application of the 802.11ad standard for fixed-wireless access and backhaul
• Key performance parameters and design challenges
• Overview of the Keysight tools used in the design flow
• SystemVue, GoldenGate, and VTBs
• Chip design and simulation
• Architecture and key circuit blocks, beamformer, LNA, PA and VCO
• Modulated signals and EVM performance on transistor level, early feedback to system simulation
• Measurements and comparison to simulations
• Focus on modulated signals and EVM performance
• Link between simulations and measurements
• Conclusion and comparison to state-of-the-art

Erik Öjefors 2
 Sivers IMA Holding AB in Short

• Sivers IMA delivers key

technology for multi-Gbit/s fiber

Sivers IMA Holding AB

and wireless networks
• HQ in Stockholm, offices in Sivers IMA
Wireless
Glasgow and Gothenburg both
with sales, R&D and Lab CST Global
Fiber
• 100 employees and 15
consultants
• Listed at Nasdaq First North stock
exchange in Stockholm

Erik Öjefors 3
 The Road to Gigabit Speeds Goes Via mmWave
KEY RF COMPETENCE:
• mmWave
• 802.11ad/ay and 5G
• Phased array antennas
• Beam steering/ Beam
forming
• Low phase-noise
synthesizers

Erik Öjefors 4
 Outline
• Introduction of Sivers IMA AB
• Application of the 802.11ad standard for fixed-wireless access and backhaul
• Key performance parameters and design challenges
• Overview of the Keysight tools used in the design flow
• SystemVue, GoldenGate, and VTBs
• Chip design and simulation
• Architecture and key circuit blocks, beamformer, LNA, PA and VCO
• Modulated signals and EVM performance on transistor level, early feedback to system simulation
• Measurements and comparison to simulations
• Focus on modulated signals and EVM performance
• Link between simulations and measurements
• Conclusion and comparison to state-of-the-art

Erik Öjefors 5
 FWA and Backhaul with 60-GHz 802.11ad (WiGig)
• New FCC/ETSI rules drive new radio spec
– 40 dBm EIRP allowed with a low-gain
(typ. 20 dBi) antenna, requires
> 20 dBm TX power
– Frequency range 57-71 GHz
(previously 57-66 GHz), two extra
channels
• Half-channel 64/128/256 QAM
modulation for dense networks
Self-organizing mesh networks for 60GHz carrier-grade access
points with Gbit speed up to 500m distance based on 802.11ad – Phase noise, < 100 dBc@1MHz
Key performance parameters!

Erik Öjefors 6
 Our 802.11ad Solution for Infrastructure Equipment
Patch antenna PCB EIRP > 40 dBm coverage, full 57-71GHz BW

TX I/Q Beam-
forming
802.11ad TRX
16 TX/RX
Modem Ctrl Chip
20 dBi
4.62 Gbps antenna
16-QAM 20 dBm
array
TX Pwr
RX I/Q
SiGe
BiCMOS
Elevation: ± 9°deg (fixed beam) Azimuth: ±45°steering

• Challenging system design, baseband 0-1 GHz, severe timing requirements

• Rapid (<35 ns) steering over 64 beams
• Competitive market, demand for first-time right designs

Erik Öjefors 7
 Design Challenges (i)
Maximizing output power with acceptable EVM and DC power
• Modulations in 802.11ad are quite robust, operation close to P1dB possible
• OIP3 not useful when operating close to close compression!
• Predicting output power using 802.11ad waveform in envelope simulation

• Goal: Maximize output power with TX EVM < -21 dB (802.11ad spec)
• On transistor level in Cadence, check PA load and bias
• EVM partitioning (PA, VCO...) in system simulator

• Get constellation diagrams early in circuit design, great for intuitive

understanding
• AM-PM and unsymmetries

Erik Öjefors 8
 Design Challenges(ii)
Channel width 2 GHz, 57-71 GHz freq. range
• Frequency response not flat in either RF or analog BB
• Need to model EVM degradation and spectrum in system
simulator
High RF-slope example

Phase noise
• High phase-noise requirements, and a large band VCO tuning curves
• Two VCO cores and varactor/fix cap topology (fix caps+varactor)
• Large simulation matrix requires fast simulator Check overlap vs bias
and temp

High circuit complexity, 16 TX/RX paths and on-chip

frequency generation
• HB simulator speed and ability to handle large designs

Erik Öjefors 9
 Outline
• Introduction of Sivers IMA AB
• Application of the 802.11ad standard for fixed-wireless access and backhaul
• Key performance parameters and design challenges
• Overview of the Keysight tools used in the design flow
• SystemVue, GoldenGate, and VTBs
• Chip design and simulation
• Architecture and key circuit blocks, beamformer, LNA, PA and VCO
• Modulated signals and EVM performance on transistor level, early feedback to system simulation
• Measurements and comparison to simulations
• Focus on modulated signals and EVM performance
• Link between simulations and measurements
• Conclusion and comparison to state-of-the-art

Erik Öjefors 10
An 802.11ad Testbench for SystemVue and GoldenGate
Imported Analysis tools EVM, spectrum
GoldenGate FCE
model in SystemVue…
Base-band
Source Constellation
Constellation
Constellation

Up-conversion … or DUT
to 60 GHz position in VTB
RFSpectrum
RF
RF Spectrum
Spectrum Out
Out
Out

1997.5 1998 1998.5 1999 1999.5 2000 2000.5 2001 2001.5 2002 2002.5
1997.5
1997.5 1998
1998 1998.5
1998.5 1999
1999 1999.5
1999.5 2000
2000 2000.5
2000.5 2001
2001 2001.5
2001.5 2002
2002 2002.5
2002.5
Frequency (MHz)
Frequency
Frequency(MHz)
(MHz)

Erik Öjefors 11
 Virtual Test Bench - Using VTBs in Cadence Virtuoso
GoldenGate Circuit simulator can import SystemVue testbenches into Envelope
Transient (ET) simulation
SVE_Link component interfaces link SystemVue test bench with ports in schematic

EVM, constellation, and output power directly available in the Virtuoso environment

Oscillator
Frequency=2 GHz [FCarrier]
Power=0 dBm [InputPower]
SampleRate=5e+6 Hz [SymbolRate*Interpolation]

SymbolRate=1 MHz [SymbolRate]

RollOff=0.35
SquareRoot=YES SymbolRate=1 MHz [SymbolRate]
PulseEqualization=NO RollOff=0.35
Interpolation=5 [Interpolation] SquareRoot=YES
PulseEqualization=NO

Freq
Im Phase QUAD
Q OUT Freq DEMAPPER
Gray ••• ••• Phase
11010 Mod Q Im ••• •••
Node
Encoder ••• ••• I OUT
SVE_Link DeMod I Gray
MAPPER Re Amp
Amp Re ••• ••• Bits
Decoder 123
Bits Gray_Encoder Mapper Modulator
SVE_Link Demodulator Demapper Received_Bits
BitRate=4 MHz [SymbolRate*4] NumBits=4 ModType=16-QAM InputType=I/Q
BlockSize=2048 OutputType=I/Q ModType=16-QAM Gray_Decoder
SymbolRate=1 MHz [SymbolRate] FCarrier=2 GHz [FCarrier] NumBits=4
RollOff=0.35 SymbolRate=1 MHz [SymbolRate]
SquareRoot=YES RollOff=0.35
PulseEqualization=NO Spe c trum Ana ly zer Spe c trum Ana ly zer SquareRoot=YES
Interpolation=5 [Interpolation] PulseEqualization=NO 123
InputSpectrum OutputSpectrum Constellation

Erik Öjefors 12
 Outline
• Introduction of Sivers IMA AB
• Application of the 802.11ad standard for fixed-wireless access and backhaul
• Key performance parameters and design challenges
• Overview of the Keysight tools used in the design flow
• SystemVue, GoldenGate, VTBs
• Chip design and simulation
• Architecture and key circuit blocks, beamformer, LNA, PA and VCO
• Modulated signals and EVM performance on transistor level, early feedback to system simulation
• Measurements and comparison to simulations
• Focus on modulated signals and EVM performance
• Link between simulations and measurements
• Conclusion and comparison to state-of-the-art

Erik Öjefors 13
 Chip Architecture and Block Diagram
Separate TX/RX RF
beam-formers with
16+16 antenna paths
20-GHz dual VCO low-
phase-noise synthesizer
Zero-IF up/down
conversion architecture

Integrated TX/RX
analog baseband

Erik Öjefors 14
 RX Beamformer and Front-End – Design
Cascode LNA VCC LNA cascaded with a current shunting VGA gives 25 dB gain, 12 dB ctrl
NF = 4.5 dB RF Out+ Vector phase shifter
G = 15 dB Balun – Quadrature signals provided by differential -3dB coupler
xfmr – DAC controlled Gilbert cells used for vector combiner
RF Out-
VB

Bias Vector phase shifter

LNA VGA 6-bit I-word

90-deg coupler DAC Balun
RF In To 16:1
combiner

ESD Emitter
Termination 6-bit Q-word DAC
Stub degen

Erik Öjefors 15
 RX Beamformer and Front-End – Design
Passive modeling of the LNA + VGA block with Momentum
VCC
RF Out+
Balun
xfmr
RF Out-
VB

Ibias
VGA

RF In LNA

ESD Emitter
Stub degen

Initial design made with stand-alone passive EM-design verified with LNA+VGA global EM model in
models Momentum, < 1 dB difference in S21

Erik Öjefors 16
 Full RX-Chain Simulations with GoldenGate SSNA / Two-Tone
Ideal splitter
GoldenGate RX path simulation
1
Gain and NF for full RX (16 paths) vs. RF freq. and temp
2

Σ 9

10
11

12

13

14

15

16

Difficult simulation with 16 amplifier paths, mixers, BB

amplifiers with RF, LO, and BB freqs. (+harmonics)
Package and PCB model

Erik Öjefors 17
 TX Beamformer and Front-End – Design
Vector phase shifter
6-bit I-word
From 1:16 Diff. 90-deg coupler
DAC • Phase shifter similar to RX
splitter Two-stage PA
path
• Two-stage PA
– 1st stage current-
Termination 6-bit Q-word
DAC
shunting VGA
4-bit gain ctrl
VGA DAC
VCC
V
B VCC – Final stage differential
Ibias1
Q5
Ibias2
cascode
Q1
T1
Q7 Q9
T2 – Transformer matching
Q3
RF for max bandwidth
Q4
Out

RF In
– Simulated Psat =16 dBm
Q2 Q8 Q10

Q6

Erik Öjefors 18
 TX Beamformer and Front-End – Design
Optimization and modeling of the VGA + PA with ADS Momentum for gain flatness
4-bit gain ctrl V
VCC B VCC
VGA DAC
Ibias1 Ibias2
Q5

Q1
T1
Q7 Q9
T2
Individual passive models
Q3
RF
Global Momentum Model
Q4
Out

RF In
Q2 Q8 Q10

Q6

57-71 GHZ

Erik Öjefors 19
TX Simulation Strategy using VTBs in Cadence Environment
Classical HB circuit simulation output 802.11ad VTB simulation output

vs.

Gain compression AM-PM effect Spectrum, EVM, Power, and constellation diagram

Erik Öjefors 20
VTB Setup in Cadence Schematic and ADE/Explorer
GoldenGate Simulator settings in Analog Environment
• Choosing Envelope simulation
• Variables that can changed in the SystemVue
• Defining in/out ports in schematic window

Erik Öjefors 21
 VTBs, PA Analysis Example
Optimizing EVM for PA with 16QAM operating close to P1dB, where OIP3 might not give the full picture!

1.2

High AM-PM
0.96

0.72

0.48

0.24

y
-0.24

-0.48

-0.72

-0.96

-1.2
-1.203 -0.961 -0.719 -0.477 -0.235 7.5e-3 0.25 0.492 0.734 0.976 1.218

High AM-PM, conjugate match Lower AM-PM, load-pull match Lowest AM-PM, low Zload match
PA load impedance incorrectly tuned Typical constellation after load-pull Load optimized for maximum output
for max gain for max Psat/P1dB power with EVM at -21 dB limit

Erik Öjefors 22
 Low Phase-Noise LO Generation with 20-GHz VCO
Inductor in
both top Two 20GHz VCOs cover 57-71 GHz via X3
metals PN target -112 dBc@1MHz (20 GHz)

MIM cap bank

digital tuning GoldenGate HB Tuning Simulation

Stagger-biased
MOS varactors for
linear fine tuning
Switched resistor
bias for minimum
phase noise

Erik Öjefors
23
 Manufactured Chip
• 130 nm SiGe BiCMOS technology
• DC power 2.6W/RX and 5W TX

eWLB BGA Exposed die

for cooling

Chip to PCB RF
insertion loss
Ball pitch 500 um typically < 2 dB
Chip size 4.8x4.3 mm2
Erik Öjefors 24
 Outline
• Introduction of Sivers IMA AB
• Application of the 802.11ad standard for fixed-wireless access and backhaul
• Key performance parameters and design challenges
• Overview of the Keysight tools used in the design flow
• SystemVue, GoldenGate, VTBs, ADS Momentum for custom passives
• Chip design and simulation
• Architecture and key circuit blocks, beamformer, LNA, PA and VCO
• Modulated signals and EVM performance on transistor level, early feedback to system simulation
• Measurements and comparison to simulations
• Focus on modulated signals and EVM performance
• Link between simulations and measurements
• Conclusion and comparison to state-of-the-art

Erik Öjefors 25
 Chip Evaluation Results

• TX compression and EVM measurements

• RX NF and EVM measuremens
• Synthesizer phase-noise compared to simulations
• Beam-steering results with a PCB patch-array
antenna
• Over-the-Air (OTA) full system tests up to 10 Gbit/s

Erik Öjefors 26
 RF Measurements – TX Output Power
Psat 14 dBm
• Output power measured
OP1dB 12 dBm
on bare die
• Spread between antenna
paths < 1 dB
• Combined 16-antenna
OP1dB is 24 dBm, sufficient
Flat response
for 20dBm output power
57-71 GHz
with back-off

Erik Öjefors 27
 TX/RX Verification – EVM Measurement
Single-antenna setup supporting measurements with modulated signals
• Temp chamber capability

Keysight 802.11ad test setup

• High speed, high bandwidth oscilloscope for
digitalization of signal
• Arbitrary waveform generator

• DUT (TX or RX) in temp chamber (hidden)

• Spectrum analyzer with downconverter
• “Reference transmitter” used for RX measurements
• VSA software for signal analysis

Erik Öjefors 28
TX RF – Comparing SystemVue and Measured Constellation
TX constellation diagram close to P1dB with MCS12/16QAM

FCE simulated TX constellation in SystemVue Measured TX constellation with WWC Measured TX EVM -20.7 dB

Erik Öjefors 29
 RX Validation – NF measurement

Bare-die RX noise figure tested with noise source

• Only possible to test a single antenna path (out of 16)
• Some NF penalty due to 15 inactive power combiner inputs
• Simulations with GoldenGate SSNA used to predict results Single-path NF = 6 dB
for full 16 antenna configuration RX chain tuned high without package

Erik Öjefors 30
RF Measurements – Phase Noise at 60 GHz
• Measured Phase Noise
GoldenGate VCO sim – Better than -101dBc/Hz at
1MHz offset for the
complete frequency range
– Integrated phase noise,
-101 dBc@1 MHz
400kHz-1GHz = -33dBc
– Supports 128QAM SC in
2GHz BW
• Simulated Phase Noise
- Good conformity between
GoldenGate simulation and
measurements

Erik Öjefors 31
 Beamforming Measurements with PCB Antenna
16 x 2 vertical polarized antennas Azimuth beamsteering +-45 deg with 64 step beam-book
RX Array

40 dBm EIRP

Chip

TX Array

Covers 57-71 GHz bandwidth

Erik Öjefors 32
 Full TX-RX System Analysis using SystemVue and FCEs
After PA After LNA
P=9.7 dBm rms EVM -24.3 dB
EVM -24.9 dB
• Total effect of IQ imbalance, PN,
PA nonlinearity, LNA NF, Filtering
Path
loss LNA
• EVM degradation can be
observed along the signal path

Final EVM -24.3 dB

Before PA
P=0.3 dBm rms
EVM -33.2 dB
EVM -24.9 dB

Erik Öjefors 33
Full Hop Measurements – EVM Performance
MCS-12, 16 QAM results

Measured TX EVM is -28 dB

• Used as “Reference transmitter”
• Optimal settings used

Measured full hop EVM is -25 dB

• MCS -12 threshold -14.5 dB
• Performance is verified vs.
• Temp
• Freq
• VCC
• Bias
• Input power

Erik Öjefors 34
System Measurements – TX/RX OTA
• Custom modem used to access higher
order modulations than the standard
802.11ad ones
• Data rates up to 10 Gbit/s measured
- 128-QAM SC, full channel (1.6 Gbaud)
- MSE= -27 dBc
• 7 Gbit/s measured for half channel
– 256-QAM SC, 900Mbaud,
– MSE= -31 dBc
• Measured 45 degree off boresight

Erik Öjefors 35
 Outline
• Introduction of Sivers IMA AB
• Application of the 802.11ad standard for fixed-wireless access and backhaul
• Key performance parameters and design challenges
• Overview of the Keysight tools used in the design flow
• SystemVue, GoldenGate, VTBs, ADS Momentum for custom passives
• Chip design and simulation
• Architecture and key circuit blocks, beamformer, LNA, PA and VCO
• Modulated signals and EVM performance on transistor level, early feedback to system simulation
• Measurements and comparison to simulations
• Focus on modulated signals and EVM performance
• Link between simulations and measurements
• Conclusion and comparison to state-of-the-art

Erik Öjefors 36
Beamsteering 60GHz TRX Comparison

>40 dBm EIRP (20 dBi ant.)

Erik Öjefors 37
 Conclusion
• A 60-GHz 16-ch beam-steering transceiver demonstrated capable of +40dBm EIRP when used
with a 20 dBi PCB antenna array
• The frequency range 57-71 GHz covered with wide-band matching and VCO design techniques
• ADS Momentum used for custom inductors/transformers and full sub-circuit passive modelling
• Phase-noise performance of -101 dBc@ 1 MHz supports 256QAM modulation across OTA link
• GoldenGate and Virtual Test Benches (VTBs) used in circuit design on transistor level. Delivers
EVM and spectrum estimations with 802.11ad waveforms in the Cadence environment
• Fast Circuit Envelope (FCE) models exported to SystemVue to refine system simulation
• GoldenGate speed and convergence supported top level simulations of full TX/RX path

Erik Öjefors 38