Module 1

MODULE I
 Software Architecture of the 8086/8088

microprocessors–
Address space, Data organization, registers,
memory segmentation & addressing, stack,
I/O space.
 Assembly language programming and
program development.
Rajesh G R, Asst Prof, ECE, VAST 1

Intel 4004 Microprocessor
 Introduced in 1970
 First microprocessor
 4 bit architecture !
 2,250 transistors
 12 mm2
 Clock: 108 kHz

 8-bit architecture
 Still used in some
microcontroller
applications !

 33 mm2
 Clock: 5 MHz
 16 bit architecture

 43 mm2
 Clock: 16 MHz

 1,200,000 transistors
 81 mm2
 Clock: 25 MHz
 1st pipelined
implementation of
IA32

Intel Pentium Microprocessor
• Introduced in 1993
• 3,100,000 transistors
• 296 mm2
• Clock: 60 MHz
• 32 bit architecture
– 1st superscalar
implementation of IA32

Software architecture of 8086/8088

8086 Microprocessor Register
8086 Registers Category
Category Bit Register Name
General Purpose Register 16 AX,BX,CX,DX
General Purpose Register 8 AH,AL,BH,BL,CH,CL,DH,DL
Pointer Register 16 SP (Stack Pointer)

BP (Base Pointer)
Index Register 16 SI (Source Index)
DI (Destination Index)
Segment Register 16 CS (Code Segment)
DS (Data Segment)
SS (Stack Segment)
ES (Extra Segment)
Instruction Pointer Register 16 IP (Instruction Pointer)
Status Register (Flag) 16 DR (Flag Register)

General Purpose Registers
 This register is used for general data manipulation
 Normally used for storing temporary results
 Even CPU able to operate on the data stored in memory, the
same data can be process much faster if it is in register
 The function for 16-bit 8086 microprocessor register is as
follows
Register Function
AX Accumulator Register
For arithmetic, logic and data transfer operation
BX Base Register
Also as address register
CX Count Register
Used for loop counter, shift and rotate bits
DX Data Register
Used in division and multiplication also I/O operation

8-bit Data Division from 16-bit
 16-bit register can be divided into two 8-bit
register (i.e AX=AH&AL, BX=BH&BL,
CX=CH&CL, DX=DH&DL)
Figure 1: 8-bit Data Division from 16-bit

Segment Register
 Main memory management in 8086 use segment
concept
 The following show the usage of segment in memory
Segment Usage
Code (CS) Space to store program that will be executed
Data (DS) Space to store data that will be processed
Stack (SS) Special space to store information needed by

microprocessor to execute subroutine or
interrupt service
Extra (ES) Function is the same as DS

Instruction Pointer Register (IP)
 Register which stores instruction address to be executed
 Each time instruction is fetch from memory to be executed in
processor, IP content will be added so that it always show to the next
instruction
 If branch instruction, the IP content will be loaded with new value
which is the branch address
 All 16 bits wide, L/H bytes are not accessible
 IP is not under direct control of the programmer

Index Register and Pointer
 This registers is used for storing relative shifting
value for memory address location
 There are 2 pointer register:
 Stack Pointer (SP) – point to the top stack
 Base Pointer (BP) – used for fetch data in data segment
 There are 2 index register:
 Source Index (SI) – contains offset address for source
operand in data segment
 Destination Index (DI) - contains offset value for
destination operand in DS

Flag/Status Register
 Flag bit status register is used to determine flow control when
conditional branch instruction is executed
for example: ADD AL,1
JNZ 0100h
X = Undefined
SF = Sign Flag
OF = Overflow Flag
ZF = Zero Flag
DF = Direction Flag
AF = Auxiliary Flag
IF = Instruction Flag
PF = Parity Flag
TF = Trap Flag
CF = Carry Flag


 The logic state of these flags indicates

conditions that are produced as the result of
executing an instruction.
 Nine of its bits are implemented
 Six of these represent status flags:
 carry flag (CF), parity flag (PF), auxiliary flag (AF), zero
flag (ZF), sign flag (SF), and overflow (OF).

 Carry flag (CF):
 CF is set if there is a carry-out or a borrow in for MSB of the result during the
execution of an arithmetic instruction
 Parity flag (PF):
 set if the result produced by the instruction has even parity
 Auxiliary carry flag (AF):
 set if there is a carry-out from the low nibble into the high nibble or a borrow-in
from the high nibble into the low nibble of the lower byte in a 16-bit word.
 Zero flag (ZF):
 ZF is set if the result of an arithmetic or logic operation is zero.
 Sign flag (SF):
 The MSB of the result is copied into SF. Thus SF is set if the result is a negative
number or reset if it is positive.
 Overflow flag (OF):
 When OF is set, it indicates that the signed result is out of range.

 Control flags
 These flags alter the sequence of program execution
Interrupt enable flag (IF) ):

for 8088 to recognize maskable interrupt requests at its INT
Trap flag (TF)
if TF is set, the 8088 goes into the single-step mode of operation
Direction flag (DF)
determines the direction in which string operations will occur
When 0 auto increment and if 1 auto decrement

Features of 8086
 8086 has 16-bit ALU.
 It has 16-bit data bus, so it can read data or write data to memory or I/O
ports either 16 bits or 8 bits at a time.
 It has 20 address lines, so it can address up to 220 i.e. 1048576 = 1Mbytes
of memory (words i.e. 16 bit numbers are stored in consecutive memory
locations.
 8086 includes few features, which enhance multiprocessing capability (it
can be used with math coprocessors like 8087, I/O processor 8089 etc.)
 Operates on +5v supply and single phase (single line) clock
frequency.(Clock is generated by separate peripheral chip 8284).
 8086 comes with different versions.
8086 runs at 5 MHz,
8086-2 runs at 8 MHz,
8086-1 runs at 10 MHz.

Features of 8086
 It can generate 16 I/O address
 Provides 14, 16 bit registers
 Possible to perform bit, byte, word and block operations in 8086
 Designed to work in 2 modes
 Minimum mode and maximum mode
 It has multiplexed address and data bus due to which the pin count is
reduced considerably.
 When 8086 is reset the contents of IP are 0000 H and contents of CS are
FFFF H. Other registers are cleared to 0000 H.
 It fetches up to 6 instruction bytes from memory and store in queue.
 Higher Throughput (Speed) (This is achieved by a concept called
pipelining)
Fetching the next instruction while current instruction is under execution is
called pipelining.

8086 Internal Block Diagram

Pin diagram 8086
MAXIMUM MINIMUM
MODE MODE
GND 1 40 Vcc
AD14 AD15
AD13 A16,S3
AD12 A17,S4
AD11 A18,S5
AD10 A19,S6
AD9 /BHE,S7
AD8 MN,/MX
AD7 /RD
AD6 /RQ,/GT0 HOLD
AD5
8086 /RQ,/GT1 HLDA
AD4 /LOCK /WR
AD3 /S2 IO/M
AD2 /S1 DT/R
AD1 /S0 /DEN
AD0 QS0 ALE
NMI QS1 /INTA
INTR /TEST
CLK READY
GND 20 21 RESET

Architecture of 8086
 Internally divided into 2 separate functional units
 Bus interface unit [BIU] contains
• Instruction queue
• Segment registers
• Instruction pointer
• Address adder
 Execution unit [EU] contains
• Control circuitry
• Instruction decoder
• ALU
• Pointer and Index register
• Flag register

Architecture of 8086
 Execution unit [EU]

 Tells the BIU from where to fetch instructions or data, decodes and
executes instructions. It contains
 Control circuitry
 Instruction decoder
 ALU
 Register organization
 Flag register
 General purpose register
 Pointers and index registers

Memory Address Space and Data
Organization

Memory address space

 The 8088’s 1Mbyte memory address space is
organized from software point of view as
individual bytes of data stored at consecutive
addresses over range 0000016 to FFFFF16.
 can access any two consecutive bytes as a
word of data
 words of data can be stored at either even- or
odd-address word boundary

Storing a word in data memory

 misaligned word
 word of data stored at an odd-address boundary
 0000116, 0000316
 aligned word
 A word stored at an even-address boundary
 0000016 , 0000216

Memory Segmentation
• Two types of memory organizations
• Linear addressing
• Entire memory space is available to the processor in one linear array
• Segmented addressing
• Memory space is divided into segments
• x86 Memory Partitioned into Segments
– maximum size is 64K (16-bit index reg.)
– can have 4 active segments (CS, SS, DS, ES)
– 2-data; 1-code; 1-stack
• Rules for Memory segmentation
• 4 segments can overlap for small programs. In a minimum system all 4 segments
can start the address 00000H
• The segment can begin/start at any memory address which is divisible by 16.

Memory Segmentation
15 0
Code Segment CS
Data Segment DS
Stack Segment SS
Extra Segment ES
15 0
Instruction Pointer }
IP
Stack Pointer
Base Pointer
SP
BP }
Source Index
Destination Index
SI
DI }

Memory Segmentation
 Advantages of memory segmentation
Allow the memory capacity to be 1Mb even though the addresses

associated with the individual instructions are only 16 bits wide.
Facilitate the use of separate memory areas for the program, its data and
the stack.
Permit a program and/or its data to be put into different areas of memory
each time the program is executed.
Multitasking becomes easy

Generation of 20 bit address
CS:IP
DS:SI
ES:DI
SS:BP
SS:SP

Generation of 20 bit address

The Stack
 The stack is used for temporary storage of

information such as data or addresses; for
instance when a CALL is executed the 8088
automatically PUSH the current value of CS
and IP onto the stack.
 Other registers can also be pushed
 Before return from the subroutine, POP
instructions can be used to pop
values back from the stack into the
corresponding registers.
Top of Stack(TOP)
The memory location where a word was
most recently stored. (Data is available)
PUSH
Decrements the SP by 2 .
When sp contains 0000H, further push will
result in stack overflow .
POP
Increments the SP by 2.

The Stack

Input/Output Address Space
 The 8088 has separate memory and
input/output (I/O) address space.
 The I/O address space is the place where

I/O interfaces, such as printer and terminal
ports, are implemented.
 It can address upto 64Kbyte I/O locations.
 The 16-bit DX register is used as 16-bit

address pointer to address upto 64k devices
in indirect addressing mode.
 I/O instructions with direct addressing mode

can directly address one or two of the 256
I/O byte locations in page 0.
 I/O addresses are only 16 bits long.
 Each of these addresses corresponds to

one byte-wide I/O port.

Programming the 8086/8088
Machine language Assembly Language

Sequence of binary codes for the Uses 2,3,or 4 letter mnemonics
instructions. to represent each instruction.
(MOV , ADD).
It is the form required by the
machine. Assembler
Drawbacks Convert the ALP to MLP

Difficult
Easy for an error to occur.

Addressing Mode
8086 Addressing Modes

for accessing data
Addressing modes provide

convenience in accessing
data needed in an
instruction.

Immediate
Addressing
 The source operand is a

constant.
 can be used to load

information to any registers
except the segment registers
and flag registers.
 operands come immediately

after the opcode
•EXP: MOV AX,2550H

MOV CX,625
MOV BL,40H

Register Addressing
 Registers are used to hold

the data.
 Memory is not accessed

(hence is fast).
 Source and destination

registers must match in size.
Exp: MOV BX,DX

MOV ES,AX
ADD AL,BH
MOV CL,AX(error)

Memory Addressing

Memory Direct
Addressing
• The data is in memory

• The address of the operand
is provided in the instruction
directly
• The address is the offset
address
• The physical address can be
calculated using the content in
the DS register
•Exp1: MOV DL,[2400]
Exp2: MOV AL,99H
MOV [3518],AL

Register Indirect
Addressing
The address of the memory

location is in a register (SI,
DI, or BX only)
•The physical address is

calculated using the content
of DS.
•EXP: MOV CL,[SI]

MOV [DI],AH
MOV [SI],AX

Based Addressing with
displacement

Indexed Addressing
with displacement

Based Indexed Addressing
One register must be a Base register and the other must be an Index register.
For ex. MOV CX, [BX][BP] is an invalid instruction.

Based Indexed Addressing with
Displacement

Fixed Port Addressing
IN - Used for reading an input port.
Out – Used for writing to an output port.

INSTRUCTION SET OF 8086
Classified into 7 categories
• Data Transfer
• Arithmetic
• Logical
• Control
• Processor Control Instructions
• String Manipulation
• Interrupt Control

Data Transfer Instructions
 MOV dest, src Note that source and destination cannot be memory
location. Also source and destination must be same type.
 PUSH Src : Copies word on stack.
 POP dest : Copies word from stack into dest. Reg.
 IN acc, port : Copies 8 or 16 bit data from port to accumulator.
 a) Fixed Port b) Variable Port
 OUT port,acc
 LES Reg, Mem : Load register and extra segment register with words from
memory.
 LDS Reg,Mem : Load register and data segment register with words from
memory.
 LEA Reg,Src: load Effective address.(Offset is loaded in specified register)
 LAHF: Copy lower byte of flag register into AH register.
 SAHF: Copy AH register to lower byte of flag

Arithmetic Instructions
ADD dest, src
ADC dest, src : Add with carry
AAA : ASCII adjust after addition.
We can add two ASCII numbers directly and use AAA after addition
so as to get result directly in BCD. (Works with AL only)
DAA : Decimal adjust accumulator. ( Works with AL only)
SUB dest, src
SBB dest, src: Subtract with borrow.
AAS: ASCII adjust for subtraction( Same as AAA and works with AL only)
DAS : Decimal adjust after Subtraction.( Works with AL only)
MUL src
IMUL src: Multiplication of signed byte.
AAM: BCD adjust after multiply.( Works with AL only)
DIV src If any one attempts to divide by 0 , then ?
IDIV: Division of signed numbers
AAD: BCD to Binary convert before Division.
DEC dest

MUL Instruction
This instruction multiplies an unsigned multiplication of the accumulator by the

operand specified by op. The size of op may be a register or memory operand.
MUL op
Example: ; AL = 21h (33 decimal) ;

; BL = A1h(161 decimal )
MUL BL ; AX =14C1h
MUL BH ; AL times BH, result in AX
MUL CX ; AX times CX, result high word in DX, ; low word in AX.
Flags : MUL instruction affect AF, PF,SF and ZF

DIV Instruction
Unsigned Division of AX by R8 and store quotient in AL and remainder in AH
Unsigned Division of DX AX by R16 and store

Quotient in AX and
Remainder in DX
Flags : All Flags are undefined after a DIV instruction.

Logical Instructions
AND dest, src : AND corresponding bits of two operands
NOT dest : Invert each bit in destination
OR dest, src
XOR dest, src
RCL dest, count : Rotate left through Carry If rotate once count is
directly specified in the instruction. For more no.of
rotations count is specified in CL register.
RCR dest, count : Rotate right through carry
ROL dest, count : Rotate left ( into carry as well as into LSB)
ROR dest, Count : Rotate right ( into carry as well as into MSB)
SAL/ SHL dest, count : Shift left and put 0in LSB.
SAR dest, count : Shift right New MSB = Old MSB
SHR dest, count : Shift right .MSB is filled with 0’s.

AND Instruction
This Performs a bitwise Logical AND of two operands. The result of the operation is
stored in the op1 and used to set the flags.
AND op1, op2
To perform a bitwise AND of the two operands, each bit of the result is set to 1 if and
only if the corresponding bit in both of the operands is 1, otherwise the bit in the
result is cleared to 0.
AND BH, CL ;AND byte in CL with byte in BH result in BH

SHR and SHL: for shifting left / right unsigned numbers
SAR used Shifting right a signed number
SHL is also called as SAL, as method for shift left of signed or unsigned number is the
same

CMP INSTRUCTION
CMP dest, src CF, ZF and SF are used
Ex .CMP CX,BX
CMP basically performs Subtract operation.
Result of CMP is not stored in destination.
It is stored in Temp register.
Temp is not accessible to programmer.
Only Flags are affected based result of subtraction.
CX-BX

CONTROL TRANSFER INSTRUCTIONS
CALL : Call a procedure
Two types of calls
i) Near Call ( Intrasegment) ii) Far Call ( Intersegment)
RET : Return execution from procedure
JMP : Unconditional Jump to specified destination.

Two types near and Far
JA / JNBE: Jump if above / Jump if not below

The terms above and below are used when we refer to the
magnitude of Unsigned number. Used normally after CMP.
JZ, JNZ,JC and JNC used after arithmetic operation

JE, JNE, JB, JNAE, JAE and JNB are used after a compare operation.

JB / JNAE: Jump if below/Jump if not above nor equal
JE/ JZ: Jump if equal/Jump if zero
JCXZ Jump if the CX register is zero
Conditional Jumps based on multiple flags are used after a CMP (compare)
instruction.
JBE / JNA : Jump if below or equal / Jump if not above
JAE / JNB / JNC :Jump if above or equal/Jump if not below/Jump if no carry.
In all above conditional instructions the destination of jump is in the range

of -128 to + 127 bytes from the address after jump.

LOOP mem : Loop to the specified label if CX not equal to Zero.
Used for backward jump only.
LOOP AGAIN is almost same as: DEC CX
JNZ AGAIN
The count is loaded in CX reg. Every time LOOP is executed then

CX is automatically decremented . ( Used in delay programs.)
LOOPE/ LOOPZ: Loop while CX not equal to zero and ZF = 1.
LOOPNE / LOOPNZ: Loop while CX not equal to zero and ZF = 0.
In all above LOOP instructions the destination of jump is in the

range of -128 to + 127 bytes from the address after LOOP.

PROCESSOR CONTROL
CLC: Clear Carry flag.
STC : Set carry Flag
CMC : Complement Carry Flag
CLD: Clear Direction Flag.
STD: Set Direction Flag
CLI : Clear Interrupt Flag.
STI : Set Interrupt Flag.
HLT: Halt Processing.
NOP : No Operation

STRING CONTROL
MOVS/ MOVSB/ MOVSW deststringname,srcstringname

This inst moves data byte or word from location in DS to location in
ES.
REP / REPE / REPZ / REPNE / REPNZ

Repeat string instructions until specified conditions exist. This is
prefix instruction.
CMPS / CMPSB / CMPSW Compare string bytes or string words.
SCAS / SCASB / SCASW Scan a string byte or string word.

Compares byte in AL or word in AX. String address is to be loaded in
DI.
STOS / STOSB / STOSW Store byte or word in a string.
Copies a byte or word in AL or AX to memory location pointed by
DI.
LODS / LODSB /LODSW
Load a byte or word in AL or AX Copies byte or word from
memory location pointed by SI into AL or AX register.
MOVS (MOVe String) instruction
Used for copying a string byte or word at a time.

Flags are not affected by the execution of MOVS/MOVSB/MOVSW
instruction.
It is usual to have REP (for REPeat) prefix for MOVSB / MOVSW

instruction.
Example
MOV CX, 06
REP MOVSB

CMPS (CoMPare Strings) Instruction
• CMPS Compares two strings (of equal size), say String1 and String2, a
byte or word at a time.
• String values remain unaffected.
• Only flags affected.
• It performs the subtraction DS:[SI] - ES:[DI] CMPSB for comparing Strings
Byte at a time.
Normally CMPSB or CMPSW instructions are used to check if two given strings
are same or not.
To check for equality, REPE (Repeat while Equal) prefix is used.

STOS (STOre String) instruction
• STOS is used for creating a string in memory a byte or word at a time.
• AL/AX contents copied to memory pointed by ES:[DI].
• It does not affect any flag.
• STOSB is used for storing string byte at a time.
• STOSW is used for storing string word at a time.
• Flags are not affected by the execution of this instruction.

Use of REP prefix with STOSB
Above 4 instructions are equivalent to

the 9 instructions on the right
(assuming D = 0)

LODS (LOaD String) instruction
LODS is used for processing a string in memory a byte or word at a time.
It copies contents of memory pointed by DS:[SI] into AL or AX.
It does not affect any flag.
LODSB is used for loading string byte at a time.
LODSW is used for loading string word at a time.

SCAS (SCAn String) instruction
SCAS is used for scanning a string in memory for a particular byte or word.
It compares contents of byte in AL or word in AX with byte or word at memory
pointed by ES:[DI].
SCAS performs AL/AX contents minus byte or word pointed by ES:[DI].
Operand values are not changed.
Flags are affected based on result of subtraction.
Flags affected based on CMP instruction

Normally SCASB or SCASW instructions are used to check if a particular byte
or word is present in the given string.

Interrupt Control
INT type
INTO Interrupt on overflow
IRET Interrupt return

Assembler Directives
ASSUME
- The ASSUME directive is used to tell the assembler that the name
of the logical segment should be used for a specified segment. The
8086 works directly with only 4 physical segments.
Example:
ASSUME CS:CODE ; This tells the assembler that the logical segment
named CODE contains the instruction statements for the program
and should be treated as a code segment.
DB - Defined Byte.
DB directive is used to declare a byte type variable or to store a byte
in memory location.
Example
PRICE DB 49h, 98h, 29h ;Declare an array of 3 bytes, named as
PRICE and initialize.
NAME DB ‘ABCDEF’ ;Declare an array of 6 bytes and initialize with ASCII
code for letters
TEMP DB 100 DUP(?) ;Set 100 bytes of storage in memory and give
it the name as TEMP, but leave the 100 bytes uninitialized. Program
instructions will load values into these locations.
DD - Defined Double Word
DQ - Defined Quad Word
DT - Define Ten Bytes
DW - Define Word
END
END directive is placed after the last statement of a program to tell
the assembler that this is the end of the program module.
ENDP End of a procedure

ENDS - End Segment
This ENDS directive is used with name of the segment to indicate
the end of that logic segment.
Example:
CODE SEGMENT - Hear it Start the logic segment containing code
Some instructions statements to perform the logical operation

CODE ENDS ;End of segment named as CODE

EQU – Equate
This EQU directive is used to give a name to some value or to a
symbol. Each time the assembler finds the name in the program, it
will replace the name with the value or symbol you given to that
name.
Example:
FACTOR EQU 03H
EVEN - Align on Even Memory Address

END

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MODULE I

 Software Architecture of the 8086/8088

Rajesh G R, Asst Prof, ECE, VAST 1

Rajesh G R, Asst Prof, ECE, VAST 2

Rajesh G R, Asst Prof, ECE, VAST 3

Rajesh G R, Asst Prof, ECE, VAST 4

Rajesh G R, Asst Prof, ECE, VAST 5

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Pointer Register 16 SP (Stack Pointer)

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Figure 1: 8-bit Data Division from 16-bit

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Data (DS) Space to store data that will be processed

Stack (SS) Special space to store information needed by

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 The logic state of these flags indicates

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Interrupt enable flag (IF) ):

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 Execution unit [EU]

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 Advantages of memory segmentation

Allow the memory capacity to be 1Mb even though the addresses

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 The stack is used for temporary storage of

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 The I/O address space is the place where

 It can address upto 64Kbyte I/O locations.

 The 16-bit DX register is used as 16-bit

 I/O instructions with direct addressing mode

 I/O addresses are only 16 bits long.

 Each of these addresses corresponds to

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Machine language Assembly Language

Drawbacks Convert the ALP to MLP

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8086 Addressing Modes

Addressing modes provide

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 The source operand is a

 can be used to load