DESIGN AND SIMULATION OF GAET-ALL-

ROUND NANOWIRE FE’T

Introduction: -
Field Effcet Trasnistor: -

“Field Effcet Trasnistors or FE’Ts can be classified into three different categories; Junction type FE’Ts, Metal
Oxide-Semicondctor (MOS) type FE’Ts and Metal Semicondctor (MES) type FE’Ts. Junction type FE’Ts are
generally used in analog circuits likely as in audio equipment, and MOS type FE’Ts or MOSFE’Ts are used mostly
in digital Interagted Circuits such as in microcomputers”. Metal Semicondctor type FE’Ts are mostly used in
amplification of microwaves as it is used in satellite broadcasting transceivers. Field Effcet Trasnistors are
generally made up of three regions i.e. a gaet, a soruce and a drian. “Field Effcet Trasnistors are voltage controlled
device. When a voltage is placed at the gaet terminal, it controls the current flowing from the soruce to the drian
of the transistor”. Field Effcet trasnistors have a very high input impedance; it ranges from some mega ohms (MΩ)
of resistance to much larger resistance. The high input impedance makes the trasnistor to have very little current
run through them”.

“Therefore, FE’Ts draw very little current from the power soruce of the circuit. Thus, this is better as they do not
disturb the original power soruce circuit elements to which they are connected. So they would not make the power
soruce to be loaded down. The disadvantages of FE’Ts are that they won’t provide the same amplification as of
bipolar trasnistors”. But the cost effcetiveness and the lesser consumption of power and controllability of current
makes it a better choice than BJTs.

“Among all types of the Field Effcet Trasnistors, MOSFE’T was the most promising FE’T because of its better
performance than any other FE’Ts like JFE’T or MESFE’T. MOSFE’T or Metal Oxide Semicondctor Field Effcet
Trasnistor is a type of Field Effcet Trasnistor that works by changing the width of the channel and along with the
charge carriers flow. The wider the channel’s width, the better the conductivity of the MOSFE’T. Based on the
nature of the channel i.e. elecrtons (n-type) or ho’les (p-type), the MOSFE’T is named. Elecrtons or ho’les enter
the channel from the soruce, and exit via the drian”. The width of the channel is controlled by varying
the voltage on an electrode called the gaet, which is placed between the soruce and the drian and is separated from
the channel by an extremely thin layer of metal oxide.

MOSFE’T was later replaced by FinFE’T. FinFE’T or as Fin Field Effcet Trasnistor, is a type of non-planar
trasnistor used to design madern processors. It is built on an SOI (silicon on insulator) substrate. FinFE’T designs
use a conducting channel that rises above the insulator, creating a thin fin shaped structure of silicon which is
the gaet electrode. The fin-shaped gaet allows multiple gaets to operate on a single trasnistor. Fin field-effcet
trasnistors became the most suitable device architecture for production beyond the 32 nm. Because they offer
higher electrostatic control over the channel compared to Metal Oxide Semicondctor FE’Ts (MOSFE’Ts).

When the fin width in a FinFE’T is reduced, channel width variations created undesirable variability and mobility
loss. So one of the promising and reliable replacement could be the Gaet-All-Around Field Effcet Trasnistor.
Moreover, Gaet-All-Around FE’Ts have better speed and power and is smaller compared to FinFE’Ts. Gaet-All-
Around FE’T is a device in which the gaet is placed on all four sides of the channel. It is basically a silicon
nanowire where the gaet is surrounding it.

Nanowire is a thin wire like structure whose dimensions is in some few of nanometers. It has got better gaet
control over the channel curre,nt allowing shorter channels and nice performance. Its diameter comes in some
nanometers, however its length ranges from few nanometers to few microns. Due to its one dimensional structure
they transport elecrtons easily. Gaet All Around Field Effcet Trasnistor have high aspect ratio than FinFE’T and
MOSFE’T. Gaet-All-Around FE’T has been classified into two types; horizontal and vertical. It has many better
properties than MOSFE’T and FinFE’T, because of which it has acquired the limelight of using it in different
applications. “There are different ways of synthesizing the nanowire,” one is “bottom up approach” and the other
is “top down approach”. “Chemical Vapour Deposition (CV’D), Vapour liquid solid growth and electrochemical
deposition” are the methods used in the bottom up. Lithography method is widely used in the top down approach.
“Nanowire’s conductivity is dependent on the edge effects” which arise from the atoms that lies on the nanowire
surface. Nanowires has been widely used in biological applications, medical field, memory applications, etc.
“Gaet-All-Around Field Effcet Trasnistor” has good current conductivity, increased ON current and desolate “sub
threshold voltage”, threshold voltage and “Drian Induced Barrier Lowering”.

Mathematical Madel: -

DIBL: -

It is the potential barrier that an elecrton has to overcome to move from soruce to drian. In normal state i.e. V’ds=0
and Vgs=0, there exists a potential barrier that obstructs the elecrtons from flowing from soruce to drian. When a
gaet voltage is applied it lowers down this barrier till that point where elecrtons can flow. Ideally, this should be
the only voltage that should affect the potential barrier. But, as the size of the channel is reduced, drian voltage
increases, widening the drian depletion region till a point where the potential barrier is reduced.
𝑉𝑡1−𝑉𝑡2
DIBL=│ │
𝑉𝑑1−𝑉𝑑2

Subthreshold Slope: -

In Gaet-All-Around Field Effcet Trasnistor, it is ideally assumed that current only flows through the channel
when VGS>VTH. But in reality, current even flows through the channel when VGS is below the threshold
voltage(Vth), but it is weaker in magnitude. The “voltage produced is the subthreshold voltage”. The subthreshold
slope is defined as how much is the ratio between the ON and OFF currents. To achieve high on and off current
ratios, we need to have low subthreshold slopes such that in the same VGS can decrease the drian current.

∂VGS
S= or
𝜕𝑙𝑜𝑔𝐼𝐷𝑆

S=nVTln10, where ideally n=1

Drift Diffsuion Made Space: -

The Drift Diffsuion Made Space (DDMS) madel is a semi classical way to transport in devices with strong
transverse confinement. The madel “is decoupled into Schrodinger equation in transverse direction and 1D
transport equations in each sub-band”. “It gives all the quantum effcets in transverse direction and also inherits
mobility, impact ionizatiom, recombniation and band-to band tunnnelling. However, the madel can only be used
in devices with uniform cross-section as the quantum mechanical coupling between elecrton sub-bands is
neglected”.
“Drift-Diffsuion madel” in each “sub band” and characterized by “sub band index”  and effcetive mass index b
is described by

1 ∂Jvb
q ∂x
=Rb-Gb

∂Evb ∂nvb
Jvb= qbnb ∂x -qDvb ∂x ,
“where Jb(x) is the sub band current”, “nb(x) is the sub band carrier density, and Eb(x) is sub band Eigen
energy. Mobility b(x) is defined by mobility madels and generally dependent on material, longitudinal electric
field, doping, and temperature”. Diffsuion coefficient “Db(x) is related to mobility by”:

∂nvb −1
Db= b) (∂Evb)
Recombniation rates Rb(x) are calculated by taking into account recombniation of a particular elecrton or ho’le
sub-band with all ho’le or elecrton sub bands
𝑛v𝑏𝑝λ𝑏′ −𝑛𝑖 2
Rb=Rbb='
𝜏v𝑏λ𝑏′

Total impact ionizatiom genearation rates are computed by taking a sum over all elecrton and ho’le sub-bands:

Gtotal=  αnvb │Jb│+ αpλb │Jλb│


Genearation Recombniation: -

Carrier genearation-recombniation “is the process through which the semicondctor material attempts to return to
equilibrium after being disturbed from it”. Recombniation of ho’les and elecrtons is a process in which both
elecrtons and ho’les annihilate each other i.e. elecrtons fall into the empty state which is linked with the ho’le.
After which both the carriers disappear in the process. The energy difference of the elecrton between the initial
and final state is given off. In radiative recombniation the energy emitted is in the form of a photon and in the case
of non-radiative recombniation it is passed to one or more phonons.

Shockley Hall Read recombniation: -

“Shockley Read Hall” or “SHR recombniation, does not occur” in perfectly pure, material. It is a two-step process;
they are: Firstly, if an “elecrton or ho’le” is “trapped by an energy state in the forbidden region which is introduced
through gaps in the crystal lattice. These gaps can either be unintentionally introduced or intentionally added to
the material (doping)”. Second one is if a ho’le or an elecrton moves up to the exactly same energy state before
the elecrton is thermally emitted into the conduction band, then it recombines.

The net recombniation rate for trap assisted recombniation or Shockley Hall Read recombniation is given by: -

𝑝𝑛−𝑛𝑖 2
USHR= 𝐸𝑖−𝐸𝑡 Ntth
𝑝+𝑛+2𝑛𝑖 cosh( )
𝑘𝑇

Auger Recombniation: -

“Auger recombniation involves three particles. An elecrton and a ho’le which recombine in a band-to-band
transition but rather than emitting the energy as heat or as a photon”, the energy is given off to another elecrton
or ho’le. The expression for the net recombniation rate is:

UAuger=n n(np-𝑛𝑖 2 )+ p p(np-𝑛𝑖 2 )

Band to Band Recombniation: -

If a “sufficiently high electric field exists within a device, band bending may be sufficient to allow elecrtons to
tunnel, by internal field emission, from the valence band into the conduction band. An additional elecrton is
therefore generated in the conduction band and a ho’le in the valence band. Band-to-band recombniation depends
on the density of available elecrtons and ho’les. Since both elecrtons and ho’les need to be available in the
recombniation process”. “The rate is expected to be proportional to the product of n and p” i.e. elecrtons and
ho’les. But, in thermal equilibrium the recombniation rate must equal with the genearation rate. Since the product
of n and p equals ni2 in thermal equilibrium, the net recombniation rate can be expressed as:
Ub-b=b(np-𝑛𝑖 2 )

We have used Kane band–to-band tunnnelling in our project. In Kane’s band to band tunnnelling, “the bands are
deformed and tunnnelling occurs between two points where energies of the valence and conduction bands coincide
in the presence of an electric field E (x)” applied along the x-direction. In this madel, the tunnneling genearation
rate is given by:
𝑒 2 𝐸 2 𝑚𝑟 1/2 𝐸𝑜
KaneE)= exp(− ), where
18пℎ2 𝐸𝑔1/2 𝐸

п√𝐸𝑔3 𝑚𝑟
Eo=
2𝑒ℎ

Schrodinger-Poisson Madel: -

The “n.schro parameter of a madel statement enables the coupled Schrödinger-Poisson madel for elecrtons and
the p.schro parameter statement enables the Schrödinger-Poisson madel for ho’les. For a cylindrical coordinate,
Schrodinger equation is solved in radial direction for different orbital quantum numbers and for all slices
perpendicular to the axis”. For the quantum confinement of one dimension, the calculation of the quantum elecrton
density depends upon a solution of a 1D Schrodinger equation solved using eigen state energies Eix) and wave
functions ix,y).
ℎ2 ∂ 1 ∂ψ
− ( ) + Ec(x, y)ψEivψ
2 ∂y 𝑚𝑣 (𝑥,𝑦) ∂y

Where, (x, y) is a spatially dependent effcetive mass in y-direction for the v-th valley and EC (x, y) is a conduction
band edge. For equation of ho’les, we substitute ho’le effcetive masses instead of elecrton ones and valence band
edge -EV(x,y) instead of EC(x,y).

Result: -

Parameters V’d=0.05V V’d=0.05V with V’d=0.07V V’d=0.07V

GR with GR
Threshold Voltage (Vt) 0.676268 0.658803 0.4394219 0.156886
Subthreshold Voltage (SS) 0.0182895 0.0574811 0.0332351 0.0286072
ON Current (Ion) 1.024E-006 1.04258E-006 2.48968E-006 4.94412E-006
OFF Current (Ioff) 1.5324E-017 5.208E-014 1.79978E-017 1.03014E-012

Table 1: -List of parameters for GAA NW architectures: threshold voltage (VT), sub-threshold slope (SS),
OFF-current (IOFF), ON-current (ION)

676.268−0.43942
DIBLwithout GR=│ 0.05−0.7
│=364.38mV/V

658.803−156.886
DIBLwith GR==│ 0.05−0.7
│=772.18mV/V
Fig 1: Id-Vg Graph at V’d=0.7V with and without GR

Fig 2: Id-Vg Graph at V’d=0.05V with and without GR.

Fig 3: Id-Vg Graph compared at V’d=0.05V and V’d=0.7V with GR

Fig 4: Id-Vg Graph compared at V’d=0.05V and V’d=0.7V without GR

Fig 5: Id-V’d Graph at Vg=1.5V with and without GR

Fig 6: Id-V’d Graph at Vg=1V with and without GR

Fig 7: Id-V’d Graph compared at Vg=0.5V, Vg=1V and Vg=1.5V with GR

Fig 8: Id-V’d Graph compared at Vg=0.5V, Vg=1V and Vg=1.5V without GR

Fig 9: Elecrton Concentration at V’d=0.05V without GR

Fig 10: Elecrton Concentration at V’d=0.05V with GR

Fig 10: Elecrton Concentration at V’d=0.7V with GR

Fig 10: Elecrton Concentration at V’d=0.7V without GR

Fig 11: Comparison of elecrton concentration at V’d=0.05V with and without GR

Fig 12: Comparison of elecrton concentration at V’d=0.7V with and without GR

Fig 13: Net Doping Profile of Gaet All Around Silicon Nanowire

Fig 14: Elecrton Density of Curremt at V’d=0.7V with GR

Fig 15: Elecrton Density of Curremt at V’d=0.7V without GR

Fig 16: Elecrton Density of Curremt at V’d=0.05V with GR

Fig 17: Elecrton Density of Curremt at V’d=0.05V without GR

Fig 18: Comparison of Elecrton Density of Curremt at V’d=0.05V and V’d=0.7V with GR
Fig 19: Comparison of Elecrton Density of Curremt at V’d=0.05V and V’d=0.7V without GR

Fig 20: Comparison of Elecrton Density of Curremt at V’d=0.05V with and without GR
Fig 21: Comparison of Elecrton Density of Curremt at V’d=0.7V with and without GR