Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
A novel current-mode (CM) first-order all-pass (AP) inverse filter has been presented. The proposed circuit has two
inputs and a single output with both the inputs providing the first-order all-pass inverse responses independently. The circuit
employs bare minimum number of both active and passive components, viz. one each of CDTA, capacitor and resistor. The
output current is available at high impedance thereby making the circuit very attractive from the viewpoint of cascadibility.
The realizibility condition is simple. The theoretical results are verified by PSPICE simulation.
Keywords: All-pass inverse filters, Current differencing transconductance amplifier, Current-mode circuits, High output
impedance
Fig. 1. The inputs p and n produce difference current The proposed circuit is shown in Fig. 3. The
which is transferred to the z terminal and the voltage analysis of the circuit yields the following transfer
at the z terminal is converted into a set of output function:
currents by a dual output transconductance stage. The
port relationships characterizing CDTA are given by I 2 − I1
Io =
1 − sCR
Vp = Vn = 0, Iz = Ip – In, Ix = ± gVz 1 + sCR
where Vp, Vn and Vz represents the voltages at p, n and 1
with the realizability condition
= 2 R , where g is the
z terminals respectively. g
CDTA can be implemented using the bipolar transconductance gain of CDTA.
transistors as shown in Fig. 2. The transistors T1-T11 When I1=Iin and I2=0,
forms the input stage, i.e. the current differencing
circuit followed by a transconductance amplifier Io 1
=−
implemented by employing transistors T12-T24. I in 1 − sCR
The transconductance gain g of the CDTA is given 1 + sCR
by When I2=Iin and I1=0,
IB Io 1
g= =
2VT I in 1 − sCR
1 + sCR
where IB is the bias current and VT ≅ 26 mV at a
temperature of 27°C. The circuit thus provides both inverting and non-
inverting types of first-order AP inverse filters.
2.2 Non-ideal analysis
In non-ideal case, the CDTA can be characterized
by the following port relations
Vp=Vn=0, Iz=αpIp-αnIn, Ix=gVz
Fig. 1 — Schematic symbol of CDTA where αp =1-εp and εp(│εp│<<1) denotes the current
Fig. 3 — Proposed CM all-pass inverse filter From the above equations it is clear that the pole
frequency is not influenced by the current tracking
errors of the CDTA.
3 Simulation Results
The proposed circuit was simulated using a
PSPICE simulation program. The CDTA was realized
using the bipolar transistor implementation shown in
Fig. 2.The NPN and PNP transistors used in the
circuit were simulated using the parameters of
NP100N and PR100N respectively from ALA400
from AT&T23. The supply voltages were taken as
±3V and the bias currents are I1=I2=I3=I5=100µA.
The circuit was designed for a phase shift of 90° at
26.5 KHz. The designed values to obtain the response
were taken as R= 100 Ω, C = 60 nF and g = 5 mS.
The gain and phase responses of the simulated circuit
Fig. 4 — Simulated all-pass response for I1= Iin and I2=0 are shown in Figs 4 and 5 respectively. The simulated
results obtained agree with the theoretical
calculations.
4 Conclusions
A novel first-order all-pass inverse filter with two
inputs and a single output employing a single CDTA,
one capacitor and one resistor is presented. The circuit
employs minimum number of active and passive
components, has high impedance output providing
cascadibility feature to the circuit and realizability
condition is simple.
References
1 Wilson B, IEE Proc G, 137 (1990) 63.
2 Toumazou C, Lidjey F J & Haigh D, Analog IC Design: The
Current-Mode Approach (Peter Peregrinus, UK), 1990.
3 Abuelmaatti M & Tasadduq N A, Int J Electron, 85 (1998)
Fig. 5 — Simulated all-pass response for I2=Iin and I1=0 483.
4 Higashimura M, Electron Lett, 27 (1991) 1182.
896 INDIAN J PURE & APPL PHYS, VOL 46, DECEMBER 2008
5 Cam U, Ciekoglu O, Gulsoy M & Kuntman H, Frequenz, 54 14 Keskin A U, Biolek D, Hancioglu E & Biolkova V, AEU- Int
(2000) 7. J Electron Commun, 60 (2006) 443.
6 Maheshwari S & Khan I A, Int J Electron, 88 (2001) 773. 15 Keskin A U & Biolek D, IEE Proc Circuit Devices Syst, 153
7 Maheshwari S & Khan I A, Int J Electron, 90 (2003) 79. (2006) 212.
8 Horng J W, Hou C L, Chang C M , Chung W Y , Liu H L & 16 Shah N A, Iqbal S Z & Quadri M, Electronic World, 111
Lin C T, Int J Electron, 93 (2006) 613. (2005) 48
9 Shah N A & Malik M A, Indian J Pure & App Phys, 34 17 Tangsrirat W & Surakampontorn W, Frequenz, 60 (2006) 11.
(2005) 206. 18 Uygur A & Kuntman H, IEEE MELECON, (2006) 23.
10 Biolek D, Proc of ECCTD 2003, vol. III, Krakow, Poland, 19 Comer D T, Comer D J & Gonzalez J R, IEEE Trans CAS -
2003, p 397. II, 44 (1997) 856.
11 Biolek D & Biolkova V, Proc of the CSCC 2003, Corfu, 20 Toker A, Ozoguz S , Cicekoglu O & Acar C, IEEE Trans
Greece, 2003, p 8. CAS-II, 47 (2000) 949.
12 Biolek D & Gubek T, Internet J Electron Lett. com, (2004). 21 Ahmed M T, Khan I A & Minhaj N, Int J Electron, 83
13 Uygur A, Kuntman H & Zeki A, Proc of ELECO 2005: The (1997) 201.
4th International Conference on Electrical and Electronics, 22 Gift S J G, Microelectron J, 31 (2000) 9.
Bursa, Turkey, 2005, p 46. 23 Frey D R, IEE Proc G, Circuit Devices Syst, 40 (1993) 406.