Acer Aspire 1551 Ao721 SJV10-NL 48.4HX01.0SB - 1 - 0131 Acer Aspire 1551 PDF

5 4 3 2 1
Project code: 91.4HX01.001

JV10-NL Block Diagram PCB P/N : 48.4HX01.0SB
SYSTEM DC/DC
RT8223 34
REVISION : SB INPUTS OUTPUTS
Slot 0 DDRIII Channel A 5V_S5(6A)
DDRIII 800 18 DCBATOUT
Clock Generator AMD 3D3V_S5(6A)
ICS9LPRS480BKLFT
3 Slot 1 ASB2 CPU PCB STACKUP SYSTEM DC/DC
D
DDRIII 800 DDRIII Channel B RT8209E 35 D
17 4,5,6,7
TOP
INPUTS OUTPUTS
DCBATOUT 1D5V_S3(7.5A)
OUT
HyperTransport GND
IN
LINK0
16x16 S SYSTEM DC/DC
RT8209E 36
RS880M S INPUTS OUTPUTS
FRAME BUFFER
CRT GND
RGB CRT DCBATOUT 1D1V_S0(11A)
DRR3 1GMBIT Side port HyperTransport LINK0 CPU I/F 20
BOTTOM RT9026 35
10 DX10 IGP
LVDS/TVOUT/TMDS LVDS 2CH
LCD 5V_S5 DDR_VREF_S3
WXGA+ 19
DISPLAY PORT X2
Giga LAN RT9025 37
Side Port Memory
RJ45 MDI PCIE Digital Display HDMI
1 X16 PCIE I/F 21 3D3V_S5 1D1V_S5
24 AR8151
CONN 23
C
1 X4 PCIE I/F WITH SB C
RT9025 37
6 X1 PCIE I/F
PCIE 8,9,10,11 3D3V_S5 CPU_VDDR
WEBCAM 19
A-Link
4X4
Mini-Card PCIE+USB 2.0 USB 2.0 BLUETOOTH
31
WLAN & 3G SB800 CHARGER
26 ISL88731A
USB 2.0
38
USB2.0 (14)+1.1(2)
USB x 3 31
INPUTS OUTPUTS
SATA III (6 PORTS)
MIC IN HD AUDIO 4 X1 PCIE GEN2 I/F CHG_PWR
CODEC AZALIA Card Reader 18V 6.0A
INT. CLK GEN. SD/MMC
INT MIC ALC271 22 RTS 5138 DCBATOUT
GB MAC
25
MS/MS Pro/xD25 UP+5V
HW MONITOR 5V 100mA
B PCI/PCI BDGE CPU DC/DC B
INT. RTC SATA SATA HDD 31 ISL6265AHR 33

LINE OUT EC INPUTS OUTPUTS
HD AUDIO VCC_CORE_S0_0
LPC I/F 0~1.55V 18A
SPI I/F VCC_CORE_S0_1
DCBATOUT
2CH SPEAKER ACPI 1.1 12,13,14,15,16 0~1.55V 18A
VDDNB
0~1.55V 18A
LPC Bus LPC debug 30
KBC
SPI
NPCE781B
29
A
CPU FAN SJV10-NL
A
SMB PS/2 KBC Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thermal
Flash ROM Touch Int. Block Diagram
Sensor Size Document Number Rev
2MB 30 PAD31 KB29 A3
G792 28 -1
www.vinafix.vn
SJV10-NL
Date: Tuesday, January 05, 2010 Sheet 1 of 42
5 4 3 2 1
5 4 3 2 1
Power on Sequence required:
SB800:
1, +3.3VDUAL ramp before +1.1VDUAL >1 mS >1 mS
2, +3.3V ramp before +1.8v CPU_LDT_RST#
3, +1.8V ramp before +1.1v (SB TO CPU)
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us A_RST#/PCI_RST#
(SB OUTPUT)
6, 50uS <= All power rails except +3.3VALW_R <= 40mS
7, 100uS <= +3.3VALW_R <= 40mS CPU_PWROK
(SB TO CPU) >1 mS Req.
RS880: CPU_CLKP/N running

1, 0 <(+3.3V) - (+1.8v) < 2.1 (CPU INPUT CLK)
D D
2, +1.8V ramp before +1.1v >1 mS Req.
3. +1.1V ramp before VCC_NB -22 mS-500ms for extenal gen. NBPWRGD,
For SB800, SB gen NBPWRGD
HT_REFCLKP/N running
(NB INPUT CLK)
>1 mS Req. VCC_NB(all NB power) valid before NB_PWRGD.
SB OUTPUT NB_PWRGD
NB_PWRGD_IN
SLP_S3# 1V1DUAL_PWRGD
SB INPUT SB_PWRGD 1)+1.5V SWITCH TO +1.5VDUAL 2)LASSO_PWRON 3)LPCPD# for TPM 4) TO SB&KBC SYS_RST# 1V5_PWRGD/DNI
+1.2V_PWRGD KBC_GPIO77/DNI
+1.2V_PWRGD
RC=~22ms VCC_NB should not ramp before 1.1v
VCC_NB
RC=~4.7ms
VLDT
GROUP B
VRM_PWRGD AND 1V8_PWRGD
+1.1V
VRM_PWRGD
RC=0
CPU_VDDR
RC=0
CPU_VDD_RUN
RC=0
CPU_VDDNB_RUN
VDDA_PWRGD
GROUP A
C C
+2.5V_LDO
(CPU_VDDA_2.5_RUN)
+1.5V
1V8_PWRGD
RC=0
+1.8V
+5V/+3.3V
RUN_EN_HIGH
RUN_EN_LOW
VDD_BOOST_LOW
to S3
SLP_S3#
VDRAM_PWRGD
CPU MEM CTL &
DDR3 SODIMM PWRS MEM_VTT VTT only will be shut down in S3 mode, and VTT for DDR3 SODIMM only.
MEM_VREF
CPU_VDDIO_SUS
SLP_S5#
Power button from EC to SB

PWR_BTN#_EC
20mS
CPU_THM/SB/SB_SCL1/2 delay +3.3VDUAL RC=~40ms
SB_KB/SPI/LPC ROM PWRS RSMRST#
When IMC, it's same signals for PBT.
V3V5DUAL_PWRGD
B B
1V1DUAL_PWRGD
SYSTEM_DUAL_PG
+5VDUAL/+3.3VDUAL/+1.5VDUAL/+1.1VDUAL
DUAL RAILS When IMC, always on at all time( always PWR)
When IMC,always high
per shorting JU3000 HDR VDD_DUAL_EN
VDD_DUAL_EN_EC
Power button pressed

PWR_BTN#_HW
PWR_BTN#_SB
KBC is ready
AC not present scenario = LOW AC present= high
AC_OK
(ACIN detect)
KBC is powered by
A_VBAT & +3.3VALW +5VALW/+3.3VALW stays active if AC present
LDO:5.4V stays active if AC present

(from DCIN)
USB Battery inserted/AC IN
+VIN/+12V_HD stays active if AC present
Pair Device A_VBAT
0 USB1(HS)
1 MINICARD1
2 NC
3 NC
4 Cardreader
A A
5 USB2
6 USB3
7 Blue Tooth
PCIE Routing 8 NC
SJV10-NL
LANE1 LAN 9 WECAM Wistron Corporation

10 NC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LANE2 MiniCard1 11 MINIC2(3G sim)
Title
LANE3 MiniCard2 12 MINIC2(3G) Table of Content
13 NC Size Document Number Rev
www.vinafix.vn
A2
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
3D3V_S0
3D3V_CLK_VDD
R1
1 2 3D3V_S0
MGB1005G601EBP-GP R2
1
C4 C5 C6 C7 C8 C9 1 2 3D3V_48MPW R_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C1
-1 Change R1 to bead (68.00373.001)
1
2R3J-GP C10 C11
SC10U10V5KX-2GP
2
2
DY SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
2
2
3000mA.80ohm
D D
3D3V_S0
R3
1 2
0R3J-0-U-GP SB X1 change to smaller
DY package(82.30005.A51) SC12P50V2JN-3GP
1D1V_S0 1D1V_CLK_VDDIO R5 C12
R4 1 DY 2 1 2
1 2
MGB1005G601EBP-GP 10MR2J-L-GP
1
1
C13 C16 C17 C18 C19 3D3V_CLK_VDD X1 -1 Change C12,C20 to 12pF.
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
-1 Change R4 to bead X-14D31818M-50GP
U1 82.30005.A51
(68.00373.001)
2
2
1D1V_CLK_VDDIO 2nd = 82.30005.C51
2
26 61 GEN_XTAL_IN SC12P50V2JN-3GP
VDDATIG X1 GEN_XTAL_OUT
25 VDDATIG_IO X2 62 1 2
48 SRN0J-10-GP-U C20
VDDCPU CLK_SMBCLK
47 VDDCPU_IO SMBCLK 2 4 1 SMBC0_SB 13,17,18
3 CLK_SMBDAT 3 2
SMBDAT SMBD0_SB 13,17,18
16 VDDSRC
17 RN38 3D3V_S0
VDDSRC_IO RN1
-1 Change R7 to bead 11 VDDSRC_IO ATIG0T_LPRS 30 CLK_NB_GFX 9
3D3V_CLK_VDD 29 8 1 CLKG_PD#
(68.00373.001) 35
ATIG0C_LPRS
28
CLK_NB_GFX# 9
7 2 W LAN_CLKREQ#
R7 VDDSB_SRC ATIG1T_LPRS W LAN2_CLKREQ#
34 VDDSB_SRC_IO ATIG1C_LPRS 27 6 3
5 4
1 2 40 VDDSATA
C MGB1005G601EBP-GP 4 23 LAN_CLKREQ# 23 SRN10KJ-6-GP C
VDD CLKREQ0#
1
C21 55 45
SC1U10V2KX-1GP VDD_REF 56
VDDHTT CLKREQ1#
44
CLKREQ# Internal
VDDREF CLKREQ2#
3D3V_48MPW R_S0 63 39 W LAN_CLKREQ# 26 pull Low
2
VDD48 CLKREQ3#
CLKREQ4# 38 W LAN2_CLKREQ# 26
CLKG_PD# 51 PD#
CPU HT
23 CLK_PCIE_LAN CPUKG0T_LPRS 50 CPU_CLK 6 -1 Change R91,R92 to RN132.
LAN 23 CLK_PCIE_LAN# 49 CPU_CLK# 6
CPUKG0C_LPRS
22 SRC0T_LPRS
21 64 CLK_48 2 3
NB A-Link 9 CLK_NB_GPPSB SRC0C_LPRS 48MHZ_0 CLK48_Cardreader 25
9 CLK_NB_GPPSB# 20 SRC1T_LPRS 1 4
19 SRC1C_LPRS
15 59 REF0
SB A-Link 12 CLK_PCIE_SB SRC2T_LPRS REF0/SEL_HTT66 REF1 RN132
12 CLK_PCIE_SB# 14 SRC2C_LPRS REF1/SEL_SATA 58 CLK48_USB 13
13 57 REF2 SRN33J-5-GP-U
SRC3T_LPRS REF2/SEL_27
1
26 CLK_PCIE_MINI1 12 EC2
MINI1 SRC3C_LPRS
26 CLK_PCIE_MINI1# 9 SRC4T_LPRS
SC22P50V2JN-4GP
8
2
SRC4C_LPRS
26 CLK_PCIE_MINI2 42 SRC6T/SATAT_LPRS GNDSATA 43 -1 Change R27,R30 to RN133.
MINI2 26 CLK_PCIE_MINI2# 41 24 RN133
SRC6C/SATAC_LPRS GNDATIG
6 SRC7T_LPRS/27MHZ_SS GND 7
5 52 -1 Reserve EC2 by RF request. REF0_R 5 4 REF0 NB_OSC_1.1V
SRC7C_LPRS/27MHZ_NS GNDHTT
GNDREF 60 6 3 CLK_NB_14M 9
GNDCPU 46 7 2
37 SB_SRC0T_LPRS GND48 1 8 1
36 SB_SRC0C_LPRS
1
32 10 RFC1
31
SB_SRC1T_LPRS GNDSRC
18
SRN75J-1-GP DY SC33P50V2JN-3GP
B SB_SRC1C_LPRS GNDSRC B
2
GNDSB_SRC 33
9 CLK_NBHT_CLK 54 HTT0T_LPRS/66M -1 Reserve RFC1 by RF request.
9 CLK_NBHT_CLK# 53 HTT0C_LPRS/66M GND 65
NB HT ICS9LPRS480BKLFT-GP 3D3V_S0
71.09480.A03
2
2ND = 71.00880.A03 DY DY
R33 27MHz non-spreading singled clock on pin 5
R32 10KR2J-3-GP R31 SEL_27 1 and 27MHz spread clock on pin 6
9LRS4880,Wistron P/N??? 48Mhz 10KR2J-3-GP 10KR2J-3-GP REF2
DY 0* 100MHz differential spreading SRC clock
1
NB CLOCK INPUT TABLE REF0
SEL_SATA 1 100MHz non-spreading differential SATA clock
NB CLOCKS RS880M REF1
REF1 0* 100MHz differential spreading SRC clock
HT_REFCLKP
100M DIFF SEL_HTT66 1 66MHz 3.3V single ended HTT clock
HT_REFCLKN REF2 REF0
100M DIFF -1 Change R34~R36 to RN134. 0* 100MHz differential HTT clock
REFCLK_P
14M SE (1.1V)
CPU_CLK(200MHz)
8
7
6
5
REFCLK_N
vref RN134
GFX_REFCLK SRN10KJ-6-GP
A 100M DIFF(IN/OUT)* SJV10-NL A
GPP_REFCLK
NC or 100M DIFF OUTPUT
1
2
3
4
GPPSB_REFCLK 100M DIFF
Wistron Corporation
* RS880M can be used as clock buffer to output two PCIE referecence clocks Taipei Hsien 221, Taiwan, R.O.C.
By deault, chip will configured as input mode, BIOS can program it to output mode.
Title
CLKGEN_ICS9LPRS480
Size Document Number Rev
5 4
www.vinafix.vn 3 2
A3
Date: Friday, January 29, 2010
SJV10-NL
Sheet
1
3 of 42
-1
5 4 3 2 1
D D
ACPU1A
8 HT_NB_CPU_CAD_H15 W7 L0_CADIN_H15 L0_CADOUT_H15 AB6 HT_CPU_NB_CAD_H15 8
8 HT_NB_CPU_CAD_L15 W6 L0_CADIN_L15 L0_CADOUT_L15 AB5 HT_CPU_NB_CAD_L15 8
8 HT_NB_CPU_CAD_H14 U6 L0_CADIN_H14 L0_CADOUT_H14 AB9 HT_CPU_NB_CAD_H14 8
8 HT_NB_CPU_CAD_L14 U5 L0_CADIN_L14 L0_CADOUT_L14 AB8 HT_CPU_NB_CAD_L14 8
8 HT_NB_CPU_CAD_H13 R7 L0_CADIN_H13 L0_CADOUT_H13 AC7 HT_CPU_NB_CAD_H13 8
8 HT_NB_CPU_CAD_L13 R6 L0_CADIN_L13 L0_CADOUT_L13 AC6 HT_CPU_NB_CAD_L13 8
8 HT_NB_CPU_CAD_H12 P6 L0_CADIN_H12 L0_CADOUT_H12 AE6 HT_CPU_NB_CAD_H12 8
8 HT_NB_CPU_CAD_L12 P5 L0_CADIN_L12 L0_CADOUT_L12 AE5 HT_CPU_NB_CAD_L12 8
8 HT_NB_CPU_CAD_H11 L6 L0_CADIN_H11 L0_CADOUT_H11 AE9 HT_CPU_NB_CAD_H11 8
8 HT_NB_CPU_CAD_L11 L5 L0_CADIN_L11 L0_CADOUT_L11 AE8 HT_CPU_NB_CAD_L11 8
8 HT_NB_CPU_CAD_H10 J6 L0_CADIN_H10 L0_CADOUT_H10 AH3 HT_CPU_NB_CAD_H10 8
8 HT_NB_CPU_CAD_L10 J5 L0_CADIN_L10 L0_CADOUT_L10 AH4 HT_CPU_NB_CAD_L10 8
8 HT_NB_CPU_CAD_H9 H4 L0_CADIN_H9 L0_CADOUT_H9 AK3 HT_CPU_NB_CAD_H9 8
8 HT_NB_CPU_CAD_L9 H3 L0_CADIN_L9 L0_CADOUT_L9 AK4 HT_CPU_NB_CAD_L9 8
8 HT_NB_CPU_CAD_H8 G6 L0_CADIN_H8 L0_CADOUT_H8 AH1 HT_CPU_NB_CAD_H8 8
8 HT_NB_CPU_CAD_L8 G5 L0_CADIN_L8 L0_CADOUT_L8 AH2 HT_CPU_NB_CAD_L8 8
HT LINK
8 HT_NB_CPU_CAD_H7 T3 L0_CADIN_H7 L0_CADOUT_H7 Y1 HT_CPU_NB_CAD_H7 8
8 HT_NB_CPU_CAD_L7 T4 L0_CADIN_L7 L0_CADOUT_L7 Y2 HT_CPU_NB_CAD_L7 8
8 HT_NB_CPU_CAD_H6 T2 L0_CADIN_H6 L0_CADOUT_H6 Y4 HT_CPU_NB_CAD_H6 8
C T1 Y3 C
8 HT_NB_CPU_CAD_L6 L0_CADIN_L6 L0_CADOUT_L6 HT_CPU_NB_CAD_L6 8
8 HT_NB_CPU_CAD_H5 P3 L0_CADIN_H5 L0_CADOUT_H5 AB1 HT_CPU_NB_CAD_H5 8
8 HT_NB_CPU_CAD_L5 P4 L0_CADIN_L5 L0_CADOUT_L5 AB2 HT_CPU_NB_CAD_L5 8
8 HT_NB_CPU_CAD_H4 P2 L0_CADIN_H4 L0_CADOUT_H4 AB4 HT_CPU_NB_CAD_H4 8
8 HT_NB_CPU_CAD_L4 P1 L0_CADIN_L4 L0_CADOUT_L4 AB3 HT_CPU_NB_CAD_L4 8
8 HT_NB_CPU_CAD_H3 M2 L0_CADIN_H3 L0_CADOUT_H3 AD4 HT_CPU_NB_CAD_H3 8
8 HT_NB_CPU_CAD_L3 M1 L0_CADIN_L3 L0_CADOUT_L3 AD3 HT_CPU_NB_CAD_L3 8
8 HT_NB_CPU_CAD_H2 K3 L0_CADIN_H2 L0_CADOUT_H2 AF1 HT_CPU_NB_CAD_H2 8
8 HT_NB_CPU_CAD_L2 K4 L0_CADIN_L2 L0_CADOUT_L2 AF2 HT_CPU_NB_CAD_L2 8
8 HT_NB_CPU_CAD_H1 K2 L0_CADIN_H1 L0_CADOUT_H1 AF4 HT_CPU_NB_CAD_H1 8
8 HT_NB_CPU_CAD_L1 K1 L0_CADIN_L1 L0_CADOUT_L1 AF3 HT_CPU_NB_CAD_L1 8
8 HT_NB_CPU_CAD_H0 H2 L0_CADIN_H0 L0_CADOUT_H0 AK1 HT_CPU_NB_CAD_H0 8
8 HT_NB_CPU_CAD_L0 H1 L0_CADIN_L0 L0_CADOUT_L0 AK2 HT_CPU_NB_CAD_L0 8
8 HT_NB_CPU_CLK_H1 M8 L0_CLKIN_H1 L0_CLKOUT_H1 AF6 HT_CPU_NB_CLK_H1 8

8 HT_NB_CPU_CLK_L1 M7 L0_CLKIN_L1 L0_CLKOUT_L1 AF5 HT_CPU_NB_CLK_L1 8
8 HT_NB_CPU_CLK_H0 M3 L0_CLKIN_H0 L0_CLKOUT_H0 AD1 HT_CPU_NB_CLK_H0 8

8 HT_NB_CPU_CLK_L0 M4 L0_CLKIN_L0 L0_CLKOUT_L0 AD2 HT_CPU_NB_CLK_L0 8
8 HT_NB_CPU_CTL_H1 Y6 L0_CTLIN_H1 L0_CTLOUT_H1 Y8 HT_CPU_NB_CTL_H1 8

8 HT_NB_CPU_CTL_L1 Y5 L0_CTLIN_L1 L0_CTLOUT_L1 Y9 HT_CPU_NB_CTL_L1 8
8 HT_NB_CPU_CTL_H0 V2 L0_CTLIN_H0 L0_CTLOUT_H0 V4 HT_CPU_NB_CTL_H0 8

8 HT_NB_CPU_CTL_L0 V1 L0_CTLIN_L0 L0_CTLOUT_L0 V3 HT_CPU_NB_CTL_L0 8
ASB2
B B
71.TURON.B0U
A SJV10-NL A
Wistron Corporation
Title
CPU_HT_LINK I/F_(1/4)
5 4
www.vinafix.vn 3 2
A3
Date:
SJV10-NL
Tuesday, January 26, 2010 Sheet
1
4 of 42
-1
5 4 3 2 1
17 M_A_DQ[63..0]
17 M_A_A[15..0] 18 M_B_DQ[63..0]
17 M_A_DM[7..0] 18 M_B_A[15..0]
17 M_A_DQS#[7..0] 18 M_B_DM[7..0]
17 M_A_DQS[7..0] 18 M_B_DQS#[7..0]
18 M_B_DQS[7..0]
ACPU1B ACPU1C
D D
M_A_A15 P30 AG11 M_A_DQ63 M_B_A15 P33 AN13 M_B_DQ63
M_A_A14 MA_ADD15 MA_DATA63 MB_ADD15 MB_DATA63
M29 MA_ADD14 MA_DATA62 AH11 M_A_DQ62 M_B_A14 P31 MB_ADD14 MB_DATA62 AL14 M_B_DQ62
M_A_A13 AG28 AJ12 M_A_DQ61 M_B_A13 AJ33 AL16 M_B_DQ61
P28 MA_ADD12 MA_DATA60 AJ14 M_A_DQ60 M_B_A12 T32 MB_ADD12 MB_DATA60 AN17 M_B_DQ60
M_A_A11 T30 AF11 M_A_DQ59 M_B_A11 T31 AN12 M_B_DQ59
AC28 MA_ADD10 MA_DATA58 AF12 M_A_DQ58 M_B_A10 AD32 MB_ADD10 MB_DATA58 AM12 M_B_DQ58
M_A_A9 P27 AG12 M_A_DQ57 M_B_A9 T33 AM16 M_B_DQ57
R26 MA_ADD8 MA_DATA56 AH12 M_A_DQ56 M_B_A8 V32 MB_ADD8 MB_DATA56 AN16 M_B_DQ56
M_A_A7 R27 AK14 M_A_DQ55 M_B_A7 U33 AL18 M_B_DQ55
U28 MA_ADD6 MA_DATA54 AF15 M_A_DQ54 M_B_A6 V33 MB_ADD6 MB_DATA54 AN19 M_B_DQ54
M_A_A5 V30 AH19 M_A_DQ53 M_B_A5 V31 AM24 M_B_DQ53
U27 MA_ADD4 MA_DATA52 AK20 M_A_DQ52 M_B_A4 W33 MB_ADD4 MB_DATA52 AN24 M_B_DQ52
M_A_A3 Y30 AF14 M_A_DQ51 M_B_A3 Y31 AM18 M_B_DQ51
AB29 MA_ADD2 MA_DATA50 AG14 M_A_DQ50 M_B_A2 Y33 MB_ADD2 MB_DATA50 AN18 M_B_DQ50
M_A_A1 W29 AF17 M_A_DQ49 M_B_A1 Y32 AL22 M_B_DQ49
AC26 MA_ADD0 MA_DATA48 AG19 M_A_DQ48 M_B_A0 AC33 MB_ADD0 MB_DATA48 AN23 M_B_DQ48
MA_DATA47 AG20 M_A_DQ47 MB_DATA47 AM25 M_B_DQ47
17 M_A_BS2 R29 MA_BANK2 MA_DATA46 AJ20 M_A_DQ46 18 M_B_BS2 R33 MB_BANK2 MB_DATA46 AL26 M_B_DQ46
17 M_A_BS1 AC29 MA_BANK1 MA_DATA45 AF22 M_A_DQ45 18 M_B_BS1 AD33 MB_BANK1 MB_DATA45 AN28 M_B_DQ45
17 M_A_BS0 AE28 MA_BANK0 MA_DATA44 AK24 M_A_DQ44 18 M_B_BS0 AE33 MB_BANK0 MB_DATA44 AL28 M_B_DQ44
MA_DATA43 AF19 M_A_DQ43 MB_DATA43 AL24 M_B_DQ43
K30 MA_CHECK7 MA_DATA42 AF20 M_A_DQ42 K33 MB_CHECK7 MB_DATA42 AN25 M_B_DQ42
J29 MA_CHECK6 MA_DATA41 AJ23 M_A_DQ41 K31 MB_CHECK6 MB_DATA41 AN27 M_B_DQ41
G29 MA_CHECK5 MA_DATA40 AG23 M_A_DQ40 G32 MB_CHECK5 MB_DATA40 AM28 M_B_DQ40
F29 MA_CHECK4 MA_DATA39 AF23 M_A_DQ39 F32 MB_CHECK4 MB_DATA39 AM29 M_B_DQ39
L28 MA_CHECK3 MA_DATA38 AF25 M_A_DQ38 L33 MB_CHECK3 MB_DATA38 AL30 M_B_DQ38
L29 MA_CHECK2 MA_DATA37 AH27 M_A_DQ37 K32 MB_CHECK2 MB_DATA37 AL32 M_B_DQ37
H29 MA_CHECK1 MA_DATA36 AK30 M_A_DQ36 H31 MB_CHECK1 MB_DATA36 AL33 M_B_DQ36
C H27 MA_CHECK0 MA_DATA35 AJ25 M_A_DQ35 G33 MB_CHECK0 MB_DATA35 AK28 M_B_DQ35 C
MA_DATA34 AG25 M_A_DQ34 MB_DATA34 AN29 M_B_DQ34

J27 MA_DQS_H8 MA_DATA33 AJ26 M_A_DQ33 J33 MB_DQS_H8 MB_DATA33 AM31 M_B_DQ33
DDR III: CHANNEL A
DDR III: CHANNEL B

J26 MA_DQS_L8 MA_DATA32 AJ28 M_A_DQ32 H32 MB_DQS_L8 MB_DATA32 AM32 M_B_DQ32
M_A_DQS7 AJ11 D28 M_A_DQ31 M_B_DQS7 AM14 E33 M_B_DQ31
M_A_DQS#7 MA_DQS_H7 MA_DATA31 MB_DQS_H7 MB_DATA31
AK12 MA_DQS_L7 MA_DATA30 G28 M_A_DQ30 M_B_DQS#7 AN14 MB_DQS_L7 MB_DATA30 D31 M_B_DQ30
M_A_DQS6 AG15 D26 M_A_DQ29 M_B_DQS6 AL20 B31 M_B_DQ29
AH15 MA_DQS_L6 MA_DATA28 E26 M_A_DQ28 M_B_DQS#6 AM20 MB_DQS_L6 MB_DATA28 A31 M_B_DQ28
M_A_DQS5 AH22 F30 M_A_DQ27 M_B_DQS5 AN26 F33 M_B_DQ27
AG22 MA_DQS_L5 MA_DATA26 E29 M_A_DQ26 M_B_DQS#5 AM26 MB_DQS_L5 MB_DATA26 F31 M_B_DQ26
M_A_DQS4 AG26 F27 M_A_DQ25 M_B_DQS4 AN30 C32 M_B_DQ25
AH26 MA_DQS_L4 MA_DATA24 H26 M_A_DQ24 M_B_DQS#4 AM30 MB_DQS_L4 MB_DATA24 B32 M_B_DQ24
M_A_DQS3 E28 H25 M_A_DQ23 M_B_DQS3 D33 C30 M_B_DQ23
F28 MA_DQS_L3 MA_DATA22 D24 M_A_DQ22 M_B_DQS#3 D32 MB_DQS_L3 MB_DATA22 A29 M_B_DQ22
M_A_DQS2 E25 H22 M_A_DQ21 M_B_DQS2 B28 B26 M_B_DQ21
F25 MA_DQS_L2 MA_DATA20 E22 M_A_DQ20 M_B_DQS#2 A28 MB_DQS_L2 MB_DATA20 A26 M_B_DQ20
M_A_DQS1 G17 F26 M_A_DQ19 M_B_DQS1 A21 B30 M_B_DQ19
H17 MA_DQS_L1 MA_DATA18 G26 M_A_DQ18 M_B_DQS#1 B20 MB_DQS_L1 MB_DATA18 A30 M_B_DQ18
M_A_DQS0 E12 D22 M_A_DQ17 M_B_DQS0 B16 A27 M_B_DQ17
F12 MA_DQS_L0 MA_DATA16 G23 M_A_DQ16 M_B_DQS#0 A15 MB_DQS_L0 MB_DATA16 C26 M_B_DQ16
MA_DATA15 G22 M_A_DQ15 MB_DATA15 A24 M_B_DQ15
AK18 MA_CLK_H7 MA_DATA14 G20 M_A_DQ14 AN22 MB_CLK_H7 MB_DATA14 B24 M_B_DQ14
AJ17 MA_CLK_L7 MA_DATA13 G15 M_A_DQ13 AM22 MB_CLK_L7 MB_DATA13 C18 M_B_DQ13
AH17 MA_CLK_H6 MA_DATA12 F15 M_A_DQ12 AN21 MB_CLK_H6 MB_DATA12 A18 M_B_DQ12
AG17 MA_CLK_L6 MA_DATA11 D20 M_A_DQ11 AM21 MB_CLK_L6 MB_DATA11 A25 M_B_DQ11
17 M_CLK_DDR0 Y28 MA_CLK_H5 MA_DATA10 F22 M_A_DQ10 18 M_CLK_DDR2 AA32 MB_CLK_H5 MB_DATA10 C24 M_B_DQ10
17 M_CLK_DDR#0 Y27 MA_CLK_L5 MA_DATA9 D16 M_A_DQ9 18 M_CLK_DDR#2 AA33 MB_CLK_L5 MB_DATA9 C20 M_B_DQ9
17 M_CLK_DDR1 AB27 MA_CLK_H4 MA_DATA8 E17 M_A_DQ8 18 M_CLK_DDR3 AB33 MB_CLK_H4 MB_DATA8 A19 M_B_DQ8
17 M_CLK_DDR#1 AB26 MA_CLK_L4 MA_DATA7 H15 M_A_DQ7 18 M_CLK_DDR#3 AB32 MB_CLK_L4 MB_DATA7 C16 M_B_DQ7
B B
W27 MA_CLK_H3 MA_DATA6 H14 M_A_DQ6 AB31 MB_CLK_H3 MB_DATA6 A16 M_B_DQ6
W26 MA_CLK_L3 MA_DATA5 G12 M_A_DQ5 AB30 MB_CLK_L3 MB_DATA5 B14 M_B_DQ5
P26 MA_CLK_H2 MA_DATA4 H12 M_A_DQ4 AD31 MB_CLK_H2 MB_DATA4 A13 M_B_DQ4
M26 MA_CLK_L2 MA_DATA3 E15 M_A_DQ3 AD30 MB_CLK_L2 MB_DATA3 B18 M_B_DQ3
D18 MA_CLK_H1 MA_DATA2 E14 M_A_DQ2 C22 MB_CLK_H1 MB_DATA2 A17 M_B_DQ2
F19 MA_CLK_L1 MA_DATA1 E11 M_A_DQ1 B22 MB_CLK_L1 MB_DATA1 C14 M_B_DQ1
E20 MA_CLK_H0 MA_DATA0 F11 M_A_DQ0 A22 MB_CLK_H0 MB_DATA0 A14 M_B_DQ0
E19 MA_CLK_L0 A23 MB_CLK_L0
MA_DM8 H30 MB_DM8 H33
17 M_CKE1 M30 AL12 M_A_DM7 N33 AN15 M_B_DM7
MA_CKE1 MA_DM7 18 M_CKE3 MB_CKE1 MB_DM7
17 M_CKE0 M28 AK16 M_A_DM6 P32 AN20 M_B_DM6
MA_CKE0 MA_DM6 18 M_CKE2 MB_CKE0 MB_DM6
AK22 M_A_DM5 AK26 M_B_DM5
MA_DM5 M_A_DM4 MB_DM5
AJ29 MA1_ODT1 MA_DM4 AJ27 AK31 MB1_ODT1 MB_DM4 AN31 M_B_DM4
AF27 E27 M_A_DM3 AH31 C33 M_B_DM3
MA1_ODT0 MA_DM3 M_A_DM2 MB1_ODT0 MB_DM3
17 M_ODT1 AJ30 MA0_ODT1 MA_DM2 E23 18 M_ODT3 AK32 MB0_ODT1 MB_DM2 C28 M_B_DM2
AG29 H19 M_A_DM1 AH33 A20 M_B_DM1
17 M_ODT0 MA0_ODT0 MA_DM1 18 M_ODT2 MB0_ODT0 MB_DM1
G14 M_A_DM0 D14 M_B_DM0
MA_DM0 MB_DM0
AH29 MA1_CS_L1 AK33 MB1_CS_L1
AE29 MA1_CS_L0 AF33 MB1_CS_L0
17 M_CS#1 AH30 MA0_CS_L1 18 M_CS#3 AJ32 MB0_CS_L1
17 M_CS#0 AF29 MA0_CS_L0 18 M_CS#2 AF31 MB0_CS_L0
17 M_A_RAS# AC27 MA_RAS_L 18 M_B_RAS# AF32 MB_RAS_L

17 M_A_CAS# AF30 MA_CAS_L 18 M_B_CAS# AH32 MB_CAS_L
17 M_A_W E# AE27 MA_WE_L 18 M_B_W E# AG33 MB_WE_L
17 DDR3_DRAMRST_A# L27 MA_RESET_L 18 DDR3_DRAMRST_B# L32 MB_RESET_L

17 PM_EXTTS#0 M32 FREE|MA_EVENT_L 17,18 PM_EXTTS#1 M33 FREE|MB_EVENT_L
A SJV10-NL A
GENEVA-GP GENEVA-GP
Wistron Corporation
Title
CPU_DDR_(2/4)
www.vinafix.vn
A3 -1
SJV10-NL
5 4 3 2 1
5 4 3 2 1
2D5V
Iomax=0.2A
3D3V_S0
Place near to CPU
U2 IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491 LYAOUT:ROUTE VDDA TRACE APPROX.
D 3
50mils WIDE(USE 2X25 mil TRACES TO D
VOUT CPU_VDDA_S0
VIN 2 EXIT BALL FIELD) AND 500 mils LONG.
GND 1
1
C22
1
SC1U10V3KX-4GP
RT9161-A-25PG-GP C26
SCD1U10V2KX-4GP
74.09161.F3C C27 C28
SC10U10V5KX-2GP
SCD22U10V2KX-1GP
2
2
1D5V_S3 1D5V_S3
1DY 2 ACPU1D 1D5V_S3

Cloce To CPU A8 VDDA_1
8
7
6
5
4
3
C29 B8
SC100P50V2JN-3GP VDDA_2 RN42
1 2
RN2 1 2 R38 169R2F-GP CLKCPU_IN A6 SRN1KJ-7-GP
3 CPU_CLK CLKIN_H
8
7
6
5
SRN300J-1-GP C30 1 2SC3900P50V2KX-2GP CLKCPU#_IN A7 M31 CPU_CORE_TYPE 1 TP3
3 CPU_CLK# CLKIN_L RSVD|CORE_TYPE
C31 SC3900P50V2KX-2GP RN3
LDT_PW ROK D10 SRN300J-1-GP
1
2
3
4
1
2
33 CPU_PW RGD_SVID_REG PWROK
12,41 CPU_LDT_RST# 1 R40 2 LDT_RST#_CPU LDT_STP#_CPU E9 LDTSTOP_L
0R0402-PAD LDT_RST#_CPU F9 C1
RESET_L SVC CPU_SVC 33
12,41 CPU_PW RGD 1 R41 2 LDT_PW ROK B2
1
2
3
4
0R0402-PAD SVD CPU_SVD 33
9,12 CPU_LDT_STOP# 1 R42 2 LDT_STP#_CPU

0R0402-PAD
CPU_SIC AN4 AL6 CPU_TEST26_BURNIN_L
1D5V_S3 SIC THERMDC H_THERMDC 28 CPU_DBREQ#
AN5 SID THERMDA AM5 H_THERMDA 28
C AM2 RSVD_SA0 THERMTRIP_L AK6 THERMTRIP# C
AN3 ALERT_L PROCHOT_L AN6 PROCHOT# 1 R44 2 PROCHOT#_SB 12
0R0402-PAD
CPU_TDI AM8 AN7 CPU_TDO
TDI TDO
1
CPU_TRST# AL8
R842 CPU_TCK TRST_L LDT_PW ROK
AK8 TCK
1KR2J-1-GP CPU_TMS AN8 TMS
1
CPU_DBREQ# G9 H9 CPU_DBRDY R45
2
DBREQ_L DBRDY 2K2R2J-2-GP C33

CPU_SIC D2 SCD1U16V2ZY-2GP
33 CPU_VDD0_RUN_FB_L VSS_SENSE
E2 AM6 RSVD3 1 TP9
2
VLDT_SENSE RSVD3 1D5V_SUS_Q2
33 CPU_VDD0_RUN_FB_H E1 VDD_SENSE 1 2
D1 AJ9
B
CPU_VDDNB 33 CPU_VDDNB_RUN_FB_H VDDNB_SENSE CPU_PRESENT_L 1D1V_S0
D3 VDDIO_SENSE
RN35 C2 Q1
VDDR_SENSE
MISC
1 4 CPU_VDDNB_RUN_FB_H THERMTRIP# E C RSMRST# 28,29
2 3 CPU_VDDNB_RUN_FB_L M_VREF A11 V10 CPU_HTREF1 44D2R2F-GP 2 1 R46 MMBT3904-4-GP
CPU_VDDNB_RUN_FB_L 33 M_VREF HTREF1
M_ZP AM9 V9 CPU_HTREF0 2 1 R47 84.T3904.C11
SRN10J-7-GP 1D5V_S3 M_ZN_H HTREF0
1 R48 2 M_ZN AN9 M_ZN_L
44D2R2F-GP 2ND = 84.03904.K11
39D2R2F-L-GP
510R2J-1-GP
1D5V_S3 1 R49 2 CPU_TEST25_H_BYPASSCLK_H A9 B10 CPU_TEST29_H_FBCLKOUT_P 1 R50 2 Route as 80ohm, diff
CPU exceeds to 125℃
BYPASSCLK_H FBCLKOUT_H
1 R52 2 CPU_TEST25_L_BYPASSCLK_L B9 BYPASSCLK_L FBCLKOUT_L A10 CPU_TEST29_L_FBCLKOUT_N
R value is TBD
510R2J-1-GP CPU_TEST19_PLLTEST0 A5 1D5V_S3
CPU_TEST18_PLLTEST1 PLLTEST0 80D6R2F-L-GP
B6 PLLTEST1
AK7 CPU_TEST24_SCANCLK1
SCANCLK1
1 R54 2 CPU_TEST9_ANALOGIN G8 ANALOGIN TSTUPD AG8 CPU_TEST23_TSTUPD
1
3
4
0R0402-PAD AK9 CPU_TEST22_SCANSHIFTEN
B SCANSHIFTEN B
SCD1U16V2ZY-2GP
R100 TPAD14-GP TP16 1 CPU_TEST17_BP3 F8 AH9 CPU_TEST21_SCANEN RN129

BP3 SCANEN
1
1KR2F-3-GP TPAD14-GP TP18 1 CPU_TEST16_BP2 C8 AM7 CPU_TEST20_SCANCLK2 SRN1KJ-7-GP

C202 TPAD14-GP TP20 CPU_TEST15_BP1 D9 BP2 SCANCLK2
1 BP1
TPAD14-GP TP21 1 CPU_TEST14_BP0 E8 G11
2
BP0 PLLCHRZ_H
H11
2
1
M_VREF PLLCHRZ_L CPU_TEST27_SINGLECHAIN
C6 ANALOG_T SINGLECHAIN AJ8
SCD1U16V2ZY-2GP
AH7 AM4 CPU_TEST26_BURNIN_L

DIECRACKMON BURNIN_L
1
AK5 GATE0 ANALOGOUT D7

C201 R98 AJ7 B5
1KR2F-3-GP DRAIN0 DIG_T
2
AG9 HDT Connectors

2
M_TEST
CPU_DBREQ# 1 TP109
CPU_DBRDY 1 TP102
GENEVA-GP CPU_TCK 1 TP104
CPU_TMS 1 TP105
CPU_TDI 1 TP106
CPU_TRST# 1 TP107
CPU_TDO 1 TP108
RN123
CPU_TEST18_PLLTEST1 1 10
CPU_TEST19_PLLTEST0 2 9CPU_TEST24_SCANCLK1
CPU_TEST20_SCANCLK2 3 8CPU_TEST22_SCANSHIFTEN
4 7CPU_TEST23_TSTUPD
5 6CPU_TEST21_SCANEN
A SJV10-NL A
SRN1KJ-5-GP
Wistron Corporation
Title
CPU_Control&Debug_(3/4)
www.vinafix.vn
A3 -1
SJV10-NL
5 4 3 2 1
5 4 3 2 1
VCC_CORE VCC_CORE ACPU1H

ACPU1E ACPU1G AM19 AK15
1D5V_S3 ACPU1F 1D1V_S0 VSS_207 VSS_191
D4 VDD_1 VDD_85 AE12 B1 VSS_1 VSS_45 W19 AF7 VSS_167 VSS_192 AK17
D5 VDD_2 VDD_84 AD9 N2 VSS_28 VSS_44 W1 AF26 VSS_166 VSS_193 AK19
D6 VDD_3 VDD_83 AE21 M27 VDDIO_1 VLDT_A_1 F1 N22 VSS_29 VSS_43 V20 AE7 VSS_165 VSS_194 AK21
E5 VDD_4 VDD_82 AD21 Y26 VDDIO_2 VLDT_A_2 F2 N23 VSS_30 VSS_42 V18 AF8 VSS_168 VSS_126 AA2
E6 VDD_5 VDD_81 AD18 U26 VDDIO_3 VLDT_A_3 F3 B13 VSS_2 VSS_26 M11 AF9 VSS_169 VSS_127 AA22
E7 VDD_6 VDD_80 AD14 N32 VDDIO_4 VLDT_A_4 F4 B15 VSS_3 VSS_25 L8 AG1 VSS_170 VSS_128 AA23
F5 VDD_7 VDD_79 AD12 U32 VDDIO_5 B17 VSS_4 VSS_41 V15 AG2 VSS_171 VSS_195 AK23
F6 VDD_8 VDD_78 AD11 N30 VDDIO_6 VLDT_B_1 AL1 M21 VSS_27 VSS_24 L4 AG27 VSS_172 VSS_129 AA4
D F7 VDD_9 VDD_77 AC5 P29 VDDIO_7 VLDT_B_2 AL2 B19 VSS_5 VSS_23 L30 AG4 VSS_173 VSS_130 AA9 D
H7 VDD_10 VDD_76 AE18 R28 VDDIO_8 VLDT_B_3 AL3 B21 VSS_6 VSS_22 L26 AG5 VSS_174 VSS_131 AB10
H8 AC24 R30 AL4 CPU_VDDR B23 L24 AG6 AB12
VDD_11 VDD_75 VDDIO_9 VLDT_B_4 VSS_7 VSS_68 VSS_175 VSS_132
J8 VDD_12 VDD_74 AC12 R32 VDDIO_10 B27 VSS_8 VSS_69 L23 AG7 VSS_176 VSS_133 AB21
E4 VDD_13 VDD_73 AC10 U29 VDDIO_11 VDDR_1 A12 B29 VSS_9 VSS_70 L22 AE4 VSS_164 VSS_134 AB22
J10 VDD_14 VDD_72 AB13 U30 VDDIO_12 VDDR_2 B12 B33 VSS_10 VSS_71 L21 AE25 VSS_163 VSS_135 AB23
POWER2
J12 VDD_15 VDD_71 AB11 W28 VDDIO_13 VDDR_3 C12 C10 VSS_11 VSS_72 L2 AE24 VSS_162 VSS_136 AB24
J14 VDD_16 VDD_70 AE14 W30 VDDIO_14 VDDR_4 D12 P10 VSS_31 VSS_73 L12 AE22 VSS_161 VSS_196 AK25
J18 VDD_17 VDD_69 AA24 W32 VDDIO_15 P14 VSS_32 VSS_74 L10 AE20 VSS_160 VSS_197 AK27
J20 VDD_18 VDD_68 AA12 Y29 VDDIO_16 VDDR_5 AK10 P16 VSS_33 VSS_75 L1 AE2 VSS_159 VSS_198 AK29
POWER1
J21 VDD_19 VDD_67 AA10 AA30 VDDIO_17 VDDR_6 AL10 P19 VSS_34 VSS_76 K9 AE16 VSS_158 VSS_199 AJ5
J23 VDD_20 VDD_66 Y19 AB28 VDDIO_18 VDDR_7 AM10 P7 VSS_35 VSS_77 M6 AE13 VSS_157 VSS_200 AH6
J9 VDD_21 VDD_65 Y16 AE32 VDDIO_19 VDDR_8 AN10 C31 VSS_12 VSS_78 K24 AH14 VSS_177 VSS_201 AL31
K10 VDD_22 VDD_64 Y14 AC30 VDDIO_20 D11 VSS_13 VSS_79 K22 AE11 VSS_156 VSS_202 AM1
K12 W5 AC32 CPU_VDDNB D13 K16 AE10 AM13
VDD_23 VDD_63 VDDIO_21 VSS_14 VSS_80 VSS_155 VSS_203
K14 VDD_24 VDD_62 W20 AE26 VDDIO_22 D15 VSS_15 VSS_81 M22 AE1 VSS_154 VSS_137 AB7
K18 VDD_25 VDD_61 W18 AE30 VDDIO_23 VDDNB_1 A3 R1 VSS_36 VSS_82 K13 AD24 VSS_153 VSS_138 AC1
K20 VDD_26 VDD_60 W15 AF28 VDDIO_24 VDDNB_2 A4 D17 VSS_16 VSS_83 M24 AD23 VSS_152 VSS_205 AM15
GND1
K21 VDD_27 VDD_59 AE23 AG30 VDDIO_25 VDDNB_3 B3 D19 VSS_17 VSS_84 K11 AD22 VSS_151 VSS_206 AM17
GND2
K23 VDD_28 VDD_58 V24 AG32 VDDIO_26 VDDNB_4 B4 D21 VSS_18 VSS_85 M23 AH20 VSS_178 VSS_139 AC11
N4 VDD_29 VDD_57 V19 AD25 VDDIO_27 VDDNB_5 C3 D23 VSS_19 VSS_86 J7 AH23 VSS_179 VSS_140 AC13
L11 VDD_30 VDD_56 V16 AA25 VDDIO_28 VDDNB_6 C4 D25 VSS_20 VSS_87 W16 AH25 VSS_180 VSS_141 AC2
L13 VDD_31 VDD_55 V14 AC25 VDDIO_29 D27 VSS_21 VSS_88 J4 AH28 VSS_181 VSS_142 AC21
L7 VDD_32 VDD_54 T20 V25 VDDIO_30 R15 VSS_37 VSS_89 W14 AD20 VSS_150 VSS_143 AC22
L9 VDD_33 VDD_53 T18 P25 VDDIO_31 PROGEN_L B11 R18 VSS_38 VSS_90 J32 AD16 VSS_149 VSS_208 AM23
M10 VDD_34 VDD_52 T15 N25 VDDIO_32 R2 VSS_39 VSS_91 J30 AD13 VSS_148 VSS_209 AM27
M12 VDD_35 VDD_51 T10 M25 VDDIO_33 R20 VSS_40 VSS_92 M13 AD10 VSS_147 VSS_210 AM33
R4 VDD_36 VDD_50 R5 K25 VDDIO_34 FREE_1 G7 D29 VSS_46 VSS_93 J28 AC9 VSS_146 VSS_211 AN2
M5 VDD_37 VDD_49 R19 L25 VDDIO_35 FREE_2 B7 D30 VSS_47 VSS_94 U8 AC8 VSS_145 VSS_212 AN32
C N11 R16 T25 AH8 D8 J25 A2 AM11 C
VDD_38 VDD_48 VDDIO_36 FREE_3 VSS_48 VSS_95 VSS_214 VSS_215
N24 VDD_39 VDD_47 R14 Y25 VDDIO_37 FREE_4 AJ6 E30 VSS_49 VSS_96 U4 AC23 VSS_144
W4 VDD_40 VDD_46 AC4 AB25 VDDIO_38 FREE_5 B25 E32 VSS_50 VSS_97 J24 AH5 VSS_182
N9 VDD_41 VDD_45 P24 FREE_6 AM3 F14 VSS_51 VSS_98 U7 AJ1 VSS_183
P15 VDD_42 VDD_44 P20 FREE_7 AN11 F17 VSS_52 VSS_99 U2 AJ15 VSS_184
P18 VDD_43 FREE_8 P9 R8 VSS_53 VSS_100 J2 W2 VSS_116
FREE_9 P8 T14 VSS_54 VSS_101 J16 A32 VSS_213
T16 VSS_55 VSS_102 J13 W8 VSS_117
F20 VSS_56 VSS_103 J11 Y10 VSS_118
T19 VSS_57 VSS_104 J1 Y15 VSS_119
GENEVA-GP T24 VSS_58 VSS_105 H6 Y18 VSS_120
GENEVA-GP T9 VSS_59 VSS_106 H5 AJ19 VSS_185
U1 VSS_60 VSS_107 H28 AJ2 VSS_186
F23 VSS_61 VSS_108 H23 AJ22 VSS_187
N1 VSS_62 VSS_109 H20 AJ4 VSS_188
G1 VSS_63 VSS_110 J22 Y20 VSS_121
G19 VSS_64 VSS_111 M9 Y24 VSS_122
BOTTOM SIDE DECOUPLING G2
G25
G27
VSS_65
VSS_66
VSS_67
VSS_112
VSS_113
VSS_114
G4
G30
N12
AK11
AK13
Y7
VSS_189
VSS_190
VSS_123
N10 VSS_115 AA1 VSS_124
VCC_CORE VCC_CORE AA11
22U change to 10U VSS_125
GENEVA-GP
1
C35 C36 C37 C38 C40 C42 C43 C44 C45 C47 GENEVA-GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD01U25V2KX-3GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C39 C46 SCD01U25V2KX-3GP

SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
DY
2
B DY
DECOUPLING betweem CPU and DIMMs B
-1 DY C35,Change C36 to 22uF. -1 DY C42,Change C43 to 22uF. PLACE CLOSE TO CPU AS POSSIBLE
1D5V_S3
CPU_VDDR 1D1V_S0
4.7U change to 10U 10U x3 ,.22 x2
1
C571 C572 C73 C74
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
C69 C70 C71 C72
1
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
C567 C568 C569 C570 C59
2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
C55 C56 C57 C53 C54

SC1KP50V2JN-2GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
2
-1 Change C569 to 22uF.
10U x4 ,.22 x5 , .1ux2 ,.01ux1

It's required to add two 10uF/0603 size
for CPU_VDDIO_SUS,move 2x180pf from
CPU_VDDNB 1D5V_S3
A
22U change to 10U under CPU ballout by Beker, Ben. SJV10-NL A
Wistron Corporation
1
C76 C77 C79 C80 C85 C86

SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C81 C82 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP

2
DY Title
CPU_Power_(4/4)
www.vinafix.vn
A3
-1 DY C80,Change C79 to 22uF. SJV10-NL -1
Date: Thursday, January 14, 2010 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1
ANB1A
4 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 4
4 HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 4
4 HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 4
4 HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 4
4 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 4
4 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 4
4 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 4
4 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 4
4 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 4
4 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 4
P22 J25
HYPER TRANSPORT CPU I/F

4 HT_CPU_NB_CAD_H5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_H5 4
4 HT_CPU_NB_CAD_L5 P23 HT_RXCAD5N HT_TXCAD5N J24 HT_NB_CPU_CAD_L5 4
D 4 HT_CPU_NB_CAD_H6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_NB_CPU_CAD_H6 4 D
4 HT_CPU_NB_CAD_L6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_L6 4
4 HT_CPU_NB_CAD_H7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_NB_CPU_CAD_H7 4
4 HT_CPU_NB_CAD_L7 N25 HT_RXCAD7N HT_TXCAD7N K22 HT_NB_CPU_CAD_L7 4
4 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 4

4 HT_CPU_NB_CAD_L8 AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_NB_CPU_CAD_L8 4
4 HT_CPU_NB_CAD_H9 AB25 HT_RXCAD9P HT_TXCAD9P G20 HT_NB_CPU_CAD_H9 4
4 HT_CPU_NB_CAD_L9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_NB_CPU_CAD_L9 4
4 HT_CPU_NB_CAD_H10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_NB_CPU_CAD_H10 4
4 HT_CPU_NB_CAD_L10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_NB_CPU_CAD_L10 4
4 HT_CPU_NB_CAD_H11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_NB_CPU_CAD_H11 4
4 HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_NB_CPU_CAD_L11 4
4 HT_CPU_NB_CAD_H12 W21 HT_RXCAD12P HT_TXCAD12P L19 HT_NB_CPU_CAD_H12 4
4 HT_CPU_NB_CAD_L12 W20 HT_RXCAD12N HT_TXCAD12N J19 HT_NB_CPU_CAD_L12 4
4 HT_CPU_NB_CAD_H13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_NB_CPU_CAD_H13 4
4 HT_CPU_NB_CAD_L13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_NB_CPU_CAD_L13 4
4 HT_CPU_NB_CAD_H14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_NB_CPU_CAD_H14 4
4 HT_CPU_NB_CAD_L14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_NB_CPU_CAD_L14 4
4 HT_CPU_NB_CAD_H15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_NB_CPU_CAD_H15 4
4 HT_CPU_NB_CAD_L15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_NB_CPU_CAD_L15 4
4 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 4

4 HT_CPU_NB_CLK_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_NB_CPU_CLK_L0 4
4 HT_CPU_NB_CLK_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_NB_CPU_CLK_H1 4
4 HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 4
4 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 4

4 HT_CPU_NB_CTL_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_NB_CPU_CTL_L0 4
C R21 P19 C
4 HT_CPU_NB_CTL_H1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_H1 4
4 HT_CPU_NB_CTL_L1 R20 HT_RXCTL1N HT_TXCTL1N R18 HT_NB_CPU_CTL_L1 4
1 2 R55 HT_RXCALP C23 HT_RXCALP HT_TXCALP B24 HT_TXCALP 1 2 R56
301R2F-GP HT_RXCALN A24 B25 HT_TXCALN 301R2F-GP
HT_RXCALN HT_TXCALN
Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24
RS880M-GP
71.RS880.M02
ANB1B
D4 A5 GTXP0 1 2 C87 SCD1U16V2KX-3GP HDMI_DATA2+ 21
GFX_RX0P GFX_TX0P GTXN0 C88 SCD1U16V2KX-3GP
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
GTXP1
1 2
C89 SCD1U16V2KX-3GP
HDMI_DATA2- 21
A3 GFX_RX1P GFX_TX1P A4 1 2 HDMI_DATA1+ 21 RS880M Display Port Support (muxed on GFX)
B3 B4 GTXN1 1 2 C90 SCD1U16V2KX-3GP HDMI_DATA1- 21
GFX_RX1N GFX_TX1N GTXP2 C91 SCD1U16V2KX-3GP
C2 GFX_RX2P GFX_TX2P C3 1 2 HDMI_DATA0+ 21
C1 B2 GTXN2 1 2 C92 SCD1U16V2KX-3GP HDMI_DATA0- 21 GFX_TX0,TX1,TX2 and TX3
GFX_RX2N GFX_TX2N GTXP3 C93 SCD1U16V2KX-3GP DP0
E5 GFX_RX3P GFX_TX3P D1 1 2 HDMI_CLK+ 21
F5 D2 GTXN3 1 2 C94 SCD1U16V2KX-3GP HDMI_CLK- 21 AUX0 and HPD0
GFX_RX3N GFX_TX3N
G5 GFX_RX4P GFX_TX4P E2
G6 GFX_RX4N GFX_TX4N E1
H5 F4 GFX_TX4,TX5,TX6 and TX7
GFX_RX5P GFX_TX5P DP1
H6 GFX_RX5N GFX_TX5N F3
J6 F1 AUX1 and HPD1
GFX_RX6P GFX_TX6P
J5 GFX_RX6N GFX_TX6N F2
J7 GFX_RX7P GFX_TX7P H4
J8 GFX_RX7N GFX_TX7N H3
L5 GFX_RX8P GFX_TX8P H1
L6 GFX_RX8N GFX_TX8N H2
M8 GFX_RX9P GFX_TX9P J2
B B
L8 GFX_RX9N GFX_TX9N J1
P7 K4
PCIE I/F GFX
GFX_RX10P GFX_TX10P
M7 GFX_RX10N GFX_TX10N K3
P5 GFX_RX11P GFX_TX11P K1
M5 GFX_RX11N GFX_TX11N K2
R8 GFX_RX12P GFX_TX12P M4
P8 GFX_RX12N GFX_TX12N M3
R6 GFX_RX13P GFX_TX13P M1
R5 GFX_RX13N GFX_TX13N M2
P4 GFX_RX14P GFX_TX14P N2
P3 GFX_RX14N GFX_TX14N N1
T4 GFX_RX15P GFX_TX15P P1
T3 GFX_RX15N GFX_TX15N P2
23 PCIE_RXP1 AE3 AC1 TXP1 C95 1 2 SCD1U16V2KX-3GP PCIE_TXP1 23

GPP_RX0P GPP_TX0P TXN1 C96 SCD1U16V2KX-3GP
LAN 23 PCIE_RXN1 AD4 GPP_RX0N GPP_TX0N AC2 1 2 PCIE_TXN1 23 LAN
26 PCIE_RXP2 AE2 AB4 TXP2 C97 1 2 SCD1U16V2KX-3GP PCIE_TXP2 26
MINICARD1 26 PCIE_RXN2 AD3 GPP_RX1N GPP_TX1N AB3 1 2 PCIE_TXN2 26 MINICARD1
26 PCIE_RXP3 AD1 AA2 TXP3 C501 1 2 SCD1U16V2KX-3GP PCIE_TXP3 26
MINICARD2 26 PCIE_RXN3 AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1 1 2 PCIE_TXN3 26 MINICARD2
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2
12 ALINK_NBRX_SBTX_P0 AA8 AD7 ALINK_NBTX_SBRX_P0 C99 1 2 SCD1U16V2KX-3GP

SB_RX0P SB_TX0P ALINK_NBTX_C_SBRX_P0 12
A 12 ALINK_NBRX_SBTX_N0 Y8 AE7 ALINK_NBTX_SBRX_N0 C100 1 2 SCD1U16V2KX-3GP SJV10-NL A
SB_RX0N SB_TX0N ALINK_NBTX_C_SBRX_N0 12
12 ALINK_NBRX_SBTX_P1 AA7 AE6 ALINK_NBTX_SBRX_P1 C101 1 2 SCD1U16V2KX-3GP
SB_RX1P SB_TX1P ALINK_NBTX_C_SBRX_P1 12
Y7 AD6 ALINK_NBTX_SBRX_N1 C102 1 2 SCD1U16V2KX-3GP
A-LINK 12 ALINK_NBRX_SBTX_N1 SB_RX1N
PCIE I/F SB
SB_TX1N ALINK_NBTX_SBRX_P2 C103 SCD1U16V2KX-3GP
ALINK_NBTX_C_SBRX_N1 12
12
12
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
AA5
AA6
SB_RX2P
SB_RX2N
SB_TX2P
SB_TX2N
AB6
AC6 ALINK_NBTX_SBRX_N2 C104
1
1
2
2 SCD1U16V2KX-3GP
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
12
12
Wistron Corporation
W5 AD5 ALINK_NBTX_SBRX_P3 C105 1 2 SCD1U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
12 ALINK_NBRX_SBTX_P3 SB_RX3P SB_TX3P ALINK_NBTX_C_SBRX_P3 12
Y5 AE5 ALINK_NBTX_SBRX_N3 C106 1 2 SCD1U16V2KX-3GP Taipei Hsien 221, Taiwan, R.O.C.
12 ALINK_NBRX_SBTX_N3 SB_RX3N SB_TX3N ALINK_NBTX_C_SBRX_N3 12
AC8 PCE_PCAL 1 2 Title
PCE_CALRP
PCE_CALRN AB8 PCE_NCAL R57 1 2 1K27R2F-L-GP 1D1V_S0
ATi-RS880M_HT LINK&PCIe(1/4)
R58 2KR2F-3-GP
RS880M-GP
www.vinafix.vn
Place < 100mils from pin AC8 and AB8 A3
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
SB Add C598 for solve 3D3V_S0

3D3V_S0
L1 CRT flicker issue Enables the Test Debug Bus using GPIO.
220ohm 200mA
1 2 3D3V_S0_AVDD
12,29,30 PLT_RST# 1 R59 2 SYSREST# SBK160808T-221Y-N-GP RS880M
3
4
0R0402-PAD 1ST 68.00217.711 C598
C574
1 Disable
2ND = 68.00119.111 SC2D2U6D3V2MX-GP
1
SC2D2U10V3KX-1GP RN136 0 Enable
2
C109 SRN4K7J-8-GP
SC220P50V2KX-3GP RS880M: Enables Side port memory
2
-1 Change R60,R62 to RN136. RS880M:HSYNC#
2
1
1D8V_S0
CRT_VSYNC
D Selects if Memory SIDE PORT is available or not D
CRT_HSYNC
1 = Memory Side port Not available
1
C110
SC1U10V2KX-1GP 0 = Memory Side port available
1D8V_S0 Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
2
1D8V_S0
U58
1 1 2 ANB1C
B R65
VCC 5
1
2 SBK160808T-221Y-N-GP F12 A22 LVDS_TXAOUT0+ 19
6,12 CPU_LDT_STOP# A AVDD1 TXOUT_L0P
1
4 NB_LDT_STOP# TC1 220ohm 200mA C575 E12 PART 3 OF 6 B22 LVDS_TXAOUT0- 19
Y AVDD2 TXOUT_L0N
3 SC2D2U10V3KX-1GP F14 A21 LVDS_TXAOUT1+ 19
2
GND AVDDDI TXOUT_L1P
ST100U6D3VBML1GP
77.C1071.081 G15 B21 LVDS_TXAOUT1- 19
2
74LVC1G08GW -1-GP 1D8V_S0_AVDDQ AVSSDI TXOUT_L1N
H15 AVDDQ TXOUT_L2P B20 LVDS_TXAOUT2+ 19
73.01G08.L04 H14 AVSSQ TXOUT_L2N A20 LVDS_TXAOUT2- 19
73.7SZ08.DAH CRT_BLUE A19
CRT_GREEN TXOUT_L3P
E17 C_Pr TXOUT_L3N B19
CRT_RED F17 Y
2
1
Close to NB ball F15 B18
CRT/TVOUT
COMP_Pb TXOUT_U0P
1
RN130 R68 A18
TXOUT_U0N
SRN150F-GP 20 CRT_RED G18 RED TXOUT_U1P A17
140R2F-GP
G17 REDb TXOUT_U1N B17
1D8V_S0 20 CRT_GREEN E18 D20
GREEN TXOUT_U2P
F18 D21
3
4
2
GREENb TXOUT_U2N
20 CRT_BLUE E19 BLUE TXOUT_U3P D18
F19 BLUEb TXOUT_U3N D19
1
R69 20 CRT_HSYNC A11 B16 LVDS_TXACLK+ 19

1KR2F-3-GP DAC_HSYNC TXCLK_LP
20 CRT_VSYNC B11 DAC_VSYNC TXCLK_LN A16 LVDS_TXACLK- 19
C F8 D16 C
20 CRT_DDCCLK DAC_SCL TXCLK_UP
E8 D17 1D8V_S0
20 CRT_DDCDATA
2
DAC_SDA TXCLK_UN
1D1V_S0 1 R70 2DAC_RSET G14
L2 DAC_RSET
715R2F-GP A13 1D8V_S0_VDDLT18 L33 1 2
NB_ALLOW _LDTSTOP 1D1V_S0_PLLVDD VDDLTP18
12 NB_ALLOW _LDTSTOP 1 2 A12 PLLVDD VSSLTP18 B13
SBK160808T-221Y-N-GP 1D8V_S0_PLVDD18 D14 BLM18PG471SN1D-GP
PLLVDD18
1
220ohm 200mA B12 PLLVSS VDDLT18_1 A15
C577 B15
VDDLT18_2
LVTM
1D8V_S0 2 SC2D2U10V3KX-1GP VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1
PLL PWR
R71 VDDLT33_2 B14
D7 VDDA18PCIEPLL1
1 2 VDDA18PCIEPLL E7 C14
VDDA18PCIEPLL2 VSSLT1
1
VSSLT2 D15
1
SYSREST# D8 C16 C576 C119

3D9R3-GP SYSRESET# VSSLT3
1
C120 C578 A10 C18 SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP

13 NB_PW RGD
2
POWERGOOD VSSLT4
SC10U6D3V5MX-3GP
SB Change R71 from bead SC2D2U10V3KX-1GP NB_LDT_STOP# C10 C20

2
NB_ALLOW _LDTSTOP LDTSTOP# VSSLT5

C12 E20
470 ohm to RES 3.9 ohm
2
ALLOW_LDTSTOP VSSLT6
VSSLT7 C22
CLOCKs PM
3 CLK_NBHT_CLK C25 HT_REFCLKP
3 CLK_NBHT_CLK# C24 HT_REFCLKN
DY 1D1V_S0
RN5 E11
3 CLK_NB_14M REFCLK_P/OSCIN
1 4 NB_REFCLK_N F11 E9 GMCH_LCDVDD_ON 19
REFCLK_N LVDS_DIGON
2 3 LVDS_BLON F7 BRIGHTNESS_AMD 19
CLK_NB_GFX T2 G12 KBC_BL_ON_IN 29
3 CLK_NB_GFX GFX_REFCLKP LVDS_ENA_BL
1D8V_S0 SRN1KJ-7-GP CLK_NB_GFX# T1
L5 3 CLK_NB_GFX# GFX_REFCLKN
1
2
1 2 VDDA18HTPLL U1 RN6
B GPP_REFCLKP B
220ohm 200mA U2 GPP_REFCLKN SRN10KJ-5-GP
1
SBK160808T-221Y-N-GP
C579 V4
3 CLK_NB_GPPSB GPPSB_REFCLKP
SC2D2U10V3KX-1GP 3 CLK_NB_GPPSB# V3
2
4
3
GPPSB_REFCLKN
19 CLK_DDC_EDID B9 I2C_CLK
A9 D9
19 DAT_DDC_EDID
21 GMCH_HDMI_DATA GMCH_HDMI_DATA B8
I2C_DATA MIS. TMDS_HPD
D10 TP39
HDMI_DETECT 21
TPAD14-GP
1D8V_S0 GMCH_HDMI_CLK DDC_CLK0/AUX0P DDC_DATA0/AUX0N HPD
L6 21 GMCH_HDMI_CLK A8 DDC_DATA0/AUX0N
B7 DDC_CLK0/AUX0P D12 SUS_STAT#
VDDA18PCIEPLL DDC_CLK1/AUX1P SUS_STAT# SUS_STAT# 13
1 2 A7 DDC_DATA1/AUX1N
220ohm 200mA THERMALDIODE_P AE8
1
SBK160808T-221Y-N-GP B10 AD8

C580 STRP_DATA THERMALDIODE_N
SC2D2U10V3KX-1GP G11 D13 TESTMODE_NB
2
RESERVED TESTMODE
1
RS780_AUX_CAL C8 AUX_CAL R73
1
1K8R2F-GP
R74 RS880M-GP
150R2F-1-GP
2
2
1D8V_S0
A SJV10-NL A
1 2 R101 NB_PW RGD

301R2F-GP
Wistron Corporation
Title
ATi-RS880M_video_STRAP(2/4)
www.vinafix.vn
A3
SJV10-NL -1
Date: Monday, February 01, 2010 Sheet 9 of 42
5 4 3 2 1
5 4 3 2 1
1D5V_S0 1D5V_S0
-1 Change R76,R78 to RN138. -1 Change R77,R79 to RN139.
MEM_COMP_P and MEM_COMP_N trace
width >=10mils and 10mils spacing from
4
3
4
3
C127 C128
ANB1D
1
other Signals in X,Y,Z directions
PAR 4 OF 6 SCD1U10V2KX-4GP RN138
SCD1U10V2KX-4GP RN139
SPM_A0 AB12 AA18 SPM_DQ0 SRN1KJ-7-GP SRN1KJ-7-GP
2
SPM_A1 MEM_A0 MEM_DQ0/DVO_VSYNC SPM_DQ1
AE16 MEM_A1 MEM_DQ1/DVO_HSYNC AA20
SPM_A2 V11 AA19 SPM_DQ2
1
2
1
2
SPM_A3 MEM_A2 MEM_DQ2/DVO_DE SPM_DQ3 SPM_VREF1 SPM_VREF2
AE15 MEM_A3 MEM_DQ3/DVO_D0 Y19
SPM_A4 AA12 V17 SPM_DQ4 C129 C130
MEM_A4 MEM_DQ4
1
SPM_A5 AB16 AA17 SPM_DQ5
SPM_A6 MEM_A5 MEM_DQ5/DVO_D1 SPM_DQ6 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
D AB14 MEM_A6 MEM_DQ6/DVO_D2 AA15 D
SPM_A7 AD14 Y15 SPM_DQ7
2
SPM_A8 MEM_A7 MEM_DQ7/DVO_D4 SPM_DQ8
AD13 MEM_A8 MEM_DQ8/DVO_D3 AC20
SPM_A9 AD15 AD19 SPM_DQ9
AC16 AE22
SBD_MEM/DVO_I/F
AE13 MEM_A11 MEM_DQ11/DVO_D7 AC18
SPM_A12 AC14 AB20 SPM_DQ12
SPM_A13 Y14
MEM_A12
MEM_A13
MEM_DQ12
MEM_DQ13/DVO_D9 AD22 SPM_DQ13
SPM_DQ14
CLOSE TO SDRAM
MEM_DQ14/DVO_D10 AC22
SPM_BA0 AD16 AD21 SPM_DQ15
SPM_BA1 MEM_BA0 MEM_DQ15/DVO_D11 U3
AE17 MEM_BA1
SPM_BA2 AD17 Y17 SPM_DQS0P 1D5V_S0
MEM_BA2 MEM_DQS0P/DVO_IDCKP SPM_DQS0N SPM_DQ2
MEM_DQS0N/DVO_IDCKN W18 K8 VDD DQL0 E3
SPM_RAS# W12 AD20 SPM_DQS1P K2 F7 SPM_DQ1
SPM_CAS# MEM_RAS# MEM_DQS1P SPM_DQS1N VDD DQL1 SPM_DQ5
Y12 MEM_CAS# MEM_DQS1N AE21 N1 VDD DQL2 F2
SPM_W E# AD18 R9 F8 SPM_DQ3
SPM_CS# MEM_WE# SPM_DM0 1D8V_S0 VDD DQL3 SPM_DQ7
AB13 MEM_CS# MEM_DM0 W17 B2 VDD DQL4 H3
SPM_CKE AB18 AE19 SPM_DM1 D9 H8 SPM_DQ0
100R2F-L1-GP-U SPM_ODT MEM_CKE MEM_DM1/DVO_D8 1D1V_S0 VDD DQL5 SPM_DQ4
V14 MEM_ODT G7 VDD DQL6 G2
R282 AE23 IOPLLVDD18 R80 1 2 BLM15AG121SN-1GP R1 H7 SPM_DQ6
SPM_CLKP IOPLLVDD18 IOPLLVDD R81 VDD DQL7
1 2 V15 MEM_CKP IOPLLVDD AE24 1 2 BLM15AG121SN-1GP N9 VDD
SPM_CLKN W14 D7 SPM_DQ13
MEM_CKN DQU0 SPM_DQ8
IOPLLVSS AD23 A8 VDDQ DQU1 C3
1
R82 1 2 40D2R2F-GP SPM_COMPP AE12 A1 C8 SPM_DQ10
R83 MEM_COMPP VDDQ DQU2
1D5V_S0 1 2 40D2R2F-GP SPM_COMPN AD12 MEM_COMPN MEM_VREF AE18 SPM_VREF C131 C132 C1 VDDQ DQU3 C2 SPM_DQ12
SPM_DQ15
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C9 A7
2
RS880M-GP VDDQ DQU4 SPM_DQ11
D2 VDDQ DQU5 A2
E9 B8 SPM_DQ14
1D5V_S0 VDDQ DQU6 SPM_DQ9
F1 VDDQ DQU7 A3
C H9 C
VDDQ SPM_DQS1P
H2 VDDQ DQSU C7
B7 SPM_DQS1N
DQSU#
3
4
SPM_VREF2 H1 1D5V_S0
C133 SPM_VREF1 VREFDQ SPM_DQS0P
M8 VREFCA DQSL F3
1 RN137 L8 ZQ DQSL# G3 SPM_DQS0N
1
SCD1U10V2KX-4GP SRN1KJ-7-GP
K1 SPM_ODT R86
2
SPM_A0 ODT
N3 10KR2J-3-GP
2
1
A0
1
SPM_VREF SPM_A1 P7
C134 R87 SPM_A2 A1 SPM_CS#
P3 L2
2
A2 CS#
1
-1 Change R84,R85 to RN137. 243R2F-2-GP SPM_A3 N2 T2

SCD1U10V2KX-4GP SPM_A4 A3 RESET#
P8 A4 DDR3_RST# 13
SPM_A5 P2
2
2
SPM_A6 A5
R8 A6 NC#T7 T7
SPM_A7 R2 L9
SPM_A8 A7 NC#L9
T8 A8 NC#L1 L1
SPM_A9 R3 J9
SPM_A10 A9 NC#J9
L7 A10/AP NC#J1 J1
SPM_A11 R7
SPM_A12 A11
N7
CLOSE TO NB SPM_A13 T3
A12/BC#
A13 VSS J8
M7 A15 VSS M1
VSS M9
VSS J2
SPM_BA0 M2 P9
SPM_BA1 BA0 VSS
N8 BA1 VSS G8
SPM_BA2 M3 B3
BA2 VSS
VSS T1
B B
VSS A9
SPM_CLKP J7 T9
SPM_CLKN CK VSS
K7 CK# VSS E1
VSS P1
SPM_CKE K9 CKE
VSSQ G1
VSSQ F9
SPM_DM1 D3 E8
SPM_DM0 DMU VSSQ
E7 DML VSSQ E2
VSSQ D8
VSSQ D1
SPM_W E# L3 B9
SPM_CAS# WE# VSSQ
K3 CAS# VSSQ B1
SPM_RAS# J3 G9
RAS# VSSQ
H5TQ1G63BFR-12C-GP
1D5V_S0
VR.1GB0G.004
2nd = VR.1GB0B.006
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP C139 C140
SC10U6D3V5MX-3GP
C135 C136 C137 C138 SC22U6D3V5MX-2GP
3rd = VR.1GB0T.002
2
2
DY
-1 DY C139,Change C140 to 22uF.
A SJV10-NL A
Wistron Corporation
Title
ATi-RS880M SIDE PORT(3/4)

www.vinafix.vn
A3
SJV10-NL -1
Date: W ednesday, January 27, 2010 Sheet 10 of 42
5 4 3 2 1
5 4 3 2 1
ANB1F
1D1V_S0
0.6A per ANT Rev1.1, Page3
A25 VSSAHT1 VSSAPCIE1 A2
1D1V_S0
D23 VSSAHT2 PART 6/6 VSSAPCIE2 B1
ANB1E E22 VSSAHT3 VSSAPCIE3 D3
C141 C143 300mil Width G22 D5
VSSAHT4 VSSAPCIE4
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
J17 VDDHT_1 VDDPCIE_1 A6 G24 VSSAHT5 VSSAPCIE5 E4
C142 K16 PART 5/6 B6 C149 G25 G1
VDDHT_2 VDDPCIE_2 VSSAHT6 VSSAPCIE6
1
SC4D7U6D3V3KX-GP
C147 C148
SC2D2U10V3KX-1GP
L16 C6 H19 G2
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D M16 D6 C146 C581 J22 G4 D
SCD1U10V2KX-4GP
SC2D2U10V3KX-1GP
P16 E6 L17 H7
2
R16 VDDHT_6 VDDPCIE_6 F6 DY L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
H18 VDDHTRX_1 VDDPCIE_9 J9 M20 VSSAHT13 VSSAPCIE13 L2
1D1V_S0 0.45A per ANT Rev1.1, Page3 G19 K9 N22 L4
VDDHTRX_2 VDDPCIE_10 VSSAHT14 VSSAPCIE14
F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
E21 VDDHTRX_4 VDDPCIE_12 L9 1103 R19 VSSAHT16 VSSAPCIE16 M6
C151 C152 D22 P9 10A per ANT Rev1.1, Page3 R22 N4
1
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B23 VDDHTRX_6 VDDPCIE_14 R9 R24 VSSAHT18 VSSAPCIE18 P6
C144 A23 T9 Per check list (Rev 0.02) R25 R1
SC2D2U10V3KX-1GP
V9 H20 R2
2
2
VDDPCIE_16 1D1V_S0 VSSAHT20 VSSAPCIE20
AE25 VDDHTTX_1 VDDPCIE_17 U9 RS780M: 1V ~ 1.1V, check PWR team U22 VSSAHT21 VSSAPCIE21 R4
AD24 VDDHTTX_2 V19 VSSAHT22 VSSAPCIE22 V7
GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4
1D1V_S0 AB22 J14 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24
1
AA21 U16 C154 C155 C156 C157 C158 C161 C162 W25 V6
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Y20 J11 C159 C160 Y21 W1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
W19 K15 AD25 W2
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C164 C165 C166 C167 V18 M12 W4
VDDHTTX_8 VDDC_6 DY DY VSSAPCIE28
1
1
SCD1U10V2KX-4GP
POWER
U17 VDDHTTX_9 VDDC_7 L14 L12 VSS11 VSSAPCIE29 W7
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C150 T17 L11 M14 W8
VDDHTTX_10 VDDC_8 VSS12 VSSAPCIE30
SC2D2U10V3KX-1GP
R17 M13 N13 Y6

2
VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31

P17 VDDHTTX_12 VDDC_10 M15 P12 VSS14 VSSAPCIE32 AA4
M17 VDDHTTX_13 VDDC_11 N12 P15 VSS15 VSSAPCIE33 AB5
VDDC_12 N14 R11 VSS16 VSSAPCIE34 AB1
J10 VDDA18PCIE_1 VDDC_13 P11 R14 VSS17 VSSAPCIE35 AB7
1D8V_S0 P10 P13 T12 AC3
C VDDA18PCIE_2 VDDC_14 VSS18 VSSAPCIE36 C
K10 VDDA18PCIE_3 VDDC_15 P14 U14 VSS19 VSSAPCIE37 AC4
80mil Width M10 VDDA18PCIE_4 VDDC_16 R12 U11 VSS20 VSSAPCIE38 AE1
L10 VDDA18PCIE_5 VDDC_17 R15 U15 VSS21 VSSAPCIE39 AE4
W9 VDDA18PCIE_6 VDDC_18 T11 V12 VSS22 VSSAPCIE40 AB2
1
C168 C170 C171 C172 C173 H9 T15 W11

VDDA18PCIE_7 VDDC_19 VSS23
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
T10 VDDA18PCIE_8 VDDC_20 U12 W15 VSS24

SC10U6D3V3MX-GP
R10 T14 AC12 AE14

2
VDDA18PCIE_9 VDDC_21 1D5V_S0 VSS25 VSS1

Y9 VDDA18PCIE_10 VDDC_22 J16 AA14 VSS26 VSS2 D11
AA9 VDDA18PCIE_11 Y18 VSS27 VSS3 G8
AB9 VDDA18PCIE_12 VDD_MEM1 AE10 AB11 VSS28 VSS4 E14
AD9 VDDA18PCIE_13 VDD_MEM2 AA11 AB15 VSS29 VSS5 E15
1D8V_S0 AE9 Y11 AB17 J15
VDDA18PCIE_14 VDD_MEM3 VSS30 VSS6
1
U10 AD10 C174 C582 AB19 J12
VDDA18PCIE_15 VDD_MEM4 VSS31 VSS7
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AB10 C583 C584 AE20 K14
VDD_MEM5 3D3V_S0 VSS32 VSS8
SCD22U10V2KX-1GP
SC2D2U10V3KX-1GP
F9 AC10 AB21 M11
2
1D8V_S0 VDD18_1 VDD_MEM6 VSS33 VSS9
G9 VDD18_2 K11 VSS34 VSS10 L15
1
C177 AE11 H11

VDD18_MEM1 VDD33_1
SC1U10V2KX-1GP
AD11 VDD18_MEM2 VDD33_2 H12

RS880M-GP
2
RS880M-GP
1
1
C178
SC1U10V2KX-1GP
C585 C595
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
2
2
B B
A SJV10-NL A
Wistron Corporation
Title
ATi-RS880M PWR&GND(4/4)
www.vinafix.vn
A3
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
-1 Change R89,R88 to RN140.
SRN33J-5-GP-U
RN140 ASB1A
23,26 PCIE_RST#_R 2 3 Part 1 of 5 TP38TPAD14-GP
9,29,30 PLT_RST# 1 4 PCIE_RST# P1 W2 PCI_CLK0_R
A_RST# PCIE_RST# PCICLK0 PCI_CLK1
L1 A_RST# PCICLK1/GPO36 W1 PCI_CLK1 16
PCI_CLK2
PCI CLKS
PCICLK2/GPO37 W3 PCI_CLK2 16
C181 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P0 AD26 W4 PCI_CLK3 PCI_CLK3 16
8 ALINK_NBRX_SBTX_P0 A_TX0P PCICLK3/GPO38
C186 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N0 AD27 Y1 PCI_CLK4 PCI_CLK4 16 HYNIX SAMSUNG ATI
8 ALINK_NBRX_SBTX_N0 A_TX0N PCICLK4/14M_OSC/GPO39
C187 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P1 AC28
8 ALINK_NBRX_SBTX_P1
C182 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N1 A_TX1P VR.1GB0G.004 VR.1GB0B.006 VR.1GB0T.002
8 ALINK_NBRX_SBTX_N1 1 2 AC29 A_TX1N PCIRST# V2
C183 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P2 AB29
8 ALINK_NBRX_SBTX_P2 A_TX2P
C184 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N2 AB28
8 ALINK_NBRX_SBTX_N2 A_TX2N
C188 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P3 AB26 AA1 VRAM_IDENT1 HIGH LOW HIGH
8 ALINK_NBRX_SBTX_P3 A_TX3P AD0/GPIO0
D C185 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N3 AB27 AA4 D
8 ALINK_NBRX_SBTX_N3 A_TX3N AD1/GPIO1
AA3
8 ALINK_NBTX_C_SBRX_P0 AE24
AD2/GPIO2
AB1
DEFAULT
A_RX0P AD3/GPIO3
8 ALINK_NBTX_C_SBRX_N0 AE23 A_RX0N AD4/GPIO4 AA5 VRAM_IDENT2 LOW HIGH HIGH
8 ALINK_NBTX_C_SBRX_P1 AD25 A_RX1P AD5/GPIO5 AB2
PCI EXPRESS INTERFACES

8 ALINK_NBTX_C_SBRX_N1 AD24 A_RX1N AD6/GPIO6 AB6
8 ALINK_NBTX_C_SBRX_P2 AC24 A_RX2P AD7/GPIO7 AB5
8 ALINK_NBTX_C_SBRX_N2 AC25 A_RX2N AD8/GPIO8 AA6
8 ALINK_NBTX_C_SBRX_P3 AB25 A_RX3P AD9/GPIO9 AC2
8 ALINK_NBTX_C_SBRX_N3 AB24 A_RX3N AD10/GPIO10 AC3
PCIE_VDDR AC4
R94 AD11/GPIO11
1 2 562R2F-GP PCIE_CALRP AD29 AC1
Place R <100mils form pins T25,T24 R90 1 2 2K05R2F-GP PCIE_CALRN AD28
PCIE_CALRP
PCIE_CALRN
AD12/GPIO12
AD13/GPIO13 AD1 SB820 CSL 25-35:* Note: If PCI interface is not used,
AD2
AA28 GPP_TX0P
AD14/GPIO14
AD15/GPIO15 AC6 then these balls can be used for alternate GPIO/GPO function
AA29 AE2
Y29
GPP_TX0N
GPP_TX1P
AD16/GPIO16
AD17/GPIO17 AE1 or left not connected.
Y28 GPP_TX1N AD18/GPIO18 AF8
Y26 AE3 3D3V_AUX_S5
GPP_TX2P AD19/GPIO19
Y27 GPP_TX2N AD20/GPIO20 AF1
W28 GPP_TX3P AD21/GPIO21 AG1
W29 GPP_TX3N AD22/GPIO22 AF2
AE9 PCI_AD23
AD23/GPIO23 PCI_AD23 16
2
AA22 AD9 PCI_AD24
GPP_RX0P AD24/GPIO24 PCI_AD24 16
Y21 AC11 PCI_AD25 D31
GPP_RX0N AD25/GPIO25 PCI_AD25 16
AA25 AF6 PCI_AD26 BAS16-1-GP
GPP_RX1P AD26/GPIO26 PCI_AD26 16
AA24 AF4 PCI_AD27 83.00016.B11
GPP_RX1N AD27/GPIO27 PCI_AD27 16
W23 AF3 PCI_AD28
GPP_RX2P AD28/GPIO28 PCI_AD28 16 2ND = 83.00016.K11
V24 AH2 PCI_AD29
PCI_AD29 16
1RTC_BAT_R 3
C GPP_RX2N AD29/GPIO29 3RD = 83.00016.F11 C
W24 GPP_RX3P AD30/GPIO30 AG2
W25 GPP_RX3N AD31/GPIO31 AH3 -1 Add VRAM identify pins.
CBE0# AA8
AD5 3D3V_S0 3D3V_S0
CBE1#
CBE2# AD8
CBE3# AA10
1
FRAME# AE8
AB9 R331 R334 R861
DEVSEL# 1KR2F-3-GP 1KR2F-3-GP
3 CLK_PCIE_SB M23 PCIE_RCLKP/NB_LNK_CLKP IRDY# AJ3 1KR2J-1-GP
3 CLK_PCIE_SB# P23 AE7 DY_HYNIX_ATI DY_SAMSUNG_ATI D30
PCI INTERFACE
PCIE_RCLKN/NB_LNK_CLKN TRDY#
AC5 2
2
PAR VRAM_IDENT1 VRAM_IDENT2 MLX-CON2-13-GP
U29 NB_DISP_CLKP STOP# AF5
U28 AE6 RTC_AUX_S5 3 RTC1
NB_DISP_CLKN PERR#
1
SERR# AE4 3
T26 AE11 R332 R333 1 RTC_BAT_DR
1 2 RTC_BAT_D 1
NB_HT_CLKP REQ0# 1KR2F-3-GP 1KR2F-3-GP R99
T27 NB_HT_CLKN REQ1#/GPIO40 AH5
AH4 DY_SAMSUNG DY_HYNIX 510R2J-1-GP 2
REQ2#/CLK_REQ8#/GPIO41 BAS40CW -GP
V21 AC12 4
2
CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42
T21 CPU_HT_CLKN GNT0# AD12 83.00040.E81
GNT1#/GPO44 AJ5
V23 SLT_GFX_CLKP GNT2#/GPO45 AH6
T23 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AB12 20.F1035.002
CLKRUN# AB11 PM_CLKRUN# 29 20.F0772.002
L29 GPP_CLK0P LOCK# AD7 SB Add RTC charge circuit.
1
L28 GPP_CLK0N
AJ6
GPIO34,35 internal pull high R96
INTE#/GPIO32
N29 GPP_CLK1P INTF#/GPIO33 AG6 DY 10KR2J-3-GP
N28 AG4 VRAM_IDENT1
GPP_CLK1N INTG#/GPIO34 VRAM_IDENT2
AJ4
2
B INTH#/GPIO35 B
M29 GPP_CLK2P
M28 GPP_CLK2N LPCCLK0_R 16
LPCCLK1_R 16
T25 RN7
GPP_CLK3P LPCCLK0_R
V25 GPP_CLK3N LPCCLK0 H24 1 4 SRN22-3-GP PCLK_FW H 30
H25 LPCCLK1_R 2 3 PCLK_KBC 29
LPCCLK1 EC3
L24 GPP_CLK4P LAD0 J27 LPC_LAD0 29,30 1DY 2
L23 J26 EC4 1 2SC22P50V2JN-4GP
GPP_CLK4N LAD1 LPC_LAD1 29,30
LAD2 H29 LPC_LAD2 29,30 DY SC22P50V2JN-4GP
LPC
P25 GPP_CLK5P LAD3 H28 LPC_LAD3 29,30

CLOCK GENERATOR
M25 GPP_CLK5N LFRAME# G28 LPC_LFRAME# 29,30 2 1

J25 LDRQ0# C189
LDRQ0# TP53 TPAD14-GP
P29 AA18 SC15P50V2JN-2-GP
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49
P28 GPP_CLK6N SERIRQ/GPIO48 AB19 INT_SERIRQ 29 SB Change C189 to 22pF,
N26
C190 to 15pF.
GPP_CLK7P
3
N27 GPP_CLK7N
1
G21 NB_ALLOW _LDTSTOP 9 X2
ALLOW_LDTSTP/DMA_ACTIVE# R97 X-32D768KHZ-34GPU
T29 GPP_CLK8P PROCHOT# H21 PROCHOT#_SB 6
T28 K19 CPU_PW RGD 6,41 10MR2J-L-GP 82.30001.661-1 Change C189 to 15pF.
GPP_CLK8N LDT_PG
CPU
LDT_STP# G22 CPU_LDT_STOP# 6,9 82.30001.B21

J24 CPU_LDT_RST# 6,41
2
LDT_RST#
L25 14M_25M_48M_OSC
SB Change R43 from
C1 RTC_X1
Dummy to 1M ohm. 32K_X1
25M_X1 L26 C2 RTC_X2 2 1
R43 25M_X1 32K_X2 C190
A 1 2 D2 RTC_CLK 28 SC15P50V2JN-2-GP SJV10-NL A
RTCCLK
X3 B2
RTC
1MR2F-GP 25M_X2 INTRUDER_ALERT# RTC_AUX_S5

1 2 L27 25M_X2 VDDBT_RTC_G B1
XTAL-25MHZ-102-GP Wistron Corporation

1
-1 Change C193 to 12pF. 82.30020.851 SB820M-GP C192 C194 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
2ND = 82.30020.A31 Taipei Hsien 221, Taiwan, R.O.C.

1
G122
71.SB820.M03
2
C193 C191 GAP-OPEN Title

SC12P50V2JN-3GP SC15P50V2JN-2-GP
ATi-SB820M_PCIE&PCI_(1/5)
2
SB Add G122.
www.vinafix.vn
A3
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
ASB1D
J2 A10 CLK48_USB
PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC CLK48_USB 3
TP61 1 RI# K1 RI#/GEVENT22#
D3 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP G19 USB_PCOMP 1 2
F1 R102 1 DY 2CLK48_USB_R2 C195
1 DY2
19,27,28,29,35 PM_SLP_S3# SLP_S3# 11K8R2F-GP R103
29,35 PM_SLP_S4# H1 SLP_S5# Part 4 of 5
10KR2J-3-GP SC10P50V2JN-4GP
F2 1%
ACPI / WAKE UP EVENTS

29,41 PM_PW RBTN# PWR_BTN#
27 SB_PW RGD H5 PWR_GOOD
SUS_STAT# G6 J10
TPAD14-GP SB_TEST0 9 SUS_STAT# SUS_STAT# USB_FSD1P/GPIO186
TP110 B3 TEST0 USB_FSD1N H11 Place R near pin14. Route it with 10mils
D TPAD14-GP SB_TEST1 C4 D
TPAD14-GP
TP111
SB_TEST2 TEST1/TMS Trace width and 25mils spacing to any
TP112 F6 TEST2 USB_FSD0P/GPIO185 H9
29 KA20GATE AD21 J8 signals in X, Y, Z directions.
GA20IN/GEVENT0# USB_FSD0N
MISC
1.1
29 KBRCIN# AE21 KBRST#/GEVENT1#
3D3V_S5 K2 B12
29 ECSCI# LPC_PME#/GEVENT3# USB_HSD13P USB
USB
TPAD14-GP ECSMI#_KBC J29 A12
TP63 LPC_SMI#/GEVENT23# USB_HSD13N
USB
TPAD14-GP GEVENT5# H2
TP60 GEVENT5#
RN8 TPAD14-GP SYS_RST# J1 F11 USBPP12 26
TP62 SYS_RESET#/GEVENT19# USB_HSD12P
8 1 PM_SLP_S4# 23,26 PCIE_W AKE# H6 E11 USBPN12 26 Pair Device
ECSCI# WAKE#/GEVENT8# USB_HSD12N
7 2 F3 IR_RX1/GEVENT20#
6 3 PM_SLP_S3# J6 E14 USBPP11 26 0 USB1(HS)
EC_SW I# NB_PW RGD THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P
5 4 9 NB_PW RGD AC19 NB_PWRGD USB_HSD11N E12 USBPN11 26
1 MINICARD1
SRN10KJ-6-GP RSMRST#_SB G1 J12
RSMRST# USB_HSD10P
USB_HSD10N J14 2 NC
AD19 CLK_REQ4#/SATA_IS0#/GPIO64
AA16 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P A13 USBPP9 19 3 NC
AB21 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N B13 USBPN9 19
3D3V_S0
AC18 CLK_REQ0#/SATA_IS3#/GPIO60 4 Cardreader
AF20 SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P D13
AE19 SATA_IS5#/FANIN3/GPIO59 USB_HSD8N C13 5 USB2
22 ACZ_SPKR AF19 SPKR/GPIO66
SMBC0_SB AD22 G12 USBPP7 31 6 USB3
SCL0/GPIO43 USB_HSD7P
4
3
USB 2.0
SMBD0_SB AE22 G14 USBPN7 31
RN37 SDA0/GPIO47 USB_HSD7N
F5 SCL1/GPIO227 7 Blue Tooth
SRN2K2J-1-GP F4 SDA1/GPIO228 USB_HSD6P G16 USBPP6 31
AH21 CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N G18 USBPN6 31 8 NC
AB18 CLK_REQ1#/FANOUT4/GPIO61
E1 D16 USBPP5 31 9 WECAM
1
2
C SMBC0_SB SB820 CSL 55-125:connect to side port IR_LED#/LLB#/GPIO184 USB_HSD5P C

SMBC0_SB 3,17,18 AJ21 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD5N C16 USBPN5 31
SMBD0_SB SMBD0_SB 3,17,18 10 DDR3_RST# H4 10 NC
DDR3_RST#/GEVENT7#
D5 GBE_LED0/GPIO183 USB_HSD4P B14 USBPP4 25
D7 GBE_LED1/GEVENT9# USB_HSD4N A14 USBPN4 25 11 MINIC2(3G sim)
G5 GBE_LED2/GEVENT10#
RN9
GPIO
K3 GBE_STAT0/GEVENT11# USB_HSD3P E18 12 MINIC2(3G)
3D3V_S0 8 1 SUS_STAT# AA20 E16
CLK_REQG#/GPIO65/OSCIN/IDLEEXT# USB_HSD3N
7 2 13 NC
6 3 USB_OC# J16
PCIE_W AKE# USB_HSD2P
3D3V_S5 5 4 H3 BLINK/USB_OC7#/GEVENT18# USB_HSD2N J18
29 EC_SW I# D1 USB_OC6#/IR_TX1/GEVENT6#
SRN10KJ-6-GP E4 B17
USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P USBPP1 26
USB OC
D4 USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N A17 USBPN1 26
USB_OC# E8 USB_OC3#/AC_PRES/TDO/GEVENT15#
F7 USB_OC2#/TCK/GEVENT14# USB_HSD0P A16 USBPP0 31
E7 USB_OC1#/TDI/GEVENT13# USB_HSD0N B16 USBPN0 31
16 ACZ_SDATAOUT_R F8 USB_OC0#/TRST#/GEVENT12#
22 ACZ_RST#_AUDIO ACZ_BIT_CLK M3 D25

ACZ_SDATAOUT_R N1 AZ_BITCLK SCL2/GPIO193
22 ACZ_SDATAOUT_AUDIO AZ_SDOUT SDA2/GPIO194 F23
22 ACZ_SDATAIN0 RN49 L2 B26
AZ_SDIN0/GPIO167 SCL3_LV/GPIO195
4 5
M2
M1
AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 E26
F25
Strap Pin / define to use LPC or SPI ROM
AZ_SDIN2/GPIO169 EC_PWM0/EC_TIMER0/GPIO197
3 6 M4 AZ_SDIN3/GPIO170 EC_PWM1/EC_TIMER1/GPIO198 E22
22 ACZ_SYNC_AUDIO 2 7 ACZ_SYNC_R N2 F22 SB_GPO199 16
ACZ_RST#_R AZ_SYNC EC_PWM2/EC_TIMER2/GPIO199
22 ACZ_BITCLK_AUDIO 1 8 P2 AZ_RST# EC_PWM3/EC_TIMER3/GPIO200 E21 SB_GPO200 16
B B
HD AUDIO
SRN33J-7-GP KSI_0/GPIO201 G24
T1 GBE_COL KSI_1/GPIO202 G25
T4 GBE_CRS KSI_2/GPIO203 E28
1
L6 E29 1KR2J-1-GP
EC47 R117 1 GBE_MDCK KSI_3/GPIO204
DY 3D3V_S5 2
10KR2J-3-GP
L5 GBE_MDIO KSI_4/GPIO205 D29
SC33P50V2JN-3GP T9 D28 2 1
2
GBE_RXCLK KSI_5/GPIO206
U1 GBE_RXD3 KSI_6/GPIO207 C29
-1 Reserve EC47 for EMI issue. U3 C28 R238 2 SB Del net RSMRST#_SB
GBE_RXD2 KSI_7/GPIO208
T2 GBE_RXD1 pull high.
GBE LAN
RN46 U2 GBE_RXD0 KSO_0/GPIO209 B28 29 RSMRST#_KBC 3

T5 GBE_RXCTL/RXDV KSO_1/GPIO210 A27
4 5 V5 B27 3D3V_AUX_S5 1 RSMRST#_SB
GBE_RXERR KSO_2/GPIO211 D22
3 6 P5 GBE_TXCLK KSO_3/GPIO212 D26
2 7 M5 GBE_TXD3 KSO_4/GPIO213 A26 BAS16-6-GP
1
3D3V_S5 1 8 P9 C26 R535
GBE_TXD2 KSO_5/GPIO214
4
3
T7 GBE_TXD1 KSO_6/GPIO215 A24 83.00016.F11
100KR2J-1-GP
P7 B25 RN43
SRN10KJ-6-GP GBE_TXD0 KSO_7/GPIO216
EMBEDDED CTRL
M7 A25 SRN10KJ-5-GP DY
GBE_TXCTL/TXEN KSO_8/GPIO217 U17
P4 D24
2
GBE_PHY_PD KSO_9/GPIO218
M9 GBE_PHY_RST# KSO_10/GPIO219 B24 4 3
V7 C24
1
2
GBE_PHY_INTR KSO_11/GPIO220 S5_PW R_GD#
KSO_12/GPIO221 B23 5 2 S5_PW R_GD 34
E23 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222 A23
E24 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223 D22 6 1
S5_PW R_GD
EMBEDDED CTRL
F21 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224 C22

G29 A22 2N7002KDW -GP
FC_RST#/GPO160 KSO_16/GPIO225
KSO_17/GPIO226 B22 SB Change S5_PWR_GD pull high 84.2N702.A3F
D27 PS2KB_DAT/GPIO189 from R261 to RN43. 2ND = 84.DM601.03F
A F28 PS2KB_CLK/GPIO190 SJV10-NL A
F29 PS2M_DAT/GPIO191
E27 PS2M_CLK/GPIO192
Wistron Corporation
SB820M-GP
Title
71.SB820.M03 ATi-SB820M_USB&GPIO_(2/5)
www.vinafix.vn
A3
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
PLACE SATA AC DECOUPLING

CAPS CLOSE TO SB710
ASB1B
Part 2 of 5
31 SATA_TXP0_C SATA_TXP0_C AH9 AH28

SATA_TXN0_C SATA_TX0P FC_CLK
31 SATA_TXN0_C AJ9 SATA_TX0N FC_FBCLKOUT AG28
SATA HDD FC_FBCLKIN AF26
31 SATA_RXN0_C SATA_RXN0_C AJ8
SATA_RXP0_C SATA_RX0N
31 SATA_RXP0_C AH8 SATA_RX0P FC_OE#/GPIOD145 AF28
FC_AVD#/GPIOD146 AG29
D AH10 SATA_TX1P FC_WE#/GPIOD148 AG26 D
AJ10 SATA_TX1N FC_CE1#/GPIOD149 AF27
FC_CE2#/GPIOD150 AE29
AG10 SATA_RX1N FC_INT1/GPIOD144 AF29
AF10 SATA_RX1P FC_INT2/GPIOD147 AH27
AG12 SATA_TX2P FC_ADQ0/GPIOD128 AJ27

AF12 SATA_TX2N FC_ADQ1/GPIOD129 AJ26
FC_ADQ2/GPIOD130 AH25
AJ12 SATA_RX2N FC_ADQ3/GPIOD131 AH24
AH12 SATA_RX2P FC_ADQ4/GPIOD132 AG23
FC_ADQ5/GPIOD133 AH23
AH14 SATA_TX3P FC_ADQ6/GPIOD134 AJ22
AJ14 SATA_TX3N FC_ADQ7/GPIOD135 AG21
FC_ADQ8/GPIOD136 AF21
AG14 SATA_RX3N FC_ADQ9/GPIOD137 AH22
AF14 SATA_RX3P FC_ADQ10/GPIOD138 AJ23
FC_ADQ11/GPIOD139 AF23
AG17 SATA_TX4P FC_ADQ12/GPIOD140 AJ24
AF17 SATA_TX4N FC_ADQ13/GPIOD141 AJ25
FC_ADQ14/GPIOD142 AG25
AJ17 SATA_RX4N FC_ADQ15/GPIOD143 AH26
AH17
FLASH
SATA_RX4P
AJ18 SATA_TX5P
AH18 SATA_TX5N FANOUT0/GPIO52 W5
FANOUT1/GPIO53 W6
AH19 SATA_RX5N FANOUT2/GPIO54 Y9
AJ19
SERIAL ATA
C R115 SATA_RX5P C
FANIN0/GPIO56 W7
1KR2F-3-GP V9
R116 FANIN1/GPIO57
1 2 SATA_CALP AB14 W8
SATA_CALN AA14 SATA_CALRP FANIN2/GPIO58
AVDD_SATA 1 2 SATA_CALRN
TEMPIN0/GPIO171 B6
931R2F-1-GP TEMPIN1/GPIO172 A6
25 SATA_LED# AD11 SATA_ACT#/GPIO67 TEMPIN2/GPIO173 A5
B5 ALERT#
TEMPIN3/TALERT#/GPIO174
TEMP_COMM C7
A3 PSW _CLR#
VIN0/GPIO175
AD16 SATA_X1 VIN1/GPIO176 B4
VIN2/GPIO177 A4
VIN3/GPIO178 C5
VIN4/GPIO179 A7
VIN5/GPIO180 B7
VIN6/GBE_STAT3/GPIO181 B8
HW MONITOR
AC16 SATA_X2 VIN7/GBE_LED3/GPIO182 A8
J5 SPI_DI/GPIO164 NC#G27 G27

E2 SPI_DO/GPIO163 NC2#Y2 Y2
SPI ROM
K4 SPI_CLK/GPIO162
K9 SPI_CS1#/GPIO165
G2 ROM_RST#/GPIO161
B B
SB820M-GP
3D3V_S0
71.SB820.M03
RN41
8 1 SATA_LED#
7 2
6 3 ALERT#
ALERT# 28
5 4 PSW _CLR#
SRN10KJ-6-GP
PSW _CLR#
2
G1
GAP-OPEN
1
A SJV10-NL A
Wistron Corporation
Title
ATi-SB820M_SATA-FC_(3/5)
5 4
www.vinafix.vn 3 2
A3
Date:
SJV10-NL
1
14 of 42
-1
5 4 3 2 1
ASB1E
3D3V_S0 ASB1C 1D1V_S0 Part 5 of 5

131mA Part 3 of 5 510mA Y14 VSSIO_SATA VSS AJ2
AH1 VDDIO_33_PCIGP VDDCR_11 N13 Y16 VSSIO_SATA VSS A28
V6 VDDIO_33_PCIGP VDDCR_11 R15 AB16 VSSIO_SATA VSS A2
1
C207 C208 C209 C210 Y19 N17 C212 C219 C214 C215 C216 AC14 E5
VDDIO_33_PCIGP VDDCR_11 VSSIO_SATA VSS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
CORE S0
AE5 VDDIO_33_PCIGP VDDCR_11 U13 AE12 VSSIO_SATA VSS D23
AC21 U17 AE14 E25
2
AA2 VDDIO_33_PCIGP VDDCR_11 V12 AF9 VSSIO_SATA VSS E6
AB4 VDDIO_33_PCIGP VDDCR_11 V18 AF11 VSSIO_SATA VSS F24
AC8 VDDIO_33_PCIGP VDDCR_11 W12 DY AF13 VSSIO_SATA VSS N15
D AA7 W18 1D1V_S0 AF16 R13 D
AA9 VDDIO_33_PCIGP AG8 VSSIO_SATA VSS R17
AF7 VDDIO_33_PCIGP TBDmA AH7 VSSIO_SATA VSS T10
AA19 K28 AH11 P10
PCI/GPIO I/O
VDDIO_33_PCIGP VDDAN_11_CLK VSSIO_SATA VSS
VDDAN_11_CLK K29 AH13 VSSIO_SATA VSS V11
1
71mA J28 C218 AH16 U15
VDDAN_11_CLK VSSIO_SATA VSS
SC4D7U6D3V3KX-GP
VDDAN_11_CLK K26 AJ7 VSSIO_SATA VSS M18
J21 AJ11 V19
2
VDDAN_11_CLK VSSIO_SATA VSS
AF22 VDDIO_18_FC VDDAN_11_CLK J20 AJ13 VSSIO_SATA VSS M11
AE25 VDDIO_18_FC VDDAN_11_CLK K21 AJ16 VSSIO_SATA VSS L12
3D3V_S0 AF24 J22 L18
VDDIO_18_FC VDDAN_11_CLK VSS
AC22 VDDIO_18_FC DY A9 VSSIO_USB VSS J7
B10 VSSIO_USB VSS P3
CLKGEN I/O
VDDRF_GBE_S V1 K11 VSSIO_USB VSS V4
1
C225 B9 AD6
POWER
FLASH I/O
VSSIO_USB VSS
SC4D7U6D3V3KX-GP
VDDIO_33_GBE_S M10 D10 VSSIO_USB VSS AD4

43mA D12 AB7
2
VSSIO_USB VSS
AE28 VDDPL_33_PCIE D14 VSSIO_USB VSS AC9
GBE LAN
1D1V_S0 PCIE_VDDR D17 V8
L22 VSSIO_USB VSS
600mA E9 VSSIO_USB VSS W9
PCI EXPRESS
1 2 U26 VDDAN_11_PCIE VDDCR_11_GBE_S L7 F9 VSSIO_USB VSS W10
V22 VDDAN_11_PCIE VDDCR_11_GBE_S L9 F12 VSSIO_USB VSS AJ28
1
1
C211 C586 C228 C229 C230 V26 F14 B29
BLM21PG220SN1DGP VDDAN_11_PCIE VSSIO_USB VSS
SC10U6D3V3MX-GP SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
V27 VDDAN_11_PCIE F16 VSSIO_USB VSS U4
4A V28 M6 C9 Y18
2
2
VDDAN_11_PCIE VDDIO_GBE_S VSSIO_USB VSS
V29 VDDAN_11_PCIE VDDIO_GBE_S P8 G11 VSSIO_USB VSS Y10
3D3V_S0 W22 F18 Y12
GROUND
VDDAN_11_PCIE VSSIO_USB VSS
DY W26 VDDAN_11_PCIE D9 VSSIO_USB VSS Y11
L31 1 2 BLM15AG121SN-1GP H12 AA11
C VSSIO_USB VSS C
H14 VSSIO_USB VSS AA12
93mA 3D3V_S5 H16 VSSIO_USB VSS G4
1
C231 VDDPL_33_SATA AD14 H18 J4

VDDPL_33_SATA 32mA VSSIO_USB VSS
VDDIO_33_S A21 J11 VSSIO_USB VSS G8
AJ20 D21 J19 G9
2
1D1V_S0 AVDD_SATA VDDAN_11_SATA VDDIO_33_S VSSIO_USB VSS

L13 AF18 VDDAN_11_SATA VDDIO_33_S B21 K12 VSSIO_USB VSS M12
1
567mA AH20 K10 C232 C233 K14 AF25
VDDAN_11_SATA VDDIO_33_S VSSIO_USB VSS
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2 AG19 VDDAN_11_SATA VDDIO_33_S L10 K16 VSSIO_USB VSS H7
AE18 J9 K18 AH29
2
VDDAN_11_SATA VDDIO_33_S VSSIO_USB VSS
1
C236 C237 AD18 T6 H19 V10

BLM21PG220SN1DGP VDDAN_11_SATA VDDIO_33_S VSSIO_USB VSS
1
1
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
EC9 C234 C235 AE16 T8 1D1V_S5 P6

VDDAN_11_SATA VDDIO_33_S VSS
SCD1U16V2ZY-2GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SERIAL ATA
4A N4
2
VSS
113mA Y4 L4
2
3.3V_S5 I/O
EFUSE VSS
VSS L8
1
C239 C587
CORE S5
VDDCR_11_S F26 D8 VSSAN_HWM
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
A18 VDDAN_33_USB_S VDDCR_11_S G26
A19 M19 M20
2
VDDAN_33_USB_S VSSXL VSSPL_SYS
A20 VDDAN_33_USB_S VDDIO_AZ_S M8 1D5V_S3
B18 VDDAN_33_USB_S
B19 A11 VDDCR_1.1V_USB P21 H23
VDDAN_33_USB_S VDDCR_11_USB_S VSSIO_PCIECLK VSSIO_PCIECLK
B20 VDDAN_33_USB_S VDDCR_11_USB_S B11 P20 VSSIO_PCIECLK VSSIO_PCIECLK H26
USB I/O
3D3V_S5 AVDD_USB
C18 VDDAN_33_USB_S 197mA M22 VSSIO_PCIECLK VSSIO_PCIECLK AA21
C20 1D1V_S5 M24 AA23
L14 VDDAN_33_USB_S 47mA VSSIO_PCIECLK VSSIO_PCIECLK
D18 VDDAN_33_USB_S VDDPL_33_SYS M21 VDDPL_3.3V M26 VSSIO_PCIECLK VSSIO_PCIECLK AB23
1 2 D19 L15 1 2 P22 AD23
VDDAN_33_USB_S 62mA VSSIO_PCIECLK VSSIO_PCIECLK
D20 VDDAN_33_USB_S VDDPL_11_SYS_S L22 VDDPL_1.1V P24 VSSIO_PCIECLK VSSIO_PCIECLK AA26
1
C241 C242 C243 C244 E19 BLM18PG471SN1D-GP P26 AC26

PBY201209T-221Y-N-GP VDDAN_33_USB_S 17mA VSSIO_PCIECLK VSSIO_PCIECLK
PLL
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VDDPL_33_USB_S F19 3D3V_S5 T20 VSSIO_PCIECLK VSSIO_PCIECLK Y20

68.00206.121 T22 W21
5mA
2
B 3D3V_S5 VSSIO_PCIECLK VSSIO_PCIECLK B

2ND = 68.00216.161 C11 VDDAN_11_USB_S VDDAN_33_HWM_S D6 3D3V_S5 T24 VSSIO_PCIECLK VSSIO_PCIECLK W20
D11 L16 V20 AE26
VDDAN_11_USB_S 3D3V_AVDDC VSSIO_PCIECLK VSSIO_PCIECLK
VDDXL_33_S L20 1 2 J23 VSSIO_PCIECLK VSSIO_PCIECLK L21
1
PBY201209T-221Y-N-GP C249 C251 K20
VSSIO_PCIECLK
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
C588 68.00206.121
SC4D7U6D3V3KX-GP
1D1V_S5 2ND = 68.00216.161
2
2
TBDmA SB820M-GP
L30 SB820M-GP
1 2 VDDAN_1.1V_USB
PBY201209T-221Y-N-GP 71.SB820.M03
71.SB820.M03
1
C252 C253
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
68.00206.121
2
2ND = 68.00216.161
close to ball F19
close to ball M8
3D3V_S5
VDDPL_3.3V 3D3V_S0
R120 1D5V_S3
2 1
C256
1
C254 BLM18PG471SN1D-GP
1
1
SCD1U10V2KX-4GP
C257 C260
VDDPL_1.1V
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
1D1V_S5 C255
SC2D2U10V3KX-1GP
2
2
SC2D2U10V3KX-1GP
2
2
L29
A 1 2 SJV10-NL A
PBY201209T-221Y-N-GP
1
C330
SC4D7U6D3V3KX-GP
68.00206.121
Wistron Corporation
2
2ND = 68.00216.161 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Title
ATi-SB820M_POWER&GND_(4/5)
5 4
www.vinafix.vn 3 2
A3
Date:
SJV10-NL
1
15 of 42
-1
5 4 3 2 1
3D3V_S0
3D3V_S5
D D
1
1
R843 R124 R126 R129 R130
10KR2J-3-GP R127 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP SB change net PCLK_FWH to LPCCLK0_R
10KR2J-3-GP
DY DY DY DY DY change net PCLK_KBC to LPCCLK1_R
DY
2
2
ACZ_SDATAOUT_R 13
2
LPCCLK0_R 12
PCI_CLK1 12
LPCCLK1_R 12
PCI_CLK2 12
1
PCI_CLK3 12 -1 Change R138,R139 to RN142.

R134 SB_GPO200 13
1
2
10KR2J-3-GP PCI_CLK4 12 SB_GPO199 13
RN142
DY
1
2
3
4
SRN10KJ-5-GP
2
1
RN15
SRN10KJ-6-GP R137 R140 R141
10KR2J-3-GP 2K2R2J-2-GP 2K2R2J-2-GP
4
3
3D3V_S0 DY DY
8
7
6
5
2
-1 Change R133,R135,R136,R128
to RN141.
C C
REQUIRED AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199
STRAPS
PULL LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN
HIGH MODE PCIE Gen2 Timer DEBUG CLOCK MODE ENABLED ENABLED H,H = Reserved
DEFAULT Enabled STRAP DEFAULT
H,L = SPI ROM
PULL PERFORMANCE FORCE Watchdog IGNORE FUSION EC CLKGEN L,H = LPC ROM (Default)
LOW MODE PCIE Gen1 Timer DEBUG CLOCK MODE DISABLED DISABLED
L,L = FWH ROM
Disabled STRAP DEFAULT
DEFAULT DEFAULT DEFAULT DEFAULT
DEBUG STRAPS
TPAD14-GP TP79
TPAD14-GP PCI_AD23 12
TP80 PCI_AD24 12
TPAD14-GP TP81
TP82 PCI_AD26 12
TPAD14-GP TP83
TP84 PCI_AD28 12
TPAD14-GP TP85 PCI_AD29 12
B B
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI

LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
A SJV10-NL A
Wistron Corporation
Title
ATi-SB820M_STRAPPING_(5/5)
5 4
www.vinafix.vn 3 2
A3
Date:
SJV10-NL
1
16 of 42
-1
5 4 3 2 1
5 M_A_A[15..0] DIM2
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 NP2
M_A_A2 A1 NP2
96
M_A_A3 A2
95 110 M_A_RAS# 5
M_A_A4 A3 RAS#
92 113 M_A_WE# 5
M_A_A5 A4 WE#
91 115 M_A_CAS# 5
M_A_A6 A5 CAS#
90
M_A_A7 A6
86 114 M_CS#0 5
M_A_A8 A7 CS0#
89 121 M_CS#1 5
M_A_A9 A8 CS1#
D 85 D
M_A_A10 A9 1D5V_S3
107 73 M_CKE0 5
M_A_A11 A10/AP CKE0
84 74 M_CKE1 5
M_A_A12 A11 CKE1
83
M_A_A13 A12
119 101 M_CLK_DDR0 5
4
3
M_A_A14 A13 CK0
80 103 M_CLK_DDR#0 5
M_A_A15 A14 CK0# RN11
78
A15
5 M_A_BS2
79 102 M_CLK_DDR1 5 SRN1KJ-7-GP
A16/BA2 CK1
104 M_CLK_DDR#1 5
CK1#
5 M_A_BS0 109 M_A_DM[7..0] 5
BA0 M_A_DM0
108 11
1
2
5 M_A_BS1 BA1 DM0 M_A_DM1
5 M_A_DQ[63..0] 28
M_A_DQ0 DM1 M_A_DM2
5 46 PM_EXTTS#1 5,18
M_A_DQ1 DQ0 DM2 M_A_DM3
7 63
M_A_DQ2 DQ1 DM3 M_A_DM4 PM_EXTTS#0
15 136
17 153
4 170
6 187
M_A_DQ6 DQ5 DM7
16
M_A_DQ7 DQ6
18 200 SMBD0_SB 3,13,18
M_A_DQ8 DQ7 SDA
21 202 SMBC0_SB 3,13,18
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 3D3V_S0
33 198 PM_EXTTS#0 5
M_A_DQ11 DQ10 EVENT#
35
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD
24
M_A_DQ14 DQ13
34 197
2
M_A_DQ15 DQ14 SA0 C261
36 201
M_A_DQ16 DQ15 SA1 C262
39
DQ16
SCD1U10V2KX-5GP
M_A_DQ17 41 77 SC2D2U10V3KX-1GP
1
M_A_DQ18 DQ17 NC#1
51 122
M_A_DQ19 DQ18 NC#2 1D5V_S3
53 125
M_A_DQ20 DQ19 NC#/TEST
40
M_A_DQ21 DQ20
C 42 75 C
M_A_DQ22 DQ21 VDD1
50 76
M_A_DQ23 DQ22 VDD2
52 81
M_A_DQ24 DQ23 VDD3
57 82
M_A_DQ25 DQ24 VDD4
59 87
M_A_DQ26 DQ25 VDD5
67 88
M_A_DQ27 DQ26 VDD6
M_A_DQ28
69
DQ27 VDD7
93 SODIMM A DECOUPLING
56 94
M_A_DQ29 DQ28 VDD8 1D5V_S3
58 99
M_A_DQ30 DQ29 VDD9
68 100
M_A_DQ31 DQ30 VDD10
70 105
M_A_DQ32 DQ31 VDD11
129
DQ32 VDD12
106 -1 Change C266 to dummy.
M_A_DQ33 131 111
M_A_DQ34 DQ33 VDD13
141 112
M_A_DQ35 DQ34 VDD14
143 117 DY
1
M_A_DQ36 DQ35 VDD15 C263 C264 C265 C266 C267
130 118
DQ36 VDD16
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_A_DQ37 132 123
M_A_DQ38 DQ37 VDD17
140 124
2
M_A_DQ39 DQ38 VDD18
142
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS
149 3
M_A_DQ42 DQ41 VSS
157 8
M_A_DQ43 DQ42 VSS
159 9
M_A_DQ44 DQ43 VSS
146 13
M_A_DQ45 DQ44 VSS
148 14
M_A_DQ46 DQ45 VSS
158
DQ46 VSS
19 -1 Change ,C271 to dummy.
M_A_DQ47 160 20
M_A_DQ48 DQ47 VSS
163 25
M_A_DQ49 DQ48 VSS C268 C269 C270 C271 C272 C273
165 26 Layout Note:
1
DQ49 VSS
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_A_DQ50 175 31
M_A_DQ51 DQ50 VSS Place these Caps near
177 32
M_A_DQ52 DQ51 VSS
164 37 SO-DIMMA.
2
M_A_DQ53 DQ52 VSS
166 38
M_A_DQ54 DQ53 VSS
B 174 43 B
DDR_VREF_S3_1 M_A_DQ55 DQ54 VSS
176 44
M_A_DQ56 DQ55 VSS
181 48
M_A_DQ57 DQ56 VSS
183 49
M_A_DQ58 DQ57 VSS
191 54
1
M_A_DQ59 DQ58 VSS

193 55
C274 C275 M_A_DQ60 DQ59 VSS
180 60
SCD1U10V2KX-5GP M_A_DQ61 DQ60 VSS
SC2D2U10V3KX-1GP 182 61
2
M_A_DQ62 DQ61 VSS

192 65
M_A_DQ63 DQ62 VSS
194 66
DQ63 VSS
5 M_A_DQS#[7..0] 71
M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45 128
M_A_DQS#3 DQS2# VSS
62 133
DDR_VREF_S3_1 M_A_DQS#4 DQS3# VSS
135 134
M_A_DQS#5 DQS4# VSS
152 138
M_A_DQS#6 DQS5# VSS
169 139
M_A_DQS#7 DQS6# VSS
186 144
1
DQS7# VSS
5 M_A_DQS[7..0] 145
C276 C277 M_A_DQS0 VSS
12 150
SCD1U10V2KX-5GP M_A_DQS1 DQS0 VSS
SC2D2U10V3KX-1GP 29 151
2
M_A_DQS2 DQS1 VSS

47 155
M_A_DQS3 DQS2 VSS
64 156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
M_A_DQS6 DQS5 VSS
171 167
DDR_VREF_S3 M_A_DQS7 DQS6 VSS
Place these caps 188
DQS7 VSS
168
172
close to VTT1 and VSS
5 M_ODT0
116 173
ODT0 VSS
VTT2. -1 Change C281 to dummy. 5 M_ODT1 120
ODT1 VSS
178
179
DDR_VREF_S3_1 VSS
126 184
DDR_VREF_S3_1 VREF_CA VSS
A DY 1
VREF_DQ VSS
185 A
189
1
C278 C279 C280 C281 VSS

5 DDR3_DRAMRST_A# 30 190 SJV10-NL
RESET# VSS
195
VSS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
196
2
DDR_VREF_S3 VSS
203
204
VTT1
VTT2
VSS
VSS
205
206 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR3-204P-41-GP-U
Title
62.10017.N41 DDR3 SODIMM2
H 2nd
=9.2mm
= 62.10017.P41
www.vinafix.vn
Custom SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
5 M_B_A[15..0] DIM1
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2
96
M_B_A3 A2
95 110 M_B_RAS# 5
M_B_A4 A3 RAS#
92 113 M_B_WE# 5
M_B_A5 A4 WE#
91 115 M_B_CAS# 5
M_B_A6 A5 CAS#
90
M_B_A7 A6
86 114 M_CS#2 5
M_B_A8 A7 CS0#
89 121 M_CS#3 5
M_B_A9 A8 CS1#
85
M_B_A10 A9
107 73 M_CKE2 5
M_B_A11 A10/AP CKE0
D 84 74 M_CKE3 5 D
M_B_A12 A11 CKE1
83
M_B_A13 A12
119 101 M_CLK_DDR2 5
M_B_A14 A13 CK0
80 103 M_CLK_DDR#2 5
M_B_A15 A14 CK0#
78
A15
5 M_B_BS2 79 102 M_CLK_DDR3 5
A16/BA2 CK1
104 M_CLK_DDR#3 5
CK1#
5 M_B_BS0
109 M_B_DM[7..0] 5
BA0 M_B_DM0
5 M_B_BS1 108 11
BA1 DM0 M_B_DM1
5 M_B_DQ[63..0] 28
M_B_DQ0 DM1 M_B_DM2
5 46
M_B_DQ1 DQ0 DM2 M_B_DM3
7 63
15 136
17 153
4 170
6 187
M_B_DQ6 DQ5 DM7
16
M_B_DQ7 DQ6
18 200 SMBD0_SB 3,13,17
M_B_DQ8 DQ7 SDA
21 202 SMBC0_SB 3,13,17
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9 3D3V_S0
33 198 PM_EXTTS#1 5,17
M_B_DQ11 DQ10 EVENT#
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24
2
M_B_DQ14 DQ13 SA0_DIM1 R146 C282
34 197 2 1 3D3V_S0
M_B_DQ15 DQ14 SA0 4K7R2J-2-GP C283
36 201
DQ15 SA1
SCD1U10V2KX-5GP
M_B_DQ16 39 SC2D2U10V3KX-1GP
1
M_B_DQ17 DQ16
41 77
M_B_DQ18 DQ17 NC#1
51 122
M_B_DQ19 DQ18 NC#2 1D5V_S3
53 125
M_B_DQ20 DQ19 NC#/TEST
40
M_B_DQ21 DQ20
42 75
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
C 52 81 C
M_B_DQ24 DQ23 VDD3
57 82
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ28 DQ27 VDD7
56 94
M_B_DQ29 DQ28 VDD8
58 99
M_B_DQ30 DQ29 VDD9
68 100
M_B_DQ31 DQ30 VDD10
70 105
M_B_DQ32 DQ31 VDD11
129 106
M_B_DQ33 DQ32 VDD12
131 111
M_B_DQ34 DQ33 VDD13
141 112
M_B_DQ35 DQ34 VDD14
143 117
M_B_DQ36 DQ35 VDD15
130 118
M_B_DQ37 DQ36 VDD16
132 123
M_B_DQ38 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18
142
M_B_DQ40 DQ39
147 2
DQ40 VSS
REVERSE TYPE
M_B_DQ41 149 3
M_B_DQ42 DQ41 VSS
157 8
M_B_DQ43 DQ42 VSS
159 9
M_B_DQ44 DQ43 VSS
M_B_DQ45
146
DQ44 VSS
13
1D5V_S3 SODIMM B DECOUPLING
148 14
M_B_DQ46 DQ45 VSS
158
DQ46 VSS
19 SA 0622
M_B_DQ47 160 20
M_B_DQ48 DQ47 VSS
163
DQ48 VSS
25 -1 Change C287 to dummy.
M_B_DQ49 165 26
M_B_DQ50 DQ49 VSS
175 31
M_B_DQ51 DQ50 VSS
177 32
1
M_B_DQ52 DQ51 VSS C284 C285 C286 C287 C288
164 37
DQ52 VSS
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_B_DQ53 166 38
M_B_DQ54 DQ53 VSS
174 43
2
M_B_DQ55 DQ54 VSS
176 44
M_B_DQ56 DQ55 VSS
B 181 48 B
DDR_VREF_S3_1 M_B_DQ57 DQ56 VSS
183 49
M_B_DQ58 DQ57 VSS
191 54
M_B_DQ59 DQ58 VSS
M_B_DQ60
193
DQ59 VSS
55 DY
180 60
1
M_B_DQ61 DQ60 VSS

182 61
C289 C290 M_B_DQ62 DQ61 VSS
192
DQ62 VSS
65 -1 Change C293 to dummy. -1 Reserve RFC11
SCD1U10V2KX-5GP SC2D2U10V3KX-1GP M_B_DQ63 194 66
2
DQ63 VSS
71
by RF request.
5 M_B_DQS#[7..0] VSS
M_B_DQS#0 10 72 C291 C292 C293 C294 C295 C296
2
DQS0# VSS
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_B_DQS#1 27 127 DY DY
M_B_DQS#2 DQS1# VSS RFC11
45 128
M_B_DQS#3 DQS2# VSS
62 133 SC22P50V2JN-4GP
1
M_B_DQS#4 DQS3# VSS
135 134
M_B_DQS#5 DQS4# VSS
152 138
DDR_VREF_S3_1 M_B_DQS#6 DQS5# VSS
169 139
M_B_DQS#7 DQS6# VSS
186 144
DQS7# VSS
5 M_B_DQS[7..0] 145
M_B_DQS0 VSS
12 150
1
M_B_DQS1 DQS0 VSS

29 151
C297 C298 M_B_DQS2 DQS1 VSS
47 155
SCD1U10V2KX-5GP M_B_DQS3 DQS2 VSS
SC2D2U10V3KX-1GP 64 156
2
M_B_DQS4 DQS3 VSS

137 161
M_B_DQS5 DQS4 VSS
154 162
M_B_DQS6 DQS5 VSS
171 167
M_B_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
VSS
5 M_ODT2 116 173
ODT0 VSS
5 M_ODT3 120 178
ODT1 VSS
179
DDR_VREF_S3_1 VSS
126 184
DDR_VREF_S3_1 VREF_CA VSS
1 185
DDR_VREF_S3 VREF_DQ VSS
189
VSS
A
5 DDR3_DRAMRST_B# 30 190 A
RESET# VSS
195 SJV10-NL
VSS
196
VSS
203 205
VTT1 VSS
204 206
VTT2 VSS Wistron Corporation
Place these caps -1 Change C302 to dummy. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR3-204P-46-GP Taipei Hsien 221, Taiwan, R.O.C.
H = 5.2mm
1
close to VTT1 and

SC1U6D3V2KX-GP
C299 C300 C301 C302 62.10017.P11

DY Title
VTT2. DDR3 SODIMM1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
Note: Size Document Number Rev

SO-DIMMB SPD Address is 0xA4 SO-DIMMB is placed farther from SJV10-NL
www.vinafix.vn
Custom
the Processor than SO-DIMMA -1
SO-DIMMB TS Address is 0x34 Date: Friday, January 29, 2010 Sheet 18 of 42
5 4 3 2 1
5 4 3 2 1
CCD Pin
Pin Symbol D MIC Pin
SB Change P/N from 20.F1093.040 1 CCD_PWR Pin Symbol
F1
to 20.F1703.040 DCBATOUT_LCD1 2 1 2 USB- 1 DMIC_DAT
DCBATOUT
POLYSW -1D1A24V-GP 3 USB+ 2 3D3V_S0_DMIC
-1 Add C303 0.1uF 69.50007.A31
LCD1 69.50007.A41 4 GND 3 DMIC_CLK
IPEX-CON40-4-GP (78.10491.4FL) by RF
1
request. C303 5 NC 4 GND
SCD1U16V2ZY-2GP
D 47 C304 D
42 SC10U16V6KX-3GP
2
NP2 -1 Change 10u/25V(78.10622.51L)to
40
39
4.7u/25V(78.10621.52L)
38
37 DBC_EN 1 TP114
36 BLON_OUT_R
35 BRIGHTNESS_CN F2
34 CCD_PW R 1 2 3D3V_S0
33 USBPN9 13
1
32 USBPP9 13 C305 RFC10 C306 FUSE-1D1A6V-4GP-U
46 31 69.50007.691
SC10U10V5KX-2GP
SC1200P50V2JX-GP
SC22P50V2JN-4GP
30 69.50007.771
2
29
28 DMIC_CLK 22 -1 Add C306,RFC10 by
27 DMIC_DAT 22
26 3D3V_S0_DMIC RF request.
25
24
23
22
FOR Digital Mic Power
45 21 3D3V_S0
20
19 1 R16 2
18 0R0603-PAD 5V_S0
17 LVDS_TXAOUT0- 9 -1 Change R16 to short PAD.
16 LVDS_TXAOUT0+ 9 U4
15
C 14 LVDS_TXAOUT1- 9 3D3V_S0_DMIC 5 1 C
VOUT VIN
13 LVDS_TXAOUT1+ 9 GND 2
12 4 NC#4 EN 3 PM_SLP_S3# 13,27,28,29,35
11
SC1U10V2KX-1GP
LVDS_TXAOUT2- 9
1
44 10 LVDS_TXAOUT2+ 9 C307
9 SC4D7U10V3KX-GP C308 RT9198-33PBR-GP
8 LVDS_TXACLK- 9 74.09198.G7F
1
7 LVDS_TXACLK+ 9 DY 74.09091.J3F SC47P50V2JN-3GP
6 C309
5
2
4 3D3V_S0 DY -1 Add C309 47pF
3 3D3V_S0
2
(78.47034.1FL)by RF
request.
1
NP1
2
1
41
43
SRN2K2J-1-GP
RN12
3
4
LCDVDD
Layout 40 mil RN13
SCD1U16V2ZY-2GP
LCD_EDID_DAT 3 2 DAT_DDC_EDID 9
LCD_EDID_CLK 4 1 CLK_DDC_EDID 9
SRN0J-10-GP-U
1
B C310 RFC19 RFC22 C311 B
DY DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC1200P50V2JX-GP
2
-1 Add C310,Reserve RFC19,RFC22 by RF request. DY

2 1 BRIGHTNESS 29
0R2J-2-GP R148
LCDVDD 3D3V_S0
U5
BRIGHTNESS_CN 2 1 BRIGHTNESS_AMD 9
9 GMCH_LCDVDD_ON 1 5 33R2J-2-GP R149
EN IN#5
2 GND
3 OUT IN#4 4
1
DY C312
1
1
SCD1U16V2ZY-2GP
C313 C314
G5285T11U-GP BLON_OUT_R 2 1 BLON_OUT 29
2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1KR2F-3-GP R151
2
C315 1 C316
74.05285.07F
1
SC100P50V2JN-3GP
2nd = 74.09724.09F DY DY SC100P50V2JN-3GP

2
A R147 SJV10-NL A
10KR2J-3-GP
2
Wistron Corporation
Title
LCD Conn
www.vinafix.vn
A3 SJV10-NL -1
Date: Sunday, January 31, 2010 Sheet 19 of 42
5 4 3 2 1
5 4 3 2 1
Layout Note:
Hsync & Vsync level shift
Place these resistors
close to the CRT-out
connector
Ferrite bead impedance: 10 ohm@100MHz 5V_S0
L17
1 2 CRT_R
9 CRT_RED For System CRT
1
FCB1608CF-GP
68.00119.081 68.00230.021 C317
D U53 SCD1U16V2ZY-2GP D
L18
2
1 RN14
CRT_G B SRN33J-5-GP-U
9 CRT_GREEN 1 2 VCC 5
FCB1608CF-GP 2
9 CRT_HSYNC A CRT_HSYNC1_1 CRT_HSYNC1
68.00119.081 68.00230.021 Y 4 1 4
CRT_VSYNC1
L19 3 GND 2 3
1 2 CRT_B 74LVC1G08GW -1-GP

9 CRT_BLUE FCB1608CF-GP 73.01G08.L04
1
C318 C319 C320 68.00230.021 C321 C322 C323 73.7SZ08.DAH 5V_S0
DY DY DY 68.00119.081 U54
1
2
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC6D8P50V2DN-GP
R859 1
2
RN131 B
VCC 5
140R2F-GP
9 CRT_VSYNC 2 A
SRN150F-GP 4 CRT_VSYNC1_1
Y
3
2
GND
4
3
74LVC1G08GW -1-GP
73.01G08.L04
SB Change R859 from 73.7SZ08.DAH
150 ohm to 140 ohm SB change capacity from 6.8pF (78.6R864.1FL)
Layout Note: to 5.6pF (78.5R674.1FL)
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
C CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. C
5V_S0 5V_S0 5V_S0
2 2 2 DDC_CLK & DATA level shift 5V_S0
CRT_R 3 DY CRT_G 3 DY CRT_B 3 DY D4
1
CH551H-30PT-GP
1 1 1 5V_CRT_S0 83.R5003.C8F
2ND = 83.R5003.H8H
D1 D2 D3
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
2
3D3V_S0
F3
1 2 5V_CRT_DDC
1
2
3
4
POLYSW -1A6V-6-GP
RN17
CRT I/F & CONNECTOR SRN10KJ-6-GP
8
7
6
5
B CRT_IN#_R B
5V_CRT_S0 CRT_DDCDATA
9 CRT_DDCDATA
CRT1
4 NC#4 VCC_CRT 9
11 NC#11
1
SCD01U16V2KX-3GP
CRT_DDCDATA
12 CRT_DDCDATA C328
DDCDATA_ID1
1
CRT_HSYNC1 15 CRT_DDCCLK
2
C324 DDCCLK_ID3
DY 5 GND
1
SC100P50V2JN-3GP C325 CRT_VSYNC1 6 1 CRT_R

2
GND CRT_RED CRT_G

7 GND CRT_GREEN 2
1
C326 CRT_DDCCLK 8 3 CRT_B CRT_DDCCLK

9 CRT_DDCCLK
2
GND CRT_BLUE
10 GND
1
16 14 CRT_VSYNC1
2
SC18P50V2JN-1-GP C327 GND VSYNC CRT_HSYNC1

DY 17 GND HSYNC 13
SC100P50V2JN-3GP
2
SC18P50V2JN-1-GP
D-SUB-15-39-GP-U
20.20859.015
5V_S0
6
1
7
R152 2 2
470R2J-2-GP D5
A
2 1 CRT_IN#_R 3 BAV99PT-GP-U 8 SJV10-NL A
29 CRT_DEC# DY
3
1
Wistron Corporation
1
C329 9
SC100P50V2JN-3GP

DY
4 Taipei Hsien 221, Taiwan, R.O.C.
2
10 Title
5
CRT conn
www.vinafix.vn
A3 SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
D D
HDMI CONNECTOR
HDMI1
23
21
8 HDMI_DATA2+ 1
2
8 HDMI_DATA2- 3
8 HDMI_DATA1+ 4
5
8 HDMI_DATA1- 6
8 HDMI_DATA0+ 7
8
8 HDMI_DATA0- 9
HDMI_CLK+ 8 HDMI_CLK+ 10
HDMI_CLK- 11
5V_S0 8 HDMI_CLK- 12
HDMI_DATA0+ TPAD14-GP TP88 1 HDMI_CEC 13
RN18
HDMI_DATA0- 14
1 4 GMCH_HDMI_CLK 15 2ND = 22.10296.341
HDMI_DATA1+ 2 3 GMCH_HDMI_DATA 16
HDMI_DATA1- 17 3RD = 22.10296.351
5V_CRT_S0 18
HDMI_DATA2+ SRN2K2J-1-GP HDMI_DETECT_CON 19 4TH = 22.10296.361
1
HDMI_DATA2- EC10 DY DY EC11 20
SC220P50V2JN-3GP
SC220P50V2JN-3GP
C 22 C
2
SKT-HDMI19P-20-GP-U
22.10296.051
4
3
4
3
4
3
4
3
RN118 RN119 RN120 RN121
SRN470J-4-GP-U
SRN470J-4-GP-U
SRN470J-4-GP-U
SRN470J-4-GP-U
1 2 HDMI_DETECT 9
1
2
1
2
1
2
1
2
1
R840
5K1R2J-4-GP R841
10KR2J-3-GP
5V_S0
D25
2
9 GMCH_HDMI_CLK GMCH_HDMI_CLK 2
DY
3
D
. Q59 9 GMCH_HDMI_DATA GMCH_HDMI_DATA 1 -1 Add D25 for ESD function.

2N7002E-1-GP 5V_S0
.
. 84.2N702.E31 BAW 56-5-GP
. .
84.2N702.D31 83.00056.Q11
2ND = 83.00056.G11
G
S
B
3rd = 83.00056.K11 B
A SJV10-NL A
Wistron Corporation
Title
HDMI conn
www.vinafix.vn
A3 SJV10-NL -1
Date: Tuesday, February 02, 2010 Sheet 21 of 42
5 4 3 2 1
5 4 3 2 1
D D
5V_S0 R162 5VA_S0

0R3J-0-U-GP
1 DY 2
U9
1 EN NC#5 5
2 GND
3 VIN VOUT 4
1
1
C336
SC10U10V5KX-2GP
C335 G9091-475T12U-GP
SC1U10V3KX-4GP
74.09091.F3F
2
2
2ND = 74.09198.A7F RN20
SRN47KJ-3-GP-U
C337
AUDIO_PC_BEEP 1 2 AUDIO_BEEP 4 1 KBC_BEEP_1 1 2 C338 KBC_BEEP 29
R165 3 2 SCD22U10V2KX-1GP
10R2J-2-GP
SCD1U25V3KX-GP
1
13 ACZ_SDATAIN0 1 2 SPKR_SB_1 1 2 C339 ACZ_SPKR 13
1
C340 SCD22U10V2KX-1GP
AC97_DATIN
C R164 C
Internal Speaker
SC100P50V2JN-3GP
13 ACZ_BITCLK_AUDIO 1KR2J-1-GP
2
13 ACZ_SDATAOUT_AUDIO
-1 Change R166 to reserved D21.
D21 SPKR1
EAPD
DY PD#
5
2 1 1D5V_S0
SPKR_R+ 1
CH521S-30-GP-U1
RN21 ACZ_SYNC_AUDIO 13 SPKR_R- 2
SRN33J-5-GP-U SPKR_L+ 3
19 DMIC_CLK 1 4 DMIC_CLK_R ACZ_RST#_AUDIO 13 SPKR_L- 4
19 DMIC_DAT 2 3 DMIC_DAT_R
1
C341 6
EC15 SC100P50V2JN-3GP
AUDIO_PC_BEEP DY SC22P50V2JN-4GP
1
2
1
DY DY DY DY PTWO-CON4-11-GP-U
EC12 EC13 3D3V_S0
2
20.F1561.004
SC22P50V2JN-4GP
SC22P50V2JN-4GP
2
-1 Add EC12,EC13 47pF 2nd = 20.F1621.004

10
11
12
(78.47034.1FL)by RF CLOSE TO PIN13

1
2
3
4
5
6
7
8
9
U10
request.
SDATA-OUT
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
BCLK
PCBEEP
DVDD
SDATA-IN
SYNC
PD#
DVSS2
DVDD-IO
RESET#
1 R167 2 LINEOUT_JD# 31
39K2R2F-L-GP
EC74 49
MLVS0603M04-1-GP 31 AUD_SPDIF_OUT GND JD_SENSE
48 SPDIFO SENSE_A 13 1 R168 2 MIC_JD# 31
69.80007.031 EAPD 47 14 20KR2F-L-GP
EAPD LINE2-L/PORT-E-L
5V_S0 46 PVDD2 LINE2-R/PORT-E-R 15 CLOSE TO PIN19
1 2 SPKR_R+ 45 16 SB Change RN30 form
SPKR_R- SPK-OUT-R+ MIC2-L/PORT-F-L JDREF
44 SPK-OUT-R- MIC2-R/PORT-F-R 17 1 R169 2
B 43 18 20KR2F-L-GP page31 to page 22 B
PVSS2 SENSE_B SRN68J-5-GP
42 PVSS1 JDREF 19
SPKR_L- 41 20 C342 SC4D7U10V3KX-GP
EC75 SPKR_L+ SPK-OUT-L- MONO-OUT MIC1-L_PORT-B AUD_MICIN_L
40 SPK-OUT-L+ MIC1-L/PORT-B-L 21 1 2 4 1 AUD_MICIN_L1 31
HPOUT-R/PORT-I-R
MLVS0603M04-1-GP MIC1-R_PORT-B AUD_MICIN_R

HPOUT-L/PORT-I-L
5V_S0 39 PVDD1 MIC1-R/PORT-B-R 22 1 2 3 2 AUD_MICIN_R1 31

69.80007.031 5VA_S0 38 AVDD2 LINE1-L/PORT-C-L 23
MIC1-VREFO-R
MIC1-VREFO-L
37 24 C343 SC4D7U10V3KX-GP
AVSS2 LINE1-R/PORT-C-R
MIC2-VREFO
1 2 RN30
LDO-CAP
CPVEE
AVDD1
AVSS1
VREF
CBN
CBP
EC76
MLVS0603M04-1-GP
69.80007.031 -1 Add R335,EC74~EC79 for AGND connect. ALC271X-GR-GP
36
35
34
33
32
31
30
29
28
27
26
25
1 2 R335 SB Change C344 from 10uF to

2D2R3J-2-GP CLOSE TO PIN35 5VA_S0
0.1uF for anti pop noise.
1 2 AUD_CBP
EC77 C344
1
MLVS0603M04-1-GP VREF 1 2
69.80007.031 C345 SCD1U10V2KX-4GP
AGND SC2D2U10V3KX-1GP
2
1 2 AUD_CBN C346 1 2
SC10U10V5KX-2GP
RN22
SRN2K2J-1-GP
C347
EC78 AUD_MIC_R 4 1
MLVS0603M04-1-GP 2 1 CPVEE AUD_MIC_L 3 2
69.80007.031
SC2D2U10V3KX-1GP
1 2
RN23
31 HP_R 2 3 HP_OUT_R_AUD
A EC79 31 HP_L 1 4 HP_OUT_L_AUD A
MLVS0603M04-1-GP
69.80007.031
SRN68J-5-GP SJV10-NL
1 2
Wistron Corporation
AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
AUDIO_ALC271
www.vinafix.vn
Custom SJV10-NL -1
Date: Friday, January 29, 2010 Sheet 22 of 42
5 4 3 2 1
5 4 3 2 1
3D3V_S5 CLOSE TO LAN CHIP

Input 3.3V Digital 1.1V Analog 2.7V Analog 1.1V
DVDDL AVDDH AVDDL MDI0- 1 4 RN124
MDI0+ 2 3 SRN49D9F-GP 1 2 C544
1
1
C524 C525 C526 C527 C528 C529 C530 C531 C532 C533 C534 C535 C536 SCD1U10V2KX-4GP
SC1KP50V2JN-2GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
D DY MDI1- 1 4 RN125 D
MDI1+ 2 3 SRN49D9F-GP 1 2 C545
SCD1U10V2KX-4GP
-1 Change C532 to dummy. MDI2- 1 4 RN126

MDI2+ 2 3 SRN49D9F-GP 1 2 C546
SCD1U10V2KX-4GP
MDI3- 1 4 RN127
MDI3+ 2 3 SRN49D9F-GP 1 2 C547
SCD1U10V2KX-4GP
8 PCIE_TXP1 AVDDL
8 PCIE_TXN1
CLK_PCIE_LAN 3
DVDDL
3D3V_S5 CLK_PCIE_LAN# 3
24 LAN_ACT_LED#
公公LED1 Link
-1 Add reserved R865, change LED0 Active 24 10M/100M/1G_LED#
C C
pull high to 3D3V_S5.
1
R864 check
4K7R2J-2-GP
LX AVDDL
2
R865
41
40
39
38
37
36
35
34
33
32
31
3 LAN_CLKREQ# 1 2 LAN8151_CLKREQ# U61
LED1
LED0
AVDDL
AVDDL
DVDDL_REG
GND
RX_N
REFCLK_N
LX
RX_P
REFCLK_P
0R0402-PAD
3D3V_S5
Atheros
8151-AL1A
12,26 PCIE_RST#_R
1
1 30 PCIE_RXDP C538 1 2 SCD1U10V2KX-5GP PCIE_RXP1 8

C537 VDD33 TX_P PCIE_RXDN C539 1
DY 2 PERST# TX_N 29 2 SCD1U10V2KX-5GP PCIE_RXN1 8
SC150P50V2JN-3GP 3 28 2 R830 1
13,26 PCIE_W AKE# 3D3V_S5
2
LAN8151_CLKREQ# WAKE# TEST_RST 4K7R2J-2-GP

4 CLKREQ# TESTMODE 27
SB 2nd source change from AVDD_CEN 5 26
AVDDL VDDCT SMDATA
6 25
82.30005.C51 to 82.30020.A31 LAN_X0 7
AVDDL_REG SMCLK
24 DVDDL
XTLO DVDDL
Change C540 from 27pF to 18pF X5 LAN_XI 8 XTLI LED2 23
1 2 AVDDH 9 22 AVDDH
Change C541 from 27pF to 15pF RBIAS 10
AVDDH_REG AVDDH
21
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
RBIAS TRXN3 MDI3- 24

XTAL-25MHZ-102-GP
2
B
82.30020.851 B
82.30020.A31 R831
C540 C541 2K37R2F-GP
1
AVDDH
AVDDL
AVDDL
TRXN0
TRXN1
TRXN2
TRXP0
TRXP1
TRXP2
TRXP3
2
-1 Change C541 to 18pF. AR8151-AL1A-GP
11
12
13
14
15
16
17
18
19
20
71.08151.003
24 MDI0+
24 MDI0- MDI3+ 24
Analog 1.7V
AVDDL AVDDL
24 MDI1+
L32
IND-4D7UH-192-GP 24 MDI1-
24 AVDD_CEN 1 2 LX
AVDDH
1
C542 C543 C573 24 MDI2+

SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
SC1KP50V2JN-2GP
24 MDI2-
2
A SJV10-NL A
Wistron Corporation
Title
LAN AR8151
www.vinafix.vn
A3 SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
LAN Connector
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
RJ1
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except 13 15 LED COLOR
D CONN_PW R 9 D
RJ-45 moat. GREEN B1(+) B2(-)::GREEN
23 10M/100M/1G_LED# 10
RJ45_1 1
RJ45_2 2
RJ45_3 3
RJ45_4 4
RJ45_5 5
RJ45_6 6
RJ45_7 7
RJ45_8 8
CONN_PW R2
Change 單單 11
YELLOW
12 A1(+) A2(-):YELLOW
14 16
GIGA Lan Transformer Green(A3), behavior is the
23 AVDD_CEN same for 10/100/1000 bits
XF1 RJ45-8P-16-GP Yellow(B2), when LAN is
1CT:1CT
22.10019.061 transfering data.
23 MDI3- 2 23 RJ45_8 2ND = 22.10019.071
AVDD_CEN 1 24 MCT4
23 MDI3+ 3 22 RJ45_7
1CT:1CT RJ45_5
-1 Change C361,C400 to dummy. 23 MDI2- 5 20
C C
4 21 MCT3
1
C334 C361 C400 C364 23 MDI2+ 6 19 RJ45_4

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY DY
2
1CT:1CT RJ45_6
23 MDI1- 8 17
7 18 MCT2
23 MDI1+ 9 16 RJ45_3
RN143
1CT:1CT RJ45_2 CONN_PW R
23 MDI0- 11 14 3D3V_S5 3 2
4 1 CONN_PW R2
AVDD_CEN 10 15 MCT1 23 LAN_ACT_LED#
RJ45_1 SRN470J-4-GP-U
23 MDI0+ 12 13
XFORM-24P-19-GP -1 Change R832,R833 to RN143.

-1 Change C331,C363 to dummy. 68.IH601.301
2nd = 68.89240.30B
DY DY
1
C333 C331 C363 C332

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
B B
MCT1
MCT2
MCT3
MCT4
8
7
6
5
RN128
SRN75J-1-GP
1
2
3
4
LAN_ACT_LED# MCT_R
10M/100M/1G_LED#
1
C558
1
R834 SC1KP2KV8KX-1-GP
2
C556 C557 5K1R2J-4-GP
SC1KP50V2JN-2GP
SC1KP50V2JN-2GP
2
2
SB change P/N form 78.1022S.24L to
78.1022S.L1L
DY DY
A SJV10-NL A
Wistron Corporation
Title
LAN CONN
www.vinafix.vn
A3 SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
Conn<-------------KBC
SYSTEM LED
(BLUE/ORANGE)
5 IN1 CARD-READER
Power Button LED
(BLUE/ORANGE) 31 STDBY_LED#_R
84.00143.G1K
3D3V_S0
Q25
R2 2ND = 84.00124.H1K
LED1 R870 2
XD_D7
787R2F-GP 1 STDBY_LED 29
SP14
SP13
SP12
SP11
R1
5V_S5 1 4 STDBY_LED#_R_1 1 2 STDBY_LED#_R 3 3 CLK48_Cardreader
1
C560 C561 R835
DTC143ZUB-GP 6K19R2F-GP
24
23
22
21
20
19
DY
SC4D7U10V3KX-GP
SCD1U16V2ZY-2GP
D 2 3 FRONT_PWRLED#_R_1 1 2 84.00143.G1K 1 2 RREF U63 D
2
Q24
2ND = 84.00124.H1K
XD_D7
SP14
SP13
SP12
SP11
CLK_IN
R2
R869 2
LED-OB-2-GP 191R2F-GP 1 1 18 SP10
R1 FRONT_PWRLED 29 RREF SP10
83.19223.A70 FRONT_PWRLED#_R 3 13 USBPN4 2 17
DM GPIO0 SP9
83.00195.G70 13 USBPP4 3
DP SP9
16
3D3V_S0 4 15 SP8
DTC143ZUB-GP 3V3_IN SP8 SP7
31 FRONT_PWRLED#_R CARD_3D3V_S0 5 14
CARD_3V3 SP7 SP6
6 13
XD_CD#
CARD_3D3V_S0 V18 SP6
VREG
SP1
SP2
SP3
SP4
SP5
25
GND
1
C562 C563 C564 RTS5138-GR-GP
7
8
9
10
11
12
1
C565
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
SC1U10V2KX-1GP
XD_CD#
2
SP1
SP2
SP3
SP4
SP5
C51,C52,C53 near CARD1 pin23, Pin14,
Pin33
SB change P/N to 20.I0087.011

SB Change LED portion connection -1 Change 3G LED portion circuit
-1 change Card1 P/N to 62.10024.B41

C CARD1 C
from module SP12 19 40

SP10 SD-DAT3/MMC-RSV XD-GND XD_CD#
WLAN_LED# 26 16 39
3D3V_S0 SD-CMD/MMC-CMD XD-CD SP1
13 38
SD-VSS/MMC-VSS1 XD-R/-B SP2
From module CARD_3D3V_S0
SP8
11
9
SD-VDD/MMC-VDD XD-RE
37
36 SP3
KBC
1
R2 SD-CLK/MMC-CLK XD-CE SP4
2 6 35
R329 SP4 SD-VSS/MMC-VSS2 XD-CLE SP5
1 WLAN_LED_OFF# 29 3G_LED# 26 4 34
R1
SP3 SD-DAT0/MMC-DAT XD-ALE SP6
3 3 33
31 WLAN_LED#_R -1 4K7R2J-2-GP
SP13 21
SD-DAT1 XD-WE
32 SP7
Q22 SP1 SD-DAT2 XD-WP
2 31
2
DTC143ZUB-GP
R2
SP6 SD-WP XD-GND SP8
2 1 30
SP6 SD-CD#1 XD-D0 SP9
2ND = 84.00124.H1K R1 1 43
SD-CD#43 XD-D1
29
3rd = 84.00144.J11 3 28 SP10
By Module ( LED Flash ) 31 3G_LED#_R XD-D2
27 SP11
Q34 XD-D3 SP12
WLAN_LED High 5 26
D
DTC143ZUB-GP SP14 MS-VSS/GND XD-D4 SP13
7 25
SP12 MS-BS XD-D5 SP14
. 8 24
D
3RD = 84.00143.E1K SP9 10

MS-DATA1 XD-D6
23 XD_D7
MS-SDIO/DATA0 XD-D7
. LED Always On .
.
. . Q33
SP8
SP2
12
14
MS-DATA2 XD-VCC
22 CARD_3D3V_S0
MS-INS
.
. . Q63
WLAN_LED Low 2N7002E-1-GP SP5
SP1
15
MS-DATA3
. 17 44
G
MS-SCLK SD-VSS/MMC-VSS2/GND
2N7002E-1-GP WLAN_TEST_LED High CARD_3D3V_S0 18
20
MS-VCC GND
42
41
S
MS-VSS/GND GND
For factory test Factory test use

WLAN_TEST_LED 29 for factory test NP1
NP1 NP2
NP2
WLAN_TEST_LED 29
WLAN_TEST_LED High CARDBUS40P-SKT-1-GP-U1
B B
LED Function
Power Button 3D3V_AUX_S5
1
R170
Q29 10KR2J-3-GP
5V_S0 2
R2
NUM_LED1 5K9R2F-GP 1 NUM_LED 29
2
1R868
R1
K NUM_LED#_R KBC_PWRBTN#_1
NUM LED A
1
2
2
3 4 3 2 1 KBC_PWRBTN# 29
1
LED-B-68-GP R867 DTC143ZUB-GP 5 R171
(BLUE) 83.19217.070 4K75R2D-GP 84.00143.G1K G4 470R2J-2-GP
83.00190.P70 2ND = 84.00124.H1K 2 1 GAP-OPEN
2
PWR1
Q28 62.40009.A61
5V_S0 2
R2
SW-TACT-5P-1-GP
CAP_LED1 1
CAP LED A K CAP_LED#_R 3
R1 CAP_LED 29
(BLUE) LED-B-68-GP DTC143ZUB-GP

83.19217.070 84.00143.G1K
83.00190.P70 2ND = 84.00124.H1K
SATA_LED# 14
3D3V_S0
Q62
5V_S0 2
R2
A HDD LED HDD_LED1
R25
R1 1
A
A K MEDIA_LED#_R 1 2 SATA_LED#_R 3
(BLUE)
LED-B-68-GP 5K6R2J-1-GP DTC143ZUB-GP
83.19217.070 84.00143.G1K
83.00190.P70 2ND = 84.00124.H1K
SJV10-NL
Wistron Corporation
Title
LED_CARD reader
www.vinafix.vn
A2 SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
Mini Card Connector(WLAN) Mini Card Connector( 3G)

Support debug-card 3D3V_S0
D MIN1 MIN2 D
53 53
1D5V_S0 3D3V_S0 1D5V_S0
NP1 NP1
2 DY 1 MINI1_WAKE# 1 2 DY 1 MINI2_WAKE# 1
13,23 PCIE_WAKE# 13,23 PCIE_WAKE#
R172 2 R181 2
0R2J-2-GP 3 0R2J-2-GP 3
4 4
5 5
6 6
7 7
3 WLAN_CLKREQ# 3 WLAN2_CLKREQ# UIM_PWR
8 8
9 9
10 10 UIM_DATA
11 11
3 CLK_PCIE_MINI1# 3 CLK_PCIE_MINI2# UIM_CLK
12 12
3 CLK_PCIE_MINI1
13
15
14
16
3 CLK_PCIE_MINI2
13
15
14
16
UIM_RST
UIM_VPP
UIM_PWR
SIM Card
1
17 SB Del net E51_RxD ,E51_TxD 17 C349 DY 3GC350
29 E51_RxD 3D3V_S0 SC4D7U6D3V3KX-GP
18 18 SCD01U25V2KX-3GP
2
19 19
29 E51_TxD
20 20 3G_EN 29
WIRELESS_EN 29
21 21 D7
C 22 22 SIM1 C
PCIE_RST#_R 12,23 PCIE_RST#_R 12,23
8 PCIE_RXN2 23 8 PCIE_RXN3 23 2
24 24 3 1 4 USBPP11 13
VCC RESERVED#4
8 PCIE_RXP2 25 8 PCIE_RXP3 25 3G UIM_VPP RESERVED#8
8 USBPN11 13
26 26 1 6
2
VPP
27 27 NP1
R173 NP1
28 28 NP2
BAV99TPT-GP UIM_RST NP2
29 29 47KR2J-2-GP DY 2
RST 3G
30 30 UIM_CLK 3
CLK
8 PCIE_TXN2 31 8 PCIE_TXN3 31 5
1
UIM_DATA GND
32 32 7 10
I/O GND
8 PCIE_TXP2 33 8 PCIE_TXP3 33 9 11
1
CD GND
34 34
35 35 C351 3G
36 36 SKT-SIMM9-GP-U
SC10P50V2JN-4GP
USBPN12 13
2
USBPN1 13
37 37
38 USBPP1 13 3G 38 USBPP12 13
3D3V_S0 39 3D3V_S0 39
40 40
41 41
42 42 3G_LED# 25
43 43
44 44
WLAN_LED# 25
45 45
46 46 D6 DY
47 SB Add net WLAN_LED# 47 R330 FTZ6D8E-GP
48 48 2 3G 1 UIM_CLK 1 5 UIM_PWR
3D3V_S0
49 49
B 10KR2J-3-GP B
50 DY 50 4
5V_S5 51 5V_S5 2 1 51
52 52 UIM_RST 2 3 UIM_DATA
NP2 R857 NP2
0R2J-2-GP
54 54
SB Change from 5V_S5 to NC.

PTWO-CONN52A-8-GP PTWO-CONN52A-8-GP
20.F1518.052 20.F1518.052
2nd = 62.10043.981 2nd = 62.10043.981
Place near MINI1
3D3V_S0 1D5V_S0
Place near MINIC2

1
C353 C355 3D3V_S0 1D5V_S0

C352 C354
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V3KX-4GP
SC1U10V3KX-4GP
2
1
C357 C358 C382
C356 C381
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V3KX-4GP
SC1U10V3KX-4GP
DY
2
A
SJV10-NL A
Wistron Corporation
-1 Change C357 to DY.
Title
MINI Conn
Custom SJV10-NL -1
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
Aux Power 3D3V_AUX_S5
5V_AUX_S5 I min = 150 mA

U12
3D3V_AUX_S5 3D3V_S0
Run Power 5V_S0 5V_S5
D U13 D
D20
G5
3D3V_AUX_S5_G 1 C359 S D
1 VINDY VOUT 5 2 2 1
SCD1U25V3KX-GP
1
S D
8
2 GND 2 7
3 4 GAP-CLOSE-PW R CH521S-30-GP-U1 1 DY2 3 S D 6
SHDN# NC#4 G D
84.S0610.B31 4 5
DCBATOUT 2ND = 84.00610.C31
1
1
BC1 G909-330T1U-GP BC2 RUN_POW ER_ON AO4468-GP
SC1U16V3ZY-GP
DY 74.00909.03F DY 84.04468.037
SC1U16V3ZY-GP
replace :74.09091.J3F 1 2 Z_12V S D
2
2
R174 10KR2J-3-GP Q7 3D3V_S0 U14 3D3V_S5
K
1
1
NDS0610-NL-GP R175 C360 1 R176
SCD22U25V3KX-GP
330KR2J-L1-GP
D8 1 S D 8
10KR2J-3-GP
2 PDZ9D1B-GP 2 S D 7
3 S D 6
2 R177 1 Z_12V_G3 4 G D 5
A
330KR2J-L1-GP
83.9R103.C3F AO4468-GP
3D3V_S0 2ND = 83.9R103.F3F 84.04468.037
1
R178 1D5V_S0 1D5V_S3
1
100KR2J-1-GP Z_12V_D4
DY R179 U16
100R5J-3-GP
2
1 S D 8
U15 S D
2 7
2
4 3 R839 3 S D 6
Z_12V_D3
3D3V_runpwr 1 2 1D5V_S0_ON 4 G D 5
5 2 PM_SLP_S3# 13,19,28,29,35
1
C 1MR2F-GP C566 AO4468-GP C
D
6 1 SC22P50V2JN-4GP 84.04468.037
2
. Q8 DY DY DY
2
2N7002E-1-GP 2N7002KDW -GP
. 84.2N702.A3F RFC46 RFC47 RFC48
84.2N702.E31
1
.
. . 2ND = 84.DM601.03F
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
DY 84.2N702.D31 -1 Reserve RFC46~RFC48
by RF request.
G
S
Z_12V_D3
CPU_VDDA_S0 3D3V_S0
4
3
RN122
SRN100KJ-6-GP
1
2
C503 D23
2 1 2D5V_S0_PG 2
B B
SC1U10V2KX-1GP 3 VCORE_EN 33,37
13,19,28,29,35 PM_SLP_S3# 1
BAW 56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3rd = 83.00056.K11
3D3V_S0
D24
1
3D3V_S5
2 R236
10KR2J-3-GP U55
28 RUNPW ROK 3 13,19,28,29,35 PM_SLP_S3# 1 B
5
2
ALL_PW RGD VCC

1 2 A
Y 4 SB_PW RGD 13
BAS16-6-GP 3 GND
D
3D3V_S0 74LVC1G08GW -1-GP

83.00016.F11
. Q21 73.01G08.L04
2N7002E-1-GP 73.7SZ08.DAH
1
. 84.2N702.E31
A R180 . .
. SJV10-NL A
10KR2J-3-GP 84.2N702.D31
1
SB change R180,R104,Q4 to placed.

G
C511
Wistron Corporation
2
SC1U10V2KX-1GP
2
1D1V_S0 1D1V_S0_PG_1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

C
R104
1 2 1D1V_S0_PG B Q4 Title
MMBT3904-4-GP
84.T3904.C11
RUN AND AUX POWER
E
2K2R2J-2-GP Size Document Number Rev
www.vinafix.vn
2ND = 84.03904.K11 A3 -1
SJV10-NL
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5
CPU FAN Connector
-1 Change R844 to short pad. 3D3V_S0
R844
4
3
2
1
3D3V_AUX_S5 1 2
29 FAN_TACH
2
RN28
SRN10KJ-6-GP 0R0402-PAD
5
D
R37 FAN1 D
3
10KR2J-3-GP MLX-CON4-15-GP-U
D9 1 20.F0693.004
84.2N702.D31
5
6
7
8
1
BAT54PT-GP 29 FAN_PW M1
R845
84.2N702.E31 83.00054.T81 DY 2
2N7002E-1-GP 2ND = 83.BAT54.D81 FAN_TACH1 1 2 FAN_TACH1_CON 3
4
2
RSMRST#_CTRL G
. .
0R2J-2-GP FAN_VCC_CON
D RSMRST# 6,29 LINEAR
.
.
.
R846
6
PURE_HW _SHUTDOW N# S FAN_VCC 1 2
1
C362
D28 Q10 DY SCD1U16V2ZY-2GP 0R3J-0-U-GP
1
2
2 SB Add D28 for thermal (dummy, KBC already delay) LINEAR C365
3
SC10U10V5KX-2GP
trigger S5 shutdown
2
RSMRST# 3 5V_S0 D26
BAS16-6-GP
1 1 R847 2
S5_ENABLE 29,34,41 0R0603-PAD 83.00016.F11
2
C BAS16-6-GP 3D3V_S5 C
-1 Change R847 to short pad.
83.00016.F11
U59
1 FAN_TACH1
13,19,27,29,35 PM_SLP_S3# B R825
VCC 5
2 10R2J-2-GP
12 RTC_CLK A 32KHZ G792_32K
Y 4 1 2 *Layout* 15 mil
3 GND
1
C512
74LVC1G08GW -1-GP R829
SC1KP50V2JN-2GP
73.01G08.L04 10R2J-2-GP
2
73.7SZ08.DAH 1 2 KBC_XO 29
SB R829 change to placed.
5V_S0
5V_S0 U60
*Layout* 30 mil
1 2 5V_G792_S0 6 1
R826 VCC FAN1
20 DVCC FG1 4
10R2J-2-GP 14 G792_32K
CLK
1
B C513 C514 B
SDA 16 SMBD_THERM 29
C226 DY SCD1U16V2ZY-2GP 7 18
DXP1 SCL SMBC_THERM 29
1
SC4D7U6D3V3KX-GP 9 19 3.System Sensor, Put Plamrest.

2
DXP2 NC#19
1
C516 11
R827 SCD1U16V2ZY-2GP DXP3 G792_DXP2
SC1U10V3KX-4GP
C
2
21KR2F-GP 5 G792_DXP3
C
DGND Q60
14 ALERT# 15 ALERT# DGND 17 B
1
PURE_HW _SHUTDOW N# 13 C517 C518 C519 B Q61 C520 MMBT3904-4-GP
2
THERM#
SC470P50V3JN-2GP
V_DEGREE 3 8 MMBT3904-4-GP
E
THERM_SET SGND1 G792_DXN2 SC470P50V3JN-2GP
27 RUNPW ROK 2 10 84.T3904.C11
E
RESET# SGND2
1
T8=90 12 G792_DXN3 SC2200P50V2KX-2GP 84.T3904.C11 2ND = 84.03904.K11

R828 SGND3
GAP-CLOSE
GAP-CLOSE
49K9R2F-L-GP SC2200P50V2KX-2GP
2
G792SFUF-GP G119 G120 2ND = 84.03904.K11
74.00792.A79 2.H/W Shutdown
2
SJV10-NL
1
A
DXP1:108 Degree H_THERMDA 6 Wistron Corporation A
DXP2:H/W Setting 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
Place near chip as close C521
DXP3:88 Degree SC2200P50V2KX-2GP Taipei Hsien 221, Taiwan, R.O.C.
as possible
2
Title
H_THERMDC 6 Thermal/Fan Conn
1.For CPU Sensor Size Document Number Rev
Custom SJV10-NL -1
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
3D3V_S0 3D3V_AUX_S5
3D3V_S0 PCB Version 3D3V_S5
SB Change PCB version pull high from
SRN10KJ-5-GP
Pull-Low Pull-High 3D3V_AUX_S5 to 3D3V_S5
3 2 BAT_SDA
3D3V_AUX_S5 SA 10K 1K
1
R187 4 1 BAT_SCL
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
2
1 DY 2 E51_RxD C366 C367 C368 C369 C370 C371 C372 SB 10K 2K
10KR2J-3-GP -1 10K 3K
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
RN16
2
3KR2F-GP
2
R193 R836
1 DY 2 E51_TxD
1
10KR2J-3-GP PCB_VER_AD
3D3V_AUX_S5
2 R204 1 BAT_IN# 3D3V_AUX_S5
1
1 R196 2 BLUETOOTH_EN 100KR2J-1-GP
D 4K7R2J-2-GP R838 D
10KR2J-3-GP
R203
1
1 DY 2 E51_TxD C374
2
10KR2J-3-GP C373 SCD1U16V2ZY-2GP
SC1U10V3KX-4GP
1
3D3V_S0 EC22
R205 DY
SCD1U16V2ZY-2GP
9,12,30 PLT_RST# 1 2 PLT_RST#_1
2
100R2J-2-GP
39 BAT_IN#
1
C375
102
115
SC27P50V2JN-2-GP
80
19
46
76
88
4
1 OF 2 U18A
2
GPIO41
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
SB Del X4,C376,C378,R208,R206
124 104
GPIO10/LPCPD# VREF R207
7
LRESET# 10KR2J-3-GP
12 PCLK_KBC 2
3
LCLK A/D GPI90/AD0
97
98 PCB_VER_AD
AD_IA 38
U18B 2 OF 2 2 DY 1
12,30 LPC_LFRAME#
1
C377 LFRAME# GPI91/AD1 EC_3D3V_S0

12,30 LPC_LAD0 126 99
SC33P50V2JN-3GP LAD0 GPI92/AD2
12,30 LPC_LAD1 127 100
LAD1 GPI93/AD3 KBC_XO KCOL1
-1 AddC377 33pF 12,30 LPC_LAD2 128 108 SB Del WIRELESS_BTN# 77 53
2
LAD2 GPIO05 28 KBC_XO 32KX1/32KCLKIN KBSOUT0/JENK# KCOL2

(78.33034.1FL) by RF request. 12,30 LPC_LAD3 1
125
LAD3 LPC GPIO04
96
and 3G_BTN# KBSOUT1/TCK
52
51 KCOL3
12 INT_SERIRQ SERIRQ KBSOUT2/TMS
12 PM_CLKRUN# 8 50 KCOL4
GPIO11/CLKRUN# KBSOUT3/TDI KCOL5
13 KBRCIN# 122 79 49
KBRST# 32KX2 KBSOUT4/JEN0# KCOL6
13 KA20GATE 121 101 30 48
ECSCI#_KBC GA20 GPI94 GPIO55/CLKOUT KBSOUT5/TDO KCOL7
29 105 47
ECSCI#/GPIO54 GPI95 KBSOUT6/RDY# KCOL8
9 KBC_BL_ON_IN
ECSWI#_KBC
9
GPIO65/SMI# D/A GPI96
106 3G_EN 26 63
GPIO14/TB1 KBSOUT7
43
KCOL9
C 123
GPIO67/PWUREQ# GPI97
107 13,41 PM_PWRBTN# 117
31
GPIO20/TA2 KBC KBSOUT8
42
41 KCOL10
C
28 FAN_TACH GPIO56/TA1 KBSOUT9 KCOL11
22 KBC_BEEP 32 40
GPIO15/A_PWM KBSOUT10 KCOL12
118 39
SMBD_THERM GPIO21/B_PWM KBSOUT11 KCOL13
THERMAL-----> SMBC_THERM
68
GPIO74/SDA2 GPIO01/TB2
64 PM_SLP_S3# 13,19,27,28,35 19 BRIGHTNESS 62
GPIO13/C_PWM KBSOUT12/GPIO64
38
KCOL14
67
69
GPIO73/SCL2 SMB GPIO03
95
93
KBC_PWRBTN# 25 KBSOUT13/GPIO63
37
36 KCOL15
38,39 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 38 KBSOUT14/GPIO62 KCOL16
BATTERY-----> 38,39 BAT_SCL
70
GPIO17/SCL1 GPIO07
94
119 G792#
COVER_SW# 31
13
KBSOUT15/GPIO61/XOR_OUT
35
34
GPIO23 20 CRT_DEC# GPIO12/PSDAT3 GPIO60/KBSOUT16
SB Add D29 for surge prevent. GPIO24
6 12
GPIO25/PSCLK3 GPIO57/KBSOUT17
33
109 CAP_LED 25 31 DC_BATFULL 11
GPIO30 GPIO27/PSDAT2
D29 81 SP 120 10
GPIO66/G_PWM GPIO31 GPIO26/PSCLK2 KROW1
65 FRONT_PWRLED 25 31 TPDATA 71 54
ECSCI#_KBC GPIO32/D_PWM GPIO35/PSDAT1 KBSIN0 KROW2
13 ECSCI# 6 1
GPIO33/H_PWM
66
16
STDBY_LED 25 31 TPCLK 72
GPIO37/PSCLK1 PS/2 KBSIN1
55
56 KROW3
GPIO40/F_PWM FAN_PWM1 28 KBSIN2
84 17 AD_OFF 39 57 KROW4
GPIO77 GPIO42/TCK KBSIN3 KROW5
5 2 31 BLUETOOTH_EN 83
GPIO76/SHBM SPI GPIO43/TMS
20 RSMRST#_KBC 13 KBSIN4
58
KROW6
26 WIRELESS_EN 82
91
GPIO75 GPIO GPIO44/TDI
21
22
PM_SLP_S4# 13,35 30 SPIDI 86
87
F_SDI KBSIN5
59
60 KROW7
25 WLAN_TEST_LED GPIO81 GPIO45/E_PWM CHARGE_LED 31 30 SPIDO F_SDO KBSIN6
ECSWI#_KBC 3G_LED KROW8
13 EC_SWI# 4 3
GPIO46/TRST#
23
24
1
TP91 TPAD14-GP
30 SPICS# 90
92
F_CS0# FIU KBSIN7
61
GPIO47 30 SPICLK F_SCK
SB Change net GPIO50/TDO
25 SPI_WP# 30
CH731UPT-GP 111 26 NUM_LED 25 85 ECRST#
83.R0304.A8H ALL_LED_OFF to 26 E51_TxD
113
GPO83/SOUT_CR/BADDR1 GPIO51
27
VCC_POR#
26 E51_RxD GPIO87/SIN_CR GPIO52/RDY# BLON_OUT 19
2ND = 83.R3004.A8E WALN_LED 112
GPO84/BADDR0 GPIO53
28 CHG_ON# 1 TP90 TPAD14-GP
73 USB_PWR_EN# 31
WLAN_LED_OFF# GPIO70 30W_60W# NPCE781BA0DX-GP
25 WLAN_LED_OFF# 114 74
AD_IN_DET GPIO16 GPIO71
14 75
S5_ENABLE_KBC GPIO34 GPIO72
28,34,41 S5_ENABLE 1 2 15 110
R211 2KR2F-3-GP GPIO36 GPO82/TRIS#
SER/IR -1 Change GPIO71 reserve for 60W adaptor.
1
VCORF 44 R291
VCORF
B DY 10KR2J-3-GP SB Add net RSMRST# in RN32 for damping BJT. B
RN32
1
AGND
C379 G792# 5 4 RSMRST_R#

GND
GND
GND
GND
GND
GND
6,28 RSMRST#
2
SCD1U16V2ZY-2GP
6 3 AD_IN_DET AD_IN_DET 39
3D3V_AUX_S5 7 2 ECRST#
2
1
NPCE781BA0DX-GP 8 1 COVER_SW# COVER_SW# 31
103
5
18
45
78
89
116
R240
10KR2J-3-GP SRN10KJ-6-GP
Internal KeyBoard LINEAR
1
2
KB1 RSMRST_R# B C380
PTWO-CON24-1-GP SC1U10V2KX-1GP
Connector
2
20.K0391.024 Q12
DY
C
MMBT3906-4-GP
-1 Change 20.K0246.024 to 20.K0391.024 84.T3906.A11
25 2nd = 84.03906.U11
1 KROW1
2 KROW2
3 KROW3 3D3V_AUX_S5
4 KCOL1 S5_ENABLE_KBC U65
5 KCOL2 AD_OFF
6 KCOL3 1
1
2
KROW4 GND
7 3
KCOL4 RN19 RSMRST# VCC
8 2
KCOL5 3D3V_S0 RESET#
9 SRN10KJ-5-GP
10 KCOL6
11 KCOL7 G690L293T73UF-GP
12 KCOL8 74.00690.I7B
4
3
13 KCOL9
1
2
3
4
14 KROW5
15 KCOL10 RN10
A 16 KROW6 SRN10KJ-6-GP A
17
18
KROW7
KCOL11
Check 漏漏fun SJV10-NL
19 KCOL12 SRN10KJ-6-GP
8
7
6
5
20 KROW8
KCOL13 KA20GATE WLAN_LED_OFF#
21
22 KCOL14 KBRCIN#
4
3
5
6
FOR KBC DEBUG Wistron Corporation
23 KCOL15 2 7 EC_3D3V_S0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SMBD_THERM 28 5V_AUX_S5 Taipei Hsien 221, Taiwan, R.O.C.
24 KCOL16 3D3V_S0 1 8 CRT_DEC#
SMBC_THERM 28
26 Title
RN29
TPAD14-GP TP92 1 KBC NPCE781B
www.vinafix.vn
2nd = 20.K0320.024 Custom SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5
1
2
3
4
D
RN33 D
SRN10KJ-6-GP
SB Change U19 from 4MB to 2MB
8
7
6
5
SPI_HOLD# (72.25165.A01, 72.25Q16.001).
U19 3D3V_AUX_S5
29 SPICS# 1 CS# VCC 8

29 SPIDI ER1 1 2 SPI_DI 2 7 SPI_HOLD#
0R2J-2-GP SPI_WP# SO/SIO1 HOLD# SPICLK_1 ER2 0R0402-PAD
29 SPI_WP# 3 WP#/ACC SCLK 6 2 1 SPICLK 29
4 5 SPI_DO ER3 2 1 0R0402-PAD SPIDO 29
GND SI/SIO0
R848
3D3V_AUX_S5 1 2 MX25L1605DM2I-12G-GP
1
72.25165.A01 EC23 EC24
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DUMMY-R2
-1 Add EC23,EC24 10pF
2
C 2ND = 72.25Q16.001 (78.10034.1FL) by RF request. C
3RD = 72.02516.A01 GOLDEN FINGER FOR DEBUG BOARD

16M Bits
SPI FLASH ROM
3D3V_S0
TPAD14-GP
TP10
TPAD14-GP
12,29 LPC_LAD0 TP11
TPAD14-GP
12,29 LPC_LAD1 TP12
TPAD14-GP
12,29 LPC_LAD2 TP13
TPAD14-GP
12,29 LPC_LAD3 TP14
12,29 LPC_LFRAME# TPAD14-GP
TP15
TPAD14-GP
9,12,29 PLT_RST# TP17
TPAD14-GP
TP19
TPAD14-GP
B 12 PCLK_FWH TP22 B
-1 Change DB1 to test pads.
SJV10-NL
A Wistron Corporation A
Title
BIOS
Custom SJV10-NL -1
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
Cover Up Switch LID1

APX9132HAI-TRG-GP BLUETOOTH MODULE 5V_S0
COVER_SW #_1
74.09132.C7B BT1
6
TOUCH PAD
29 COVER_SW # 2 1 2 VOUT
2
1
3D3V_BT_S0 3D3V_S0 4 USBPN7 13
R854 3D3V_AUX_S5
GND 3 U11 SCD1U10V2KX-5GP 3 USBPP7 13 RN24 -1 Change 抽抽抽抽抽異異
1
SB Move cover C597 100R2F-L1-GP-U C348 2 SRN10KJ-5-GP Pin SWAP
SCD22U6D3V2KX-1GP
1 1 5 1 2
SW to MB. VDD
2
OUT IN
1 3D3V_BT_S0 5V_S0
2
GND
1
C596 3 4
3
4
NC#3 EN
1
SC1U6D3V2KX-GP
D EC14 5 RN25 5 D
SRN33J-5-GP-U 1
2
BLUETOOTH_EN 29
SCD1U16V2ZY-2GP
G5240B1T1U-GP
2
74.05240.A7F PTW O-CON4-11-GP-U 29 TPCLK 2 3 TP_CLK 2
74.09711.A7F -1 Add C348 0.1uF 20.F1561.004 29 TPDATA 1 4 TP_DATA 3
(78.10491.4FL) by RF 20.F1621.004 4
6
request.
U6 20.K0265.004
USB MODULE
1
G5240B2T1U-GP-U EC19 EC20 PTW O-CON4-1-GP-U1
74.05240.B7F TPCN1
DY DY
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SB SWAP TPCN1 pin
2
R39
LINEOUT_JD# 1 2 LINEOUT_JD_R# 4 3 arrangement.
1KR2F-3-GP EN# NC#3 5V_USB1_S0 5V_USB1_S0
GND 2
5V_S0 5 1 USB1 USB2
IN OUT
8 8
1
C206 C223 C203 6 6
1
DY SCD1U16V2ZY-2GP 1 1
SCD1U16V2ZY-2GP
SC100P50V2JN-3GP
DY
2
2 USBPN5 13 2 USBPN6 13
2
3 USBPP5 13 3 USBPP6 13
74.09711.C7F 4 4
5 5
7 7
5V_SPDIF_S0
SKT-USB-317-GP SKT-USB-317-GP
USB Connector
C 22.10321.311 22.10321.311 SB Change pin arrangement C
2nd = 22.10321.401 2nd = 22.10321.401 USBCN1
LINE OUT 不不不不不不不不 3rd = 22.10321.881 3rd = 22.10321.881

-1 Change USBCN1 20.K0234.020
to same as -CS PTW O-CON20-GP
20.K0359.020
2nd = 20.K0261.020
to 20.K0359.020 22
25 FRONT_PW RLED#_R 20
68.00119.081 Active Low 25 STDBY_LED#_R 19
-1 Change EC32,EC33 to 100pF ,add 5V_S5 29 DC_BATFULL 18
LOUT1 U62
EC30,EC31 for anti-headphone pop noise. 68.00230.021 29 CHARGE_LED 17
M6 AGND R862 100 mil 25 W LAN_LED#_R 16
1 GND FLG1 8 25 3G_LED#_R 15
M1 HP_R_1 1 2 2 7 5V_USB1_S0 14
FCB1608CF-GP HP_R 22 IN OUT1
3 EN1# OUT2 6 13
1
M4 HP_L_1 1 FCB1608CF-GP
2 HP_L 22 4 EN2# FLG2 5 13 USBPN0 12
1
M5 AGND EC21 TC16 11
C559 13 USBPP0
M7 10
ST220U6D3VDM-15GP
LINEOUT_JD# 22 R863
2
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
AP2182SG-13-GP 9
2
29 USB_PW R_EN#
1
EC30 EC31 EC33 EC32 68.00230.021 74.02182.071 8

LED A 2nd = 74.00546.A7D 7
DRIVE 5V_SPDIF_S0 68.00119.081
MLVS0603M04-1-GP
MLVS0603M04-1-GP
B 6
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
IC C DY DY 5V_S0 5
TX
AUDIO-JK195-GP
SB Add EC32,EC33,R862,R863 for
anti-headphone pop noise. SATA Connector 4
3
2
2
2ND = 22.10147.381
2
C32 5V_S5 1
B B
SC680P50V2KX-2GP
1
29 USB_PW R_EN#
1
AGND AGND SATA1 EC25 21
DY
SCD1U16V2ZY-2GP
23 DY C200
SC1U10V3KX-4GP
AUD_SPDIF_OUT 22 NP1
2
S1
S2 SATA_TXP0 C196 1 2SCD01U50V2KX-1GP SATA_TXP0_C 14

SB change P/N S3 SATA_TXN0 C197 1 2SCD01U50V2KX-1GP SATA_TXN0_C 14
S4
MIC IN change 22.10088.I71 from
20.F1416.022
S5
S6
S7
SATA_RXN0
SATA_RXP0
C198 1
C199 1
2SCD01U50V2KX-1GP
2SCD01U50V2KX-1GP
SATA_RXN0_C 14
SATA_RXP0_C 14
to 62.10065.241
MICIN1 P1
6 P2
SHIELDING
7 P3
1 -1 change SATA1 P/N P4
5V_S0
2 AUD_MICIN_L1 P5
10
AUD_MICIN_L1 22 from 62.10065.241 P6
3 AUD_MICIN_R1
AUD_MICIN_R1 22
to 62.10065.E51 P7
4 P8
5 MIC_JD# 22 P9
1
P10 C523 TC15
1
PHONE-JK404-GP P11 C522 77.C1071.081
SCD1U16V2ZY-2GP
ST100U6D3VBML1GP
EC38 EC36
SC10U10V5KX-2GP
22.10088.J11 P12 2
2
MLVS0603M04-1-GP MLVS0603M04-1-GP P13 DY
DY DY P14 SB Del D25,Change TC15 to dummy.
P15
A NP2 SJV10-NL A
24
2
SKT-SATA7P-15P-35-GP Wistron Corporation

Title
CONNECTOR_audio jack
www.vinafix.vn
A3 SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
D D
ISL62883 VCC_CORE
TPS51123 5V/3D3V
VID Setting Output Signal Input Power Output Power

H_VID0
VID0(I / 3.3V) CORE_PWRGD DCBATOUT_51123_1 5V_S5 (8A) RT9026 0D75V_S0
PGOOD VIN_1 5V(O)
H_VID1 5V_S5
VID1(I / 3.3V) VIN
DCBATOUT_51123_2
H_VID2 VIN_2 3D3V_S5 (6A) 1D5V_S3 0D75V_S0 (1.2A)
VID2(I / 3.3V) 3D3V(O) VLDOIN VTT
H_VID3
VID3(I / 3.3V) Input Signal PM_SLP_S3#
Output Power S5_ENABLE 5V_AUX_S5 (100mA) S3 DDR_VREF_S3
H_VID4 EN1 5V_AUX(O) VTTREF
VID4(I / 3.3V) VCC_CORE(Imax=65A) PM_SLP_S4#
VCC_CORE_PWR EN2 S5
H_VID5
C VID5(I / 3.3V) 3D3V_AUX_S5 (100mA) C
Output Signal 3D3V_AUX(O)
H_VID6
VID6(I / 3.3V)
ALL_PWRGD
PGOOD
Input Signal RT9025 1D8V
IMVP_VR_EN 5V_S5
EN (I / 3.3V) VIN
3D3V_S0 1D85V_S0
VLDOIN 1D8V (O)
Voltage Sense
VCC_SENSE RT9025 1D5V PM_SLP_S3#
VSEN(I / Vcore) EN
Input Power Output Power
VSS_SENSE 5V_S5 ALL_PWRGD
RGND(I / Vcore) VDD PGOOD
1D5V_S3 (10A)
DCBATOUT_7141_1D5V 1D5V (O)
VCC
Input Power
Input Signal Charger BQ24745
DCBATOUT_62883 PM_SLP_S4#
B
VCC(I) EN B
5V_S5
Input Signal Output Signal
VCC(I)
3D3V_S0 ALL_PWRGD Output Signal AC_IN#
ACGOOD#
VCC(I) PGOOD
AD_IA
BATT_SENSE SRSET
FBS
RT8209B 1D05V Input Power Output Power
AD+ BT+
Input Power Output Power ACN VOUT (O)
Adapter 5V_S5
VDD DCBATOUT
1D05V_S0 (10A) VOUT (O)
Input Signal Output Signal DCBATOUT_RT8209B_1D05V 1D05V (O)
AD_IN# VCC
AD_OFF (I) (O)
Input Signal
PM_SLP_S3# SJV10-NL
A Input Power Output Power EN A
AD_JK AD+
VCC(I) VCC(O) Wistron Corporation
ALL_PWRGD Output Signal 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
5V_AUX_S5 Taipei Hsien 221, Taiwan, R.O.C.
VCC(I) PGOOD
Title
Power Block Diagram
SJV10-NL
www.vinafix.vn
-1
5 4 3 2 1
5 4 3 2 1
DCBATOUT_6265_1
1 2 C384 C385 C386 C387
SCD1U25V3KX-GP
C383 SC33P50V2JN-3GP C388 SC180P50V2JN-1GP
5
6
7
8
1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
D
D
D
D
C389 U21
1 R214 26265_FB_NB_R 1 2
2
44K2R2F-1-GP
SI7686DP-T1-GP
SC1KP50V2JN-2GP
20091002
G
S
S
S
D C390 VCC_CORE_S0_0 D
DCBATOUT DCBATOUT_6265_1 5V_S0 1 2 Iomax=18A
4
3
2
1
G12 R215
1 2 1 2 OCP_min:24A VCC_CORE
SC1KP50V2JN-2GP L20
UGATE0
GAP-CLOSE-PW R-3-GP 2R3J-GP PHASE0 1 2
1
G13 1 R216 2 IND-D36UH-19-GP
1
1 2 C391 22KR2F-GP BOOT0 1 2 Parts
1
SC1U10V3KX-4GP C392 R217 TC3 TC4 TC5
16K2R2F-GPclose to
5
6
7
8
5
6
7
8
1
SE330U2VDM-L-GP
SE330U2VDM-L-GP
GAP-CLOSE-PW R-3-GP GNDA_VCORE SCD22U10V3KX-2GP U23 RFC12
D
D
D
D
D
D
D
D
SE330U2VDM-L-GP
G14 U22 PWM IC
2
1 2 GNDA_VCORE
SIR164DP-T1-GE3-GP
SC47P50V2JN-3GP
CPU_VDDNB_RUN_FB_H 6
2
1 R218 2
SI7686DP-T1-GP
GAP-CLOSE-PW R-3-GP DCBATOUT 4K02R2F-GP
G15 1 R220 2 PHASE_NB 1 2
G
S
S
S
G
S
S
S
1 2 1 R221 2 11K3R2F-2-GP C393 SCD1U16V2KX-3GP
6265_OCSET_NB
5V_S0 3D3V_S0 2R3J-GP LGATE_NB R222 R223 R862 close
4
3
2
1
4
3
2
1
1
GAP-CLOSE-PW R-3-GP 1 DY 2 1 DY 2
to L75
1
C394 PHASE_NB 10R2F-L-GP NTC-10K-9-GP
6265_COMP_NB
DY DY -1 Add RFC12 47pF
ISP0
6265_FSET_NB
TC17 SCD1U25V3KX-GP
6265_FB_NB
(78.47034.1FL)by RF
2
1
1
ST15U25VDM-1-GP UGATE_NB ISP0_R
6265_VCC
2
6265_VIN
R224 ISN0 2 1 request.
DY R225 DY R226 GNDA_VCORE G16
10KR2F-2-GP 0R2J-2-GP 0R2J-2-GP CPU_VDDNB_RUN_FB_L CPU_VDDNB_RUN_FB_L 6 GAP-CLOSE-PW R-3-GP
20091014
2
6265_OFS/VFIXEN
3D3V_S0
1
GNDA_VCORE
49
48
47
46
45
44
43
42
41
40
39
38
37
20091002 U24 LGATE0
1
C R227DY C
20091202WAYNE
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
R228 0R2J-2-GP
10KR2F-2-GP
2
2
GNDA_VCORE 1 36 BOOT_NB
OFS/VFIXEN BOOT_NB BOOT0
36 VRM_PW RGD 2 PGOOD BOOT0 35
CPU_PW RGD_SVID_REG 3 34 UGATE0
6 CPU_PW RGD_SVID_REG PWROK UGATE0
R229 1 0R0402-PAD
2 6265_SVD 4 33 PHASE0
6 CPU_SVD SVD PHASE0 DCBATOUT
R230 1 0R0402-PAD
2 6265_SVC 5 32 5V_S0
6 CPU_SVC SVC PGND0
R231 1 0R0402-PAD
2 6265_ENABLE 6 31 LGATE0
27,37 VCORE_EN ENABLE LGATE0
1 2 6265_RBIAS 7 30
RBIAS PVCC
SCD1U25V3KX-GP
1 2 R232 93K1R2F-L-GP 6265_OCSET 8 29 C397
OCSET LGATE1
1
R233 23K7R2F-GP 6265_VDIFF0 9 28 C398 C395 C396
VDIFF0 PGND1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
6265_FB0 10 27 SC2D2U10V3KX-1GP
FB0 PHASE1
5
6
7
8
6265_COMP0 11 26
2
GNDA_VCORE 6265_VW 0 COMP0 UGATE1 U25
12 25
D
D
D
D
VW0 BOOT1
SI4800BDY-T1-GP
COMP1
VDIFF1
VSEN0
VSEN1
RTN0
RTN1
G17 74.06265.B73
ISN0
ISN1
ISP0
ISP1
VW1
FB1
1 2
G
S
S
S
GAP-CLOSE-PW R-3-GP ISL6265CHRTZ-T-GP Iomax=4A
13
14
15
16
17
18
19
20
21
22
23
24
4
3
2
1
GNDA_VCORE
74.06265.C73 CPU_VDDNB
ISP0 UGATE_NB L21
ISN0 ISN0 BOOT_NB 1 2 PHASE_NB 1 2
change to 74.06265.A73 C399 IND-3D3UH-116-GP
1D8V_S0 ISP0 SCD22U10V3KX-2GP
1
B VCC_CORE B
5
6
7
8
1
-1 change TC6 RFC13
1
U26 SC47P50V2JN-3GP
D
D
D
D
ST330U2VDM-3GP
R234 to short
2
SI4800BDY-T1-GP -1 Add RFC13 47pF
2
0R0402-PAD
1
pad (78.47034.1FL)by RF
R235 R234
Close to 10R2J-2-GP request.
2
CPU socket
G
S
S
S
2
4
3
2
1
6 CPU_VDD0_RUN_FB_H
6 CPU_VDD0_RUN_FB_L
LGATE_NB
20091202WAYNE
1
R237
10R2J-2-GP Parallel
6265_FB0_C C406 SC180P50V2JN-1GP
2
1 2 DY
R243 C408 C409
1 2 1 2 1 2 1 2
249R2F-GP C410
SC4700P50V2KX-1GP SC180P50V2JN-1GP
SC1KP50V2JN-2GP
1KR2F-3-GP R246 C414 R247

1 R245 2 1 2 1 2 1 2 SJV10-NL
54K9R2F-L-GP 6K81R2F-1-GP
2 R251 1 SC180P50V2JN-1GP
A 3D3V_S0 DY
910KR2J-GP
A
6265_FB0_R 1 2 Wistron Corporation

2 R253 1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY
0R2J-2-GP C416 Taipei Hsien 221, Taiwan, R.O.C.
SC1KP50V2JN-2GP
Title
1 2
DY CPU VCORE_ISL6265HR
SC33P50V2JN-3GP Size Document Number Rev
EC49
A3 SJV10-NL -1
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_51123_1 3D3V_PW R 3D3V_S5

G19 DCBATOUT DCBATOUT_51123_2 G21 5V_PW R 5V_S5
1 2 G20 1 2 G22
1 2 1 2
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G23 GAP-CLOSE-PW R-3-GP G25 GAP-CLOSE-PW R-3-GP
1 2 G24 1 2 G26
1 2 1 2
G27 GAP-CLOSE-PW R-3-GP G29 GAP-CLOSE-PW R-3-GP
D 1 2 G28 1 2 51123_ENTIP2 51123_ENTIP1 G30 D
1 2 1 2
1
GAP-CLOSE-PW R-3-GP G32 GAP-CLOSE-PW R-3-GP
1
G31 1 2 C418 R255 R256 C419 G33
SC18P50V2JN-1-GP 133KR2F-GP 133KR2F-GP SC18P50V2JN-1-GP
1 2
GAP-CLOSE-PW R-3-GP
DY DY 1 2
2
GAP-CLOSE-PW R-3-GP G34 GAP-CLOSE-PW R-3-GP
2
1 2 G35
1 2
GAP-CLOSE-PW R-3-GP
G36 GAP-CLOSE-PW R-3-GP
1 2 20091202WAYNE G37
1 2
GAP-CLOSE-PW R-3-GP
G38 GAP-CLOSE-PW R-3-GP
1 2 G39
1 2
GAP-CLOSE-PW R-3-GP
-1 Reserve RFC26 by RF request. GAP-CLOSE-PW R-3-GP
DCBATOUT
DCBATOUT_51123_1 DCBATOUT_51123_2
-1 Reserve RFC27 by RF request.

C424
2
1
RFC26 C420 C421 C422 C423 SCD01U50V2KX-1GP
2
DY C425 C426 C427 RFC27
SC22P50V2JN-4GP
DY
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U25V3KX-GP
SC22P50V2JN-4GP
1
SCD1U25V3KX-GP
20091008 DY 20091008
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
1
C C
D D
8
7
6
5
5
6
7
8
D
D
D
D
D
D
D
D
U30 U32
16
SIS412DN-T1-GE3-GP
U31
SIS412DN-T1-GE3-GP Iomax=5.5A
20091202WAYNE 20091202WAYNE OCP>9A
VIN
G
S
S
S
C428 C429
Iomax=5A
S
S
S
G
R257 R258
SCD1U25V3KX-GP SCD1U25V3KX-GP
G S
1
2
3
4
4
3
2
1
OCP>7.5A S G 2 151123_VBST2_R 1 251123_VBST2 9
4D7R3J-L1-GP BOOT2 BOOT1 22 51123_VBST1 1 251123_VBST1_R 1
4D7R3J-L1-GP
2
3D3V_PW R 51123_DRVH2 10 21 51123_DRVH1 5V_PW R
L23 UGATE2 UGATE1 L24
1 2 51123_LL2 11 20 51123_LL1 1 2
20091008 IND-3D3UH-116-GP PHASE2 PHASE1 IND-3D3UH-116-GP
51123_DRVL2 51123_DRVL1
20091008 20090910
D 20091008 12 19
SC47P50V2JN-3GP
LGATE2 LGATE1
1
SC47P50V2JN-3GP
8
7
6
5
5
6
7
8
1
TC10 C430
D
D
D
D
C431
D
D
D
D
U33 51123_VO2 7 24 51123_VO1 U34 G41 TC11

ST220U6D3VDM-15GP
2
VOUT2 VOUT1
1
G40 SIS406DN-T1-GE3-GP SIS406DN-T1-GE3-GP
ST220U6D3VDM-15GP
1
2
1
GAP-CLOSE-PWR-3-GP
51123_FB2 5 2 51123_FB1
FB2 FB1
GAP-CLOSE-PWR-3-GP
DCBATOUT 1 R259 2
249KR2F-GP
2
S
S
S
2 51123_EN 13
G
1 23
S
S
S
G
S5_PW R_GD 13
2
R260 100KR2F-L1-GP EN PGOOD

-1 Add C430 47pF G S
1
2
3
4
4
3
2
1
51123_ENTIP2 6 51123_ENTIP1
(78.47034.1FL)by RF S G 51123_VREF ENTRIP2 ENTRIP1 1
-1 Add C431 47pF
request. 51123_VREF 3
REF PGND 15
(78.47034.1FL)by RF
1
B B
51123_TONSEL 4 TONSEL GND 25 request.
C432
1
2
1
SCD22U10V2KX-1GP
Id=7.7A 14 18 51123_VCLK 1 TP93 TPAD14-GP DY

SKIPSEL ENC
1
1
R264 51123_SKIPSEL R262
R263 0R2J-2-GP Qg=8.5~13nC, 0R2J-2-GP R265
DY
VREG3
VREG5
6K98R2-GP Rdson=16.5~21mohm 30KR2F-GP
1 2
51125_FB1_R
1 2
2
51125_FB2_R C433 DY
2
2
DY C434 RT8223BGQW -GP R266 SC18P50V2JN-1-GP
8
17
SC18P50V2JN-1-GP 0R0402-PAD
2
3D3V_AUX_S5 5V_AUX_S5
3D3V_AUX_S5_5_51123
G42
2
G43 -1 change R266

1
1
5V_AUX_S5_51123
1 2 1 2
to short pad
1
R269
R268 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP 20KR2F-L-GP
10KR2F-2-GP 51123_VREF 2 DY 1
R270 Close to VFB Pin (pin2)
2
0R2J-2-GP S5_ENABLE 28,29,41
20090713 WAYNE
2
3D3V_AUX_S5 1 2
R271
1
0R0402-PAD C436
20091202WAYNE C435 SC10U6D3V5MX-3GP
2 1 SC4D7U6D3V5KX-3GP
2
R272
0R2J-2-GPDY Vout=2*(1+R1/R2)
78.47520.51L 78.10610.51L
A Close to VFB Pin (pin5) 51123_VREF 2 DY 1 SJV10-NL A
R273 GND VREF VREG3 VREG5
0R2J-2-GP
3D3V_AUX_S5 1 2 Wistron Corporation

R274 SKIPSEL AUTOSKIP PWM 00A AUTOSKIP 00A AUTOSKIP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
0R0402-PAD Taipei Hsien 221, Taiwan, R.O.C.
-1 change R271,R274
2 DY R275
1 Title
to short pad 0R2J-2-GP TONSEL 200k/CH1 245k/CH1 300k/CH1 365k/CH1
-1 Add EC48 47pF 250k/CH2 305k/CH2 375k/CH2 460k/CH2 RT8223_5V/3D3V
1 2 Size Document Number Rev
www.vinafix.vn
SC47P50V2JN-3GP EC48 (78.47034.1FL)by RF
request. SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_7141_1D5V
G44
1 2
DCBATOUT_7141_1D5V
GAP-CLOSE-PW R-3-GP 5V_S5
G45
20090910 1D5V_PW R 1D5V_S3
1 2
GAP-CLOSE-PW R-3-GP
20091202WAYNE
DDR Power C440
1
G46
2
SCD1U25V3KX-GP
G47 C438 C439 GAP-CLOSE-PW R-3-GP
1
1 2 U35 G48
C437 R276 1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
D GAP-CLOSE-PW R-3-GP SC1U10V2KX-1GP 2D2R2J-GP SIR474DP-T1-GE3-GP D
5
6
7
8
G49 Id=10.5A GAP-CLOSE-PW R-3-GP
D
D
D
D
1 2 G50
Qg=8~11nC,
2
7141_V5FILT 1 2
GAP-CLOSE-PW R-3-GP
R277 Rdson=10.5~14mohm
1
C441 C442 GAP-CLOSE-PW R-3-GP
5V_S5 SC1U10V2KX-1GP 1 2 7141_LL_1 1 2 1.5uH, DCR=4.2+/-5% G51
G
S
S
S
20091202WAYNE REMOVE R278 1 2
2
3D3R3J-L-GP SCD1U25V3KX-GP Idc=16A, Isat=33A Iomax=12A
4
3
2
1
1
DY GAP-CLOSE-PW R-3-GP
A
TC12
ST15U25VDM-1-GP D13
U36
7141_DRVH
OCP>18A G52
DY 4 13 1 2
2
VDD UGATE 7141_DRVL 1D5V_PW R

B0530W S-7-F-GP 10 VDDP LGATE 9 L25 20090910 GAP-CLOSE-PW R-3-GP
7141_VFB 5 12 7141_LL 1 2 G53
20090916
K
7141_VBST FB PHASE
20091014 14 BOOT 1 2
1
3 1D5V_PW R IND-1D5UH-52-GP C443 TC13
VOUT
1
SE330U2VDM-L-GP
6 7141_PGOOD R280 C444 GAP-CLOSE-PW R-3-GP
PGOOD
5
6
7
8
SC33P50V2JN-3GP
SCD1U10V2KX-5GP
1 R279 2 7141_EN_PSV 1 7 30KR2F-GP DY G54
13,29 PM_SLP_S4# EN/DEM GND DY
D
D
D
D
0R0402-PAD 1 2 7141_TON 2 8 1D5V_PW R U37 1 2
2
R281 7141_TRIP TON PGND
11 15
2
200KR2F-L-2-GP CS NC#15 SIR460DP-T1-GE3-GP 7141_VFB GAP-CLOSE-PW R-3-GP
1
2
RT8209EGQW -GP G55
1
C445 DY 20091202WAYNE R852 1 2
1
S
S
S
SCD1U10V2KX-5GP R283
G
74.08209.B73 10KR2J-3-GP
2
10KR2F-2-GP R284 GAP-CLOSE-PW R-3-GP
4
3
2
1
30KR2F-GP G56
1
1 2
2
SB Add R852 for pull
2
C GAP-CLOSE-PW R-3-GP C
20091202WAYNE high to 1D5V_PWR G57
Id=15A 1 2
Qg=15~21nC, GAP-CLOSE-PW R-3-GP
Freq=300KHz Rdson=5.2~6.9mohm Vout=0.75V*(R1+R2)/R2
RT9026 for DDR_VREF_S3_1 DDR_VREF_S3

B B
Iomax=1.2A
5V_S5 1D5V_S3 OCP>1.8A
1
C447 C448 DDR_VREF_PW R DDR_VREF_S3

1
SC10U6D3V5MX-3GP
C446 G58
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
1 2
2
U38
2
RT9026PFP-GP GAP-CLOSE-PW R-3-GP

74.09026.079 G59
1 2
10 1 GAP-CLOSE-PW R-3-GP
VIN VDDQSNS G60
13,29 PM_SLP_S4# 9 S5 VLDOIN 2
8 GND VTT 3 1 2
13,19,27,28,29 PM_SLP_S3# 7 S3 PGND 4
DDR_VREF_S3_1 6 5 GAP-CLOSE-PW R-3-GP
VTTREF VTTSNS
GND
1
SB Change net C449

1
C450 C451
PM_SLP_S4# to
SC1U10V2KX-1GP
2
11
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PM_SLP_S3#
2
A SJV10-NL A
Wistron Corporation
Title
RT8209E_1D5V/RT9026_0D75V
www.vinafix.vn
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT
1D1V_PW R 1D1V_S0
G63
1 2
U39 C455
SCD1U25V3KX-GP
C453 C454 GAP-CLOSE-PW R-3-GP
SIR474DP-T1-GE3-GP G65
D
5
6
7
8
1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
D
D
D
D
D
RT8209E for 1D1V_S5 GAP-CLOSE-PW R-3-GP
1
G67
2
D
G
S
S
S
GAP-CLOSE-PW R-3-GP
G69
4
3
2
1
20091202WAYNE REMOVE R286 G S 1 2
20091202WAYNE
Iomax=11A GAP-CLOSE-PW R-3-GP
OCP>17A G71
1 2
1D1V_PW R
L26
5V_S5 Vout=1.1071(Cal) GAP-CLOSE-PW R-3-GP
20091202WAYNE 1 2 G72
1 2
IND-1UH-93-GP C457
1
1
C456 TC14 GAP-CLOSE-PW R-3-GP
D
1
SC18P50V2JN-1-GP
SC1U10V2KX-1GP R287 G73
R288 DY
5
6
7
8
SE330U2VDM-L-GP
5V_S5 2D2R2J-GP C458 1 2
2
2
D
D
D
D
1 2 RT8209E_LL_1_1D1V 1 2 U40 R289
2
1 2 10KR2F-2-GP GAP-CLOSE-PW R-3-GP
RT8209E_VDD_1D1V SCD1U25V3KX-GP SIR460DP-T1-GE3-GP G74
A
C459 3D3R3J-L-GP
20091012 1 2
2
D14 SC1U10V2KX-1GP RT8209E_VFB_1D1V
DY
S
S
S
GAP-CLOSE-PW R-3-GP
G
B0530W S-7-F-GP
2
1
U41 G75
4
3
2
1
RT8209E_UGATE_1D1V R290
4 13 G S 1 2
K
VDD UGATE RT8209E_LGATE_1D1V 21KR2F-GP

10 VDDP LGATE 9
GAP-CLOSE-PW R-3-GP
C RT8209E_VFB_1D1V 5 12 RT8209E_PHASE_1D1V G76 C
2
RT8209E_BOOT_1D1V FB PHASE
14 BOOT 1 2
VOUT 3 1D1V_PW R
6 GAP-CLOSE-PW R-3-GP
PGOOD 1D1V_PW R
33 VRM_PW RGD 1 R292 2 RT8209E_EN/DEM_1D1V 1
EN/DEM GND 7
0R0402-PAD 1 2 RT8209E_TON_1D1V 2 8
R293 RT8209E_CS_1D1V 11
TON
CS
PGND
NC#15 15 Vout=0.75*(1+R1/R2)
2
249KR2F-GP
1
RT8209EGQW -GP R853 20091202WAYNE

R294 10KR2J-3-GP
11K5R2F-GP
1
2
SB Add R853 for pull

high to 1D1V_PWR
Freq=280KHz
B B
1.8V_S0 1.8V 1A Regulator

U57
G952T63UF-GP
74.95263.03C
3D3V_S0 1D8V_S0
VOUT 4
VIN 3
VOUT 2
GND 1
1
C509 C510
SC1U10V2KX-1GP
SC10U6D3V5MX-3GP
2
A SJV10-NL A
Wistron Corporation
Title
RT8209E_1D1V/LDO 1D8V
5 4
www.vinafix.vn 3 2
Date: Tuesday, January 26, 2010
SJV10-NL
Sheet
1
36 of 42
-1
5 4 3 2 1
0921 RT9025 for 1D1V_S5
3D3V_S5
Iomax=1.4A
D OCP>2A D
5V_S5
1
C589 C590
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
1
DY C591
SC1U6D3V2KX-GP
Iomax=1.4A
2
OCP>2A
Vo(cal.)=1.0518V 1D1V_S5
9
U64
GND
4 VDD NC#5 5
1
3 6 C592 C594 C593
0925 2
VIN VOUT
7 R849 DY DY
EN ADJ
SC100P50V2JN-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
TPAD14-GP TP113
TPAD14-GPTP113 1D1V_S5_PW RGD
1 8 6K2R2F-GP
2
PGOOD GND
2
RT9025-25PSP-GP
74.09025.03D 9025_ADJ_1D1
1
R850
C 16K2R2F-GP C
2
5V_S5
Vo=0.8*((R1+R2)/R2)
=0.8*((6.2K+16.2K)/16.2K)=1.106V
2
2
RFC39 RFC40 RFC41 RFC42 RFC44 RFC45 RFC37 RFC38
DY DY DY DY DY DY DY DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
1
-1 Reserve RFC28~RFC30,RFC37~RFC42,RFC44,RFC45 by RF request.

1
C504
SC1U10V3KX-4GP
2
2
RFC28 RFC29 RFC30

DY DY DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
1
B CPU_VDDR B
U56
1D5V_S3 9
GND
4 VDD NC#5 5
1
3 6 C505
VIN VOUT R822 C506 C507
2 EN ADJ 7
1
SC100P50V2JN-3GP
2K55R2F-GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 8
2
C508 PGOOD GND
SC10U10V5KX-2GP
2
9025_FB
1
RT9025-25PSP-GP
74.09025.03D R823
20KR2F-L-GP
27,33 VCORE_EN 2
3D3V_S0
Vo=0.8*(1+(R1/R2))
1
R824
2K2R2J-2-GP
2
A 9025_POK SJV10-NL A
Wistron Corporation
Title
LDO 1D5_S0 0D9_S0

www.vinafix.vn
A3
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
20090713 WAYNE
AD+ DCBATOUT 20090713 WAYNE
U45 AD+_TO_SYS -1 Reserve RFC14,RFC16~RFC18
8 D S 1 BT+
7 D S 2
R306 by RF request. U46
6 D S 3 1 2 1 S D 8
5 D G 4 AD+_G_1_R 2 S D 7
D01R3721F-GP-U AD+ 3 S D 6
AO4407A-GP R307 R308 4 G D 5
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
2
1
AD+_G_1 1 2 1 2 RFC14
C476
G83
G84
AO4407A-GP
SCD1U50V3KX-GP
SC1200P50V2JX-GP
10KR2J-3-GP 100KR2J-1-GP DY DY DY DY
RFC16
RFC17
RFC18
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
2
2
1
D C477 R309 D
1ISL88731_CSSP_1 1
1ISL88731_CSSN_1 1
1
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
1
SCD01U50V2KX-1GP
470KR2J-2-GP
Q15
2
2
2
2N7002KDW -GP
2
G85
G86
G87
G88
84.2N702.A3F
4
2ND = 84.DM601.03F
1
2 R310 1 ISL88731_AD+_R
10KR2F-2-GP
R311 R312
ISL88731_ACOK 10R2J-2-GP 10R2J-2-GP
D15
20091202WAYNE 1 2 ISL88731_DCIN C478
C479 C480
2
CHG_AGND 2 1 1 2 1 2 CHG_AGND SA 0622
1
C481
ISL88731_CSSP
1
CH521S-30-GP-U1 SC1U25V5KX-1GP SCD1U25V3KX-GP

R313 SCD1U25V3KX-GP SCD047U25V2KX-GP CHRG_IN
1
220KR3F-LGP U48 C482
1
SC1U10V3KX-4GP
C484
NC#1
2
5
6
7
8
1
22 28 R314 C483 C487
DCIN CSSP 4D7R3F-L-GP U47
D
D
D
D
SCD1U50V3KX-GP
ISL88731_ACIN 2 2 CHG_AGND
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SI4800BDY-T1-GP
2
ACIN ISL88731_CSSN
27
SCD01U50V2KX-1GP
2
CSSN
1
11 26 ISL88731_VCC 3 D16
5V_S5 VDDSMB VCC DY
1
C485
R315
1
49K9R2F-L-GP C486 1
G
S
S
S
SCD1U10V2KX-4GP 25 ISL88731_BOOT 1 R316 2 ISL88731_BST_1 C488
2
4
3
2
1
C BOOT ISL88731_LDO 0R3J-0-U-GP BAT54PT-GP C
21 1 2
2
ISL88731_ACOK VDDP
13 ACOK 20091008
SC1U10V3KX-4GP
CHG_AGND 24 ISL88731_UGATE
UGATE
29,39 BAT_SCL 10 SCL 1 2 L28 R317 SA 0622
CHG_AGND C489
23 ISL88731_PHASE SCD1U50V3KX-GP 1 2 BT+_L 1 2
PHASE
9 IND-10UH-214-GP D01R3721F-GP-U
29,39 BAT_SDA SDA ISL88731_LGATE
20
K
LGATE
2
GAP-CLOSE-PWR-2U-GP
GAP-CLOSE-PWR-2U-GP
5
6
7
8
1
G89
G90
C490 C491 D27 C493
14 19 U49
D
D
D
D
NC#14 PGND SMF18AT1G-GP
R318 83.SMF18.AAH
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
10R2F-L-GP SI4800BDY-T1-GP
2
18 ISL88731_CSOP 1 2
A
CSOP
ISL88731_CSOP_R
CHG_AGND
R319
1
17 C494
ISL88731_ICM CSON SCD22U50V3ZY-1GP
2 1 8
G
S
S
S
29 AD_IA ICM
4
3
2
1
ISL88731_CSON
1KR2F-3-GP
ISL88731_VCOMP_1 2 R320 1 ISL88731_VCOMP 6

10KR2F-2-GP VCOMP
5 NC#5 NC#16 16
SCD01U16V2KX-3GP
C495
ISL88731_ICOMP 4
SCD01U50V2KX-1GP
ISL88731_VREF ICOMP
3
SCD015U25V2KX-GP
VREF R321
1
C496
7 NC#7
1
12 15 BATT_SENSE_R 1 2
GND
GND VFB BATT_SENSE 39

1
1
C497
2
B C498 100R2J-2-GP B
2
SC1U10V3KX-4GP
2
29
ISL88731AHRZ-T-GP SA 0626
1 2
G118 3D3V_AUX_S5
GAP-CLOSE-PW R-2U-GP
CHG_AGND SB ChangeU48 from 74.88731.C73 to
1
R322
74.88731.B73 ,(SA BOM already
DY ISL88731_LDO
100KR2J-1-GP
74.88731.B73 used).
AC_IN# to KBC
2
AC_IN#
29 AC_IN#
1
DCBATOUT
R323
D
10KR2F-2-GP
. Q16
2N7002E-1-GP
2
.
. 84.2N702.E31
. .
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
2
EC39 EC40 EC41 EC42 EC43 EC44 EC45 EC46 84.2N702.D31

G
S
1
DY DY DY DY DY ISL88731_ACOK_1 1 R324 2 ISL88731_ACOK

0R0402-PAD
SJV10-NL
1
A -1 Add EC45 0.1uF A
R325
(78.10491.4FL) by RF 15KR2F-GP
request. Wistron Corporation
SB Requested by EMI placed. 2 Taipei Hsien 221, Taiwan, R.O.C.
Title
ISL88731A_CHARGER
www.vinafix.vn
SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
DCIN1
7
Adaptor in to generate DCBATOUT AD+
6
5 AD_JK
4 U50
D 1 1 S D 8 D
2 2 S D 7
K
3 3 S D 6
1
EC26 C499 D19 D17 AD+_2 G D
GND
4 5
SCD1U50V3KX-GP
DC-JACK-203-GP-U1 SCD1U50V3ZY-GP P6SBMJ24APT-GP P6SBMJ24APT-GP
AO4407A-GP
83.P6SMB.AAG 83.P6SMB.AAG
2
2
2
A
A
R860 R326 C500
1
0R2J-2-GP 200KR2F-L-GP SC1U50V5ZY-1-GP
DY Q17
1
2
R2
E
AD_OFF#_JK B R1
AD_IN_DET 29 C
1
PDTA124EU-1-GP
Q18 R327
C 100KR2J-1-GP
B R1 84.00143.H1K
29 AD_OFF
E
2
C R2 C
PDTC124EU-1-GP
84.00143.G1K
BATTERY CONNECTOR
BTY1
RN36 9
SRN33J-7-GP 1
4 5 2
3 6 BATA_SDA_1 3
29,38 BAT_SDA
2 7 BATA_SCL_1 4
29,38 BAT_SCL
29 BAT_IN# 1 8 BAT_IN#_1 5
B 6 B
BT+ 7
8
10
K
1
D18 RFC25 RFC24 ALP-CON8-5-GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
BZX384-C5V6-GP DY DY EC27 EC28 EC29
1
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
83.5R603.E3F 20.81315.008
1
2
R851
SCD1U50V3ZY-GP
A
10KR2F-2-GP
2
UMA
38 BATT_SENSE 1 2
R328
A
0R0402-PAD
Wistron Corporation A
-1 change R328 Taipei Hsien 221, Taiwan, R.O.C.
to short pad
Title
AD / BATT_CONN
SJV10-NL
5 4 www.vinafix.vn 3
Date: Saturday, January 30, 2010
2
Sheet 39
1
of 42
-1
5 4 3 2 1
H1
H4 H7
H5 H6 H17
HOLE256R115-GP
HOLE256R115-GP
HOLE256R115-GP
HOLE256R115-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
MB HOLE
1
1
1
D D
H9 H10
SPRING
STF237R146H65-GP
STF237R146H65-GP
MINI CARD BOSS

1
-1 Add SPR1 for RTC battery.

SPR1
SPRING-16-GP
1
H14 H15 H16
STF237R146H65-GP
STF237R146H65-GP
STF237R146H65-GP
CPU NB BOSS
1
C -1 Change H19 shape SB Add H22,H23,H24 for ME request. C
H19 H20 H21 H22 H23 H24

HOLE237R95X121-S1 HOLE237R95-GP HOLE237R95-GP HOLE237R95-GP HOLE237R95-GP HOLE256R115-GP
H18 H13
STF237R146H65-GP STF237R146H65-GP
1
DY
1
1
B B
A SJV10-NL A
Wistron Corporation
Title
EMI/Spring/Boss
www.vinafix.vn SJV10-NL -1
5 4 3 2 1
5 4 3 2 1
D
Check test point D
3D3V_S0 1 TP94 AFTE14P-GP
3D3V_AUX_S5 1 TP95 AFTE14P-GP
3D3V_S5 1 TP96 AFTE14P-GP
5V_S5 1 TP97 AFTE14P-GP
1 TP98 AFTE14P-GP
13,29 PM_PW RBTN#
1 TP99 AFTE14P-GP
6,12 CPU_PW RGD
1 TP100 AFTE14P-GP
28,29,34 S5_ENABLE
6,12 CPU_LDT_RST# 1 TP101 AFTE14P-GP
放放Dimm Door打
Test Point放打打打打打打
C C
B B
A SJV10-NL A
Wistron Corporation
Title
AFTE_TP
5 4
www.vinafix.vn 3 2
Date:
SJV10-NL
1
41 of 42
-1
5 4 3 2 1
SB Change notice: -1 change notices:

1. Change C344 from 10uF to 0.1uF for anti pop noise.(Page 22) 1. Change R91,R92 to RN132,R27,R30 to RN133,R34~R36 to RN134.(Page 3)
2. ChangeU48 circuit from 74.88731.C73 to 74.88731.B73 ,(SA BOM already 74.88731.B73 used.).(Page 38)
3. SWAP TPCN1pin arrangement.(Page 31) 2. DY C35,C42,C80,Change C36,C43,C569,C79 to 22uF.(Page 7)
4. Change U19 to 2MB(72.25165.A01, 72.25016.A01).(Page 30) 3. Change R60,R62 to RN136.(Page 9)
5. X1 need to change to the same as JV10-CS (82.30005.A51).(Page 3) 4. Change R84,R85 to RN137,R76,R78 to RN138,R22,R79 to RN139.DY C139,Change C140 to 22uF.(Page 10)
6. Del X4,C376,C378,R208,R206 ,R829 change to placed.(Page 28,29) 5. Change R89,R88 to RN140.(Page 12)
7. Add G122 (Page 12). 6. Change R133,R135,R136,R128 to RN141,R138,R139 to RN142.(Page 16)
8. Add net RSMRST# in RN32 for damping BJT.(Page 29)
7. Change
9. X5 2nd source change from 82.30005.C51 to 82.30020.A31,Change C540 from 27pF to 18pF,Change C541 from 27pF to 15pF(Page 23) C266,C281 to dummy.(Page 17)
10. R272 change to dummy.(Page 34) 8. Change C287,C293,C302 to dummy.(Page 18)
D 11. Change R43 from Dummy to 1M ohm.(Page 12) 9. Change R16 to short PAD.(Page 19) D
12. Del R285, Add R852,R853 for pull high to 1D1V_PWR and 1D5V_PWR.(Page 35,36) 10. Change C532 to dummy.(Page 23)
13. Change RN30 form page31 to page 22. 11. Change C331,C400,C361,C363 to dummy,change R832,R833 to RN143.(Page 24)
14. Add D28 for thermal trigger S5 shutdown.(Page 28)
15. Del net RSMRST#_SB pull high , Change S5_PWR_GD pull high from R261 to RN43.(Page 13) 12. Change C357 to dummy.(Page 26)
16. Change pin arrangement to same as -CS, move cover SW to MB,Del WIRELESS_BTN# and 3G_BTN#. (Page 29,31) 13. Change R844,R847 to short pad.(Page 28)
17. Change PCB version pull high from 3D3V_AUX_S5 to 3D3V_S5,R836 1K change to 2K (page29). 14. Add reserved R865, change pull high to 3D3V_S5.(Page 23)
18. Change GPIO16 net name from ALL_LED_OFF to WLAN_LED .(page29) 15. Change 10u/25V(78.10622.51L)to 4.7u/25V(78.47522.51L)(Page 19)
19. Change C558 1000pF P/N form 78.1022S.24L to 78.1022S.L1L.(page24) 16. Change C483,C423,C487,C490,C491,C493. 10u/25V(78.10622.51L)to 4.7u/25V(78.47522.51L)(Page 34,38)
20. Change capacity from 6.8pF (78.6R864.1FL) to 5.6pF (78.5R674.1FL)(page20).
21. Change net PCLK_FWH to LPCCLK0_R change net PCLK_KBC to LPCCLK1_R(page16). 17. Change USBCN1 20.K0234.020 to 20.K0359.020 (Page 31)
22. Change R180,R104,Q4 to placed(page27). 18. Change KB1 20.K0246.024 to 20.K0391.024(Page 29)
23. Change P/N from 20.F1416.022 to 62.10065.241(page31). 19. Change R234 to short pad.(Page 33)
24. Add D29 for surge prevent.(page29). 20. Change R266,R271,R274 to short pads.(Page 34)
25. Change Mini card 3G pin41 from 5V_S5 to NC.(page26). 21. Change R328 to short pad.(Page 39)
26. Add C598 for solve CRT flicker issue (page9).
27. Change R859 from 150 ohm to 140 ohm (page20). 22. Change 3G LED portion circuit.(Page 26)
28. Add H22,H23,H24 for ME request. (page40). 23. Change R166 to reserved D21.(Page 22)
29. Del net E51_RxD ,E51_TxD (page26). 24. Change 抽抽抽抽抽異異.(Page 31)
30. Change R71 from bead 470 ohm to RES 3.9 ohm(page9). 25. Add SPR1 for RTC battery.(Page 40)
31. Del D25.(page31).
32. Add RTC charge circuit.(page12).
26. Add VRAM identify pins.(Page 12)
33. EC42,EC43 requested by EMI placed.(page38). 27. Change EC32,EC33 to 100pF,add EC30,EC31 for anti-headphone pop noise(Page 31)
34. Change LCD1 P/N from 20.F1093.040 to 20.F1703.040(page19). 28. Change GPIO71 reserve for 60W adaptor.(Page 29)
35. Change net PM_SLP_S4# to PM_SLP_S3#.(page35). 29. Reserve EC47 for EMI issue.(Page 13)
C 36. Add EC32,EC33,R862,R863 for anti-headphone pop noise.(page31) 30. Change DB1 to test pads.(Page 30) C
37. Change C189 to 22pF, C190 to 15pF.(page12)
38. Change TC15 to dummy.(page31)
31. Change C12,C20,C193 to 12pF,C541 to 18pF.(Page 3,12,23)
32. Add R335,EC74~EC79 for AGND connect.(Page 22)
33. Change Card1 P/N to 62.10024.B41(Page 25)
34. Change 10u/25V(78.10622.51L)to 10u/16V(78.10621.52L)(Page 19)
35. Change SATA1 P/N from 62.10065.241 to 62.10065.E51.(Page 31)
36. Add F4,D25 for ESD function.(Page 21)
37. Reserve C310,RFC1,RFC11,RFC14,RFC16~RFC19,RFC22,RFC24~RFC30,RFC37~RFC42,RFC44~RFC48 by RF request.(Page 3,18,19
38. Add EC4,EC12,EC13,C306 (22pF)by RF request.(Page 3,19,22)
39. Change R1,R4,R7 to bead (68.00373.001).(Page 3)
40. Add C309,C430,C431,RFC12,RFC13,EC48 47pF (78.47034.1FL)by RF request.(Page 19,33,34)
41. Add C303,C348,EC45 0.1uF (78.10491.4FL) by RF request.(Page 19,31,38)
42. Add RFC10,C310 1200pF (78.12234.2FL)by RF request.(Page 19)
43. Add EC23,EC24 10pF (78.10034.1FL) by RF request.(Page 30)
44. Add C377 33pF (78.33034.1FL) by RF request.(Page 29)
45. Change C189 to 15pF.(Page 12)
B B
A SJV10-NL A
Wistron Corporation
Title
Modify History
www.vinafix.vn
A3 SJV10-NL -1
5 4 3 2 1

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5 4 3 2 1

Project code: 91.4HX01.001

INT. RTC SATA SATA HDD 31 ISL6265AHR 33

SMB PS/2 KBC Wistron Corporation

Power on Sequence required:

RS880: CPU_CLKP/N running

Power button from EC to SB

Power button pressed

LDO:5.4V stays active if AC present

Pair Device A_VBAT

LANE1 LAN 9 WECAM Wistron Corporation

8 HT_NB_CPU_CLK_H1 M8 L0_CLKIN_H1 L0_CLKOUT_H1 AF6 HT_CPU_NB_CLK_H1 8

8 HT_NB_CPU_CLK_H0 M3 L0_CLKIN_H0 L0_CLKOUT_H0 AD1 HT_CPU_NB_CLK_H0 8

8 HT_NB_CPU_CTL_H1 Y6 L0_CTLIN_H1 L0_CTLOUT_H1 Y8 HT_CPU_NB_CTL_H1 8

8 HT_NB_CPU_CTL_H0 V2 L0_CTLIN_H0 L0_CTLOUT_H0 V4 HT_CPU_NB_CTL_H0 8

MA_DATA34 AG25 M_A_DQ34 MB_DATA34 AN29 M_B_DQ34

DDR III: CHANNEL B

17 M_A_RAS# AC27 MA_RAS_L 18 M_B_RAS# AF32 MB_RAS_L

17 DDR3_DRAMRST_A# L27 MA_RESET_L 18 DDR3_DRAMRST_B# L32 MB_RESET_L

1DY 2 ACPU1D 1D5V_S3

9,12 CPU_LDT_STOP# 1 R42 2 LDT_STP#_CPU

DBREQ_L DBRDY 2K2R2J-2-GP C33

R100 TPAD14-GP TP16 1 CPU_TEST17_BP3 F8 AH9 CPU_TEST21_SCANEN RN129

1KR2F-3-GP TPAD14-GP TP18 1 CPU_TEST16_BP2 C8 AM7 CPU_TEST20_SCANCLK2 SRN1KJ-7-GP

AH7 AM4 CPU_TEST26_BURNIN_L

AK5 GATE0 ANALOGOUT D7

AG9 HDT Connectors

VCC_CORE VCC_CORE ACPU1H

C39 C46 SCD01U25V2KX-3GP

C55 C56 C57 C53 C54

-1 Change C569 to 22uF.

10U x4 ,.22 x5 , .1ux2 ,.01ux1

C76 C77 C79 C80 C85 C86

Taipei Hsien 221, Taiwan, R.O.C.

HYPER TRANSPORT CPU I/F

4 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 4

4 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 4

4 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 4

23 PCIE_RXP1 AE3 AC1 TXP1 C95 1 2 SCD1U16V2KX-3GP PCIE_TXP1 23

12 ALINK_NBRX_SBTX_P0 AA8 AD7 ALINK_NBTX_SBRX_P0 C99 1 2 SCD1U16V2KX-3GP

SB Add C598 for solve 3D3V_S0

R69 20 CRT_HSYNC A11 B16 LVDS_TXACLK+ 19

SYSREST# D8 C16 C576 C119

C120 C578 A10 C18 SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP

SB Change R71 from bead SC2D2U10V3KX-1GP NB_LDT_STOP# C10 C20

NB_ALLOW _LDTSTOP LDTSTOP# VSSLT5

SBK160808T-221Y-N-GP B10 AD8

1 2 R101 NB_PW RGD

-1 Change R84,R85 to RN137. 243R2F-2-GP SPM_A3 N2 T2

SC1U6D3V2KX-GP C139 C140

ATi-RS880M SIDE PORT(3/4)

R17 M13 N13 Y6

VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31

C168 C170 C171 C172 C173 H9 T15 W11

T10 VDDA18PCIE_8 VDDC_20 U12 W15 VSS24

R10 T14 AC12 AE14

VDDA18PCIE_9 VDDC_21 1D5V_S0 VSS25 VSS1

C177 AE11 H11

AD11 VDD18_MEM2 VDD33_2 H12

PCI EXPRESS INTERFACES

P25 GPP_CLK5P LAD3 H28 LPC_LAD3 29,30

M25 GPP_CLK5N LFRAME# G28 LPC_LFRAME# 29,30 2 1