BiCMOS

What is BiCMOS?

 BiCMOS technology combines Bipolar

and CMOS transistors onto a single
integrated circuit where the advantages
of both can be utilized.
Advantages of CMOS over Bipolar
 Power dissipation
 Noise margin
 Packing density
 The ability to integrate large number of
devices with high yields
Advantages of Bipolar over CMOS
 Switching speed
 Currents drive per unit area
 Noise performance
 Analog capability
 Input/output speed
Advantages of BiCMOS Technology

 Improved speed over CMOS

 Lower power dissipation than Bipolar
 Flexible input/outputs
 High performance analog
 Latch up immunity
 BiCMOS Inverter
 ….
 It consists of two bipolar transistors T1
and T2 with one nMOS transistor T3, and
one pMOS transistor T4, both being
enhancement mode devices.
 The actions of the circuit is straightforward
and may be described as follows:
… BiCMOS Inverter
… BiCMOS Inverter
 Pass Transistor
Unlike bipolar transistors, the isolated nature of
the gate allows MOS transistors to be used as
switches in series with lines carrying logic levels
in a way that is similar to the use of relay
contacts.
 This application of the MOS device is called the
pass transistor and switching logic arrays can be
formed as follows:
… Pass Transistor

Pass transistor AND gate

 … The nMOS Inverter
 The basic inverter circuit requires a transistor
with source connected to ground and a load
resistor of some sort connected from the drain
to the positive supply rail VDD·
 The output is taken from the drain and the
input applied between gate and ground.
… The nMOS Inverter

The nMOS inverter

 Thermal Aspect
 The processes involved in making nMOS and CMOS devices
have differing high temperature sequences.
 The CMOS p-well process, for example, has a high
temperature p-well diffusion process (1100 to 1250°C), the
nMOS process having no such requirement.
 Because of the simplicity, ease of fabrication, and high
density per unit area of nMOS circuits, many of the earlier IC
designs, still in current use, have been fabricated using
nMOS technology and it is likely that nMOS and CMOS
system designs will continue to co-exist for some time to
come.
 Figure of merit
 Figure of merit (FOM):
 It is a quantity used to characterize the performance of
a device, system or method, relative to its alternatives
 is a way of evaluating FETs. For example, when we
consider both their conduction losses and their
switching losses.
 It’s calculated as on-resistance (R(DS)ON) times gate
charge (QG).
 QG is the charge that must be brought to the gate of the
MOSFET to turn it fully ON.
 Design-wise, it’s hard to reduce both at the same time,
which makes their product a good basis for
comparison.
 … figure of merit
…
 Of course, it’s only possible to make that
comparison under a standard set of conditions.
 That means both the gate-source voltage (VGS) that’s
delivering the charge and drain-source voltage (VDS)
that’s being burned up in R(DS). (It also means not
just when the channel is fully on, but while R(DS) is
ramping up and down, too.)
 R(DS)ON varies a little with drain current, so when
comparing switching transistors, the operational
value of ID ought to be specified as well.
Fabrication and size metrics, performance
metrics and system complexity
… Cont.
… Cont.
… Cont.
... Performance metrics
… Cont.
Summary
 Individual assignment (10 Marks)

 Come up with a clearly written document of the

following concepts.
1. Latch up in CMOS and BICMOS latch up
susceptibility.
2. Production of E-beam masks