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0-7%3-64G9-6/CO/$lO. 00 2003IEEE
- 177
the ac terminals of a number of basic six-pulse inverters to the response of protection systems,
cancel harmonic voltage components. Fig. 1 shows an power quality related issues, e.g. voltage fluctuation,
experimental model multi-pulse SSSC, which was used for reflection of voltage variation to adjoining systems and
the investigation presented in this paper. harmonic distortion.
1:43 1:43 1:43 This paper considers the power quality issues.
a) Reactancemode
,-, V w ,-,vsssc. 1
Current Voltage
conaol --+ controlled '
Algorithm SSSC
I Transduca I
b) Cumnt control mode
Fig. 2 Block diagrams of SSSC control systems
Load 3
I
I
I
5.96
6.08
1.90
I
I
0.98
0.94
0.93
I1
to redistribute load flow in meshed transmission systems.
Fig. 2 shows the block diagrams of possible control systems
for a SSSC either operating to represent a reactance (fig. 2a) Transm. b a d 1
line 1
or to hold constant the current in a transmission line (fig. 2b).
VAFUATIONS 3
50.96
>
In order to evaluate the impact of the control mode on 0.94
voltage quality, load flow calculations have been carried out. 0.92
The term voltage quality refers in this section to the effect of
the SSSC on voltage levels and on voltage variation 0.9
following load changes. Bus Bar 1 Bus Bar 2 Bus Bar 3
Fig. 5: Voltage levels at maximum load (c.6 table 4)
Two modes of operation of the SSSC have been considered.
In scheme 1 the SSSC operates in reactance mode @-mode) Variations in load and disturbances due to switching and
where the gain between SSSC voltage and SSSC current is faults in one part of a transmission system may result in
19.78 lo-' pu. This gain causes the current in transmission reflected voltage variation in other parts of the transmission
line 1 to be maintained at the thermal limit with the highest network. The ability of the SSSC to reduce voltage variation
load considered (configuration 3 in table 3). has been analysed.
The second scheme considers the SSSC operating in current The results given in fig. 6, fig. 7 and fig. 8 indicate that the
regulation mode (I-mode) such that the current in line 1 is at distribution systems connected to bus bars 2 and 3 are
subjected to lower voltage variation when the SSSC is
present. Comparison between fig. 6, fig. 7 and fig. 8 also V. ASSESSMENT OF HARMONIC DISTORTION
shows, that when the magnitude of the load changes
increases the I-mode scheme provides a lower voltage An SSSC will always generate some harmonic voltage
variation at bus-bars 2 and 3 than the %-mode scheme. distortion. In order to analyse the distortion a three phase
However systems connected upstream to bus bar 1 are model of the system was implemented on a hardware
subjected to an increased voltage variation if the I-mode simulator. This device uses gapped inductors to represent
control scheme is applied. Moreover fig. 6, fig. 7 and fig. 8 system inductance and capacitors to model line capacitance.
reveal that the reflection of a voltage dip to the supply The SSSC has been implemented as model 24-pulse inverter
transmission system upstream of bus bar 1 is minimised, (fig. 1) and controlled by a digital signal processor in current
when the SSSC operates in reactance mode. Clearly the regulation mode. Bus bar voltage waveforms have been
SSSC has a role to play in reduction of voltage fluctuation if measured under the load conditions given in table 4 and the
the dynamic control is arranged to be sufficiently fast. magnitude of each harmonic voltage component has been
14 derived.
no SSSC Xc mode I mode
12
\ I / The results given in fig. 9 to fig. 11 show the harmonic
voltage spectra as a percentage of the fundamental frequency
component for the SSSC operating in current control mode
only. The I-mode system gives a more pessimistic scenario
than reactance mode.
12 \ I ,
/ 4
g 3.5
. 3
5 2.5
>
P 2 1.5
1
0.5
0
10 15 20 25 30 35 40 45 50
Order N
Fig. 9: Harmonic spectrum of the SSSC voltage as a percentage of the
Bus Bar 1 Bus Bar 2 Bus Bar 3 fundamentalcomponent
Fig. 7: Variation at change 6um max load to low load (c.f. table 4)
Fig. 10 presents the harmonic voltage spectra at bus bar 2 and
bus bar 3 with the system operating under medium load and
14 ~nosssc ~Xcmode ilmode
maximum load (table 4). Although the voltage of the SSSC
12 I operating in current control mode increases from 0.160 pu to
0.181 pu when load 3 is disconnected, the voltage
magnitudes for most of the harmonic components are
reduced (fig. 10).
10 20 30 40 50
Order N
b) V,, medium load (bright) and max.load (dark),c.f. table 4 resonant analysis (cf. fig. 3)
Fig. 10: Harmonic voltage specr” at bus bar 2 and 3
Fig. 13 shows the results of the transfer ratio analysis. It can
be seen that there are two regions, where harmonic voltage
components at the load bus bars exceed the level at the SSSC
terminal. Each load condition is marked in fig. 13 by:
o = m a x i ” load, + = medium load, x = low load
The harmonic voltages in the vicinity of the 24* order are
increased, when loads 1,2 and 3 are connected. The second
highest magnification of the SSSC harmonic voltages close
to the 24* order is caused by the configuration with load 3
switched off and load 1 and 2 switched on. It is clear that
10 20 30 40 50
amplification due to resonauce occurs and that the resonant
Order N
frequency is dependent on load.
a) V,, low load (bright) and max. load (dark), c.f. table 4
Standard harmonic penetration studies consider distortion
sources to be parallel current loads where the link between
harmonic current and system voltage is the self and transfer
admittance values. When a system has a resonant
characteristic the self and transfer nodal admittance values
are dependent on the load but to a lessor degree than the
voltage transfer ratios measures here. It is thus important to
model the loads correctly when considering distortion from
series compensators and the simple representation used here
may not be accurate in all circumstances.