Code No: R059210202 Set No.

1
II B.Tech I Semester Supplimentary Examinations, February 2008
PULSE AND DIGITAL CIRCUITS
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering
and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) Obtain the response of high pass RC circuit for a ramp input wave form.
(b) Explain RC double differentiator circuit. [8+8]

2. (a) Determine Vo for the network shown in fugure 2a for the given waveform
.Assume ideal diodes.

Figure 2a
(b) Explain negative peak clipper with and without reference voltage. [8+8]

3. (a) Sketch neatly the waveforms of current & voltages for a transistor switch with
capacitance loading circuit.
(b) What are catching diodes? [12+4]

4. Explain about the response of Schmitt binary to an arbitrary input signal with
appropriate diagram. [16]

5. (a) How are linearly varying current waveforms generated?

(b) In the boot strap circuit shown in figure5 Vcc = 25 V, VEE = -15 V, R = 10 K
ohms, RB = 150 K ohms, C = 0.05 µF. The gating waveform has a duration
of 300 µs. The transistor parameters are hie = 1.1Kohms, hre = 2.5 x 10−4 K
ohmshf e =50 hoe = 1/40K ohms.
i. Draw the waveform of IC1 and Vo , labeling all current and voltage levels,
ii. What is the slope error of the sweep?
iii. What is the sweep speed and the maximum value of the sweep voltage?
iv. What is the retrace time Tr for C to discharge completely?

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Code No: R059210202 Set No. 1
v. Calculate the recovery time T1 for C1 to recharge completely. [6+10]

Figure 5
6. (a) What is relaxation oscillator? Name some negative resistance devices used as
relaxation oscillators and give its applications.
(b) With the help of a circuit diagram and waveforms, explain the frequency
division by an astable multivibrator? [8+8]

7. (a) With the help of a neat diagram, explain the working of two-diode sampling
gate.
(b) Derive expressions for gain and minimum control voltages of a bi-directional
two- diode sampling gate. [8+8]

8. (a) What are the basic logic gates which perform almost all the operations in
Digital communication systems.
(b) Give some applications of logic gates.
(c) Define a positive and negative logic systems.
(d) Draw a pulse train representing a 11010111 in a synchronous positive logic
digital system. [4+4+4+4]

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Code No: R059210202 Set No. 2
II B.Tech I Semester Supplimentary Examinations, February 2008
PULSE AND DIGITAL CIRCUITS
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering
and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) The limited ramp is applied to an RC differentiator. Draw to scale, the output
wave form for the following cases
i. T=RC,
ii. T=0.4RC,
iii. T=10RC.
(b) Derive the expression for the response of RC low pass circuit to which ramp
input is applied. [12+4]

2. (a) Design a biased positive voltage clamping circuit 2a the input is a symmetrical
square wave of ±10v at 1Khz. The tilt on the output wave form should not
exceed 1% signal source resistance is 500 ohms. Output voltage desired is
±2.7v.

Figure 2a
(b) Explain synchronized clamping circuit. [8+8]

3. (a) Sketch neatly the waveforms of current & voltages for a transistor switch with
capacitance loading circuit.
(b) What are catching diodes? [12+4]

4. Regeneration is possible in the fixed-bias transistor flip-flop if the base-to-base

voltage gain exceeds unity. Verify that this gain condition is satisfied provided that
hfe Rc > R1 . Assume that for each stage the current gain is |AI | = hF E ≫ 1 and
that the input resistance Ri is small compared with either R1 or R2 . [16]

5. (a) Draw and explain the typical waveform of a time-base voltage.

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Code No: R059210202 Set No. 2
(b) Explain the principle of working of exponential sweep circuit with neat circuit
diagram and also derive the equations for slope , transmission and displace-
ment error. [6+10]

6. (a) What do you mean by synchronization ?

(b) What is the condition to be met for pulse synchronization?
(c) Compare sine wave synchronization with pulse synchronization? [4+6+6]

7. (a) Explain the effect of circuit capacitances on the operation of a bi-directional

diode gate.
(b) In the circuit of figure 7 consider that RL=RC=100K ohms and that R2=2 K
ohms, Rf=50 ohms for Vs=25V, compute A, Vnmin, and Vcmin. [8+8]

Figure 7
8. (a) What are the basic logic gates which perform almost all the operations in
Digital communication systems.
(b) Give some applications of logic gates.
(c) Define a positive and negative logic systems.
(d) Draw a pulse train representing a 11010111 in a synchronous positive logic
digital system. [4+4+4+4]

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Code No: R059210202 Set No. 3
II B.Tech I Semester Supplimentary Examinations, February 2008
PULSE AND DIGITAL CIRCUITS
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering
and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Verify V2 = (V/2)(e2x −1)/(e2x +1) = (V/2) tanhx for a symmetrical square
wave applied to a low pass RC circuit.
(b) Derive the expression for percentage tilt(P) of a square wave output of RC
high pass circuit. [8+8]

2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explain
its operation.
(b) What is meant by comparator and explain diode differentiator comparator
operation with the help of ramp input signal is applied. [6+10]

3. Write Short notes on:

(a) Diode switching times

(b) Switching characteristics of transistors
(c) FET as a switch. [4+8+4]

4. Germanium transistors with (hF E )min = 40 are used in the fixed-bias flip-flop
with collector catching diodes(following figure 4). The circuit parameters are
VCC =18V.V=VBB =6V, Rc=1.5K, R1 = 5K and R2 = 25K. Neglect the voltage drop
across a forward-biased junction.

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Code No: R059210202 Set No. 3

Figure 4
(a) Verify that if one transistor is cut off, the other is in saturation. Find the
stable-state voltages and currents, including the currents in the two diodes.
(b) What is the heaviest load the binary can drive and still maintain the output
swing in part a? [16]

5. (a) How are linearly varying current waveforms generated?

(b) In the boot strap circuit shown in figure5 Vcc = 25 V, VEE = -15 V, R = 10 K
ohms, RB = 150 K ohms, C = 0.05 µF. The gating waveform has a duration
of 300 µs. The transistor parameters are hie = 1.1Kohms, hre = 2.5 x 10−4 K
ohmshf e =50 hoe = 1/40K ohms.
i. Draw the waveform of IC1 and Vo , labeling all current and voltage levels,
ii. What is the slope error of the sweep?
iii. What is the sweep speed and the maximum value of the sweep voltage?
iv. What is the retrace time Tr for C to discharge completely?
v. Calculate the recovery time T1 for C1 to recharge completely. [6+10]

2 of 4
Code No: R059210202 Set No. 3

Figure 5
6. (a) Explain with some example how a negative resistance devices used as relax-
ation oscillator which is used for synchronization?
(b) Explain how the symmetrical signals are used to synchronize a sweep circuit?
[8+8]
7. (a) With the help of a neat diagram, explain the working of two-diode sampling
gate.
(b) Derive expressions for gain and minimum control voltages of a bi-directional
two- diode sampling gate. [8+8]
8. (a) Draw and explain the circuit diagram of integrated positive DTL NAND gate
(b) Consider a two input positive logic diode OR and AND gates. Sketch the
output waveform. Shown in figure 8 [8+8]

Figure 8

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Code No: R059210202 Set No. 3
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Code No: R059210202 Set No. 4
II B.Tech I Semester Supplimentary Examinations, February 2008
PULSE AND DIGITAL CIRCUITS
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering
and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,
Where T is the period of an input ‘Em sin ωt’.
(b) What is the ratio of the rise time of the three sections in cascade to the rise
time of Single section of low pass RC circuit. [8+8]

2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explain
its operation.
(b) What is meant by comparator and explain diode differentiator comparator
operation with the help of ramp input signal is applied. [6+10]

3. Write Short notes on:

(a) Diode switching times

(b) Switching characteristics of transistors
(c) FET as a switch. [4+8+4]

4. (a) Consider the symmetrical emitter triggering circuit of the figure 4 with Rc=3Re,
R1 =2R2, and VCC =6V. Indicate all the circuit voltages in the quiescent state
and indicate also the voltages immediately after a 5-V positive step is applied.
Assume that D3 and D4 are always in the breakdown region and that either
D1 or D2 but not both in the breakdown region.
(b) Repeat part (a) for a 25-V step. What limits the maximum size of the input
step? What limits the minimum size of the input step? [16]

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Code No: R059210202 Set No. 4

Figure 4
5. (a) Draw and explain the typical waveform of a time-base voltage.
(b) Explain the principle of working of exponential sweep circuit with neat circuit
diagram and also derive the equations for slope , transmission and displace-
ment error. [6+10]

6. (a) What do you mean by synchronization ?

(b) What is the condition to be met for pulse synchronization?
(c) Compare sine wave synchronization with pulse synchronization? [4+6+6]

7. (a) In the circuit of figure 7 assume that RL = RC = 100K , R2=50K and that
the signal has a peak value of 20V. The total shunting capacitance is 20pF.
Find A, Vc min Vn min , Ri and the 3dB frequency of the gate. Assume diodes
are ideal.
(b) Write the different capacitances which effect on the operation of the sampling
gates. [10+6]

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Code No: R059210202 Set No. 4

Figure 7
8. (a) What are the basic logic gates which perform almost all the operations in
Digital communication systems.
(b) Give some applications of logic gates.
(c) Define a positive and negative logic systems.
(d) Draw a pulse train representing a 11010111 in a synchronous positive logic
digital system. [4+4+4+4]

⋆⋆⋆⋆⋆

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