Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Microelectronics
Design Manual
The following rules are effective for the draft of circuit boards
and hybrid assemblies. The instructions are only valid for
the layout design at Cicor Microelectronics. The rules are not
intended to be exhaustive. All layouts should be designed in a
close collaboration with Cicor Microelectronics.
Data file formats: GDS II, DXF, DWG, Extended GERBER (274-X)
others on request.
Special
These values are achievable by using special materials
and/or special manufacturing equipment and methods. In
any case a request for feasibility at Cicor Microelectronics
is recommended during early development/layout stage.
Special values should only be requested if a solution can’t
be found by using standard values.
Development
In this column named values are mostly custom made
designs. As a developer/project leader please consider
feasibility studies or separate sample manufacturing and
use these parameters only in a tight collaboration with
Cicor Microelectronics in your products and constructions.
We look forward to be your partner for your special
project. The manufacturing technologies will be especially
designed to your requirements and series quantities.
2 I Cicor Microelectronics
A1
Thin Film
F I3 C2 C2 E H
C1 G1
E G2
I1 I2 E
C4 C3
HR F
K2
D T HR
K1 N3
N4
C5
A2
P
K2 N5
E N2 D C1 P
N1 N1 L1
B B M1
M2 T
O1
B M3
O2
O4
O5 L3 L4
O3 M2
Please note:
The drawing is a summary of all elements from thick film and thin film. Because
of this the selected design rules table below does not include all elements of the
drawing. Details for Resistors and Polyimid (Capacitors, Multilayer, Bridges etc.)
please see separate table in chapter Thin Film metallisation.
Rigid substrates
• Design Rules
• Metallisation
• Substrate materials
Flexible substrates
• Design Rules
• Metallisation
• Substrate materials
Cicor Microelectronics I 3
+ 0.100 /
Substrate thickness: ≤ 0.381 mm
- 0.025 mm
+ 0.150 /
Substrate thickness: ≤ 0.635 mm
- 0.050 mm
+ 0.200 /
Substrate thickness: ≤ 1.270 mm
- 0.050 mm
C3 Tolerance hole true centre to another hole true centre ± 0.05 mm ± 0.03 mm
D Metallisation ring (rim) around a drilled hole on top and bottom ≥ 0.100 mm ≥ 0.070 mm x (0 – 0.05 mm)
Distance conductor to substrate edge:
Separation by scribing and breaking ≥ 0.200 mm ≥ 0.100 mm
E
Separation by sawing / dicing ≥ 0.100 mm ≥ 0.050 mm ≥ 0.010 mm
Distance conductor parallel to substrate edge or cut-out edge ≥ 0.200 mm ≥ 0.150 mm
F Distance conductor orthogonal to substrate edge or cut-out edge ≥ 0.150 mm ≥ 0.100 mm ≥ 0.050 mm
Conductor Line & Space: *
Cu conductor width, Cu thickness 3 - 6 µm 0.050 mm 0.030 mm 0.020 mm
± 0.003 mm /
Tolerance conductor width: Cu thickness up to 3 µm / 10 µm ± 0.005 mm / 0.007 mm
0.005 mm
G1/G2
Au conductor width, Au thickness up to 3 µm* 0.040 mm 0.025 mm 0.010 mm
± 0.003 mm / ± 0.002 mm /
Tolerance conductor width: Au thickness up to 3 µm / 10 µm 0.005 mm
0.005 mm 0.004 mm
Resistors and adhesive layer, with tolerance of ± 3 µm 0.040 mm 0.015 mm
H Alignment tolerance conductor to laser fiducial ± 0.030 mm ± 0.020 mm
Alignment tolerance top to bottom patterning ± 0.060 mm ± 0.030 mm
HR Alignment tolerance resistors to conductor ± 0.020 mm ± 0.010 mm x
Cut-outs (parallel to substrate edge)
I1/I2 ≥ 0.200 mm ≥ 0.150 mm
Dimensions (measured at laser exit, laser entrance + 7 ... 10%) x
x 0.200 mm x 0.150 mm
4 I Cicor Microelectronics
Thin Film
Distance cut-out to substrate edge or another cut-out edge ≥ Substrate thickness
I3 Alignment tolerance cut-out to substrate edge cut or sawn ± 0.050 mm ± 0.03 mm
Alignment tolerance cut-out substrate edge scribed/broken** + 0.250 / - 0.100 mm
Cavity (parallel to substrate edge)
≥ 0.500 mm x
I1/I2 Dimension (related to cavity base) ≥ 1.000 mm x 1.000 mm x
0.500 mm
K1 Wire bonding pad: Parallel to wedge wire bonding direction ≥ 0.250 mm x 0.050 mm x
Cicor Microelectronics I 5
Au wire bonding
Al wire bonding
Adhesive layer
Barrier layer
Barrier layer
Solder stop
Resistor
Surface
Gluing
(TaN)*** TiW (50nm) Au (1.5 … 10µm)** Polymer, TiW x x x
(TaN)*** TiW (50nm) Pd (100–250nm) Au (1.5µm) Polymer, TiW x* x x
Polymer,
(TaN)*** TiW (50nm) Au (1.5 … 10µm)** Ni (1.5 … 5µm) Au (0.1 … 0.2µm) x x x x
TiW; CrNi
Polymer,
(TaN)*** TiW (50nm) Au (1.5 … 10µm)** Ni (1.5 … 5µm) Au (0.9 … 1.2µm) x x x x
TiW; CrNi
Au Polymer,
(TaN)*** TiW (50nm) Au (1.5 … 10µm)** NiP(2 … 5µm) x x x x
(0.05 … 0.1µm) TiW; CrNi
TiW (50nm) Pt(25nm … 800nm) x
TiW (50nm) Pt (200nm )**** Au (0.2µm) X X X
(CrNi)*** TiW (50nm) Au (1.5 … 10µm)** Polymer, TiW x x x
Au solder pads (0.05 … 0.1µm)
(CrNi)*** TiW (50nm) Pd (100 … 600nm) Polymer, TiW x* x x
and Au wire bonding pads (5µm) selective
(CrNi)*** CrNi (50nm) Cu (3 … 100µm) Ni (1.5 … 5µm) Au (0.1 … 0.2µm) Polymer, TiW x x x
Polymer,
(CrNi)*** CrNi (50nm) Cu (3 … 100µm) Ni (1.5 … 5µm) Au (0.7 … 1.2µm) x x x x
NiO, TiW
Polymer,
(CrNi)*** CrNi (50nm) Cu (3 … 100µm) Ni (1.5 … 5µm) Au (1.2 … 1.5µm) x x x
NiO, TiW
Au (0.05 …
CrNi (50nm) Cu (3 … 100µm) NiP(2 … 5µm) Polymer x x x x
0.1µm)
Au (1.5 …
(TaN)*** TiW (50nm) Au (1.5 … 10µm)** Polyimid (3..5µm) Ni-Versionen Au version x x x
10µm)**
6 I Cicor Microelectronics
Resistors
Thin Film
TaN High stable TCR: - 90 ppm / K ± 40 ppm / K Tracking: < 5 ppm / K
Conductive track width at resistor overlapping zone RÜB TaN-R: Double-side over RB each ≥ 0.020 mm; CrNi-R at Cu layer: 0 µm; CrNi-R at Au layer: 50 µm
Laser trimming: Geometry / dimensions RW: ≥ 0.100 mm Resistance 70% of final value
Pad dimension for measurements and laser trimming ≥ 0.300 mm As „Special“: min. ≥ 0.250 mm
Tolerance after laser trimming Standard: 1% Special: ≥ 0.1% Development: ≤ 0.1 %, depending on resistor geometry
≤ 150 mW / mm²
Heat dissipation / power loss Depending on ceramic material, geometry and surrounding
(at ~ 130°C, on Al²O³)
≥ 0.050 mm x 0.050 mm
Vias in polyimide ≥ 0.100 mm x 0.100 mm / standard for multilayer
/ special
≥ 0.100 mm /
L3 Overlapping of polyimide on capacitor plate ≥ 0.050 mm / special
standard
Used for: Solder stop, glue
≥ 0.100 mm / stop, conductive track cross
L4 Distance pads for capacity measurement to capacitor plate ≥ 0.050 mm / special
standard over, multilayer, bridges,
capacitors
≥ 0.400 mm
T Pad dimension for capacity measurement ≥ 0.300 mm x 0.300 mm
x 0.400 mm
Cicor Microelectronics I 7
Sapphire
CIcor_Design_Manual_ME.indd 8
Ceramic material
Zircon substrate
Microwave ferrite
Aluminium oxide
Aluminium oxide
Aluminium oxide
8 I Cicor Microelectronics
Materials
0.0009 0.0005 0.000015 0.001 0.0001 0.0002 0.001 0.001 0.001 0.0001 0.0001 0.0001 0.0001 Loss Tangent [tan @ 1MHz]
Thermal Conductivity
1 27 1.46 1.46 42 4.2 170 – 190 170 – 190 170 – 190 35 35 35 35
[W / mK @ 25 °C]
Coefficient of linear Thermal
4.5 8 0.6 0.6 5 8.6 4.6 4.6 4.6 6.3 7 7 7
Expansion CTE [ppm / K]
2.72 4.07 2.20 2.20 3.97 3.80 3.30 3.30 3.30 3.95 3.88 3.88 3.88 Density [g / cm³]
*** Dielectric materials and other ceramics in compliance with customer request
50 ...
30 ... 130 5 ... 20 13 100 ≤ 600 ≤ 600 ≤ 26 5 .. 20 5 .. 20 50 ... 100 Surface finish typical Ra [nm]
1000
x x x x 0.127 mm
0.2 x x 0.178 mm
0.3 x x x x x x x x x x x 0.254 mm
0.4 x x x x x x x x x 0.381 mm
0.7 x x x x x x x 0.635 mm
x x x x x x x 1.016 mm
x x x x x x x 1.270 mm
x x x x x x x Cavity
Processing
x x x x x x x Laser scribing
x x x x x x x x x x x x x x x Sawing/Dicing
20.12.12 09:03
Thin Film – Flexible substrates
Design rules
A1
Thin Film
F I3 C2 C2 E H
C1 G1
E G2
I1 I2 E
C4 C3
HR F
K2
D T HR
K1 N3
N4
C5
A2
P
K2 N5
E N2 D C1 P
N1 N1 L1
B B M1
M2 T
O1
B M3
O2
O4
O5 L3 L4
O3 M2
x on request
* depending on metallisation material, thickness, location and frequency of occurance of conductive tracks as well as surface quality of substrate
** what ever is larger
Cicor Microelectronics I 9
Material data
Max. allowable
Product Material Processing Modes Thickness Range
Temperature
Free-standing or
Kapton Polyimide Min: 12.5 µm, typ. 50 µm 400ºC
laminated to rigid holder
Free-standing or laminated
LCP Aromatic Polyester Polymer Typ: 50 µm and 100 µm < 300 ºC
to rigid holder
10 I Cicor Microelectronics
Thin Film
Materials and Properties Dimensions and Tolerances
Conductor Au Length (min.) 60 µ
Support Polyimide Width (min.) 35 µ
Coupler line (min.) 20 µm Height ~ polyimide thickness
Coupler space (min.) 20 µm Thickness 5–10 µm
Polyimide thickness 3–5 µm
Air Bridges
Materials and Properties Dimensions and Tolerances
Conductor Au Aspect Ratio L:W (max) 6:1 (unsupported area)
Coupler line (min.) 25 µm Width (min.) 25 µm
Coupler space (min.) 25 µm Length (min.) 75 µm
Height (maximum) 5–10 µm Thickness 8 µm ± 30%
Filled vias – for better thermal and electical conductivity front to backside
Materials and Properties Dimensions and Tolerances
Substrate Alumina AI2O –99,6%, ALN
3
Surface Finish Lapped, Ra < 0.6 µm
Thickness 0.010" and 0.015" Via diameter 150–200 µm
Conductive Layer Barrier Layer ± Au elp 5 + 1.5 µm Metallization ring around Via hole diameter + 100 µm
Resistive Layer NiCr or Ta2N, 50 Ohm/sq. typical Via to via pitch Via diameter + 100 µm
Fill Material Solid Cu
Via electrical resistance n/a
Cicor Microelectronics I 11
Evaporated solder bumps (AuSn or Sn) – for flux free soldering in optoelectronics
Materials and Properties Dimensions and Tolerances
Eutectic solder Au (80%) + Sn (20%) AuSn deposited thickness 5.2 µm ± 25%
Soldering temperature 300–320 °C Bump height (reflowed) 10–40 µm ±30%
Solder Sn Pad size (diameter) 40–100 µm ± 5 µm
Soldering temperature 240 °C Pitch (min.) 80 µm
Evaporated solder pads (AuSn or Sn) – for flux free soldering in optoelectronics
Materials and Properties Dimensions and Tolerances
Eutectic solder Au (80%) + Sn (20%) AuSn deposited thickness 5.2 µm ± 25%
Soldering temperature 300–320 °C Pad size tolerance ± 5 µm
Solder Sn Pad size (min.) 20 µm
Soldering temperature 240 °C Pitch (min.) 40 µm
Laser reflowed solder bumps (SnPb) – for flip chip soldering in microelectronics
Materials and Properties Dimensions and Tolerances
Eutectic solder Sn (63%) + Pb (37%) Pad size (diameter) min. 50/up to 500 µm
Soldering temperature 220–240 °C Bump height (reflowed) min. 95/up to 680 µm
Underbump metallisation UBM suitable for soldering Pitch (min.) 200/up to 1000 µm
12 I Cicor Microelectronics
A1
F I3 C2 C2 E H
C1 G1
E G2
I1 I2 E
C4 C3
HR F
K2
D T HR
K1 N3
N4
C5
A2
P
K2 N5
E N2 D C1 P
N1 N1 L1
B B M1
M2 T
O1
B M3
O2
Thick Film
O4
O5 L3 L4
O3 M2
Please note:
The drawing is a summary of all elements from thick film and thin film. Because
of this the selected design rule table below does not include all elements of the
drawing.
Cicor Microelectronics I 13
≤ 146.4
A1/A2 Tile dimension: 6.5“ x 4.5“, usable area: x x
x 108.3 mm²
Separation by laser scribing and breaking ≥ 3.0 x 3.0 mm² ≥ 2.0 x 1.5 mm²
+ 0.150 /
Substrate thickness: ≥ 0.254 mm
- 0.050 mm
+ 0.200 /
Substrate thickness: ≥ 0.635 mm
- 0.050 mm
C1 Drilled hole for PTH: Ø (valid for 10-25 mil substrate thickness)* 0.150 mm x
≥ Substrate
C2 Distance hole circumference to substrate edge or cut-out
thickness
C4 Tolerance hole true center to another hole true center ≤ ± 0.050 mm ≤ ± 0.035 mm
D Metallisation ring (rim) PTH around a drilled hole on top and bottom ≥ 0.250 mm ≥ 0.200 mm
≥ 0.080 mm
G1 Conductor width, monolayer Au screen printed (etched) ≥ 0.150 mm
(≥ 0.040 mm)
≥ 0.080 mm
G2 Space between two conductors in Au screen printed (etched) ≥ 0.200 mm
(≥ 0.040 mm)
14 I Cicor Microelectronics
+ 0.250 /
Alignment tolerance cut-out to substrate edge scribed/broken***
- 0.100 mm
≥ 1.000 mm ≥ 0.500 mm
Dimensions (related to cavity base) x
x 1.000 mm x 0.500 mm
I1/I2
Remaining substrate thickness in cavity/cavity base ≥ 0.130 mm x (≥ 0.100 mm)
≥ Substrate
Distance cavity edge to substrate edge
thickness
I3
≤ ± 0.250
Tolerance cavity to substrate edge ± 0.030 mm
... ≥ ± 0.050 mm
Thick Film
M1 ***** Distance between solder pads ≥ 0.500 mm ≥ 0.250 mm ≤ 0.250 mm
N4 Via opening in insulation (sq or Ø) ≥ 0.6 x 0.6 mm² ≥ 0.4 x 0.4 mm²
N5 Via pad dimension conductor/filling (sq or Ø) ≥ 0.4 x 0.4 mm² ≥ 0.35 x 0.35 mm²
Pad dimension for electrical measurements and laser trimming of ≥ 0.500 mm ≥ 0.300 mm < 0.300 mm
T
resistors x 0.500 mm x 0.300 mm x 0.300 mm
x on request
* measured at laser exit, laser exit larger than entry, 7 ... 10 % of ceramic thickness larger on each edge
***** Solder pads in high density packages need special dimensions – request in any case at Cicor Microelectronics
Cicor Microelectronics I 15
Microwave-
96 % (Al²O³)
CIcor_Design_Manual_ME.indd 16
ceramics (AIN)
oxide ceramics
Aluminum nitride
16 I Cicor Microelectronics
as fired as fired Composition
180 –
26 Thermal Conductivity [W/mK @ 25 °C]
190
Thick Film materials
x
x
0.254 mm
x
x
0.381 mm
x
x
0.635 mm
Thickness **
x
x
1.016 mm
x
x
1.270 mm
x
x
x
Laser drilling
x
x
Laser cutting
x
x
Cavity
Processing
x
x
Laser scribing
x
x
x
Sawing
20.12.12 09:03
Conducturs:
CIcor_Design_Manual_ME.indd 17
AgPd Al²O³ 12 – 16 < 32 150 x x 850
AgPd AIN 13 – 15 < 25 150 x x 850
AgPt Al²O³ 13 – 19 < 2.5 150 x x 850
AgPt AIN 9 – 11 < 65 150 x x 850
Ag Al²O³ 14 – 18 1–2 150 – 200 x x 850
Ag AIN 9 – 11 <3 125 x x 850
Au Al²O³ 7–9 < 6.5 175 x x x 850
Au AIN 8 – 12 <6 100 x (x) Au only x 850
AuPt Al²O³ 13 – 17 60 – 100 150 x x 850
Polymer Au Al²O³ 25 – 30 < 100 250 x 125
Thick Film paste materials
Resistors:
Cicor Microelectronics I 17
Thick Film
20.12.12 09:03
18 I Cicor Microelectronics
SMD Assembly
Pass. SMT components dimension min. for automatic assembly 0402 0201 01005
Pass. SMT components dimension min. for manual assembly 0402 < 0 201
Board dimension max. 250 x 250 mm²
Placement accuracy +/- 50 µm +/- 30 µm < +/- 30 µm
Technological frame on tile for pick and place automat 10 mm 3 mm
Lead-out, leaded or leadless
Contact pitch min. 0.8 mm 0.6 mm
Die Attach wire bonded dies
Die dimension, edge length min. 0.5 mm 0.25 mm 0.1 mm
Die dimension, edge length max. 30 mm 40 mm 80 mm
Die thickness min. 0.3 mm 0.08 mm < 0.08 mm
Distance die to other glued components ≥ 0.2 mm ≥ 0.1 mm ≥ 0.05 mm
Distance die to other soldered components (SMT) ≥ 1 mm ≥ 0.5 mm
Board dimension max. 150 x 150 mm² 250 x 250 mm²
Placement accuracy +/- 30 µm +/- 20 µm <+/- 20 µm
Die Attach flip chip
Die dimension, edge length min. 0.5 mm 0.25 mm 0.15 mm
Die dimension, edge length max. 5 mm 10 mm > 10 mm
Pad Size 150 µm 80 µm
Pad pitch 200 µm 120 µm
Bump pitch min. 250 µm 150 µm 100 µm
Bump quantity ≤ 100 ≤ 400 > 400
Assembly / Packaging
Wire Bonding, ultrasonic, thermosonic, wedge-wedge, ball-wedge
Wire diameter Au min. 25 µm 17.5 µm
Wire diameter Au max. 50 (BW) 75 µm
Wire diameter Al min. 25 µm
Wire diameter Al max. 300 µm 500 µm
Wire diameter Pt 12.5 µm
Die bond pad min. 80 x 80 µm² 50 x 50 µm² < 50 x 50 µm²
Pad Pitch 100 µm 50 µm < 40 µm
Bonding bridge length min. (in one height level), depending on wire diameter 500 µm 300 µm < 300 µm
Bonding bridge length max. (in one height level), depending on wire diameter 5 mm 10 mm > 10 mm
Ribbon Bonding, thermosonic
60 x 20 µm²
Ribbon Au diameter
120 x 20 µm²
Parallel Seam Sealing
Package dimension min. 3 x 3 x 3 mm³
135 x 50 x 30
Package dimension max.
mm³
Fine leak test volume max. 16 cm³
End Capsulation
Beam Lead Bonding available
Gap Welding available
Cicor Microelectronics I 19
Bonding wires
Wire material Diameter µm Elongation % Hardness Breaking load cN
Al-R 300 > 10 450 – 650
AlSi1% 25 >1 11 – 14
AlSi1% 30 >1 16 – 21
Au 17.5 2–5 HA6 >5
Au 17.5 4–8 HD2 >1.5
Au 20 2–5 HD5 >5
Au 25 4–7 HD1 >7
Au 25 2–6 HD5 >9
Au 30 2–6 HD2 12 – 16
Au 50 3 – 10 HD3 > 34
Pt 13.3 > 0.2 800 – 1000
Solder material
Material Melting point °C
Liquidus Solidus
Snln52 131 118
SnBi58 138 138
InPb30 175 165
Sn62Pb36Ag2 179 179
SnAg3.8Cu0.7 220 217
SnAg3.5 221 221
AuSn20 280 280
PbSn5Ag2.5 296 287
PbSn5Ag2 280 278
20 I Cicor Microelectronics
Cu 8.9 17 400
Al²O³ 3.9 7 25
others available
Assembly / Packaging
Cicor Microelectronics I 21
Board assembly
Different parts and components: standard SMT (0201), THT, μBGA/BGA, QFP, CSP, com-
ponents for microwave applications, RF connectors, LED’s, photodiodes, laser diodes,
crystals, active and passive optical components
Automatic and manual Die-Attach: COB for Bare Dies/ASIC’s, wire bonding, Flip-Chip,
MIC/MMIC’s processing from wafer or waffle pack
Soldering processes: with flux, with Pb, RoHS compliant, special solder; fluxless soldering in
vacuum optional with positioning control and with formic acid, inert gas, hydrogen;
rework services for soldered SMT components like BGA or QFP
Gluing processes: high accuracy automatically dispense, stamp print; thermal/
electrical glue or adhesive foil
22 I Cicor Microelectronics
Burn-in - 20 °C +125 °C
- 60 °C +150 °C
Temperature / humidity storage
15 % relative humidity 95 % relative humidity
Leak test Device for Gross and Fineleak test Fineleak test: 10-8 mbar x I x s-¹
Screening / Test
Cicor Microelectronics I 23
Cicor –
the dynamic, high-growth technology group
Cicor worldwide
Cicor is a globally active group of leading companies in the electronics
industry. It is organized into four divisions: Printed Circuit Boards (PCB),
Microelectronics (ME), Electronic Solutions (ES) and Asia. The group’s
companies provide complete outsourcing services and abroad range of tech-
nologies for the manufacture of highly complex PCBs, 3D-MID solutions,
hybrids and electronic modules. With around 1300 employees at 11 pro-
duction sites and representative offices worldwide, the group supplies high-
quality custom-made solutions to its clients in Europe, America and Asia.
RHe Microsystems GmbH Reinhardt Microtech GmbH Reinhardt Microtech AG Cicor Asia Pte Ltd. Cicor Management AG
Heidestrasse 70 Sedanstrasse 14 Aeulistrasse 10 45 Changi South Avenue 2 Leutschenbachstrasse 95
01454 Radeberg 89077 Ulm 7323 Wangs #04-01 Singapore 486133 8050 Zürich
Germany Germany Switzerland Switzerland
Phone +49 3528 4199-0 Phone +49 7319 8588-413 Phone +41 81 720 04 56 Phone +65 6546 16 60 Phone +41 43 811 44 05
Fax +49 3528 4199-99 Fax +49 7319 8588-411 Fax +41 81 720 04 50 Fax +65 6546 65 76 Fax +41 43 811 44 09
info-me@cicor.com info-me@cicor.com info-me@cicor.com info-asia@cicor.com info@cicor.com
www.cicor.com