Module 3: Analysis Techniques

Topic 1: Lattice Diagrams

OGI EE564
Howard Heck

© H. Heck 2008 Section 3.1 1

 Where Are We?
EE 564

1. Introduction
2. Transmission Line Basics
3. Analysis Tools
1. Lattice Diagrams
2. Bergeron Diagrams
4. Metrics & Methodology
Lattice Diagrams

5. Advanced Transmission Lines

6. Multi-Gb/s Signaling
7. Special Topics

© H. Heck 2008 Section 3.1 2

 Contents
EE 564

 Lattice Diagram Construction

 Axes
 Wave vectors
 Voltages & Currents
 Example
 Circuit
Lattice Diagrams

 Lattice Diagram
 Waveforms
 Summary
 References

© H. Heck 2008 Section 3.1 3

 Construction #1
EE 564

 The lattice diagram is a tool for keeping track of the

voltage & current waves as they travel back & forth
along the transmission line:
 The time axis runs down the page & is usually expressed in
terms of the propagation delay (td) of the transmission line.
 The z- (distance) axis runs across the page and extends
from the source to the farthest load.
 For convenience, the reflection coefficients at each
Lattice Diagrams

discontinuity are often placed at the top of the diagram.

0 l
r= r =
z 
0
td

 2t d
3t d
4t d

t
© H. Heck 2008 Section 3.1 4
 Construction #2
EE 564

 To show the propagation of the signal:

 Use a “vector” to show the travel of the signal along the line.
 Use the initial wave and the reflection coefficients to
calculate the voltage amplitude for each successive reflected
wave
 Do the same for current. 0 l
z
r= r=

V(z=0) I(z=0) V(z=l) I(z=l)

V0
0
Lattice Diagrams

I0
td V1
I1
2td V2

3td
I2 V3

4td V4 I3

5td I4 V5

6td V6 I5

7td
I6 V1
8td V8 I7

9td
I8 V1

10td V10 I9

11td
I10 V
11

12td
I11

© H. Heck 2008 Section 3.1 5

 Construction #3
EE 564

 Track the signals at the discontinuities:

 Recall from superposition that the total signal (V or I) at any
point on the network at a given time is the sum of all waves
that have reached that point since the last signal transition
(t=0).
0 l
z
r= r=

V(z=0) I(z=0) V(z=l) I(z=l)

 We can now construct the V0- I0- V0
0
voltage and current
Lattice Diagrams

V0 I0 I0 V0- I0-
td V1
waveforms. 2td V2 I1 V0+V1 I0-I1

V0+V1 I0-I1 I2
3td +V2 +I2 V3
I3 V0+V1 I0-I1
4td V4 +V2+V3 +I2-I3
I4
5td
etc. V5

6td V6
I6
I5
etc.
7td V1
8td V8 I7

9td
I8 V1

10td V10 I9

11td
I10 V
11

12td
I11

© H. Heck 2008 Section 3.1 6

 Example Circuit
EE 564

z=l
RS = 25

, tD =Z30 =ns50
Z0 = 50
Analyze the
low-high

z=0
VS = 5.0V
RL= 100
transition

RL  Z 0 100  50
 Reflection coefficients: rV l     0.333  r I l 
RL  Z 0 100  50
Lattice Diagrams

RS  Z 0 25  50
rV 0    0.333  r I 0
RS  Z 0 25  50

  Z0  50
 Initial wave: V 0,0    VS   
5V   3.333V
 0
Z  R S   50  25 

 V 0,0  3.333V
I 0,0     66.7 mA
Z0 50
 Final value:   RL 
VS  
100 
V 0,     5V   4.000V
 RL  RS   100  25 

 V 0,   5.000V
I 0,      40mA
RL  RS 125

© H. Heck 2008 Section 3.1 7

 Example Lattice
I
R = 25 

z=l
S
Z = 50  , t = 3 ns
0 D
EE 564

z=0
V = 5.0V
S
R = 100 
T
0 l
z
r(z=0) = -1/3 r(z=l) = 1/3

V(z=0) I(z=0) V(z=l) I(z=l)

0.000V 0.00mA 3.333V

0
66.7mA
0.000V 0.00mA
td 3.333V 66.7mA 1.111V
22.2mA
2t d -0.370V 4.444V 44.5mA

-7.41mA
3t d 4.074V 37.1mA -0.123V
Lattice Diagrams

-2.47mA
4t d 0.041V 3.951V 39.6mA
0.82mA
5t d 3.992V 40.4mA 0.013V
0.27mA
6t d -0.005V 4.005V 40.1mA
-0.09mA
7t d 4.000V 40.0mA -0.002V
-0.03mA
8t d <0.001V 4.002V 40.0mA
<0.01mA
9t d 4.000V 40.0mA

10t d

© H. Heck 2008 Section 3.1 8

 Example Waveforms
EE 564

5.0
V(z=0)
4.5
V(z=l)
4.0
voltage [V]

3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0 1 2 3 4 5 6
Lattice Diagrams

time [td]
70
I(z=0)
60
I(z=l)
50

current [mA] 40

30

20

10

0
0 1 2 3 4 5 6
time [td]

© H. Heck 2008 Section 3.1 9

 Summary
EE 564

 Lattice diagrams provide a useful tool for

analyzing the voltage and current at points
along the interconnect circuit as a function of
time.
 They track voltage and current wave components,
and reflections at discontinuities.
Lattice Diagrams

 The voltage and current waveforms can be

easily constructed from the lattice diagrams.
 Lattice diagrams are of limited use for
complex topologies.

© H. Heck 2008 Section 3.1 10

 References
EE 564

 S. Hall, G. Hall, and J. McCall, High Speed Digital System

Design, John Wiley & Sons, Inc. (Wiley Interscience), 2000,
1st edition.
 R. Poon, Computer Circuits Electrical Design, Prentice
Hall, 1st edition, 1995.
 H. Johnson and M. Graham, High Speed Digital Design: A
Handbook of Black Magic, PTR Prentice Hall, 1993.
 “Line Driving and System Design,” National Semiconductor
Application Note AN-991, April 1995.
Lattice Diagrams

 K.M. True, “Data Transmission Lines and Their

Characteristics,” National Semiconductor Application Note
AN-806, February 1996.
 “Transmission Line Effects in PCB Applications,” Motorola
Application Note AN1051, 1990.
 W.R. Blood, MECL System Design Handbook, Motorola,
Inc., 4th edition, 1988.

© H. Heck 2008 Section 3.1 11