Basic Electronics Lab Manual 14022017 081902AM

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_____________________Enrollment No.____________
Branch Bachelor of Engineering in EC / CE / EE of
Semester 2nd has satisfactorily completed the course in
the subject Basic Electronics (2110016) in this institute.
Submission Date: ______________
Staff In-Charge Head of Dept.

B.E. - EC / CE / EE
Semester: 2nd
Basic Electronics (2110016) .
List of Experiments.
Sr. Page Completion

Experiment / Tutorial Title Grade Signature
No. No. Date
To observe various waveforms on the C.R.O. and
1. to measure amplitude and frequency of the
waveforms.
To Perform Thevenin’s Theorem and Norton’s
2.
Theorem.
To study the Basic Logic Gates which are used in
3.
Digital Circuits.
To configuring NAND and NOR gate as universal
4.
gate
5. To Configuring S-R, D, J-K and T Flip Flop
To study the operation of basic binary Adder and
6.
Subtractor circuits.
Introduction to Operational Amplifier and study
7.
its parameters.
To study and perform OP – AMP as an Inverting
8.
Amplifier and Non-inverting Amplifier.
To Simulate Amplitude Modulation and
9. Demodulation signal processing functions using
Simulink.
Simulate RC & RL circuits using circuit simulator
10. and compare the simulated response with that of
the actual circuit.
DARSHAN INSTITUTE OF ENGINEERING & TECHNOLOGY
BASIC ELECTRONICS (2110016)
Branch : EC, CE, EE Semester : 2nd
Experiment:-1: To observe various waveforms on the C.R.O. and to measure
amplitude and frequency of the waveforms.
AIM: To observe various waveforms on the C.R.O. and to measure amplitude and frequency of
the waveforms.
APPARATUS:
1. C.R.O.
2. Function generator
3. C.R.O. probes
THEORY:
C.R.O. (Cathode Ray Oscilloscope) is the instrument which is used to observe signal
waveforms. Signals are displayed in time domain i.e. variation in amplitude of the signal with
respect to time is plotted on the CRO screen. X-axis represents time and Y-axis represents
amplitude. It is used to measure amplitude, frequency and phase of the waveforms. It is also used
to observe shape of the waveform. C.R.O. is useful for troubleshooting purpose. It helps us to find
out gain of amplifier, test oscillator circuits. We can measure amplitude and frequency of the
waveforms at the different test points in our circuit. Thus, it helps us for fault finding procedure.
In dual channel C.R.O. X-Y mode is available which is used to create Lissajous patterns
Latest digital storage oscilloscope display voltage and frequency directly on the LCD and
does not require any calculations. It can also store waveform for further analysis. In this practical,
we will measure amplitude and frequency of the different waveforms like sine wave, square wave,
triangular wave and ramp wave.
PROCEDURE:
1. Connect function generator output at the input of C.R.O. at channel 1 or at channel 2.

2. Select proper channel i.e. if signal is connected to channel 1 select CH1 and if signal is
connected to channel 2 select CH2.
3. Adjust Time /Div. knob to get sufficient time period displacement of the wave on the CRO
screen.
4. With fine tuning of time/Div. make the waveform steady on screen.
5. Use triggering controls if waveform is not stable.
6. Keep volt/div knob such that waveform is visible on the screen without clipping.
7. Measure P-P reading along y-axis. This reading multiplied with volt/div gives peak to peak
amplitude of the ac i/p wave.
8. Measure horizontal division of one complete cycle. This division multiplied by time/div gives
time period of the i/p wave.
9. Calculate frequency using formula f = 1/T.
10. Note down your readings in the observation table.
11. Draw the waveform on graph paper.
1
OBSERVATION TABLE:
Vertical Volt/div Amplitude Horizontal Time/div Time

Freq.
Function Division (b) (p-p) Division (d) T = c*d
f = 1/T
(a) V=a*b (c)
Sine Wave
Square
Wave
Triangular
Wave
Ramp
Wave
CONCLUSION:
2
Answer the following question:

1) Unit of deflection sensitivity of CRO is__________.
a) V/mm b) meter/volt c) mm/mvolt d) mm/volt
2) A CRO can be used to measure_________.

a) a.c. voltage only b) d.c. voltage only
c) Frequency d) any of above
3) Input impedance of CRO is__________.

a) Zero b) around 100 ohms
c) Around 1000 ohms d) around one mega ohms
4) The cathode of CRO is usually coated with__________.

a) alkali metals b) tungsten or thorium oxide
c) Copper oxide d) barium or strontium oxide
5) A function generator is a______________.

a) Rotating device b) static electronic device
c) Rotating electronic device d) electro-mechanical device
________ _______________________
GRADE SIGNATURE OF STAFF
3
Experiment:-2: To Perform Thevenin’s Theorem and Norton’s Theorem.
AIM: To Perform Thevenin’s Theorem and Norton’s Theorem.
APPARATUS:
1. Trainer Kit.
2. Connecting wires.
3. Power supply.
THEORY:
 Thevenin Theorem:-
Statement:
Thevenin’s theorem states that any network having a number of energy sources and
resistances, when viewed form open its output terminal A and B and can be replaced by simple
equivalent network consisting of a single equivalent voltage source ( ) in series with a single
equivalent resistance ( ).
Thevenin Equivalent Circuit
Where,
VTH = Thevenin’s equivalent voltage source
= Open circuit voltage across AB terminals
RTH = Thevenin’s equivalent resistance
= Equivalent resistance across AB terminals when all the sources set to zero.
 Norton’s Equivalent Circuit:-
Statement:
Norton’s theorem states that any network having a number of energy sources and resistances,
when viewed form open its output terminal A and B and can be replaced by simple equivalent
network consisting of a single equivalent current source ( ) in parallel with a single
equivalent resistance ( ).
4
Norton equivalent circuit
Where,
IN or ISC = Norton’s equivalent voltage source
= The value of current source is equal to the current passing through the short circuit
applied at the open output terminal P and Q.
Req = Equivalent resistance across PQ terminals when all the sources set to zero.
CIRCUIT DIAGRAM:
PROCEDURE:
 Thevenin’s Theorem
1. Connect the circuit as per the diagram with passive element only. (i.e. all voltage short
circuited and current source open circuited)
2. Measure Thevenin’s resistance RTH.
3. Connect the circuit as per the diagram with open circuit at load terminal.(i.e. all active and
passive element present in the circuit)
4. Measure Thevenin’s voltage VTH.
5. Calculate current flowing in load resistance with use of VTH and RTH.
6. Switch off the circuit.
7. Compare the reading and derive conclusion.
5
 Norton’s Theorem
1. Connect the circuit as per the diagram with passive element only. (i.e. all voltage short
circuited and current source open circuited)
2. Measure Norton’s resistance RN.
3. Connect the circuit as per the diagram with short circuit at load terminal.(i.e. all active and
passive element present in the circuit)
4. Measure Norton’s Current IN.
5. Calculate current flowing in load resistance with use of IN and RN.
6. Switch off the circuit.
7. Compare the reading and derive conclusion.
CALCULATION:
 Thevenin’s Theorem
6
 Norton’s Theorem
7
CONCLUSION:
________ _______________________
8
Experiment:-3: To study the Basic Logic Gates which are used in Digital
Circuits.
AIM: To study the Basic Logic Gates which are used in Digital Circuits.
APPARATUS:
1. Trainer Kit.
THEORY:
Any Gate is a logic circuit with one output and one or more inputs. The output signal of any
gate occurs only for certain combination of Input signals. Different types of gates are used in the
digital circuit, AND gate, OR gate, NOR gate, NAND gate, NOT gate are the basic logic gates.
Some gates are the combination of above basic gates. Such gates can be prepared by using
discrete components like diodes, transistors, resistors but nowadays-different types of IC’s are
used to have different gates. A power supply of +5V is used to give input. This supply is also used
to drive ICs. When power supply to the input is ‘ON’ we can say that logic level is at ‘1’ and when
power supply to the input is ‘OFF’ the logic level is said to be at ‘0’ level.
AND GATE:
AND gate is a gate, which gives output (output at ‘1’ level) only when all inputs are present
(i.e. all inputs are at ‘1’ level). Here IC7408 is used which has 2-inputs AND gate which are four
in numbers. Here only one gate is used. The truth table of AND gate is given in the table.
A B OUTPUT
0 0
0 1
1 0
1 1
OR GATE:
OR gate is a gate which gives output (output at ‘1’ level) when any ONE of the input is
present (any ONE out of all input must be at ‘1’ level). Here IC7432 is used which has two input
OR gate which are four in numbers. The truth table of OR gate is given in the table.
A B OUTPUT
0 0
0 1
1 0
1 1
9
Circuits.
NOT GATE:
This is also known as INVERTOR gate. This gate has one input and one output. All it does is
invert the input signal i.e. if the input is at high level, the output will be at low level and vice versa.
IC’s 7404 or 7406 can be used to get NOT gate. This IC has one input NOT gates, which are six in
numbers. The truth table of NOT gate is given in the table.
A OUTPUT
0
1
NAND GATE:
It is a sequence of series combination of AND gate & NOT gate, known as NAND gate. The
output of NAND gate is at ‘0’ level only when all inputs are at ‘1’ level. In rest of all the
conditions of inputs the output will be at ‘1’ level. IC 7400 can be used to get NAND gate. This IC
has two inputs NAND gate, which are four in numbers. The truth table of NAND gate is given in
the table.
A B OUTPUT
0 0
0 1
1 0
1 1
NOR GATE:
It is a sequence series combination of OR gate & NOT gate. The output on NOR gate is at ‘1’
level on when all inputs are at ‘0’ level. In rest all conditions of inputs the output is at ‘0’ level. IC
7402 can be used to get NOR gate which a two input NOR gate four in numbers.
A B OUTPUT
0 0
0 1
1 0
1 1
XOR GATE:
It is a special function gate which gives the output’1’ when both the inputs are different
otherwise the output is logic ‘0’. The IC 7486 is used for XOR gate and the truth table and logic
symbol is as follows:
10
Circuits.
A B OUTPUT
0 0
0 1
1 0
1 1
XNOR GATE:
It is a special function gate which gives the output’1’ when both the inputs are same otherwise
the output is logic ‘0’. The IC 74286 is used for XNOR gate and the truth table and logic symbol is
as follows:
A B OUTPUT
0 0
0 1
1 0
1 1
PROCEDURE:
CONCLUSION:
________ _______________________
11
Experiment:-4: To configuring NAND and NOR gate as universal gate
AIM: To configuring NAND and NOR gate as universal gate.
APPARATUS:
1. Trainer Kit.
THEORY:
NAND and NOR gate are called as universal gates because of by help of NAND and NOR
gate we can construct all other gates.
Some gates are the combination of above basic gates. Such gates can be prepared by using
discrete components like diodes, transistors, resistors but nowadays-different types of IC’s are
used to have different gates. A power supply of +5V is used to give input. This supply is also used
to drive ICs. When power supply to the input is ‘ON’ we can say that logic level is at ‘1’ and when
power supply to the input is ‘OFF’ the logic level is said to be at ‘0’ level.
NAND GATE:
It is a sequence of series combination of AND gate & NOT gate, known as NAND gate. The
output of NAND gate is at ‘0’ level only when all inputs are at ‘1’ level. In rest of all the
conditions of inputs the output will be at ‘1’ level. IC 7400 can be used to get NAND gate. This IC
has two inputs NAND gate, which are four in numbers. The truth table of NAND gate is given in
the table.
A B OUTPUT
0 0
0 1
1 0
1 1
NOR GATE:
It is a sequence series combination of OR gate & NOT gate. The output on NOR gate is at ‘1’
level on when all inputs are at ‘0’ level. In rest all conditions of inputs the output is at ‘0’ level. IC
7402 can be used to get NOR gate which a two input NOR gate four in numbers.
A B OUTPUT
0 0
0 1
1 0
1 1
12
Construct OR, AND, NOT gate using NAND gate:
13
Construct OR, AND, NOT gate using NOR gate:
14
PROCEDURE:
CONCLUSION:
________ _______________________
15
Experiment:-5: To Configuring S-R, D, J-K and T Flip Flop
AIM: To Configuring S-R, D, J-K and T Flip Flop.
APPARATUS:
1. Trainer Kit.
THEORY:
A Multivibrator is a regenerative circuit with two active devices designed so that one device
conducts while the other is cut off. Multivibrator can store binary numbers. So it can perform
essential functions like counting of pulses, synchronizing arithmetic Operations etc. Such type of
circuit is known as FLIP-FLOP circuits. Here we are going to study all types of FLIP-FLOPs:
1. S-R Flip-Flop
2. D Flip-Flop
3. J-K Flip-Flop
4. T Flip-Flop
Construct S-R Flip Flop with Truth Table:
16
Construct D Flip Flop with Truth Table:
Construct J-K Flip Flop with Truth Table:
17
Construct T Flip Flop with Truth Table:
PROCEDURE:
CONCLUSION:
________ _______________________
18
Experiment:-6: To study the operation of basic binary Adder and Subtractor
circuits.
AIM: To study the operation of basic binary Adder and Subtractor circuits.
APPARATUS:
1. Trainer Kit.
THEORY:
 Half Adder
 A binary adder adds two binary bits. Block diagram of half adder is shown in below figure.
A Sum (S)
Half
Inputs Outputs
Adder
B Carry(C)
Block diagram of half adder
 There are two input terminals, which are marked as A and B. Binary numbers, the sum of
which has to be made are applied here. There are two output terminals. One terminal is for sum
bit S and the other is the carry bit C. Truth table of half adder is shown in below table.
Truth table for half adder
Inputs Outputs
A B S (Sum) C (Carry)
0 0
1 0
0 1
1 1
 From truth table we can write the expression for sum S and carry C.
 For sum and carry summing up input combinations for which the output is 1.
S = A’B + AB’
C = AB
19
circuits.
 It is seen that the sum S can be realized by EX-OR gate and carry C can be realized by an AND
gate. Such circuit is shown in below figure.
Circuit of half adder
 Full adder
 For higher-order columns, we have to go for a full-adder, a logic circuit that can add 3 bits at a
time. The third bit is the carry from a lower column. This implies that we need a logic circuit
with three inputs and two outputs, similar to the full-adder as shown in below figure.
 FULL ADDER circuit does the addition of two numbers in binary, which have “CARRY”.
Sometimes in addition of two binary numbers you may have a CARRY from one column to the
next. So in the next Column we have to add three digits. This is not possible by half adder
circuit. A circuit as shown in below figure carries this. This consists of two half-adder circuits
and an OR-gate. This is known as FULL-ADDER Circuit.
Block diagram of full adder
20
circuits.
Truth table for full adder
INPUTS OUTPUTS
S C
A B Cin
(Sum) (Carry)
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
 For sum and carry summing up input combinations for which the output is 1.
S = A XOR B XOR Cin

C = (A XOR B) Cin + AB
Circuit diagram of full adder
 Half Subtractor
 When we are subtracting two binary numbers, we have to consider possibility of borrow. The
logic circuit for Subtractor is shown in the below figure.
 First, the difference output is 0 whenever the inputs A and B are the same; the difference
output is 1 whenever A and B are different. So, we can use an exclusive-OR gate to produce
the difference output. Second, the borrow output is 1 only when A is 0 and B is 1. We can get
this borrow output by ANDing A bar and B.
21
circuits.
 The binary rules for subtraction are
0 - 0 = 0 with a borrow of 0
 Below figure shows a Half-Subtractor, a circuit that subtracts one binary digit from one
another. The Half-Subtractor handles only 2 bits at a time and can be used for the last
significant column of a subtraction problem.
Truth Table of Half Subtractor
Inputs Outputs
A B B (Borrow) D (Difference)
0 0
1 0
0 1
1 1
 For subtract and borrow summing up input combinations for which the output is 1.
S = A XOR B
C = A' B
Circuit Diagram of Half Subtractor
PROCEDURE:
22
circuits.
CONCLUSION:
________ _______________________
23
Experiment:-7: Introduction to Operational Amplifier and study its
parameters.
AIM: Introduction to Operational Amplifier and study its parameters.
THEORY:
Equivalent circuit of an op-amp:-
Ideal characteristics:-
1. Infinite voltage gain A.

2. Infinite input impedance so that almost any signal can drive it and there is no loading of the
preceding stage.
3. Zero output impedance so that output can drive an infinite number of other devices.
4. Zero output voltage when input voltage is zero.
5. Infinite bandwidth so that any frequency signals from 0 to ∞ can be amplified without
attenuation.
6. Infinite common-mode rejection ratio so that the output common-mode noise voltage is zero.
7. Infinite slew rate so that output voltage changes occur simultaneously with input voltage
changes.
Pin diagram:-
24
parameters.
PIN-1(Offset null):-
Since the op-amp is differential type, input offset voltage must be controlled so as to minimize
offset. Offset voltage is nulled by application of a potentiometer between pin-1 and Pin-5.
PIN-2(Inverting input):-
All input signal at this pin will be inverted at output pin-6.
PIN-3(Non-inverting input):-
All input signal at this pin will be processed normally without inversion Rest is same as pin-2
PIN-4(-Vee):-
This pin is the negative supply voltage terminal. Supply voltage operating range for 741 is -5 to -
15 V dc.
PIN-5(Offset null):- Same as pin-1.
PIN-6(Output):-
Output signal’s polarity will be the opposite of the input signal’s when this signal is applied to the
op-amp’s inverting input. Output signal’s polarity will be the same as the inputs when this signal is
applied to the op-amp’s non-inverting input.
PIN-7(+Vcc):-
This pin is the positive supply voltage terminal. Supply voltage operating range for 741 is +5 to
+15 V dc.
PIN-8(N/C):- Not connected.
Op-amp parameters:-
Input offset voltage:-
Input offset voltage is the differential input voltage that exists between two input terminals of an
op-amp without any external input applied.
In other word, it is the amount of the input voltage that should be applied between two input
terminals in order to force the output voltage to be zero.
25
parameters.
Output offset voltage: -
Output offset voltage is caused by mismatching between two terminals of the op-amp. It appears
due to the input offset voltage.
Input Bias Current: -
Input bias current is defined as the average of the two input bias currents flowing into the two
terminals of the op-amp without any input.
IB = (IB1 + IB2) / 2
3. Slew Rate: -
One of the most important frequency related parameter is Slew Rate. It is the maximum rate of
change of output voltage per unit of time and it is expressed in terms of volts / μsec.
SR = (dVo / dt) V/ μsec
Slew rate indicates how rapidly the output of an op-amp changes in response to changes in the
input frequency.
4. Common mode rejection ratio: -
Common-mode rejection ratio, CMRR, is defined as the ratio of the differential voltage
amplification to the common-mode voltage amplification, AD/ACM. Ideally this ratio would be
infinite with common mode voltages being totally rejected.
CMRR = (AD / ACM )
The differential voltage gain AD is the same as the large-signal voltage gain A, which is specified
in the datasheets.
ACM = Vocm / Vcm
The higher the value of CMRR, the better is the matching between two input terminals and smaller
is the output common-mode voltage.
5. Input Offset Current: -
The algebraic difference between the currents flowing into the two input terminals of the opamp is
called the input offset current.
Iio = | IB1 – IB2 |
26
parameters.
Where, IB1 = current into the non-inverting input

IB2 = current into the inverting input.
6. Supply voltage rejection ratio: -
The change in an op-amp’s input offset voltage caused by variations in supply voltages is called
the supply voltage rejection ratio (SVRR).
SVRR = Δ Vio / ΔV μV / V
7. Gain – Bandwidth Product: -
The gain – bandwidth product is the bandwidth of the op-amp when the voltage gain is unity.
Practical characteristics:-
Practical value given below for OPAM IC 741 series:
1. Typical Large signal voltage gain - 2, 00,000

2. Typical input impedance - 2 MΩ
3. Typical output impedance - 75 Ω
4. Typical input offset voltage - 1 mV
5. Typical bandwidth - 1.5 MHz
6. Typical common mode rejection ratio - 90 dB
7. Typical slew rate - 0.5 V/μsec
CONCLUSION:
________ _______________________
27
Experiment:-8: To study and perform OP – AMP as an Inverting Amplifier
and Non-inverting Amplifier.
AIM: To study and perform OP – AMP as an Inverting Amplifier and Non-inverting Amplifier.
APPARATUS:
1. Analog board of AB41.
2. Digital Multimeter.
3. Variable voltage DC power supply.
4. 2 mm patch cords.
5. CRO.
6. Function Generator.
THEORY:
Op-Amp as Inverting Amplifier
Op-amp as inverting amplifier:
Above figure shows the circuit diagram of the op-amp used as an inverting amplifier. Input
signal, which can be either A.C. or D.C., is applied at the inverting terminal i.e. pin 2 of the op-amp
through resistor R1. A feedback resistor Rf is connected between the output terminal i.e. pin – 6 and
the Inverting terminal i.e. pin – 2 of the op-amp. The non-inverting terminal i.e. pins – 3 of the op-
amp is grounded either directly or through a resistor which is a parallel combination of input
resistor R1 and feedback resistor Rf. The gain of the amplifier is decided by the values of the
resistors R1 and Rf. The output of the op-amp will then be amplified version and 180 degree
out of phase of the input.
Design equation:
Applying Kirchhoff’s current law at the inverting terminal
Iin = Ib + If
28
But because of the infinite input impedance of the op-amp Ib = 0.

Therefore; Iin = If
 Applying Kirchhoff’s law
Input voltage VS given by VS = IR1
Output voltage VO = - IR1
 Closed loop gain AVF =
Substitute the value of Vo and Vs.
AVF = - =-
AVF = -
 An output voltage can be
Vo = AVF x VS
PROCEDURE:
1. Make necessary connections to create the circuit of the inverting amplifier using discrete
components on breadboard.
2. Switch ON the power supply.
3. By using different values of resistors, determine gain of an op-amp.
4. Compare it with practical gain.
5. Set Vin 20 mv peak to peak 1 KHz sine wave.
Op-amp as non-inverting amplifier:
Op-Amp as Non-Inverting Amplifier

29
Above figure shows the circuit diagram of the op-amp used as non-inverting amplifier.
Input signal, which can be either A.C. or D.C., is applied at the non-inverting terminal i.e. pin 3 of
the op-amp. A feedback resistor Rf is connected between the output terminal i.e. pin – 6 and the
Inverting terminal i.e. pin – 2 of the op-amp. The inverting terminal i.e. pins – 3 of the op-amp is
grounded either directly or through a resistor which is a parallel combination of input resistor R1
and feedback resistor Rf. The gain of the amplifier is decided by the values of the resistors R1 and
Rf. The output of the op-amp will then be amplified version and in phase with the input.
Design equation:
Applying Kirchhoff’s current law at the inverting terminal
Iin = Ib + If
But because of the infinite input impedance of the op-amp Ib = 0.

Therefore
Iin = If
Therefore voltage across R1 given by,
V2 = Vo
As per virtual short circuit concept
V2 = V1 = Vs
So, Vs = Vo
Closed loop gain

AVF = =
AVF = 1+
An output voltage can be

Vo = AVF X VS
PROCEDURE:
1. Pull all switches at OFF position (i.e. at ‘0’ level).

2. Make necessary connections to create the circuit of the non-inverting amplifier using discrete
components on breadboard.
3. Switch ON the power supply.
4. By using different values of resistors, determine gain of an op-amp.
30
5. Compare it with practical gain.

6. Set Vin 20 mv peak to peak 1 KHz sine wave.
CALCULATIONS:
In Inverting Mode: In Non-Inverting Mode:
Av= - Rf / R1 Av= 1 + Rf /R1
Practical gain = Vout / Vin Practical gain = Vout / Vin
CONCLUSION:
________ _______________________
31
Experiment:-9: To Simulate Amplitude Modulation and Demodulation signal
processing functions using Simulink.
AIM: To Simulate Amplitude Modulation and Demodulation signal processing functions using
Simulink.
THEORY:
 The purpose of a simulation is to better understand what is expected from a system when it is
actually implemented.
 Modulation is defined as the process by which some characteristics of a carrier signal is varied
in accordance with a modulating signal. The base band signal is referred to as the modulating
signal and the output of the modulation process is called as the modulation signal.
 Amplitude modulation is defined as the process in which is the amplitude of the carrier wave is
varied about a means values linearly with the base band signal.
 The envelope of the modulating wave has the same shape as the base band signal provided the
following two requirements are satisfied
1. The carrier frequency fc must be much greater than the highest frequency components fm
of the message signal m (t) i.e. fc >> fm
2. The modulation index must be less than unity. If the modulation index is greater than unity,
the carrier wave becomes over modulated.
AM Modulator and Demodulator
32
Experiment:-9: To Simulate Amplitude Modulation and Demodulation signal
processing functions using Simulink.
RESULTS:
Time domain display Frequency domain display
Simulated Time Domain and Frequency Domain Display for AM
CONCLUSION:
________ _______________________
33
Experiment:-10: Simulate RC & RL circuits using circuit simulator and
compare the simulated response with that of the actual circuit.
AIM: Simulate RC & RL circuits using circuit simulator and compare the simulated response
with that of the actual circuit.
THEORY:
A resistor–capacitor circuit (RC circuit), or RC filter or RC network, is an electric
circuit composed of resistors and capacitors driven by avoltage or current source. A first order RC
circuit is composed of one resistor and one capacitor and is the simplest type of RC circuit.
RC circuits can be used to filter a signal by blocking certain frequencies and passing others.
The two most common RC filters are the high-pass filters and low-pass filters; band-pass
filters and band-stop filters usually require RLC filters, though crude ones can be made with RC
filters.
A resistor–inductor circuit (RL circuit), or RL filter or RL network, is an electric
circuit composed of resistors and inductors driven by a voltage or current source. A first order RL
circuit is composed of one resistor and one inductor and is the simplest type of RL circuit.
A first order RL circuit is one of the simplest analogue infinite impulse response electronic
filters. It consists of a resistor and an inductor, either in series driven by a voltage source or
in parallel driven by a current source.
 Design a RC Circuit:
Schematic diagram:
R1
Vin Vout
V V
V1 = -1V V1 1k
V2 = 4V C1
TD = 0
TR = 1ns 1u
TF = 1ns
PW = 2ms
PER = 10ms
0
Net list:
R_R1 VIN VOUT 1k

C_C1 0 VOUT 1u
V_V1 VIN 0
+PULSE -1V 4V 0 1ns 2ms 10ms
34
Simulation Result:
RC circuits simulated response
 Design a RL Circuit
Schematic diagram:
R1
Vin Vout 2
-1.000V 0V
V L1
V
V1 = -1V V1 1k
V2 = 4V 1h
TD = 0
TR = 1ns
TF = 1ns 0V 1
PW = 2ms
PER = 10ms
0
Net list:
R_R1 VIN VOUT 1k

V_V1 VIN 0
+PULSE -1V 4V 0 1ns 2ms 10ms
L_L1 0 VOUT 1h
35
Simulation Result:
RC circuits simulated response
CONCLUSION:
________ _______________________
36

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Dedicated Faculty, Committed Education

This is to certify that Mr./Miss.________________

Submission Date: ______________

Staff In-Charge Head of Dept.

Basic Electronics (2110016) .

Sr. Page Completion

1. Connect function generator output at the input of C.R.O. at channel 1 or at channel 2.

Vertical Volt/div Amplitude Horizontal Time/div Time

Answer the following question:

2) A CRO can be used to measure_________.

3) Input impedance of CRO is__________.

4) The cathode of CRO is usually coated with__________.

5) A function generator is a______________.

AIM: To Perform Thevenin’s Theorem and Norton’s Theorem.

Thevenin Equivalent Circuit

 Norton’s Equivalent Circuit:-

Norton equivalent circuit

AIM: To configuring NAND and NOR gate as universal gate.

Construct OR, AND, NOT gate using NAND gate:

Construct OR, AND, NOT gate using NOR gate:

AIM: To Configuring S-R, D, J-K and T Flip Flop.

Construct S-R Flip Flop with Truth Table:

Construct D Flip Flop with Truth Table:

Construct J-K Flip Flop with Truth Table:

Construct T Flip Flop with Truth Table:

Block diagram of half adder

Truth table for half adder

Circuit of half adder

Block diagram of full adder

Truth table for full adder

S = A XOR B XOR Cin

Circuit diagram of full adder

 The binary rules for subtraction are

Truth Table of Half Subtractor

Circuit Diagram of Half Subtractor

AIM: Introduction to Operational Amplifier and study its parameters.

1. Infinite voltage gain A.

All input signal at this pin will be inverted at output pin-6.

PIN-5(Offset null):- Same as pin-1.

PIN-8(N/C):- Not connected.

Input offset voltage:-

Output offset voltage: -

Input Bias Current: -

SR = (dVo / dt) V/ μsec

4. Common mode rejection ratio: -

CMRR = (AD / ACM )

5. Input Offset Current: -

Iio = | IB1 – IB2 |

Where, IB1 = current into the non-inverting input

6. Supply voltage rejection ratio: -

7. Gain – Bandwidth Product: -

Practical value given below for OPAM IC 741 series:

1. Typical Large signal voltage gain - 2, 00,000

Op-Amp as Inverting Amplifier

Op-amp as inverting amplifier:

Applying Kirchhoff’s current law at the inverting terminal

But because of the infinite input impedance of the op-amp Ib = 0.

 Applying Kirchhoff’s law

Input voltage VS given by VS = IR1

Output voltage VO = - IR1

 Closed loop gain AVF =

Substitute the value of Vo and Vs.

Op-amp as non-inverting amplifier:

Op-Amp as Non-Inverting Amplifier