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UT AUSTIN EE 338L/382M-14

Tutorial #1 Fall 2018 Page 1 of 15


CADENCE ACCESS DOCUMENTATION
This is the first among a number of tutorials to follow related to designing basic analog circuits using the Cadence
suite of tools. This tutorial will get you up and running with Cadence® schematic capture, simulation and results
analysis for the EE 382M-14/EE338L.

Cadence is a powerful and comprehensive CAD environment for design of integrated circuits, system-on-chips
(SoCs) and printed circuit boards (PCBs) and has specific tools for design, simulation, layout and verification of
circuits in the analog, digital, mixed-signal and RF domains.

These are among the most popular tools used for circuit and IC design across the world, and knowing and
understanding how to use it is an integral part of being an IC designer. Understanding Cadence tools properly will
help you to complete homework and projects quickly, and will allow you to have the maximum benefit from this
course. These tools are industry-standard tools and as such knowledge of these tools attracts employers in the
industry. We suggest you practice with the tool to achieve the required level of proficiency. There are many short-
cuts/tricks to using this software and it will be up to you to pick up these as you progress along the course.

There are tons of tools integrated into Cadence, but the basic ones you need for this course are all part of the
Virtuoso® platform, and include:

 Virtuoso Schematic Editor: A schematic capture tool and constraint composition environment for analog,
custom-digital, RF, and mixed-signal designs that facilitates design entry with capabilities to support large
hierarchical designs.
 Virtuoso Analog Design Environment (AKA ADE): An environment that provides a comprehensive
array of capabilities for electrical and statistical analysis of analog, mixed-signal and RF designs, including
the capability for design optimization, verification, parasitic estimation and debug. It also includes
convenient interfaces to many industry-standard simulators, including the one we will use for this course -
Spectre®. In essence, this will be the nerve center of the design process as you proceed through this
course.
 Virtuoso Visualization and Analysis is a waveform display and analysis tool that efficiently and
thoroughly analyzes the performance of analog, RF, and mixed-signal designs. It provides a comprehensive
set of capabilities to display, measure, analyze, and debug simulation results, and to create documentation
for design reviews (and in our case for homework and project reports)
 Virtuoso Spectre/SpectreRF Circuit Simulator provides fast, accurate SPICE-level simulation for tough
analog, radio frequency (RF) and mixed-signal circuits. Spectre competes with HSPICE and a bunch of
other simulators in the electrical circuit simulator space. It is particularly suited to a variety of analysis
related to RF performance parameters which you will learn more about if you take a course on RF
integrated circuits.

Please refer to the official Cadence documentation for additional information.

Revision History
Version 1: Created 2nd December 2011 by Ajit Gopalakrishnan
Update 1: 2nd September 2013 by Huang Wang/Ajit Gopalakrishnan - added information on plotting gm/Id data
Update 1: 18th September 2013 by Ajit Gopalakrishnan – added information on automated scripts
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This tutorial assumes you have access to a machine from where you can open cadence tools or are able to connect
remotely to one, and you have the Cadence environment setup ready for design. If you haven’t already gone
through the Cadence access documentation on the course website, please do so before attempting to complete
this tutorial.

Using the Virtuoso Design Framework

If you completed the steps in the access documentation, you would have left off at the point where the following
window opened:

This is called the Command Interpreter Window (CIW). You interact with the design environment from this
window and this controls your current session. On top, you will see a path to a log file that will record the events of
the ongoing design session, and as you become an advanced user, you will likely look at these log files, but for now
it suffices to say that if you were to open another cadence session, you will have one more CIW window, with a
different log file, and when you close this window, you close your cadence session and all your open files. The
CIW window is like Cadence’s own command line interface, and allows, for example, to load scripts to run your
simulation.

In the CIW window, go ahead and choose Tools → Library Manager... from the CIW Menu. This opens up
another window, called Library Manager which allows you to browse the available libraries and create your own.

Note that you should see that some libraries already exist in your library manager. The reason for this is that you
copied the cds.lib file from blackboard which contains these library definitions. You will often need to modify
these definitions as you add and reference more libraries, so its worth looking at this in a little more depth. There
are two ways to do this:

1. From the CIW by choosing Tools → Library Path Editor... or from the Library Manager by selecting
Edit → Library Path. This opens up a dialog called Library Path Editor which has a list of library
names and the paths where they exist. The color of these fields will tell you if a particular path is correct or
not. Note the last library, called ADPLL, has an incorrect path and is thus highlighted in red. You can add
more libraries here as you progress in your designs. You will find that the path of the analogLib library is
different from what you have. Please update the path name to the one shown below. Once you are done
modifying the libraries, click File → Save
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2. You can also access the library definitions directly by opening the cds.lib file which exists in your cadence
working directory. Just mimic the syntax and add more libraries as needed. Folks conversant with Linux tend
to prefer this.

When you modify your cds.lib file by any of the methods above, save the file. To make sure the added libraries are
visible in the Library Manager, click View → Refresh.
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Creating new libraries


Now that you have added a few libraries, it's time to create one of your own. In the Library Manager window, select
File → New → Library... This will pop open the Create Library dialog. Enter a name for your library (say
Homework) and select the option Do not need process information. You may leave the path field empty. Click
OK

Quite often though, you will need to design with a particular technology in mind. If you are going to tape out
your circuit, then you will use a particular set of foundry models, and in that case you will use Attach to
existing tech library option

Creating new circuit schematics


Now we'll create a schematic of the circuit we wish to simulate. Select the library you just created in Library
Manager so that its highlighted and then click File → New → Cell View... , and type in the name of the circuit
schematic (I have chosen NMOS_char). Make sure SchematicXL is the application chosen. A black window will
pop-up which is now your blank canvas where you can start drawing your circuits.

We'll walk through a simple example circuit to ensure that you are familiar with some of the tools. Shown below is
the circuit you need to draw, which is basically a NMOS transistor with input and output voltage sources used to
bias the device. This is a standard configuration used to extract characteristic curves of the device (ID v/s VGS and ID
v/s VDS) that you may have done in a lab previously. We will use this basic circuit to extract and generate the
lookup tables we need for this class.
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We need to add a number of instances to the schematic, and in general they can all come from different libraries.
However, in our case we'll pick all our instances from the analogLib library. Let's first add the NMOS transistor.
Select Create → Instance... or press simply press 'i'. The Component Browser should pop on your screen.
Choose analogLib as the library and brose down to actives and then select nmos4 from among the different
devices that appear. An Add Instance window will now popup with different options for the device. For now fill in
the model name as nch, width as 1μ and length as 0.18μ. Place this transistor in the schematic editor window. The
sizes and model name will appear alongside the transistor in the schematic.
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Now place the other components. All the DC voltage sources are available as vdc under analogLib. The ground
symbol is simply called gnd. Once you have placed the components, draw wires to connect them by Create →
Wire (narrow) or press simply press 'w'.

You should now have the schematic setup as shown above. Now we we'll go ahead and put in the values for the
voltage sources. Note that this could have been done in the beginning when you instantiated these components as
well. Click on the source whose voltage you want to set, and right click and select properties or simply press 'q'

You may notice that there are alternate shortcuts for many functions in Cadence. In Cadence, we call these
bindkeys, but it's effectively a hotkey or a shortcut key. As we go along this tutorial more bindkeys will be specified,
and a simple search online should yield a list. These will really speed your schematic entry manifold and will give
you more time to focus on actual design.

In the edit object properties window, enter 1.2V for V GS and 1.8V for VDS respectively and click OK. All the
parameters needed to start simulation are now ready. This is a fairly simple design with just three distinct nodes, or
nets as it is known in CAD tool parlance. In larger designs, its useful to label these nets for easy identification.
Select Create → Wire Name and simply press 'l'. You get a add wire name dialog – enter the vgn followed by a
space, and then vdn and then hover the respective net. A blue marker box will appear below the name. Affix that
box on the wire you want labeled.
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Now your circuit is complete. Click the check and save button on the top, or ‘F8’. This not only saves you design,
but also checks for schematic errors and warnings. Go back and press the check and save button again, but this time
look at the CIW window while you do it. You should see messages that tell you whether there are errors or not. If
there are none, you will get messages that look like this:
INFO (SCH-1426): Schematic check completed with no errors.

There are different types of errors, and you'll learn to look out for these. Remember that if you have errors at this
step, your circuit will not simulate and you should fix the errors before continuing. Most, but not all warnings can
be ignored.

You have now learnt the basic usage of the Virtuoso Schematic Editor.

Simulation using ADE


We know have to simulate the circuit and look at the results. For this we need to invoke the
Cadence Analog Design Environment(ADE) by selecting Launch -> ADE L. You should see the window below
pop up. There are different flavors of this simulation environment, namely ADE XL and ADE GXL. These are
environments that are built on the more basic ADE L but with more advanced capabilities, which you will use as
you graduate to designing circuits for more complex and robust environments.

First we need to set simulator options. Click on Setup -> Simulator/Directory/Host ... to bring up the Choosing
Simulator/Directory/Host window shown below. Choose spectre as your simulator as that is what we will be using
and supporting in this class.

You will notice that the project directory points to a location in your cadence directory. Note that this space is finite
and is regulated by what ECE allots to you, and Cadence simulations can often eat up a lot of space. For the
purpose of this tutorial its OK to store simulation results in your local folder, but for larger projects the results of
your simulation files can be large and you may want to dump those files elsewhere. It’s always a good practice to
set this path to your local machine, for example “/tmp”. A word of caution however – when you logoff you will lose
all these simulation data and files. If you require these, be sure to copy them to your directory later on.
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We now need to setup model libraries to tell Cadence and ADE which model to use for the transistor. Download the
model file from Canvas, or copy it from the path below (it's a spectre model file with a .scs extension)
/home/ecelrc/students/agopalakrishnan/analog_public
and place it in your cadence working directory. Then select Setup → Model libraries and navigate to where your
model file is stored and add it. Click OK.

Now we need to select the types of analysis we need to do on the circuit. As you have already learnt in class, there
is DC analysis and small-signal analysis, but there are many more types used in analog circuits. DC analysis is
always the starting point to make sure your circuit is biased properly, so we'll start with that. Choose Analyses →
Choose... and select DC. The dialog box shown below will popup.

Select Save DC operating point and also Component Parameter under sweep variable. Once you've done that
click Select component and click on the VGS voltage source in the schematic. Another dialog will popup asking
you to make a choice – choose DC. The name of that source will then appear under Component Name. Set the
start and stop values as shown and click OK.

Let's ponder briefly on what has been done so far: We have drawn a circuit consisting of an NMOS transistor with
voltages connected at its gate and drain. We have assigned values to these sources, but additionally, we have also
swept the value of VGS from 0 to 1.8V. VDS is of course kept constant all this while. This should give you a hint that
we are trying to extract the ID v/s VGS characteristics of the transistor, just as we would have done with a transistor
that we want to characterize in the lab.

In order to plot currents, do the following. Select Outputs → To be plotted → Select on Schematic and go over to
the schematic and click the drain terminal of the NMOS (red square dot). When you click a red dot, you are
essentially asking cadence to select the current flowing through the node. When done successfully, that node is
circled in the schematic. In your ADE output dialog, you should now see /M0/D as an output with the plot and
save boxes checked.
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Assume you wanted to plot a node voltage. Select Outputs → To be plotted → Select on Schematic and this time
click on the wire that is connected to the node you want to select (say vdn) and when you do so, it will appear as
well in the outputs section of ADE. This is the difference between selecting currents and voltages in ADE for
plotting. Since we don't need to plot vout, lets delete it. Click on vout, and then press delete button.

Now click the netlist and run button


and your simulation should begin to run. If it doesn't, look out for error messages in the CIW window. To do this,
we can select Simulations → Output Log… and look inside for details of the error. Errors are of various types,
including silly ones like where you forget to ‘check and save’ your schematic, or ones that require more experience
to tackle, like convergence errors. Debugging your simulation is an integral part of your instruction as a circuit
designer, and the earlier you inculcate this ability, the better.

Using the Visualization and Analysis tool


After the simulation is complete, a graph of ID v/s VGS should appear as shown below

.
The graph seems a bit faint and not entirely very clear. Double click on the line, and you get a Trace Attributes
dialog box. Change the properties according to your needs and get a graph with more clarity. The visualization tool
has a lot of options, for example to plot different graphs in different sub-windows. We highlight two features which
are quite useful. First, since this tool is never going to give us very good looking graphs, we will often export data
of interest to formats that can be plotted externally (e.g. using MATLAB or Excel). To do this, right click on the
trace of interest, and choose Send To → Export… and you will have an option to export to a variety of formats.
For our purposes, a .csv format is the most used option.

The other useful thing you can do are some common mathematical operations on the data. Right click on the trace
as before and choose Send To → Calculator and you will find a calculator window that pops up. You will find the
expression for current i("/M0/D" ?result "dc")) in the buffer. Like a normal calculator, this one has a stack,
which you can insert into and pop out of. It also has a host of mathematical functions in the Functional Panel, for
example deriv. Click on this and the function will change to deriv(i("/M0/D" ?result "dc"))
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Click to plot the derivative of this dataset (which is essentially gm of the device). You can choose to append,
plot in a subwindow or in a new window, as per your requirement.

You can add markers to your plot, as is done below for x-axis value of V GS = 1V, and read off the corresponding y
values. You can also use specific expression for a more complicated marker. Play around with these options.

The calculator also interfaces to the schematic and ADE windows. For example, click vs at the top and go to the
schematic and click the vdn node. This will result in the buffer having the drain-source DC voltage VS("/vdn")
and you can plot this along with other parameters (of course here you just have a fixed DC voltage = 0.9V).

Now go back to the expression where you plotted the derivative of the drain current. Let’s say you don’t want to
construct this expression each time you simulate – you can choose to save this to the ADE window to be plotted
each time. Click the icon, and you will find that your ADE window has the this expression populated. You can
right click and edit both the expression and also give it a convenient name such as gm. This way you can build a set
of useful parameters that are plotted each time you run the simulation. You can also construct useful expressions
that directly measure bandwidth, time differences etc. Consult the Spectre manual for information on available
commands and expressions.
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Finally, since we have taken all the effort to setup our simulation parameters and output expressions, we would like
to save them for later. To do this, in the ADE window, click Session → Save State… and chose Cellview as the
option (you can also choose Directory, but Cellview will ensure all your states are saved in the same directory as
the schematic). Give a name and press OK. To recall, simple do Session → Load State… and your state will be
available for use at a later time.

Exercise:
This is a good time to do an exercise and refresh what you have learnt. Make suitable modifications to get a plot of
ID v/s VDS. Generate also a plot of gds to go along with the gm plot you have generated.

Using Variables
Let us know try to achieve this in another way. Go back to your schematic, click on the V GS source and pull up the
properties window. Instead of 1.2V, type in VGS, and press OK. What we are now trying to do is to assign a
variable and not a fixed value to the voltage and then sweep it in ADE. You can also change the length and width to
variables so that you can see the effect of changing these on the large- and small-signal parameters.

In ADE, select Variables → Copy from Cellview and your variables will appear on the left-side of the ADE
window. Double click on the variable name and assign a value – any value will do, but just to keep things simple,
use 1.5V.

Double click on DC under the analyses section of ADE to bring up the DC Analysis dialog. Instead of component
parameter, this time choose Design Variable and enter VGS under Variable Name and keep the start-stop limits
the same as before. Press OK and simulate the circuit like before. If you haven't done a check and save, the
simulation won't work, so remember to go and do that each time you make a change in the schematic. You should
be able to produce the same graph that you got before.
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Displaying and printing results


A very important part of the design process is to look at the circuit after simulation and to check if everything is ok
– node voltages and device currents, for example, and in case of active devices, regions of operation. If you are
designing for a certain gain, you may want to look at the gm of your device to see if it's sufficient. What follows is a
small list of useful ways to get circuit and device data from the schematic after it has successfully simulated.

1. Click on Results → Plot Outputs → DC and then go to the schematic and click on any voltage net (wire)
to plot the DC voltage at that node. If you have done a sweep, then it will plot the voltage node wrt to the swept
parameter, else it will give you a single voltage value. Note that clicking on a device node (red dots) to plot the
current will not work, for reasons only known to cadence. Anytime you want to plot current, or print its value,
you will need to set it up before simulating as we had done previously
2. Select Results → Direct Plot → Main Form and you will get another dialog which will feature a bunch
of pre-defined functions that you can plot. Again, current will not plot unless you have saved it before in ADE,
but go ahead and click on transconductance and follow the instructions on which nets/terminals to click. You
should see a graph of gm v/s VGS as before.
3. Select Results → Print → DC Operating Point and click on the NMOS. You will get a dialog box that
has the model parameters evalauated for a particular value of the swept variable. Think though which one it is.
4. Select Results → Annotate→ DC Node Voltages. You will see that all the nodes in the circuit have their
DC voltage displayed which is pretty useful in DC analysis and debug.
5. Select Results → Annotate→ DC Operating Points. You will see that the transistor current and terminal
voltages are displayed, which is very useful in determining the region of operation.

Plotting parameters for gm / ID- based design


Previously, to plot gm / ID we needed workaround in Cadence as there was no way to save the DC operating point.
As of IC617, there is an option to do so, but both options are included here in case the new option does not work for
some reason. The straightforward method is to go in ADE to Outputs → To be Saved→ Select OP parameters
and click the device for which you want operating point parameters saved. You need to do this for each device, and
obviously pair this with a DC simulation.

The older way was to create a file that will tell Spectre to save the DC operating point. Create an empty text file in
your home directory, and type in save M0:oppoint which basically tells Cadence to save operating point
information across various simulation conditions. Here M0 is the name of your transistor instance in the schematic
and for each transistor you want to save operating point data, you will have to add this line in the file.
Save the file as saveop.scs. In ADE, go to Setup → Simulation Files and under definition files attach the file you
just created.
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Re-run the simulation, and after its finished, select Tools → Results Browser and choose dc-dc in the left-hand
side menu options, and find M0/gm. Right click on it and choose plot signal, and you get a plot of gm v/s VGS , just
as you did before. However, now you have access to all the small signal parameters from the device as well as DC
perating point voltage and currents and you can plot all of them as a function of your swept variable.

Right-click on M0/gm again, but this time select calculator and you will see the expression in the buffer. Do the
same with the current called M0/D and write out an expression for gm / ID .In essence we are calculating gm / ID for
each value of VGS. Click the plot button or do Tools → Plot do plot the desired curve. Note that the x-axis is not
VOV but VGS.
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Of course we would like to have the plot with V OV as the x-axis, and while this can be done in Cadence, it’s a lot
easier to move these tasks to a different software like MATLAB or Excel. As explained before, you can right click
on this graph and save the data to a .csv file, but doing so for each parameter of interest is cumbersome, especially
for nested sweeps. Accordingly, here is a little script magic to help you do this quite easily.

Open a text file and give it a meaningful name, say transistor_sweep. Save the file with an extension .ocn . The
.ocn extension stands for OCEAN , which is a scripting language within Cadence. While very powerful for a a
number of uses, here will use it in a limited manner for helping us minimize time pushing buttons within a
simulator.

Here is a sample code snippet for you


selectResult('dc)
ocnPrint(?output "~/MOS_sweep/nom_w2_ID_VGSsweep.dat" ?numberNotation 'scientific getData("M0:d"))
selectResult('dc)
ocnPrint(?output "~/MOS_sweep/nom_w2_gm_VGSsweep.csv" ?numberNotation 'scientific getData("M0:gm"))

All these commands do is print output of the parameters of interest (here ID and gm) to a file with a specified name.
You can add more lines to print more parameters to a file (either .csv or .dat). You can also print multiple
parameters to the same file. For example:

selectResult('dc)
ocnPrint(?output "~/MOS_sweep/nom_w6_VDSsweep.dat" ?numberNotation 'scientific getData("M0:d"),
getData("M0:gm"), getData("M0:gds"), getData("M0:vth"), getData("M0:cgg"))

Setup the simulation like you did above, but instead of plotting and saving each waveform, you can use this script..
To run this script, go to your CIW window and type in the command load("transistor_sweep.ocn") (you can
change the filename and path, of course). The files will be available in the path you saved above.

Parametric Analysis
The parametric analysis feature lets you assign values to components and other parameters in a circuit and sweep
the circuit over the ranges of specified values. Parametric analysis can be a useful tool during the design phase of a
circuit or during verification and lets you specify ranges and pairs of values for components, semiconductor
parameters, and other circuit parameters, and then analyze the circuit over these specified values. This is called
sweeping parameters. The values you sweep in a parametric analysis must be identified as variables, as we have
done for VGS previously, as opposed to fixed values on the schematic. Note that a parametric analysis can be
paired with any analysis that is currently enabled. In this case, we are showing a parametric analysis only on the DC
sweep of the circuit. It’s important to run the analysis, DC or any other type first, to see if there are any errors and if
the setup is correct before running a parametric analysis.

Parametric analysis, when used with the display features of the waveform window, the waveform calculator, and
the Results Browser, enables you to see the effect of systematically altering circuit values. This will help you
immensely when preparing design charts for this class. You can sweep more than one variable in a parametric
analysis – a so-called nested sweep – and the way it works is the first variable (Sweep 1 position) is assigned its
first value while subsequent variables (Sweep 2, Sweep 3, …) cycle through all their values. The first variable then
moves to its next value, and the subsequent variables again cycle through all their values, and so on.

To setup a parametric analysis, in ADE select and Tools → Parametric Analysis the Parametric Analysis window
will popup. Fill in the values of the sweep you wish to perform. Below, I am performing a sweep of V GS form 0 ot
1.8V and a nested sweep of L from 0.18µ to 1µ.
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Now click Analysis → Start… and watch as the simulation cycles through all the specified steps. You will get a
plot of both currents and gm for the swept range of VGS values. This could take time depending on total number of
sweeps that needs to be performed.

Go back to ADE and delete the current signal from the outputs section (only vout now remains). Now open
calculator (you can do this from ADE itself by clicking Tools → Calculator… The calculator main form may
have the expression for the vout already in from the previous run. If not, there is a way to bring in any circuit
voltage or current into the calculator. Just above the calculator main form, you will find radio buttons that can
generate voltage and current expressions from schematic signals (there are different types including transient, dc, ac
and noise). For now, click vdc and then in the schematic select the vout node (called net in circuit simulator
parlance). The main form should populate with VDC("/vout"). Now you have obtained the DC voltage at vout
as a function of the swept voltage. For gain, we need its derivative, so go ahead and click the deriv function. Now,
back in ADE click Outputs → Setup… and then click New Expression and the window below will popup. This
window allows you to import a function/expression you have setup in calculator and import it into ADE and
evaluate/plot it so that you don’t have to redo everything each time you simulate. Populate the form as shown
below and click OK.

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