Circuit design language

CDL: Circuit Description Language is a kind of netlist, a description of an electronic circuit.[1] It is usually automatically
generated from a circuit schematic. It is used for electronic circuit simulationand layout versus schematic (LVS) checks. It is similar
to SPICE netlists, but with some extensions.

Several vendors such as Cadence Design Systems, Mentor Graphics, and Synopsys support CDL netlists, although their solutions
may be proprietary and not readable by competing systems.

References
1. Doman, David (2012).Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon
(https://
books.google.com/books?id=XmIEset3uGYC&pg=P A256). John Wiley & Sons. p. 256.ISBN 978-1-118-24304-6.

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This page was last edited on 13 August 2018, at 14:09(UTC).

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