ABSTRACT

Vehicle security system has been a topic of great interest over the years
due to the increasing vehicle theft cases reported all over the world. Most of the
advanced vehicle security systems best suit the four wheelers. As of the
security system for two wheelers is concerned, the systems available in market
are of no match to the well equipped thieves. When under attack, these systems
can only immobilize the engine. It is a serious limitation. In this paper we
propose a reliable and robust design of Two Wheeler Vehicle Security System
(TWVSS) with features enhancing the security of the vehicle and ensuring the
safety of the rider. In our proposed security system various new features are
included in addition to the engine immobilizer and alarm. Redundancy is
maintained to make the system reliable even in the worst case scenario, but due
to cost constraints a tradeoff between cost and redundancy was necessary. Our
system is designed to be compatible with almost all the brands of vehicle.
INTRODUCTION

According to the report published by National Crime Records Bureau

(NCRB), in the year 2011 alone 122,367 two wheeler vehicles were stolen in
India. Out of which only 32,826 vehicles were recovered [1]. Typically, two-
wheelers are stolen right off streets or apartment parking lots. By the time the
police are alerted (which could be a few hours since the theft), the vehicles are
made underground leaving almost no traces. Later the vehicles are either
dismantled or sold in neighboring states/districts at throw-away prices, leaving
the owner and police helpless in bringing the thief to book. The story remains
same for rest of the world. The only possible way out of this problem is
implementation of security system in the vehicle. The security system should
be capable of performing reasonably well even in unfavorable conditions to
meet the desired level of security [2], [3].
The price of the security system should be reasonably low or else the
automobile manufacturers cannot implement such a system, as it will increase
the overall cost of the vehicle by a big margin. If the design of the security
system is such that it is compatible with most of the brands and classes of
vehicles then it helps reducing the NRE cost. The overall power consumption
should be less as the source of supply for the security system is the 12V battery
of the vehicle. Keeping these requirements and constraints in mind we propose
this new design of Two Wheeler Vehicle Security System (TWVSS). The
remainder of this paper is organized as follows. Section 2 gives the insight of
the work carried out in this field. Section 3 gives the description of the
proposed TWVSS. Section 4 describes the design of hardware module. Section
5 describes the design of software module. Section 6 shows the result of the
tests conducted. Section 7 lists some of the future enhancements that could be
carried out. Lastly, Section 8 concludes the paper. Indeed, we are not the first to
observe the flaws and limitations of the present day vehicle security systems.
Several researchers have described potential vulnerabilities in automotive
security systems. The traditional security systems as priced low, but they
merely act as an alarm system and are no match to the well equipped thief.
Many security systems have been proposed over the years, but almost all
the recent advanced security systems are designed especially for cars. Several
researchers have even used image processing technology to capture the face of
driver and compare it with the picture of authorized drivers to detect the
intrusion . Whereas some proposed systems include finger print detection
system along with face detection. These security systems are complex, costly
and cannot be implemented on two wheelers. Two wheeler vehicles offer very
less space to install the security module and hence even area is one of the major
constraints. The demand is to design a system that performs necessary function,
simple to operate, reasonably priced and small enough to be placed under the
seat of the vehicle.
CHAPTER 1

LITERATURE SURVEY
LITERATURE SURVEY – 1

TWO WHEELER SECURITY SYSTEM - Shweta K. Narkhede1, Bharat P.

Tanwani2, Vivek P. Borse3, International Research Journal of Engineering and
Technology(IRJET) e-ISSN: 2395 -0056

In this paper, a new device is proposed for a security of a two-wheeler

from theft. This device works on the Wi-Fi module, which can be accessible
through a web page or Android app. There are lots of security systems available
in the market which are easily detectable & hack able by the thieves, these
systems work on the remote control or GPS or GSM. Through this device, we
are providing efficient security to two-wheeler; this device also has a feature of
finding the two-wheeler in the dense parking area. For sensing the position of
the vehicle, we are using tilt sensor, which shows that two-wheeler has been
moving from their still or bending position.
In the modern era, the security of each & everything is the vital role and
the security of two-wheeler or bike is one of the important parts. Typically the
bikes are stolen from streets or parking lots. By the time people, understand the
situation the vehicles are made underground leaving almost no traces. To come
out of the problem, there is only of implementation of a security system in
bikes. Currently, the security systems available for two-wheeler are very costly.
So the bike companies are not able to implement the security system as it
increases the total cost of a twowheeler. So it is necessary to design the security
system for a bike which is less costly & easily usable for every person. The
device, we have designed for the security of the two-wheeler has ESP8266
microcontroller, which has prefabricated Arduino board with inbuilt Wi-Fi
module, this Wi-Fi module can be accessed through the HTML web page or
Android app from the mobile phone. This web page or Android app controls
the ignition of the twowheeler, head light & side indicators of two-wheeler

LITERATURE SURVEY - 2

DESIGN AND FABRICATION OF ANTI- THEFT WHEEL LOCKING

SYSTEM 1 S. AmalDhasan,2 J.Manikandan 1Asst. Professor, Department of
Mechanical Engineering, Bharath University, BIHER, Chennai-73 1
amaldhasan.mech@bharathuniv.ac.in,2manikandan.mech@bharathuniv.ac.in

The purpose of this anti theft wheel locking system project is to hinder
the theft of bikes with the help of wheel locking system. To lock the front
wheel of the bike solenoid switches are used as the main tool. The linear
motions of the path are monitors and controlled by the Solenoid device. The to
and fro motion are controlled by a plunger which is connected by a battery
power supply device. Drum brakes system function enables with the brake
lever. When the ignition key is kept in off stage the drum brake activate
function. The problem is to manage the solenoid action when the programmed
the ignitions key in OFF condition or in idle states. If the mobile is theft by the
unknown person then the micro controller should perform an action by
analyzing front wheel motion gets activate the solenoid action. The solenoid
switch consist of power voltage 12v and current of 5amps .The battery consists
of voltage 12v and current of 7amps.
A car has three braking system – the accelerator,[1] the gears and the
brakes themselves.[2] A controlled, well anticipated and unhurried act of
slowing down or stopping will involve the use of all the three. With proper
observation of the road and traffic ahead,[3] a driver can see the need for a
reduction in speed long before, he has to control the vehicle by applying the
brakes. [4]

LITERATURE SURVEY – 3

SMART BIKE SECURITY SYSTEM - Nitin Kumar, Jatin Aggarwal, Chavi

Sachdeva, Prerna Sharma, Monica Guar, Department of Electronics &
Communication, SRM University, International Journal of Education and
Science Research Review, Volume-2, Issue-2, April-2015, Pg.No.28-32.

Wheel locking occurs the friction between the shoes and brake drum
exceeds the friction between the tyre and road surface. Frictional force is
essential for gripping the tyres on the road surface. The brakes will stop the car
more quickly when they are not locked and also the wear and Lear on the tyres
are greatly reduced. Maximum braking effort obtainable is greater with low
pressure than with high pressure tyres as the former hold the road better. The
chief objection to locking of the rear wheels is that it is almost certain to throw
the car into a skid. The advantages of four wheels over two wheel brakes are
that the former materially reduces the skidding tendency of a car. When there
are brakes on two wheels only it takes only about one half of the pedal pressure
to lock them. On greasy roads even a slight applications is likely to lock a pair
of rear wheel brakes unless the engine is in gear and once the wheels are locked
they will slide easily sideways as forward. All that is necessary to start a skid is
that the centre line of resistances encountered by the front wheels does not pass
through the centre of gravity of a car or of a car or if one front wheel
encounters greater resistance than the other locking the front wheels will not
produce a rear wheel skid.
The function of a vehicle brake is to stop down slowly it by when
moving or to prevent it from moving when it is stationary.[9-11] A brake works
by causing by the friction between a non rotating part of the car and a disk or
drum which turns on a road wheel. The force produced by the Friction slows
down the car and convert the energy of the moving vehicle into heat energy,
which disperses into the air around the brakes. The pressing force
simultaneously produces the relative motion when the natures of surfaces are in
contact. Within certain limits the retarding force due to brakes application is
proportional to the pressure with which the bands or shoes are applies to the
drums and to the coefficient of friction between lining and drum. [12-18]
However when the force of application reaches a certain value. The brakes lock
and the road wheels slide over the pavement, hence any further increase in the
force of application has no effect.
BLOCK DIAGRAM

WORKING EXPLANATION

This system uses a four bar mechanism, that follows a coupler curve. It
has a greater advantage than the existing system of transport of work piece in a
factory. The materials are transferred from one work station to another at a
specific time interval, which is based on the movement of the linkages. In a
continuous assembly factory, there is a need to transfer materials or on process
jobs form one working station to the other. In this process, the movement of job
from one station to another is accomplished by a belt conveyor system. System
uses an electric drive which is continuous. So the operator does not get
sufficient time to complete the operation. Thus the jobs are usually picked and
placed on to the work station and the job is processed. This is a tiring and a
time consuming job. Also for heavy materials, a separate setup is required for
the pick and place operation. This project proposes the model of at imbed
transport mechanism. This system uses kinematic linkages for timing the
transportation. It uses a four bar mechanism, that follows a coupler curve. It has
a greater advantage than the existing system of transport of work piece in a
factory. Four bar chain is a mechanism of four bar linkage. Links consists of
four bodies called bars of linkages connected in a loop by four joints. The
simplest movable link closed to the chain linkage. All the joints are configured
so that the links are move in parallel planes, and the assembly is so called a
planar four-bar linkage. All the four Linkages with axis angled are to
interconnect at a station point are hinged on a concentric point. So that the links
move on concentric spheres of the assembly is called a spherical four-bar
linkage

SOFTWARE REQUIREMENT:

 EMBEDDED ‘C’
 CODE VISION AVR

HARDWARE REQUIREMENT:

 Microcontroller
 Crystal
 Resistors
 Capacitors
 Diodes
 Regulator
 Transistors
 L293D
 DC Motor
 Key –Proximate Sensor
ADVANTAGES:

 The time required for assembly is greatly reduced.

 The extra work needed to transfer the work piece from the main transport
system to a work station is eliminated.
 The efficiency of the system is higher as number of friction parts is
lesser.
 The timing of the system can be easily varied based on the application.
 It is an economic design.
 It is reliable.
 It reduces man power.
 Less skill technicians is sufficient to operate.
 Less time and more profit.
 Job feeding systems, Continuous assembly plant. Packaging industries,
Automobile industries.
 The noise during operation can be reduced.
 The motion parts can be better lubricated.
CHAPTER 3

3.1 POWER SUPPLY UNIT

The present chapter introduces the operation of power supply circuits

built using filters, rectifiers, and then voltage regulators Starting with an AC
voltage a steady DC voltage is obtained by rectifying the AC voltage then
filtering to a DC level, and finally, regulating to obtain a desired fixed DC
voltage. The regulation is usually obtained from an IC voltage regulator unit,
which takes a DC voltage and provides a somewhat lower DC voltage, which
remains the same even if the input DC voltage varies, or the output load
connected to the DC voltage changes.

Fig: 3.10 Diagrams for Power Supply

IC VOLTAGE REGULATORS

Voltage regulators comprise a class of widely used ICs. Regulator IC

units contain the circuitry for reference source, comparator amplifier, control
device, and overload protection all in a single IC. Although the internal
construction of the IC is somewhat different from that described for discrete
voltage regulator circuits, the external operation is much the same. IC units
provide regulation of either a fixed positive voltage, a fixed negative voltage, or
an adjustable set voltage. A power supply can be built using a transformer
connected to the AC supply line to step the AC voltage to desired amplitude,
then rectifying that AC voltage, filtering with a capacitor and RC filter, if
desired, and finally regulating the DC voltage using an IC regulator. The
regulators can be selected for operation with load currents from hundreds of
Millis amperes to tens of amperes, corresponding to power ratings from mill
watts to tens of watts.

THREE-TERMINAL VOLTAGE REGULATORS

Fig shows the basic connection of a three-terminal voltage regulator IC

to a load. The fixed voltage regulator has an unregulated DC input voltage, VI,
applied to one input terminal, a regulated output DC voltage, Vo, from a second
terminal, with the third terminal connected to ground The specifications also
list the amount of output voltage change resulting from a change in load current
(load regulation) or in input voltage (line regulation).

FIXED POSITIVE VOLTAGE REGULATORS

The series 78 regulators provide fixed regulated voltages from 5 to 24 V

shows how one such IC, a 7812, is connected to provide voltage regulation with
the output from this unit of +12V Dec. An unregulated input voltage VI is
filtered by capacitor C1 and connected to the IC’s IN terminal. The IC’s OUT
terminal provides a regulated + 12V which is filtered by the capacitor C2
(mostly for any high-frequency noise). The third IC terminal is connected to
ground (GND).

While the input voltage may vary over some permissible voltage range,
and the output load may vary over some acceptable range, the output voltage
remains constant within specified voltage variation limits. These limitations are
spelled out in the manufacturer’s specification sheets.

BLOCK DIAGRAM OF POWER SUPPLY

The AC voltage, typically 220V RMS, is connected to a transformer,

which steps that AC voltage down to the level of the desired DC output. A
diode rectifier then provides a full-wave rectified voltage that is initially filtered
by a simple capacitor filter to produce a DC voltage. This resulting DC voltage
usually has some ripple or AC voltage variation.

A regulator circuit removes the ripples and also remains the same DC value
even if the input DC voltage varies, or the load connected to the output DC
voltage changes. This voltage regulation is usually obtained using one of the
popular voltage regulator IC units.

Fig:3.12BlockDiagram of Power Supply

TRANSFORMER

The potential transformer will step down the power supply voltage (0-
230V) to (0-6V) level. Then the secondary of the potential transformer will be
connected to the precision rectifier, which is constructed with the help of op–
amp. The advantages of using a precision rectifier are it will give a peak
voltage output as DC, the rest of the circuits will give only RMS output.

BRIDGE RECTIFIER

When four diodes are connected as shown in the figure, the circuit is
called as a bridge rectifier. The input to the circuit is applied to the diagonally
opposite corners of the network, and the output is taken from the remaining two
corners.

Let us assume that the transformer is working properly and there is a

positive potential, at point A and a negative potential at point B. The positive
potential at point A will forward bias D3 and reverse bias D4. The negative
potential at point B will forward bias D1 and reverse D2. At this time the D3
and D1 are forward biased and will allow current flow to pass through them;
D4 and D2 are reverse biased and will block current flow. The path for current
flow is from point B through D1, up through RL, through D3, through the
secondary of the transformer back to point B.

This path is indicated by the solid arrows. Waveforms (1) and (2) can be
observed across D1 and D3.One-half cycle later the polarity across the
secondary of the transformer reverse, forward biasing D2 and D4 and reverse
biasing D1 and D3.

The current flow will now be from point A through D4, up through RL,
through D2, through the secondary of T1, and back to point A. This path is
indicated by the broken arrows. Waveforms (3) and (4) can be observed across
D2 and D4. The current flow through RL is always in the same direction. In
flowing through RL this current develops a voltage corresponding to that
shown waveform (5). Since current flows through the load (RL) during both
half cycles of the applied voltage, this bridge rectifier is a full-wave rectifier.

One advantage of a bridge rectifier over a conventional full-wave

rectifier is that with a given transformer the bridge rectifier produces a voltage
output that is nearly twice that of the conventional full-wave circuit.This may
be shown by assigning values to some of the components shown in views A
and B. Assume that the same transformer is used in both circuits. The peak
voltage developed between points X and y is 1000 volts in both circuits.

Since only one diode can conduct at any instant, the maximum voltage
that can be rectified at any instant is 500 volts.. In the bridge rectifier shown in
view B, the maximum voltage that can be rectified is the full secondary voltage,
which is 1000 volts. Therefore, the peak output voltage across the load resistor
is nearly 1000 volts. With both circuits using the same transformer, the bridge
rectifier circuit produces a higher output voltage than the conventional full-
wave rectifier circuit.

IC VOLTAGE REGULATORS

Voltage regulators comprise a class of widely used ICs. Regulator IC

units contain the circuitry for reference source, comparator amplifier, control
device, and overload protection all in a single IC. IC units provide regulation of
either a fixed positive voltage, a fixed negative voltage, or an adjustable set
voltage.

The regulators can be selected for operation with load currents from
hundreds of Milli amperes to tens of amperes, corresponding to power ratings
from milliwatts to tens of watts. A fixed three-terminal voltage regulator has an
unregulated DC input voltage, VI, applied to one input terminal, a regulated DC
output voltage, Vo, from a second terminal, with the third terminal connected to
ground. The series 78 regulators provide fixed positive regulated voltages from
5 to 24 volts. Similarly, the series 79 regulators provide fixed negative
regulated voltages from 5 to 24 volts.

 For IC’s, Micro Controller, KEY --------- 5 volts

 For L293D , DC Motor---------- 12 volts

3.2 DC MOTOR

INTRODUCTION

Almost every mechanical movement that we see around us is

accomplished by an electric motor. Electric machines are a means of converting
energy. Motors take electrical energy and produce mechanical energy. Electric
motors are used to power hundreds of devices we use in everyday life. Motors
come in various sizes. Huge motors that can take loads of 1000’s of
Horsepower are typically used in the industry. Some examples of large motor
applications include elevators, electric trains, hoists, and heavy metal rolling
mills. Examples of small motor applications include motors used in
automobiles, robots, hand power tools and food blenders. Micro-machines are
electric machines with parts the size of red blood cells, and find many
applications in medicine. Electric motors are broadly classified into two
different categories: DC (Direct Current) and AC (Alternating Current). Within
these categories are numerous types, each offering unique abilities that suit
them well for specific applications. In most cases, regardless of type, electric
motors consist of a stator (stationary field) and a rotor (the rotating field or
armature) and operate through the interaction of magnetic flux and electric
current to produce rotational speed and torque. DC motors are distinguished by
their ability to operate from direct current. There are different kinds of D.C.
motors, but they all work on the same principles. In this chapter, we will study
their basic principle of operation and their characteristics. It’s important to
understand motor characteristics so we can choose the right one for our
application requirement.

CONSTRUCTION

DC motors consist of one set of coils, called armature winding, inside another
set of coils or a set of permanent magnets, called the stator. Applying a voltage
to the coils produces a torque in the armature, resultingin motion.

STATOR

 The stator is the stationary outside part of a motor.

 The stator of a permanent magnet dc motor is composed of two or more

permanent magnet pole pieces.

 The magnetic field can alternatively be created by an electromagnet. In

this case, a DC coil (field winding) is wound around a magnetic material
that forms part of the stator.

ROTOR

 The rotor is the inner part which rotates.

 The rotor is composed of windings (called armature windings) which are

connected to the external circuit through a mechanical commutator.

 Both stator and rotor are made of ferromagnetic materials. The two are
separated by air-gap.

WINDING
A winding is made up of series or parallel connection of the coils.

 Armature winding - The winding through which the voltage is applied or

induced.

 The field winding - The winding through which a current is passed to

produce flux (for the electromagnet)

 Windings are usually made of copper.

PRINCIPLE OF OPERATION

Consider a coil in a magnetic field of flux density B (figure 4). When the
two ends of the coil are connected across a DC voltage source, current I flow
through it. A force is exerted on the coil as a result of the interaction of
magnetic field and electric current. The force on the two sides of the coil is
such that the coil starts to move in the direction of force.
 In an actual DC motor, several such coils are wound on the rotor, all of
which experience force, resulting in rotation. The greater the current in the
wire, or the greater the magnetic field, the faster the wire moves because of the
greater force created.At the same time this torque is being produced, the
conductors are moving in a magnetic field. At different positions, the flux
linked with it changes, which causes an emf to be induced (e = d /dt) as shown
in figure 5. This voltage is in opposition to the voltage that causes current flow
through the conductor and is referred to as a counter-voltage or back emf.

The value of current flowing through the armature is dependent upon the
difference between the applied voltage and this counter-voltage. The current
due to this counter-voltage tends to oppose the very cause of its production
according to Lenz’s law. It results in the rotor slowing down. Eventually, the
rotor slows just enough so that the force created by the magnetic field. Equals
the load force applied to the shaft. Then the system moves at constant velocity.

DC MOTOR EQUIVALENT CIRCUIT

 The schematic diagram for a DC motor is shown below. A DC motor
has two distinct circuits: Field circuit and armature circuit. The input is
electrical power and the output is mechanical power. In this equivalent circuit,
the field winding is supplied from a separate DC voltage source of voltage Vf.
Rf and Lf represent the resistance and inductance of the field winding. The
current If produced in the winding establishes the magnetic field necessary for
motor operation. In the armature (rotor) circuit, VT is the voltage applied
across the motor terminals, Ia is the current flowing in the armature circuit, Ra
is the resistance of the armature winding, and Eb is the total voltage induced in
the armature.

ADVANTAGES OF DC MOTOR

DC motors provide excellent speed control for acceleration and

deceleration with effective and simple torque control. The fact that the power
supply of a DC motor connects directly to the field of the motor allows for
precise voltage control, which is necessary to speed and torque control
applications.

DC motors perform better than AC motors on most traction equipment. They

are also used for mobile equipment like golf carts, quarry and mining
equipment. DC motors are conveniently portable and well suited for special
applications, such as industrial tools and machinery that is not easily run from
remote power sources.

MOTOR DRIVER –H BRIDGE

H Bridge is an electronic circuit that enables a voltage to be applied

across a load in either direction. These circuits are often used in robotics and
other applications to allow DC motors to run forwards and backwards. H
bridges are available as integrated circuits, or can be built from discrete
components.

STRUCTURE OF H-BRIDGE

The term H bridge is derived from the typical graphical representation of

such a circuit. An H bridge is built with four switches (solid-state or
mechanical). When the switches S1 and S4 (according to the first figure) are
closed (and S2 and S3 are open) a positive voltage will be applied across the
motor. By opening S1 and S4 switches and closing S2 and S3 switches, this
voltage is reversed, allowing reverse operation of the motor. Using the
nomenclature above, the switches S1 and S2 should never be closed at the same
time, as this would cause a short circuit on the input voltage source. The same
applies to the switches S3 and S4. This condition is known as shoot-through.

CONSTRUCTION

Typical solid-state H bridge

A solid-state H bridge is typically constructed using opposite polarity

devices, such as PNPBJTs or P-channel MOSFETs connected to the high
voltage bus and NPN BJTs or N-channel MOSFETs connected to the low
voltage bus.

The most efficient MOSFET designs use N-channel MOSFETs on both the
high side and low side because they typically have a third of the ON resistance
of P-channel MOSFETs. This requires a more complex design since the gates
of the high side MOSFETs must be driven positive with respect to the DC
supply rail. However, many integrated circuit MOSFET drivers include
a charge pump within the device to achieve this.

Alternatively, a switched-mode DC–DC converter can be used to provide

isolated ('floating') supplies to the gate drive circuitry. A multiple-output
flyback converter is well-suited to this application.
Another method for driving MOSFET-bridges is the use of a specialized
transformer known as a GDT (Gate Drive Transformer), which gives the
isolated outputs for driving the upper FETs gates. The transformer core is
usually a ferrite toroid, with 1:1 or 4:9 winding ratio. However, this method can
only be used with high frequency signals. The design of the transformer is also
very important, as the leakage inductance should be minimized, or cross
conduction may occur. The outputs of the transformer also need to be usually
clamped byZener diodes, because high voltage spikes could destroy the
MOSFET gates.

A common variation of this circuit uses just the two transistors on one side of
the load, similar to a class AB amplifier. Such a configuration is called a "half
bridge". The half bridge is used in some switched-mode power supplies that
use synchronous rectifiersand in switching amplifiers. The half-H bridge type is
commonly abbreviated to "Half-H" to distinguish it from full ("Full-H") H
bridges. Another common variation, adding a third 'leg' to the bridge, creates a
three-phase inverter. The three-phase inverter is the core of any AC motor
drive.

A further variation is the half-controlled bridge, where one of the high- and
low-side switching devices (on opposite sides of the bridge) are replaced with
diodes. This eliminates the shoot-through failure mode, and is commonly used
to drive variable/switched reluctance machines and actuators where bi-
directional current flow is not required.

A "double pole double throw" relay can generally achieve the same electrical
functionality as an H bridge (considering the usual function of the device). An
H bridge would be preferable to the relay where a smaller physical size, high
speed switching, or low driving voltage is needed, or where the wearing out of
mechanical parts is undesirable.
There are many commercially available inexpensive single and dual H-bridge
packages, and L293x series are the most common ones. Few packages have
built-in flyback diodes for back EMF protection.

OPERATION OF H-BRIDGE

The two basic states of an H bridge

The H-bridge arrangement is generally used to reverse the polarity of the

motor, but can also be used to 'brake' the motor, where the motor comes to a
sudden stop, as the motor's terminals are shorted, or to let the motor 'free run' to
a stop, as the motor is effectively disconnected from the circuit. The following
table summarizes operation, with S1-S4 corresponding to the diagram above.

S1 S2 S3 S4 Result

1 0 0 1 Motor moves right

0 1 1 0 Motor moves left

0 0 0 0 Motor free runs

0 1 0 1 Motor brakes

1 0 1 0 Motor brakes
 1 1 0 0 Shoot-through

0 0 1 1 Shoot-through

1 1 1 1 Shoot-through

SHEET METAL

It is metal formed by an industrial process into thin, flat pieces. It is one of the
fundamental forms used in metalworking and it can be cut and bent into a
variety of shapes. Countless everyday objects are constructed with sheet metal.
Thicknesses can vary significantly; extremely thin thicknesses are considered
foil or leaf, and pieces thicker than 6 mm (0.25 in) are considered plate.

Sheet metal is available in flat pieces or coiled strips. The coils are formed by
running a continuous sheet of metal through a roll slitter.

The thickness of sheet metal is in the USA commonly specified by a traditional,

non-linear measure known as its gauge. The larger the gauge number, the
thinner the metal. Commonly used steel sheet metal ranges from 30 gauge to
about 7 gauge. Gauge differs between ferrous (iron based) metals and
nonferrous metals such as aluminum or copper; copper thickness, for example
is measured in ounces (and represents the thickness of 1 ounce of copper rolled
out to an area of 1 square foot). In the rest of the world the sheet metal
thickness is given in millimeters.

There are many different metals that can be made into sheet metal, such as
aluminum, brass, copper, steel, tin, nickel and titanium. For decorative uses,
important sheet metals include silver, gold, and platinum (platinum sheet metal
is also utilized as a catalyst.)
Sheet metal is used for car bodies, airplane wings, medical tables, roofs for
buildings (architecture) and many other applications. Sheet metal of iron and
other materials with high magnetic permeability, also known as laminated steel
cores, has applications in transformers and electric machines. Historically, an
important use of sheet metal was in plate armor worn by cavalry, and sheet
metal continues to have many decorative uses, including in horse tack. Sheet
metal workers are also known as "tin bashers" (or "tin knockers"), a name
derived from the hammering of panel seams when installing tin roofs.
 CHAPTER 4

4.1 ATMEGA MICRO CONTROLLER

PIN DIAGRAM:

FEATURES:

 High-performance, Low-power AVR, 8-bit Microcontroller

 Advanced RISC Architecture
 Nonvolatile Program and Data Memories
 Two 8-bit Timer/Counters with Separate Prescaler, one Compare Mode
 Byte-oriented Two-wire Serial Interface
 Programmable Serial USART
 Master/Slave SPI Serial Interface
 Programmable Watchdog Timer with Separate On-chip Oscillator
 On-chip Analog Comparator
 Power-on Reset and Programmable Brown-out Detection
 Internal Calibrated RC Oscillator
  External and Internal Interrupt Sources
 I/O and Packages
 23 Programmable I/O Lines
 28-lead PDIP, 32-lead TQFP, and 32-pad MLF
 Operating Voltages
 2.7 - 5.5V (ATmega16L)
 4.5 - 5.5V (ATmega16)
 Speed Grades
 0 - 8 MHz (ATmega16L)
 0 - 16 MHz (ATmega16)
 Power Consumption at 4 Mhz, 3V, 25°C
 Active: 3.6 Ma
 Idle Mode: 1.0 mA
 Power-down Mode: 0.5

DESCRIPTION:
The ATmega16 is a low-power CMOS 8-bit microcontroller based
on the AVR RISC architecture. By executing powerful instructions in a single
clock cycle, the ATmega16 achieves throughputs approaching 1 MIPS per
MHz, allowing the system designed to optimize power consumption versus
processing speed. The AVR core combines a rich instruction set with 32
general-purpose working registers. All the 32 registers are directly connected
to the Arithmetic Logic Unit (ALU), allowing two independent registers to be
accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times
faster than conventional CISC microcontrollers.
 The device is manufactured using Atmel’s high-density non-volatile
memory technology. The Flash Program memory can be reprogrammed In-
System through an SPI serial interface, by a conventional non-volatile memory
programmer, or by an On-chip boot program running on the AVR core. The
boot program can use any interface to download the application program in the
Application Flash memory. Software in the Boot Flash Section will continue to
run while the Application Flash Section is updated, providing true Read-While-
Write operation. By combining an 8-bit RISC CPU with In-System Self-
Programmable Flash on a monolithic chip, the Atmel ATmega16 is a powerful
microcontroller that provides a highly flexible and cost-effective solution to
many embedded control applications. The ATmega16 AVR is supported with a
full suite of program and system development tools, including C compilers,
macro assemblers, program debugger/simulators, In-Circuit Emulators, and
evaluation kits.

PIN DESCRIPTIONS:
VCC: Digital supply voltage.
GND
AVCC: AVCC is the supply voltage pin for the A/D Converter, Port C (3-0)
and ADC (7-6). It should be externally connected to VCC, even if the ADC is
not used.
If the ADC is used, it should be connected to VCC through a low-pass filter.
Note that Port C (5-4) use digital supply voltage, VCC.
AREF: AREF is the analog reference pin for the A/D Converter.
Port B: (PB7 – PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port B output buffers have symmetrical drive
characteristics with both high sink and source capability.
 As inputs, Port B pins that are externally pulled low will source current if
the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.

Port C: (PC5 - PC0)

Port C is a 7-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port C output buffers have symmetrical drive
characteristics with both high sink and source capability.

As inputs, Port C pins that are externally pulled low will source current if
the pull-up resistors are activated. The Port C pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port D: (PD7- PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port D output buffers have symmetrical drive
characteristics with both high sink and source capability.
As inputs, Port D pins that are externally pulled low will source current if
the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active even if the clock is not running.
PC6/RESET:
If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note
that the electrical characteristics of PC6 differ from those of the other pins of
Port C PC6 is used as a Reset input.
RESET (Reset input). A low level on this pin for longer than the minimum
pulse length will generate a reset, even if the clock is not running.
AVR CPU CORE:
Introduction:
This section discusses the AVR core architecture in general. The main
function of the CPU core is to ensure correct program execution. The CPU
must therefore be able to access memories, perform calculations, control
peripherals, and handle interrupts.

4.2 FUNCTIONAL BLOCK DIAGRAM OF

MICROCONTROLLER ATMEGA16:
Architectural Overview:
Block Diagram of the AVR MCU Architecture is shown in above figure
in order to maximize performance and parallelism, the AVR uses Harvard
architect with separate memories and buses for program and data. Instructions
in the Program memory are executed with a single level pipelining. While one
instruction is being executed, the next instruction is pre-fetched from the
Program memory. This concept enables instructions to be executed in every
clock cycle
The Program memory is in System Reprogrammable Flash memory.
The fast-access Register File contains 32 x 8-bit general purpose working
registers with a single clock cycle access time. This allows single-cycle
Arithmetic Logic Unit (ALU) operation. In a typical ALU operation, two
operands are output from the Register File, the operation is executed, and the
result is stored back in the Register File – in one clock cycle.
 Arithmetic Logic Unit – ALU:
The high-performance AVR ALU operates in direct connection with all
the 32 general purpose-working registers. Within a single clock cycle,
arithmetic operations between general-purpose registers or between a register
and an immediate are executed.
The ALU operations are divided into three main categories – arithmetic,
logical, and bit-functions. Some implementations of the architecture also
provide a powerful multiplier supporting both signed/unsigned multiplication
and fractional format. See the “Instruction Set” section for a detailed
description.
 Status Register:
The Status Register contains information about the result of the most
recently executed arithmetic instruction. This information can be used for
altering program flow in order to perform conditional operations. Note that the
Status Register is updated after all ALU operations, as specified in the
Instruction Set Reference.
This will in many cases remove the need for using the dedicated compare
instructions, resulting in faster and more compact code.
The Status Register is not automatically stored when entering an interrupt
routine and restored when returning from an interrupt. This must be handled by
software.
The AVR Status Register – SREG – is defined as:

Bit 7 – I: Global Interrupt Enable

The Global Interrupt Enable bit must be set for the interrupts to be
enabled. The individual interrupt enable control is then performed in separate
control registers. If the Global Interrupt Enable Register is cleared, none of the
interrupts are enabled independent of the individual interrupt enable settings.
The I-bit is cleared by hardware after an interrupt has occurred, and is set by
the RETI instruction to enable subsequent interrupts. The I-bit can also be set
and cleared by the application with the SEI and CLI instructions, as described
in the Instruction Set Reference.

Bit 6 – T: Bit Copy Storage

Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit
as source or destination for the operated bit. A bit from a register in the
Register File can be copied into T by the BST instruction, and a bit in T can be
copied into a bit in a register in the Register File by the BLD instruction.
Bit 5 – H: Half Carry Flag
The Half Carry Flag H indicates a Half Carry in some arithmetic
operations. Half Carry is useful in BCD arithmetic. See the “Instruction Set
Description” for detailed information.

Bit 4 – S: Sign Bit, S = N ⊕ V

The S-bit is always an exclusive or between the Negative Flag N and the
Two’s Complement Overflow Flag V. See the “Instruction Set Description” for
detailed information.

Bit 3 – V: Two’s Complement Overflow Flag

The Two’s Complement Overflow Flag V supports two’s complement
arithmetic’s. See the “Instruction Set Description” for detailed information.

Bit 2 – N: Negative Flag

The Negative Flag N indicates a negative result in an arithmetic or logic
operation. See the “Instruction Set Description” for detailed information.

Bit 1 – Z: Zero Flag

The Zero Flag Z indicates a zero result in an arithmetic or logic
operation. See the “Instruction Set Description” for detailed information.

Bit 0 – C: Carry Flag

The Carry Flag C indicates a Carry in an arithmetic or logic operation.
Set Description” for detailed information.
GENERAL PURPOSE REGISTER FILE:
The Register File is optimized for the AVR Enhanced RISC instruction
set. In order to achieve the required performance and flexibility, the following
input/output schemes are Supported by the Register File:

 One 8-bit output operand and one 8-bit result input.

 Two 8-bit output operands and one 8-bit result input.
 Two 8-bit output operands and one 16-bit result input.
 One 16-bit output operand and one 16-bit result input.
 The X-register, Y-register and Z-register:
The registers R26, R31 has some added functions to their general-purpose
usage. These registers are 16-bit address pointers for indirect addressing of the
Data Space.
 Stack Pointer:
The Stack is mainly used for storing temporary data, for storing local
variables and for storing return addresses after interrupts and subroutine calls.
The Stack Pointer Register always points to the top of the Stack. Note that the
Stack is implemented as growing from higher memory locations to lower
memory locations. This implies that a Stack PUSH command decreases the
Stack Pointer. The Stack Pointer points to the data SRAM Stack area where the
Subroutine and Interrupt Stacks are located. This stack space in the data SRAM
must be defined by the program before any subroutine calls are executed or
interrupts are enabled. The Stack Pointer must be set to point above 0x60. The
Stack Pointer is decremented by one when data is pushed onto the Stack with
the PUSH instruction, and it is decremented by two when the return address is
pushed onto the Stack with subroutine call or interrupt. The Stack Pointer is
incremented by one when data is popped from the Stack with the POP
instruction, and it is incremented by two when address is popped from the
Stack with return from subroutine RET or return from interrupt RETI. The
AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The
number of bits actually used is implementation dependent. Note that the data
space in some implementations of the AVR architecture is so small that only
SPL is needed. In this case, the SPH Register will not be present.

 Instruction Execution Timing:

This section describes the general access timing concepts for instruction
execution. The AVR CPU is driven by the CPU clock CPU, directly generated
from the selected clock source for the chip. No internal clock division is used.
 Reset and Interrupt Handling:
The AVR provides several different interrupt sources. These interrupts and
the separate Reset Vector each have a separate Program Vector in the Program
memory space. All interrupts are assigned individual enable bits which must be
written logic one together with the Global Interrupt Enable bit in the Status
Register in order to enable the interrupt. Depending on the Program Counter
value, interrupts may be automatically disabled when Boot Lock Bits BLB02 or
BLB12 are programmed.
 Interrupt Response Time:
The interrupt execution response for all the enabled AVR interrupts is
four-clock cycles minimum. After four clock cycles, the Program Vector
address for the actual interrupt handling routine is executed. During this 4-
clock cycle period, the Program Counter is pushed onto the Stack. The Vector
is normally a jump to the interrupt routine, and this jump takes three clock
cycles. If an interrupt occurs during execution of a multi-cycle instruction, this
instruction is completed before the interrupt is served. If an interrupt occurs
when the MCU is in sleep mode, the interrupt execution response time is
increased by four clock cycles. This increase comes in addition to the start-up
time from the selected sleep mode.
  AVR ATmega16 Memories:
This section describes the different memories in the ATmega16. The
AVR architecture has two main memory spaces, the Data memory and the
Program Memory space. In addition, the ATmega16 features an EEPROM
Memory for data storage. All three memory spaces are linear and regular.
TYPES OF MEMORIES:
In-System Reprogrammable Flash Program Memory:
The ATmega16 contains 8K bytes On-chip In-System Reprogrammable
Flash memory for program storage. Since all AVR instructions are 16- or 32-
bits wide, the Flash is organized as 4K x 16 bits. For software security, the
Flash Program memory space is divided into two sections, Boot Program
section and Application Program section. The Flash memory has an endurance
of at least 10,000 write/erase cycles. The ATmega16 Program Counter (PC) is
12 bits wide, thus addressing the 4K Program memory locations. The operation
of Boot Program section and associated Boot Lock Bits for software protection
are described in detail in “Boot Loader Support – Read-While-Write Self-
Programming” on page 206. “Memory Programming” on page 219 contains a
detailed description on Flash Programming in SPI- or Parallel Programming
mode. Constant tables can be allocated within the entire Program memory
address space (see the LPM – Load Program memory instruction description).

DATA MEMORY:
The lower 1120 Data memory locations address the Register File, the I/O
Memory, and the internal data SRAM. The first 96 locations address the
Register File and I/O Memory, and the next 1024 locations address the internal
data SRAM. The five different addressing modes for the Data memory cover:
Direct, Indirect with Displacement, Indirect, Indirect with Pre-decrement, and
Indirect with Post-increment. In the Register File, registers R26 to R31 feature
the indirect addressing pointer registers.
EEPROM Data Memory:
The ATmega16 contains 512 bytes of data EEPROM memory. It is
organized as a separate data space, in which single bytes can be read and
written. The EEPROM has an endurance of at least 100,000 write/erase cycles.
The access between the EEPROM and the CPU is described below, specifying
the EEPROM Address Registers, the EEPROM Data Register, and the
EEPROM Control Register.
EEPROM Read/Write Access:
The EEPROM Access Registers are accessible in the I/O space.
I/O Memory:
The I/O space definition of the ATmega16 is shown in figure. All
ATmega16 I/Os and peripherals are placed in the I/O space. The I/O locations
are accessed by the IN and OUT instructions, transferring data between the 32
general-purpose working registers and the I/O space. I/O Registers within the
address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI
instructions. In these registers, the value of single bits can be checked by using
the SBIS and SBIC instructions. Refer to the instruction set section for more
details.
When using the I/O specific commands IN and OUT, the I/O addresses
0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. For
compatibility with future devices, reserved bits should be written to zero if
accessed. The following figure is the vbat voltage ripple wave at the maximum
power transmit phase, the test condition is vbat=4.0v, vbat maximum output
current =2a, ca=100 μf tantalum capacitor (esr=0.7ω) and cb=4.7μf.
Power supply pins on the board-to-board connector
Eight vbat pins of the board-to-board connector are dedicated to connect
the supply voltage; four ground pins are recommended for grounding. Backup
can be used to back up the RTC.

MINIMIZING POWER LOSSES

Please pay special attention to the supply power when you are designing
your applications. Please make sure that the input voltage will never drops
below 3.4v even in a transmit burst during which the current consumption may
rise up to 2a. If the power voltage drops below 3.4v, the module may be
switched off. Using the board-to-board connector will be the best way to reduce
the voltage drops. You should also take the resistance of the power supply lines
on the host board or of battery pack into account.

MONITORING POWER SUPPLY

To monitor the supply voltage, you can use the “at+cbc” command
which include three parameters: voltage percent and voltage value (in mv). It
returns the battery voltage 1-100 percent of capacity and actual value measured
at vbat and gnd. The voltage is continuously measured at intervals depending
on the operating mode. The displayed voltage (in mv) is averaged over the last
measuring period before the at+cbc command was executed.

POWER UP AND POWER DOWN SCENARIOS TURN ON SIM300

Sim300 can be turned on by various ways, which are described in following
 Via pwr key pin: starts normal operating mode
 Via rtc interrupt: starts alarm modes
Turn on sim300 using the pwr key pin (power on)
You can turn on the sim300 by driving the pwrkey to a low level voltage .For
period time. The power on scenarios illustrate as following figure.

Turn on sim300 using the rtc (alarm mode)

Alarm mode is a power-on approach by using the rtc. The alert function
of rtc makes the sim300 wake up while the module is power off. In alarm
mode, sim300 will not register to gsm network and the software protocol stack
is close. Thus the parts of at commands related with sim card and protocol stack
will not accessible, and the others can be used as well as in normal mode. Use
the at+calarm command to set the alarm time. The rtc remains the alarm time if
sim300 was power down by “at+cpowd=1” or by pwr key pin. Once the alarm
time expires and executed, sim300 goes into the alarm mode. In this case,
sim300 will send out an unsolicited result code (urc):

READY ALARM MODE

During the alarm mode, using at+cfun commands to query the status of
software protocol stack; it will return 0 which indicates that the protocol stack
is closed. Then after the 90s, sim300 will power down automatically. However,
during alarm mode, if the software protocol is started by at+cfun=1, 1
command, the process of automatic power down will not avail. In alarm mode,
driving the pwr key to a low level voltage for a period will cause sim300 to
power down.
TURN OFF SIM300:
 Following procedure can be used to turn off the sim300:
 Normal power down procedure: turn off sim300 using the pwr key pin
 Normal power down procedure: turn off sim300 using at command
 Under-voltage automatic shutdown: takes effect if under-voltage is
detected
 Over-temperature automatic shutdown: takes effect if an over -
temperature is detected
TURN OFF SIM300 USING THE PWR KEY PIN (POWER DOWN)
You can turn off the sim300 by driving the pwr key to a low level
voltage for period time. The power down scenarios illustrate as following
figure. This procedure will let the module to log off from the network and allow
the software to enter into a secure state and save data before completely
disconnect the power supply. Before the completion of the switching off
procedure the module will send out result code.

POWER DOWN
After this moment, no any at commands can be executed. Module enters
the power down mode, only the rtc is still active. Power down can also be
indicated by vdd_ext pin, which is a low level voltage in this mode.
TURN OFF SIM300 USING AT COMMAND
You can use an command “at+cpowd=1” to turn off the module. This
command will let the module to log off from the network and allow the
software to enter into a secure state and safe data before completely disconnect
the power supply.

POWER DOWN
After this moment, no any at commands can be executed. Module enters
the power down mode, only the rtc is still active. Power down can also be
indicated by vdd_ext pin, which is a low level voltage in this mode.
UNDER-VOLTAGE AUTOMATIC SHUTDOWN
Software will constantly monitors the voltage applied on the vbat, if the
measured battery voltage is no more than 3.5v, the following urc will be
presented:

POWER LOW WARNING

If the measured battery voltage is no more than 3.4v, the following urc
will be presented
POWER LOW DOWN
After this moment, no further more at commands can be executed. The
module will log off from the network and enters the power down mode, only
the rtc is still active.

RESTART SIM300 USING THE POWER KEY PIN

You can restart sim300 by driving the power key to a low level voltage
for period time, same as turn on sim300 using the power key pin. Before
restarting the sim300, you need delay at least 500ms from detecting the vdd_ext
low level on.

POWER SAVING
There are two methods to achieve sim300 module extreme low power.
“at+cfun” is used to set module into minimum functionality mode and /dtr
hardware interface signal can be used to set system to be sleep mode (or slow
clocking mode).
MINIMUM FUNCTIONALITY MODE
Minimum functionality mode reduces the functionality of the module to
a minimum and, thus, minimizes the current consumption to the lowest level.
This mode is set with the “at+cfun” command which provides the choice of the
functionality levels <fun>=0 ， 1 ， 4 0: minimum functionality; 1: full
functionality (default); 4: disable phone both transmit and receive rf circuits; If
sim300 has been set to minimum functionality by “at+cfun=0”, then the rf
function and sim card function will be closed, in this case, the serial ports is
still accessible, but all at commands need rf function or sim card function will
not accessible. If sim300 has disable all rf function by “at+cfun=4”, then rf
function will be closed, the serial ports is still active in this case but all at
commands need rf function will not accessible. When sim300 is in minimum
functionality or has been disable all rf functionality by “at+cfun=4”, it can
return to full functionality by “at+cfun=1”.
Sleep Mode (Slow Clocking Mode)
Through dtr signal control sim300 module to enter or exit the sleep mode
in customer applications. When dtr is in high level, at the same time there is no
on air or audio activity is required and no hardware interrupt (such as gpio
interrupt or data on serial port), sim300 will enter sleep mode automatically. In
this mode, sim300 can still receive paging or sms from network. In sleep
mode, the serial port is not accessible.
Wake up sim300 from sleep mode
1. When sim300 is sleep mode, the following method can wake up the
module. Enable DTR pin to wake up sim300;
2. If dtr pin is pull down to a low level，this signal will wake up sim300
from power saving mode. The serial port will be active after dtr change
to low level about 20ms.
 CHAPTER 5

SOFTWARE ANALYSIS

5.1 INTRODUCTION
The main purpose of using the microcontroller in our project is because
high-performance CMOS 8-bit microcontroller with 8K bytes of in-system
programmable Flash memory. By combining a versatile 8-bit CPU with in-
system programmable Flash on a monolithic chip, the ATMEGA 328 is a
powerful microcontroller which provides a highly-flexible and cost-effective
solution to many embedded control applications.
The programs of the microcontroller have been written in Embedded C
language and were compiled using ARDUINO , a compiler used for
microcontroller programming. The communication between PC and the
microcontroller was established MAX 232 standard and those programs were
also done in C language. The following programs are used at various stages for
the mentioned functions. Serial communication in this program, the various
special function registers of the microcontroller are set such that they can send
and receive data from the PC. This program uses the serial library to
communicate with the ports.

5.2 AVRCOMPILER
The C programming language is a general-purpose, programming
language that provides code efficiency, elements of structured programming,
and a rich set of operators. C is not a big language and is not designed for any
one particular area of application. Its generality combined with its absence of
restrictions, makes C a convenient and effective programming solution for a
wide variety of software tasks. Many applications can be solved more easily
and efficiently with C than with other more specialized languages.
 The AVROptimizing C Compiler is a complete implementation of the
American National Standards Institute (ANSI) standard for the C language.
ARDUINO is not a universal C compiler adapted for the ATMEGA 328target.
It is a ground-up implementation dedicated to generating extremely fast and
compact code for the ATMEGA 328 microprocessor. ARDUINO provides you
the flexibility of programming in C and the code efficiency and speed of
assembly language. Since ARDUINO is a cross compiler, some aspects of the
C programming language and standard libraries are altered or enhanced to
address the peculiarities of an embedded target processor.

5.3 SUPPORTS FOR ALL AVR VARIANTS

The AVR Family is one of the fastest growing Microcontroller

Architectures. More than 400 device variants from various silicon vendors are
today available. New extended AVR Devices, like the ATMEGA
328architecture are dedicated for large application with several Mbytes code
and data space. For optimum support of these different AVR variants,
ARDUINO provides the several development tools that are listed in the table
below. A new output file format (OMF2) allows direct support of up to 16MB
code and data space. ARDUINO compiler is a variant of the ARDUINO
compiler that is design for the new ATMEGA 328architecture.

5.4 COMPILING WITH AT ATMEGA 328

This explains how to use AVR or compile C source files and discusses
the control directives you may specify. These directives allow you to perform
several functions.

For example:

 Direct ARDUINO to generate a listing file

 Control the information included in the object file
  Specify code optimization and memory models

5.5 RUNNING ARDUINO FROM THE COMMAND PROMPT

To invoke the ARDUINO compiler, enter C51or Cx51at the command

prompt. On this command line, you must include the name of the C source file
to be compiled, as well as any other necessary control directives required to
compile your source file.

6.6EMBEDDED C

Micro controller program is written in Embedded C Language and It Is

Compile and Converter D into Hex File Using Code vision Software. The hex
file is loaded into the micro controller for performing the operation
 CHAPTER 6

CONCLUSION

This fabricated part uses the model of a timed transport mechanism. This
system uses kinematic linkages for timing the transportation. four bar
mechanism, that follows a coupler curve. It has a greater advantage than the
existing system of transport of work piece in a factory. Thus the project
proposed a model where the materials are transported with a time delay. This
provides a huge advantage over the existing systems
Our proposed Two Wheeler Vehicle Security System is the advanced,
reliable and robust version of security mechanism for two wheeler vehicles.
The proposed security system also gives space, in terms of hardware and
software, to add up custom applications to make the product even more
userfriendly. Proposed TWVSS can be installed on two wheeler vehicle of any
class or company, thereby creating a huge market for the product. Stress was
laid in designing a cost efficient system so that it could also be even bought by
the owners of the low end bikes. Small size of the module allows it to be placed
under the seat of the vehicle, there by needing no physical changes to be done
to the vehicle. We believe the frequency of the two wheeler vehicle thefts that
are encountered these days could be highly suppressed by installing our
proposed security system.
REFERENCES

[1]. Arun Kumar N., Srinivasan V., Krishna Kumar P., Analysing the strength
of unidirectional fibre orientations under transverse static load,
International Journal of Applied Engineering Research, v-9, i-22, pp-
7749-7754, 2014.

[2]. Srinivasan V., Analysis of static and dynamic load on hydrostatic bearing
with variable viscosity and pressure, Indian Journal of Science and
Technology, v-6, i-SUPPL.6, pp-4777-4782, 2013.

[3]. Srinivasan V., Optimizing air traffic conflict and congestion using genetic
algorithm, Middle - East Journal of Scientific Research, v-20, i-4, pp-
456-461, 2014.

[4]. Praveen R., Achudhan M., Optimization of jute composite as a noise

retardant material, International Journal of Applied Engineering
Research, v-9, i-22, pp7627-7632, 2014.

[5]. Raja Kumar G., Achudhan M., Srinivasa Rao G., Studies on corrosion
behaviour of borated stainless steel (304B) welds, International Journal
of Applied Engineering Research, v-9, i-22, pp-7767-7772, 2014.

[6]. Ganeshram V., Achudhan M., Design and moldflow analysis of piston
cooling nozzle in automobiles, Indian Journal of Science and
Technology, v-6, i-SUPPL.6, pp4808-4813, 2013.

[7]. Ganeshram V., Achudhan M., Synthesis and characterization of phenol

formaldehyde resin as a binder used for coated abrasives, Indian Journal
of Science and Technology, v-6, i-SUPPL.6, pp-4814-4823, 2013.
[8]. Achudhan M., Prem Jayakumar M., Mathematical modeling and control of
an electrically-heated catalyst, International Journal of Applied
Engineering Research, v-9, i-23, pp-23013-, 2014.

[9]. Anbazhagan R., Satheesh B., Gopalakrishnan K., Mathematical modeling

and simulation of modern cars in the role of stability analysis, Indian
Journal of Science and Technology, v-6, i-SUPPL5, pp-4633-4641,
2013.

[10].Udayakumar R., Kaliyamurthie K.P., Khanaa, Thooyamani K.P., Data

mining a boon: Predictive system for university topper women in
academia, World Applied Sciences Journal, v-29, i-14, pp-86-90, 2014.