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CHAPTER 6
INTRODUCTION
Islanding mode- In this mode, the source voltage is interrupted and the
PV array supplies the load power separately.
Whenever the fault occurs in source side the source voltage is zero
in that instant the shunt inverter control system change over to parallel
mode operation to islanding mode operation. The series inverter is
switched off and shunt inverter starts and PV array supply the power to
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load though shunt inverter and load voltage maintain constant up to fault
clearing. After fault clearing, the series inverter switches on and the shunt
inverter operating in the normal mode. Figure 6.2 will highlight the above
description.
the load and for maintaining DC link voltage. The theory is based on
converting three axis parameters into two axes by defining well-known
transfer matrix. The active and reactive instantaneous power can be
decomposed in to DC component and AC harmonic components, which
consist of negative sequence component and harmonic component.
i*ca i*0
i*cb = [C]T i*
i*cc i*
(6.2)
where
1/ 2 1 0
T 2
[C] 1/ 2 1/ 2 3/2
3
1/ 2 1/ 2 3/2
v -v
i* 1 p control p PV
=
i* v2 v2
v v q contoral (6.3)
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where
V ,V - Transformed reference voltages
i* , i* - compensating currents
PPV - active power delivers to local load with photovoltaic array
The PV power delivers to the local loads through the shunt
converter. It should be noted that, it is difficult to compensate reactive
power and harmonic current using series converter only. This is due to the
fact that the signals from the converter output terminals must be passed
through the filters. In that case, the filter design strongly depends on the
system parameter like load size and transformer turns ratio.
The shunt inverter controls the load voltage and load current using
the PI controller. The dynamic equations can be derived using the
equivalent circuit of shunt inverter. Equations (6.4) and (6.5) they define
the current control.
I*PFp *e
K PI (VTp e
VTp ) e
C PF VTp I eLp (6.4)
I *PFq *e
K PI (VTq e
VTq ) e
C PF VTp I eLq
(6.5)
V1p* K PI (I *e
PFp I ePFp ) L PF I ePFq e
VTp (6.6)
V1q* K PI ( I*e
PFq I ePFq ) L PF I ePFp e
VTq (6.7)
where
I*PFp -Filter current p axis, I*PFq -Filter current q axis
V1*p ,Vl*q – load voltages with p and q axis
VTp ,VTq – measured load voltages with p and q axis
kp, kI - proportional and integral constant
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low voltage inputs of photovoltaic array units have been connected to the
DC bus by series connected boost converters.
The maximum power point of a solar array is the point along the P-
V curve that corresponds to the maximum output power possible for the
array, as shown in figure 6.6. The goal of MPPT algorithms is to extract
the maximum power from the PV array. Usually, in the condition dp/dv = 0
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(6.8)
where, Vo - output voltage of DC converter
Vpv - photovoltaic array voltage
The voltage across the capacitor can be accelerated by varying the
duty cycle D of the converter. When D = 0, the output voltage is equal to
the source voltage. When the converter switch is closed, the inductor
current rises and energy is stored in the inductor. The inductor voltage is
given by
di1
VL L (6.9)
dt
where VL- inductor voltage
In this situation, the source energy is transferred to the inductor and
the peak-to-peak ripple inductor current is obtained as
Vs
I t (6.10)
L
The inductor current in this mode becomes
Vs
I1( t ) t I1 (6.11)
L
When the device (IGBT) is switched off, the stored energy in the
inductor is transferred to the capacitor and the inductor current falls. Let us
consider the energy supplied to the capacitor, which is given by the
equation
136
1 2 2 1 2 2
C (VMAX VMIN ) L ( I MAX I MIN ) (6.12)
2 2
where
INOM- Nominal current of the boost converter input
VNOM- Nominal voltage of the boost converter input
1 1
CDC (VC2 MAX 2
VDC ) VS I Li T (6.14)
2 2
From the above equation the capacitor value for a three phase system can
be derived and given as follows:
V I LT
s
Cdc 3 2
VC MAX V 2 dc
where (6.15)
3 3
Vdc VS .
Figure 6.8 shows the output voltage across the load without PV-
UPQC. Figure 6.9 shows the injected voltage by shunt inverter. Figure 6.10
shows the compensated output voltage across the load with PV- UPQC.
Figure 6.11 shows that the DC link voltage is maintained at constant value
during interruption. Figure 6.12 depicts the output current supplied by the
PV array during the voltage interruption. Figure 6.13 shows the active
power supplied by the PV array.
400
Interruption
300
200
100
-100
-200
-300
-400
0 0.1 0.2 0.3 0.4 0.5
Time(s)
400
Injected voltage by Inverter
300
200
100
-100
-200
-300
-400
0 0.1 0.2 0.3 0.4 0.5
Time(s)
400
300
200
100
-100
-200
-300
-400
0 0.1 0.2 0.3 0.4 0.5
Time(s)
Load voltage
compensation during 0.02 to 0.06sec 0.2 to 0.4 sec
interruption
On the basis of the research work presented in this chapter, a paper entitled
‘Photovoltaic Unified Power Quality Conditioner Sag and Interruption
Mitigation’ has been published in the Australian Journal of Electrical and
Electronics Engineering, Vol.9 No.2, pp. 145-151, 2012.
141
6.8 CONCLUSION